154e4ee71SNavdeep Parhar /*- 254e4ee71SNavdeep Parhar * Copyright (c) 2011 Chelsio Communications, Inc. 354e4ee71SNavdeep Parhar * All rights reserved. 454e4ee71SNavdeep Parhar * Written by: Navdeep Parhar <np@FreeBSD.org> 554e4ee71SNavdeep Parhar * 654e4ee71SNavdeep Parhar * Redistribution and use in source and binary forms, with or without 754e4ee71SNavdeep Parhar * modification, are permitted provided that the following conditions 854e4ee71SNavdeep Parhar * are met: 954e4ee71SNavdeep Parhar * 1. Redistributions of source code must retain the above copyright 1054e4ee71SNavdeep Parhar * notice, this list of conditions and the following disclaimer. 1154e4ee71SNavdeep Parhar * 2. Redistributions in binary form must reproduce the above copyright 1254e4ee71SNavdeep Parhar * notice, this list of conditions and the following disclaimer in the 1354e4ee71SNavdeep Parhar * documentation and/or other materials provided with the distribution. 1454e4ee71SNavdeep Parhar * 1554e4ee71SNavdeep Parhar * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 1654e4ee71SNavdeep Parhar * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 1754e4ee71SNavdeep Parhar * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 1854e4ee71SNavdeep Parhar * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 1954e4ee71SNavdeep Parhar * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 2054e4ee71SNavdeep Parhar * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 2154e4ee71SNavdeep Parhar * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 2254e4ee71SNavdeep Parhar * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 2354e4ee71SNavdeep Parhar * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 2454e4ee71SNavdeep Parhar * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 2554e4ee71SNavdeep Parhar * SUCH DAMAGE. 2654e4ee71SNavdeep Parhar */ 2754e4ee71SNavdeep Parhar 2854e4ee71SNavdeep Parhar #include <sys/cdefs.h> 2954e4ee71SNavdeep Parhar __FBSDID("$FreeBSD$"); 3054e4ee71SNavdeep Parhar 3154e4ee71SNavdeep Parhar #include "opt_inet.h" 32a1ea9a82SNavdeep Parhar #include "opt_inet6.h" 3354e4ee71SNavdeep Parhar 3454e4ee71SNavdeep Parhar #include <sys/types.h> 35c3322cb9SGleb Smirnoff #include <sys/eventhandler.h> 3654e4ee71SNavdeep Parhar #include <sys/mbuf.h> 3754e4ee71SNavdeep Parhar #include <sys/socket.h> 3854e4ee71SNavdeep Parhar #include <sys/kernel.h> 39ecb79ca4SNavdeep Parhar #include <sys/malloc.h> 40ecb79ca4SNavdeep Parhar #include <sys/queue.h> 4138035ed6SNavdeep Parhar #include <sys/sbuf.h> 42ecb79ca4SNavdeep Parhar #include <sys/taskqueue.h> 43480e603cSNavdeep Parhar #include <sys/time.h> 447951040fSNavdeep Parhar #include <sys/sglist.h> 4554e4ee71SNavdeep Parhar #include <sys/sysctl.h> 46733b9277SNavdeep Parhar #include <sys/smp.h> 4782eff304SNavdeep Parhar #include <sys/counter.h> 4854e4ee71SNavdeep Parhar #include <net/bpf.h> 4954e4ee71SNavdeep Parhar #include <net/ethernet.h> 5054e4ee71SNavdeep Parhar #include <net/if.h> 5154e4ee71SNavdeep Parhar #include <net/if_vlan_var.h> 5254e4ee71SNavdeep Parhar #include <netinet/in.h> 5354e4ee71SNavdeep Parhar #include <netinet/ip.h> 54a1ea9a82SNavdeep Parhar #include <netinet/ip6.h> 5554e4ee71SNavdeep Parhar #include <netinet/tcp.h> 5664db8966SDimitry Andric #include <machine/md_var.h> 5738035ed6SNavdeep Parhar #include <vm/vm.h> 5838035ed6SNavdeep Parhar #include <vm/pmap.h> 59298d969cSNavdeep Parhar #ifdef DEV_NETMAP 60298d969cSNavdeep Parhar #include <machine/bus.h> 61298d969cSNavdeep Parhar #include <sys/selinfo.h> 62298d969cSNavdeep Parhar #include <net/if_var.h> 63298d969cSNavdeep Parhar #include <net/netmap.h> 64298d969cSNavdeep Parhar #include <dev/netmap/netmap_kern.h> 65298d969cSNavdeep Parhar #endif 6654e4ee71SNavdeep Parhar 6754e4ee71SNavdeep Parhar #include "common/common.h" 6854e4ee71SNavdeep Parhar #include "common/t4_regs.h" 6954e4ee71SNavdeep Parhar #include "common/t4_regs_values.h" 7054e4ee71SNavdeep Parhar #include "common/t4_msg.h" 71671bf2b8SNavdeep Parhar #include "t4_l2t.h" 727951040fSNavdeep Parhar #include "t4_mp_ring.h" 7354e4ee71SNavdeep Parhar 74d14b0ac1SNavdeep Parhar #ifdef T4_PKT_TIMESTAMP 75d14b0ac1SNavdeep Parhar #define RX_COPY_THRESHOLD (MINCLSIZE - 8) 76d14b0ac1SNavdeep Parhar #else 77d14b0ac1SNavdeep Parhar #define RX_COPY_THRESHOLD MINCLSIZE 78d14b0ac1SNavdeep Parhar #endif 79d14b0ac1SNavdeep Parhar 809fb8886bSNavdeep Parhar /* 819fb8886bSNavdeep Parhar * Ethernet frames are DMA'd at this byte offset into the freelist buffer. 829fb8886bSNavdeep Parhar * 0-7 are valid values. 839fb8886bSNavdeep Parhar */ 8429c229e9SJohn Baldwin static int fl_pktshift = 2; 859fb8886bSNavdeep Parhar TUNABLE_INT("hw.cxgbe.fl_pktshift", &fl_pktshift); 8654e4ee71SNavdeep Parhar 879fb8886bSNavdeep Parhar /* 889fb8886bSNavdeep Parhar * Pad ethernet payload up to this boundary. 899fb8886bSNavdeep Parhar * -1: driver should figure out a good value. 901458bff9SNavdeep Parhar * 0: disable padding. 911458bff9SNavdeep Parhar * Any power of 2 from 32 to 4096 (both inclusive) is also a valid value. 929fb8886bSNavdeep Parhar */ 93298d969cSNavdeep Parhar int fl_pad = -1; 949fb8886bSNavdeep Parhar TUNABLE_INT("hw.cxgbe.fl_pad", &fl_pad); 959fb8886bSNavdeep Parhar 969fb8886bSNavdeep Parhar /* 979fb8886bSNavdeep Parhar * Status page length. 989fb8886bSNavdeep Parhar * -1: driver should figure out a good value. 999fb8886bSNavdeep Parhar * 64 or 128 are the only other valid values. 1009fb8886bSNavdeep Parhar */ 10129c229e9SJohn Baldwin static int spg_len = -1; 1029fb8886bSNavdeep Parhar TUNABLE_INT("hw.cxgbe.spg_len", &spg_len); 1039fb8886bSNavdeep Parhar 1049fb8886bSNavdeep Parhar /* 1059fb8886bSNavdeep Parhar * Congestion drops. 1069fb8886bSNavdeep Parhar * -1: no congestion feedback (not recommended). 1079fb8886bSNavdeep Parhar * 0: backpressure the channel instead of dropping packets right away. 1089fb8886bSNavdeep Parhar * 1: no backpressure, drop packets for the congested queue immediately. 1099fb8886bSNavdeep Parhar */ 1109fb8886bSNavdeep Parhar static int cong_drop = 0; 1119fb8886bSNavdeep Parhar TUNABLE_INT("hw.cxgbe.cong_drop", &cong_drop); 11254e4ee71SNavdeep Parhar 1131458bff9SNavdeep Parhar /* 1141458bff9SNavdeep Parhar * Deliver multiple frames in the same free list buffer if they fit. 1151458bff9SNavdeep Parhar * -1: let the driver decide whether to enable buffer packing or not. 1161458bff9SNavdeep Parhar * 0: disable buffer packing. 1171458bff9SNavdeep Parhar * 1: enable buffer packing. 1181458bff9SNavdeep Parhar */ 1191458bff9SNavdeep Parhar static int buffer_packing = -1; 1201458bff9SNavdeep Parhar TUNABLE_INT("hw.cxgbe.buffer_packing", &buffer_packing); 1211458bff9SNavdeep Parhar 1221458bff9SNavdeep Parhar /* 1231458bff9SNavdeep Parhar * Start next frame in a packed buffer at this boundary. 1241458bff9SNavdeep Parhar * -1: driver should figure out a good value. 125e3207e19SNavdeep Parhar * T4: driver will ignore this and use the same value as fl_pad above. 126e3207e19SNavdeep Parhar * T5: 16, or a power of 2 from 64 to 4096 (both inclusive) is a valid value. 1271458bff9SNavdeep Parhar */ 1281458bff9SNavdeep Parhar static int fl_pack = -1; 1291458bff9SNavdeep Parhar TUNABLE_INT("hw.cxgbe.fl_pack", &fl_pack); 1301458bff9SNavdeep Parhar 13138035ed6SNavdeep Parhar /* 13238035ed6SNavdeep Parhar * Allow the driver to create mbuf(s) in a cluster allocated for rx. 13338035ed6SNavdeep Parhar * 0: never; always allocate mbufs from the zone_mbuf UMA zone. 13438035ed6SNavdeep Parhar * 1: ok to create mbuf(s) within a cluster if there is room. 13538035ed6SNavdeep Parhar */ 13638035ed6SNavdeep Parhar static int allow_mbufs_in_cluster = 1; 13738035ed6SNavdeep Parhar TUNABLE_INT("hw.cxgbe.allow_mbufs_in_cluster", &allow_mbufs_in_cluster); 13838035ed6SNavdeep Parhar 13938035ed6SNavdeep Parhar /* 14038035ed6SNavdeep Parhar * Largest rx cluster size that the driver is allowed to allocate. 14138035ed6SNavdeep Parhar */ 14238035ed6SNavdeep Parhar static int largest_rx_cluster = MJUM16BYTES; 14338035ed6SNavdeep Parhar TUNABLE_INT("hw.cxgbe.largest_rx_cluster", &largest_rx_cluster); 14438035ed6SNavdeep Parhar 14538035ed6SNavdeep Parhar /* 14638035ed6SNavdeep Parhar * Size of cluster allocation that's most likely to succeed. The driver will 14738035ed6SNavdeep Parhar * fall back to this size if it fails to allocate clusters larger than this. 14838035ed6SNavdeep Parhar */ 14938035ed6SNavdeep Parhar static int safest_rx_cluster = PAGE_SIZE; 15038035ed6SNavdeep Parhar TUNABLE_INT("hw.cxgbe.safest_rx_cluster", &safest_rx_cluster); 15138035ed6SNavdeep Parhar 15254e4ee71SNavdeep Parhar struct txpkts { 1537951040fSNavdeep Parhar u_int wr_type; /* type 0 or type 1 */ 1547951040fSNavdeep Parhar u_int npkt; /* # of packets in this work request */ 1557951040fSNavdeep Parhar u_int plen; /* total payload (sum of all packets) */ 1567951040fSNavdeep Parhar u_int len16; /* # of 16B pieces used by this work request */ 15754e4ee71SNavdeep Parhar }; 15854e4ee71SNavdeep Parhar 15954e4ee71SNavdeep Parhar /* A packet's SGL. This + m_pkthdr has all info needed for tx */ 16054e4ee71SNavdeep Parhar struct sgl { 1617951040fSNavdeep Parhar struct sglist sg; 1627951040fSNavdeep Parhar struct sglist_seg seg[TX_SGL_SEGS]; 16354e4ee71SNavdeep Parhar }; 16454e4ee71SNavdeep Parhar 165733b9277SNavdeep Parhar static int service_iq(struct sge_iq *, int); 1664d6db4e0SNavdeep Parhar static struct mbuf *get_fl_payload(struct adapter *, struct sge_fl *, uint32_t); 167733b9277SNavdeep Parhar static int t4_eth_rx(struct sge_iq *, const struct rss_header *, struct mbuf *); 168b2daa9a9SNavdeep Parhar static inline void init_iq(struct sge_iq *, struct adapter *, int, int, int); 169e3207e19SNavdeep Parhar static inline void init_fl(struct adapter *, struct sge_fl *, int, int, char *); 17090e7434aSNavdeep Parhar static inline void init_eq(struct adapter *, struct sge_eq *, int, int, uint8_t, 17190e7434aSNavdeep Parhar uint16_t, char *); 17254e4ee71SNavdeep Parhar static int alloc_ring(struct adapter *, size_t, bus_dma_tag_t *, bus_dmamap_t *, 17354e4ee71SNavdeep Parhar bus_addr_t *, void **); 17454e4ee71SNavdeep Parhar static int free_ring(struct adapter *, bus_dma_tag_t, bus_dmamap_t, bus_addr_t, 17554e4ee71SNavdeep Parhar void *); 176fe2ebb76SJohn Baldwin static int alloc_iq_fl(struct vi_info *, struct sge_iq *, struct sge_fl *, 177bc14b14dSNavdeep Parhar int, int); 178fe2ebb76SJohn Baldwin static int free_iq_fl(struct vi_info *, struct sge_iq *, struct sge_fl *); 17938035ed6SNavdeep Parhar static void add_fl_sysctls(struct sysctl_ctx_list *, struct sysctl_oid *, 18038035ed6SNavdeep Parhar struct sge_fl *); 181733b9277SNavdeep Parhar static int alloc_fwq(struct adapter *); 182733b9277SNavdeep Parhar static int free_fwq(struct adapter *); 183733b9277SNavdeep Parhar static int alloc_mgmtq(struct adapter *); 184733b9277SNavdeep Parhar static int free_mgmtq(struct adapter *); 185fe2ebb76SJohn Baldwin static int alloc_rxq(struct vi_info *, struct sge_rxq *, int, int, 186733b9277SNavdeep Parhar struct sysctl_oid *); 187fe2ebb76SJohn Baldwin static int free_rxq(struct vi_info *, struct sge_rxq *); 18809fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 189fe2ebb76SJohn Baldwin static int alloc_ofld_rxq(struct vi_info *, struct sge_ofld_rxq *, int, int, 190733b9277SNavdeep Parhar struct sysctl_oid *); 191fe2ebb76SJohn Baldwin static int free_ofld_rxq(struct vi_info *, struct sge_ofld_rxq *); 192733b9277SNavdeep Parhar #endif 193298d969cSNavdeep Parhar #ifdef DEV_NETMAP 194fe2ebb76SJohn Baldwin static int alloc_nm_rxq(struct vi_info *, struct sge_nm_rxq *, int, int, 195298d969cSNavdeep Parhar struct sysctl_oid *); 196fe2ebb76SJohn Baldwin static int free_nm_rxq(struct vi_info *, struct sge_nm_rxq *); 197fe2ebb76SJohn Baldwin static int alloc_nm_txq(struct vi_info *, struct sge_nm_txq *, int, int, 198298d969cSNavdeep Parhar struct sysctl_oid *); 199fe2ebb76SJohn Baldwin static int free_nm_txq(struct vi_info *, struct sge_nm_txq *); 200298d969cSNavdeep Parhar #endif 201733b9277SNavdeep Parhar static int ctrl_eq_alloc(struct adapter *, struct sge_eq *); 202fe2ebb76SJohn Baldwin static int eth_eq_alloc(struct adapter *, struct vi_info *, struct sge_eq *); 20309fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 204fe2ebb76SJohn Baldwin static int ofld_eq_alloc(struct adapter *, struct vi_info *, struct sge_eq *); 205733b9277SNavdeep Parhar #endif 206fe2ebb76SJohn Baldwin static int alloc_eq(struct adapter *, struct vi_info *, struct sge_eq *); 207733b9277SNavdeep Parhar static int free_eq(struct adapter *, struct sge_eq *); 208fe2ebb76SJohn Baldwin static int alloc_wrq(struct adapter *, struct vi_info *, struct sge_wrq *, 209733b9277SNavdeep Parhar struct sysctl_oid *); 210733b9277SNavdeep Parhar static int free_wrq(struct adapter *, struct sge_wrq *); 211fe2ebb76SJohn Baldwin static int alloc_txq(struct vi_info *, struct sge_txq *, int, 212733b9277SNavdeep Parhar struct sysctl_oid *); 213fe2ebb76SJohn Baldwin static int free_txq(struct vi_info *, struct sge_txq *); 21454e4ee71SNavdeep Parhar static void oneseg_dma_callback(void *, bus_dma_segment_t *, int, int); 21554e4ee71SNavdeep Parhar static inline void ring_fl_db(struct adapter *, struct sge_fl *); 216733b9277SNavdeep Parhar static int refill_fl(struct adapter *, struct sge_fl *, int); 217733b9277SNavdeep Parhar static void refill_sfl(void *); 21854e4ee71SNavdeep Parhar static int alloc_fl_sdesc(struct sge_fl *); 2191458bff9SNavdeep Parhar static void free_fl_sdesc(struct adapter *, struct sge_fl *); 22038035ed6SNavdeep Parhar static void find_best_refill_source(struct adapter *, struct sge_fl *, int); 22138035ed6SNavdeep Parhar static void find_safe_refill_source(struct adapter *, struct sge_fl *); 222733b9277SNavdeep Parhar static void add_fl_to_sfl(struct adapter *, struct sge_fl *); 22354e4ee71SNavdeep Parhar 2247951040fSNavdeep Parhar static inline void get_pkt_gl(struct mbuf *, struct sglist *); 2257951040fSNavdeep Parhar static inline u_int txpkt_len16(u_int, u_int); 2267951040fSNavdeep Parhar static inline u_int txpkts0_len16(u_int); 2277951040fSNavdeep Parhar static inline u_int txpkts1_len16(void); 2287951040fSNavdeep Parhar static u_int write_txpkt_wr(struct sge_txq *, struct fw_eth_tx_pkt_wr *, 2297951040fSNavdeep Parhar struct mbuf *, u_int); 2307951040fSNavdeep Parhar static int try_txpkts(struct mbuf *, struct mbuf *, struct txpkts *, u_int); 2317951040fSNavdeep Parhar static int add_to_txpkts(struct mbuf *, struct txpkts *, u_int); 2327951040fSNavdeep Parhar static u_int write_txpkts_wr(struct sge_txq *, struct fw_eth_tx_pkts_wr *, 2337951040fSNavdeep Parhar struct mbuf *, const struct txpkts *, u_int); 2347951040fSNavdeep Parhar static void write_gl_to_txd(struct sge_txq *, struct mbuf *, caddr_t *, int); 23554e4ee71SNavdeep Parhar static inline void copy_to_txd(struct sge_eq *, caddr_t, caddr_t *, int); 2367951040fSNavdeep Parhar static inline void ring_eq_db(struct adapter *, struct sge_eq *, u_int); 2377951040fSNavdeep Parhar static inline uint16_t read_hw_cidx(struct sge_eq *); 2387951040fSNavdeep Parhar static inline u_int reclaimable_tx_desc(struct sge_eq *); 2397951040fSNavdeep Parhar static inline u_int total_available_tx_desc(struct sge_eq *); 2407951040fSNavdeep Parhar static u_int reclaim_tx_descs(struct sge_txq *, u_int); 2417951040fSNavdeep Parhar static void tx_reclaim(void *, int); 2427951040fSNavdeep Parhar static __be64 get_flit(struct sglist_seg *, int, int); 243733b9277SNavdeep Parhar static int handle_sge_egr_update(struct sge_iq *, const struct rss_header *, 244733b9277SNavdeep Parhar struct mbuf *); 2451b4cc91fSNavdeep Parhar static int handle_fw_msg(struct sge_iq *, const struct rss_header *, 246733b9277SNavdeep Parhar struct mbuf *); 247069af0ebSJohn Baldwin static int t4_handle_wrerr_rpl(struct adapter *, const __be64 *); 2487951040fSNavdeep Parhar static void wrq_tx_drain(void *, int); 2497951040fSNavdeep Parhar static void drain_wrq_wr_list(struct adapter *, struct sge_wrq *); 25054e4ee71SNavdeep Parhar 25156599263SNavdeep Parhar static int sysctl_uint16(SYSCTL_HANDLER_ARGS); 25238035ed6SNavdeep Parhar static int sysctl_bufsizes(SYSCTL_HANDLER_ARGS); 25302f972e8SNavdeep Parhar static int sysctl_tc(SYSCTL_HANDLER_ARGS); 254f7dfe243SNavdeep Parhar 25582eff304SNavdeep Parhar static counter_u64_t extfree_refs; 25682eff304SNavdeep Parhar static counter_u64_t extfree_rels; 25782eff304SNavdeep Parhar 258671bf2b8SNavdeep Parhar an_handler_t t4_an_handler; 259671bf2b8SNavdeep Parhar fw_msg_handler_t t4_fw_msg_handler[NUM_FW6_TYPES]; 260671bf2b8SNavdeep Parhar cpl_handler_t t4_cpl_handler[NUM_CPL_CMDS]; 261671bf2b8SNavdeep Parhar 262671bf2b8SNavdeep Parhar 263671bf2b8SNavdeep Parhar static int 264671bf2b8SNavdeep Parhar an_not_handled(struct sge_iq *iq, const struct rsp_ctrl *ctrl) 265671bf2b8SNavdeep Parhar { 266671bf2b8SNavdeep Parhar 267671bf2b8SNavdeep Parhar #ifdef INVARIANTS 268671bf2b8SNavdeep Parhar panic("%s: async notification on iq %p (ctrl %p)", __func__, iq, ctrl); 269671bf2b8SNavdeep Parhar #else 270671bf2b8SNavdeep Parhar log(LOG_ERR, "%s: async notification on iq %p (ctrl %p)\n", 271671bf2b8SNavdeep Parhar __func__, iq, ctrl); 272671bf2b8SNavdeep Parhar #endif 273671bf2b8SNavdeep Parhar return (EDOOFUS); 274671bf2b8SNavdeep Parhar } 275671bf2b8SNavdeep Parhar 276671bf2b8SNavdeep Parhar int 277671bf2b8SNavdeep Parhar t4_register_an_handler(an_handler_t h) 278671bf2b8SNavdeep Parhar { 279671bf2b8SNavdeep Parhar uintptr_t *loc, new; 280671bf2b8SNavdeep Parhar 281671bf2b8SNavdeep Parhar new = h ? (uintptr_t)h : (uintptr_t)an_not_handled; 282671bf2b8SNavdeep Parhar loc = (uintptr_t *) &t4_an_handler; 283671bf2b8SNavdeep Parhar atomic_store_rel_ptr(loc, new); 284671bf2b8SNavdeep Parhar 285671bf2b8SNavdeep Parhar return (0); 286671bf2b8SNavdeep Parhar } 287671bf2b8SNavdeep Parhar 288671bf2b8SNavdeep Parhar static int 289671bf2b8SNavdeep Parhar fw_msg_not_handled(struct adapter *sc, const __be64 *rpl) 290671bf2b8SNavdeep Parhar { 291671bf2b8SNavdeep Parhar const struct cpl_fw6_msg *cpl = 292671bf2b8SNavdeep Parhar __containerof(rpl, struct cpl_fw6_msg, data[0]); 293671bf2b8SNavdeep Parhar 294671bf2b8SNavdeep Parhar #ifdef INVARIANTS 295671bf2b8SNavdeep Parhar panic("%s: fw_msg type %d", __func__, cpl->type); 296671bf2b8SNavdeep Parhar #else 297671bf2b8SNavdeep Parhar log(LOG_ERR, "%s: fw_msg type %d\n", __func__, cpl->type); 298671bf2b8SNavdeep Parhar #endif 299671bf2b8SNavdeep Parhar return (EDOOFUS); 300671bf2b8SNavdeep Parhar } 301671bf2b8SNavdeep Parhar 302671bf2b8SNavdeep Parhar int 303671bf2b8SNavdeep Parhar t4_register_fw_msg_handler(int type, fw_msg_handler_t h) 304671bf2b8SNavdeep Parhar { 305671bf2b8SNavdeep Parhar uintptr_t *loc, new; 306671bf2b8SNavdeep Parhar 307671bf2b8SNavdeep Parhar if (type >= nitems(t4_fw_msg_handler)) 308671bf2b8SNavdeep Parhar return (EINVAL); 309671bf2b8SNavdeep Parhar 310671bf2b8SNavdeep Parhar /* 311671bf2b8SNavdeep Parhar * These are dispatched by the handler for FW{4|6}_CPL_MSG using the CPL 312671bf2b8SNavdeep Parhar * handler dispatch table. Reject any attempt to install a handler for 313671bf2b8SNavdeep Parhar * this subtype. 314671bf2b8SNavdeep Parhar */ 315671bf2b8SNavdeep Parhar if (type == FW_TYPE_RSSCPL || type == FW6_TYPE_RSSCPL) 316671bf2b8SNavdeep Parhar return (EINVAL); 317671bf2b8SNavdeep Parhar 318671bf2b8SNavdeep Parhar new = h ? (uintptr_t)h : (uintptr_t)fw_msg_not_handled; 319671bf2b8SNavdeep Parhar loc = (uintptr_t *) &t4_fw_msg_handler[type]; 320671bf2b8SNavdeep Parhar atomic_store_rel_ptr(loc, new); 321671bf2b8SNavdeep Parhar 322671bf2b8SNavdeep Parhar return (0); 323671bf2b8SNavdeep Parhar } 324671bf2b8SNavdeep Parhar 325671bf2b8SNavdeep Parhar static int 326671bf2b8SNavdeep Parhar cpl_not_handled(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m) 327671bf2b8SNavdeep Parhar { 328671bf2b8SNavdeep Parhar 329671bf2b8SNavdeep Parhar #ifdef INVARIANTS 330671bf2b8SNavdeep Parhar panic("%s: opcode 0x%02x on iq %p with payload %p", 331671bf2b8SNavdeep Parhar __func__, rss->opcode, iq, m); 332671bf2b8SNavdeep Parhar #else 333671bf2b8SNavdeep Parhar log(LOG_ERR, "%s: opcode 0x%02x on iq %p with payload %p\n", 334671bf2b8SNavdeep Parhar __func__, rss->opcode, iq, m); 335671bf2b8SNavdeep Parhar m_freem(m); 336671bf2b8SNavdeep Parhar #endif 337671bf2b8SNavdeep Parhar return (EDOOFUS); 338671bf2b8SNavdeep Parhar } 339671bf2b8SNavdeep Parhar 340671bf2b8SNavdeep Parhar int 341671bf2b8SNavdeep Parhar t4_register_cpl_handler(int opcode, cpl_handler_t h) 342671bf2b8SNavdeep Parhar { 343671bf2b8SNavdeep Parhar uintptr_t *loc, new; 344671bf2b8SNavdeep Parhar 345671bf2b8SNavdeep Parhar if (opcode >= nitems(t4_cpl_handler)) 346671bf2b8SNavdeep Parhar return (EINVAL); 347671bf2b8SNavdeep Parhar 348671bf2b8SNavdeep Parhar new = h ? (uintptr_t)h : (uintptr_t)cpl_not_handled; 349671bf2b8SNavdeep Parhar loc = (uintptr_t *) &t4_cpl_handler[opcode]; 350671bf2b8SNavdeep Parhar atomic_store_rel_ptr(loc, new); 351671bf2b8SNavdeep Parhar 352671bf2b8SNavdeep Parhar return (0); 353671bf2b8SNavdeep Parhar } 354671bf2b8SNavdeep Parhar 35594586193SNavdeep Parhar /* 3561458bff9SNavdeep Parhar * Called on MOD_LOAD. Validates and calculates the SGE tunables. 35794586193SNavdeep Parhar */ 35894586193SNavdeep Parhar void 35994586193SNavdeep Parhar t4_sge_modload(void) 36094586193SNavdeep Parhar { 361671bf2b8SNavdeep Parhar int i; 3624defc81bSNavdeep Parhar 3639fb8886bSNavdeep Parhar if (fl_pktshift < 0 || fl_pktshift > 7) { 3649fb8886bSNavdeep Parhar printf("Invalid hw.cxgbe.fl_pktshift value (%d)," 3659fb8886bSNavdeep Parhar " using 2 instead.\n", fl_pktshift); 3669fb8886bSNavdeep Parhar fl_pktshift = 2; 3679fb8886bSNavdeep Parhar } 3689fb8886bSNavdeep Parhar 3699fb8886bSNavdeep Parhar if (spg_len != 64 && spg_len != 128) { 3709fb8886bSNavdeep Parhar int len; 3719fb8886bSNavdeep Parhar 3729fb8886bSNavdeep Parhar #if defined(__i386__) || defined(__amd64__) 3739fb8886bSNavdeep Parhar len = cpu_clflush_line_size > 64 ? 128 : 64; 3749fb8886bSNavdeep Parhar #else 3759fb8886bSNavdeep Parhar len = 64; 3769fb8886bSNavdeep Parhar #endif 3779fb8886bSNavdeep Parhar if (spg_len != -1) { 3789fb8886bSNavdeep Parhar printf("Invalid hw.cxgbe.spg_len value (%d)," 3799fb8886bSNavdeep Parhar " using %d instead.\n", spg_len, len); 3809fb8886bSNavdeep Parhar } 3819fb8886bSNavdeep Parhar spg_len = len; 3829fb8886bSNavdeep Parhar } 3839fb8886bSNavdeep Parhar 3849fb8886bSNavdeep Parhar if (cong_drop < -1 || cong_drop > 1) { 3859fb8886bSNavdeep Parhar printf("Invalid hw.cxgbe.cong_drop value (%d)," 3869fb8886bSNavdeep Parhar " using 0 instead.\n", cong_drop); 3879fb8886bSNavdeep Parhar cong_drop = 0; 3889fb8886bSNavdeep Parhar } 38982eff304SNavdeep Parhar 39082eff304SNavdeep Parhar extfree_refs = counter_u64_alloc(M_WAITOK); 39182eff304SNavdeep Parhar extfree_rels = counter_u64_alloc(M_WAITOK); 39282eff304SNavdeep Parhar counter_u64_zero(extfree_refs); 39382eff304SNavdeep Parhar counter_u64_zero(extfree_rels); 394671bf2b8SNavdeep Parhar 395671bf2b8SNavdeep Parhar t4_an_handler = an_not_handled; 396671bf2b8SNavdeep Parhar for (i = 0; i < nitems(t4_fw_msg_handler); i++) 397671bf2b8SNavdeep Parhar t4_fw_msg_handler[i] = fw_msg_not_handled; 398671bf2b8SNavdeep Parhar for (i = 0; i < nitems(t4_cpl_handler); i++) 399671bf2b8SNavdeep Parhar t4_cpl_handler[i] = cpl_not_handled; 400671bf2b8SNavdeep Parhar 401671bf2b8SNavdeep Parhar t4_register_cpl_handler(CPL_FW4_MSG, handle_fw_msg); 402671bf2b8SNavdeep Parhar t4_register_cpl_handler(CPL_FW6_MSG, handle_fw_msg); 403671bf2b8SNavdeep Parhar t4_register_cpl_handler(CPL_SGE_EGR_UPDATE, handle_sge_egr_update); 404671bf2b8SNavdeep Parhar t4_register_cpl_handler(CPL_RX_PKT, t4_eth_rx); 405671bf2b8SNavdeep Parhar t4_register_fw_msg_handler(FW6_TYPE_CMD_RPL, t4_handle_fw_rpl); 406069af0ebSJohn Baldwin t4_register_fw_msg_handler(FW6_TYPE_WRERR_RPL, t4_handle_wrerr_rpl); 40782eff304SNavdeep Parhar } 40882eff304SNavdeep Parhar 40982eff304SNavdeep Parhar void 41082eff304SNavdeep Parhar t4_sge_modunload(void) 41182eff304SNavdeep Parhar { 41282eff304SNavdeep Parhar 41382eff304SNavdeep Parhar counter_u64_free(extfree_refs); 41482eff304SNavdeep Parhar counter_u64_free(extfree_rels); 41582eff304SNavdeep Parhar } 41682eff304SNavdeep Parhar 41782eff304SNavdeep Parhar uint64_t 41882eff304SNavdeep Parhar t4_sge_extfree_refs(void) 41982eff304SNavdeep Parhar { 42082eff304SNavdeep Parhar uint64_t refs, rels; 42182eff304SNavdeep Parhar 42282eff304SNavdeep Parhar rels = counter_u64_fetch(extfree_rels); 42382eff304SNavdeep Parhar refs = counter_u64_fetch(extfree_refs); 42482eff304SNavdeep Parhar 42582eff304SNavdeep Parhar return (refs - rels); 42694586193SNavdeep Parhar } 42794586193SNavdeep Parhar 428e3207e19SNavdeep Parhar static inline void 429e3207e19SNavdeep Parhar setup_pad_and_pack_boundaries(struct adapter *sc) 430e3207e19SNavdeep Parhar { 431e3207e19SNavdeep Parhar uint32_t v, m; 432e3207e19SNavdeep Parhar int pad, pack; 433e3207e19SNavdeep Parhar 434e3207e19SNavdeep Parhar pad = fl_pad; 435e3207e19SNavdeep Parhar if (fl_pad < 32 || fl_pad > 4096 || !powerof2(fl_pad)) { 436e3207e19SNavdeep Parhar /* 437e3207e19SNavdeep Parhar * If there is any chance that we might use buffer packing and 438e3207e19SNavdeep Parhar * the chip is a T4, then pick 64 as the pad/pack boundary. Set 439e3207e19SNavdeep Parhar * it to 32 in all other cases. 440e3207e19SNavdeep Parhar */ 441e3207e19SNavdeep Parhar pad = is_t4(sc) && buffer_packing ? 64 : 32; 442e3207e19SNavdeep Parhar 443e3207e19SNavdeep Parhar /* 444e3207e19SNavdeep Parhar * For fl_pad = 0 we'll still write a reasonable value to the 445e3207e19SNavdeep Parhar * register but all the freelists will opt out of padding. 446e3207e19SNavdeep Parhar * We'll complain here only if the user tried to set it to a 447e3207e19SNavdeep Parhar * value greater than 0 that was invalid. 448e3207e19SNavdeep Parhar */ 449e3207e19SNavdeep Parhar if (fl_pad > 0) { 450e3207e19SNavdeep Parhar device_printf(sc->dev, "Invalid hw.cxgbe.fl_pad value" 451e3207e19SNavdeep Parhar " (%d), using %d instead.\n", fl_pad, pad); 452e3207e19SNavdeep Parhar } 453e3207e19SNavdeep Parhar } 454e3207e19SNavdeep Parhar m = V_INGPADBOUNDARY(M_INGPADBOUNDARY); 455e3207e19SNavdeep Parhar v = V_INGPADBOUNDARY(ilog2(pad) - 5); 456e3207e19SNavdeep Parhar t4_set_reg_field(sc, A_SGE_CONTROL, m, v); 457e3207e19SNavdeep Parhar 458e3207e19SNavdeep Parhar if (is_t4(sc)) { 459e3207e19SNavdeep Parhar if (fl_pack != -1 && fl_pack != pad) { 460e3207e19SNavdeep Parhar /* Complain but carry on. */ 461e3207e19SNavdeep Parhar device_printf(sc->dev, "hw.cxgbe.fl_pack (%d) ignored," 462e3207e19SNavdeep Parhar " using %d instead.\n", fl_pack, pad); 463e3207e19SNavdeep Parhar } 464e3207e19SNavdeep Parhar return; 465e3207e19SNavdeep Parhar } 466e3207e19SNavdeep Parhar 467e3207e19SNavdeep Parhar pack = fl_pack; 468e3207e19SNavdeep Parhar if (fl_pack < 16 || fl_pack == 32 || fl_pack > 4096 || 469e3207e19SNavdeep Parhar !powerof2(fl_pack)) { 470e3207e19SNavdeep Parhar pack = max(sc->params.pci.mps, CACHE_LINE_SIZE); 471e3207e19SNavdeep Parhar MPASS(powerof2(pack)); 472e3207e19SNavdeep Parhar if (pack < 16) 473e3207e19SNavdeep Parhar pack = 16; 474e3207e19SNavdeep Parhar if (pack == 32) 475e3207e19SNavdeep Parhar pack = 64; 476e3207e19SNavdeep Parhar if (pack > 4096) 477e3207e19SNavdeep Parhar pack = 4096; 478e3207e19SNavdeep Parhar if (fl_pack != -1) { 479e3207e19SNavdeep Parhar device_printf(sc->dev, "Invalid hw.cxgbe.fl_pack value" 480e3207e19SNavdeep Parhar " (%d), using %d instead.\n", fl_pack, pack); 481e3207e19SNavdeep Parhar } 482e3207e19SNavdeep Parhar } 483e3207e19SNavdeep Parhar m = V_INGPACKBOUNDARY(M_INGPACKBOUNDARY); 484e3207e19SNavdeep Parhar if (pack == 16) 485e3207e19SNavdeep Parhar v = V_INGPACKBOUNDARY(0); 486e3207e19SNavdeep Parhar else 487e3207e19SNavdeep Parhar v = V_INGPACKBOUNDARY(ilog2(pack) - 5); 488e3207e19SNavdeep Parhar 489e3207e19SNavdeep Parhar MPASS(!is_t4(sc)); /* T4 doesn't have SGE_CONTROL2 */ 490e3207e19SNavdeep Parhar t4_set_reg_field(sc, A_SGE_CONTROL2, m, v); 491e3207e19SNavdeep Parhar } 492e3207e19SNavdeep Parhar 493cf738022SNavdeep Parhar /* 494cf738022SNavdeep Parhar * adap->params.vpd.cclk must be set up before this is called. 495cf738022SNavdeep Parhar */ 496d14b0ac1SNavdeep Parhar void 497d14b0ac1SNavdeep Parhar t4_tweak_chip_settings(struct adapter *sc) 498d14b0ac1SNavdeep Parhar { 499d14b0ac1SNavdeep Parhar int i; 500d14b0ac1SNavdeep Parhar uint32_t v, m; 501d14b0ac1SNavdeep Parhar int intr_timer[SGE_NTIMERS] = {1, 5, 10, 50, 100, 200}; 502cf738022SNavdeep Parhar int timer_max = M_TIMERVALUE0 * 1000 / sc->params.vpd.cclk; 503d14b0ac1SNavdeep Parhar int intr_pktcount[SGE_NCOUNTERS] = {1, 8, 16, 32}; /* 63 max */ 504d14b0ac1SNavdeep Parhar uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE); 50538035ed6SNavdeep Parhar static int sge_flbuf_sizes[] = { 5061458bff9SNavdeep Parhar MCLBYTES, 5071458bff9SNavdeep Parhar #if MJUMPAGESIZE != MCLBYTES 5081458bff9SNavdeep Parhar MJUMPAGESIZE, 50938035ed6SNavdeep Parhar MJUMPAGESIZE - CL_METADATA_SIZE, 51038035ed6SNavdeep Parhar MJUMPAGESIZE - 2 * MSIZE - CL_METADATA_SIZE, 5111458bff9SNavdeep Parhar #endif 5121458bff9SNavdeep Parhar MJUM9BYTES, 5131458bff9SNavdeep Parhar MJUM16BYTES, 51438035ed6SNavdeep Parhar MCLBYTES - MSIZE - CL_METADATA_SIZE, 51538035ed6SNavdeep Parhar MJUM9BYTES - CL_METADATA_SIZE, 51638035ed6SNavdeep Parhar MJUM16BYTES - CL_METADATA_SIZE, 5171458bff9SNavdeep Parhar }; 518d14b0ac1SNavdeep Parhar 519d14b0ac1SNavdeep Parhar KASSERT(sc->flags & MASTER_PF, 520d14b0ac1SNavdeep Parhar ("%s: trying to change chip settings when not master.", __func__)); 521d14b0ac1SNavdeep Parhar 5221458bff9SNavdeep Parhar m = V_PKTSHIFT(M_PKTSHIFT) | F_RXPKTCPLMODE | F_EGRSTATUSPAGESIZE; 523d14b0ac1SNavdeep Parhar v = V_PKTSHIFT(fl_pktshift) | F_RXPKTCPLMODE | 5244defc81bSNavdeep Parhar V_EGRSTATUSPAGESIZE(spg_len == 128); 525d14b0ac1SNavdeep Parhar t4_set_reg_field(sc, A_SGE_CONTROL, m, v); 52654e4ee71SNavdeep Parhar 527e3207e19SNavdeep Parhar setup_pad_and_pack_boundaries(sc); 5281458bff9SNavdeep Parhar 529d14b0ac1SNavdeep Parhar v = V_HOSTPAGESIZEPF0(PAGE_SHIFT - 10) | 530733b9277SNavdeep Parhar V_HOSTPAGESIZEPF1(PAGE_SHIFT - 10) | 531733b9277SNavdeep Parhar V_HOSTPAGESIZEPF2(PAGE_SHIFT - 10) | 532733b9277SNavdeep Parhar V_HOSTPAGESIZEPF3(PAGE_SHIFT - 10) | 533733b9277SNavdeep Parhar V_HOSTPAGESIZEPF4(PAGE_SHIFT - 10) | 534733b9277SNavdeep Parhar V_HOSTPAGESIZEPF5(PAGE_SHIFT - 10) | 535733b9277SNavdeep Parhar V_HOSTPAGESIZEPF6(PAGE_SHIFT - 10) | 536733b9277SNavdeep Parhar V_HOSTPAGESIZEPF7(PAGE_SHIFT - 10); 537d14b0ac1SNavdeep Parhar t4_write_reg(sc, A_SGE_HOST_PAGE_SIZE, v); 538733b9277SNavdeep Parhar 53938035ed6SNavdeep Parhar KASSERT(nitems(sge_flbuf_sizes) <= SGE_FLBUF_SIZES, 54038035ed6SNavdeep Parhar ("%s: hw buffer size table too big", __func__)); 54138035ed6SNavdeep Parhar for (i = 0; i < min(nitems(sge_flbuf_sizes), SGE_FLBUF_SIZES); i++) { 54254e4ee71SNavdeep Parhar t4_write_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i), 54338035ed6SNavdeep Parhar sge_flbuf_sizes[i]); 54454e4ee71SNavdeep Parhar } 54554e4ee71SNavdeep Parhar 546d14b0ac1SNavdeep Parhar v = V_THRESHOLD_0(intr_pktcount[0]) | V_THRESHOLD_1(intr_pktcount[1]) | 547d14b0ac1SNavdeep Parhar V_THRESHOLD_2(intr_pktcount[2]) | V_THRESHOLD_3(intr_pktcount[3]); 548d14b0ac1SNavdeep Parhar t4_write_reg(sc, A_SGE_INGRESS_RX_THRESHOLD, v); 54954e4ee71SNavdeep Parhar 550cf738022SNavdeep Parhar KASSERT(intr_timer[0] <= timer_max, 551cf738022SNavdeep Parhar ("%s: not a single usable timer (%d, %d)", __func__, intr_timer[0], 552cf738022SNavdeep Parhar timer_max)); 553cf738022SNavdeep Parhar for (i = 1; i < nitems(intr_timer); i++) { 554cf738022SNavdeep Parhar KASSERT(intr_timer[i] >= intr_timer[i - 1], 555cf738022SNavdeep Parhar ("%s: timers not listed in increasing order (%d)", 556cf738022SNavdeep Parhar __func__, i)); 557cf738022SNavdeep Parhar 558cf738022SNavdeep Parhar while (intr_timer[i] > timer_max) { 559cf738022SNavdeep Parhar if (i == nitems(intr_timer) - 1) { 560cf738022SNavdeep Parhar intr_timer[i] = timer_max; 561cf738022SNavdeep Parhar break; 562cf738022SNavdeep Parhar } 563cf738022SNavdeep Parhar intr_timer[i] += intr_timer[i - 1]; 564cf738022SNavdeep Parhar intr_timer[i] /= 2; 565cf738022SNavdeep Parhar } 566cf738022SNavdeep Parhar } 567cf738022SNavdeep Parhar 568d14b0ac1SNavdeep Parhar v = V_TIMERVALUE0(us_to_core_ticks(sc, intr_timer[0])) | 569d14b0ac1SNavdeep Parhar V_TIMERVALUE1(us_to_core_ticks(sc, intr_timer[1])); 570d14b0ac1SNavdeep Parhar t4_write_reg(sc, A_SGE_TIMER_VALUE_0_AND_1, v); 571d14b0ac1SNavdeep Parhar v = V_TIMERVALUE2(us_to_core_ticks(sc, intr_timer[2])) | 572d14b0ac1SNavdeep Parhar V_TIMERVALUE3(us_to_core_ticks(sc, intr_timer[3])); 573d14b0ac1SNavdeep Parhar t4_write_reg(sc, A_SGE_TIMER_VALUE_2_AND_3, v); 574d14b0ac1SNavdeep Parhar v = V_TIMERVALUE4(us_to_core_ticks(sc, intr_timer[4])) | 575d14b0ac1SNavdeep Parhar V_TIMERVALUE5(us_to_core_ticks(sc, intr_timer[5])); 576d14b0ac1SNavdeep Parhar t4_write_reg(sc, A_SGE_TIMER_VALUE_4_AND_5, v); 57786e02bf2SNavdeep Parhar 578d14b0ac1SNavdeep Parhar /* 4K, 16K, 64K, 256K DDP "page sizes" */ 579d14b0ac1SNavdeep Parhar v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6); 580d14b0ac1SNavdeep Parhar t4_write_reg(sc, A_ULP_RX_TDDP_PSZ, v); 581d14b0ac1SNavdeep Parhar 582d14b0ac1SNavdeep Parhar m = v = F_TDDPTAGTCB; 583d14b0ac1SNavdeep Parhar t4_set_reg_field(sc, A_ULP_RX_CTL, m, v); 584d14b0ac1SNavdeep Parhar 585d14b0ac1SNavdeep Parhar m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET | 586d14b0ac1SNavdeep Parhar F_RESETDDPOFFSET; 587d14b0ac1SNavdeep Parhar v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET; 588d14b0ac1SNavdeep Parhar t4_set_reg_field(sc, A_TP_PARA_REG5, m, v); 589d14b0ac1SNavdeep Parhar } 590d14b0ac1SNavdeep Parhar 591d14b0ac1SNavdeep Parhar /* 592e3207e19SNavdeep Parhar * SGE wants the buffer to be at least 64B and then a multiple of 16. If 5938f6690d3SJohn Baldwin * padding is in use, the buffer's start and end need to be aligned to the pad 594b741402cSNavdeep Parhar * boundary as well. We'll just make sure that the size is a multiple of the 595b741402cSNavdeep Parhar * boundary here, it is up to the buffer allocation code to make sure the start 596b741402cSNavdeep Parhar * of the buffer is aligned as well. 59738035ed6SNavdeep Parhar */ 59838035ed6SNavdeep Parhar static inline int 599e3207e19SNavdeep Parhar hwsz_ok(struct adapter *sc, int hwsz) 60038035ed6SNavdeep Parhar { 60190e7434aSNavdeep Parhar int mask = fl_pad ? sc->params.sge.pad_boundary - 1 : 16 - 1; 60238035ed6SNavdeep Parhar 603b741402cSNavdeep Parhar return (hwsz >= 64 && (hwsz & mask) == 0); 60438035ed6SNavdeep Parhar } 60538035ed6SNavdeep Parhar 60638035ed6SNavdeep Parhar /* 607d14b0ac1SNavdeep Parhar * XXX: driver really should be able to deal with unexpected settings. 608d14b0ac1SNavdeep Parhar */ 609d14b0ac1SNavdeep Parhar int 610d14b0ac1SNavdeep Parhar t4_read_chip_settings(struct adapter *sc) 611d14b0ac1SNavdeep Parhar { 612d14b0ac1SNavdeep Parhar struct sge *s = &sc->sge; 61390e7434aSNavdeep Parhar struct sge_params *sp = &sc->params.sge; 6141458bff9SNavdeep Parhar int i, j, n, rc = 0; 615d14b0ac1SNavdeep Parhar uint32_t m, v, r; 616d14b0ac1SNavdeep Parhar uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE); 61738035ed6SNavdeep Parhar static int sw_buf_sizes[] = { /* Sorted by size */ 6181458bff9SNavdeep Parhar MCLBYTES, 6191458bff9SNavdeep Parhar #if MJUMPAGESIZE != MCLBYTES 6201458bff9SNavdeep Parhar MJUMPAGESIZE, 6211458bff9SNavdeep Parhar #endif 6221458bff9SNavdeep Parhar MJUM9BYTES, 6231458bff9SNavdeep Parhar MJUM16BYTES 6241458bff9SNavdeep Parhar }; 62538035ed6SNavdeep Parhar struct sw_zone_info *swz, *safe_swz; 62638035ed6SNavdeep Parhar struct hw_buf_info *hwb; 627d14b0ac1SNavdeep Parhar 62890e7434aSNavdeep Parhar t4_init_sge_params(sc); 62990e7434aSNavdeep Parhar 63090e7434aSNavdeep Parhar m = F_RXPKTCPLMODE; 63190e7434aSNavdeep Parhar v = F_RXPKTCPLMODE; 632d14b0ac1SNavdeep Parhar r = t4_read_reg(sc, A_SGE_CONTROL); 633d14b0ac1SNavdeep Parhar if ((r & m) != v) { 634d14b0ac1SNavdeep Parhar device_printf(sc->dev, "invalid SGE_CONTROL(0x%x)\n", r); 635733b9277SNavdeep Parhar rc = EINVAL; 636733b9277SNavdeep Parhar } 637733b9277SNavdeep Parhar 63890e7434aSNavdeep Parhar /* 63990e7434aSNavdeep Parhar * If this changes then every single use of PAGE_SHIFT in the driver 64090e7434aSNavdeep Parhar * needs to be carefully reviewed for PAGE_SHIFT vs sp->page_shift. 64190e7434aSNavdeep Parhar */ 64290e7434aSNavdeep Parhar if (sp->page_shift != PAGE_SHIFT) { 643d14b0ac1SNavdeep Parhar device_printf(sc->dev, "invalid SGE_HOST_PAGE_SIZE(0x%x)\n", r); 644733b9277SNavdeep Parhar rc = EINVAL; 645733b9277SNavdeep Parhar } 646733b9277SNavdeep Parhar 64738035ed6SNavdeep Parhar /* Filter out unusable hw buffer sizes entirely (mark with -2). */ 64838035ed6SNavdeep Parhar hwb = &s->hw_buf_info[0]; 64938035ed6SNavdeep Parhar for (i = 0; i < nitems(s->hw_buf_info); i++, hwb++) { 6501458bff9SNavdeep Parhar r = t4_read_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i)); 65138035ed6SNavdeep Parhar hwb->size = r; 652e3207e19SNavdeep Parhar hwb->zidx = hwsz_ok(sc, r) ? -1 : -2; 65338035ed6SNavdeep Parhar hwb->next = -1; 6541458bff9SNavdeep Parhar } 65538035ed6SNavdeep Parhar 65638035ed6SNavdeep Parhar /* 65738035ed6SNavdeep Parhar * Create a sorted list in decreasing order of hw buffer sizes (and so 65838035ed6SNavdeep Parhar * increasing order of spare area) for each software zone. 659e3207e19SNavdeep Parhar * 660e3207e19SNavdeep Parhar * If padding is enabled then the start and end of the buffer must align 661e3207e19SNavdeep Parhar * to the pad boundary; if packing is enabled then they must align with 662e3207e19SNavdeep Parhar * the pack boundary as well. Allocations from the cluster zones are 663e3207e19SNavdeep Parhar * aligned to min(size, 4K), so the buffer starts at that alignment and 664e3207e19SNavdeep Parhar * ends at hwb->size alignment. If mbuf inlining is allowed the 665e3207e19SNavdeep Parhar * starting alignment will be reduced to MSIZE and the driver will 666e3207e19SNavdeep Parhar * exercise appropriate caution when deciding on the best buffer layout 667e3207e19SNavdeep Parhar * to use. 66838035ed6SNavdeep Parhar */ 66938035ed6SNavdeep Parhar n = 0; /* no usable buffer size to begin with */ 67038035ed6SNavdeep Parhar swz = &s->sw_zone_info[0]; 67138035ed6SNavdeep Parhar safe_swz = NULL; 67238035ed6SNavdeep Parhar for (i = 0; i < SW_ZONE_SIZES; i++, swz++) { 67338035ed6SNavdeep Parhar int8_t head = -1, tail = -1; 67438035ed6SNavdeep Parhar 67538035ed6SNavdeep Parhar swz->size = sw_buf_sizes[i]; 67638035ed6SNavdeep Parhar swz->zone = m_getzone(swz->size); 67738035ed6SNavdeep Parhar swz->type = m_gettype(swz->size); 67838035ed6SNavdeep Parhar 679e3207e19SNavdeep Parhar if (swz->size < PAGE_SIZE) { 680e3207e19SNavdeep Parhar MPASS(powerof2(swz->size)); 68190e7434aSNavdeep Parhar if (fl_pad && (swz->size % sp->pad_boundary != 0)) 682e3207e19SNavdeep Parhar continue; 683e3207e19SNavdeep Parhar } 684e3207e19SNavdeep Parhar 68538035ed6SNavdeep Parhar if (swz->size == safest_rx_cluster) 68638035ed6SNavdeep Parhar safe_swz = swz; 68738035ed6SNavdeep Parhar 68838035ed6SNavdeep Parhar hwb = &s->hw_buf_info[0]; 68938035ed6SNavdeep Parhar for (j = 0; j < SGE_FLBUF_SIZES; j++, hwb++) { 69038035ed6SNavdeep Parhar if (hwb->zidx != -1 || hwb->size > swz->size) 6911458bff9SNavdeep Parhar continue; 692e3207e19SNavdeep Parhar #ifdef INVARIANTS 693e3207e19SNavdeep Parhar if (fl_pad) 69490e7434aSNavdeep Parhar MPASS(hwb->size % sp->pad_boundary == 0); 695e3207e19SNavdeep Parhar #endif 69638035ed6SNavdeep Parhar hwb->zidx = i; 69738035ed6SNavdeep Parhar if (head == -1) 69838035ed6SNavdeep Parhar head = tail = j; 69938035ed6SNavdeep Parhar else if (hwb->size < s->hw_buf_info[tail].size) { 70038035ed6SNavdeep Parhar s->hw_buf_info[tail].next = j; 70138035ed6SNavdeep Parhar tail = j; 70238035ed6SNavdeep Parhar } else { 70338035ed6SNavdeep Parhar int8_t *cur; 70438035ed6SNavdeep Parhar struct hw_buf_info *t; 70538035ed6SNavdeep Parhar 70638035ed6SNavdeep Parhar for (cur = &head; *cur != -1; cur = &t->next) { 70738035ed6SNavdeep Parhar t = &s->hw_buf_info[*cur]; 70838035ed6SNavdeep Parhar if (hwb->size == t->size) { 70938035ed6SNavdeep Parhar hwb->zidx = -2; 7101458bff9SNavdeep Parhar break; 7111458bff9SNavdeep Parhar } 71238035ed6SNavdeep Parhar if (hwb->size > t->size) { 71338035ed6SNavdeep Parhar hwb->next = *cur; 71438035ed6SNavdeep Parhar *cur = j; 71538035ed6SNavdeep Parhar break; 71638035ed6SNavdeep Parhar } 71738035ed6SNavdeep Parhar } 71838035ed6SNavdeep Parhar } 71938035ed6SNavdeep Parhar } 72038035ed6SNavdeep Parhar swz->head_hwidx = head; 72138035ed6SNavdeep Parhar swz->tail_hwidx = tail; 72238035ed6SNavdeep Parhar 72338035ed6SNavdeep Parhar if (tail != -1) { 72438035ed6SNavdeep Parhar n++; 72538035ed6SNavdeep Parhar if (swz->size - s->hw_buf_info[tail].size >= 72638035ed6SNavdeep Parhar CL_METADATA_SIZE) 72738035ed6SNavdeep Parhar sc->flags |= BUF_PACKING_OK; 72838035ed6SNavdeep Parhar } 7291458bff9SNavdeep Parhar } 7301458bff9SNavdeep Parhar if (n == 0) { 7311458bff9SNavdeep Parhar device_printf(sc->dev, "no usable SGE FL buffer size.\n"); 7321458bff9SNavdeep Parhar rc = EINVAL; 733733b9277SNavdeep Parhar } 73438035ed6SNavdeep Parhar 73538035ed6SNavdeep Parhar s->safe_hwidx1 = -1; 73638035ed6SNavdeep Parhar s->safe_hwidx2 = -1; 73738035ed6SNavdeep Parhar if (safe_swz != NULL) { 73838035ed6SNavdeep Parhar s->safe_hwidx1 = safe_swz->head_hwidx; 73938035ed6SNavdeep Parhar for (i = safe_swz->head_hwidx; i != -1; i = hwb->next) { 74038035ed6SNavdeep Parhar int spare; 74138035ed6SNavdeep Parhar 74238035ed6SNavdeep Parhar hwb = &s->hw_buf_info[i]; 743e3207e19SNavdeep Parhar #ifdef INVARIANTS 744e3207e19SNavdeep Parhar if (fl_pad) 74590e7434aSNavdeep Parhar MPASS(hwb->size % sp->pad_boundary == 0); 746e3207e19SNavdeep Parhar #endif 74738035ed6SNavdeep Parhar spare = safe_swz->size - hwb->size; 748e3207e19SNavdeep Parhar if (spare >= CL_METADATA_SIZE) { 74938035ed6SNavdeep Parhar s->safe_hwidx2 = i; 75038035ed6SNavdeep Parhar break; 75138035ed6SNavdeep Parhar } 75238035ed6SNavdeep Parhar } 753e3207e19SNavdeep Parhar } 754733b9277SNavdeep Parhar 755d14b0ac1SNavdeep Parhar v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6); 756d14b0ac1SNavdeep Parhar r = t4_read_reg(sc, A_ULP_RX_TDDP_PSZ); 757d14b0ac1SNavdeep Parhar if (r != v) { 758d14b0ac1SNavdeep Parhar device_printf(sc->dev, "invalid ULP_RX_TDDP_PSZ(0x%x)\n", r); 759d14b0ac1SNavdeep Parhar rc = EINVAL; 760d14b0ac1SNavdeep Parhar } 761733b9277SNavdeep Parhar 762d14b0ac1SNavdeep Parhar m = v = F_TDDPTAGTCB; 763d14b0ac1SNavdeep Parhar r = t4_read_reg(sc, A_ULP_RX_CTL); 764d14b0ac1SNavdeep Parhar if ((r & m) != v) { 765d14b0ac1SNavdeep Parhar device_printf(sc->dev, "invalid ULP_RX_CTL(0x%x)\n", r); 766d14b0ac1SNavdeep Parhar rc = EINVAL; 767d14b0ac1SNavdeep Parhar } 768d14b0ac1SNavdeep Parhar 769d14b0ac1SNavdeep Parhar m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET | 770d14b0ac1SNavdeep Parhar F_RESETDDPOFFSET; 771d14b0ac1SNavdeep Parhar v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET; 772d14b0ac1SNavdeep Parhar r = t4_read_reg(sc, A_TP_PARA_REG5); 773d14b0ac1SNavdeep Parhar if ((r & m) != v) { 774d14b0ac1SNavdeep Parhar device_printf(sc->dev, "invalid TP_PARA_REG5(0x%x)\n", r); 775d14b0ac1SNavdeep Parhar rc = EINVAL; 776d14b0ac1SNavdeep Parhar } 777d14b0ac1SNavdeep Parhar 778c337fa30SNavdeep Parhar t4_init_tp_params(sc); 779d14b0ac1SNavdeep Parhar 780d14b0ac1SNavdeep Parhar t4_read_mtu_tbl(sc, sc->params.mtus, NULL); 781d14b0ac1SNavdeep Parhar t4_load_mtus(sc, sc->params.mtus, sc->params.a_wnd, sc->params.b_wnd); 782d14b0ac1SNavdeep Parhar 783733b9277SNavdeep Parhar return (rc); 78454e4ee71SNavdeep Parhar } 78554e4ee71SNavdeep Parhar 78654e4ee71SNavdeep Parhar int 78754e4ee71SNavdeep Parhar t4_create_dma_tag(struct adapter *sc) 78854e4ee71SNavdeep Parhar { 78954e4ee71SNavdeep Parhar int rc; 79054e4ee71SNavdeep Parhar 79154e4ee71SNavdeep Parhar rc = bus_dma_tag_create(bus_get_dma_tag(sc->dev), 1, 0, 79254e4ee71SNavdeep Parhar BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE, 79354e4ee71SNavdeep Parhar BUS_SPACE_UNRESTRICTED, BUS_SPACE_MAXSIZE, BUS_DMA_ALLOCNOW, NULL, 79454e4ee71SNavdeep Parhar NULL, &sc->dmat); 79554e4ee71SNavdeep Parhar if (rc != 0) { 79654e4ee71SNavdeep Parhar device_printf(sc->dev, 79754e4ee71SNavdeep Parhar "failed to create main DMA tag: %d\n", rc); 79854e4ee71SNavdeep Parhar } 79954e4ee71SNavdeep Parhar 80054e4ee71SNavdeep Parhar return (rc); 80154e4ee71SNavdeep Parhar } 80254e4ee71SNavdeep Parhar 8036e22f9f3SNavdeep Parhar void 8046e22f9f3SNavdeep Parhar t4_sge_sysctls(struct adapter *sc, struct sysctl_ctx_list *ctx, 8056e22f9f3SNavdeep Parhar struct sysctl_oid_list *children) 8066e22f9f3SNavdeep Parhar { 80790e7434aSNavdeep Parhar struct sge_params *sp = &sc->params.sge; 8086e22f9f3SNavdeep Parhar 80938035ed6SNavdeep Parhar SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "buffer_sizes", 81038035ed6SNavdeep Parhar CTLTYPE_STRING | CTLFLAG_RD, &sc->sge, 0, sysctl_bufsizes, "A", 81138035ed6SNavdeep Parhar "freelist buffer sizes"); 81238035ed6SNavdeep Parhar 8136e22f9f3SNavdeep Parhar SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pktshift", CTLFLAG_RD, 81490e7434aSNavdeep Parhar NULL, sp->fl_pktshift, "payload DMA offset in rx buffer (bytes)"); 8156e22f9f3SNavdeep Parhar 8166e22f9f3SNavdeep Parhar SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pad", CTLFLAG_RD, 81790e7434aSNavdeep Parhar NULL, sp->pad_boundary, "payload pad boundary (bytes)"); 8186e22f9f3SNavdeep Parhar 8196e22f9f3SNavdeep Parhar SYSCTL_ADD_INT(ctx, children, OID_AUTO, "spg_len", CTLFLAG_RD, 82090e7434aSNavdeep Parhar NULL, sp->spg_len, "status page size (bytes)"); 8216e22f9f3SNavdeep Parhar 8226e22f9f3SNavdeep Parhar SYSCTL_ADD_INT(ctx, children, OID_AUTO, "cong_drop", CTLFLAG_RD, 8236e22f9f3SNavdeep Parhar NULL, cong_drop, "congestion drop setting"); 8241458bff9SNavdeep Parhar 8251458bff9SNavdeep Parhar SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pack", CTLFLAG_RD, 82690e7434aSNavdeep Parhar NULL, sp->pack_boundary, "payload pack boundary (bytes)"); 8276e22f9f3SNavdeep Parhar } 8286e22f9f3SNavdeep Parhar 82954e4ee71SNavdeep Parhar int 83054e4ee71SNavdeep Parhar t4_destroy_dma_tag(struct adapter *sc) 83154e4ee71SNavdeep Parhar { 83254e4ee71SNavdeep Parhar if (sc->dmat) 83354e4ee71SNavdeep Parhar bus_dma_tag_destroy(sc->dmat); 83454e4ee71SNavdeep Parhar 83554e4ee71SNavdeep Parhar return (0); 83654e4ee71SNavdeep Parhar } 83754e4ee71SNavdeep Parhar 83854e4ee71SNavdeep Parhar /* 839733b9277SNavdeep Parhar * Allocate and initialize the firmware event queue and the management queue. 84054e4ee71SNavdeep Parhar * 84154e4ee71SNavdeep Parhar * Returns errno on failure. Resources allocated up to that point may still be 84254e4ee71SNavdeep Parhar * allocated. Caller is responsible for cleanup in case this function fails. 84354e4ee71SNavdeep Parhar */ 84454e4ee71SNavdeep Parhar int 845f7dfe243SNavdeep Parhar t4_setup_adapter_queues(struct adapter *sc) 84654e4ee71SNavdeep Parhar { 847733b9277SNavdeep Parhar int rc; 84854e4ee71SNavdeep Parhar 84954e4ee71SNavdeep Parhar ADAPTER_LOCK_ASSERT_NOTOWNED(sc); 85054e4ee71SNavdeep Parhar 851733b9277SNavdeep Parhar sysctl_ctx_init(&sc->ctx); 852733b9277SNavdeep Parhar sc->flags |= ADAP_SYSCTL_CTX; 85354e4ee71SNavdeep Parhar 85456599263SNavdeep Parhar /* 85556599263SNavdeep Parhar * Firmware event queue 85656599263SNavdeep Parhar */ 857733b9277SNavdeep Parhar rc = alloc_fwq(sc); 858aa95b653SNavdeep Parhar if (rc != 0) 859f7dfe243SNavdeep Parhar return (rc); 860f7dfe243SNavdeep Parhar 861f7dfe243SNavdeep Parhar /* 862733b9277SNavdeep Parhar * Management queue. This is just a control queue that uses the fwq as 863733b9277SNavdeep Parhar * its associated iq. 864f7dfe243SNavdeep Parhar */ 865733b9277SNavdeep Parhar rc = alloc_mgmtq(sc); 86654e4ee71SNavdeep Parhar 86754e4ee71SNavdeep Parhar return (rc); 86854e4ee71SNavdeep Parhar } 86954e4ee71SNavdeep Parhar 87054e4ee71SNavdeep Parhar /* 87154e4ee71SNavdeep Parhar * Idempotent 87254e4ee71SNavdeep Parhar */ 87354e4ee71SNavdeep Parhar int 874f7dfe243SNavdeep Parhar t4_teardown_adapter_queues(struct adapter *sc) 87554e4ee71SNavdeep Parhar { 87654e4ee71SNavdeep Parhar 87754e4ee71SNavdeep Parhar ADAPTER_LOCK_ASSERT_NOTOWNED(sc); 87854e4ee71SNavdeep Parhar 879733b9277SNavdeep Parhar /* Do this before freeing the queue */ 880733b9277SNavdeep Parhar if (sc->flags & ADAP_SYSCTL_CTX) { 881f7dfe243SNavdeep Parhar sysctl_ctx_free(&sc->ctx); 882733b9277SNavdeep Parhar sc->flags &= ~ADAP_SYSCTL_CTX; 883f7dfe243SNavdeep Parhar } 884f7dfe243SNavdeep Parhar 885733b9277SNavdeep Parhar free_mgmtq(sc); 886733b9277SNavdeep Parhar free_fwq(sc); 88754e4ee71SNavdeep Parhar 88854e4ee71SNavdeep Parhar return (0); 88954e4ee71SNavdeep Parhar } 89054e4ee71SNavdeep Parhar 891733b9277SNavdeep Parhar static inline int 892fe2ebb76SJohn Baldwin first_vector(struct vi_info *vi) 893298d969cSNavdeep Parhar { 894fe2ebb76SJohn Baldwin struct adapter *sc = vi->pi->adapter; 89554e4ee71SNavdeep Parhar 896733b9277SNavdeep Parhar if (sc->intr_count == 1) 897733b9277SNavdeep Parhar return (0); 89854e4ee71SNavdeep Parhar 899fe2ebb76SJohn Baldwin return (vi->first_intr); 900733b9277SNavdeep Parhar } 901733b9277SNavdeep Parhar 902733b9277SNavdeep Parhar /* 903733b9277SNavdeep Parhar * Given an arbitrary "index," come up with an iq that can be used by other 904fe2ebb76SJohn Baldwin * queues (of this VI) for interrupt forwarding, SGE egress updates, etc. 905733b9277SNavdeep Parhar * The iq returned is guaranteed to be something that takes direct interrupts. 906733b9277SNavdeep Parhar */ 907733b9277SNavdeep Parhar static struct sge_iq * 908fe2ebb76SJohn Baldwin vi_intr_iq(struct vi_info *vi, int idx) 909733b9277SNavdeep Parhar { 910fe2ebb76SJohn Baldwin struct adapter *sc = vi->pi->adapter; 911733b9277SNavdeep Parhar struct sge *s = &sc->sge; 912733b9277SNavdeep Parhar struct sge_iq *iq = NULL; 913298d969cSNavdeep Parhar int nintr, i; 914733b9277SNavdeep Parhar 915733b9277SNavdeep Parhar if (sc->intr_count == 1) 916733b9277SNavdeep Parhar return (&sc->sge.fwq); 917733b9277SNavdeep Parhar 918fe2ebb76SJohn Baldwin nintr = vi->nintr; 919298d969cSNavdeep Parhar KASSERT(nintr != 0, 920fe2ebb76SJohn Baldwin ("%s: vi %p has no exclusive interrupts, total interrupts = %d", 921fe2ebb76SJohn Baldwin __func__, vi, sc->intr_count)); 922298d969cSNavdeep Parhar i = idx % nintr; 923733b9277SNavdeep Parhar 924fe2ebb76SJohn Baldwin if (vi->flags & INTR_RXQ) { 925fe2ebb76SJohn Baldwin if (i < vi->nrxq) { 926fe2ebb76SJohn Baldwin iq = &s->rxq[vi->first_rxq + i].iq; 927298d969cSNavdeep Parhar goto done; 928298d969cSNavdeep Parhar } 929fe2ebb76SJohn Baldwin i -= vi->nrxq; 930298d969cSNavdeep Parhar } 931298d969cSNavdeep Parhar #ifdef TCP_OFFLOAD 932fe2ebb76SJohn Baldwin if (vi->flags & INTR_OFLD_RXQ) { 933fe2ebb76SJohn Baldwin if (i < vi->nofldrxq) { 934fe2ebb76SJohn Baldwin iq = &s->ofld_rxq[vi->first_ofld_rxq + i].iq; 935298d969cSNavdeep Parhar goto done; 936298d969cSNavdeep Parhar } 937fe2ebb76SJohn Baldwin i -= vi->nofldrxq; 938298d969cSNavdeep Parhar } 939298d969cSNavdeep Parhar #endif 940fe2ebb76SJohn Baldwin panic("%s: vi %p, intr_flags 0x%lx, idx %d, total intr %d\n", __func__, 941fe2ebb76SJohn Baldwin vi, vi->flags & INTR_ALL, idx, nintr); 942298d969cSNavdeep Parhar done: 943298d969cSNavdeep Parhar MPASS(iq != NULL); 944298d969cSNavdeep Parhar KASSERT(iq->flags & IQ_INTR, 945fe2ebb76SJohn Baldwin ("%s: iq %p (vi %p, intr_flags 0x%lx, idx %d)", __func__, iq, vi, 946fe2ebb76SJohn Baldwin vi->flags & INTR_ALL, idx)); 947733b9277SNavdeep Parhar return (iq); 948733b9277SNavdeep Parhar } 949733b9277SNavdeep Parhar 95038035ed6SNavdeep Parhar /* Maximum payload that can be delivered with a single iq descriptor */ 9518340ece5SNavdeep Parhar static inline int 95238035ed6SNavdeep Parhar mtu_to_max_payload(struct adapter *sc, int mtu, const int toe) 9538340ece5SNavdeep Parhar { 95438035ed6SNavdeep Parhar int payload; 9558340ece5SNavdeep Parhar 9566eb3180fSNavdeep Parhar #ifdef TCP_OFFLOAD 95738035ed6SNavdeep Parhar if (toe) { 95838035ed6SNavdeep Parhar payload = sc->tt.rx_coalesce ? 95938035ed6SNavdeep Parhar G_RXCOALESCESIZE(t4_read_reg(sc, A_TP_PARA_REG2)) : mtu; 96038035ed6SNavdeep Parhar } else { 96138035ed6SNavdeep Parhar #endif 96238035ed6SNavdeep Parhar /* large enough even when hw VLAN extraction is disabled */ 96390e7434aSNavdeep Parhar payload = sc->params.sge.fl_pktshift + ETHER_HDR_LEN + 96490e7434aSNavdeep Parhar ETHER_VLAN_ENCAP_LEN + mtu; 96538035ed6SNavdeep Parhar #ifdef TCP_OFFLOAD 9666eb3180fSNavdeep Parhar } 9676eb3180fSNavdeep Parhar #endif 96838035ed6SNavdeep Parhar 96938035ed6SNavdeep Parhar return (payload); 97038035ed6SNavdeep Parhar } 9716eb3180fSNavdeep Parhar 972733b9277SNavdeep Parhar int 973fe2ebb76SJohn Baldwin t4_setup_vi_queues(struct vi_info *vi) 974733b9277SNavdeep Parhar { 975733b9277SNavdeep Parhar int rc = 0, i, j, intr_idx, iqid; 976733b9277SNavdeep Parhar struct sge_rxq *rxq; 977733b9277SNavdeep Parhar struct sge_txq *txq; 978733b9277SNavdeep Parhar struct sge_wrq *ctrlq; 97909fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 980733b9277SNavdeep Parhar struct sge_ofld_rxq *ofld_rxq; 981733b9277SNavdeep Parhar struct sge_wrq *ofld_txq; 982298d969cSNavdeep Parhar #endif 983298d969cSNavdeep Parhar #ifdef DEV_NETMAP 98462291463SNavdeep Parhar int saved_idx; 985298d969cSNavdeep Parhar struct sge_nm_rxq *nm_rxq; 986298d969cSNavdeep Parhar struct sge_nm_txq *nm_txq; 987733b9277SNavdeep Parhar #endif 988733b9277SNavdeep Parhar char name[16]; 989fe2ebb76SJohn Baldwin struct port_info *pi = vi->pi; 990733b9277SNavdeep Parhar struct adapter *sc = pi->adapter; 991fe2ebb76SJohn Baldwin struct ifnet *ifp = vi->ifp; 992fe2ebb76SJohn Baldwin struct sysctl_oid *oid = device_get_sysctl_tree(vi->dev); 993733b9277SNavdeep Parhar struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid); 994e3207e19SNavdeep Parhar int maxp, mtu = ifp->if_mtu; 995733b9277SNavdeep Parhar 996733b9277SNavdeep Parhar /* Interrupt vector to start from (when using multiple vectors) */ 997fe2ebb76SJohn Baldwin intr_idx = first_vector(vi); 998fe2ebb76SJohn Baldwin 999fe2ebb76SJohn Baldwin #ifdef DEV_NETMAP 100062291463SNavdeep Parhar saved_idx = intr_idx; 100162291463SNavdeep Parhar if (ifp->if_capabilities & IFCAP_NETMAP) { 100262291463SNavdeep Parhar 100362291463SNavdeep Parhar /* netmap is supported with direct interrupts only. */ 100462291463SNavdeep Parhar MPASS(vi->flags & INTR_RXQ); 100562291463SNavdeep Parhar 1006fe2ebb76SJohn Baldwin /* 1007fe2ebb76SJohn Baldwin * We don't have buffers to back the netmap rx queues 1008fe2ebb76SJohn Baldwin * right now so we create the queues in a way that 1009fe2ebb76SJohn Baldwin * doesn't set off any congestion signal in the chip. 1010fe2ebb76SJohn Baldwin */ 101162291463SNavdeep Parhar oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "nm_rxq", 1012fe2ebb76SJohn Baldwin CTLFLAG_RD, NULL, "rx queues"); 1013fe2ebb76SJohn Baldwin for_each_nm_rxq(vi, i, nm_rxq) { 1014fe2ebb76SJohn Baldwin rc = alloc_nm_rxq(vi, nm_rxq, intr_idx, i, oid); 1015fe2ebb76SJohn Baldwin if (rc != 0) 1016fe2ebb76SJohn Baldwin goto done; 1017fe2ebb76SJohn Baldwin intr_idx++; 1018fe2ebb76SJohn Baldwin } 1019fe2ebb76SJohn Baldwin 102062291463SNavdeep Parhar oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "nm_txq", 1021fe2ebb76SJohn Baldwin CTLFLAG_RD, NULL, "tx queues"); 1022fe2ebb76SJohn Baldwin for_each_nm_txq(vi, i, nm_txq) { 102362291463SNavdeep Parhar iqid = vi->first_nm_rxq + (i % vi->nnmrxq); 1024fe2ebb76SJohn Baldwin rc = alloc_nm_txq(vi, nm_txq, iqid, i, oid); 1025fe2ebb76SJohn Baldwin if (rc != 0) 1026fe2ebb76SJohn Baldwin goto done; 1027fe2ebb76SJohn Baldwin } 1028fe2ebb76SJohn Baldwin } 102962291463SNavdeep Parhar 103062291463SNavdeep Parhar /* Normal rx queues and netmap rx queues share the same interrupts. */ 103162291463SNavdeep Parhar intr_idx = saved_idx; 1032fe2ebb76SJohn Baldwin #endif 1033733b9277SNavdeep Parhar 1034733b9277SNavdeep Parhar /* 1035298d969cSNavdeep Parhar * First pass over all NIC and TOE rx queues: 1036733b9277SNavdeep Parhar * a) initialize iq and fl 1037733b9277SNavdeep Parhar * b) allocate queue iff it will take direct interrupts. 1038733b9277SNavdeep Parhar */ 103938035ed6SNavdeep Parhar maxp = mtu_to_max_payload(sc, mtu, 0); 1040fe2ebb76SJohn Baldwin if (vi->flags & INTR_RXQ) { 1041fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "rxq", 1042298d969cSNavdeep Parhar CTLFLAG_RD, NULL, "rx queues"); 1043298d969cSNavdeep Parhar } 1044fe2ebb76SJohn Baldwin for_each_rxq(vi, i, rxq) { 104554e4ee71SNavdeep Parhar 1046fe2ebb76SJohn Baldwin init_iq(&rxq->iq, sc, vi->tmr_idx, vi->pktc_idx, vi->qsize_rxq); 104754e4ee71SNavdeep Parhar 104854e4ee71SNavdeep Parhar snprintf(name, sizeof(name), "%s rxq%d-fl", 1049fe2ebb76SJohn Baldwin device_get_nameunit(vi->dev), i); 1050fe2ebb76SJohn Baldwin init_fl(sc, &rxq->fl, vi->qsize_rxq / 8, maxp, name); 105154e4ee71SNavdeep Parhar 1052fe2ebb76SJohn Baldwin if (vi->flags & INTR_RXQ) { 1053733b9277SNavdeep Parhar rxq->iq.flags |= IQ_INTR; 1054fe2ebb76SJohn Baldwin rc = alloc_rxq(vi, rxq, intr_idx, i, oid); 105554e4ee71SNavdeep Parhar if (rc != 0) 105654e4ee71SNavdeep Parhar goto done; 1057733b9277SNavdeep Parhar intr_idx++; 1058733b9277SNavdeep Parhar } 105954e4ee71SNavdeep Parhar } 106062291463SNavdeep Parhar #ifdef DEV_NETMAP 106162291463SNavdeep Parhar if (ifp->if_capabilities & IFCAP_NETMAP) 106262291463SNavdeep Parhar intr_idx = saved_idx + max(vi->nrxq, vi->nnmrxq); 106362291463SNavdeep Parhar #endif 106409fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 106538035ed6SNavdeep Parhar maxp = mtu_to_max_payload(sc, mtu, 1); 1066fe2ebb76SJohn Baldwin if (vi->flags & INTR_OFLD_RXQ) { 1067fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "ofld_rxq", 1068298d969cSNavdeep Parhar CTLFLAG_RD, NULL, 1069298d969cSNavdeep Parhar "rx queues for offloaded TCP connections"); 1070298d969cSNavdeep Parhar } 1071fe2ebb76SJohn Baldwin for_each_ofld_rxq(vi, i, ofld_rxq) { 1072733b9277SNavdeep Parhar 1073fe2ebb76SJohn Baldwin init_iq(&ofld_rxq->iq, sc, vi->tmr_idx, vi->pktc_idx, 1074fe2ebb76SJohn Baldwin vi->qsize_rxq); 1075733b9277SNavdeep Parhar 1076733b9277SNavdeep Parhar snprintf(name, sizeof(name), "%s ofld_rxq%d-fl", 1077fe2ebb76SJohn Baldwin device_get_nameunit(vi->dev), i); 1078fe2ebb76SJohn Baldwin init_fl(sc, &ofld_rxq->fl, vi->qsize_rxq / 8, maxp, name); 1079733b9277SNavdeep Parhar 1080fe2ebb76SJohn Baldwin if (vi->flags & INTR_OFLD_RXQ) { 1081733b9277SNavdeep Parhar ofld_rxq->iq.flags |= IQ_INTR; 1082fe2ebb76SJohn Baldwin rc = alloc_ofld_rxq(vi, ofld_rxq, intr_idx, i, oid); 1083733b9277SNavdeep Parhar if (rc != 0) 1084733b9277SNavdeep Parhar goto done; 1085733b9277SNavdeep Parhar intr_idx++; 1086733b9277SNavdeep Parhar } 1087733b9277SNavdeep Parhar } 1088733b9277SNavdeep Parhar #endif 1089733b9277SNavdeep Parhar 1090733b9277SNavdeep Parhar /* 1091298d969cSNavdeep Parhar * Second pass over all NIC and TOE rx queues. The queues forwarding 1092733b9277SNavdeep Parhar * their interrupts are allocated now. 1093733b9277SNavdeep Parhar */ 1094733b9277SNavdeep Parhar j = 0; 1095fe2ebb76SJohn Baldwin if (!(vi->flags & INTR_RXQ)) { 1096fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "rxq", 1097298d969cSNavdeep Parhar CTLFLAG_RD, NULL, "rx queues"); 1098fe2ebb76SJohn Baldwin for_each_rxq(vi, i, rxq) { 1099298d969cSNavdeep Parhar MPASS(!(rxq->iq.flags & IQ_INTR)); 1100733b9277SNavdeep Parhar 1101fe2ebb76SJohn Baldwin intr_idx = vi_intr_iq(vi, j)->abs_id; 1102733b9277SNavdeep Parhar 1103fe2ebb76SJohn Baldwin rc = alloc_rxq(vi, rxq, intr_idx, i, oid); 1104733b9277SNavdeep Parhar if (rc != 0) 1105733b9277SNavdeep Parhar goto done; 1106733b9277SNavdeep Parhar j++; 1107733b9277SNavdeep Parhar } 1108298d969cSNavdeep Parhar } 110909fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 1110fe2ebb76SJohn Baldwin if (vi->nofldrxq != 0 && !(vi->flags & INTR_OFLD_RXQ)) { 1111fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "ofld_rxq", 1112298d969cSNavdeep Parhar CTLFLAG_RD, NULL, 1113298d969cSNavdeep Parhar "rx queues for offloaded TCP connections"); 1114fe2ebb76SJohn Baldwin for_each_ofld_rxq(vi, i, ofld_rxq) { 1115298d969cSNavdeep Parhar MPASS(!(ofld_rxq->iq.flags & IQ_INTR)); 1116733b9277SNavdeep Parhar 1117fe2ebb76SJohn Baldwin intr_idx = vi_intr_iq(vi, j)->abs_id; 1118733b9277SNavdeep Parhar 1119fe2ebb76SJohn Baldwin rc = alloc_ofld_rxq(vi, ofld_rxq, intr_idx, i, oid); 1120733b9277SNavdeep Parhar if (rc != 0) 1121733b9277SNavdeep Parhar goto done; 1122733b9277SNavdeep Parhar j++; 1123733b9277SNavdeep Parhar } 1124298d969cSNavdeep Parhar } 1125298d969cSNavdeep Parhar #endif 1126733b9277SNavdeep Parhar 1127733b9277SNavdeep Parhar /* 1128733b9277SNavdeep Parhar * Now the tx queues. Only one pass needed. 1129733b9277SNavdeep Parhar */ 1130fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "txq", CTLFLAG_RD, 1131733b9277SNavdeep Parhar NULL, "tx queues"); 1132733b9277SNavdeep Parhar j = 0; 1133fe2ebb76SJohn Baldwin for_each_txq(vi, i, txq) { 1134fe2ebb76SJohn Baldwin iqid = vi_intr_iq(vi, j)->cntxt_id; 113554e4ee71SNavdeep Parhar snprintf(name, sizeof(name), "%s txq%d", 1136fe2ebb76SJohn Baldwin device_get_nameunit(vi->dev), i); 113790e7434aSNavdeep Parhar init_eq(sc, &txq->eq, EQ_ETH, vi->qsize_txq, pi->tx_chan, iqid, 1138733b9277SNavdeep Parhar name); 113954e4ee71SNavdeep Parhar 1140fe2ebb76SJohn Baldwin rc = alloc_txq(vi, txq, i, oid); 114154e4ee71SNavdeep Parhar if (rc != 0) 114254e4ee71SNavdeep Parhar goto done; 1143733b9277SNavdeep Parhar j++; 114454e4ee71SNavdeep Parhar } 114509fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 1146fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "ofld_txq", 1147733b9277SNavdeep Parhar CTLFLAG_RD, NULL, "tx queues for offloaded TCP connections"); 1148fe2ebb76SJohn Baldwin for_each_ofld_txq(vi, i, ofld_txq) { 1149298d969cSNavdeep Parhar struct sysctl_oid *oid2; 1150733b9277SNavdeep Parhar 1151fe2ebb76SJohn Baldwin iqid = vi_intr_iq(vi, j)->cntxt_id; 1152733b9277SNavdeep Parhar snprintf(name, sizeof(name), "%s ofld_txq%d", 1153fe2ebb76SJohn Baldwin device_get_nameunit(vi->dev), i); 115490e7434aSNavdeep Parhar init_eq(sc, &ofld_txq->eq, EQ_OFLD, vi->qsize_txq, pi->tx_chan, 1155733b9277SNavdeep Parhar iqid, name); 1156733b9277SNavdeep Parhar 1157733b9277SNavdeep Parhar snprintf(name, sizeof(name), "%d", i); 1158fe2ebb76SJohn Baldwin oid2 = SYSCTL_ADD_NODE(&vi->ctx, SYSCTL_CHILDREN(oid), OID_AUTO, 1159733b9277SNavdeep Parhar name, CTLFLAG_RD, NULL, "offload tx queue"); 1160733b9277SNavdeep Parhar 1161fe2ebb76SJohn Baldwin rc = alloc_wrq(sc, vi, ofld_txq, oid2); 1162298d969cSNavdeep Parhar if (rc != 0) 1163298d969cSNavdeep Parhar goto done; 1164298d969cSNavdeep Parhar j++; 1165298d969cSNavdeep Parhar } 1166298d969cSNavdeep Parhar #endif 1167733b9277SNavdeep Parhar 1168733b9277SNavdeep Parhar /* 1169733b9277SNavdeep Parhar * Finally, the control queue. 1170733b9277SNavdeep Parhar */ 1171fe2ebb76SJohn Baldwin if (!IS_MAIN_VI(vi)) 1172fe2ebb76SJohn Baldwin goto done; 1173fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "ctrlq", CTLFLAG_RD, 1174733b9277SNavdeep Parhar NULL, "ctrl queue"); 1175733b9277SNavdeep Parhar ctrlq = &sc->sge.ctrlq[pi->port_id]; 1176fe2ebb76SJohn Baldwin iqid = vi_intr_iq(vi, 0)->cntxt_id; 1177fe2ebb76SJohn Baldwin snprintf(name, sizeof(name), "%s ctrlq", device_get_nameunit(vi->dev)); 117890e7434aSNavdeep Parhar init_eq(sc, &ctrlq->eq, EQ_CTRL, CTRL_EQ_QSIZE, pi->tx_chan, iqid, 117990e7434aSNavdeep Parhar name); 1180fe2ebb76SJohn Baldwin rc = alloc_wrq(sc, vi, ctrlq, oid); 1181733b9277SNavdeep Parhar 118254e4ee71SNavdeep Parhar done: 118354e4ee71SNavdeep Parhar if (rc) 1184fe2ebb76SJohn Baldwin t4_teardown_vi_queues(vi); 118554e4ee71SNavdeep Parhar 118654e4ee71SNavdeep Parhar return (rc); 118754e4ee71SNavdeep Parhar } 118854e4ee71SNavdeep Parhar 118954e4ee71SNavdeep Parhar /* 119054e4ee71SNavdeep Parhar * Idempotent 119154e4ee71SNavdeep Parhar */ 119254e4ee71SNavdeep Parhar int 1193fe2ebb76SJohn Baldwin t4_teardown_vi_queues(struct vi_info *vi) 119454e4ee71SNavdeep Parhar { 119554e4ee71SNavdeep Parhar int i; 1196fe2ebb76SJohn Baldwin struct port_info *pi = vi->pi; 1197733b9277SNavdeep Parhar struct adapter *sc = pi->adapter; 119854e4ee71SNavdeep Parhar struct sge_rxq *rxq; 119954e4ee71SNavdeep Parhar struct sge_txq *txq; 120009fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 1201733b9277SNavdeep Parhar struct sge_ofld_rxq *ofld_rxq; 1202733b9277SNavdeep Parhar struct sge_wrq *ofld_txq; 1203733b9277SNavdeep Parhar #endif 1204298d969cSNavdeep Parhar #ifdef DEV_NETMAP 1205298d969cSNavdeep Parhar struct sge_nm_rxq *nm_rxq; 1206298d969cSNavdeep Parhar struct sge_nm_txq *nm_txq; 1207298d969cSNavdeep Parhar #endif 120854e4ee71SNavdeep Parhar 120954e4ee71SNavdeep Parhar /* Do this before freeing the queues */ 1210fe2ebb76SJohn Baldwin if (vi->flags & VI_SYSCTL_CTX) { 1211fe2ebb76SJohn Baldwin sysctl_ctx_free(&vi->ctx); 1212fe2ebb76SJohn Baldwin vi->flags &= ~VI_SYSCTL_CTX; 121354e4ee71SNavdeep Parhar } 121454e4ee71SNavdeep Parhar 1215fe2ebb76SJohn Baldwin #ifdef DEV_NETMAP 121662291463SNavdeep Parhar if (vi->ifp->if_capabilities & IFCAP_NETMAP) { 1217fe2ebb76SJohn Baldwin for_each_nm_txq(vi, i, nm_txq) { 1218fe2ebb76SJohn Baldwin free_nm_txq(vi, nm_txq); 1219fe2ebb76SJohn Baldwin } 1220fe2ebb76SJohn Baldwin 1221fe2ebb76SJohn Baldwin for_each_nm_rxq(vi, i, nm_rxq) { 1222fe2ebb76SJohn Baldwin free_nm_rxq(vi, nm_rxq); 1223fe2ebb76SJohn Baldwin } 1224fe2ebb76SJohn Baldwin } 1225fe2ebb76SJohn Baldwin #endif 1226fe2ebb76SJohn Baldwin 1227733b9277SNavdeep Parhar /* 1228733b9277SNavdeep Parhar * Take down all the tx queues first, as they reference the rx queues 1229733b9277SNavdeep Parhar * (for egress updates, etc.). 1230733b9277SNavdeep Parhar */ 1231733b9277SNavdeep Parhar 1232fe2ebb76SJohn Baldwin if (IS_MAIN_VI(vi)) 1233733b9277SNavdeep Parhar free_wrq(sc, &sc->sge.ctrlq[pi->port_id]); 1234733b9277SNavdeep Parhar 1235fe2ebb76SJohn Baldwin for_each_txq(vi, i, txq) { 1236fe2ebb76SJohn Baldwin free_txq(vi, txq); 123754e4ee71SNavdeep Parhar } 123809fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 1239fe2ebb76SJohn Baldwin for_each_ofld_txq(vi, i, ofld_txq) { 1240733b9277SNavdeep Parhar free_wrq(sc, ofld_txq); 1241733b9277SNavdeep Parhar } 1242733b9277SNavdeep Parhar #endif 1243733b9277SNavdeep Parhar 1244733b9277SNavdeep Parhar /* 1245733b9277SNavdeep Parhar * Then take down the rx queues that forward their interrupts, as they 1246733b9277SNavdeep Parhar * reference other rx queues. 1247733b9277SNavdeep Parhar */ 1248733b9277SNavdeep Parhar 1249fe2ebb76SJohn Baldwin for_each_rxq(vi, i, rxq) { 1250733b9277SNavdeep Parhar if ((rxq->iq.flags & IQ_INTR) == 0) 1251fe2ebb76SJohn Baldwin free_rxq(vi, rxq); 125254e4ee71SNavdeep Parhar } 125309fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 1254fe2ebb76SJohn Baldwin for_each_ofld_rxq(vi, i, ofld_rxq) { 1255733b9277SNavdeep Parhar if ((ofld_rxq->iq.flags & IQ_INTR) == 0) 1256fe2ebb76SJohn Baldwin free_ofld_rxq(vi, ofld_rxq); 1257733b9277SNavdeep Parhar } 1258733b9277SNavdeep Parhar #endif 1259733b9277SNavdeep Parhar 1260733b9277SNavdeep Parhar /* 1261733b9277SNavdeep Parhar * Then take down the rx queues that take direct interrupts. 1262733b9277SNavdeep Parhar */ 1263733b9277SNavdeep Parhar 1264fe2ebb76SJohn Baldwin for_each_rxq(vi, i, rxq) { 1265733b9277SNavdeep Parhar if (rxq->iq.flags & IQ_INTR) 1266fe2ebb76SJohn Baldwin free_rxq(vi, rxq); 1267733b9277SNavdeep Parhar } 126809fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 1269fe2ebb76SJohn Baldwin for_each_ofld_rxq(vi, i, ofld_rxq) { 1270733b9277SNavdeep Parhar if (ofld_rxq->iq.flags & IQ_INTR) 1271fe2ebb76SJohn Baldwin free_ofld_rxq(vi, ofld_rxq); 1272733b9277SNavdeep Parhar } 1273733b9277SNavdeep Parhar #endif 1274733b9277SNavdeep Parhar 127554e4ee71SNavdeep Parhar return (0); 127654e4ee71SNavdeep Parhar } 127754e4ee71SNavdeep Parhar 1278733b9277SNavdeep Parhar /* 1279733b9277SNavdeep Parhar * Deals with errors and the firmware event queue. All data rx queues forward 1280733b9277SNavdeep Parhar * their interrupt to the firmware event queue. 1281733b9277SNavdeep Parhar */ 128254e4ee71SNavdeep Parhar void 128354e4ee71SNavdeep Parhar t4_intr_all(void *arg) 128454e4ee71SNavdeep Parhar { 128554e4ee71SNavdeep Parhar struct adapter *sc = arg; 1286733b9277SNavdeep Parhar struct sge_iq *fwq = &sc->sge.fwq; 128754e4ee71SNavdeep Parhar 128854e4ee71SNavdeep Parhar t4_intr_err(arg); 1289733b9277SNavdeep Parhar if (atomic_cmpset_int(&fwq->state, IQS_IDLE, IQS_BUSY)) { 1290733b9277SNavdeep Parhar service_iq(fwq, 0); 1291733b9277SNavdeep Parhar atomic_cmpset_int(&fwq->state, IQS_BUSY, IQS_IDLE); 129254e4ee71SNavdeep Parhar } 129354e4ee71SNavdeep Parhar } 129454e4ee71SNavdeep Parhar 129554e4ee71SNavdeep Parhar /* Deals with error interrupts */ 129654e4ee71SNavdeep Parhar void 129754e4ee71SNavdeep Parhar t4_intr_err(void *arg) 129854e4ee71SNavdeep Parhar { 129954e4ee71SNavdeep Parhar struct adapter *sc = arg; 130054e4ee71SNavdeep Parhar 130154e4ee71SNavdeep Parhar t4_write_reg(sc, MYPF_REG(A_PCIE_PF_CLI), 0); 130254e4ee71SNavdeep Parhar t4_slow_intr_handler(sc); 130354e4ee71SNavdeep Parhar } 130454e4ee71SNavdeep Parhar 130554e4ee71SNavdeep Parhar void 130654e4ee71SNavdeep Parhar t4_intr_evt(void *arg) 130754e4ee71SNavdeep Parhar { 130854e4ee71SNavdeep Parhar struct sge_iq *iq = arg; 13092be67d29SNavdeep Parhar 1310733b9277SNavdeep Parhar if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) { 1311733b9277SNavdeep Parhar service_iq(iq, 0); 1312733b9277SNavdeep Parhar atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE); 13132be67d29SNavdeep Parhar } 13142be67d29SNavdeep Parhar } 13152be67d29SNavdeep Parhar 1316733b9277SNavdeep Parhar void 1317733b9277SNavdeep Parhar t4_intr(void *arg) 13182be67d29SNavdeep Parhar { 13192be67d29SNavdeep Parhar struct sge_iq *iq = arg; 1320733b9277SNavdeep Parhar 1321733b9277SNavdeep Parhar if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) { 1322733b9277SNavdeep Parhar service_iq(iq, 0); 1323733b9277SNavdeep Parhar atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE); 1324733b9277SNavdeep Parhar } 1325733b9277SNavdeep Parhar } 1326733b9277SNavdeep Parhar 132762291463SNavdeep Parhar void 132862291463SNavdeep Parhar t4_vi_intr(void *arg) 132962291463SNavdeep Parhar { 133062291463SNavdeep Parhar struct irq *irq = arg; 133162291463SNavdeep Parhar 133262291463SNavdeep Parhar #ifdef DEV_NETMAP 133362291463SNavdeep Parhar if (atomic_cmpset_int(&irq->nm_state, NM_ON, NM_BUSY)) { 133462291463SNavdeep Parhar t4_nm_intr(irq->nm_rxq); 133562291463SNavdeep Parhar atomic_cmpset_int(&irq->nm_state, NM_BUSY, NM_ON); 133662291463SNavdeep Parhar } 133762291463SNavdeep Parhar #endif 133862291463SNavdeep Parhar if (irq->rxq != NULL) 133962291463SNavdeep Parhar t4_intr(irq->rxq); 134062291463SNavdeep Parhar } 134162291463SNavdeep Parhar 1342733b9277SNavdeep Parhar /* 1343733b9277SNavdeep Parhar * Deals with anything and everything on the given ingress queue. 1344733b9277SNavdeep Parhar */ 1345733b9277SNavdeep Parhar static int 1346733b9277SNavdeep Parhar service_iq(struct sge_iq *iq, int budget) 1347733b9277SNavdeep Parhar { 1348733b9277SNavdeep Parhar struct sge_iq *q; 134909fe6320SNavdeep Parhar struct sge_rxq *rxq = iq_to_rxq(iq); /* Use iff iq is part of rxq */ 13504d6db4e0SNavdeep Parhar struct sge_fl *fl; /* Use iff IQ_HAS_FL */ 135154e4ee71SNavdeep Parhar struct adapter *sc = iq->adapter; 1352b2daa9a9SNavdeep Parhar struct iq_desc *d = &iq->desc[iq->cidx]; 13534d6db4e0SNavdeep Parhar int ndescs = 0, limit; 13544d6db4e0SNavdeep Parhar int rsp_type, refill; 1355733b9277SNavdeep Parhar uint32_t lq; 13564d6db4e0SNavdeep Parhar uint16_t fl_hw_cidx; 1357733b9277SNavdeep Parhar struct mbuf *m0; 1358733b9277SNavdeep Parhar STAILQ_HEAD(, sge_iq) iql = STAILQ_HEAD_INITIALIZER(iql); 1359480e603cSNavdeep Parhar #if defined(INET) || defined(INET6) 1360480e603cSNavdeep Parhar const struct timeval lro_timeout = {0, sc->lro_timeout}; 1361480e603cSNavdeep Parhar #endif 1362733b9277SNavdeep Parhar 1363733b9277SNavdeep Parhar KASSERT(iq->state == IQS_BUSY, ("%s: iq %p not BUSY", __func__, iq)); 1364733b9277SNavdeep Parhar 13654d6db4e0SNavdeep Parhar limit = budget ? budget : iq->qsize / 16; 13664d6db4e0SNavdeep Parhar 13674d6db4e0SNavdeep Parhar if (iq->flags & IQ_HAS_FL) { 13684d6db4e0SNavdeep Parhar fl = &rxq->fl; 13694d6db4e0SNavdeep Parhar fl_hw_cidx = fl->hw_cidx; /* stable snapshot */ 13704d6db4e0SNavdeep Parhar } else { 13714d6db4e0SNavdeep Parhar fl = NULL; 13724d6db4e0SNavdeep Parhar fl_hw_cidx = 0; /* to silence gcc warning */ 13734d6db4e0SNavdeep Parhar } 13744d6db4e0SNavdeep Parhar 1375733b9277SNavdeep Parhar /* 1376733b9277SNavdeep Parhar * We always come back and check the descriptor ring for new indirect 1377733b9277SNavdeep Parhar * interrupts and other responses after running a single handler. 1378733b9277SNavdeep Parhar */ 1379733b9277SNavdeep Parhar for (;;) { 1380b2daa9a9SNavdeep Parhar while ((d->rsp.u.type_gen & F_RSPD_GEN) == iq->gen) { 138154e4ee71SNavdeep Parhar 138254e4ee71SNavdeep Parhar rmb(); 138354e4ee71SNavdeep Parhar 13844d6db4e0SNavdeep Parhar refill = 0; 1385733b9277SNavdeep Parhar m0 = NULL; 1386b2daa9a9SNavdeep Parhar rsp_type = G_RSPD_TYPE(d->rsp.u.type_gen); 1387b2daa9a9SNavdeep Parhar lq = be32toh(d->rsp.pldbuflen_qid); 138854e4ee71SNavdeep Parhar 1389733b9277SNavdeep Parhar switch (rsp_type) { 1390733b9277SNavdeep Parhar case X_RSPD_TYPE_FLBUF: 139154e4ee71SNavdeep Parhar 1392733b9277SNavdeep Parhar KASSERT(iq->flags & IQ_HAS_FL, 1393733b9277SNavdeep Parhar ("%s: data for an iq (%p) with no freelist", 1394733b9277SNavdeep Parhar __func__, iq)); 1395733b9277SNavdeep Parhar 13964d6db4e0SNavdeep Parhar m0 = get_fl_payload(sc, fl, lq); 13971458bff9SNavdeep Parhar if (__predict_false(m0 == NULL)) 13981458bff9SNavdeep Parhar goto process_iql; 13994d6db4e0SNavdeep Parhar refill = IDXDIFF(fl->hw_cidx, fl_hw_cidx, fl->sidx) > 2; 1400733b9277SNavdeep Parhar #ifdef T4_PKT_TIMESTAMP 1401733b9277SNavdeep Parhar /* 1402733b9277SNavdeep Parhar * 60 bit timestamp for the payload is 1403733b9277SNavdeep Parhar * *(uint64_t *)m0->m_pktdat. Note that it is 1404733b9277SNavdeep Parhar * in the leading free-space in the mbuf. The 1405733b9277SNavdeep Parhar * kernel can clobber it during a pullup, 1406733b9277SNavdeep Parhar * m_copymdata, etc. You need to make sure that 1407733b9277SNavdeep Parhar * the mbuf reaches you unmolested if you care 1408733b9277SNavdeep Parhar * about the timestamp. 1409733b9277SNavdeep Parhar */ 1410733b9277SNavdeep Parhar *(uint64_t *)m0->m_pktdat = 1411733b9277SNavdeep Parhar be64toh(ctrl->u.last_flit) & 1412733b9277SNavdeep Parhar 0xfffffffffffffff; 1413733b9277SNavdeep Parhar #endif 1414733b9277SNavdeep Parhar 1415733b9277SNavdeep Parhar /* fall through */ 1416733b9277SNavdeep Parhar 1417733b9277SNavdeep Parhar case X_RSPD_TYPE_CPL: 1418b2daa9a9SNavdeep Parhar KASSERT(d->rss.opcode < NUM_CPL_CMDS, 1419733b9277SNavdeep Parhar ("%s: bad opcode %02x.", __func__, 1420b2daa9a9SNavdeep Parhar d->rss.opcode)); 1421671bf2b8SNavdeep Parhar t4_cpl_handler[d->rss.opcode](iq, &d->rss, m0); 1422733b9277SNavdeep Parhar break; 1423733b9277SNavdeep Parhar 1424733b9277SNavdeep Parhar case X_RSPD_TYPE_INTR: 1425733b9277SNavdeep Parhar 1426733b9277SNavdeep Parhar /* 1427733b9277SNavdeep Parhar * Interrupts should be forwarded only to queues 1428733b9277SNavdeep Parhar * that are not forwarding their interrupts. 1429733b9277SNavdeep Parhar * This means service_iq can recurse but only 1 1430733b9277SNavdeep Parhar * level deep. 1431733b9277SNavdeep Parhar */ 1432733b9277SNavdeep Parhar KASSERT(budget == 0, 1433733b9277SNavdeep Parhar ("%s: budget %u, rsp_type %u", __func__, 1434733b9277SNavdeep Parhar budget, rsp_type)); 1435733b9277SNavdeep Parhar 143698005176SNavdeep Parhar /* 143798005176SNavdeep Parhar * There are 1K interrupt-capable queues (qids 0 143898005176SNavdeep Parhar * through 1023). A response type indicating a 143998005176SNavdeep Parhar * forwarded interrupt with a qid >= 1K is an 144098005176SNavdeep Parhar * iWARP async notification. 144198005176SNavdeep Parhar */ 144298005176SNavdeep Parhar if (lq >= 1024) { 1443671bf2b8SNavdeep Parhar t4_an_handler(iq, &d->rsp); 144498005176SNavdeep Parhar break; 144598005176SNavdeep Parhar } 144698005176SNavdeep Parhar 1447*ec55567cSJohn Baldwin q = sc->sge.iqmap[lq - sc->sge.iq_start - 1448*ec55567cSJohn Baldwin sc->sge.iq_base]; 1449733b9277SNavdeep Parhar if (atomic_cmpset_int(&q->state, IQS_IDLE, 1450733b9277SNavdeep Parhar IQS_BUSY)) { 14514d6db4e0SNavdeep Parhar if (service_iq(q, q->qsize / 16) == 0) { 1452733b9277SNavdeep Parhar atomic_cmpset_int(&q->state, 1453733b9277SNavdeep Parhar IQS_BUSY, IQS_IDLE); 1454733b9277SNavdeep Parhar } else { 1455733b9277SNavdeep Parhar STAILQ_INSERT_TAIL(&iql, q, 1456733b9277SNavdeep Parhar link); 1457733b9277SNavdeep Parhar } 1458733b9277SNavdeep Parhar } 1459733b9277SNavdeep Parhar break; 1460733b9277SNavdeep Parhar 1461733b9277SNavdeep Parhar default: 146298005176SNavdeep Parhar KASSERT(0, 146398005176SNavdeep Parhar ("%s: illegal response type %d on iq %p", 146498005176SNavdeep Parhar __func__, rsp_type, iq)); 146598005176SNavdeep Parhar log(LOG_ERR, 146698005176SNavdeep Parhar "%s: illegal response type %d on iq %p", 146798005176SNavdeep Parhar device_get_nameunit(sc->dev), rsp_type, iq); 146809fe6320SNavdeep Parhar break; 146954e4ee71SNavdeep Parhar } 147056599263SNavdeep Parhar 1471b2daa9a9SNavdeep Parhar d++; 1472b2daa9a9SNavdeep Parhar if (__predict_false(++iq->cidx == iq->sidx)) { 1473b2daa9a9SNavdeep Parhar iq->cidx = 0; 1474b2daa9a9SNavdeep Parhar iq->gen ^= F_RSPD_GEN; 1475b2daa9a9SNavdeep Parhar d = &iq->desc[0]; 1476b2daa9a9SNavdeep Parhar } 1477b2daa9a9SNavdeep Parhar if (__predict_false(++ndescs == limit)) { 1478315048f2SJohn Baldwin t4_write_reg(sc, sc->sge_gts_reg, 1479733b9277SNavdeep Parhar V_CIDXINC(ndescs) | 1480733b9277SNavdeep Parhar V_INGRESSQID(iq->cntxt_id) | 1481733b9277SNavdeep Parhar V_SEINTARM(V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX))); 1482733b9277SNavdeep Parhar ndescs = 0; 1483733b9277SNavdeep Parhar 1484480e603cSNavdeep Parhar #if defined(INET) || defined(INET6) 1485480e603cSNavdeep Parhar if (iq->flags & IQ_LRO_ENABLED && 1486480e603cSNavdeep Parhar sc->lro_timeout != 0) { 1487480e603cSNavdeep Parhar tcp_lro_flush_inactive(&rxq->lro, 1488480e603cSNavdeep Parhar &lro_timeout); 1489480e603cSNavdeep Parhar } 1490480e603cSNavdeep Parhar #endif 1491480e603cSNavdeep Parhar 1492861e42b2SNavdeep Parhar if (budget) { 14934d6db4e0SNavdeep Parhar if (iq->flags & IQ_HAS_FL) { 1494861e42b2SNavdeep Parhar FL_LOCK(fl); 1495861e42b2SNavdeep Parhar refill_fl(sc, fl, 32); 1496861e42b2SNavdeep Parhar FL_UNLOCK(fl); 1497861e42b2SNavdeep Parhar } 1498733b9277SNavdeep Parhar return (EINPROGRESS); 149954e4ee71SNavdeep Parhar } 1500733b9277SNavdeep Parhar } 15014d6db4e0SNavdeep Parhar if (refill) { 15024d6db4e0SNavdeep Parhar FL_LOCK(fl); 15034d6db4e0SNavdeep Parhar refill_fl(sc, fl, 32); 15044d6db4e0SNavdeep Parhar FL_UNLOCK(fl); 15054d6db4e0SNavdeep Parhar fl_hw_cidx = fl->hw_cidx; 15064d6db4e0SNavdeep Parhar } 1507861e42b2SNavdeep Parhar } 1508733b9277SNavdeep Parhar 15091458bff9SNavdeep Parhar process_iql: 1510733b9277SNavdeep Parhar if (STAILQ_EMPTY(&iql)) 1511733b9277SNavdeep Parhar break; 1512733b9277SNavdeep Parhar 1513733b9277SNavdeep Parhar /* 1514733b9277SNavdeep Parhar * Process the head only, and send it to the back of the list if 1515733b9277SNavdeep Parhar * it's still not done. 1516733b9277SNavdeep Parhar */ 1517733b9277SNavdeep Parhar q = STAILQ_FIRST(&iql); 1518733b9277SNavdeep Parhar STAILQ_REMOVE_HEAD(&iql, link); 1519733b9277SNavdeep Parhar if (service_iq(q, q->qsize / 8) == 0) 1520733b9277SNavdeep Parhar atomic_cmpset_int(&q->state, IQS_BUSY, IQS_IDLE); 1521733b9277SNavdeep Parhar else 1522733b9277SNavdeep Parhar STAILQ_INSERT_TAIL(&iql, q, link); 1523733b9277SNavdeep Parhar } 1524733b9277SNavdeep Parhar 1525a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6) 1526733b9277SNavdeep Parhar if (iq->flags & IQ_LRO_ENABLED) { 1527733b9277SNavdeep Parhar struct lro_ctrl *lro = &rxq->lro; 1528733b9277SNavdeep Parhar 15296dd38b87SSepherosa Ziehau tcp_lro_flush_all(lro); 1530733b9277SNavdeep Parhar } 1531733b9277SNavdeep Parhar #endif 1532733b9277SNavdeep Parhar 1533315048f2SJohn Baldwin t4_write_reg(sc, sc->sge_gts_reg, V_CIDXINC(ndescs) | 1534733b9277SNavdeep Parhar V_INGRESSQID((u32)iq->cntxt_id) | V_SEINTARM(iq->intr_params)); 1535733b9277SNavdeep Parhar 1536733b9277SNavdeep Parhar if (iq->flags & IQ_HAS_FL) { 1537733b9277SNavdeep Parhar int starved; 1538733b9277SNavdeep Parhar 1539733b9277SNavdeep Parhar FL_LOCK(fl); 154038035ed6SNavdeep Parhar starved = refill_fl(sc, fl, 64); 1541733b9277SNavdeep Parhar FL_UNLOCK(fl); 1542733b9277SNavdeep Parhar if (__predict_false(starved != 0)) 1543733b9277SNavdeep Parhar add_fl_to_sfl(sc, fl); 1544733b9277SNavdeep Parhar } 1545733b9277SNavdeep Parhar 1546733b9277SNavdeep Parhar return (0); 1547733b9277SNavdeep Parhar } 1548733b9277SNavdeep Parhar 154938035ed6SNavdeep Parhar static inline int 155038035ed6SNavdeep Parhar cl_has_metadata(struct sge_fl *fl, struct cluster_layout *cll) 15511458bff9SNavdeep Parhar { 155238035ed6SNavdeep Parhar int rc = fl->flags & FL_BUF_PACKING || cll->region1 > 0; 15531458bff9SNavdeep Parhar 155438035ed6SNavdeep Parhar if (rc) 155538035ed6SNavdeep Parhar MPASS(cll->region3 >= CL_METADATA_SIZE); 155638035ed6SNavdeep Parhar 155738035ed6SNavdeep Parhar return (rc); 15581458bff9SNavdeep Parhar } 15591458bff9SNavdeep Parhar 156038035ed6SNavdeep Parhar static inline struct cluster_metadata * 156138035ed6SNavdeep Parhar cl_metadata(struct adapter *sc, struct sge_fl *fl, struct cluster_layout *cll, 156238035ed6SNavdeep Parhar caddr_t cl) 15631458bff9SNavdeep Parhar { 15641458bff9SNavdeep Parhar 156538035ed6SNavdeep Parhar if (cl_has_metadata(fl, cll)) { 156638035ed6SNavdeep Parhar struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx]; 15671458bff9SNavdeep Parhar 156838035ed6SNavdeep Parhar return ((struct cluster_metadata *)(cl + swz->size) - 1); 15691458bff9SNavdeep Parhar } 157038035ed6SNavdeep Parhar return (NULL); 15711458bff9SNavdeep Parhar } 15721458bff9SNavdeep Parhar 157315c28f87SGleb Smirnoff static void 15741458bff9SNavdeep Parhar rxb_free(struct mbuf *m, void *arg1, void *arg2) 15751458bff9SNavdeep Parhar { 15761458bff9SNavdeep Parhar uma_zone_t zone = arg1; 15771458bff9SNavdeep Parhar caddr_t cl = arg2; 15781458bff9SNavdeep Parhar 15791458bff9SNavdeep Parhar uma_zfree(zone, cl); 158082eff304SNavdeep Parhar counter_u64_add(extfree_rels, 1); 15811458bff9SNavdeep Parhar } 15821458bff9SNavdeep Parhar 158338035ed6SNavdeep Parhar /* 158438035ed6SNavdeep Parhar * The mbuf returned by this function could be allocated from zone_mbuf or 158538035ed6SNavdeep Parhar * constructed in spare room in the cluster. 158638035ed6SNavdeep Parhar * 158738035ed6SNavdeep Parhar * The mbuf carries the payload in one of these ways 158838035ed6SNavdeep Parhar * a) frame inside the mbuf (mbuf from zone_mbuf) 158938035ed6SNavdeep Parhar * b) m_cljset (for clusters without metadata) zone_mbuf 159038035ed6SNavdeep Parhar * c) m_extaddref (cluster with metadata) inline mbuf 159138035ed6SNavdeep Parhar * d) m_extaddref (cluster with metadata) zone_mbuf 159238035ed6SNavdeep Parhar */ 15931458bff9SNavdeep Parhar static struct mbuf * 1594b741402cSNavdeep Parhar get_scatter_segment(struct adapter *sc, struct sge_fl *fl, int fr_offset, 1595b741402cSNavdeep Parhar int remaining) 159638035ed6SNavdeep Parhar { 159738035ed6SNavdeep Parhar struct mbuf *m; 159838035ed6SNavdeep Parhar struct fl_sdesc *sd = &fl->sdesc[fl->cidx]; 159938035ed6SNavdeep Parhar struct cluster_layout *cll = &sd->cll; 160038035ed6SNavdeep Parhar struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx]; 160138035ed6SNavdeep Parhar struct hw_buf_info *hwb = &sc->sge.hw_buf_info[cll->hwidx]; 160238035ed6SNavdeep Parhar struct cluster_metadata *clm = cl_metadata(sc, fl, cll, sd->cl); 1603b741402cSNavdeep Parhar int len, blen; 160438035ed6SNavdeep Parhar caddr_t payload; 160538035ed6SNavdeep Parhar 1606b741402cSNavdeep Parhar blen = hwb->size - fl->rx_offset; /* max possible in this buf */ 1607b741402cSNavdeep Parhar len = min(remaining, blen); 160838035ed6SNavdeep Parhar payload = sd->cl + cll->region1 + fl->rx_offset; 1609e3207e19SNavdeep Parhar if (fl->flags & FL_BUF_PACKING) { 1610b741402cSNavdeep Parhar const u_int l = fr_offset + len; 1611b741402cSNavdeep Parhar const u_int pad = roundup2(l, fl->buf_boundary) - l; 1612b741402cSNavdeep Parhar 1613b741402cSNavdeep Parhar if (fl->rx_offset + len + pad < hwb->size) 1614b741402cSNavdeep Parhar blen = len + pad; 1615b741402cSNavdeep Parhar MPASS(fl->rx_offset + blen <= hwb->size); 1616e3207e19SNavdeep Parhar } else { 1617e3207e19SNavdeep Parhar MPASS(fl->rx_offset == 0); /* not packing */ 1618e3207e19SNavdeep Parhar } 161938035ed6SNavdeep Parhar 1620b741402cSNavdeep Parhar 162138035ed6SNavdeep Parhar if (sc->sc_do_rxcopy && len < RX_COPY_THRESHOLD) { 162238035ed6SNavdeep Parhar 162338035ed6SNavdeep Parhar /* 162438035ed6SNavdeep Parhar * Copy payload into a freshly allocated mbuf. 162538035ed6SNavdeep Parhar */ 162638035ed6SNavdeep Parhar 1627b741402cSNavdeep Parhar m = fr_offset == 0 ? 162838035ed6SNavdeep Parhar m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA); 162938035ed6SNavdeep Parhar if (m == NULL) 163038035ed6SNavdeep Parhar return (NULL); 163138035ed6SNavdeep Parhar fl->mbuf_allocated++; 163238035ed6SNavdeep Parhar #ifdef T4_PKT_TIMESTAMP 163338035ed6SNavdeep Parhar /* Leave room for a timestamp */ 163438035ed6SNavdeep Parhar m->m_data += 8; 163538035ed6SNavdeep Parhar #endif 163638035ed6SNavdeep Parhar /* copy data to mbuf */ 163738035ed6SNavdeep Parhar bcopy(payload, mtod(m, caddr_t), len); 163838035ed6SNavdeep Parhar 1639c3fb7725SNavdeep Parhar } else if (sd->nmbuf * MSIZE < cll->region1) { 164038035ed6SNavdeep Parhar 164138035ed6SNavdeep Parhar /* 164238035ed6SNavdeep Parhar * There's spare room in the cluster for an mbuf. Create one 1643ccc69b2fSNavdeep Parhar * and associate it with the payload that's in the cluster. 164438035ed6SNavdeep Parhar */ 164538035ed6SNavdeep Parhar 164638035ed6SNavdeep Parhar MPASS(clm != NULL); 1647c3fb7725SNavdeep Parhar m = (struct mbuf *)(sd->cl + sd->nmbuf * MSIZE); 164838035ed6SNavdeep Parhar /* No bzero required */ 1649b4b12e52SGleb Smirnoff if (m_init(m, M_NOWAIT, MT_DATA, 1650b741402cSNavdeep Parhar fr_offset == 0 ? M_PKTHDR | M_NOFREE : M_NOFREE)) 165138035ed6SNavdeep Parhar return (NULL); 165238035ed6SNavdeep Parhar fl->mbuf_inlined++; 1653b741402cSNavdeep Parhar m_extaddref(m, payload, blen, &clm->refcount, rxb_free, 165438035ed6SNavdeep Parhar swz->zone, sd->cl); 165582eff304SNavdeep Parhar if (sd->nmbuf++ == 0) 165682eff304SNavdeep Parhar counter_u64_add(extfree_refs, 1); 165738035ed6SNavdeep Parhar 165838035ed6SNavdeep Parhar } else { 165938035ed6SNavdeep Parhar 166038035ed6SNavdeep Parhar /* 166138035ed6SNavdeep Parhar * Grab an mbuf from zone_mbuf and associate it with the 166238035ed6SNavdeep Parhar * payload in the cluster. 166338035ed6SNavdeep Parhar */ 166438035ed6SNavdeep Parhar 1665b741402cSNavdeep Parhar m = fr_offset == 0 ? 166638035ed6SNavdeep Parhar m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA); 166738035ed6SNavdeep Parhar if (m == NULL) 166838035ed6SNavdeep Parhar return (NULL); 166938035ed6SNavdeep Parhar fl->mbuf_allocated++; 1670ccc69b2fSNavdeep Parhar if (clm != NULL) { 1671b741402cSNavdeep Parhar m_extaddref(m, payload, blen, &clm->refcount, 167238035ed6SNavdeep Parhar rxb_free, swz->zone, sd->cl); 167382eff304SNavdeep Parhar if (sd->nmbuf++ == 0) 167482eff304SNavdeep Parhar counter_u64_add(extfree_refs, 1); 1675ccc69b2fSNavdeep Parhar } else { 167638035ed6SNavdeep Parhar m_cljset(m, sd->cl, swz->type); 167738035ed6SNavdeep Parhar sd->cl = NULL; /* consumed, not a recycle candidate */ 167838035ed6SNavdeep Parhar } 167938035ed6SNavdeep Parhar } 1680b741402cSNavdeep Parhar if (fr_offset == 0) 1681b741402cSNavdeep Parhar m->m_pkthdr.len = remaining; 168238035ed6SNavdeep Parhar m->m_len = len; 168338035ed6SNavdeep Parhar 168438035ed6SNavdeep Parhar if (fl->flags & FL_BUF_PACKING) { 1685b741402cSNavdeep Parhar fl->rx_offset += blen; 168638035ed6SNavdeep Parhar MPASS(fl->rx_offset <= hwb->size); 168738035ed6SNavdeep Parhar if (fl->rx_offset < hwb->size) 168838035ed6SNavdeep Parhar return (m); /* without advancing the cidx */ 168938035ed6SNavdeep Parhar } 169038035ed6SNavdeep Parhar 16914d6db4e0SNavdeep Parhar if (__predict_false(++fl->cidx % 8 == 0)) { 16924d6db4e0SNavdeep Parhar uint16_t cidx = fl->cidx / 8; 16934d6db4e0SNavdeep Parhar 16944d6db4e0SNavdeep Parhar if (__predict_false(cidx == fl->sidx)) 16954d6db4e0SNavdeep Parhar fl->cidx = cidx = 0; 16964d6db4e0SNavdeep Parhar fl->hw_cidx = cidx; 16974d6db4e0SNavdeep Parhar } 169838035ed6SNavdeep Parhar fl->rx_offset = 0; 169938035ed6SNavdeep Parhar 170038035ed6SNavdeep Parhar return (m); 170138035ed6SNavdeep Parhar } 170238035ed6SNavdeep Parhar 170338035ed6SNavdeep Parhar static struct mbuf * 17044d6db4e0SNavdeep Parhar get_fl_payload(struct adapter *sc, struct sge_fl *fl, uint32_t len_newbuf) 17051458bff9SNavdeep Parhar { 170638035ed6SNavdeep Parhar struct mbuf *m0, *m, **pnext; 1707b741402cSNavdeep Parhar u_int remaining; 1708b741402cSNavdeep Parhar const u_int total = G_RSPD_LEN(len_newbuf); 17091458bff9SNavdeep Parhar 17104d6db4e0SNavdeep Parhar if (__predict_false(fl->flags & FL_BUF_RESUME)) { 1711368541baSNavdeep Parhar M_ASSERTPKTHDR(fl->m0); 1712b741402cSNavdeep Parhar MPASS(fl->m0->m_pkthdr.len == total); 1713b741402cSNavdeep Parhar MPASS(fl->remaining < total); 17141458bff9SNavdeep Parhar 171538035ed6SNavdeep Parhar m0 = fl->m0; 171638035ed6SNavdeep Parhar pnext = fl->pnext; 1717b741402cSNavdeep Parhar remaining = fl->remaining; 17184d6db4e0SNavdeep Parhar fl->flags &= ~FL_BUF_RESUME; 171938035ed6SNavdeep Parhar goto get_segment; 17201458bff9SNavdeep Parhar } 17211458bff9SNavdeep Parhar 172238035ed6SNavdeep Parhar if (fl->rx_offset > 0 && len_newbuf & F_RSPD_NEWBUF) { 17231458bff9SNavdeep Parhar fl->rx_offset = 0; 17244d6db4e0SNavdeep Parhar if (__predict_false(++fl->cidx % 8 == 0)) { 17254d6db4e0SNavdeep Parhar uint16_t cidx = fl->cidx / 8; 17264d6db4e0SNavdeep Parhar 17274d6db4e0SNavdeep Parhar if (__predict_false(cidx == fl->sidx)) 17284d6db4e0SNavdeep Parhar fl->cidx = cidx = 0; 17294d6db4e0SNavdeep Parhar fl->hw_cidx = cidx; 17304d6db4e0SNavdeep Parhar } 17311458bff9SNavdeep Parhar } 17321458bff9SNavdeep Parhar 17331458bff9SNavdeep Parhar /* 173438035ed6SNavdeep Parhar * Payload starts at rx_offset in the current hw buffer. Its length is 173538035ed6SNavdeep Parhar * 'len' and it may span multiple hw buffers. 17361458bff9SNavdeep Parhar */ 17371458bff9SNavdeep Parhar 1738b741402cSNavdeep Parhar m0 = get_scatter_segment(sc, fl, 0, total); 1739368541baSNavdeep Parhar if (m0 == NULL) 17404d6db4e0SNavdeep Parhar return (NULL); 1741b741402cSNavdeep Parhar remaining = total - m0->m_len; 174238035ed6SNavdeep Parhar pnext = &m0->m_next; 1743b741402cSNavdeep Parhar while (remaining > 0) { 174438035ed6SNavdeep Parhar get_segment: 174538035ed6SNavdeep Parhar MPASS(fl->rx_offset == 0); 1746b741402cSNavdeep Parhar m = get_scatter_segment(sc, fl, total - remaining, remaining); 17474d6db4e0SNavdeep Parhar if (__predict_false(m == NULL)) { 174838035ed6SNavdeep Parhar fl->m0 = m0; 174938035ed6SNavdeep Parhar fl->pnext = pnext; 1750b741402cSNavdeep Parhar fl->remaining = remaining; 17514d6db4e0SNavdeep Parhar fl->flags |= FL_BUF_RESUME; 17524d6db4e0SNavdeep Parhar return (NULL); 17531458bff9SNavdeep Parhar } 175438035ed6SNavdeep Parhar *pnext = m; 175538035ed6SNavdeep Parhar pnext = &m->m_next; 1756b741402cSNavdeep Parhar remaining -= m->m_len; 1757733b9277SNavdeep Parhar } 175838035ed6SNavdeep Parhar *pnext = NULL; 17594d6db4e0SNavdeep Parhar 1760dbbf46c4SNavdeep Parhar M_ASSERTPKTHDR(m0); 1761733b9277SNavdeep Parhar return (m0); 1762733b9277SNavdeep Parhar } 1763733b9277SNavdeep Parhar 1764733b9277SNavdeep Parhar static int 1765733b9277SNavdeep Parhar t4_eth_rx(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m0) 1766733b9277SNavdeep Parhar { 17673c51d154SNavdeep Parhar struct sge_rxq *rxq = iq_to_rxq(iq); 1768733b9277SNavdeep Parhar struct ifnet *ifp = rxq->ifp; 176990e7434aSNavdeep Parhar struct adapter *sc = iq->adapter; 1770733b9277SNavdeep Parhar const struct cpl_rx_pkt *cpl = (const void *)(rss + 1); 1771a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6) 1772733b9277SNavdeep Parhar struct lro_ctrl *lro = &rxq->lro; 1773733b9277SNavdeep Parhar #endif 177470ca6229SNavdeep Parhar static const int sw_hashtype[4][2] = { 177570ca6229SNavdeep Parhar {M_HASHTYPE_NONE, M_HASHTYPE_NONE}, 177670ca6229SNavdeep Parhar {M_HASHTYPE_RSS_IPV4, M_HASHTYPE_RSS_IPV6}, 177770ca6229SNavdeep Parhar {M_HASHTYPE_RSS_TCP_IPV4, M_HASHTYPE_RSS_TCP_IPV6}, 177870ca6229SNavdeep Parhar {M_HASHTYPE_RSS_UDP_IPV4, M_HASHTYPE_RSS_UDP_IPV6}, 177970ca6229SNavdeep Parhar }; 1780733b9277SNavdeep Parhar 1781733b9277SNavdeep Parhar KASSERT(m0 != NULL, ("%s: no payload with opcode %02x", __func__, 1782733b9277SNavdeep Parhar rss->opcode)); 1783733b9277SNavdeep Parhar 178490e7434aSNavdeep Parhar m0->m_pkthdr.len -= sc->params.sge.fl_pktshift; 178590e7434aSNavdeep Parhar m0->m_len -= sc->params.sge.fl_pktshift; 178690e7434aSNavdeep Parhar m0->m_data += sc->params.sge.fl_pktshift; 178754e4ee71SNavdeep Parhar 178854e4ee71SNavdeep Parhar m0->m_pkthdr.rcvif = ifp; 178970ca6229SNavdeep Parhar M_HASHTYPE_SET(m0, sw_hashtype[rss->hash_type][rss->ipv6]); 1790273ef991SNavdeep Parhar m0->m_pkthdr.flowid = be32toh(rss->hash_val); 179154e4ee71SNavdeep Parhar 17929600bf00SNavdeep Parhar if (cpl->csum_calc && !cpl->err_vec) { 17939600bf00SNavdeep Parhar if (ifp->if_capenable & IFCAP_RXCSUM && 17949600bf00SNavdeep Parhar cpl->l2info & htobe32(F_RXF_IP)) { 1795932b1a5fSNavdeep Parhar m0->m_pkthdr.csum_flags = (CSUM_IP_CHECKED | 179654e4ee71SNavdeep Parhar CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR); 17979600bf00SNavdeep Parhar rxq->rxcsum++; 17989600bf00SNavdeep Parhar } else if (ifp->if_capenable & IFCAP_RXCSUM_IPV6 && 17999600bf00SNavdeep Parhar cpl->l2info & htobe32(F_RXF_IP6)) { 1800932b1a5fSNavdeep Parhar m0->m_pkthdr.csum_flags = (CSUM_DATA_VALID_IPV6 | 18019600bf00SNavdeep Parhar CSUM_PSEUDO_HDR); 18029600bf00SNavdeep Parhar rxq->rxcsum++; 18039600bf00SNavdeep Parhar } 18049600bf00SNavdeep Parhar 18059600bf00SNavdeep Parhar if (__predict_false(cpl->ip_frag)) 180654e4ee71SNavdeep Parhar m0->m_pkthdr.csum_data = be16toh(cpl->csum); 180754e4ee71SNavdeep Parhar else 180854e4ee71SNavdeep Parhar m0->m_pkthdr.csum_data = 0xffff; 180954e4ee71SNavdeep Parhar } 181054e4ee71SNavdeep Parhar 181154e4ee71SNavdeep Parhar if (cpl->vlan_ex) { 181254e4ee71SNavdeep Parhar m0->m_pkthdr.ether_vtag = be16toh(cpl->vlan); 181354e4ee71SNavdeep Parhar m0->m_flags |= M_VLANTAG; 181454e4ee71SNavdeep Parhar rxq->vlan_extraction++; 181554e4ee71SNavdeep Parhar } 181654e4ee71SNavdeep Parhar 1817a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6) 181854e4ee71SNavdeep Parhar if (cpl->l2info & htobe32(F_RXF_LRO) && 1819733b9277SNavdeep Parhar iq->flags & IQ_LRO_ENABLED && 182054e4ee71SNavdeep Parhar tcp_lro_rx(lro, m0, 0) == 0) { 182154e4ee71SNavdeep Parhar /* queued for LRO */ 182254e4ee71SNavdeep Parhar } else 182354e4ee71SNavdeep Parhar #endif 18247d29df59SNavdeep Parhar ifp->if_input(ifp, m0); 182554e4ee71SNavdeep Parhar 1826733b9277SNavdeep Parhar return (0); 182754e4ee71SNavdeep Parhar } 182854e4ee71SNavdeep Parhar 1829733b9277SNavdeep Parhar /* 18307951040fSNavdeep Parhar * Must drain the wrq or make sure that someone else will. 18317951040fSNavdeep Parhar */ 18327951040fSNavdeep Parhar static void 18337951040fSNavdeep Parhar wrq_tx_drain(void *arg, int n) 18347951040fSNavdeep Parhar { 18357951040fSNavdeep Parhar struct sge_wrq *wrq = arg; 18367951040fSNavdeep Parhar struct sge_eq *eq = &wrq->eq; 18377951040fSNavdeep Parhar 18387951040fSNavdeep Parhar EQ_LOCK(eq); 18397951040fSNavdeep Parhar if (TAILQ_EMPTY(&wrq->incomplete_wrs) && !STAILQ_EMPTY(&wrq->wr_list)) 18407951040fSNavdeep Parhar drain_wrq_wr_list(wrq->adapter, wrq); 18417951040fSNavdeep Parhar EQ_UNLOCK(eq); 18427951040fSNavdeep Parhar } 18437951040fSNavdeep Parhar 18447951040fSNavdeep Parhar static void 18457951040fSNavdeep Parhar drain_wrq_wr_list(struct adapter *sc, struct sge_wrq *wrq) 18467951040fSNavdeep Parhar { 18477951040fSNavdeep Parhar struct sge_eq *eq = &wrq->eq; 18487951040fSNavdeep Parhar u_int available, dbdiff; /* # of hardware descriptors */ 18497951040fSNavdeep Parhar u_int n; 18507951040fSNavdeep Parhar struct wrqe *wr; 18517951040fSNavdeep Parhar struct fw_eth_tx_pkt_wr *dst; /* any fw WR struct will do */ 18527951040fSNavdeep Parhar 18537951040fSNavdeep Parhar EQ_LOCK_ASSERT_OWNED(eq); 18547951040fSNavdeep Parhar MPASS(TAILQ_EMPTY(&wrq->incomplete_wrs)); 18557951040fSNavdeep Parhar wr = STAILQ_FIRST(&wrq->wr_list); 18567951040fSNavdeep Parhar MPASS(wr != NULL); /* Must be called with something useful to do */ 1857cda2ab0eSNavdeep Parhar MPASS(eq->pidx == eq->dbidx); 1858cda2ab0eSNavdeep Parhar dbdiff = 0; 18597951040fSNavdeep Parhar 18607951040fSNavdeep Parhar do { 18617951040fSNavdeep Parhar eq->cidx = read_hw_cidx(eq); 18627951040fSNavdeep Parhar if (eq->pidx == eq->cidx) 18637951040fSNavdeep Parhar available = eq->sidx - 1; 18647951040fSNavdeep Parhar else 18657951040fSNavdeep Parhar available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1; 18667951040fSNavdeep Parhar 18677951040fSNavdeep Parhar MPASS(wr->wrq == wrq); 18687951040fSNavdeep Parhar n = howmany(wr->wr_len, EQ_ESIZE); 18697951040fSNavdeep Parhar if (available < n) 1870cda2ab0eSNavdeep Parhar break; 18717951040fSNavdeep Parhar 18727951040fSNavdeep Parhar dst = (void *)&eq->desc[eq->pidx]; 18737951040fSNavdeep Parhar if (__predict_true(eq->sidx - eq->pidx > n)) { 18747951040fSNavdeep Parhar /* Won't wrap, won't end exactly at the status page. */ 18757951040fSNavdeep Parhar bcopy(&wr->wr[0], dst, wr->wr_len); 18767951040fSNavdeep Parhar eq->pidx += n; 18777951040fSNavdeep Parhar } else { 18787951040fSNavdeep Parhar int first_portion = (eq->sidx - eq->pidx) * EQ_ESIZE; 18797951040fSNavdeep Parhar 18807951040fSNavdeep Parhar bcopy(&wr->wr[0], dst, first_portion); 18817951040fSNavdeep Parhar if (wr->wr_len > first_portion) { 18827951040fSNavdeep Parhar bcopy(&wr->wr[first_portion], &eq->desc[0], 18837951040fSNavdeep Parhar wr->wr_len - first_portion); 18847951040fSNavdeep Parhar } 18857951040fSNavdeep Parhar eq->pidx = n - (eq->sidx - eq->pidx); 18867951040fSNavdeep Parhar } 18877951040fSNavdeep Parhar 18887951040fSNavdeep Parhar if (available < eq->sidx / 4 && 18897951040fSNavdeep Parhar atomic_cmpset_int(&eq->equiq, 0, 1)) { 18907951040fSNavdeep Parhar dst->equiq_to_len16 |= htobe32(F_FW_WR_EQUIQ | 18917951040fSNavdeep Parhar F_FW_WR_EQUEQ); 18927951040fSNavdeep Parhar eq->equeqidx = eq->pidx; 18937951040fSNavdeep Parhar } else if (IDXDIFF(eq->pidx, eq->equeqidx, eq->sidx) >= 32) { 18947951040fSNavdeep Parhar dst->equiq_to_len16 |= htobe32(F_FW_WR_EQUEQ); 18957951040fSNavdeep Parhar eq->equeqidx = eq->pidx; 18967951040fSNavdeep Parhar } 18977951040fSNavdeep Parhar 18987951040fSNavdeep Parhar dbdiff += n; 18997951040fSNavdeep Parhar if (dbdiff >= 16) { 19007951040fSNavdeep Parhar ring_eq_db(sc, eq, dbdiff); 19017951040fSNavdeep Parhar dbdiff = 0; 19027951040fSNavdeep Parhar } 19037951040fSNavdeep Parhar 19047951040fSNavdeep Parhar STAILQ_REMOVE_HEAD(&wrq->wr_list, link); 19057951040fSNavdeep Parhar free_wrqe(wr); 19067951040fSNavdeep Parhar MPASS(wrq->nwr_pending > 0); 19077951040fSNavdeep Parhar wrq->nwr_pending--; 19087951040fSNavdeep Parhar MPASS(wrq->ndesc_needed >= n); 19097951040fSNavdeep Parhar wrq->ndesc_needed -= n; 19107951040fSNavdeep Parhar } while ((wr = STAILQ_FIRST(&wrq->wr_list)) != NULL); 19117951040fSNavdeep Parhar 19127951040fSNavdeep Parhar if (dbdiff) 19137951040fSNavdeep Parhar ring_eq_db(sc, eq, dbdiff); 19147951040fSNavdeep Parhar } 19157951040fSNavdeep Parhar 19167951040fSNavdeep Parhar /* 1917733b9277SNavdeep Parhar * Doesn't fail. Holds on to work requests it can't send right away. 1918733b9277SNavdeep Parhar */ 191909fe6320SNavdeep Parhar void 192009fe6320SNavdeep Parhar t4_wrq_tx_locked(struct adapter *sc, struct sge_wrq *wrq, struct wrqe *wr) 1921733b9277SNavdeep Parhar { 1922733b9277SNavdeep Parhar #ifdef INVARIANTS 19237951040fSNavdeep Parhar struct sge_eq *eq = &wrq->eq; 1924733b9277SNavdeep Parhar #endif 1925733b9277SNavdeep Parhar 19267951040fSNavdeep Parhar EQ_LOCK_ASSERT_OWNED(eq); 19277951040fSNavdeep Parhar MPASS(wr != NULL); 19287951040fSNavdeep Parhar MPASS(wr->wr_len > 0 && wr->wr_len <= SGE_MAX_WR_LEN); 19297951040fSNavdeep Parhar MPASS((wr->wr_len & 0x7) == 0); 1930733b9277SNavdeep Parhar 19317951040fSNavdeep Parhar STAILQ_INSERT_TAIL(&wrq->wr_list, wr, link); 19327951040fSNavdeep Parhar wrq->nwr_pending++; 19337951040fSNavdeep Parhar wrq->ndesc_needed += howmany(wr->wr_len, EQ_ESIZE); 1934733b9277SNavdeep Parhar 19357951040fSNavdeep Parhar if (!TAILQ_EMPTY(&wrq->incomplete_wrs)) 19367951040fSNavdeep Parhar return; /* commit_wrq_wr will drain wr_list as well. */ 1937733b9277SNavdeep Parhar 19387951040fSNavdeep Parhar drain_wrq_wr_list(sc, wrq); 1939733b9277SNavdeep Parhar 19407951040fSNavdeep Parhar /* Doorbell must have caught up to the pidx. */ 19417951040fSNavdeep Parhar MPASS(eq->pidx == eq->dbidx); 194254e4ee71SNavdeep Parhar } 194354e4ee71SNavdeep Parhar 194454e4ee71SNavdeep Parhar void 194554e4ee71SNavdeep Parhar t4_update_fl_bufsize(struct ifnet *ifp) 194654e4ee71SNavdeep Parhar { 1947fe2ebb76SJohn Baldwin struct vi_info *vi = ifp->if_softc; 1948fe2ebb76SJohn Baldwin struct adapter *sc = vi->pi->adapter; 194954e4ee71SNavdeep Parhar struct sge_rxq *rxq; 19506eb3180fSNavdeep Parhar #ifdef TCP_OFFLOAD 19516eb3180fSNavdeep Parhar struct sge_ofld_rxq *ofld_rxq; 19526eb3180fSNavdeep Parhar #endif 195354e4ee71SNavdeep Parhar struct sge_fl *fl; 195438035ed6SNavdeep Parhar int i, maxp, mtu = ifp->if_mtu; 195554e4ee71SNavdeep Parhar 195638035ed6SNavdeep Parhar maxp = mtu_to_max_payload(sc, mtu, 0); 1957fe2ebb76SJohn Baldwin for_each_rxq(vi, i, rxq) { 195854e4ee71SNavdeep Parhar fl = &rxq->fl; 195954e4ee71SNavdeep Parhar 196054e4ee71SNavdeep Parhar FL_LOCK(fl); 196138035ed6SNavdeep Parhar find_best_refill_source(sc, fl, maxp); 196254e4ee71SNavdeep Parhar FL_UNLOCK(fl); 196354e4ee71SNavdeep Parhar } 19646eb3180fSNavdeep Parhar #ifdef TCP_OFFLOAD 196538035ed6SNavdeep Parhar maxp = mtu_to_max_payload(sc, mtu, 1); 1966fe2ebb76SJohn Baldwin for_each_ofld_rxq(vi, i, ofld_rxq) { 19676eb3180fSNavdeep Parhar fl = &ofld_rxq->fl; 19686eb3180fSNavdeep Parhar 19696eb3180fSNavdeep Parhar FL_LOCK(fl); 197038035ed6SNavdeep Parhar find_best_refill_source(sc, fl, maxp); 19716eb3180fSNavdeep Parhar FL_UNLOCK(fl); 19726eb3180fSNavdeep Parhar } 19736eb3180fSNavdeep Parhar #endif 197454e4ee71SNavdeep Parhar } 197554e4ee71SNavdeep Parhar 19767951040fSNavdeep Parhar static inline int 19777951040fSNavdeep Parhar mbuf_nsegs(struct mbuf *m) 1978733b9277SNavdeep Parhar { 19790835ddc7SNavdeep Parhar 19807951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 19817951040fSNavdeep Parhar KASSERT(m->m_pkthdr.l5hlen > 0, 19827951040fSNavdeep Parhar ("%s: mbuf %p missing information on # of segments.", __func__, m)); 19837951040fSNavdeep Parhar 19847951040fSNavdeep Parhar return (m->m_pkthdr.l5hlen); 19857951040fSNavdeep Parhar } 19867951040fSNavdeep Parhar 19877951040fSNavdeep Parhar static inline void 19887951040fSNavdeep Parhar set_mbuf_nsegs(struct mbuf *m, uint8_t nsegs) 19897951040fSNavdeep Parhar { 19907951040fSNavdeep Parhar 19917951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 19927951040fSNavdeep Parhar m->m_pkthdr.l5hlen = nsegs; 19937951040fSNavdeep Parhar } 19947951040fSNavdeep Parhar 19957951040fSNavdeep Parhar static inline int 19967951040fSNavdeep Parhar mbuf_len16(struct mbuf *m) 19977951040fSNavdeep Parhar { 19987951040fSNavdeep Parhar int n; 19997951040fSNavdeep Parhar 20007951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 20017951040fSNavdeep Parhar n = m->m_pkthdr.PH_loc.eight[0]; 20027951040fSNavdeep Parhar MPASS(n > 0 && n <= SGE_MAX_WR_LEN / 16); 20037951040fSNavdeep Parhar 20047951040fSNavdeep Parhar return (n); 20057951040fSNavdeep Parhar } 20067951040fSNavdeep Parhar 20077951040fSNavdeep Parhar static inline void 20087951040fSNavdeep Parhar set_mbuf_len16(struct mbuf *m, uint8_t len16) 20097951040fSNavdeep Parhar { 20107951040fSNavdeep Parhar 20117951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 20127951040fSNavdeep Parhar m->m_pkthdr.PH_loc.eight[0] = len16; 20137951040fSNavdeep Parhar } 20147951040fSNavdeep Parhar 20157951040fSNavdeep Parhar static inline int 20167951040fSNavdeep Parhar needs_tso(struct mbuf *m) 20177951040fSNavdeep Parhar { 20187951040fSNavdeep Parhar 20197951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 20207951040fSNavdeep Parhar 20217951040fSNavdeep Parhar if (m->m_pkthdr.csum_flags & CSUM_TSO) { 20227951040fSNavdeep Parhar KASSERT(m->m_pkthdr.tso_segsz > 0, 20237951040fSNavdeep Parhar ("%s: TSO requested in mbuf %p but MSS not provided", 20247951040fSNavdeep Parhar __func__, m)); 20257951040fSNavdeep Parhar return (1); 20267951040fSNavdeep Parhar } 20277951040fSNavdeep Parhar 20287951040fSNavdeep Parhar return (0); 20297951040fSNavdeep Parhar } 20307951040fSNavdeep Parhar 20317951040fSNavdeep Parhar static inline int 20327951040fSNavdeep Parhar needs_l3_csum(struct mbuf *m) 20337951040fSNavdeep Parhar { 20347951040fSNavdeep Parhar 20357951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 20367951040fSNavdeep Parhar 20377951040fSNavdeep Parhar if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TSO)) 20387951040fSNavdeep Parhar return (1); 20397951040fSNavdeep Parhar return (0); 20407951040fSNavdeep Parhar } 20417951040fSNavdeep Parhar 20427951040fSNavdeep Parhar static inline int 20437951040fSNavdeep Parhar needs_l4_csum(struct mbuf *m) 20447951040fSNavdeep Parhar { 20457951040fSNavdeep Parhar 20467951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 20477951040fSNavdeep Parhar 20487951040fSNavdeep Parhar if (m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_UDP_IPV6 | 20497951040fSNavdeep Parhar CSUM_TCP_IPV6 | CSUM_TSO)) 20507951040fSNavdeep Parhar return (1); 20517951040fSNavdeep Parhar return (0); 20527951040fSNavdeep Parhar } 20537951040fSNavdeep Parhar 20547951040fSNavdeep Parhar static inline int 20557951040fSNavdeep Parhar needs_vlan_insertion(struct mbuf *m) 20567951040fSNavdeep Parhar { 20577951040fSNavdeep Parhar 20587951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 20597951040fSNavdeep Parhar 20607951040fSNavdeep Parhar if (m->m_flags & M_VLANTAG) { 20617951040fSNavdeep Parhar KASSERT(m->m_pkthdr.ether_vtag != 0, 20627951040fSNavdeep Parhar ("%s: HWVLAN requested in mbuf %p but tag not provided", 20637951040fSNavdeep Parhar __func__, m)); 20647951040fSNavdeep Parhar return (1); 20657951040fSNavdeep Parhar } 20667951040fSNavdeep Parhar return (0); 20677951040fSNavdeep Parhar } 20687951040fSNavdeep Parhar 20697951040fSNavdeep Parhar static void * 20707951040fSNavdeep Parhar m_advance(struct mbuf **pm, int *poffset, int len) 20717951040fSNavdeep Parhar { 20727951040fSNavdeep Parhar struct mbuf *m = *pm; 20737951040fSNavdeep Parhar int offset = *poffset; 20747951040fSNavdeep Parhar uintptr_t p = 0; 20757951040fSNavdeep Parhar 20767951040fSNavdeep Parhar MPASS(len > 0); 20777951040fSNavdeep Parhar 20787951040fSNavdeep Parhar while (len) { 20797951040fSNavdeep Parhar if (offset + len < m->m_len) { 20807951040fSNavdeep Parhar offset += len; 20817951040fSNavdeep Parhar p = mtod(m, uintptr_t) + offset; 20827951040fSNavdeep Parhar break; 20837951040fSNavdeep Parhar } 20847951040fSNavdeep Parhar len -= m->m_len - offset; 20857951040fSNavdeep Parhar m = m->m_next; 20867951040fSNavdeep Parhar offset = 0; 20877951040fSNavdeep Parhar MPASS(m != NULL); 20887951040fSNavdeep Parhar } 20897951040fSNavdeep Parhar *poffset = offset; 20907951040fSNavdeep Parhar *pm = m; 20917951040fSNavdeep Parhar return ((void *)p); 20927951040fSNavdeep Parhar } 20937951040fSNavdeep Parhar 20947951040fSNavdeep Parhar static inline int 20957951040fSNavdeep Parhar same_paddr(char *a, char *b) 20967951040fSNavdeep Parhar { 20977951040fSNavdeep Parhar 20987951040fSNavdeep Parhar if (a == b) 20997951040fSNavdeep Parhar return (1); 21007951040fSNavdeep Parhar else if (a != NULL && b != NULL) { 21017951040fSNavdeep Parhar vm_offset_t x = (vm_offset_t)a; 21027951040fSNavdeep Parhar vm_offset_t y = (vm_offset_t)b; 21037951040fSNavdeep Parhar 21047951040fSNavdeep Parhar if ((x & PAGE_MASK) == (y & PAGE_MASK) && 21057951040fSNavdeep Parhar pmap_kextract(x) == pmap_kextract(y)) 21067951040fSNavdeep Parhar return (1); 21077951040fSNavdeep Parhar } 21087951040fSNavdeep Parhar 21097951040fSNavdeep Parhar return (0); 21107951040fSNavdeep Parhar } 21117951040fSNavdeep Parhar 21127951040fSNavdeep Parhar /* 21137951040fSNavdeep Parhar * Can deal with empty mbufs in the chain that have m_len = 0, but the chain 21147951040fSNavdeep Parhar * must have at least one mbuf that's not empty. 21157951040fSNavdeep Parhar */ 21167951040fSNavdeep Parhar static inline int 21177951040fSNavdeep Parhar count_mbuf_nsegs(struct mbuf *m) 21187951040fSNavdeep Parhar { 21197951040fSNavdeep Parhar char *prev_end, *start; 21207951040fSNavdeep Parhar int len, nsegs; 21217951040fSNavdeep Parhar 21227951040fSNavdeep Parhar MPASS(m != NULL); 21237951040fSNavdeep Parhar 21247951040fSNavdeep Parhar nsegs = 0; 21257951040fSNavdeep Parhar prev_end = NULL; 21267951040fSNavdeep Parhar for (; m; m = m->m_next) { 21277951040fSNavdeep Parhar 21287951040fSNavdeep Parhar len = m->m_len; 21297951040fSNavdeep Parhar if (__predict_false(len == 0)) 21307951040fSNavdeep Parhar continue; 21317951040fSNavdeep Parhar start = mtod(m, char *); 21327951040fSNavdeep Parhar 21337951040fSNavdeep Parhar nsegs += sglist_count(start, len); 21347951040fSNavdeep Parhar if (same_paddr(prev_end, start)) 21357951040fSNavdeep Parhar nsegs--; 21367951040fSNavdeep Parhar prev_end = start + len; 21377951040fSNavdeep Parhar } 21387951040fSNavdeep Parhar 21397951040fSNavdeep Parhar MPASS(nsegs > 0); 21407951040fSNavdeep Parhar return (nsegs); 21417951040fSNavdeep Parhar } 21427951040fSNavdeep Parhar 21437951040fSNavdeep Parhar /* 21447951040fSNavdeep Parhar * Analyze the mbuf to determine its tx needs. The mbuf passed in may change: 21457951040fSNavdeep Parhar * a) caller can assume it's been freed if this function returns with an error. 21467951040fSNavdeep Parhar * b) it may get defragged up if the gather list is too long for the hardware. 21477951040fSNavdeep Parhar */ 21487951040fSNavdeep Parhar int 21497951040fSNavdeep Parhar parse_pkt(struct mbuf **mp) 21507951040fSNavdeep Parhar { 21517951040fSNavdeep Parhar struct mbuf *m0 = *mp, *m; 21527951040fSNavdeep Parhar int rc, nsegs, defragged = 0, offset; 21537951040fSNavdeep Parhar struct ether_header *eh; 21547951040fSNavdeep Parhar void *l3hdr; 21557951040fSNavdeep Parhar #if defined(INET) || defined(INET6) 21567951040fSNavdeep Parhar struct tcphdr *tcp; 21577951040fSNavdeep Parhar #endif 21587951040fSNavdeep Parhar uint16_t eh_type; 21597951040fSNavdeep Parhar 21607951040fSNavdeep Parhar M_ASSERTPKTHDR(m0); 21617951040fSNavdeep Parhar if (__predict_false(m0->m_pkthdr.len < ETHER_HDR_LEN)) { 21627951040fSNavdeep Parhar rc = EINVAL; 21637951040fSNavdeep Parhar fail: 21647951040fSNavdeep Parhar m_freem(m0); 21657951040fSNavdeep Parhar *mp = NULL; 21667951040fSNavdeep Parhar return (rc); 21677951040fSNavdeep Parhar } 21687951040fSNavdeep Parhar restart: 21697951040fSNavdeep Parhar /* 21707951040fSNavdeep Parhar * First count the number of gather list segments in the payload. 21717951040fSNavdeep Parhar * Defrag the mbuf if nsegs exceeds the hardware limit. 21727951040fSNavdeep Parhar */ 21737951040fSNavdeep Parhar M_ASSERTPKTHDR(m0); 21747951040fSNavdeep Parhar MPASS(m0->m_pkthdr.len > 0); 21757951040fSNavdeep Parhar nsegs = count_mbuf_nsegs(m0); 21767951040fSNavdeep Parhar if (nsegs > (needs_tso(m0) ? TX_SGL_SEGS_TSO : TX_SGL_SEGS)) { 21777951040fSNavdeep Parhar if (defragged++ > 0 || (m = m_defrag(m0, M_NOWAIT)) == NULL) { 21787951040fSNavdeep Parhar rc = EFBIG; 21797951040fSNavdeep Parhar goto fail; 21807951040fSNavdeep Parhar } 21817951040fSNavdeep Parhar *mp = m0 = m; /* update caller's copy after defrag */ 21827951040fSNavdeep Parhar goto restart; 21837951040fSNavdeep Parhar } 21847951040fSNavdeep Parhar 21857951040fSNavdeep Parhar if (__predict_false(nsegs > 2 && m0->m_pkthdr.len <= MHLEN)) { 21867951040fSNavdeep Parhar m0 = m_pullup(m0, m0->m_pkthdr.len); 21877951040fSNavdeep Parhar if (m0 == NULL) { 21887951040fSNavdeep Parhar /* Should have left well enough alone. */ 21897951040fSNavdeep Parhar rc = EFBIG; 21907951040fSNavdeep Parhar goto fail; 21917951040fSNavdeep Parhar } 21927951040fSNavdeep Parhar *mp = m0; /* update caller's copy after pullup */ 21937951040fSNavdeep Parhar goto restart; 21947951040fSNavdeep Parhar } 21957951040fSNavdeep Parhar set_mbuf_nsegs(m0, nsegs); 21967951040fSNavdeep Parhar set_mbuf_len16(m0, txpkt_len16(nsegs, needs_tso(m0))); 21977951040fSNavdeep Parhar 21987951040fSNavdeep Parhar if (!needs_tso(m0)) 21997951040fSNavdeep Parhar return (0); 22007951040fSNavdeep Parhar 22017951040fSNavdeep Parhar m = m0; 22027951040fSNavdeep Parhar eh = mtod(m, struct ether_header *); 22037951040fSNavdeep Parhar eh_type = ntohs(eh->ether_type); 22047951040fSNavdeep Parhar if (eh_type == ETHERTYPE_VLAN) { 22057951040fSNavdeep Parhar struct ether_vlan_header *evh = (void *)eh; 22067951040fSNavdeep Parhar 22077951040fSNavdeep Parhar eh_type = ntohs(evh->evl_proto); 22087951040fSNavdeep Parhar m0->m_pkthdr.l2hlen = sizeof(*evh); 22097951040fSNavdeep Parhar } else 22107951040fSNavdeep Parhar m0->m_pkthdr.l2hlen = sizeof(*eh); 22117951040fSNavdeep Parhar 22127951040fSNavdeep Parhar offset = 0; 22137951040fSNavdeep Parhar l3hdr = m_advance(&m, &offset, m0->m_pkthdr.l2hlen); 22147951040fSNavdeep Parhar 22157951040fSNavdeep Parhar switch (eh_type) { 22167951040fSNavdeep Parhar #ifdef INET6 22177951040fSNavdeep Parhar case ETHERTYPE_IPV6: 22187951040fSNavdeep Parhar { 22197951040fSNavdeep Parhar struct ip6_hdr *ip6 = l3hdr; 22207951040fSNavdeep Parhar 22217951040fSNavdeep Parhar MPASS(ip6->ip6_nxt == IPPROTO_TCP); 22227951040fSNavdeep Parhar 22237951040fSNavdeep Parhar m0->m_pkthdr.l3hlen = sizeof(*ip6); 22247951040fSNavdeep Parhar break; 22257951040fSNavdeep Parhar } 22267951040fSNavdeep Parhar #endif 22277951040fSNavdeep Parhar #ifdef INET 22287951040fSNavdeep Parhar case ETHERTYPE_IP: 22297951040fSNavdeep Parhar { 22307951040fSNavdeep Parhar struct ip *ip = l3hdr; 22317951040fSNavdeep Parhar 22327951040fSNavdeep Parhar m0->m_pkthdr.l3hlen = ip->ip_hl * 4; 22337951040fSNavdeep Parhar break; 22347951040fSNavdeep Parhar } 22357951040fSNavdeep Parhar #endif 22367951040fSNavdeep Parhar default: 22377951040fSNavdeep Parhar panic("%s: ethertype 0x%04x unknown. if_cxgbe must be compiled" 22387951040fSNavdeep Parhar " with the same INET/INET6 options as the kernel.", 22397951040fSNavdeep Parhar __func__, eh_type); 22407951040fSNavdeep Parhar } 22417951040fSNavdeep Parhar 22427951040fSNavdeep Parhar #if defined(INET) || defined(INET6) 22437951040fSNavdeep Parhar tcp = m_advance(&m, &offset, m0->m_pkthdr.l3hlen); 22447951040fSNavdeep Parhar m0->m_pkthdr.l4hlen = tcp->th_off * 4; 22457951040fSNavdeep Parhar #endif 22467951040fSNavdeep Parhar MPASS(m0 == *mp); 22477951040fSNavdeep Parhar return (0); 22487951040fSNavdeep Parhar } 22497951040fSNavdeep Parhar 22507951040fSNavdeep Parhar void * 22517951040fSNavdeep Parhar start_wrq_wr(struct sge_wrq *wrq, int len16, struct wrq_cookie *cookie) 22527951040fSNavdeep Parhar { 22537951040fSNavdeep Parhar struct sge_eq *eq = &wrq->eq; 22547951040fSNavdeep Parhar struct adapter *sc = wrq->adapter; 22557951040fSNavdeep Parhar int ndesc, available; 22567951040fSNavdeep Parhar struct wrqe *wr; 22577951040fSNavdeep Parhar void *w; 22587951040fSNavdeep Parhar 22597951040fSNavdeep Parhar MPASS(len16 > 0); 22607951040fSNavdeep Parhar ndesc = howmany(len16, EQ_ESIZE / 16); 22617951040fSNavdeep Parhar MPASS(ndesc > 0 && ndesc <= SGE_MAX_WR_NDESC); 22627951040fSNavdeep Parhar 22637951040fSNavdeep Parhar EQ_LOCK(eq); 22647951040fSNavdeep Parhar 22657951040fSNavdeep Parhar if (!STAILQ_EMPTY(&wrq->wr_list)) 22667951040fSNavdeep Parhar drain_wrq_wr_list(sc, wrq); 22677951040fSNavdeep Parhar 22687951040fSNavdeep Parhar if (!STAILQ_EMPTY(&wrq->wr_list)) { 22697951040fSNavdeep Parhar slowpath: 22707951040fSNavdeep Parhar EQ_UNLOCK(eq); 22717951040fSNavdeep Parhar wr = alloc_wrqe(len16 * 16, wrq); 22727951040fSNavdeep Parhar if (__predict_false(wr == NULL)) 22737951040fSNavdeep Parhar return (NULL); 22747951040fSNavdeep Parhar cookie->pidx = -1; 22757951040fSNavdeep Parhar cookie->ndesc = ndesc; 22767951040fSNavdeep Parhar return (&wr->wr); 22777951040fSNavdeep Parhar } 22787951040fSNavdeep Parhar 22797951040fSNavdeep Parhar eq->cidx = read_hw_cidx(eq); 22807951040fSNavdeep Parhar if (eq->pidx == eq->cidx) 22817951040fSNavdeep Parhar available = eq->sidx - 1; 22827951040fSNavdeep Parhar else 22837951040fSNavdeep Parhar available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1; 22847951040fSNavdeep Parhar if (available < ndesc) 22857951040fSNavdeep Parhar goto slowpath; 22867951040fSNavdeep Parhar 22877951040fSNavdeep Parhar cookie->pidx = eq->pidx; 22887951040fSNavdeep Parhar cookie->ndesc = ndesc; 22897951040fSNavdeep Parhar TAILQ_INSERT_TAIL(&wrq->incomplete_wrs, cookie, link); 22907951040fSNavdeep Parhar 22917951040fSNavdeep Parhar w = &eq->desc[eq->pidx]; 22927951040fSNavdeep Parhar IDXINCR(eq->pidx, ndesc, eq->sidx); 22937951040fSNavdeep Parhar if (__predict_false(eq->pidx < ndesc - 1)) { 22947951040fSNavdeep Parhar w = &wrq->ss[0]; 22957951040fSNavdeep Parhar wrq->ss_pidx = cookie->pidx; 22967951040fSNavdeep Parhar wrq->ss_len = len16 * 16; 22977951040fSNavdeep Parhar } 22987951040fSNavdeep Parhar 22997951040fSNavdeep Parhar EQ_UNLOCK(eq); 23007951040fSNavdeep Parhar 23017951040fSNavdeep Parhar return (w); 23027951040fSNavdeep Parhar } 23037951040fSNavdeep Parhar 23047951040fSNavdeep Parhar void 23057951040fSNavdeep Parhar commit_wrq_wr(struct sge_wrq *wrq, void *w, struct wrq_cookie *cookie) 23067951040fSNavdeep Parhar { 23077951040fSNavdeep Parhar struct sge_eq *eq = &wrq->eq; 23087951040fSNavdeep Parhar struct adapter *sc = wrq->adapter; 23097951040fSNavdeep Parhar int ndesc, pidx; 23107951040fSNavdeep Parhar struct wrq_cookie *prev, *next; 23117951040fSNavdeep Parhar 23127951040fSNavdeep Parhar if (cookie->pidx == -1) { 23137951040fSNavdeep Parhar struct wrqe *wr = __containerof(w, struct wrqe, wr); 23147951040fSNavdeep Parhar 23157951040fSNavdeep Parhar t4_wrq_tx(sc, wr); 23167951040fSNavdeep Parhar return; 23177951040fSNavdeep Parhar } 23187951040fSNavdeep Parhar 23197951040fSNavdeep Parhar ndesc = cookie->ndesc; /* Can be more than SGE_MAX_WR_NDESC here. */ 23207951040fSNavdeep Parhar pidx = cookie->pidx; 23217951040fSNavdeep Parhar MPASS(pidx >= 0 && pidx < eq->sidx); 23227951040fSNavdeep Parhar if (__predict_false(w == &wrq->ss[0])) { 23237951040fSNavdeep Parhar int n = (eq->sidx - wrq->ss_pidx) * EQ_ESIZE; 23247951040fSNavdeep Parhar 23257951040fSNavdeep Parhar MPASS(wrq->ss_len > n); /* WR had better wrap around. */ 23267951040fSNavdeep Parhar bcopy(&wrq->ss[0], &eq->desc[wrq->ss_pidx], n); 23277951040fSNavdeep Parhar bcopy(&wrq->ss[n], &eq->desc[0], wrq->ss_len - n); 23287951040fSNavdeep Parhar wrq->tx_wrs_ss++; 23297951040fSNavdeep Parhar } else 23307951040fSNavdeep Parhar wrq->tx_wrs_direct++; 23317951040fSNavdeep Parhar 23327951040fSNavdeep Parhar EQ_LOCK(eq); 23337951040fSNavdeep Parhar prev = TAILQ_PREV(cookie, wrq_incomplete_wrs, link); 23347951040fSNavdeep Parhar next = TAILQ_NEXT(cookie, link); 23357951040fSNavdeep Parhar if (prev == NULL) { 23367951040fSNavdeep Parhar MPASS(pidx == eq->dbidx); 23377951040fSNavdeep Parhar if (next == NULL || ndesc >= 16) 23387951040fSNavdeep Parhar ring_eq_db(wrq->adapter, eq, ndesc); 23397951040fSNavdeep Parhar else { 23407951040fSNavdeep Parhar MPASS(IDXDIFF(next->pidx, pidx, eq->sidx) == ndesc); 23417951040fSNavdeep Parhar next->pidx = pidx; 23427951040fSNavdeep Parhar next->ndesc += ndesc; 23437951040fSNavdeep Parhar } 23447951040fSNavdeep Parhar } else { 23457951040fSNavdeep Parhar MPASS(IDXDIFF(pidx, prev->pidx, eq->sidx) == prev->ndesc); 23467951040fSNavdeep Parhar prev->ndesc += ndesc; 23477951040fSNavdeep Parhar } 23487951040fSNavdeep Parhar TAILQ_REMOVE(&wrq->incomplete_wrs, cookie, link); 23497951040fSNavdeep Parhar 23507951040fSNavdeep Parhar if (TAILQ_EMPTY(&wrq->incomplete_wrs) && !STAILQ_EMPTY(&wrq->wr_list)) 23517951040fSNavdeep Parhar drain_wrq_wr_list(sc, wrq); 23527951040fSNavdeep Parhar 23537951040fSNavdeep Parhar #ifdef INVARIANTS 23547951040fSNavdeep Parhar if (TAILQ_EMPTY(&wrq->incomplete_wrs)) { 23557951040fSNavdeep Parhar /* Doorbell must have caught up to the pidx. */ 23567951040fSNavdeep Parhar MPASS(wrq->eq.pidx == wrq->eq.dbidx); 23577951040fSNavdeep Parhar } 23587951040fSNavdeep Parhar #endif 23597951040fSNavdeep Parhar EQ_UNLOCK(eq); 23607951040fSNavdeep Parhar } 23617951040fSNavdeep Parhar 23627951040fSNavdeep Parhar static u_int 23637951040fSNavdeep Parhar can_resume_eth_tx(struct mp_ring *r) 23647951040fSNavdeep Parhar { 23657951040fSNavdeep Parhar struct sge_eq *eq = r->cookie; 23667951040fSNavdeep Parhar 23677951040fSNavdeep Parhar return (total_available_tx_desc(eq) > eq->sidx / 8); 23687951040fSNavdeep Parhar } 23697951040fSNavdeep Parhar 23707951040fSNavdeep Parhar static inline int 23717951040fSNavdeep Parhar cannot_use_txpkts(struct mbuf *m) 23727951040fSNavdeep Parhar { 23737951040fSNavdeep Parhar /* maybe put a GL limit too, to avoid silliness? */ 23747951040fSNavdeep Parhar 23757951040fSNavdeep Parhar return (needs_tso(m)); 23767951040fSNavdeep Parhar } 23777951040fSNavdeep Parhar 23787951040fSNavdeep Parhar /* 23797951040fSNavdeep Parhar * r->items[cidx] to r->items[pidx], with a wraparound at r->size, are ready to 23807951040fSNavdeep Parhar * be consumed. Return the actual number consumed. 0 indicates a stall. 23817951040fSNavdeep Parhar */ 23827951040fSNavdeep Parhar static u_int 23837951040fSNavdeep Parhar eth_tx(struct mp_ring *r, u_int cidx, u_int pidx) 23847951040fSNavdeep Parhar { 23857951040fSNavdeep Parhar struct sge_txq *txq = r->cookie; 23867951040fSNavdeep Parhar struct sge_eq *eq = &txq->eq; 23877951040fSNavdeep Parhar struct ifnet *ifp = txq->ifp; 2388fe2ebb76SJohn Baldwin struct vi_info *vi = ifp->if_softc; 2389fe2ebb76SJohn Baldwin struct port_info *pi = vi->pi; 23907951040fSNavdeep Parhar struct adapter *sc = pi->adapter; 23917951040fSNavdeep Parhar u_int total, remaining; /* # of packets */ 23927951040fSNavdeep Parhar u_int available, dbdiff; /* # of hardware descriptors */ 23937951040fSNavdeep Parhar u_int n, next_cidx; 23947951040fSNavdeep Parhar struct mbuf *m0, *tail; 23957951040fSNavdeep Parhar struct txpkts txp; 23967951040fSNavdeep Parhar struct fw_eth_tx_pkts_wr *wr; /* any fw WR struct will do */ 23977951040fSNavdeep Parhar 23987951040fSNavdeep Parhar remaining = IDXDIFF(pidx, cidx, r->size); 23997951040fSNavdeep Parhar MPASS(remaining > 0); /* Must not be called without work to do. */ 24007951040fSNavdeep Parhar total = 0; 24017951040fSNavdeep Parhar 24027951040fSNavdeep Parhar TXQ_LOCK(txq); 24037951040fSNavdeep Parhar if (__predict_false((eq->flags & EQ_ENABLED) == 0)) { 24047951040fSNavdeep Parhar while (cidx != pidx) { 24057951040fSNavdeep Parhar m0 = r->items[cidx]; 24067951040fSNavdeep Parhar m_freem(m0); 24077951040fSNavdeep Parhar if (++cidx == r->size) 24087951040fSNavdeep Parhar cidx = 0; 24097951040fSNavdeep Parhar } 24107951040fSNavdeep Parhar reclaim_tx_descs(txq, 2048); 24117951040fSNavdeep Parhar total = remaining; 24127951040fSNavdeep Parhar goto done; 24137951040fSNavdeep Parhar } 24147951040fSNavdeep Parhar 24157951040fSNavdeep Parhar /* How many hardware descriptors do we have readily available. */ 24167951040fSNavdeep Parhar if (eq->pidx == eq->cidx) 24177951040fSNavdeep Parhar available = eq->sidx - 1; 24187951040fSNavdeep Parhar else 24197951040fSNavdeep Parhar available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1; 24207951040fSNavdeep Parhar dbdiff = IDXDIFF(eq->pidx, eq->dbidx, eq->sidx); 24217951040fSNavdeep Parhar 24227951040fSNavdeep Parhar while (remaining > 0) { 24237951040fSNavdeep Parhar 24247951040fSNavdeep Parhar m0 = r->items[cidx]; 24257951040fSNavdeep Parhar M_ASSERTPKTHDR(m0); 24267951040fSNavdeep Parhar MPASS(m0->m_nextpkt == NULL); 24277951040fSNavdeep Parhar 24287951040fSNavdeep Parhar if (available < SGE_MAX_WR_NDESC) { 24297951040fSNavdeep Parhar available += reclaim_tx_descs(txq, 64); 24307951040fSNavdeep Parhar if (available < howmany(mbuf_len16(m0), EQ_ESIZE / 16)) 24317951040fSNavdeep Parhar break; /* out of descriptors */ 24327951040fSNavdeep Parhar } 24337951040fSNavdeep Parhar 24347951040fSNavdeep Parhar next_cidx = cidx + 1; 24357951040fSNavdeep Parhar if (__predict_false(next_cidx == r->size)) 24367951040fSNavdeep Parhar next_cidx = 0; 24377951040fSNavdeep Parhar 24387951040fSNavdeep Parhar wr = (void *)&eq->desc[eq->pidx]; 24397951040fSNavdeep Parhar if (remaining > 1 && 24407951040fSNavdeep Parhar try_txpkts(m0, r->items[next_cidx], &txp, available) == 0) { 24417951040fSNavdeep Parhar 24427951040fSNavdeep Parhar /* pkts at cidx, next_cidx should both be in txp. */ 24437951040fSNavdeep Parhar MPASS(txp.npkt == 2); 24447951040fSNavdeep Parhar tail = r->items[next_cidx]; 24457951040fSNavdeep Parhar MPASS(tail->m_nextpkt == NULL); 24467951040fSNavdeep Parhar ETHER_BPF_MTAP(ifp, m0); 24477951040fSNavdeep Parhar ETHER_BPF_MTAP(ifp, tail); 24487951040fSNavdeep Parhar m0->m_nextpkt = tail; 24497951040fSNavdeep Parhar 24507951040fSNavdeep Parhar if (__predict_false(++next_cidx == r->size)) 24517951040fSNavdeep Parhar next_cidx = 0; 24527951040fSNavdeep Parhar 24537951040fSNavdeep Parhar while (next_cidx != pidx) { 24547951040fSNavdeep Parhar if (add_to_txpkts(r->items[next_cidx], &txp, 24557951040fSNavdeep Parhar available) != 0) 24567951040fSNavdeep Parhar break; 24577951040fSNavdeep Parhar tail->m_nextpkt = r->items[next_cidx]; 24587951040fSNavdeep Parhar tail = tail->m_nextpkt; 24597951040fSNavdeep Parhar ETHER_BPF_MTAP(ifp, tail); 24607951040fSNavdeep Parhar if (__predict_false(++next_cidx == r->size)) 24617951040fSNavdeep Parhar next_cidx = 0; 24627951040fSNavdeep Parhar } 24637951040fSNavdeep Parhar 24647951040fSNavdeep Parhar n = write_txpkts_wr(txq, wr, m0, &txp, available); 24657951040fSNavdeep Parhar total += txp.npkt; 24667951040fSNavdeep Parhar remaining -= txp.npkt; 24677951040fSNavdeep Parhar } else { 24687951040fSNavdeep Parhar total++; 24697951040fSNavdeep Parhar remaining--; 24707951040fSNavdeep Parhar ETHER_BPF_MTAP(ifp, m0); 247178552b23SNavdeep Parhar n = write_txpkt_wr(txq, (void *)wr, m0, available); 24727951040fSNavdeep Parhar } 24737951040fSNavdeep Parhar MPASS(n >= 1 && n <= available && n <= SGE_MAX_WR_NDESC); 24747951040fSNavdeep Parhar 24757951040fSNavdeep Parhar available -= n; 24767951040fSNavdeep Parhar dbdiff += n; 24777951040fSNavdeep Parhar IDXINCR(eq->pidx, n, eq->sidx); 24787951040fSNavdeep Parhar 24797951040fSNavdeep Parhar if (total_available_tx_desc(eq) < eq->sidx / 4 && 24807951040fSNavdeep Parhar atomic_cmpset_int(&eq->equiq, 0, 1)) { 24817951040fSNavdeep Parhar wr->equiq_to_len16 |= htobe32(F_FW_WR_EQUIQ | 24827951040fSNavdeep Parhar F_FW_WR_EQUEQ); 24837951040fSNavdeep Parhar eq->equeqidx = eq->pidx; 24847951040fSNavdeep Parhar } else if (IDXDIFF(eq->pidx, eq->equeqidx, eq->sidx) >= 32) { 24857951040fSNavdeep Parhar wr->equiq_to_len16 |= htobe32(F_FW_WR_EQUEQ); 24867951040fSNavdeep Parhar eq->equeqidx = eq->pidx; 24877951040fSNavdeep Parhar } 24887951040fSNavdeep Parhar 24897951040fSNavdeep Parhar if (dbdiff >= 16 && remaining >= 4) { 24907951040fSNavdeep Parhar ring_eq_db(sc, eq, dbdiff); 24917951040fSNavdeep Parhar available += reclaim_tx_descs(txq, 4 * dbdiff); 24927951040fSNavdeep Parhar dbdiff = 0; 24937951040fSNavdeep Parhar } 24947951040fSNavdeep Parhar 24957951040fSNavdeep Parhar cidx = next_cidx; 24967951040fSNavdeep Parhar } 24977951040fSNavdeep Parhar if (dbdiff != 0) { 24987951040fSNavdeep Parhar ring_eq_db(sc, eq, dbdiff); 24997951040fSNavdeep Parhar reclaim_tx_descs(txq, 32); 25007951040fSNavdeep Parhar } 25017951040fSNavdeep Parhar done: 25027951040fSNavdeep Parhar TXQ_UNLOCK(txq); 25037951040fSNavdeep Parhar 25047951040fSNavdeep Parhar return (total); 2505733b9277SNavdeep Parhar } 2506733b9277SNavdeep Parhar 250754e4ee71SNavdeep Parhar static inline void 250854e4ee71SNavdeep Parhar init_iq(struct sge_iq *iq, struct adapter *sc, int tmr_idx, int pktc_idx, 2509b2daa9a9SNavdeep Parhar int qsize) 251054e4ee71SNavdeep Parhar { 2511b2daa9a9SNavdeep Parhar 251254e4ee71SNavdeep Parhar KASSERT(tmr_idx >= 0 && tmr_idx < SGE_NTIMERS, 251354e4ee71SNavdeep Parhar ("%s: bad tmr_idx %d", __func__, tmr_idx)); 251454e4ee71SNavdeep Parhar KASSERT(pktc_idx < SGE_NCOUNTERS, /* -ve is ok, means don't use */ 251554e4ee71SNavdeep Parhar ("%s: bad pktc_idx %d", __func__, pktc_idx)); 251654e4ee71SNavdeep Parhar 251754e4ee71SNavdeep Parhar iq->flags = 0; 251854e4ee71SNavdeep Parhar iq->adapter = sc; 25197a32954cSNavdeep Parhar iq->intr_params = V_QINTR_TIMER_IDX(tmr_idx); 25207a32954cSNavdeep Parhar iq->intr_pktc_idx = SGE_NCOUNTERS - 1; 25217a32954cSNavdeep Parhar if (pktc_idx >= 0) { 25227a32954cSNavdeep Parhar iq->intr_params |= F_QINTR_CNT_EN; 252354e4ee71SNavdeep Parhar iq->intr_pktc_idx = pktc_idx; 25247a32954cSNavdeep Parhar } 2525d14b0ac1SNavdeep Parhar iq->qsize = roundup2(qsize, 16); /* See FW_IQ_CMD/iqsize */ 252690e7434aSNavdeep Parhar iq->sidx = iq->qsize - sc->params.sge.spg_len / IQ_ESIZE; 252754e4ee71SNavdeep Parhar } 252854e4ee71SNavdeep Parhar 252954e4ee71SNavdeep Parhar static inline void 2530e3207e19SNavdeep Parhar init_fl(struct adapter *sc, struct sge_fl *fl, int qsize, int maxp, char *name) 253154e4ee71SNavdeep Parhar { 25321458bff9SNavdeep Parhar 253354e4ee71SNavdeep Parhar fl->qsize = qsize; 253490e7434aSNavdeep Parhar fl->sidx = qsize - sc->params.sge.spg_len / EQ_ESIZE; 253554e4ee71SNavdeep Parhar strlcpy(fl->lockname, name, sizeof(fl->lockname)); 2536e3207e19SNavdeep Parhar if (sc->flags & BUF_PACKING_OK && 2537e3207e19SNavdeep Parhar ((!is_t4(sc) && buffer_packing) || /* T5+: enabled unless 0 */ 2538e3207e19SNavdeep Parhar (is_t4(sc) && buffer_packing == 1)))/* T4: disabled unless 1 */ 25391458bff9SNavdeep Parhar fl->flags |= FL_BUF_PACKING; 254038035ed6SNavdeep Parhar find_best_refill_source(sc, fl, maxp); 254138035ed6SNavdeep Parhar find_safe_refill_source(sc, fl); 254254e4ee71SNavdeep Parhar } 254354e4ee71SNavdeep Parhar 254454e4ee71SNavdeep Parhar static inline void 254590e7434aSNavdeep Parhar init_eq(struct adapter *sc, struct sge_eq *eq, int eqtype, int qsize, 254690e7434aSNavdeep Parhar uint8_t tx_chan, uint16_t iqid, char *name) 254754e4ee71SNavdeep Parhar { 2548733b9277SNavdeep Parhar KASSERT(eqtype <= EQ_TYPEMASK, ("%s: bad qtype %d", __func__, eqtype)); 2549733b9277SNavdeep Parhar 2550733b9277SNavdeep Parhar eq->flags = eqtype & EQ_TYPEMASK; 2551733b9277SNavdeep Parhar eq->tx_chan = tx_chan; 2552733b9277SNavdeep Parhar eq->iqid = iqid; 255390e7434aSNavdeep Parhar eq->sidx = qsize - sc->params.sge.spg_len / EQ_ESIZE; 2554f7dfe243SNavdeep Parhar strlcpy(eq->lockname, name, sizeof(eq->lockname)); 255554e4ee71SNavdeep Parhar } 255654e4ee71SNavdeep Parhar 255754e4ee71SNavdeep Parhar static int 255854e4ee71SNavdeep Parhar alloc_ring(struct adapter *sc, size_t len, bus_dma_tag_t *tag, 255954e4ee71SNavdeep Parhar bus_dmamap_t *map, bus_addr_t *pa, void **va) 256054e4ee71SNavdeep Parhar { 256154e4ee71SNavdeep Parhar int rc; 256254e4ee71SNavdeep Parhar 256354e4ee71SNavdeep Parhar rc = bus_dma_tag_create(sc->dmat, 512, 0, BUS_SPACE_MAXADDR, 256454e4ee71SNavdeep Parhar BUS_SPACE_MAXADDR, NULL, NULL, len, 1, len, 0, NULL, NULL, tag); 256554e4ee71SNavdeep Parhar if (rc != 0) { 256654e4ee71SNavdeep Parhar device_printf(sc->dev, "cannot allocate DMA tag: %d\n", rc); 256754e4ee71SNavdeep Parhar goto done; 256854e4ee71SNavdeep Parhar } 256954e4ee71SNavdeep Parhar 257054e4ee71SNavdeep Parhar rc = bus_dmamem_alloc(*tag, va, 257154e4ee71SNavdeep Parhar BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO, map); 257254e4ee71SNavdeep Parhar if (rc != 0) { 257354e4ee71SNavdeep Parhar device_printf(sc->dev, "cannot allocate DMA memory: %d\n", rc); 257454e4ee71SNavdeep Parhar goto done; 257554e4ee71SNavdeep Parhar } 257654e4ee71SNavdeep Parhar 257754e4ee71SNavdeep Parhar rc = bus_dmamap_load(*tag, *map, *va, len, oneseg_dma_callback, pa, 0); 257854e4ee71SNavdeep Parhar if (rc != 0) { 257954e4ee71SNavdeep Parhar device_printf(sc->dev, "cannot load DMA map: %d\n", rc); 258054e4ee71SNavdeep Parhar goto done; 258154e4ee71SNavdeep Parhar } 258254e4ee71SNavdeep Parhar done: 258354e4ee71SNavdeep Parhar if (rc) 258454e4ee71SNavdeep Parhar free_ring(sc, *tag, *map, *pa, *va); 258554e4ee71SNavdeep Parhar 258654e4ee71SNavdeep Parhar return (rc); 258754e4ee71SNavdeep Parhar } 258854e4ee71SNavdeep Parhar 258954e4ee71SNavdeep Parhar static int 259054e4ee71SNavdeep Parhar free_ring(struct adapter *sc, bus_dma_tag_t tag, bus_dmamap_t map, 259154e4ee71SNavdeep Parhar bus_addr_t pa, void *va) 259254e4ee71SNavdeep Parhar { 259354e4ee71SNavdeep Parhar if (pa) 259454e4ee71SNavdeep Parhar bus_dmamap_unload(tag, map); 259554e4ee71SNavdeep Parhar if (va) 259654e4ee71SNavdeep Parhar bus_dmamem_free(tag, va, map); 259754e4ee71SNavdeep Parhar if (tag) 259854e4ee71SNavdeep Parhar bus_dma_tag_destroy(tag); 259954e4ee71SNavdeep Parhar 260054e4ee71SNavdeep Parhar return (0); 260154e4ee71SNavdeep Parhar } 260254e4ee71SNavdeep Parhar 260354e4ee71SNavdeep Parhar /* 260454e4ee71SNavdeep Parhar * Allocates the ring for an ingress queue and an optional freelist. If the 260554e4ee71SNavdeep Parhar * freelist is specified it will be allocated and then associated with the 260654e4ee71SNavdeep Parhar * ingress queue. 260754e4ee71SNavdeep Parhar * 260854e4ee71SNavdeep Parhar * Returns errno on failure. Resources allocated up to that point may still be 260954e4ee71SNavdeep Parhar * allocated. Caller is responsible for cleanup in case this function fails. 261054e4ee71SNavdeep Parhar * 2611733b9277SNavdeep Parhar * If the ingress queue will take interrupts directly (iq->flags & IQ_INTR) then 261254e4ee71SNavdeep Parhar * the intr_idx specifies the vector, starting from 0. Otherwise it specifies 2613733b9277SNavdeep Parhar * the abs_id of the ingress queue to which its interrupts should be forwarded. 261454e4ee71SNavdeep Parhar */ 261554e4ee71SNavdeep Parhar static int 2616fe2ebb76SJohn Baldwin alloc_iq_fl(struct vi_info *vi, struct sge_iq *iq, struct sge_fl *fl, 2617bc14b14dSNavdeep Parhar int intr_idx, int cong) 261854e4ee71SNavdeep Parhar { 261954e4ee71SNavdeep Parhar int rc, i, cntxt_id; 262054e4ee71SNavdeep Parhar size_t len; 262154e4ee71SNavdeep Parhar struct fw_iq_cmd c; 2622fe2ebb76SJohn Baldwin struct port_info *pi = vi->pi; 262354e4ee71SNavdeep Parhar struct adapter *sc = iq->adapter; 262490e7434aSNavdeep Parhar struct sge_params *sp = &sc->params.sge; 262554e4ee71SNavdeep Parhar __be32 v = 0; 262654e4ee71SNavdeep Parhar 2627b2daa9a9SNavdeep Parhar len = iq->qsize * IQ_ESIZE; 262854e4ee71SNavdeep Parhar rc = alloc_ring(sc, len, &iq->desc_tag, &iq->desc_map, &iq->ba, 262954e4ee71SNavdeep Parhar (void **)&iq->desc); 263054e4ee71SNavdeep Parhar if (rc != 0) 263154e4ee71SNavdeep Parhar return (rc); 263254e4ee71SNavdeep Parhar 263354e4ee71SNavdeep Parhar bzero(&c, sizeof(c)); 263454e4ee71SNavdeep Parhar c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_IQ_CMD) | F_FW_CMD_REQUEST | 263554e4ee71SNavdeep Parhar F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_IQ_CMD_PFN(sc->pf) | 263654e4ee71SNavdeep Parhar V_FW_IQ_CMD_VFN(0)); 263754e4ee71SNavdeep Parhar 263854e4ee71SNavdeep Parhar c.alloc_to_len16 = htobe32(F_FW_IQ_CMD_ALLOC | F_FW_IQ_CMD_IQSTART | 263954e4ee71SNavdeep Parhar FW_LEN16(c)); 264054e4ee71SNavdeep Parhar 264154e4ee71SNavdeep Parhar /* Special handling for firmware event queue */ 264254e4ee71SNavdeep Parhar if (iq == &sc->sge.fwq) 264354e4ee71SNavdeep Parhar v |= F_FW_IQ_CMD_IQASYNCH; 264454e4ee71SNavdeep Parhar 2645733b9277SNavdeep Parhar if (iq->flags & IQ_INTR) { 264654e4ee71SNavdeep Parhar KASSERT(intr_idx < sc->intr_count, 264754e4ee71SNavdeep Parhar ("%s: invalid direct intr_idx %d", __func__, intr_idx)); 2648733b9277SNavdeep Parhar } else 2649733b9277SNavdeep Parhar v |= F_FW_IQ_CMD_IQANDST; 265054e4ee71SNavdeep Parhar v |= V_FW_IQ_CMD_IQANDSTINDEX(intr_idx); 265154e4ee71SNavdeep Parhar 265254e4ee71SNavdeep Parhar c.type_to_iqandstindex = htobe32(v | 265354e4ee71SNavdeep Parhar V_FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) | 2654fe2ebb76SJohn Baldwin V_FW_IQ_CMD_VIID(vi->viid) | 265554e4ee71SNavdeep Parhar V_FW_IQ_CMD_IQANUD(X_UPDATEDELIVERY_INTERRUPT)); 265654e4ee71SNavdeep Parhar c.iqdroprss_to_iqesize = htobe16(V_FW_IQ_CMD_IQPCIECH(pi->tx_chan) | 265754e4ee71SNavdeep Parhar F_FW_IQ_CMD_IQGTSMODE | 265854e4ee71SNavdeep Parhar V_FW_IQ_CMD_IQINTCNTTHRESH(iq->intr_pktc_idx) | 2659b2daa9a9SNavdeep Parhar V_FW_IQ_CMD_IQESIZE(ilog2(IQ_ESIZE) - 4)); 266054e4ee71SNavdeep Parhar c.iqsize = htobe16(iq->qsize); 266154e4ee71SNavdeep Parhar c.iqaddr = htobe64(iq->ba); 2662bc14b14dSNavdeep Parhar if (cong >= 0) 2663bc14b14dSNavdeep Parhar c.iqns_to_fl0congen = htobe32(F_FW_IQ_CMD_IQFLINTCONGEN); 266454e4ee71SNavdeep Parhar 266554e4ee71SNavdeep Parhar if (fl) { 266654e4ee71SNavdeep Parhar mtx_init(&fl->fl_lock, fl->lockname, NULL, MTX_DEF); 266754e4ee71SNavdeep Parhar 2668b2daa9a9SNavdeep Parhar len = fl->qsize * EQ_ESIZE; 266954e4ee71SNavdeep Parhar rc = alloc_ring(sc, len, &fl->desc_tag, &fl->desc_map, 267054e4ee71SNavdeep Parhar &fl->ba, (void **)&fl->desc); 267154e4ee71SNavdeep Parhar if (rc) 267254e4ee71SNavdeep Parhar return (rc); 267354e4ee71SNavdeep Parhar 267454e4ee71SNavdeep Parhar /* Allocate space for one software descriptor per buffer. */ 267554e4ee71SNavdeep Parhar rc = alloc_fl_sdesc(fl); 267654e4ee71SNavdeep Parhar if (rc != 0) { 267754e4ee71SNavdeep Parhar device_printf(sc->dev, 267854e4ee71SNavdeep Parhar "failed to setup fl software descriptors: %d\n", 267954e4ee71SNavdeep Parhar rc); 268054e4ee71SNavdeep Parhar return (rc); 268154e4ee71SNavdeep Parhar } 26824d6db4e0SNavdeep Parhar 26834d6db4e0SNavdeep Parhar if (fl->flags & FL_BUF_PACKING) { 268490e7434aSNavdeep Parhar fl->lowat = roundup2(sp->fl_starve_threshold2, 8); 268590e7434aSNavdeep Parhar fl->buf_boundary = sp->pack_boundary; 26864d6db4e0SNavdeep Parhar } else { 268790e7434aSNavdeep Parhar fl->lowat = roundup2(sp->fl_starve_threshold, 8); 2688e3207e19SNavdeep Parhar fl->buf_boundary = 16; 26894d6db4e0SNavdeep Parhar } 269090e7434aSNavdeep Parhar if (fl_pad && fl->buf_boundary < sp->pad_boundary) 269190e7434aSNavdeep Parhar fl->buf_boundary = sp->pad_boundary; 269254e4ee71SNavdeep Parhar 2693214c3582SNavdeep Parhar c.iqns_to_fl0congen |= 2694bc14b14dSNavdeep Parhar htobe32(V_FW_IQ_CMD_FL0HOSTFCMODE(X_HOSTFCMODE_NONE) | 2695bc14b14dSNavdeep Parhar F_FW_IQ_CMD_FL0FETCHRO | F_FW_IQ_CMD_FL0DATARO | 26961458bff9SNavdeep Parhar (fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0) | 26971458bff9SNavdeep Parhar (fl->flags & FL_BUF_PACKING ? F_FW_IQ_CMD_FL0PACKEN : 26981458bff9SNavdeep Parhar 0)); 2699bc14b14dSNavdeep Parhar if (cong >= 0) { 2700bc14b14dSNavdeep Parhar c.iqns_to_fl0congen |= 2701bc14b14dSNavdeep Parhar htobe32(V_FW_IQ_CMD_FL0CNGCHMAP(cong) | 2702bc14b14dSNavdeep Parhar F_FW_IQ_CMD_FL0CONGCIF | 2703bc14b14dSNavdeep Parhar F_FW_IQ_CMD_FL0CONGEN); 2704bc14b14dSNavdeep Parhar } 270554e4ee71SNavdeep Parhar c.fl0dcaen_to_fl0cidxfthresh = 27066af2071bSNavdeep Parhar htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_128B) | 270754e4ee71SNavdeep Parhar V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B)); 270854e4ee71SNavdeep Parhar c.fl0size = htobe16(fl->qsize); 270954e4ee71SNavdeep Parhar c.fl0addr = htobe64(fl->ba); 271054e4ee71SNavdeep Parhar } 271154e4ee71SNavdeep Parhar 271254e4ee71SNavdeep Parhar rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c); 271354e4ee71SNavdeep Parhar if (rc != 0) { 271454e4ee71SNavdeep Parhar device_printf(sc->dev, 271554e4ee71SNavdeep Parhar "failed to create ingress queue: %d\n", rc); 271654e4ee71SNavdeep Parhar return (rc); 271754e4ee71SNavdeep Parhar } 271854e4ee71SNavdeep Parhar 271954e4ee71SNavdeep Parhar iq->cidx = 0; 2720b2daa9a9SNavdeep Parhar iq->gen = F_RSPD_GEN; 272154e4ee71SNavdeep Parhar iq->intr_next = iq->intr_params; 272254e4ee71SNavdeep Parhar iq->cntxt_id = be16toh(c.iqid); 272354e4ee71SNavdeep Parhar iq->abs_id = be16toh(c.physiqid); 2724733b9277SNavdeep Parhar iq->flags |= IQ_ALLOCATED; 272554e4ee71SNavdeep Parhar 272654e4ee71SNavdeep Parhar cntxt_id = iq->cntxt_id - sc->sge.iq_start; 2727733b9277SNavdeep Parhar if (cntxt_id >= sc->sge.niq) { 2728733b9277SNavdeep Parhar panic ("%s: iq->cntxt_id (%d) more than the max (%d)", __func__, 2729733b9277SNavdeep Parhar cntxt_id, sc->sge.niq - 1); 2730733b9277SNavdeep Parhar } 273154e4ee71SNavdeep Parhar sc->sge.iqmap[cntxt_id] = iq; 273254e4ee71SNavdeep Parhar 273354e4ee71SNavdeep Parhar if (fl) { 27344d6db4e0SNavdeep Parhar u_int qid; 27354d6db4e0SNavdeep Parhar 27364d6db4e0SNavdeep Parhar iq->flags |= IQ_HAS_FL; 273754e4ee71SNavdeep Parhar fl->cntxt_id = be16toh(c.fl0id); 273854e4ee71SNavdeep Parhar fl->pidx = fl->cidx = 0; 273954e4ee71SNavdeep Parhar 27409f1f7ec9SNavdeep Parhar cntxt_id = fl->cntxt_id - sc->sge.eq_start; 2741733b9277SNavdeep Parhar if (cntxt_id >= sc->sge.neq) { 2742733b9277SNavdeep Parhar panic("%s: fl->cntxt_id (%d) more than the max (%d)", 2743733b9277SNavdeep Parhar __func__, cntxt_id, sc->sge.neq - 1); 2744733b9277SNavdeep Parhar } 274554e4ee71SNavdeep Parhar sc->sge.eqmap[cntxt_id] = (void *)fl; 274654e4ee71SNavdeep Parhar 27474d6db4e0SNavdeep Parhar qid = fl->cntxt_id; 27484d6db4e0SNavdeep Parhar if (isset(&sc->doorbells, DOORBELL_UDB)) { 274990e7434aSNavdeep Parhar uint32_t s_qpp = sc->params.sge.eq_s_qpp; 27504d6db4e0SNavdeep Parhar uint32_t mask = (1 << s_qpp) - 1; 27514d6db4e0SNavdeep Parhar volatile uint8_t *udb; 27524d6db4e0SNavdeep Parhar 27534d6db4e0SNavdeep Parhar udb = sc->udbs_base + UDBS_DB_OFFSET; 27544d6db4e0SNavdeep Parhar udb += (qid >> s_qpp) << PAGE_SHIFT; 27554d6db4e0SNavdeep Parhar qid &= mask; 27564d6db4e0SNavdeep Parhar if (qid < PAGE_SIZE / UDBS_SEG_SIZE) { 27574d6db4e0SNavdeep Parhar udb += qid << UDBS_SEG_SHIFT; 27584d6db4e0SNavdeep Parhar qid = 0; 27594d6db4e0SNavdeep Parhar } 27604d6db4e0SNavdeep Parhar fl->udb = (volatile void *)udb; 27614d6db4e0SNavdeep Parhar } 2762d1205d09SNavdeep Parhar fl->dbval = V_QID(qid) | sc->chip_params->sge_fl_db; 27634d6db4e0SNavdeep Parhar 276454e4ee71SNavdeep Parhar FL_LOCK(fl); 2765733b9277SNavdeep Parhar /* Enough to make sure the SGE doesn't think it's starved */ 2766733b9277SNavdeep Parhar refill_fl(sc, fl, fl->lowat); 276754e4ee71SNavdeep Parhar FL_UNLOCK(fl); 276854e4ee71SNavdeep Parhar } 276954e4ee71SNavdeep Parhar 2770ba41ec48SNavdeep Parhar if (is_t5(sc) && cong >= 0) { 2771ba41ec48SNavdeep Parhar uint32_t param, val; 2772ba41ec48SNavdeep Parhar 2773ba41ec48SNavdeep Parhar param = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) | 2774ba41ec48SNavdeep Parhar V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_CONM_CTXT) | 2775ba41ec48SNavdeep Parhar V_FW_PARAMS_PARAM_YZ(iq->cntxt_id); 277673cd9220SNavdeep Parhar if (cong == 0) 277773cd9220SNavdeep Parhar val = 1 << 19; 277873cd9220SNavdeep Parhar else { 277973cd9220SNavdeep Parhar val = 2 << 19; 278073cd9220SNavdeep Parhar for (i = 0; i < 4; i++) { 278173cd9220SNavdeep Parhar if (cong & (1 << i)) 278273cd9220SNavdeep Parhar val |= 1 << (i << 2); 278373cd9220SNavdeep Parhar } 278473cd9220SNavdeep Parhar } 278573cd9220SNavdeep Parhar 2786ba41ec48SNavdeep Parhar rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, ¶m, &val); 2787ba41ec48SNavdeep Parhar if (rc != 0) { 2788ba41ec48SNavdeep Parhar /* report error but carry on */ 2789ba41ec48SNavdeep Parhar device_printf(sc->dev, 2790ba41ec48SNavdeep Parhar "failed to set congestion manager context for " 2791ba41ec48SNavdeep Parhar "ingress queue %d: %d\n", iq->cntxt_id, rc); 2792ba41ec48SNavdeep Parhar } 2793ba41ec48SNavdeep Parhar } 2794ba41ec48SNavdeep Parhar 279554e4ee71SNavdeep Parhar /* Enable IQ interrupts */ 2796733b9277SNavdeep Parhar atomic_store_rel_int(&iq->state, IQS_IDLE); 2797315048f2SJohn Baldwin t4_write_reg(sc, sc->sge_gts_reg, V_SEINTARM(iq->intr_params) | 279854e4ee71SNavdeep Parhar V_INGRESSQID(iq->cntxt_id)); 279954e4ee71SNavdeep Parhar 280054e4ee71SNavdeep Parhar return (0); 280154e4ee71SNavdeep Parhar } 280254e4ee71SNavdeep Parhar 280354e4ee71SNavdeep Parhar static int 2804fe2ebb76SJohn Baldwin free_iq_fl(struct vi_info *vi, struct sge_iq *iq, struct sge_fl *fl) 280554e4ee71SNavdeep Parhar { 280638035ed6SNavdeep Parhar int rc; 280754e4ee71SNavdeep Parhar struct adapter *sc = iq->adapter; 280854e4ee71SNavdeep Parhar device_t dev; 280954e4ee71SNavdeep Parhar 281054e4ee71SNavdeep Parhar if (sc == NULL) 281154e4ee71SNavdeep Parhar return (0); /* nothing to do */ 281254e4ee71SNavdeep Parhar 2813fe2ebb76SJohn Baldwin dev = vi ? vi->dev : sc->dev; 281454e4ee71SNavdeep Parhar 281554e4ee71SNavdeep Parhar if (iq->flags & IQ_ALLOCATED) { 281654e4ee71SNavdeep Parhar rc = -t4_iq_free(sc, sc->mbox, sc->pf, 0, 281754e4ee71SNavdeep Parhar FW_IQ_TYPE_FL_INT_CAP, iq->cntxt_id, 281854e4ee71SNavdeep Parhar fl ? fl->cntxt_id : 0xffff, 0xffff); 281954e4ee71SNavdeep Parhar if (rc != 0) { 282054e4ee71SNavdeep Parhar device_printf(dev, 282154e4ee71SNavdeep Parhar "failed to free queue %p: %d\n", iq, rc); 282254e4ee71SNavdeep Parhar return (rc); 282354e4ee71SNavdeep Parhar } 282454e4ee71SNavdeep Parhar iq->flags &= ~IQ_ALLOCATED; 282554e4ee71SNavdeep Parhar } 282654e4ee71SNavdeep Parhar 282754e4ee71SNavdeep Parhar free_ring(sc, iq->desc_tag, iq->desc_map, iq->ba, iq->desc); 282854e4ee71SNavdeep Parhar 282954e4ee71SNavdeep Parhar bzero(iq, sizeof(*iq)); 283054e4ee71SNavdeep Parhar 283154e4ee71SNavdeep Parhar if (fl) { 283254e4ee71SNavdeep Parhar free_ring(sc, fl->desc_tag, fl->desc_map, fl->ba, 283354e4ee71SNavdeep Parhar fl->desc); 283454e4ee71SNavdeep Parhar 2835aa9a5cc0SNavdeep Parhar if (fl->sdesc) 28361458bff9SNavdeep Parhar free_fl_sdesc(sc, fl); 28371458bff9SNavdeep Parhar 283854e4ee71SNavdeep Parhar if (mtx_initialized(&fl->fl_lock)) 283954e4ee71SNavdeep Parhar mtx_destroy(&fl->fl_lock); 284054e4ee71SNavdeep Parhar 284154e4ee71SNavdeep Parhar bzero(fl, sizeof(*fl)); 284254e4ee71SNavdeep Parhar } 284354e4ee71SNavdeep Parhar 284454e4ee71SNavdeep Parhar return (0); 284554e4ee71SNavdeep Parhar } 284654e4ee71SNavdeep Parhar 284738035ed6SNavdeep Parhar static void 284838035ed6SNavdeep Parhar add_fl_sysctls(struct sysctl_ctx_list *ctx, struct sysctl_oid *oid, 284938035ed6SNavdeep Parhar struct sge_fl *fl) 285038035ed6SNavdeep Parhar { 285138035ed6SNavdeep Parhar struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid); 285238035ed6SNavdeep Parhar 285338035ed6SNavdeep Parhar oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "fl", CTLFLAG_RD, NULL, 285438035ed6SNavdeep Parhar "freelist"); 285538035ed6SNavdeep Parhar children = SYSCTL_CHILDREN(oid); 285638035ed6SNavdeep Parhar 285738035ed6SNavdeep Parhar SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id", 285838035ed6SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &fl->cntxt_id, 0, sysctl_uint16, "I", 285938035ed6SNavdeep Parhar "SGE context id of the freelist"); 2860e3207e19SNavdeep Parhar SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "padding", CTLFLAG_RD, NULL, 2861e3207e19SNavdeep Parhar fl_pad ? 1 : 0, "padding enabled"); 2862e3207e19SNavdeep Parhar SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "packing", CTLFLAG_RD, NULL, 2863e3207e19SNavdeep Parhar fl->flags & FL_BUF_PACKING ? 1 : 0, "packing enabled"); 286438035ed6SNavdeep Parhar SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cidx", CTLFLAG_RD, &fl->cidx, 286538035ed6SNavdeep Parhar 0, "consumer index"); 286638035ed6SNavdeep Parhar if (fl->flags & FL_BUF_PACKING) { 286738035ed6SNavdeep Parhar SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "rx_offset", 286838035ed6SNavdeep Parhar CTLFLAG_RD, &fl->rx_offset, 0, "packing rx offset"); 286938035ed6SNavdeep Parhar } 287038035ed6SNavdeep Parhar SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "pidx", CTLFLAG_RD, &fl->pidx, 287138035ed6SNavdeep Parhar 0, "producer index"); 287238035ed6SNavdeep Parhar SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_allocated", 287338035ed6SNavdeep Parhar CTLFLAG_RD, &fl->mbuf_allocated, "# of mbuf allocated"); 287438035ed6SNavdeep Parhar SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_inlined", 287538035ed6SNavdeep Parhar CTLFLAG_RD, &fl->mbuf_inlined, "# of mbuf inlined in clusters"); 287638035ed6SNavdeep Parhar SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_allocated", 287738035ed6SNavdeep Parhar CTLFLAG_RD, &fl->cl_allocated, "# of clusters allocated"); 287838035ed6SNavdeep Parhar SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_recycled", 287938035ed6SNavdeep Parhar CTLFLAG_RD, &fl->cl_recycled, "# of clusters recycled"); 288038035ed6SNavdeep Parhar SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_fast_recycled", 288138035ed6SNavdeep Parhar CTLFLAG_RD, &fl->cl_fast_recycled, "# of clusters recycled (fast)"); 288238035ed6SNavdeep Parhar } 288338035ed6SNavdeep Parhar 288454e4ee71SNavdeep Parhar static int 2885733b9277SNavdeep Parhar alloc_fwq(struct adapter *sc) 288654e4ee71SNavdeep Parhar { 2887733b9277SNavdeep Parhar int rc, intr_idx; 288856599263SNavdeep Parhar struct sge_iq *fwq = &sc->sge.fwq; 2889733b9277SNavdeep Parhar struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev); 2890733b9277SNavdeep Parhar struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid); 289156599263SNavdeep Parhar 2892b2daa9a9SNavdeep Parhar init_iq(fwq, sc, 0, 0, FW_IQ_QSIZE); 2893733b9277SNavdeep Parhar fwq->flags |= IQ_INTR; /* always */ 2894733b9277SNavdeep Parhar intr_idx = sc->intr_count > 1 ? 1 : 0; 2895671bf2b8SNavdeep Parhar fwq->set_tcb_rpl = t4_filter_rpl; 2896671bf2b8SNavdeep Parhar fwq->l2t_write_rpl = do_l2t_write_rpl; 2897fe2ebb76SJohn Baldwin rc = alloc_iq_fl(&sc->port[0]->vi[0], fwq, NULL, intr_idx, -1); 2898733b9277SNavdeep Parhar if (rc != 0) { 2899733b9277SNavdeep Parhar device_printf(sc->dev, 2900733b9277SNavdeep Parhar "failed to create firmware event queue: %d\n", rc); 290156599263SNavdeep Parhar return (rc); 2902733b9277SNavdeep Parhar } 290356599263SNavdeep Parhar 2904733b9277SNavdeep Parhar oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "fwq", CTLFLAG_RD, 2905733b9277SNavdeep Parhar NULL, "firmware event queue"); 2906733b9277SNavdeep Parhar children = SYSCTL_CHILDREN(oid); 290756599263SNavdeep Parhar 290859bc8ce0SNavdeep Parhar SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "abs_id", 290959bc8ce0SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &fwq->abs_id, 0, sysctl_uint16, "I", 291059bc8ce0SNavdeep Parhar "absolute id of the queue"); 291159bc8ce0SNavdeep Parhar SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cntxt_id", 291259bc8ce0SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &fwq->cntxt_id, 0, sysctl_uint16, "I", 291359bc8ce0SNavdeep Parhar "SGE context id of the queue"); 291456599263SNavdeep Parhar SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cidx", 291556599263SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &fwq->cidx, 0, sysctl_uint16, "I", 291656599263SNavdeep Parhar "consumer index"); 291756599263SNavdeep Parhar 2918733b9277SNavdeep Parhar return (0); 2919733b9277SNavdeep Parhar } 2920733b9277SNavdeep Parhar 2921733b9277SNavdeep Parhar static int 2922733b9277SNavdeep Parhar free_fwq(struct adapter *sc) 2923733b9277SNavdeep Parhar { 2924733b9277SNavdeep Parhar return free_iq_fl(NULL, &sc->sge.fwq, NULL); 2925733b9277SNavdeep Parhar } 2926733b9277SNavdeep Parhar 2927733b9277SNavdeep Parhar static int 2928733b9277SNavdeep Parhar alloc_mgmtq(struct adapter *sc) 2929733b9277SNavdeep Parhar { 2930733b9277SNavdeep Parhar int rc; 2931733b9277SNavdeep Parhar struct sge_wrq *mgmtq = &sc->sge.mgmtq; 2932733b9277SNavdeep Parhar char name[16]; 2933733b9277SNavdeep Parhar struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev); 2934733b9277SNavdeep Parhar struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid); 2935733b9277SNavdeep Parhar 2936733b9277SNavdeep Parhar oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "mgmtq", CTLFLAG_RD, 2937733b9277SNavdeep Parhar NULL, "management queue"); 2938733b9277SNavdeep Parhar 2939733b9277SNavdeep Parhar snprintf(name, sizeof(name), "%s mgmtq", device_get_nameunit(sc->dev)); 294090e7434aSNavdeep Parhar init_eq(sc, &mgmtq->eq, EQ_CTRL, CTRL_EQ_QSIZE, sc->port[0]->tx_chan, 2941733b9277SNavdeep Parhar sc->sge.fwq.cntxt_id, name); 2942733b9277SNavdeep Parhar rc = alloc_wrq(sc, NULL, mgmtq, oid); 2943733b9277SNavdeep Parhar if (rc != 0) { 2944733b9277SNavdeep Parhar device_printf(sc->dev, 2945733b9277SNavdeep Parhar "failed to create management queue: %d\n", rc); 294656599263SNavdeep Parhar return (rc); 294756599263SNavdeep Parhar } 294856599263SNavdeep Parhar 2949733b9277SNavdeep Parhar return (0); 295054e4ee71SNavdeep Parhar } 295154e4ee71SNavdeep Parhar 295254e4ee71SNavdeep Parhar static int 2953733b9277SNavdeep Parhar free_mgmtq(struct adapter *sc) 2954733b9277SNavdeep Parhar { 295509fe6320SNavdeep Parhar 2956733b9277SNavdeep Parhar return free_wrq(sc, &sc->sge.mgmtq); 2957733b9277SNavdeep Parhar } 2958733b9277SNavdeep Parhar 29591605bac6SNavdeep Parhar int 29609af71ab3SNavdeep Parhar tnl_cong(struct port_info *pi, int drop) 29619fb8886bSNavdeep Parhar { 29629fb8886bSNavdeep Parhar 29639af71ab3SNavdeep Parhar if (drop == -1) 29649fb8886bSNavdeep Parhar return (-1); 29659af71ab3SNavdeep Parhar else if (drop == 1) 29669fb8886bSNavdeep Parhar return (0); 29679fb8886bSNavdeep Parhar else 2968e46dcc56SNavdeep Parhar return (pi->rx_chan_map); 29699fb8886bSNavdeep Parhar } 29709fb8886bSNavdeep Parhar 2971733b9277SNavdeep Parhar static int 2972fe2ebb76SJohn Baldwin alloc_rxq(struct vi_info *vi, struct sge_rxq *rxq, int intr_idx, int idx, 2973733b9277SNavdeep Parhar struct sysctl_oid *oid) 297454e4ee71SNavdeep Parhar { 297554e4ee71SNavdeep Parhar int rc; 2976*ec55567cSJohn Baldwin struct adapter *sc = vi->pi->adapter; 297754e4ee71SNavdeep Parhar struct sysctl_oid_list *children; 297854e4ee71SNavdeep Parhar char name[16]; 297954e4ee71SNavdeep Parhar 2980fe2ebb76SJohn Baldwin rc = alloc_iq_fl(vi, &rxq->iq, &rxq->fl, intr_idx, 2981fe2ebb76SJohn Baldwin tnl_cong(vi->pi, cong_drop)); 298254e4ee71SNavdeep Parhar if (rc != 0) 298354e4ee71SNavdeep Parhar return (rc); 298454e4ee71SNavdeep Parhar 2985*ec55567cSJohn Baldwin if (idx == 0) 2986*ec55567cSJohn Baldwin sc->sge.iq_base = rxq->iq.abs_id - rxq->iq.cntxt_id; 2987*ec55567cSJohn Baldwin else 2988*ec55567cSJohn Baldwin KASSERT(rxq->iq.cntxt_id + sc->sge.iq_base == rxq->iq.abs_id, 2989*ec55567cSJohn Baldwin ("iq_base mismatch")); 2990*ec55567cSJohn Baldwin KASSERT(sc->sge.iq_base == 0 || sc->flags & IS_VF, 2991*ec55567cSJohn Baldwin ("PF with non-zero iq_base")); 2992*ec55567cSJohn Baldwin 29934d6db4e0SNavdeep Parhar /* 29944d6db4e0SNavdeep Parhar * The freelist is just barely above the starvation threshold right now, 29954d6db4e0SNavdeep Parhar * fill it up a bit more. 29964d6db4e0SNavdeep Parhar */ 29979b4d7b4eSNavdeep Parhar FL_LOCK(&rxq->fl); 2998*ec55567cSJohn Baldwin refill_fl(sc, &rxq->fl, 128); 29999b4d7b4eSNavdeep Parhar FL_UNLOCK(&rxq->fl); 30009b4d7b4eSNavdeep Parhar 3001a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6) 300254e4ee71SNavdeep Parhar rc = tcp_lro_init(&rxq->lro); 300354e4ee71SNavdeep Parhar if (rc != 0) 300454e4ee71SNavdeep Parhar return (rc); 3005fe2ebb76SJohn Baldwin rxq->lro.ifp = vi->ifp; /* also indicates LRO init'ed */ 300654e4ee71SNavdeep Parhar 3007fe2ebb76SJohn Baldwin if (vi->ifp->if_capenable & IFCAP_LRO) 3008733b9277SNavdeep Parhar rxq->iq.flags |= IQ_LRO_ENABLED; 300954e4ee71SNavdeep Parhar #endif 3010fe2ebb76SJohn Baldwin rxq->ifp = vi->ifp; 301154e4ee71SNavdeep Parhar 3012733b9277SNavdeep Parhar children = SYSCTL_CHILDREN(oid); 301354e4ee71SNavdeep Parhar 301454e4ee71SNavdeep Parhar snprintf(name, sizeof(name), "%d", idx); 3015fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name, CTLFLAG_RD, 301654e4ee71SNavdeep Parhar NULL, "rx queue"); 301754e4ee71SNavdeep Parhar children = SYSCTL_CHILDREN(oid); 301854e4ee71SNavdeep Parhar 3019fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "abs_id", 302056599263SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.abs_id, 0, sysctl_uint16, "I", 3021af49c942SNavdeep Parhar "absolute id of the queue"); 3022fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cntxt_id", 302359bc8ce0SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cntxt_id, 0, sysctl_uint16, "I", 302459bc8ce0SNavdeep Parhar "SGE context id of the queue"); 3025fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cidx", 302659bc8ce0SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cidx, 0, sysctl_uint16, "I", 302759bc8ce0SNavdeep Parhar "consumer index"); 3028a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6) 3029e936121dSHans Petter Selasky SYSCTL_ADD_U64(&vi->ctx, children, OID_AUTO, "lro_queued", CTLFLAG_RD, 303054e4ee71SNavdeep Parhar &rxq->lro.lro_queued, 0, NULL); 3031e936121dSHans Petter Selasky SYSCTL_ADD_U64(&vi->ctx, children, OID_AUTO, "lro_flushed", CTLFLAG_RD, 303254e4ee71SNavdeep Parhar &rxq->lro.lro_flushed, 0, NULL); 30337d29df59SNavdeep Parhar #endif 3034fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "rxcsum", CTLFLAG_RD, 303554e4ee71SNavdeep Parhar &rxq->rxcsum, "# of times hardware assisted with checksum"); 3036fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "vlan_extraction", 303754e4ee71SNavdeep Parhar CTLFLAG_RD, &rxq->vlan_extraction, 303854e4ee71SNavdeep Parhar "# of times hardware extracted 802.1Q tag"); 303954e4ee71SNavdeep Parhar 3040fe2ebb76SJohn Baldwin add_fl_sysctls(&vi->ctx, oid, &rxq->fl); 304159bc8ce0SNavdeep Parhar 304254e4ee71SNavdeep Parhar return (rc); 304354e4ee71SNavdeep Parhar } 304454e4ee71SNavdeep Parhar 304554e4ee71SNavdeep Parhar static int 3046fe2ebb76SJohn Baldwin free_rxq(struct vi_info *vi, struct sge_rxq *rxq) 304754e4ee71SNavdeep Parhar { 304854e4ee71SNavdeep Parhar int rc; 304954e4ee71SNavdeep Parhar 3050a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6) 305154e4ee71SNavdeep Parhar if (rxq->lro.ifp) { 305254e4ee71SNavdeep Parhar tcp_lro_free(&rxq->lro); 305354e4ee71SNavdeep Parhar rxq->lro.ifp = NULL; 305454e4ee71SNavdeep Parhar } 305554e4ee71SNavdeep Parhar #endif 305654e4ee71SNavdeep Parhar 3057fe2ebb76SJohn Baldwin rc = free_iq_fl(vi, &rxq->iq, &rxq->fl); 305854e4ee71SNavdeep Parhar if (rc == 0) 305954e4ee71SNavdeep Parhar bzero(rxq, sizeof(*rxq)); 306054e4ee71SNavdeep Parhar 306154e4ee71SNavdeep Parhar return (rc); 306254e4ee71SNavdeep Parhar } 306354e4ee71SNavdeep Parhar 306409fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 306554e4ee71SNavdeep Parhar static int 3066fe2ebb76SJohn Baldwin alloc_ofld_rxq(struct vi_info *vi, struct sge_ofld_rxq *ofld_rxq, 3067733b9277SNavdeep Parhar int intr_idx, int idx, struct sysctl_oid *oid) 3068f7dfe243SNavdeep Parhar { 3069733b9277SNavdeep Parhar int rc; 3070f7dfe243SNavdeep Parhar struct sysctl_oid_list *children; 3071733b9277SNavdeep Parhar char name[16]; 3072f7dfe243SNavdeep Parhar 3073fe2ebb76SJohn Baldwin rc = alloc_iq_fl(vi, &ofld_rxq->iq, &ofld_rxq->fl, intr_idx, 3074fe2ebb76SJohn Baldwin vi->pi->rx_chan_map); 3075733b9277SNavdeep Parhar if (rc != 0) 3076f7dfe243SNavdeep Parhar return (rc); 3077f7dfe243SNavdeep Parhar 3078733b9277SNavdeep Parhar children = SYSCTL_CHILDREN(oid); 3079733b9277SNavdeep Parhar 3080733b9277SNavdeep Parhar snprintf(name, sizeof(name), "%d", idx); 3081fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name, CTLFLAG_RD, 3082733b9277SNavdeep Parhar NULL, "rx queue"); 3083733b9277SNavdeep Parhar children = SYSCTL_CHILDREN(oid); 3084733b9277SNavdeep Parhar 3085fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "abs_id", 3086733b9277SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.abs_id, 0, sysctl_uint16, 3087733b9277SNavdeep Parhar "I", "absolute id of the queue"); 3088fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cntxt_id", 3089733b9277SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cntxt_id, 0, sysctl_uint16, 3090733b9277SNavdeep Parhar "I", "SGE context id of the queue"); 3091fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cidx", 3092733b9277SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cidx, 0, sysctl_uint16, "I", 3093733b9277SNavdeep Parhar "consumer index"); 3094733b9277SNavdeep Parhar 3095fe2ebb76SJohn Baldwin add_fl_sysctls(&vi->ctx, oid, &ofld_rxq->fl); 3096733b9277SNavdeep Parhar 3097733b9277SNavdeep Parhar return (rc); 3098733b9277SNavdeep Parhar } 3099733b9277SNavdeep Parhar 3100733b9277SNavdeep Parhar static int 3101fe2ebb76SJohn Baldwin free_ofld_rxq(struct vi_info *vi, struct sge_ofld_rxq *ofld_rxq) 3102733b9277SNavdeep Parhar { 3103733b9277SNavdeep Parhar int rc; 3104733b9277SNavdeep Parhar 3105fe2ebb76SJohn Baldwin rc = free_iq_fl(vi, &ofld_rxq->iq, &ofld_rxq->fl); 3106733b9277SNavdeep Parhar if (rc == 0) 3107733b9277SNavdeep Parhar bzero(ofld_rxq, sizeof(*ofld_rxq)); 3108733b9277SNavdeep Parhar 3109733b9277SNavdeep Parhar return (rc); 3110733b9277SNavdeep Parhar } 3111733b9277SNavdeep Parhar #endif 3112733b9277SNavdeep Parhar 3113298d969cSNavdeep Parhar #ifdef DEV_NETMAP 3114298d969cSNavdeep Parhar static int 3115fe2ebb76SJohn Baldwin alloc_nm_rxq(struct vi_info *vi, struct sge_nm_rxq *nm_rxq, int intr_idx, 3116298d969cSNavdeep Parhar int idx, struct sysctl_oid *oid) 3117298d969cSNavdeep Parhar { 3118298d969cSNavdeep Parhar int rc; 3119298d969cSNavdeep Parhar struct sysctl_oid_list *children; 3120298d969cSNavdeep Parhar struct sysctl_ctx_list *ctx; 3121298d969cSNavdeep Parhar char name[16]; 3122298d969cSNavdeep Parhar size_t len; 3123fe2ebb76SJohn Baldwin struct adapter *sc = vi->pi->adapter; 3124fe2ebb76SJohn Baldwin struct netmap_adapter *na = NA(vi->ifp); 3125298d969cSNavdeep Parhar 3126298d969cSNavdeep Parhar MPASS(na != NULL); 3127298d969cSNavdeep Parhar 3128fe2ebb76SJohn Baldwin len = vi->qsize_rxq * IQ_ESIZE; 3129298d969cSNavdeep Parhar rc = alloc_ring(sc, len, &nm_rxq->iq_desc_tag, &nm_rxq->iq_desc_map, 3130298d969cSNavdeep Parhar &nm_rxq->iq_ba, (void **)&nm_rxq->iq_desc); 3131298d969cSNavdeep Parhar if (rc != 0) 3132298d969cSNavdeep Parhar return (rc); 3133298d969cSNavdeep Parhar 313490e7434aSNavdeep Parhar len = na->num_rx_desc * EQ_ESIZE + sc->params.sge.spg_len; 3135298d969cSNavdeep Parhar rc = alloc_ring(sc, len, &nm_rxq->fl_desc_tag, &nm_rxq->fl_desc_map, 3136298d969cSNavdeep Parhar &nm_rxq->fl_ba, (void **)&nm_rxq->fl_desc); 3137298d969cSNavdeep Parhar if (rc != 0) 3138298d969cSNavdeep Parhar return (rc); 3139298d969cSNavdeep Parhar 3140fe2ebb76SJohn Baldwin nm_rxq->vi = vi; 3141298d969cSNavdeep Parhar nm_rxq->nid = idx; 3142298d969cSNavdeep Parhar nm_rxq->iq_cidx = 0; 314390e7434aSNavdeep Parhar nm_rxq->iq_sidx = vi->qsize_rxq - sc->params.sge.spg_len / IQ_ESIZE; 3144298d969cSNavdeep Parhar nm_rxq->iq_gen = F_RSPD_GEN; 3145298d969cSNavdeep Parhar nm_rxq->fl_pidx = nm_rxq->fl_cidx = 0; 3146298d969cSNavdeep Parhar nm_rxq->fl_sidx = na->num_rx_desc; 3147298d969cSNavdeep Parhar nm_rxq->intr_idx = intr_idx; 3148298d969cSNavdeep Parhar 3149fe2ebb76SJohn Baldwin ctx = &vi->ctx; 3150298d969cSNavdeep Parhar children = SYSCTL_CHILDREN(oid); 3151298d969cSNavdeep Parhar 3152298d969cSNavdeep Parhar snprintf(name, sizeof(name), "%d", idx); 3153298d969cSNavdeep Parhar oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, name, CTLFLAG_RD, NULL, 3154298d969cSNavdeep Parhar "rx queue"); 3155298d969cSNavdeep Parhar children = SYSCTL_CHILDREN(oid); 3156298d969cSNavdeep Parhar 3157298d969cSNavdeep Parhar SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "abs_id", 3158298d969cSNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_abs_id, 0, sysctl_uint16, 3159298d969cSNavdeep Parhar "I", "absolute id of the queue"); 3160298d969cSNavdeep Parhar SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id", 3161298d969cSNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_cntxt_id, 0, sysctl_uint16, 3162298d969cSNavdeep Parhar "I", "SGE context id of the queue"); 3163298d969cSNavdeep Parhar SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cidx", 3164298d969cSNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_cidx, 0, sysctl_uint16, "I", 3165298d969cSNavdeep Parhar "consumer index"); 3166298d969cSNavdeep Parhar 3167298d969cSNavdeep Parhar children = SYSCTL_CHILDREN(oid); 3168298d969cSNavdeep Parhar oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "fl", CTLFLAG_RD, NULL, 3169298d969cSNavdeep Parhar "freelist"); 3170298d969cSNavdeep Parhar children = SYSCTL_CHILDREN(oid); 3171298d969cSNavdeep Parhar 3172298d969cSNavdeep Parhar SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id", 3173298d969cSNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->fl_cntxt_id, 0, sysctl_uint16, 3174298d969cSNavdeep Parhar "I", "SGE context id of the freelist"); 3175298d969cSNavdeep Parhar SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cidx", CTLFLAG_RD, 3176298d969cSNavdeep Parhar &nm_rxq->fl_cidx, 0, "consumer index"); 3177298d969cSNavdeep Parhar SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "pidx", CTLFLAG_RD, 3178298d969cSNavdeep Parhar &nm_rxq->fl_pidx, 0, "producer index"); 3179298d969cSNavdeep Parhar 3180298d969cSNavdeep Parhar return (rc); 3181298d969cSNavdeep Parhar } 3182298d969cSNavdeep Parhar 3183298d969cSNavdeep Parhar 3184298d969cSNavdeep Parhar static int 3185fe2ebb76SJohn Baldwin free_nm_rxq(struct vi_info *vi, struct sge_nm_rxq *nm_rxq) 3186298d969cSNavdeep Parhar { 3187fe2ebb76SJohn Baldwin struct adapter *sc = vi->pi->adapter; 3188298d969cSNavdeep Parhar 3189298d969cSNavdeep Parhar free_ring(sc, nm_rxq->iq_desc_tag, nm_rxq->iq_desc_map, nm_rxq->iq_ba, 3190298d969cSNavdeep Parhar nm_rxq->iq_desc); 3191298d969cSNavdeep Parhar free_ring(sc, nm_rxq->fl_desc_tag, nm_rxq->fl_desc_map, nm_rxq->fl_ba, 3192298d969cSNavdeep Parhar nm_rxq->fl_desc); 3193298d969cSNavdeep Parhar 3194298d969cSNavdeep Parhar return (0); 3195298d969cSNavdeep Parhar } 3196298d969cSNavdeep Parhar 3197298d969cSNavdeep Parhar static int 3198fe2ebb76SJohn Baldwin alloc_nm_txq(struct vi_info *vi, struct sge_nm_txq *nm_txq, int iqidx, int idx, 3199298d969cSNavdeep Parhar struct sysctl_oid *oid) 3200298d969cSNavdeep Parhar { 3201298d969cSNavdeep Parhar int rc; 3202298d969cSNavdeep Parhar size_t len; 3203fe2ebb76SJohn Baldwin struct port_info *pi = vi->pi; 3204298d969cSNavdeep Parhar struct adapter *sc = pi->adapter; 3205fe2ebb76SJohn Baldwin struct netmap_adapter *na = NA(vi->ifp); 3206298d969cSNavdeep Parhar char name[16]; 3207298d969cSNavdeep Parhar struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid); 3208298d969cSNavdeep Parhar 320990e7434aSNavdeep Parhar len = na->num_tx_desc * EQ_ESIZE + sc->params.sge.spg_len; 3210298d969cSNavdeep Parhar rc = alloc_ring(sc, len, &nm_txq->desc_tag, &nm_txq->desc_map, 3211298d969cSNavdeep Parhar &nm_txq->ba, (void **)&nm_txq->desc); 3212298d969cSNavdeep Parhar if (rc) 3213298d969cSNavdeep Parhar return (rc); 3214298d969cSNavdeep Parhar 3215298d969cSNavdeep Parhar nm_txq->pidx = nm_txq->cidx = 0; 3216298d969cSNavdeep Parhar nm_txq->sidx = na->num_tx_desc; 3217298d969cSNavdeep Parhar nm_txq->nid = idx; 3218298d969cSNavdeep Parhar nm_txq->iqidx = iqidx; 3219298d969cSNavdeep Parhar nm_txq->cpl_ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) | 3220fe2ebb76SJohn Baldwin V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_VF_VLD(1) | 3221fe2ebb76SJohn Baldwin V_TXPKT_VF(vi->viid)); 3222298d969cSNavdeep Parhar 3223298d969cSNavdeep Parhar snprintf(name, sizeof(name), "%d", idx); 3224fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name, CTLFLAG_RD, 3225298d969cSNavdeep Parhar NULL, "netmap tx queue"); 3226298d969cSNavdeep Parhar children = SYSCTL_CHILDREN(oid); 3227298d969cSNavdeep Parhar 3228fe2ebb76SJohn Baldwin SYSCTL_ADD_UINT(&vi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD, 3229298d969cSNavdeep Parhar &nm_txq->cntxt_id, 0, "SGE context id of the queue"); 3230fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cidx", 3231298d969cSNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &nm_txq->cidx, 0, sysctl_uint16, "I", 3232298d969cSNavdeep Parhar "consumer index"); 3233fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "pidx", 3234298d969cSNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &nm_txq->pidx, 0, sysctl_uint16, "I", 3235298d969cSNavdeep Parhar "producer index"); 3236298d969cSNavdeep Parhar 3237298d969cSNavdeep Parhar return (rc); 3238298d969cSNavdeep Parhar } 3239298d969cSNavdeep Parhar 3240298d969cSNavdeep Parhar static int 3241fe2ebb76SJohn Baldwin free_nm_txq(struct vi_info *vi, struct sge_nm_txq *nm_txq) 3242298d969cSNavdeep Parhar { 3243fe2ebb76SJohn Baldwin struct adapter *sc = vi->pi->adapter; 3244298d969cSNavdeep Parhar 3245298d969cSNavdeep Parhar free_ring(sc, nm_txq->desc_tag, nm_txq->desc_map, nm_txq->ba, 3246298d969cSNavdeep Parhar nm_txq->desc); 3247298d969cSNavdeep Parhar 3248298d969cSNavdeep Parhar return (0); 3249298d969cSNavdeep Parhar } 3250298d969cSNavdeep Parhar #endif 3251298d969cSNavdeep Parhar 3252733b9277SNavdeep Parhar static int 3253733b9277SNavdeep Parhar ctrl_eq_alloc(struct adapter *sc, struct sge_eq *eq) 3254733b9277SNavdeep Parhar { 3255733b9277SNavdeep Parhar int rc, cntxt_id; 3256733b9277SNavdeep Parhar struct fw_eq_ctrl_cmd c; 325790e7434aSNavdeep Parhar int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE; 3258f7dfe243SNavdeep Parhar 3259f7dfe243SNavdeep Parhar bzero(&c, sizeof(c)); 3260f7dfe243SNavdeep Parhar 3261f7dfe243SNavdeep Parhar c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_CTRL_CMD) | F_FW_CMD_REQUEST | 3262f7dfe243SNavdeep Parhar F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_CTRL_CMD_PFN(sc->pf) | 3263f7dfe243SNavdeep Parhar V_FW_EQ_CTRL_CMD_VFN(0)); 3264f7dfe243SNavdeep Parhar c.alloc_to_len16 = htobe32(F_FW_EQ_CTRL_CMD_ALLOC | 3265f7dfe243SNavdeep Parhar F_FW_EQ_CTRL_CMD_EQSTART | FW_LEN16(c)); 32667951040fSNavdeep Parhar c.cmpliqid_eqid = htonl(V_FW_EQ_CTRL_CMD_CMPLIQID(eq->iqid)); 3267f7dfe243SNavdeep Parhar c.physeqid_pkd = htobe32(0); 3268f7dfe243SNavdeep Parhar c.fetchszm_to_iqid = 32697951040fSNavdeep Parhar htobe32(V_FW_EQ_CTRL_CMD_HOSTFCMODE(X_HOSTFCMODE_NONE) | 3270733b9277SNavdeep Parhar V_FW_EQ_CTRL_CMD_PCIECHN(eq->tx_chan) | 327156599263SNavdeep Parhar F_FW_EQ_CTRL_CMD_FETCHRO | V_FW_EQ_CTRL_CMD_IQID(eq->iqid)); 3272f7dfe243SNavdeep Parhar c.dcaen_to_eqsize = 3273f7dfe243SNavdeep Parhar htobe32(V_FW_EQ_CTRL_CMD_FBMIN(X_FETCHBURSTMIN_64B) | 3274f7dfe243SNavdeep Parhar V_FW_EQ_CTRL_CMD_FBMAX(X_FETCHBURSTMAX_512B) | 32757951040fSNavdeep Parhar V_FW_EQ_CTRL_CMD_EQSIZE(qsize)); 3276f7dfe243SNavdeep Parhar c.eqaddr = htobe64(eq->ba); 3277f7dfe243SNavdeep Parhar 3278f7dfe243SNavdeep Parhar rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c); 3279f7dfe243SNavdeep Parhar if (rc != 0) { 3280f7dfe243SNavdeep Parhar device_printf(sc->dev, 3281733b9277SNavdeep Parhar "failed to create control queue %d: %d\n", eq->tx_chan, rc); 3282f7dfe243SNavdeep Parhar return (rc); 3283f7dfe243SNavdeep Parhar } 3284733b9277SNavdeep Parhar eq->flags |= EQ_ALLOCATED; 3285f7dfe243SNavdeep Parhar 3286f7dfe243SNavdeep Parhar eq->cntxt_id = G_FW_EQ_CTRL_CMD_EQID(be32toh(c.cmpliqid_eqid)); 3287f7dfe243SNavdeep Parhar cntxt_id = eq->cntxt_id - sc->sge.eq_start; 3288733b9277SNavdeep Parhar if (cntxt_id >= sc->sge.neq) 3289733b9277SNavdeep Parhar panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__, 3290733b9277SNavdeep Parhar cntxt_id, sc->sge.neq - 1); 3291f7dfe243SNavdeep Parhar sc->sge.eqmap[cntxt_id] = eq; 3292f7dfe243SNavdeep Parhar 3293f7dfe243SNavdeep Parhar return (rc); 3294f7dfe243SNavdeep Parhar } 3295f7dfe243SNavdeep Parhar 3296f7dfe243SNavdeep Parhar static int 3297fe2ebb76SJohn Baldwin eth_eq_alloc(struct adapter *sc, struct vi_info *vi, struct sge_eq *eq) 329854e4ee71SNavdeep Parhar { 329954e4ee71SNavdeep Parhar int rc, cntxt_id; 330054e4ee71SNavdeep Parhar struct fw_eq_eth_cmd c; 330190e7434aSNavdeep Parhar int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE; 330254e4ee71SNavdeep Parhar 330354e4ee71SNavdeep Parhar bzero(&c, sizeof(c)); 330454e4ee71SNavdeep Parhar 330554e4ee71SNavdeep Parhar c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_ETH_CMD) | F_FW_CMD_REQUEST | 330654e4ee71SNavdeep Parhar F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_ETH_CMD_PFN(sc->pf) | 330754e4ee71SNavdeep Parhar V_FW_EQ_ETH_CMD_VFN(0)); 330854e4ee71SNavdeep Parhar c.alloc_to_len16 = htobe32(F_FW_EQ_ETH_CMD_ALLOC | 330954e4ee71SNavdeep Parhar F_FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c)); 33107951040fSNavdeep Parhar c.autoequiqe_to_viid = htobe32(F_FW_EQ_ETH_CMD_AUTOEQUIQE | 3311fe2ebb76SJohn Baldwin F_FW_EQ_ETH_CMD_AUTOEQUEQE | V_FW_EQ_ETH_CMD_VIID(vi->viid)); 331254e4ee71SNavdeep Parhar c.fetchszm_to_iqid = 33137951040fSNavdeep Parhar htobe32(V_FW_EQ_ETH_CMD_HOSTFCMODE(X_HOSTFCMODE_NONE) | 3314733b9277SNavdeep Parhar V_FW_EQ_ETH_CMD_PCIECHN(eq->tx_chan) | F_FW_EQ_ETH_CMD_FETCHRO | 3315aa2457e1SNavdeep Parhar V_FW_EQ_ETH_CMD_IQID(eq->iqid)); 331654e4ee71SNavdeep Parhar c.dcaen_to_eqsize = htobe32(V_FW_EQ_ETH_CMD_FBMIN(X_FETCHBURSTMIN_64B) | 331754e4ee71SNavdeep Parhar V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) | 33187951040fSNavdeep Parhar V_FW_EQ_ETH_CMD_EQSIZE(qsize)); 331954e4ee71SNavdeep Parhar c.eqaddr = htobe64(eq->ba); 332054e4ee71SNavdeep Parhar 332154e4ee71SNavdeep Parhar rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c); 332254e4ee71SNavdeep Parhar if (rc != 0) { 3323fe2ebb76SJohn Baldwin device_printf(vi->dev, 3324733b9277SNavdeep Parhar "failed to create Ethernet egress queue: %d\n", rc); 3325733b9277SNavdeep Parhar return (rc); 3326733b9277SNavdeep Parhar } 3327733b9277SNavdeep Parhar eq->flags |= EQ_ALLOCATED; 3328733b9277SNavdeep Parhar 3329733b9277SNavdeep Parhar eq->cntxt_id = G_FW_EQ_ETH_CMD_EQID(be32toh(c.eqid_pkd)); 3330*ec55567cSJohn Baldwin eq->abs_id = G_FW_EQ_ETH_CMD_PHYSEQID(be32toh(c.physeqid_pkd)); 3331733b9277SNavdeep Parhar cntxt_id = eq->cntxt_id - sc->sge.eq_start; 3332733b9277SNavdeep Parhar if (cntxt_id >= sc->sge.neq) 3333733b9277SNavdeep Parhar panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__, 3334733b9277SNavdeep Parhar cntxt_id, sc->sge.neq - 1); 3335733b9277SNavdeep Parhar sc->sge.eqmap[cntxt_id] = eq; 3336733b9277SNavdeep Parhar 333754e4ee71SNavdeep Parhar return (rc); 333854e4ee71SNavdeep Parhar } 333954e4ee71SNavdeep Parhar 334009fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 3341733b9277SNavdeep Parhar static int 3342fe2ebb76SJohn Baldwin ofld_eq_alloc(struct adapter *sc, struct vi_info *vi, struct sge_eq *eq) 3343733b9277SNavdeep Parhar { 3344733b9277SNavdeep Parhar int rc, cntxt_id; 3345733b9277SNavdeep Parhar struct fw_eq_ofld_cmd c; 334690e7434aSNavdeep Parhar int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE; 334754e4ee71SNavdeep Parhar 3348733b9277SNavdeep Parhar bzero(&c, sizeof(c)); 3349733b9277SNavdeep Parhar 3350733b9277SNavdeep Parhar c.op_to_vfn = htonl(V_FW_CMD_OP(FW_EQ_OFLD_CMD) | F_FW_CMD_REQUEST | 3351733b9277SNavdeep Parhar F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_OFLD_CMD_PFN(sc->pf) | 3352733b9277SNavdeep Parhar V_FW_EQ_OFLD_CMD_VFN(0)); 3353733b9277SNavdeep Parhar c.alloc_to_len16 = htonl(F_FW_EQ_OFLD_CMD_ALLOC | 3354733b9277SNavdeep Parhar F_FW_EQ_OFLD_CMD_EQSTART | FW_LEN16(c)); 3355733b9277SNavdeep Parhar c.fetchszm_to_iqid = 33567951040fSNavdeep Parhar htonl(V_FW_EQ_OFLD_CMD_HOSTFCMODE(X_HOSTFCMODE_NONE) | 3357733b9277SNavdeep Parhar V_FW_EQ_OFLD_CMD_PCIECHN(eq->tx_chan) | 3358733b9277SNavdeep Parhar F_FW_EQ_OFLD_CMD_FETCHRO | V_FW_EQ_OFLD_CMD_IQID(eq->iqid)); 3359733b9277SNavdeep Parhar c.dcaen_to_eqsize = 3360733b9277SNavdeep Parhar htobe32(V_FW_EQ_OFLD_CMD_FBMIN(X_FETCHBURSTMIN_64B) | 3361733b9277SNavdeep Parhar V_FW_EQ_OFLD_CMD_FBMAX(X_FETCHBURSTMAX_512B) | 33627951040fSNavdeep Parhar V_FW_EQ_OFLD_CMD_EQSIZE(qsize)); 3363733b9277SNavdeep Parhar c.eqaddr = htobe64(eq->ba); 3364733b9277SNavdeep Parhar 3365733b9277SNavdeep Parhar rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c); 3366733b9277SNavdeep Parhar if (rc != 0) { 3367fe2ebb76SJohn Baldwin device_printf(vi->dev, 3368733b9277SNavdeep Parhar "failed to create egress queue for TCP offload: %d\n", rc); 3369733b9277SNavdeep Parhar return (rc); 3370733b9277SNavdeep Parhar } 3371733b9277SNavdeep Parhar eq->flags |= EQ_ALLOCATED; 3372733b9277SNavdeep Parhar 3373733b9277SNavdeep Parhar eq->cntxt_id = G_FW_EQ_OFLD_CMD_EQID(be32toh(c.eqid_pkd)); 337454e4ee71SNavdeep Parhar cntxt_id = eq->cntxt_id - sc->sge.eq_start; 3375733b9277SNavdeep Parhar if (cntxt_id >= sc->sge.neq) 3376733b9277SNavdeep Parhar panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__, 3377733b9277SNavdeep Parhar cntxt_id, sc->sge.neq - 1); 337854e4ee71SNavdeep Parhar sc->sge.eqmap[cntxt_id] = eq; 337954e4ee71SNavdeep Parhar 3380733b9277SNavdeep Parhar return (rc); 3381733b9277SNavdeep Parhar } 3382733b9277SNavdeep Parhar #endif 3383733b9277SNavdeep Parhar 3384733b9277SNavdeep Parhar static int 3385fe2ebb76SJohn Baldwin alloc_eq(struct adapter *sc, struct vi_info *vi, struct sge_eq *eq) 3386733b9277SNavdeep Parhar { 33877951040fSNavdeep Parhar int rc, qsize; 3388733b9277SNavdeep Parhar size_t len; 3389733b9277SNavdeep Parhar 3390733b9277SNavdeep Parhar mtx_init(&eq->eq_lock, eq->lockname, NULL, MTX_DEF); 3391733b9277SNavdeep Parhar 339290e7434aSNavdeep Parhar qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE; 33937951040fSNavdeep Parhar len = qsize * EQ_ESIZE; 3394733b9277SNavdeep Parhar rc = alloc_ring(sc, len, &eq->desc_tag, &eq->desc_map, 3395733b9277SNavdeep Parhar &eq->ba, (void **)&eq->desc); 3396733b9277SNavdeep Parhar if (rc) 3397733b9277SNavdeep Parhar return (rc); 3398733b9277SNavdeep Parhar 3399733b9277SNavdeep Parhar eq->pidx = eq->cidx = 0; 34007951040fSNavdeep Parhar eq->equeqidx = eq->dbidx = 0; 3401d14b0ac1SNavdeep Parhar eq->doorbells = sc->doorbells; 3402733b9277SNavdeep Parhar 3403733b9277SNavdeep Parhar switch (eq->flags & EQ_TYPEMASK) { 3404733b9277SNavdeep Parhar case EQ_CTRL: 3405733b9277SNavdeep Parhar rc = ctrl_eq_alloc(sc, eq); 3406733b9277SNavdeep Parhar break; 3407733b9277SNavdeep Parhar 3408733b9277SNavdeep Parhar case EQ_ETH: 3409fe2ebb76SJohn Baldwin rc = eth_eq_alloc(sc, vi, eq); 3410733b9277SNavdeep Parhar break; 3411733b9277SNavdeep Parhar 341209fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 3413733b9277SNavdeep Parhar case EQ_OFLD: 3414fe2ebb76SJohn Baldwin rc = ofld_eq_alloc(sc, vi, eq); 3415733b9277SNavdeep Parhar break; 3416733b9277SNavdeep Parhar #endif 3417733b9277SNavdeep Parhar 3418733b9277SNavdeep Parhar default: 3419733b9277SNavdeep Parhar panic("%s: invalid eq type %d.", __func__, 3420733b9277SNavdeep Parhar eq->flags & EQ_TYPEMASK); 3421733b9277SNavdeep Parhar } 3422733b9277SNavdeep Parhar if (rc != 0) { 3423733b9277SNavdeep Parhar device_printf(sc->dev, 3424c086e3d1SNavdeep Parhar "failed to allocate egress queue(%d): %d\n", 3425733b9277SNavdeep Parhar eq->flags & EQ_TYPEMASK, rc); 3426733b9277SNavdeep Parhar } 3427733b9277SNavdeep Parhar 3428d14b0ac1SNavdeep Parhar if (isset(&eq->doorbells, DOORBELL_UDB) || 3429d14b0ac1SNavdeep Parhar isset(&eq->doorbells, DOORBELL_UDBWC) || 343077ad3c41SNavdeep Parhar isset(&eq->doorbells, DOORBELL_WCWR)) { 343190e7434aSNavdeep Parhar uint32_t s_qpp = sc->params.sge.eq_s_qpp; 3432d14b0ac1SNavdeep Parhar uint32_t mask = (1 << s_qpp) - 1; 3433d14b0ac1SNavdeep Parhar volatile uint8_t *udb; 3434d14b0ac1SNavdeep Parhar 3435d14b0ac1SNavdeep Parhar udb = sc->udbs_base + UDBS_DB_OFFSET; 3436d14b0ac1SNavdeep Parhar udb += (eq->cntxt_id >> s_qpp) << PAGE_SHIFT; /* pg offset */ 3437d14b0ac1SNavdeep Parhar eq->udb_qid = eq->cntxt_id & mask; /* id in page */ 3438f10405b3SNavdeep Parhar if (eq->udb_qid >= PAGE_SIZE / UDBS_SEG_SIZE) 343977ad3c41SNavdeep Parhar clrbit(&eq->doorbells, DOORBELL_WCWR); 3440d14b0ac1SNavdeep Parhar else { 3441d14b0ac1SNavdeep Parhar udb += eq->udb_qid << UDBS_SEG_SHIFT; /* seg offset */ 3442d14b0ac1SNavdeep Parhar eq->udb_qid = 0; 3443d14b0ac1SNavdeep Parhar } 3444d14b0ac1SNavdeep Parhar eq->udb = (volatile void *)udb; 3445d14b0ac1SNavdeep Parhar } 3446d14b0ac1SNavdeep Parhar 3447733b9277SNavdeep Parhar return (rc); 3448733b9277SNavdeep Parhar } 3449733b9277SNavdeep Parhar 3450733b9277SNavdeep Parhar static int 3451733b9277SNavdeep Parhar free_eq(struct adapter *sc, struct sge_eq *eq) 3452733b9277SNavdeep Parhar { 3453733b9277SNavdeep Parhar int rc; 3454733b9277SNavdeep Parhar 3455733b9277SNavdeep Parhar if (eq->flags & EQ_ALLOCATED) { 3456733b9277SNavdeep Parhar switch (eq->flags & EQ_TYPEMASK) { 3457733b9277SNavdeep Parhar case EQ_CTRL: 3458733b9277SNavdeep Parhar rc = -t4_ctrl_eq_free(sc, sc->mbox, sc->pf, 0, 3459733b9277SNavdeep Parhar eq->cntxt_id); 3460733b9277SNavdeep Parhar break; 3461733b9277SNavdeep Parhar 3462733b9277SNavdeep Parhar case EQ_ETH: 3463733b9277SNavdeep Parhar rc = -t4_eth_eq_free(sc, sc->mbox, sc->pf, 0, 3464733b9277SNavdeep Parhar eq->cntxt_id); 3465733b9277SNavdeep Parhar break; 3466733b9277SNavdeep Parhar 346709fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD 3468733b9277SNavdeep Parhar case EQ_OFLD: 3469733b9277SNavdeep Parhar rc = -t4_ofld_eq_free(sc, sc->mbox, sc->pf, 0, 3470733b9277SNavdeep Parhar eq->cntxt_id); 3471733b9277SNavdeep Parhar break; 3472733b9277SNavdeep Parhar #endif 3473733b9277SNavdeep Parhar 3474733b9277SNavdeep Parhar default: 3475733b9277SNavdeep Parhar panic("%s: invalid eq type %d.", __func__, 3476733b9277SNavdeep Parhar eq->flags & EQ_TYPEMASK); 3477733b9277SNavdeep Parhar } 3478733b9277SNavdeep Parhar if (rc != 0) { 3479733b9277SNavdeep Parhar device_printf(sc->dev, 3480733b9277SNavdeep Parhar "failed to free egress queue (%d): %d\n", 3481733b9277SNavdeep Parhar eq->flags & EQ_TYPEMASK, rc); 3482733b9277SNavdeep Parhar return (rc); 3483733b9277SNavdeep Parhar } 3484733b9277SNavdeep Parhar eq->flags &= ~EQ_ALLOCATED; 3485733b9277SNavdeep Parhar } 3486733b9277SNavdeep Parhar 3487733b9277SNavdeep Parhar free_ring(sc, eq->desc_tag, eq->desc_map, eq->ba, eq->desc); 3488733b9277SNavdeep Parhar 3489733b9277SNavdeep Parhar if (mtx_initialized(&eq->eq_lock)) 3490733b9277SNavdeep Parhar mtx_destroy(&eq->eq_lock); 3491733b9277SNavdeep Parhar 3492733b9277SNavdeep Parhar bzero(eq, sizeof(*eq)); 3493733b9277SNavdeep Parhar return (0); 3494733b9277SNavdeep Parhar } 3495733b9277SNavdeep Parhar 3496733b9277SNavdeep Parhar static int 3497fe2ebb76SJohn Baldwin alloc_wrq(struct adapter *sc, struct vi_info *vi, struct sge_wrq *wrq, 3498733b9277SNavdeep Parhar struct sysctl_oid *oid) 3499733b9277SNavdeep Parhar { 3500733b9277SNavdeep Parhar int rc; 3501fe2ebb76SJohn Baldwin struct sysctl_ctx_list *ctx = vi ? &vi->ctx : &sc->ctx; 3502733b9277SNavdeep Parhar struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid); 3503733b9277SNavdeep Parhar 3504fe2ebb76SJohn Baldwin rc = alloc_eq(sc, vi, &wrq->eq); 3505733b9277SNavdeep Parhar if (rc) 3506733b9277SNavdeep Parhar return (rc); 3507733b9277SNavdeep Parhar 3508733b9277SNavdeep Parhar wrq->adapter = sc; 35097951040fSNavdeep Parhar TASK_INIT(&wrq->wrq_tx_task, 0, wrq_tx_drain, wrq); 35107951040fSNavdeep Parhar TAILQ_INIT(&wrq->incomplete_wrs); 351109fe6320SNavdeep Parhar STAILQ_INIT(&wrq->wr_list); 35127951040fSNavdeep Parhar wrq->nwr_pending = 0; 35137951040fSNavdeep Parhar wrq->ndesc_needed = 0; 3514733b9277SNavdeep Parhar 3515733b9277SNavdeep Parhar SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD, 3516733b9277SNavdeep Parhar &wrq->eq.cntxt_id, 0, "SGE context id of the queue"); 3517733b9277SNavdeep Parhar SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cidx", 3518733b9277SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.cidx, 0, sysctl_uint16, "I", 3519733b9277SNavdeep Parhar "consumer index"); 3520733b9277SNavdeep Parhar SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "pidx", 3521733b9277SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.pidx, 0, sysctl_uint16, "I", 3522733b9277SNavdeep Parhar "producer index"); 35237951040fSNavdeep Parhar SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "tx_wrs_direct", CTLFLAG_RD, 35247951040fSNavdeep Parhar &wrq->tx_wrs_direct, "# of work requests (direct)"); 35257951040fSNavdeep Parhar SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "tx_wrs_copied", CTLFLAG_RD, 35267951040fSNavdeep Parhar &wrq->tx_wrs_copied, "# of work requests (copied)"); 3527733b9277SNavdeep Parhar 3528733b9277SNavdeep Parhar return (rc); 3529733b9277SNavdeep Parhar } 3530733b9277SNavdeep Parhar 3531733b9277SNavdeep Parhar static int 3532733b9277SNavdeep Parhar free_wrq(struct adapter *sc, struct sge_wrq *wrq) 3533733b9277SNavdeep Parhar { 3534733b9277SNavdeep Parhar int rc; 3535733b9277SNavdeep Parhar 3536733b9277SNavdeep Parhar rc = free_eq(sc, &wrq->eq); 3537733b9277SNavdeep Parhar if (rc) 3538733b9277SNavdeep Parhar return (rc); 3539733b9277SNavdeep Parhar 3540733b9277SNavdeep Parhar bzero(wrq, sizeof(*wrq)); 3541733b9277SNavdeep Parhar return (0); 3542733b9277SNavdeep Parhar } 3543733b9277SNavdeep Parhar 3544733b9277SNavdeep Parhar static int 3545fe2ebb76SJohn Baldwin alloc_txq(struct vi_info *vi, struct sge_txq *txq, int idx, 3546733b9277SNavdeep Parhar struct sysctl_oid *oid) 3547733b9277SNavdeep Parhar { 3548733b9277SNavdeep Parhar int rc; 3549fe2ebb76SJohn Baldwin struct port_info *pi = vi->pi; 3550733b9277SNavdeep Parhar struct adapter *sc = pi->adapter; 3551733b9277SNavdeep Parhar struct sge_eq *eq = &txq->eq; 3552733b9277SNavdeep Parhar char name[16]; 3553733b9277SNavdeep Parhar struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid); 3554733b9277SNavdeep Parhar 35557951040fSNavdeep Parhar rc = mp_ring_alloc(&txq->r, eq->sidx, txq, eth_tx, can_resume_eth_tx, 35567951040fSNavdeep Parhar M_CXGBE, M_WAITOK); 35577951040fSNavdeep Parhar if (rc != 0) { 35587951040fSNavdeep Parhar device_printf(sc->dev, "failed to allocate mp_ring: %d\n", rc); 35597951040fSNavdeep Parhar return (rc); 35607951040fSNavdeep Parhar } 35617951040fSNavdeep Parhar 3562fe2ebb76SJohn Baldwin rc = alloc_eq(sc, vi, eq); 35637951040fSNavdeep Parhar if (rc != 0) { 35647951040fSNavdeep Parhar mp_ring_free(txq->r); 35657951040fSNavdeep Parhar txq->r = NULL; 3566733b9277SNavdeep Parhar return (rc); 35677951040fSNavdeep Parhar } 3568733b9277SNavdeep Parhar 35697951040fSNavdeep Parhar /* Can't fail after this point. */ 35707951040fSNavdeep Parhar 3571*ec55567cSJohn Baldwin if (idx == 0) 3572*ec55567cSJohn Baldwin sc->sge.eq_base = eq->abs_id - eq->cntxt_id; 3573*ec55567cSJohn Baldwin else 3574*ec55567cSJohn Baldwin KASSERT(eq->cntxt_id + sc->sge.eq_base == eq->abs_id, 3575*ec55567cSJohn Baldwin ("eq_base mismatch")); 3576*ec55567cSJohn Baldwin KASSERT(sc->sge.eq_base == 0 || sc->flags & IS_VF, 3577*ec55567cSJohn Baldwin ("PF with non-zero eq_base")); 3578*ec55567cSJohn Baldwin 35797951040fSNavdeep Parhar TASK_INIT(&txq->tx_reclaim_task, 0, tx_reclaim, eq); 3580fe2ebb76SJohn Baldwin txq->ifp = vi->ifp; 35817951040fSNavdeep Parhar txq->gl = sglist_alloc(TX_SGL_SEGS, M_WAITOK); 35827951040fSNavdeep Parhar txq->cpl_ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) | 3583fe2ebb76SJohn Baldwin V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_VF_VLD(1) | 3584fe2ebb76SJohn Baldwin V_TXPKT_VF(vi->viid)); 358502f972e8SNavdeep Parhar txq->tc_idx = -1; 35867951040fSNavdeep Parhar txq->sdesc = malloc(eq->sidx * sizeof(struct tx_sdesc), M_CXGBE, 3587733b9277SNavdeep Parhar M_ZERO | M_WAITOK); 358854e4ee71SNavdeep Parhar 358954e4ee71SNavdeep Parhar snprintf(name, sizeof(name), "%d", idx); 3590fe2ebb76SJohn Baldwin oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name, CTLFLAG_RD, 359154e4ee71SNavdeep Parhar NULL, "tx queue"); 359254e4ee71SNavdeep Parhar children = SYSCTL_CHILDREN(oid); 359354e4ee71SNavdeep Parhar 3594*ec55567cSJohn Baldwin SYSCTL_ADD_UINT(&vi->ctx, children, OID_AUTO, "abs_id", CTLFLAG_RD, 3595*ec55567cSJohn Baldwin &eq->abs_id, 0, "absolute id of the queue"); 3596fe2ebb76SJohn Baldwin SYSCTL_ADD_UINT(&vi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD, 359759bc8ce0SNavdeep Parhar &eq->cntxt_id, 0, "SGE context id of the queue"); 3598fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cidx", 359959bc8ce0SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &eq->cidx, 0, sysctl_uint16, "I", 360059bc8ce0SNavdeep Parhar "consumer index"); 3601fe2ebb76SJohn Baldwin SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "pidx", 360259bc8ce0SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RD, &eq->pidx, 0, sysctl_uint16, "I", 360359bc8ce0SNavdeep Parhar "producer index"); 360459bc8ce0SNavdeep Parhar 360502f972e8SNavdeep Parhar SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "tc", 360602f972e8SNavdeep Parhar CTLTYPE_INT | CTLFLAG_RW, vi, idx, sysctl_tc, "I", 360702f972e8SNavdeep Parhar "traffic class (-1 means none)"); 360802f972e8SNavdeep Parhar 3609fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txcsum", CTLFLAG_RD, 361054e4ee71SNavdeep Parhar &txq->txcsum, "# of times hardware assisted with checksum"); 3611fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "vlan_insertion", 361254e4ee71SNavdeep Parhar CTLFLAG_RD, &txq->vlan_insertion, 361354e4ee71SNavdeep Parhar "# of times hardware inserted 802.1Q tag"); 3614fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "tso_wrs", CTLFLAG_RD, 3615a1ea9a82SNavdeep Parhar &txq->tso_wrs, "# of TSO work requests"); 3616fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "imm_wrs", CTLFLAG_RD, 361754e4ee71SNavdeep Parhar &txq->imm_wrs, "# of work requests with immediate data"); 3618fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "sgl_wrs", CTLFLAG_RD, 361954e4ee71SNavdeep Parhar &txq->sgl_wrs, "# of work requests with direct SGL"); 3620fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkt_wrs", CTLFLAG_RD, 362154e4ee71SNavdeep Parhar &txq->txpkt_wrs, "# of txpkt work requests (one pkt/WR)"); 3622fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkts0_wrs", 36237951040fSNavdeep Parhar CTLFLAG_RD, &txq->txpkts0_wrs, 36247951040fSNavdeep Parhar "# of txpkts (type 0) work requests"); 3625fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkts1_wrs", 36267951040fSNavdeep Parhar CTLFLAG_RD, &txq->txpkts1_wrs, 36277951040fSNavdeep Parhar "# of txpkts (type 1) work requests"); 3628fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkts0_pkts", 36297951040fSNavdeep Parhar CTLFLAG_RD, &txq->txpkts0_pkts, 36307951040fSNavdeep Parhar "# of frames tx'd using type0 txpkts work requests"); 3631fe2ebb76SJohn Baldwin SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkts1_pkts", 36327951040fSNavdeep Parhar CTLFLAG_RD, &txq->txpkts1_pkts, 36337951040fSNavdeep Parhar "# of frames tx'd using type1 txpkts work requests"); 363454e4ee71SNavdeep Parhar 3635fe2ebb76SJohn Baldwin SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_enqueues", 36367951040fSNavdeep Parhar CTLFLAG_RD, &txq->r->enqueues, 36377951040fSNavdeep Parhar "# of enqueues to the mp_ring for this queue"); 3638fe2ebb76SJohn Baldwin SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_drops", 36397951040fSNavdeep Parhar CTLFLAG_RD, &txq->r->drops, 36407951040fSNavdeep Parhar "# of drops in the mp_ring for this queue"); 3641fe2ebb76SJohn Baldwin SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_starts", 36427951040fSNavdeep Parhar CTLFLAG_RD, &txq->r->starts, 36437951040fSNavdeep Parhar "# of normal consumer starts in the mp_ring for this queue"); 3644fe2ebb76SJohn Baldwin SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_stalls", 36457951040fSNavdeep Parhar CTLFLAG_RD, &txq->r->stalls, 36467951040fSNavdeep Parhar "# of consumer stalls in the mp_ring for this queue"); 3647fe2ebb76SJohn Baldwin SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_restarts", 36487951040fSNavdeep Parhar CTLFLAG_RD, &txq->r->restarts, 36497951040fSNavdeep Parhar "# of consumer restarts in the mp_ring for this queue"); 3650fe2ebb76SJohn Baldwin SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_abdications", 36517951040fSNavdeep Parhar CTLFLAG_RD, &txq->r->abdications, 36527951040fSNavdeep Parhar "# of consumer abdications in the mp_ring for this queue"); 365354e4ee71SNavdeep Parhar 36547951040fSNavdeep Parhar return (0); 365554e4ee71SNavdeep Parhar } 365654e4ee71SNavdeep Parhar 365754e4ee71SNavdeep Parhar static int 3658fe2ebb76SJohn Baldwin free_txq(struct vi_info *vi, struct sge_txq *txq) 365954e4ee71SNavdeep Parhar { 366054e4ee71SNavdeep Parhar int rc; 3661fe2ebb76SJohn Baldwin struct adapter *sc = vi->pi->adapter; 366254e4ee71SNavdeep Parhar struct sge_eq *eq = &txq->eq; 366354e4ee71SNavdeep Parhar 3664733b9277SNavdeep Parhar rc = free_eq(sc, eq); 3665733b9277SNavdeep Parhar if (rc) 366654e4ee71SNavdeep Parhar return (rc); 366754e4ee71SNavdeep Parhar 36687951040fSNavdeep Parhar sglist_free(txq->gl); 3669f7dfe243SNavdeep Parhar free(txq->sdesc, M_CXGBE); 36707951040fSNavdeep Parhar mp_ring_free(txq->r); 367154e4ee71SNavdeep Parhar 367254e4ee71SNavdeep Parhar bzero(txq, sizeof(*txq)); 367354e4ee71SNavdeep Parhar return (0); 367454e4ee71SNavdeep Parhar } 367554e4ee71SNavdeep Parhar 367654e4ee71SNavdeep Parhar static void 367754e4ee71SNavdeep Parhar oneseg_dma_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error) 367854e4ee71SNavdeep Parhar { 367954e4ee71SNavdeep Parhar bus_addr_t *ba = arg; 368054e4ee71SNavdeep Parhar 368154e4ee71SNavdeep Parhar KASSERT(nseg == 1, 368254e4ee71SNavdeep Parhar ("%s meant for single segment mappings only.", __func__)); 368354e4ee71SNavdeep Parhar 368454e4ee71SNavdeep Parhar *ba = error ? 0 : segs->ds_addr; 368554e4ee71SNavdeep Parhar } 368654e4ee71SNavdeep Parhar 368754e4ee71SNavdeep Parhar static inline void 368854e4ee71SNavdeep Parhar ring_fl_db(struct adapter *sc, struct sge_fl *fl) 368954e4ee71SNavdeep Parhar { 36904d6db4e0SNavdeep Parhar uint32_t n, v; 369154e4ee71SNavdeep Parhar 36924d6db4e0SNavdeep Parhar n = IDXDIFF(fl->pidx / 8, fl->dbidx, fl->sidx); 36934d6db4e0SNavdeep Parhar MPASS(n > 0); 3694d14b0ac1SNavdeep Parhar 369554e4ee71SNavdeep Parhar wmb(); 36964d6db4e0SNavdeep Parhar v = fl->dbval | V_PIDX(n); 36974d6db4e0SNavdeep Parhar if (fl->udb) 36984d6db4e0SNavdeep Parhar *fl->udb = htole32(v); 36994d6db4e0SNavdeep Parhar else 3700315048f2SJohn Baldwin t4_write_reg(sc, sc->sge_kdoorbell_reg, v); 37014d6db4e0SNavdeep Parhar IDXINCR(fl->dbidx, n, fl->sidx); 370254e4ee71SNavdeep Parhar } 370354e4ee71SNavdeep Parhar 3704fb12416cSNavdeep Parhar /* 37054d6db4e0SNavdeep Parhar * Fills up the freelist by allocating up to 'n' buffers. Buffers that are 37064d6db4e0SNavdeep Parhar * recycled do not count towards this allocation budget. 3707733b9277SNavdeep Parhar * 37084d6db4e0SNavdeep Parhar * Returns non-zero to indicate that this freelist should be added to the list 37094d6db4e0SNavdeep Parhar * of starving freelists. 3710fb12416cSNavdeep Parhar */ 3711733b9277SNavdeep Parhar static int 37124d6db4e0SNavdeep Parhar refill_fl(struct adapter *sc, struct sge_fl *fl, int n) 371354e4ee71SNavdeep Parhar { 37144d6db4e0SNavdeep Parhar __be64 *d; 37154d6db4e0SNavdeep Parhar struct fl_sdesc *sd; 371638035ed6SNavdeep Parhar uintptr_t pa; 371754e4ee71SNavdeep Parhar caddr_t cl; 37184d6db4e0SNavdeep Parhar struct cluster_layout *cll; 37194d6db4e0SNavdeep Parhar struct sw_zone_info *swz; 372038035ed6SNavdeep Parhar struct cluster_metadata *clm; 37214d6db4e0SNavdeep Parhar uint16_t max_pidx; 37224d6db4e0SNavdeep Parhar uint16_t hw_cidx = fl->hw_cidx; /* stable snapshot */ 372354e4ee71SNavdeep Parhar 372454e4ee71SNavdeep Parhar FL_LOCK_ASSERT_OWNED(fl); 372554e4ee71SNavdeep Parhar 37264d6db4e0SNavdeep Parhar /* 3727453130d9SPedro F. Giffuni * We always stop at the beginning of the hardware descriptor that's just 37284d6db4e0SNavdeep Parhar * before the one with the hw cidx. This is to avoid hw pidx = hw cidx, 37294d6db4e0SNavdeep Parhar * which would mean an empty freelist to the chip. 37304d6db4e0SNavdeep Parhar */ 37314d6db4e0SNavdeep Parhar max_pidx = __predict_false(hw_cidx == 0) ? fl->sidx - 1 : hw_cidx - 1; 37324d6db4e0SNavdeep Parhar if (fl->pidx == max_pidx * 8) 37334d6db4e0SNavdeep Parhar return (0); 373454e4ee71SNavdeep Parhar 37354d6db4e0SNavdeep Parhar d = &fl->desc[fl->pidx]; 37364d6db4e0SNavdeep Parhar sd = &fl->sdesc[fl->pidx]; 37374d6db4e0SNavdeep Parhar cll = &fl->cll_def; /* default layout */ 37384d6db4e0SNavdeep Parhar swz = &sc->sge.sw_zone_info[cll->zidx]; 37394d6db4e0SNavdeep Parhar 37404d6db4e0SNavdeep Parhar while (n > 0) { 374154e4ee71SNavdeep Parhar 374254e4ee71SNavdeep Parhar if (sd->cl != NULL) { 374354e4ee71SNavdeep Parhar 3744c3fb7725SNavdeep Parhar if (sd->nmbuf == 0) { 374538035ed6SNavdeep Parhar /* 374638035ed6SNavdeep Parhar * Fast recycle without involving any atomics on 374738035ed6SNavdeep Parhar * the cluster's metadata (if the cluster has 374838035ed6SNavdeep Parhar * metadata). This happens when all frames 374938035ed6SNavdeep Parhar * received in the cluster were small enough to 375038035ed6SNavdeep Parhar * fit within a single mbuf each. 375138035ed6SNavdeep Parhar */ 375238035ed6SNavdeep Parhar fl->cl_fast_recycled++; 3753ccc69b2fSNavdeep Parhar #ifdef INVARIANTS 3754ccc69b2fSNavdeep Parhar clm = cl_metadata(sc, fl, &sd->cll, sd->cl); 3755ccc69b2fSNavdeep Parhar if (clm != NULL) 3756ccc69b2fSNavdeep Parhar MPASS(clm->refcount == 1); 3757ccc69b2fSNavdeep Parhar #endif 375838035ed6SNavdeep Parhar goto recycled_fast; 375938035ed6SNavdeep Parhar } 376054e4ee71SNavdeep Parhar 376138035ed6SNavdeep Parhar /* 376238035ed6SNavdeep Parhar * Cluster is guaranteed to have metadata. Clusters 376338035ed6SNavdeep Parhar * without metadata always take the fast recycle path 376438035ed6SNavdeep Parhar * when they're recycled. 376538035ed6SNavdeep Parhar */ 376638035ed6SNavdeep Parhar clm = cl_metadata(sc, fl, &sd->cll, sd->cl); 376738035ed6SNavdeep Parhar MPASS(clm != NULL); 37681458bff9SNavdeep Parhar 376938035ed6SNavdeep Parhar if (atomic_fetchadd_int(&clm->refcount, -1) == 1) { 377038035ed6SNavdeep Parhar fl->cl_recycled++; 377182eff304SNavdeep Parhar counter_u64_add(extfree_rels, 1); 377254e4ee71SNavdeep Parhar goto recycled; 377354e4ee71SNavdeep Parhar } 37741458bff9SNavdeep Parhar sd->cl = NULL; /* gave up my reference */ 37751458bff9SNavdeep Parhar } 377638035ed6SNavdeep Parhar MPASS(sd->cl == NULL); 377738035ed6SNavdeep Parhar alloc: 377838035ed6SNavdeep Parhar cl = uma_zalloc(swz->zone, M_NOWAIT); 377938035ed6SNavdeep Parhar if (__predict_false(cl == NULL)) { 378038035ed6SNavdeep Parhar if (cll == &fl->cll_alt || fl->cll_alt.zidx == -1 || 378138035ed6SNavdeep Parhar fl->cll_def.zidx == fl->cll_alt.zidx) 378254e4ee71SNavdeep Parhar break; 378354e4ee71SNavdeep Parhar 378438035ed6SNavdeep Parhar /* fall back to the safe zone */ 378538035ed6SNavdeep Parhar cll = &fl->cll_alt; 378638035ed6SNavdeep Parhar swz = &sc->sge.sw_zone_info[cll->zidx]; 378738035ed6SNavdeep Parhar goto alloc; 378854e4ee71SNavdeep Parhar } 378938035ed6SNavdeep Parhar fl->cl_allocated++; 37904d6db4e0SNavdeep Parhar n--; 379154e4ee71SNavdeep Parhar 379238035ed6SNavdeep Parhar pa = pmap_kextract((vm_offset_t)cl); 379338035ed6SNavdeep Parhar pa += cll->region1; 379454e4ee71SNavdeep Parhar sd->cl = cl; 379538035ed6SNavdeep Parhar sd->cll = *cll; 379638035ed6SNavdeep Parhar *d = htobe64(pa | cll->hwidx); 379738035ed6SNavdeep Parhar clm = cl_metadata(sc, fl, cll, cl); 379838035ed6SNavdeep Parhar if (clm != NULL) { 37997d29df59SNavdeep Parhar recycled: 380038035ed6SNavdeep Parhar #ifdef INVARIANTS 380138035ed6SNavdeep Parhar clm->sd = sd; 380238035ed6SNavdeep Parhar #endif 380338035ed6SNavdeep Parhar clm->refcount = 1; 380438035ed6SNavdeep Parhar } 3805c3fb7725SNavdeep Parhar sd->nmbuf = 0; 380638035ed6SNavdeep Parhar recycled_fast: 380738035ed6SNavdeep Parhar d++; 380854e4ee71SNavdeep Parhar sd++; 38094d6db4e0SNavdeep Parhar if (__predict_false(++fl->pidx % 8 == 0)) { 38104d6db4e0SNavdeep Parhar uint16_t pidx = fl->pidx / 8; 38114d6db4e0SNavdeep Parhar 38124d6db4e0SNavdeep Parhar if (__predict_false(pidx == fl->sidx)) { 381354e4ee71SNavdeep Parhar fl->pidx = 0; 38144d6db4e0SNavdeep Parhar pidx = 0; 381554e4ee71SNavdeep Parhar sd = fl->sdesc; 381654e4ee71SNavdeep Parhar d = fl->desc; 381754e4ee71SNavdeep Parhar } 38184d6db4e0SNavdeep Parhar if (pidx == max_pidx) 38194d6db4e0SNavdeep Parhar break; 38204d6db4e0SNavdeep Parhar 38214d6db4e0SNavdeep Parhar if (IDXDIFF(pidx, fl->dbidx, fl->sidx) >= 4) 38224d6db4e0SNavdeep Parhar ring_fl_db(sc, fl); 38234d6db4e0SNavdeep Parhar } 382454e4ee71SNavdeep Parhar } 3825fb12416cSNavdeep Parhar 38264d6db4e0SNavdeep Parhar if (fl->pidx / 8 != fl->dbidx) 3827fb12416cSNavdeep Parhar ring_fl_db(sc, fl); 3828733b9277SNavdeep Parhar 3829733b9277SNavdeep Parhar return (FL_RUNNING_LOW(fl) && !(fl->flags & FL_STARVING)); 3830733b9277SNavdeep Parhar } 3831733b9277SNavdeep Parhar 3832733b9277SNavdeep Parhar /* 3833733b9277SNavdeep Parhar * Attempt to refill all starving freelists. 3834733b9277SNavdeep Parhar */ 3835733b9277SNavdeep Parhar static void 3836733b9277SNavdeep Parhar refill_sfl(void *arg) 3837733b9277SNavdeep Parhar { 3838733b9277SNavdeep Parhar struct adapter *sc = arg; 3839733b9277SNavdeep Parhar struct sge_fl *fl, *fl_temp; 3840733b9277SNavdeep Parhar 3841fe2ebb76SJohn Baldwin mtx_assert(&sc->sfl_lock, MA_OWNED); 3842733b9277SNavdeep Parhar TAILQ_FOREACH_SAFE(fl, &sc->sfl, link, fl_temp) { 3843733b9277SNavdeep Parhar FL_LOCK(fl); 3844733b9277SNavdeep Parhar refill_fl(sc, fl, 64); 3845733b9277SNavdeep Parhar if (FL_NOT_RUNNING_LOW(fl) || fl->flags & FL_DOOMED) { 3846733b9277SNavdeep Parhar TAILQ_REMOVE(&sc->sfl, fl, link); 3847733b9277SNavdeep Parhar fl->flags &= ~FL_STARVING; 3848733b9277SNavdeep Parhar } 3849733b9277SNavdeep Parhar FL_UNLOCK(fl); 3850733b9277SNavdeep Parhar } 3851733b9277SNavdeep Parhar 3852733b9277SNavdeep Parhar if (!TAILQ_EMPTY(&sc->sfl)) 3853733b9277SNavdeep Parhar callout_schedule(&sc->sfl_callout, hz / 5); 385454e4ee71SNavdeep Parhar } 385554e4ee71SNavdeep Parhar 385654e4ee71SNavdeep Parhar static int 385754e4ee71SNavdeep Parhar alloc_fl_sdesc(struct sge_fl *fl) 385854e4ee71SNavdeep Parhar { 385954e4ee71SNavdeep Parhar 38604d6db4e0SNavdeep Parhar fl->sdesc = malloc(fl->sidx * 8 * sizeof(struct fl_sdesc), M_CXGBE, 386154e4ee71SNavdeep Parhar M_ZERO | M_WAITOK); 386254e4ee71SNavdeep Parhar 386354e4ee71SNavdeep Parhar return (0); 386454e4ee71SNavdeep Parhar } 386554e4ee71SNavdeep Parhar 386654e4ee71SNavdeep Parhar static void 38671458bff9SNavdeep Parhar free_fl_sdesc(struct adapter *sc, struct sge_fl *fl) 386854e4ee71SNavdeep Parhar { 386954e4ee71SNavdeep Parhar struct fl_sdesc *sd; 387038035ed6SNavdeep Parhar struct cluster_metadata *clm; 387138035ed6SNavdeep Parhar struct cluster_layout *cll; 387254e4ee71SNavdeep Parhar int i; 387354e4ee71SNavdeep Parhar 387454e4ee71SNavdeep Parhar sd = fl->sdesc; 38754d6db4e0SNavdeep Parhar for (i = 0; i < fl->sidx * 8; i++, sd++) { 387638035ed6SNavdeep Parhar if (sd->cl == NULL) 387738035ed6SNavdeep Parhar continue; 387854e4ee71SNavdeep Parhar 387938035ed6SNavdeep Parhar cll = &sd->cll; 388038035ed6SNavdeep Parhar clm = cl_metadata(sc, fl, cll, sd->cl); 388182eff304SNavdeep Parhar if (sd->nmbuf == 0) 388238035ed6SNavdeep Parhar uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl); 388382eff304SNavdeep Parhar else if (clm && atomic_fetchadd_int(&clm->refcount, -1) == 1) { 388482eff304SNavdeep Parhar uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl); 388582eff304SNavdeep Parhar counter_u64_add(extfree_rels, 1); 388654e4ee71SNavdeep Parhar } 388738035ed6SNavdeep Parhar sd->cl = NULL; 388854e4ee71SNavdeep Parhar } 388954e4ee71SNavdeep Parhar 389054e4ee71SNavdeep Parhar free(fl->sdesc, M_CXGBE); 389154e4ee71SNavdeep Parhar fl->sdesc = NULL; 389254e4ee71SNavdeep Parhar } 389354e4ee71SNavdeep Parhar 38947951040fSNavdeep Parhar static inline void 38957951040fSNavdeep Parhar get_pkt_gl(struct mbuf *m, struct sglist *gl) 389654e4ee71SNavdeep Parhar { 38977951040fSNavdeep Parhar int rc; 389854e4ee71SNavdeep Parhar 38997951040fSNavdeep Parhar M_ASSERTPKTHDR(m); 390054e4ee71SNavdeep Parhar 39017951040fSNavdeep Parhar sglist_reset(gl); 39027951040fSNavdeep Parhar rc = sglist_append_mbuf(gl, m); 39037951040fSNavdeep Parhar if (__predict_false(rc != 0)) { 39047951040fSNavdeep Parhar panic("%s: mbuf %p (%d segs) was vetted earlier but now fails " 39057951040fSNavdeep Parhar "with %d.", __func__, m, mbuf_nsegs(m), rc); 390654e4ee71SNavdeep Parhar } 390754e4ee71SNavdeep Parhar 39087951040fSNavdeep Parhar KASSERT(gl->sg_nseg == mbuf_nsegs(m), 39097951040fSNavdeep Parhar ("%s: nsegs changed for mbuf %p from %d to %d", __func__, m, 39107951040fSNavdeep Parhar mbuf_nsegs(m), gl->sg_nseg)); 39117951040fSNavdeep Parhar KASSERT(gl->sg_nseg > 0 && 39127951040fSNavdeep Parhar gl->sg_nseg <= (needs_tso(m) ? TX_SGL_SEGS_TSO : TX_SGL_SEGS), 39137951040fSNavdeep Parhar ("%s: %d segments, should have been 1 <= nsegs <= %d", __func__, 39147951040fSNavdeep Parhar gl->sg_nseg, needs_tso(m) ? TX_SGL_SEGS_TSO : TX_SGL_SEGS)); 391554e4ee71SNavdeep Parhar } 391654e4ee71SNavdeep Parhar 391754e4ee71SNavdeep Parhar /* 39187951040fSNavdeep Parhar * len16 for a txpkt WR with a GL. Includes the firmware work request header. 391954e4ee71SNavdeep Parhar */ 39207951040fSNavdeep Parhar static inline u_int 39217951040fSNavdeep Parhar txpkt_len16(u_int nsegs, u_int tso) 39227951040fSNavdeep Parhar { 39237951040fSNavdeep Parhar u_int n; 39247951040fSNavdeep Parhar 39257951040fSNavdeep Parhar MPASS(nsegs > 0); 39267951040fSNavdeep Parhar 39277951040fSNavdeep Parhar nsegs--; /* first segment is part of ulptx_sgl */ 39287951040fSNavdeep Parhar n = sizeof(struct fw_eth_tx_pkt_wr) + sizeof(struct cpl_tx_pkt_core) + 39297951040fSNavdeep Parhar sizeof(struct ulptx_sgl) + 8 * ((3 * nsegs) / 2 + (nsegs & 1)); 39307951040fSNavdeep Parhar if (tso) 39317951040fSNavdeep Parhar n += sizeof(struct cpl_tx_pkt_lso_core); 39327951040fSNavdeep Parhar 39337951040fSNavdeep Parhar return (howmany(n, 16)); 39347951040fSNavdeep Parhar } 393554e4ee71SNavdeep Parhar 393654e4ee71SNavdeep Parhar /* 39377951040fSNavdeep Parhar * len16 for a txpkts type 0 WR with a GL. Does not include the firmware work 39387951040fSNavdeep Parhar * request header. 39397951040fSNavdeep Parhar */ 39407951040fSNavdeep Parhar static inline u_int 39417951040fSNavdeep Parhar txpkts0_len16(u_int nsegs) 39427951040fSNavdeep Parhar { 39437951040fSNavdeep Parhar u_int n; 39447951040fSNavdeep Parhar 39457951040fSNavdeep Parhar MPASS(nsegs > 0); 39467951040fSNavdeep Parhar 39477951040fSNavdeep Parhar nsegs--; /* first segment is part of ulptx_sgl */ 39487951040fSNavdeep Parhar n = sizeof(struct ulp_txpkt) + sizeof(struct ulptx_idata) + 39497951040fSNavdeep Parhar sizeof(struct cpl_tx_pkt_core) + sizeof(struct ulptx_sgl) + 39507951040fSNavdeep Parhar 8 * ((3 * nsegs) / 2 + (nsegs & 1)); 39517951040fSNavdeep Parhar 39527951040fSNavdeep Parhar return (howmany(n, 16)); 39537951040fSNavdeep Parhar } 39547951040fSNavdeep Parhar 39557951040fSNavdeep Parhar /* 39567951040fSNavdeep Parhar * len16 for a txpkts type 1 WR with a GL. Does not include the firmware work 39577951040fSNavdeep Parhar * request header. 39587951040fSNavdeep Parhar */ 39597951040fSNavdeep Parhar static inline u_int 39607951040fSNavdeep Parhar txpkts1_len16(void) 39617951040fSNavdeep Parhar { 39627951040fSNavdeep Parhar u_int n; 39637951040fSNavdeep Parhar 39647951040fSNavdeep Parhar n = sizeof(struct cpl_tx_pkt_core) + sizeof(struct ulptx_sgl); 39657951040fSNavdeep Parhar 39667951040fSNavdeep Parhar return (howmany(n, 16)); 39677951040fSNavdeep Parhar } 39687951040fSNavdeep Parhar 39697951040fSNavdeep Parhar static inline u_int 39707951040fSNavdeep Parhar imm_payload(u_int ndesc) 39717951040fSNavdeep Parhar { 39727951040fSNavdeep Parhar u_int n; 39737951040fSNavdeep Parhar 39747951040fSNavdeep Parhar n = ndesc * EQ_ESIZE - sizeof(struct fw_eth_tx_pkt_wr) - 39757951040fSNavdeep Parhar sizeof(struct cpl_tx_pkt_core); 39767951040fSNavdeep Parhar 39777951040fSNavdeep Parhar return (n); 39787951040fSNavdeep Parhar } 39797951040fSNavdeep Parhar 39807951040fSNavdeep Parhar /* 39817951040fSNavdeep Parhar * Write a txpkt WR for this packet to the hardware descriptors, update the 39827951040fSNavdeep Parhar * software descriptor, and advance the pidx. It is guaranteed that enough 39837951040fSNavdeep Parhar * descriptors are available. 398454e4ee71SNavdeep Parhar * 39857951040fSNavdeep Parhar * The return value is the # of hardware descriptors used. 398654e4ee71SNavdeep Parhar */ 39877951040fSNavdeep Parhar static u_int 39887951040fSNavdeep Parhar write_txpkt_wr(struct sge_txq *txq, struct fw_eth_tx_pkt_wr *wr, 39897951040fSNavdeep Parhar struct mbuf *m0, u_int available) 399054e4ee71SNavdeep Parhar { 399154e4ee71SNavdeep Parhar struct sge_eq *eq = &txq->eq; 39927951040fSNavdeep Parhar struct tx_sdesc *txsd; 399354e4ee71SNavdeep Parhar struct cpl_tx_pkt_core *cpl; 399454e4ee71SNavdeep Parhar uint32_t ctrl; /* used in many unrelated places */ 399554e4ee71SNavdeep Parhar uint64_t ctrl1; 39967951040fSNavdeep Parhar int len16, ndesc, pktlen, nsegs; 399754e4ee71SNavdeep Parhar caddr_t dst; 399854e4ee71SNavdeep Parhar 399954e4ee71SNavdeep Parhar TXQ_LOCK_ASSERT_OWNED(txq); 40007951040fSNavdeep Parhar M_ASSERTPKTHDR(m0); 40017951040fSNavdeep Parhar MPASS(available > 0 && available < eq->sidx); 400254e4ee71SNavdeep Parhar 40037951040fSNavdeep Parhar len16 = mbuf_len16(m0); 40047951040fSNavdeep Parhar nsegs = mbuf_nsegs(m0); 40057951040fSNavdeep Parhar pktlen = m0->m_pkthdr.len; 400654e4ee71SNavdeep Parhar ctrl = sizeof(struct cpl_tx_pkt_core); 40077951040fSNavdeep Parhar if (needs_tso(m0)) 40082a5f6b0eSNavdeep Parhar ctrl += sizeof(struct cpl_tx_pkt_lso_core); 40097951040fSNavdeep Parhar else if (pktlen <= imm_payload(2) && available >= 2) { 40107951040fSNavdeep Parhar /* Immediate data. Recalculate len16 and set nsegs to 0. */ 4011ecb79ca4SNavdeep Parhar ctrl += pktlen; 40127951040fSNavdeep Parhar len16 = howmany(sizeof(struct fw_eth_tx_pkt_wr) + 40137951040fSNavdeep Parhar sizeof(struct cpl_tx_pkt_core) + pktlen, 16); 40147951040fSNavdeep Parhar nsegs = 0; 401554e4ee71SNavdeep Parhar } 40167951040fSNavdeep Parhar ndesc = howmany(len16, EQ_ESIZE / 16); 40177951040fSNavdeep Parhar MPASS(ndesc <= available); 401854e4ee71SNavdeep Parhar 401954e4ee71SNavdeep Parhar /* Firmware work request header */ 40207951040fSNavdeep Parhar MPASS(wr == (void *)&eq->desc[eq->pidx]); 402154e4ee71SNavdeep Parhar wr->op_immdlen = htobe32(V_FW_WR_OP(FW_ETH_TX_PKT_WR) | 4022733b9277SNavdeep Parhar V_FW_ETH_TX_PKT_WR_IMMDLEN(ctrl)); 40236b49a4ecSNavdeep Parhar 40247951040fSNavdeep Parhar ctrl = V_FW_WR_LEN16(len16); 402554e4ee71SNavdeep Parhar wr->equiq_to_len16 = htobe32(ctrl); 402654e4ee71SNavdeep Parhar wr->r3 = 0; 402754e4ee71SNavdeep Parhar 40287951040fSNavdeep Parhar if (needs_tso(m0)) { 40292a5f6b0eSNavdeep Parhar struct cpl_tx_pkt_lso_core *lso = (void *)(wr + 1); 40307951040fSNavdeep Parhar 40317951040fSNavdeep Parhar KASSERT(m0->m_pkthdr.l2hlen > 0 && m0->m_pkthdr.l3hlen > 0 && 40327951040fSNavdeep Parhar m0->m_pkthdr.l4hlen > 0, 40337951040fSNavdeep Parhar ("%s: mbuf %p needs TSO but missing header lengths", 40347951040fSNavdeep Parhar __func__, m0)); 403554e4ee71SNavdeep Parhar 403654e4ee71SNavdeep Parhar ctrl = V_LSO_OPCODE(CPL_TX_PKT_LSO) | F_LSO_FIRST_SLICE | 40377951040fSNavdeep Parhar F_LSO_LAST_SLICE | V_LSO_IPHDR_LEN(m0->m_pkthdr.l3hlen >> 2) 40387951040fSNavdeep Parhar | V_LSO_TCPHDR_LEN(m0->m_pkthdr.l4hlen >> 2); 40397951040fSNavdeep Parhar if (m0->m_pkthdr.l2hlen == sizeof(struct ether_vlan_header)) 404054e4ee71SNavdeep Parhar ctrl |= V_LSO_ETHHDR_LEN(1); 40417951040fSNavdeep Parhar if (m0->m_pkthdr.l3hlen == sizeof(struct ip6_hdr)) 4042a1ea9a82SNavdeep Parhar ctrl |= F_LSO_IPV6; 404354e4ee71SNavdeep Parhar 404454e4ee71SNavdeep Parhar lso->lso_ctrl = htobe32(ctrl); 404554e4ee71SNavdeep Parhar lso->ipid_ofst = htobe16(0); 40467951040fSNavdeep Parhar lso->mss = htobe16(m0->m_pkthdr.tso_segsz); 404754e4ee71SNavdeep Parhar lso->seqno_offset = htobe32(0); 4048ecb79ca4SNavdeep Parhar lso->len = htobe32(pktlen); 404954e4ee71SNavdeep Parhar 405054e4ee71SNavdeep Parhar cpl = (void *)(lso + 1); 405154e4ee71SNavdeep Parhar 405254e4ee71SNavdeep Parhar txq->tso_wrs++; 405354e4ee71SNavdeep Parhar } else 405454e4ee71SNavdeep Parhar cpl = (void *)(wr + 1); 405554e4ee71SNavdeep Parhar 405654e4ee71SNavdeep Parhar /* Checksum offload */ 405754e4ee71SNavdeep Parhar ctrl1 = 0; 40587951040fSNavdeep Parhar if (needs_l3_csum(m0) == 0) 405954e4ee71SNavdeep Parhar ctrl1 |= F_TXPKT_IPCSUM_DIS; 40607951040fSNavdeep Parhar if (needs_l4_csum(m0) == 0) 406154e4ee71SNavdeep Parhar ctrl1 |= F_TXPKT_L4CSUM_DIS; 40627951040fSNavdeep Parhar if (m0->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP | 4063b8531380SNavdeep Parhar CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO)) 406454e4ee71SNavdeep Parhar txq->txcsum++; /* some hardware assistance provided */ 406554e4ee71SNavdeep Parhar 406654e4ee71SNavdeep Parhar /* VLAN tag insertion */ 40677951040fSNavdeep Parhar if (needs_vlan_insertion(m0)) { 40687951040fSNavdeep Parhar ctrl1 |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m0->m_pkthdr.ether_vtag); 406954e4ee71SNavdeep Parhar txq->vlan_insertion++; 407054e4ee71SNavdeep Parhar } 407154e4ee71SNavdeep Parhar 407254e4ee71SNavdeep Parhar /* CPL header */ 40737951040fSNavdeep Parhar cpl->ctrl0 = txq->cpl_ctrl0; 407454e4ee71SNavdeep Parhar cpl->pack = 0; 4075ecb79ca4SNavdeep Parhar cpl->len = htobe16(pktlen); 407654e4ee71SNavdeep Parhar cpl->ctrl1 = htobe64(ctrl1); 407754e4ee71SNavdeep Parhar 407854e4ee71SNavdeep Parhar /* SGL */ 407954e4ee71SNavdeep Parhar dst = (void *)(cpl + 1); 40807951040fSNavdeep Parhar if (nsegs > 0) { 40817951040fSNavdeep Parhar 40827951040fSNavdeep Parhar write_gl_to_txd(txq, m0, &dst, eq->sidx - ndesc < eq->pidx); 408354e4ee71SNavdeep Parhar txq->sgl_wrs++; 408454e4ee71SNavdeep Parhar } else { 40857951040fSNavdeep Parhar struct mbuf *m; 40867951040fSNavdeep Parhar 40877951040fSNavdeep Parhar for (m = m0; m != NULL; m = m->m_next) { 408854e4ee71SNavdeep Parhar copy_to_txd(eq, mtod(m, caddr_t), &dst, m->m_len); 4089ecb79ca4SNavdeep Parhar #ifdef INVARIANTS 4090ecb79ca4SNavdeep Parhar pktlen -= m->m_len; 4091ecb79ca4SNavdeep Parhar #endif 409254e4ee71SNavdeep Parhar } 4093ecb79ca4SNavdeep Parhar #ifdef INVARIANTS 4094ecb79ca4SNavdeep Parhar KASSERT(pktlen == 0, ("%s: %d bytes left.", __func__, pktlen)); 4095ecb79ca4SNavdeep Parhar #endif 40967951040fSNavdeep Parhar txq->imm_wrs++; 409754e4ee71SNavdeep Parhar } 409854e4ee71SNavdeep Parhar 409954e4ee71SNavdeep Parhar txq->txpkt_wrs++; 410054e4ee71SNavdeep Parhar 4101f7dfe243SNavdeep Parhar txsd = &txq->sdesc[eq->pidx]; 41027951040fSNavdeep Parhar txsd->m = m0; 410354e4ee71SNavdeep Parhar txsd->desc_used = ndesc; 410454e4ee71SNavdeep Parhar 41057951040fSNavdeep Parhar return (ndesc); 410654e4ee71SNavdeep Parhar } 410754e4ee71SNavdeep Parhar 41087951040fSNavdeep Parhar static int 41097951040fSNavdeep Parhar try_txpkts(struct mbuf *m, struct mbuf *n, struct txpkts *txp, u_int available) 411054e4ee71SNavdeep Parhar { 41117951040fSNavdeep Parhar u_int needed, nsegs1, nsegs2, l1, l2; 41127951040fSNavdeep Parhar 41137951040fSNavdeep Parhar if (cannot_use_txpkts(m) || cannot_use_txpkts(n)) 41147951040fSNavdeep Parhar return (1); 41157951040fSNavdeep Parhar 41167951040fSNavdeep Parhar nsegs1 = mbuf_nsegs(m); 41177951040fSNavdeep Parhar nsegs2 = mbuf_nsegs(n); 41187951040fSNavdeep Parhar if (nsegs1 + nsegs2 == 2) { 41197951040fSNavdeep Parhar txp->wr_type = 1; 41207951040fSNavdeep Parhar l1 = l2 = txpkts1_len16(); 41217951040fSNavdeep Parhar } else { 41227951040fSNavdeep Parhar txp->wr_type = 0; 41237951040fSNavdeep Parhar l1 = txpkts0_len16(nsegs1); 41247951040fSNavdeep Parhar l2 = txpkts0_len16(nsegs2); 41257951040fSNavdeep Parhar } 41267951040fSNavdeep Parhar txp->len16 = howmany(sizeof(struct fw_eth_tx_pkts_wr), 16) + l1 + l2; 41277951040fSNavdeep Parhar needed = howmany(txp->len16, EQ_ESIZE / 16); 41287951040fSNavdeep Parhar if (needed > SGE_MAX_WR_NDESC || needed > available) 41297951040fSNavdeep Parhar return (1); 41307951040fSNavdeep Parhar 41317951040fSNavdeep Parhar txp->plen = m->m_pkthdr.len + n->m_pkthdr.len; 41327951040fSNavdeep Parhar if (txp->plen > 65535) 41337951040fSNavdeep Parhar return (1); 41347951040fSNavdeep Parhar 41357951040fSNavdeep Parhar txp->npkt = 2; 41367951040fSNavdeep Parhar set_mbuf_len16(m, l1); 41377951040fSNavdeep Parhar set_mbuf_len16(n, l2); 41387951040fSNavdeep Parhar 41397951040fSNavdeep Parhar return (0); 41407951040fSNavdeep Parhar } 41417951040fSNavdeep Parhar 41427951040fSNavdeep Parhar static int 41437951040fSNavdeep Parhar add_to_txpkts(struct mbuf *m, struct txpkts *txp, u_int available) 41447951040fSNavdeep Parhar { 41457951040fSNavdeep Parhar u_int plen, len16, needed, nsegs; 41467951040fSNavdeep Parhar 41477951040fSNavdeep Parhar MPASS(txp->wr_type == 0 || txp->wr_type == 1); 41487951040fSNavdeep Parhar 41497951040fSNavdeep Parhar nsegs = mbuf_nsegs(m); 41507951040fSNavdeep Parhar if (needs_tso(m) || (txp->wr_type == 1 && nsegs != 1)) 41517951040fSNavdeep Parhar return (1); 41527951040fSNavdeep Parhar 41537951040fSNavdeep Parhar plen = txp->plen + m->m_pkthdr.len; 41547951040fSNavdeep Parhar if (plen > 65535) 41557951040fSNavdeep Parhar return (1); 41567951040fSNavdeep Parhar 41577951040fSNavdeep Parhar if (txp->wr_type == 0) 41587951040fSNavdeep Parhar len16 = txpkts0_len16(nsegs); 41597951040fSNavdeep Parhar else 41607951040fSNavdeep Parhar len16 = txpkts1_len16(); 41617951040fSNavdeep Parhar needed = howmany(txp->len16 + len16, EQ_ESIZE / 16); 41627951040fSNavdeep Parhar if (needed > SGE_MAX_WR_NDESC || needed > available) 41637951040fSNavdeep Parhar return (1); 41647951040fSNavdeep Parhar 41657951040fSNavdeep Parhar txp->npkt++; 41667951040fSNavdeep Parhar txp->plen = plen; 41677951040fSNavdeep Parhar txp->len16 += len16; 41687951040fSNavdeep Parhar set_mbuf_len16(m, len16); 41697951040fSNavdeep Parhar 41707951040fSNavdeep Parhar return (0); 41717951040fSNavdeep Parhar } 41727951040fSNavdeep Parhar 41737951040fSNavdeep Parhar /* 41747951040fSNavdeep Parhar * Write a txpkts WR for the packets in txp to the hardware descriptors, update 41757951040fSNavdeep Parhar * the software descriptor, and advance the pidx. It is guaranteed that enough 41767951040fSNavdeep Parhar * descriptors are available. 41777951040fSNavdeep Parhar * 41787951040fSNavdeep Parhar * The return value is the # of hardware descriptors used. 41797951040fSNavdeep Parhar */ 41807951040fSNavdeep Parhar static u_int 41817951040fSNavdeep Parhar write_txpkts_wr(struct sge_txq *txq, struct fw_eth_tx_pkts_wr *wr, 41827951040fSNavdeep Parhar struct mbuf *m0, const struct txpkts *txp, u_int available) 41837951040fSNavdeep Parhar { 41847951040fSNavdeep Parhar struct sge_eq *eq = &txq->eq; 41857951040fSNavdeep Parhar struct tx_sdesc *txsd; 41867951040fSNavdeep Parhar struct cpl_tx_pkt_core *cpl; 41877951040fSNavdeep Parhar uint32_t ctrl; 41887951040fSNavdeep Parhar uint64_t ctrl1; 41897951040fSNavdeep Parhar int ndesc, checkwrap; 41907951040fSNavdeep Parhar struct mbuf *m; 41917951040fSNavdeep Parhar void *flitp; 41927951040fSNavdeep Parhar 41937951040fSNavdeep Parhar TXQ_LOCK_ASSERT_OWNED(txq); 41947951040fSNavdeep Parhar MPASS(txp->npkt > 0); 41957951040fSNavdeep Parhar MPASS(txp->plen < 65536); 41967951040fSNavdeep Parhar MPASS(m0 != NULL); 41977951040fSNavdeep Parhar MPASS(m0->m_nextpkt != NULL); 41987951040fSNavdeep Parhar MPASS(txp->len16 <= howmany(SGE_MAX_WR_LEN, 16)); 41997951040fSNavdeep Parhar MPASS(available > 0 && available < eq->sidx); 42007951040fSNavdeep Parhar 42017951040fSNavdeep Parhar ndesc = howmany(txp->len16, EQ_ESIZE / 16); 42027951040fSNavdeep Parhar MPASS(ndesc <= available); 42037951040fSNavdeep Parhar 42047951040fSNavdeep Parhar MPASS(wr == (void *)&eq->desc[eq->pidx]); 42057951040fSNavdeep Parhar wr->op_pkd = htobe32(V_FW_WR_OP(FW_ETH_TX_PKTS_WR)); 42067951040fSNavdeep Parhar ctrl = V_FW_WR_LEN16(txp->len16); 42077951040fSNavdeep Parhar wr->equiq_to_len16 = htobe32(ctrl); 42087951040fSNavdeep Parhar wr->plen = htobe16(txp->plen); 42097951040fSNavdeep Parhar wr->npkt = txp->npkt; 42107951040fSNavdeep Parhar wr->r3 = 0; 42117951040fSNavdeep Parhar wr->type = txp->wr_type; 42127951040fSNavdeep Parhar flitp = wr + 1; 42137951040fSNavdeep Parhar 42147951040fSNavdeep Parhar /* 42157951040fSNavdeep Parhar * At this point we are 16B into a hardware descriptor. If checkwrap is 42167951040fSNavdeep Parhar * set then we know the WR is going to wrap around somewhere. We'll 42177951040fSNavdeep Parhar * check for that at appropriate points. 42187951040fSNavdeep Parhar */ 42197951040fSNavdeep Parhar checkwrap = eq->sidx - ndesc < eq->pidx; 42207951040fSNavdeep Parhar for (m = m0; m != NULL; m = m->m_nextpkt) { 42217951040fSNavdeep Parhar if (txp->wr_type == 0) { 422254e4ee71SNavdeep Parhar struct ulp_txpkt *ulpmc; 422354e4ee71SNavdeep Parhar struct ulptx_idata *ulpsc; 422454e4ee71SNavdeep Parhar 42257951040fSNavdeep Parhar /* ULP master command */ 42267951040fSNavdeep Parhar ulpmc = flitp; 42277951040fSNavdeep Parhar ulpmc->cmd_dest = htobe32(V_ULPTX_CMD(ULP_TX_PKT) | 42287951040fSNavdeep Parhar V_ULP_TXPKT_DEST(0) | V_ULP_TXPKT_FID(eq->iqid)); 42297951040fSNavdeep Parhar ulpmc->len = htobe32(mbuf_len16(m)); 423054e4ee71SNavdeep Parhar 42317951040fSNavdeep Parhar /* ULP subcommand */ 42327951040fSNavdeep Parhar ulpsc = (void *)(ulpmc + 1); 42337951040fSNavdeep Parhar ulpsc->cmd_more = htobe32(V_ULPTX_CMD(ULP_TX_SC_IMM) | 42347951040fSNavdeep Parhar F_ULP_TX_SC_MORE); 42357951040fSNavdeep Parhar ulpsc->len = htobe32(sizeof(struct cpl_tx_pkt_core)); 42367951040fSNavdeep Parhar 42377951040fSNavdeep Parhar cpl = (void *)(ulpsc + 1); 42387951040fSNavdeep Parhar if (checkwrap && 42397951040fSNavdeep Parhar (uintptr_t)cpl == (uintptr_t)&eq->desc[eq->sidx]) 42407951040fSNavdeep Parhar cpl = (void *)&eq->desc[0]; 42417951040fSNavdeep Parhar txq->txpkts0_pkts += txp->npkt; 42427951040fSNavdeep Parhar txq->txpkts0_wrs++; 42437951040fSNavdeep Parhar } else { 42447951040fSNavdeep Parhar cpl = flitp; 42457951040fSNavdeep Parhar txq->txpkts1_pkts += txp->npkt; 42467951040fSNavdeep Parhar txq->txpkts1_wrs++; 42477951040fSNavdeep Parhar } 424854e4ee71SNavdeep Parhar 424954e4ee71SNavdeep Parhar /* Checksum offload */ 42507951040fSNavdeep Parhar ctrl1 = 0; 42517951040fSNavdeep Parhar if (needs_l3_csum(m) == 0) 42527951040fSNavdeep Parhar ctrl1 |= F_TXPKT_IPCSUM_DIS; 42537951040fSNavdeep Parhar if (needs_l4_csum(m) == 0) 42547951040fSNavdeep Parhar ctrl1 |= F_TXPKT_L4CSUM_DIS; 4255b8531380SNavdeep Parhar if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP | 4256b8531380SNavdeep Parhar CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO)) 425754e4ee71SNavdeep Parhar txq->txcsum++; /* some hardware assistance provided */ 425854e4ee71SNavdeep Parhar 425954e4ee71SNavdeep Parhar /* VLAN tag insertion */ 42607951040fSNavdeep Parhar if (needs_vlan_insertion(m)) { 42617951040fSNavdeep Parhar ctrl1 |= F_TXPKT_VLAN_VLD | 42627951040fSNavdeep Parhar V_TXPKT_VLAN(m->m_pkthdr.ether_vtag); 426354e4ee71SNavdeep Parhar txq->vlan_insertion++; 426454e4ee71SNavdeep Parhar } 426554e4ee71SNavdeep Parhar 42667951040fSNavdeep Parhar /* CPL header */ 42677951040fSNavdeep Parhar cpl->ctrl0 = txq->cpl_ctrl0; 426854e4ee71SNavdeep Parhar cpl->pack = 0; 426954e4ee71SNavdeep Parhar cpl->len = htobe16(m->m_pkthdr.len); 42707951040fSNavdeep Parhar cpl->ctrl1 = htobe64(ctrl1); 427154e4ee71SNavdeep Parhar 42727951040fSNavdeep Parhar flitp = cpl + 1; 42737951040fSNavdeep Parhar if (checkwrap && 42747951040fSNavdeep Parhar (uintptr_t)flitp == (uintptr_t)&eq->desc[eq->sidx]) 42757951040fSNavdeep Parhar flitp = (void *)&eq->desc[0]; 427654e4ee71SNavdeep Parhar 42777951040fSNavdeep Parhar write_gl_to_txd(txq, m, (caddr_t *)(&flitp), checkwrap); 427854e4ee71SNavdeep Parhar 42797951040fSNavdeep Parhar } 42807951040fSNavdeep Parhar 42817951040fSNavdeep Parhar txsd = &txq->sdesc[eq->pidx]; 42827951040fSNavdeep Parhar txsd->m = m0; 42837951040fSNavdeep Parhar txsd->desc_used = ndesc; 42847951040fSNavdeep Parhar 42857951040fSNavdeep Parhar return (ndesc); 428654e4ee71SNavdeep Parhar } 428754e4ee71SNavdeep Parhar 428854e4ee71SNavdeep Parhar /* 428954e4ee71SNavdeep Parhar * If the SGL ends on an address that is not 16 byte aligned, this function will 42907951040fSNavdeep Parhar * add a 0 filled flit at the end. 429154e4ee71SNavdeep Parhar */ 42927951040fSNavdeep Parhar static void 42937951040fSNavdeep Parhar write_gl_to_txd(struct sge_txq *txq, struct mbuf *m, caddr_t *to, int checkwrap) 429454e4ee71SNavdeep Parhar { 42957951040fSNavdeep Parhar struct sge_eq *eq = &txq->eq; 42967951040fSNavdeep Parhar struct sglist *gl = txq->gl; 42977951040fSNavdeep Parhar struct sglist_seg *seg; 42987951040fSNavdeep Parhar __be64 *flitp, *wrap; 429954e4ee71SNavdeep Parhar struct ulptx_sgl *usgl; 43007951040fSNavdeep Parhar int i, nflits, nsegs; 430154e4ee71SNavdeep Parhar 430254e4ee71SNavdeep Parhar KASSERT(((uintptr_t)(*to) & 0xf) == 0, 430354e4ee71SNavdeep Parhar ("%s: SGL must start at a 16 byte boundary: %p", __func__, *to)); 43047951040fSNavdeep Parhar MPASS((uintptr_t)(*to) >= (uintptr_t)&eq->desc[0]); 43057951040fSNavdeep Parhar MPASS((uintptr_t)(*to) < (uintptr_t)&eq->desc[eq->sidx]); 430654e4ee71SNavdeep Parhar 43077951040fSNavdeep Parhar get_pkt_gl(m, gl); 43087951040fSNavdeep Parhar nsegs = gl->sg_nseg; 43097951040fSNavdeep Parhar MPASS(nsegs > 0); 43107951040fSNavdeep Parhar 43117951040fSNavdeep Parhar nflits = (3 * (nsegs - 1)) / 2 + ((nsegs - 1) & 1) + 2; 431254e4ee71SNavdeep Parhar flitp = (__be64 *)(*to); 43137951040fSNavdeep Parhar wrap = (__be64 *)(&eq->desc[eq->sidx]); 43147951040fSNavdeep Parhar seg = &gl->sg_segs[0]; 431554e4ee71SNavdeep Parhar usgl = (void *)flitp; 431654e4ee71SNavdeep Parhar 431754e4ee71SNavdeep Parhar /* 431854e4ee71SNavdeep Parhar * We start at a 16 byte boundary somewhere inside the tx descriptor 431954e4ee71SNavdeep Parhar * ring, so we're at least 16 bytes away from the status page. There is 432054e4ee71SNavdeep Parhar * no chance of a wrap around in the middle of usgl (which is 16 bytes). 432154e4ee71SNavdeep Parhar */ 432254e4ee71SNavdeep Parhar 432354e4ee71SNavdeep Parhar usgl->cmd_nsge = htobe32(V_ULPTX_CMD(ULP_TX_SC_DSGL) | 43247951040fSNavdeep Parhar V_ULPTX_NSGE(nsegs)); 43257951040fSNavdeep Parhar usgl->len0 = htobe32(seg->ss_len); 43267951040fSNavdeep Parhar usgl->addr0 = htobe64(seg->ss_paddr); 432754e4ee71SNavdeep Parhar seg++; 432854e4ee71SNavdeep Parhar 43297951040fSNavdeep Parhar if (checkwrap == 0 || (uintptr_t)(flitp + nflits) <= (uintptr_t)wrap) { 433054e4ee71SNavdeep Parhar 433154e4ee71SNavdeep Parhar /* Won't wrap around at all */ 433254e4ee71SNavdeep Parhar 43337951040fSNavdeep Parhar for (i = 0; i < nsegs - 1; i++, seg++) { 43347951040fSNavdeep Parhar usgl->sge[i / 2].len[i & 1] = htobe32(seg->ss_len); 43357951040fSNavdeep Parhar usgl->sge[i / 2].addr[i & 1] = htobe64(seg->ss_paddr); 433654e4ee71SNavdeep Parhar } 433754e4ee71SNavdeep Parhar if (i & 1) 433854e4ee71SNavdeep Parhar usgl->sge[i / 2].len[1] = htobe32(0); 43397951040fSNavdeep Parhar flitp += nflits; 434054e4ee71SNavdeep Parhar } else { 434154e4ee71SNavdeep Parhar 434254e4ee71SNavdeep Parhar /* Will wrap somewhere in the rest of the SGL */ 434354e4ee71SNavdeep Parhar 434454e4ee71SNavdeep Parhar /* 2 flits already written, write the rest flit by flit */ 434554e4ee71SNavdeep Parhar flitp = (void *)(usgl + 1); 43467951040fSNavdeep Parhar for (i = 0; i < nflits - 2; i++) { 43477951040fSNavdeep Parhar if (flitp == wrap) 434854e4ee71SNavdeep Parhar flitp = (void *)eq->desc; 43497951040fSNavdeep Parhar *flitp++ = get_flit(seg, nsegs - 1, i); 435054e4ee71SNavdeep Parhar } 435154e4ee71SNavdeep Parhar } 435254e4ee71SNavdeep Parhar 43537951040fSNavdeep Parhar if (nflits & 1) { 43547951040fSNavdeep Parhar MPASS(((uintptr_t)flitp) & 0xf); 43557951040fSNavdeep Parhar *flitp++ = 0; 43567951040fSNavdeep Parhar } 435754e4ee71SNavdeep Parhar 43587951040fSNavdeep Parhar MPASS((((uintptr_t)flitp) & 0xf) == 0); 43597951040fSNavdeep Parhar if (__predict_false(flitp == wrap)) 436054e4ee71SNavdeep Parhar *to = (void *)eq->desc; 436154e4ee71SNavdeep Parhar else 43627951040fSNavdeep Parhar *to = (void *)flitp; 436354e4ee71SNavdeep Parhar } 436454e4ee71SNavdeep Parhar 436554e4ee71SNavdeep Parhar static inline void 436654e4ee71SNavdeep Parhar copy_to_txd(struct sge_eq *eq, caddr_t from, caddr_t *to, int len) 436754e4ee71SNavdeep Parhar { 43687951040fSNavdeep Parhar 43697951040fSNavdeep Parhar MPASS((uintptr_t)(*to) >= (uintptr_t)&eq->desc[0]); 43707951040fSNavdeep Parhar MPASS((uintptr_t)(*to) < (uintptr_t)&eq->desc[eq->sidx]); 43717951040fSNavdeep Parhar 43727951040fSNavdeep Parhar if (__predict_true((uintptr_t)(*to) + len <= 43737951040fSNavdeep Parhar (uintptr_t)&eq->desc[eq->sidx])) { 437454e4ee71SNavdeep Parhar bcopy(from, *to, len); 437554e4ee71SNavdeep Parhar (*to) += len; 437654e4ee71SNavdeep Parhar } else { 43777951040fSNavdeep Parhar int portion = (uintptr_t)&eq->desc[eq->sidx] - (uintptr_t)(*to); 437854e4ee71SNavdeep Parhar 437954e4ee71SNavdeep Parhar bcopy(from, *to, portion); 438054e4ee71SNavdeep Parhar from += portion; 438154e4ee71SNavdeep Parhar portion = len - portion; /* remaining */ 438254e4ee71SNavdeep Parhar bcopy(from, (void *)eq->desc, portion); 438354e4ee71SNavdeep Parhar (*to) = (caddr_t)eq->desc + portion; 438454e4ee71SNavdeep Parhar } 438554e4ee71SNavdeep Parhar } 438654e4ee71SNavdeep Parhar 438754e4ee71SNavdeep Parhar static inline void 43887951040fSNavdeep Parhar ring_eq_db(struct adapter *sc, struct sge_eq *eq, u_int n) 438954e4ee71SNavdeep Parhar { 43907951040fSNavdeep Parhar u_int db; 43917951040fSNavdeep Parhar 43927951040fSNavdeep Parhar MPASS(n > 0); 4393d14b0ac1SNavdeep Parhar 4394d14b0ac1SNavdeep Parhar db = eq->doorbells; 43957951040fSNavdeep Parhar if (n > 1) 439677ad3c41SNavdeep Parhar clrbit(&db, DOORBELL_WCWR); 4397d14b0ac1SNavdeep Parhar wmb(); 4398d14b0ac1SNavdeep Parhar 4399d14b0ac1SNavdeep Parhar switch (ffs(db) - 1) { 4400d14b0ac1SNavdeep Parhar case DOORBELL_UDB: 44017951040fSNavdeep Parhar *eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(n)); 44027951040fSNavdeep Parhar break; 4403d14b0ac1SNavdeep Parhar 440477ad3c41SNavdeep Parhar case DOORBELL_WCWR: { 4405d14b0ac1SNavdeep Parhar volatile uint64_t *dst, *src; 4406d14b0ac1SNavdeep Parhar int i; 4407d14b0ac1SNavdeep Parhar 4408d14b0ac1SNavdeep Parhar /* 4409d14b0ac1SNavdeep Parhar * Queues whose 128B doorbell segment fits in the page do not 4410d14b0ac1SNavdeep Parhar * use relative qid (udb_qid is always 0). Only queues with 441177ad3c41SNavdeep Parhar * doorbell segments can do WCWR. 4412d14b0ac1SNavdeep Parhar */ 44137951040fSNavdeep Parhar KASSERT(eq->udb_qid == 0 && n == 1, 4414d14b0ac1SNavdeep Parhar ("%s: inappropriate doorbell (0x%x, %d, %d) for eq %p", 44157951040fSNavdeep Parhar __func__, eq->doorbells, n, eq->dbidx, eq)); 4416d14b0ac1SNavdeep Parhar 4417d14b0ac1SNavdeep Parhar dst = (volatile void *)((uintptr_t)eq->udb + UDBS_WR_OFFSET - 4418d14b0ac1SNavdeep Parhar UDBS_DB_OFFSET); 44197951040fSNavdeep Parhar i = eq->dbidx; 4420d14b0ac1SNavdeep Parhar src = (void *)&eq->desc[i]; 4421d14b0ac1SNavdeep Parhar while (src != (void *)&eq->desc[i + 1]) 4422d14b0ac1SNavdeep Parhar *dst++ = *src++; 4423d14b0ac1SNavdeep Parhar wmb(); 44247951040fSNavdeep Parhar break; 4425d14b0ac1SNavdeep Parhar } 4426d14b0ac1SNavdeep Parhar 4427d14b0ac1SNavdeep Parhar case DOORBELL_UDBWC: 44287951040fSNavdeep Parhar *eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(n)); 4429d14b0ac1SNavdeep Parhar wmb(); 44307951040fSNavdeep Parhar break; 4431d14b0ac1SNavdeep Parhar 4432d14b0ac1SNavdeep Parhar case DOORBELL_KDB: 4433315048f2SJohn Baldwin t4_write_reg(sc, sc->sge_kdoorbell_reg, 44347951040fSNavdeep Parhar V_QID(eq->cntxt_id) | V_PIDX(n)); 44357951040fSNavdeep Parhar break; 443654e4ee71SNavdeep Parhar } 443754e4ee71SNavdeep Parhar 44387951040fSNavdeep Parhar IDXINCR(eq->dbidx, n, eq->sidx); 44397951040fSNavdeep Parhar } 44407951040fSNavdeep Parhar 44417951040fSNavdeep Parhar static inline u_int 44427951040fSNavdeep Parhar reclaimable_tx_desc(struct sge_eq *eq) 444354e4ee71SNavdeep Parhar { 44447951040fSNavdeep Parhar uint16_t hw_cidx; 444554e4ee71SNavdeep Parhar 44467951040fSNavdeep Parhar hw_cidx = read_hw_cidx(eq); 44477951040fSNavdeep Parhar return (IDXDIFF(hw_cidx, eq->cidx, eq->sidx)); 44487951040fSNavdeep Parhar } 444954e4ee71SNavdeep Parhar 44507951040fSNavdeep Parhar static inline u_int 44517951040fSNavdeep Parhar total_available_tx_desc(struct sge_eq *eq) 44527951040fSNavdeep Parhar { 44537951040fSNavdeep Parhar uint16_t hw_cidx, pidx; 44547951040fSNavdeep Parhar 44557951040fSNavdeep Parhar hw_cidx = read_hw_cidx(eq); 44567951040fSNavdeep Parhar pidx = eq->pidx; 44577951040fSNavdeep Parhar 44587951040fSNavdeep Parhar if (pidx == hw_cidx) 44597951040fSNavdeep Parhar return (eq->sidx - 1); 446054e4ee71SNavdeep Parhar else 44617951040fSNavdeep Parhar return (IDXDIFF(hw_cidx, pidx, eq->sidx) - 1); 44627951040fSNavdeep Parhar } 44637951040fSNavdeep Parhar 44647951040fSNavdeep Parhar static inline uint16_t 44657951040fSNavdeep Parhar read_hw_cidx(struct sge_eq *eq) 44667951040fSNavdeep Parhar { 44677951040fSNavdeep Parhar struct sge_qstat *spg = (void *)&eq->desc[eq->sidx]; 44687951040fSNavdeep Parhar uint16_t cidx = spg->cidx; /* stable snapshot */ 44697951040fSNavdeep Parhar 44707951040fSNavdeep Parhar return (be16toh(cidx)); 4471e874ff7aSNavdeep Parhar } 447254e4ee71SNavdeep Parhar 4473e874ff7aSNavdeep Parhar /* 44747951040fSNavdeep Parhar * Reclaim 'n' descriptors approximately. 4475e874ff7aSNavdeep Parhar */ 44767951040fSNavdeep Parhar static u_int 44777951040fSNavdeep Parhar reclaim_tx_descs(struct sge_txq *txq, u_int n) 4478e874ff7aSNavdeep Parhar { 4479e874ff7aSNavdeep Parhar struct tx_sdesc *txsd; 4480f7dfe243SNavdeep Parhar struct sge_eq *eq = &txq->eq; 44817951040fSNavdeep Parhar u_int can_reclaim, reclaimed; 448254e4ee71SNavdeep Parhar 4483733b9277SNavdeep Parhar TXQ_LOCK_ASSERT_OWNED(txq); 44847951040fSNavdeep Parhar MPASS(n > 0); 4485e874ff7aSNavdeep Parhar 44867951040fSNavdeep Parhar reclaimed = 0; 44877951040fSNavdeep Parhar can_reclaim = reclaimable_tx_desc(eq); 44887951040fSNavdeep Parhar while (can_reclaim && reclaimed < n) { 448954e4ee71SNavdeep Parhar int ndesc; 44907951040fSNavdeep Parhar struct mbuf *m, *nextpkt; 449154e4ee71SNavdeep Parhar 4492f7dfe243SNavdeep Parhar txsd = &txq->sdesc[eq->cidx]; 449354e4ee71SNavdeep Parhar ndesc = txsd->desc_used; 449454e4ee71SNavdeep Parhar 449554e4ee71SNavdeep Parhar /* Firmware doesn't return "partial" credits. */ 449654e4ee71SNavdeep Parhar KASSERT(can_reclaim >= ndesc, 449754e4ee71SNavdeep Parhar ("%s: unexpected number of credits: %d, %d", 449854e4ee71SNavdeep Parhar __func__, can_reclaim, ndesc)); 449954e4ee71SNavdeep Parhar 45007951040fSNavdeep Parhar for (m = txsd->m; m != NULL; m = nextpkt) { 45017951040fSNavdeep Parhar nextpkt = m->m_nextpkt; 45027951040fSNavdeep Parhar m->m_nextpkt = NULL; 45037951040fSNavdeep Parhar m_freem(m); 45047951040fSNavdeep Parhar } 450554e4ee71SNavdeep Parhar reclaimed += ndesc; 450654e4ee71SNavdeep Parhar can_reclaim -= ndesc; 45077951040fSNavdeep Parhar IDXINCR(eq->cidx, ndesc, eq->sidx); 450854e4ee71SNavdeep Parhar } 450954e4ee71SNavdeep Parhar 451054e4ee71SNavdeep Parhar return (reclaimed); 451154e4ee71SNavdeep Parhar } 451254e4ee71SNavdeep Parhar 451354e4ee71SNavdeep Parhar static void 45147951040fSNavdeep Parhar tx_reclaim(void *arg, int n) 451554e4ee71SNavdeep Parhar { 45167951040fSNavdeep Parhar struct sge_txq *txq = arg; 45177951040fSNavdeep Parhar struct sge_eq *eq = &txq->eq; 451854e4ee71SNavdeep Parhar 45197951040fSNavdeep Parhar do { 45207951040fSNavdeep Parhar if (TXQ_TRYLOCK(txq) == 0) 45217951040fSNavdeep Parhar break; 45227951040fSNavdeep Parhar n = reclaim_tx_descs(txq, 32); 45237951040fSNavdeep Parhar if (eq->cidx == eq->pidx) 45247951040fSNavdeep Parhar eq->equeqidx = eq->pidx; 45257951040fSNavdeep Parhar TXQ_UNLOCK(txq); 45267951040fSNavdeep Parhar } while (n > 0); 452754e4ee71SNavdeep Parhar } 452854e4ee71SNavdeep Parhar 452954e4ee71SNavdeep Parhar static __be64 45307951040fSNavdeep Parhar get_flit(struct sglist_seg *segs, int nsegs, int idx) 453154e4ee71SNavdeep Parhar { 453254e4ee71SNavdeep Parhar int i = (idx / 3) * 2; 453354e4ee71SNavdeep Parhar 453454e4ee71SNavdeep Parhar switch (idx % 3) { 453554e4ee71SNavdeep Parhar case 0: { 453654e4ee71SNavdeep Parhar __be64 rc; 453754e4ee71SNavdeep Parhar 45387951040fSNavdeep Parhar rc = htobe32(segs[i].ss_len); 453954e4ee71SNavdeep Parhar if (i + 1 < nsegs) 45407951040fSNavdeep Parhar rc |= (uint64_t)htobe32(segs[i + 1].ss_len) << 32; 454154e4ee71SNavdeep Parhar 454254e4ee71SNavdeep Parhar return (rc); 454354e4ee71SNavdeep Parhar } 454454e4ee71SNavdeep Parhar case 1: 45457951040fSNavdeep Parhar return (htobe64(segs[i].ss_paddr)); 454654e4ee71SNavdeep Parhar case 2: 45477951040fSNavdeep Parhar return (htobe64(segs[i + 1].ss_paddr)); 454854e4ee71SNavdeep Parhar } 454954e4ee71SNavdeep Parhar 455054e4ee71SNavdeep Parhar return (0); 455154e4ee71SNavdeep Parhar } 455254e4ee71SNavdeep Parhar 455354e4ee71SNavdeep Parhar static void 455438035ed6SNavdeep Parhar find_best_refill_source(struct adapter *sc, struct sge_fl *fl, int maxp) 455554e4ee71SNavdeep Parhar { 455638035ed6SNavdeep Parhar int8_t zidx, hwidx, idx; 455738035ed6SNavdeep Parhar uint16_t region1, region3; 455838035ed6SNavdeep Parhar int spare, spare_needed, n; 455938035ed6SNavdeep Parhar struct sw_zone_info *swz; 456038035ed6SNavdeep Parhar struct hw_buf_info *hwb, *hwb_list = &sc->sge.hw_buf_info[0]; 456154e4ee71SNavdeep Parhar 456238035ed6SNavdeep Parhar /* 456338035ed6SNavdeep Parhar * Buffer Packing: Look for PAGE_SIZE or larger zone which has a bufsize 456438035ed6SNavdeep Parhar * large enough for the max payload and cluster metadata. Otherwise 456538035ed6SNavdeep Parhar * settle for the largest bufsize that leaves enough room in the cluster 456638035ed6SNavdeep Parhar * for metadata. 456738035ed6SNavdeep Parhar * 456838035ed6SNavdeep Parhar * Without buffer packing: Look for the smallest zone which has a 456938035ed6SNavdeep Parhar * bufsize large enough for the max payload. Settle for the largest 457038035ed6SNavdeep Parhar * bufsize available if there's nothing big enough for max payload. 457138035ed6SNavdeep Parhar */ 457238035ed6SNavdeep Parhar spare_needed = fl->flags & FL_BUF_PACKING ? CL_METADATA_SIZE : 0; 457338035ed6SNavdeep Parhar swz = &sc->sge.sw_zone_info[0]; 457438035ed6SNavdeep Parhar hwidx = -1; 457538035ed6SNavdeep Parhar for (zidx = 0; zidx < SW_ZONE_SIZES; zidx++, swz++) { 457638035ed6SNavdeep Parhar if (swz->size > largest_rx_cluster) { 457738035ed6SNavdeep Parhar if (__predict_true(hwidx != -1)) 457838035ed6SNavdeep Parhar break; 457938035ed6SNavdeep Parhar 458038035ed6SNavdeep Parhar /* 458138035ed6SNavdeep Parhar * This is a misconfiguration. largest_rx_cluster is 458238035ed6SNavdeep Parhar * preventing us from finding a refill source. See 458338035ed6SNavdeep Parhar * dev.t5nex.<n>.buffer_sizes to figure out why. 458438035ed6SNavdeep Parhar */ 458538035ed6SNavdeep Parhar device_printf(sc->dev, "largest_rx_cluster=%u leaves no" 458638035ed6SNavdeep Parhar " refill source for fl %p (dma %u). Ignored.\n", 458738035ed6SNavdeep Parhar largest_rx_cluster, fl, maxp); 458838035ed6SNavdeep Parhar } 458938035ed6SNavdeep Parhar for (idx = swz->head_hwidx; idx != -1; idx = hwb->next) { 459038035ed6SNavdeep Parhar hwb = &hwb_list[idx]; 459138035ed6SNavdeep Parhar spare = swz->size - hwb->size; 459238035ed6SNavdeep Parhar if (spare < spare_needed) 459338035ed6SNavdeep Parhar continue; 459438035ed6SNavdeep Parhar 459538035ed6SNavdeep Parhar hwidx = idx; /* best option so far */ 459638035ed6SNavdeep Parhar if (hwb->size >= maxp) { 459738035ed6SNavdeep Parhar 459838035ed6SNavdeep Parhar if ((fl->flags & FL_BUF_PACKING) == 0) 459938035ed6SNavdeep Parhar goto done; /* stop looking (not packing) */ 460038035ed6SNavdeep Parhar 460138035ed6SNavdeep Parhar if (swz->size >= safest_rx_cluster) 460238035ed6SNavdeep Parhar goto done; /* stop looking (packing) */ 460338035ed6SNavdeep Parhar } 460438035ed6SNavdeep Parhar break; /* keep looking, next zone */ 460538035ed6SNavdeep Parhar } 460638035ed6SNavdeep Parhar } 460738035ed6SNavdeep Parhar done: 460838035ed6SNavdeep Parhar /* A usable hwidx has been located. */ 460938035ed6SNavdeep Parhar MPASS(hwidx != -1); 461038035ed6SNavdeep Parhar hwb = &hwb_list[hwidx]; 461138035ed6SNavdeep Parhar zidx = hwb->zidx; 461238035ed6SNavdeep Parhar swz = &sc->sge.sw_zone_info[zidx]; 461338035ed6SNavdeep Parhar region1 = 0; 461438035ed6SNavdeep Parhar region3 = swz->size - hwb->size; 461538035ed6SNavdeep Parhar 461638035ed6SNavdeep Parhar /* 461738035ed6SNavdeep Parhar * Stay within this zone and see if there is a better match when mbuf 461838035ed6SNavdeep Parhar * inlining is allowed. Remember that the hwidx's are sorted in 461938035ed6SNavdeep Parhar * decreasing order of size (so in increasing order of spare area). 462038035ed6SNavdeep Parhar */ 462138035ed6SNavdeep Parhar for (idx = hwidx; idx != -1; idx = hwb->next) { 462238035ed6SNavdeep Parhar hwb = &hwb_list[idx]; 462338035ed6SNavdeep Parhar spare = swz->size - hwb->size; 462438035ed6SNavdeep Parhar 462538035ed6SNavdeep Parhar if (allow_mbufs_in_cluster == 0 || hwb->size < maxp) 462638035ed6SNavdeep Parhar break; 4627e3207e19SNavdeep Parhar 4628e3207e19SNavdeep Parhar /* 4629e3207e19SNavdeep Parhar * Do not inline mbufs if doing so would violate the pad/pack 4630e3207e19SNavdeep Parhar * boundary alignment requirement. 4631e3207e19SNavdeep Parhar */ 463290e7434aSNavdeep Parhar if (fl_pad && (MSIZE % sc->params.sge.pad_boundary) != 0) 4633e3207e19SNavdeep Parhar continue; 4634e3207e19SNavdeep Parhar if (fl->flags & FL_BUF_PACKING && 463590e7434aSNavdeep Parhar (MSIZE % sc->params.sge.pack_boundary) != 0) 4636e3207e19SNavdeep Parhar continue; 4637e3207e19SNavdeep Parhar 463838035ed6SNavdeep Parhar if (spare < CL_METADATA_SIZE + MSIZE) 463938035ed6SNavdeep Parhar continue; 464038035ed6SNavdeep Parhar n = (spare - CL_METADATA_SIZE) / MSIZE; 464138035ed6SNavdeep Parhar if (n > howmany(hwb->size, maxp)) 464238035ed6SNavdeep Parhar break; 464338035ed6SNavdeep Parhar 464438035ed6SNavdeep Parhar hwidx = idx; 46451458bff9SNavdeep Parhar if (fl->flags & FL_BUF_PACKING) { 464638035ed6SNavdeep Parhar region1 = n * MSIZE; 464738035ed6SNavdeep Parhar region3 = spare - region1; 464838035ed6SNavdeep Parhar } else { 464938035ed6SNavdeep Parhar region1 = MSIZE; 465038035ed6SNavdeep Parhar region3 = spare - region1; 465138035ed6SNavdeep Parhar break; 465238035ed6SNavdeep Parhar } 465338035ed6SNavdeep Parhar } 465438035ed6SNavdeep Parhar 465538035ed6SNavdeep Parhar KASSERT(zidx >= 0 && zidx < SW_ZONE_SIZES, 465638035ed6SNavdeep Parhar ("%s: bad zone %d for fl %p, maxp %d", __func__, zidx, fl, maxp)); 465738035ed6SNavdeep Parhar KASSERT(hwidx >= 0 && hwidx <= SGE_FLBUF_SIZES, 465838035ed6SNavdeep Parhar ("%s: bad hwidx %d for fl %p, maxp %d", __func__, hwidx, fl, maxp)); 465938035ed6SNavdeep Parhar KASSERT(region1 + sc->sge.hw_buf_info[hwidx].size + region3 == 466038035ed6SNavdeep Parhar sc->sge.sw_zone_info[zidx].size, 466138035ed6SNavdeep Parhar ("%s: bad buffer layout for fl %p, maxp %d. " 466238035ed6SNavdeep Parhar "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp, 466338035ed6SNavdeep Parhar sc->sge.sw_zone_info[zidx].size, region1, 466438035ed6SNavdeep Parhar sc->sge.hw_buf_info[hwidx].size, region3)); 466538035ed6SNavdeep Parhar if (fl->flags & FL_BUF_PACKING || region1 > 0) { 466638035ed6SNavdeep Parhar KASSERT(region3 >= CL_METADATA_SIZE, 466738035ed6SNavdeep Parhar ("%s: no room for metadata. fl %p, maxp %d; " 466838035ed6SNavdeep Parhar "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp, 466938035ed6SNavdeep Parhar sc->sge.sw_zone_info[zidx].size, region1, 467038035ed6SNavdeep Parhar sc->sge.hw_buf_info[hwidx].size, region3)); 467138035ed6SNavdeep Parhar KASSERT(region1 % MSIZE == 0, 467238035ed6SNavdeep Parhar ("%s: bad mbuf region for fl %p, maxp %d. " 467338035ed6SNavdeep Parhar "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp, 467438035ed6SNavdeep Parhar sc->sge.sw_zone_info[zidx].size, region1, 467538035ed6SNavdeep Parhar sc->sge.hw_buf_info[hwidx].size, region3)); 467638035ed6SNavdeep Parhar } 467738035ed6SNavdeep Parhar 467838035ed6SNavdeep Parhar fl->cll_def.zidx = zidx; 467938035ed6SNavdeep Parhar fl->cll_def.hwidx = hwidx; 468038035ed6SNavdeep Parhar fl->cll_def.region1 = region1; 468138035ed6SNavdeep Parhar fl->cll_def.region3 = region3; 468238035ed6SNavdeep Parhar } 468338035ed6SNavdeep Parhar 468438035ed6SNavdeep Parhar static void 468538035ed6SNavdeep Parhar find_safe_refill_source(struct adapter *sc, struct sge_fl *fl) 468638035ed6SNavdeep Parhar { 468738035ed6SNavdeep Parhar struct sge *s = &sc->sge; 468838035ed6SNavdeep Parhar struct hw_buf_info *hwb; 468938035ed6SNavdeep Parhar struct sw_zone_info *swz; 469038035ed6SNavdeep Parhar int spare; 469138035ed6SNavdeep Parhar int8_t hwidx; 469238035ed6SNavdeep Parhar 469338035ed6SNavdeep Parhar if (fl->flags & FL_BUF_PACKING) 469438035ed6SNavdeep Parhar hwidx = s->safe_hwidx2; /* with room for metadata */ 469538035ed6SNavdeep Parhar else if (allow_mbufs_in_cluster && s->safe_hwidx2 != -1) { 469638035ed6SNavdeep Parhar hwidx = s->safe_hwidx2; 469738035ed6SNavdeep Parhar hwb = &s->hw_buf_info[hwidx]; 469838035ed6SNavdeep Parhar swz = &s->sw_zone_info[hwb->zidx]; 469938035ed6SNavdeep Parhar spare = swz->size - hwb->size; 470038035ed6SNavdeep Parhar 470138035ed6SNavdeep Parhar /* no good if there isn't room for an mbuf as well */ 470238035ed6SNavdeep Parhar if (spare < CL_METADATA_SIZE + MSIZE) 470338035ed6SNavdeep Parhar hwidx = s->safe_hwidx1; 470438035ed6SNavdeep Parhar } else 470538035ed6SNavdeep Parhar hwidx = s->safe_hwidx1; 470638035ed6SNavdeep Parhar 470738035ed6SNavdeep Parhar if (hwidx == -1) { 470838035ed6SNavdeep Parhar /* No fallback source */ 470938035ed6SNavdeep Parhar fl->cll_alt.hwidx = -1; 471038035ed6SNavdeep Parhar fl->cll_alt.zidx = -1; 471138035ed6SNavdeep Parhar 47121458bff9SNavdeep Parhar return; 471354e4ee71SNavdeep Parhar } 471454e4ee71SNavdeep Parhar 471538035ed6SNavdeep Parhar hwb = &s->hw_buf_info[hwidx]; 471638035ed6SNavdeep Parhar swz = &s->sw_zone_info[hwb->zidx]; 471738035ed6SNavdeep Parhar spare = swz->size - hwb->size; 471838035ed6SNavdeep Parhar fl->cll_alt.hwidx = hwidx; 471938035ed6SNavdeep Parhar fl->cll_alt.zidx = hwb->zidx; 4720e3207e19SNavdeep Parhar if (allow_mbufs_in_cluster && 472190e7434aSNavdeep Parhar (fl_pad == 0 || (MSIZE % sc->params.sge.pad_boundary) == 0)) 472238035ed6SNavdeep Parhar fl->cll_alt.region1 = ((spare - CL_METADATA_SIZE) / MSIZE) * MSIZE; 47231458bff9SNavdeep Parhar else 472438035ed6SNavdeep Parhar fl->cll_alt.region1 = 0; 472538035ed6SNavdeep Parhar fl->cll_alt.region3 = spare - fl->cll_alt.region1; 472654e4ee71SNavdeep Parhar } 4727ecb79ca4SNavdeep Parhar 4728733b9277SNavdeep Parhar static void 4729733b9277SNavdeep Parhar add_fl_to_sfl(struct adapter *sc, struct sge_fl *fl) 4730ecb79ca4SNavdeep Parhar { 4731733b9277SNavdeep Parhar mtx_lock(&sc->sfl_lock); 4732733b9277SNavdeep Parhar FL_LOCK(fl); 4733733b9277SNavdeep Parhar if ((fl->flags & FL_DOOMED) == 0) { 4734733b9277SNavdeep Parhar fl->flags |= FL_STARVING; 4735733b9277SNavdeep Parhar TAILQ_INSERT_TAIL(&sc->sfl, fl, link); 4736733b9277SNavdeep Parhar callout_reset(&sc->sfl_callout, hz / 5, refill_sfl, sc); 4737733b9277SNavdeep Parhar } 4738733b9277SNavdeep Parhar FL_UNLOCK(fl); 4739733b9277SNavdeep Parhar mtx_unlock(&sc->sfl_lock); 4740733b9277SNavdeep Parhar } 4741ecb79ca4SNavdeep Parhar 47427951040fSNavdeep Parhar static void 47437951040fSNavdeep Parhar handle_wrq_egr_update(struct adapter *sc, struct sge_eq *eq) 47447951040fSNavdeep Parhar { 47457951040fSNavdeep Parhar struct sge_wrq *wrq = (void *)eq; 47467951040fSNavdeep Parhar 47477951040fSNavdeep Parhar atomic_readandclear_int(&eq->equiq); 47487951040fSNavdeep Parhar taskqueue_enqueue(sc->tq[eq->tx_chan], &wrq->wrq_tx_task); 47497951040fSNavdeep Parhar } 47507951040fSNavdeep Parhar 47517951040fSNavdeep Parhar static void 47527951040fSNavdeep Parhar handle_eth_egr_update(struct adapter *sc, struct sge_eq *eq) 47537951040fSNavdeep Parhar { 47547951040fSNavdeep Parhar struct sge_txq *txq = (void *)eq; 47557951040fSNavdeep Parhar 47567951040fSNavdeep Parhar MPASS((eq->flags & EQ_TYPEMASK) == EQ_ETH); 47577951040fSNavdeep Parhar 47587951040fSNavdeep Parhar atomic_readandclear_int(&eq->equiq); 47597951040fSNavdeep Parhar mp_ring_check_drainage(txq->r, 0); 47607951040fSNavdeep Parhar taskqueue_enqueue(sc->tq[eq->tx_chan], &txq->tx_reclaim_task); 47617951040fSNavdeep Parhar } 47627951040fSNavdeep Parhar 4763733b9277SNavdeep Parhar static int 4764733b9277SNavdeep Parhar handle_sge_egr_update(struct sge_iq *iq, const struct rss_header *rss, 4765733b9277SNavdeep Parhar struct mbuf *m) 4766733b9277SNavdeep Parhar { 4767733b9277SNavdeep Parhar const struct cpl_sge_egr_update *cpl = (const void *)(rss + 1); 4768733b9277SNavdeep Parhar unsigned int qid = G_EGR_QID(ntohl(cpl->opcode_qid)); 4769733b9277SNavdeep Parhar struct adapter *sc = iq->adapter; 4770733b9277SNavdeep Parhar struct sge *s = &sc->sge; 4771733b9277SNavdeep Parhar struct sge_eq *eq; 47727951040fSNavdeep Parhar static void (*h[])(struct adapter *, struct sge_eq *) = {NULL, 47737951040fSNavdeep Parhar &handle_wrq_egr_update, &handle_eth_egr_update, 47747951040fSNavdeep Parhar &handle_wrq_egr_update}; 4775733b9277SNavdeep Parhar 4776733b9277SNavdeep Parhar KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__, 4777733b9277SNavdeep Parhar rss->opcode)); 4778733b9277SNavdeep Parhar 4779*ec55567cSJohn Baldwin eq = s->eqmap[qid - s->eq_start - s->eq_base]; 47807951040fSNavdeep Parhar (*h[eq->flags & EQ_TYPEMASK])(sc, eq); 4781ecb79ca4SNavdeep Parhar 4782ecb79ca4SNavdeep Parhar return (0); 4783ecb79ca4SNavdeep Parhar } 4784f7dfe243SNavdeep Parhar 47850abd31e2SNavdeep Parhar /* handle_fw_msg works for both fw4_msg and fw6_msg because this is valid */ 47860abd31e2SNavdeep Parhar CTASSERT(offsetof(struct cpl_fw4_msg, data) == \ 47870abd31e2SNavdeep Parhar offsetof(struct cpl_fw6_msg, data)); 47880abd31e2SNavdeep Parhar 4789733b9277SNavdeep Parhar static int 47901b4cc91fSNavdeep Parhar handle_fw_msg(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m) 479156599263SNavdeep Parhar { 47921b4cc91fSNavdeep Parhar struct adapter *sc = iq->adapter; 479356599263SNavdeep Parhar const struct cpl_fw6_msg *cpl = (const void *)(rss + 1); 479456599263SNavdeep Parhar 4795733b9277SNavdeep Parhar KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__, 4796733b9277SNavdeep Parhar rss->opcode)); 4797733b9277SNavdeep Parhar 47980abd31e2SNavdeep Parhar if (cpl->type == FW_TYPE_RSSCPL || cpl->type == FW6_TYPE_RSSCPL) { 47990abd31e2SNavdeep Parhar const struct rss_header *rss2; 48000abd31e2SNavdeep Parhar 48010abd31e2SNavdeep Parhar rss2 = (const struct rss_header *)&cpl->data[0]; 4802671bf2b8SNavdeep Parhar return (t4_cpl_handler[rss2->opcode](iq, rss2, m)); 48030abd31e2SNavdeep Parhar } 48040abd31e2SNavdeep Parhar 4805671bf2b8SNavdeep Parhar return (t4_fw_msg_handler[cpl->type](sc, &cpl->data[0])); 4806f7dfe243SNavdeep Parhar } 4807af49c942SNavdeep Parhar 4808069af0ebSJohn Baldwin /** 4809069af0ebSJohn Baldwin * t4_handle_wrerr_rpl - process a FW work request error message 4810069af0ebSJohn Baldwin * @adap: the adapter 4811069af0ebSJohn Baldwin * @rpl: start of the FW message 4812069af0ebSJohn Baldwin */ 4813069af0ebSJohn Baldwin static int 4814069af0ebSJohn Baldwin t4_handle_wrerr_rpl(struct adapter *adap, const __be64 *rpl) 4815069af0ebSJohn Baldwin { 4816069af0ebSJohn Baldwin u8 opcode = *(const u8 *)rpl; 4817069af0ebSJohn Baldwin const struct fw_error_cmd *e = (const void *)rpl; 4818069af0ebSJohn Baldwin unsigned int i; 4819069af0ebSJohn Baldwin 4820069af0ebSJohn Baldwin if (opcode != FW_ERROR_CMD) { 4821069af0ebSJohn Baldwin log(LOG_ERR, 4822069af0ebSJohn Baldwin "%s: Received WRERR_RPL message with opcode %#x\n", 4823069af0ebSJohn Baldwin device_get_nameunit(adap->dev), opcode); 4824069af0ebSJohn Baldwin return (EINVAL); 4825069af0ebSJohn Baldwin } 4826069af0ebSJohn Baldwin log(LOG_ERR, "%s: FW_ERROR (%s) ", device_get_nameunit(adap->dev), 4827069af0ebSJohn Baldwin G_FW_ERROR_CMD_FATAL(be32toh(e->op_to_type)) ? "fatal" : 4828069af0ebSJohn Baldwin "non-fatal"); 4829069af0ebSJohn Baldwin switch (G_FW_ERROR_CMD_TYPE(be32toh(e->op_to_type))) { 4830069af0ebSJohn Baldwin case FW_ERROR_TYPE_EXCEPTION: 4831069af0ebSJohn Baldwin log(LOG_ERR, "exception info:\n"); 4832069af0ebSJohn Baldwin for (i = 0; i < nitems(e->u.exception.info); i++) 4833069af0ebSJohn Baldwin log(LOG_ERR, "%s%08x", i == 0 ? "\t" : " ", 4834069af0ebSJohn Baldwin be32toh(e->u.exception.info[i])); 4835069af0ebSJohn Baldwin log(LOG_ERR, "\n"); 4836069af0ebSJohn Baldwin break; 4837069af0ebSJohn Baldwin case FW_ERROR_TYPE_HWMODULE: 4838069af0ebSJohn Baldwin log(LOG_ERR, "HW module regaddr %08x regval %08x\n", 4839069af0ebSJohn Baldwin be32toh(e->u.hwmodule.regaddr), 4840069af0ebSJohn Baldwin be32toh(e->u.hwmodule.regval)); 4841069af0ebSJohn Baldwin break; 4842069af0ebSJohn Baldwin case FW_ERROR_TYPE_WR: 4843069af0ebSJohn Baldwin log(LOG_ERR, "WR cidx %d PF %d VF %d eqid %d hdr:\n", 4844069af0ebSJohn Baldwin be16toh(e->u.wr.cidx), 4845069af0ebSJohn Baldwin G_FW_ERROR_CMD_PFN(be16toh(e->u.wr.pfn_vfn)), 4846069af0ebSJohn Baldwin G_FW_ERROR_CMD_VFN(be16toh(e->u.wr.pfn_vfn)), 4847069af0ebSJohn Baldwin be32toh(e->u.wr.eqid)); 4848069af0ebSJohn Baldwin for (i = 0; i < nitems(e->u.wr.wrhdr); i++) 4849069af0ebSJohn Baldwin log(LOG_ERR, "%s%02x", i == 0 ? "\t" : " ", 4850069af0ebSJohn Baldwin e->u.wr.wrhdr[i]); 4851069af0ebSJohn Baldwin log(LOG_ERR, "\n"); 4852069af0ebSJohn Baldwin break; 4853069af0ebSJohn Baldwin case FW_ERROR_TYPE_ACL: 4854069af0ebSJohn Baldwin log(LOG_ERR, "ACL cidx %d PF %d VF %d eqid %d %s", 4855069af0ebSJohn Baldwin be16toh(e->u.acl.cidx), 4856069af0ebSJohn Baldwin G_FW_ERROR_CMD_PFN(be16toh(e->u.acl.pfn_vfn)), 4857069af0ebSJohn Baldwin G_FW_ERROR_CMD_VFN(be16toh(e->u.acl.pfn_vfn)), 4858069af0ebSJohn Baldwin be32toh(e->u.acl.eqid), 4859069af0ebSJohn Baldwin G_FW_ERROR_CMD_MV(be16toh(e->u.acl.mv_pkd)) ? "vlanid" : 4860069af0ebSJohn Baldwin "MAC"); 4861069af0ebSJohn Baldwin for (i = 0; i < nitems(e->u.acl.val); i++) 4862069af0ebSJohn Baldwin log(LOG_ERR, " %02x", e->u.acl.val[i]); 4863069af0ebSJohn Baldwin log(LOG_ERR, "\n"); 4864069af0ebSJohn Baldwin break; 4865069af0ebSJohn Baldwin default: 4866069af0ebSJohn Baldwin log(LOG_ERR, "type %#x\n", 4867069af0ebSJohn Baldwin G_FW_ERROR_CMD_TYPE(be32toh(e->op_to_type))); 4868069af0ebSJohn Baldwin return (EINVAL); 4869069af0ebSJohn Baldwin } 4870069af0ebSJohn Baldwin return (0); 4871069af0ebSJohn Baldwin } 4872069af0ebSJohn Baldwin 4873af49c942SNavdeep Parhar static int 487456599263SNavdeep Parhar sysctl_uint16(SYSCTL_HANDLER_ARGS) 4875af49c942SNavdeep Parhar { 4876af49c942SNavdeep Parhar uint16_t *id = arg1; 4877af49c942SNavdeep Parhar int i = *id; 4878af49c942SNavdeep Parhar 4879af49c942SNavdeep Parhar return sysctl_handle_int(oidp, &i, 0, req); 4880af49c942SNavdeep Parhar } 488138035ed6SNavdeep Parhar 488238035ed6SNavdeep Parhar static int 488338035ed6SNavdeep Parhar sysctl_bufsizes(SYSCTL_HANDLER_ARGS) 488438035ed6SNavdeep Parhar { 488538035ed6SNavdeep Parhar struct sge *s = arg1; 488638035ed6SNavdeep Parhar struct hw_buf_info *hwb = &s->hw_buf_info[0]; 488738035ed6SNavdeep Parhar struct sw_zone_info *swz = &s->sw_zone_info[0]; 488838035ed6SNavdeep Parhar int i, rc; 488938035ed6SNavdeep Parhar struct sbuf sb; 489038035ed6SNavdeep Parhar char c; 489138035ed6SNavdeep Parhar 489238035ed6SNavdeep Parhar sbuf_new(&sb, NULL, 32, SBUF_AUTOEXTEND); 489338035ed6SNavdeep Parhar for (i = 0; i < SGE_FLBUF_SIZES; i++, hwb++) { 489438035ed6SNavdeep Parhar if (hwb->zidx >= 0 && swz[hwb->zidx].size <= largest_rx_cluster) 489538035ed6SNavdeep Parhar c = '*'; 489638035ed6SNavdeep Parhar else 489738035ed6SNavdeep Parhar c = '\0'; 489838035ed6SNavdeep Parhar 489938035ed6SNavdeep Parhar sbuf_printf(&sb, "%u%c ", hwb->size, c); 490038035ed6SNavdeep Parhar } 490138035ed6SNavdeep Parhar sbuf_trim(&sb); 490238035ed6SNavdeep Parhar sbuf_finish(&sb); 490338035ed6SNavdeep Parhar rc = sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req); 490438035ed6SNavdeep Parhar sbuf_delete(&sb); 490538035ed6SNavdeep Parhar return (rc); 490638035ed6SNavdeep Parhar } 490702f972e8SNavdeep Parhar 490802f972e8SNavdeep Parhar static int 490902f972e8SNavdeep Parhar sysctl_tc(SYSCTL_HANDLER_ARGS) 491002f972e8SNavdeep Parhar { 491102f972e8SNavdeep Parhar struct vi_info *vi = arg1; 491202f972e8SNavdeep Parhar struct port_info *pi; 491302f972e8SNavdeep Parhar struct adapter *sc; 491402f972e8SNavdeep Parhar struct sge_txq *txq; 491502f972e8SNavdeep Parhar struct tx_sched_class *tc; 491602f972e8SNavdeep Parhar int qidx = arg2, rc, tc_idx; 491702f972e8SNavdeep Parhar uint32_t fw_queue, fw_class; 491802f972e8SNavdeep Parhar 491902f972e8SNavdeep Parhar MPASS(qidx >= 0 && qidx < vi->ntxq); 492002f972e8SNavdeep Parhar pi = vi->pi; 492102f972e8SNavdeep Parhar sc = pi->adapter; 492202f972e8SNavdeep Parhar txq = &sc->sge.txq[vi->first_txq + qidx]; 492302f972e8SNavdeep Parhar 492402f972e8SNavdeep Parhar tc_idx = txq->tc_idx; 492502f972e8SNavdeep Parhar rc = sysctl_handle_int(oidp, &tc_idx, 0, req); 492602f972e8SNavdeep Parhar if (rc != 0 || req->newptr == NULL) 492702f972e8SNavdeep Parhar return (rc); 492802f972e8SNavdeep Parhar 492902f972e8SNavdeep Parhar /* Note that -1 is legitimate input (it means unbind). */ 493002f972e8SNavdeep Parhar if (tc_idx < -1 || tc_idx >= sc->chip_params->nsched_cls) 493102f972e8SNavdeep Parhar return (EINVAL); 493202f972e8SNavdeep Parhar 493302f972e8SNavdeep Parhar rc = begin_synchronized_op(sc, vi, SLEEP_OK | INTR_OK, "t4stc"); 493402f972e8SNavdeep Parhar if (rc) 493502f972e8SNavdeep Parhar return (rc); 493602f972e8SNavdeep Parhar 493702f972e8SNavdeep Parhar if (tc_idx == txq->tc_idx) { 493802f972e8SNavdeep Parhar rc = 0; /* No change, nothing to do. */ 493902f972e8SNavdeep Parhar goto done; 494002f972e8SNavdeep Parhar } 494102f972e8SNavdeep Parhar 494202f972e8SNavdeep Parhar fw_queue = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) | 494302f972e8SNavdeep Parhar V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_EQ_SCHEDCLASS_ETH) | 494402f972e8SNavdeep Parhar V_FW_PARAMS_PARAM_YZ(txq->eq.cntxt_id); 494502f972e8SNavdeep Parhar 494602f972e8SNavdeep Parhar if (tc_idx == -1) 494702f972e8SNavdeep Parhar fw_class = 0xffffffff; /* Unbind. */ 494802f972e8SNavdeep Parhar else { 494902f972e8SNavdeep Parhar /* 495002f972e8SNavdeep Parhar * Bind to a different class. Ethernet txq's are only allowed 495102f972e8SNavdeep Parhar * to bind to cl-rl mode-class for now. XXX: too restrictive. 495202f972e8SNavdeep Parhar */ 495302f972e8SNavdeep Parhar tc = &pi->tc[tc_idx]; 495402f972e8SNavdeep Parhar if (tc->flags & TX_SC_OK && 495502f972e8SNavdeep Parhar tc->params.level == SCHED_CLASS_LEVEL_CL_RL && 495602f972e8SNavdeep Parhar tc->params.mode == SCHED_CLASS_MODE_CLASS) { 495702f972e8SNavdeep Parhar /* Ok to proceed. */ 495802f972e8SNavdeep Parhar fw_class = tc_idx; 495902f972e8SNavdeep Parhar } else { 496002f972e8SNavdeep Parhar rc = tc->flags & TX_SC_OK ? EBUSY : ENXIO; 496102f972e8SNavdeep Parhar goto done; 496202f972e8SNavdeep Parhar } 496302f972e8SNavdeep Parhar } 496402f972e8SNavdeep Parhar 496502f972e8SNavdeep Parhar rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &fw_queue, &fw_class); 496602f972e8SNavdeep Parhar if (rc == 0) { 496702f972e8SNavdeep Parhar if (txq->tc_idx != -1) { 496802f972e8SNavdeep Parhar tc = &pi->tc[txq->tc_idx]; 496902f972e8SNavdeep Parhar MPASS(tc->refcount > 0); 497002f972e8SNavdeep Parhar tc->refcount--; 497102f972e8SNavdeep Parhar } 497202f972e8SNavdeep Parhar if (tc_idx != -1) { 497302f972e8SNavdeep Parhar tc = &pi->tc[tc_idx]; 497402f972e8SNavdeep Parhar tc->refcount++; 497502f972e8SNavdeep Parhar } 497602f972e8SNavdeep Parhar txq->tc_idx = tc_idx; 497702f972e8SNavdeep Parhar } 497802f972e8SNavdeep Parhar done: 497902f972e8SNavdeep Parhar end_synchronized_op(sc, 0); 498002f972e8SNavdeep Parhar return (rc); 498102f972e8SNavdeep Parhar } 4982