xref: /freebsd/sys/dev/cxgbe/t4_sge.c (revision 671bf2b8b22f6c737fb6927b1cb7308ba50900ad)
154e4ee71SNavdeep Parhar /*-
254e4ee71SNavdeep Parhar  * Copyright (c) 2011 Chelsio Communications, Inc.
354e4ee71SNavdeep Parhar  * All rights reserved.
454e4ee71SNavdeep Parhar  * Written by: Navdeep Parhar <np@FreeBSD.org>
554e4ee71SNavdeep Parhar  *
654e4ee71SNavdeep Parhar  * Redistribution and use in source and binary forms, with or without
754e4ee71SNavdeep Parhar  * modification, are permitted provided that the following conditions
854e4ee71SNavdeep Parhar  * are met:
954e4ee71SNavdeep Parhar  * 1. Redistributions of source code must retain the above copyright
1054e4ee71SNavdeep Parhar  *    notice, this list of conditions and the following disclaimer.
1154e4ee71SNavdeep Parhar  * 2. Redistributions in binary form must reproduce the above copyright
1254e4ee71SNavdeep Parhar  *    notice, this list of conditions and the following disclaimer in the
1354e4ee71SNavdeep Parhar  *    documentation and/or other materials provided with the distribution.
1454e4ee71SNavdeep Parhar  *
1554e4ee71SNavdeep Parhar  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
1654e4ee71SNavdeep Parhar  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1754e4ee71SNavdeep Parhar  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1854e4ee71SNavdeep Parhar  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
1954e4ee71SNavdeep Parhar  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
2054e4ee71SNavdeep Parhar  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
2154e4ee71SNavdeep Parhar  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
2254e4ee71SNavdeep Parhar  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
2354e4ee71SNavdeep Parhar  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2454e4ee71SNavdeep Parhar  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2554e4ee71SNavdeep Parhar  * SUCH DAMAGE.
2654e4ee71SNavdeep Parhar  */
2754e4ee71SNavdeep Parhar 
2854e4ee71SNavdeep Parhar #include <sys/cdefs.h>
2954e4ee71SNavdeep Parhar __FBSDID("$FreeBSD$");
3054e4ee71SNavdeep Parhar 
3154e4ee71SNavdeep Parhar #include "opt_inet.h"
32a1ea9a82SNavdeep Parhar #include "opt_inet6.h"
3354e4ee71SNavdeep Parhar 
3454e4ee71SNavdeep Parhar #include <sys/types.h>
35c3322cb9SGleb Smirnoff #include <sys/eventhandler.h>
3654e4ee71SNavdeep Parhar #include <sys/mbuf.h>
3754e4ee71SNavdeep Parhar #include <sys/socket.h>
3854e4ee71SNavdeep Parhar #include <sys/kernel.h>
39ecb79ca4SNavdeep Parhar #include <sys/malloc.h>
40ecb79ca4SNavdeep Parhar #include <sys/queue.h>
4138035ed6SNavdeep Parhar #include <sys/sbuf.h>
42ecb79ca4SNavdeep Parhar #include <sys/taskqueue.h>
43480e603cSNavdeep Parhar #include <sys/time.h>
447951040fSNavdeep Parhar #include <sys/sglist.h>
4554e4ee71SNavdeep Parhar #include <sys/sysctl.h>
46733b9277SNavdeep Parhar #include <sys/smp.h>
4782eff304SNavdeep Parhar #include <sys/counter.h>
4854e4ee71SNavdeep Parhar #include <net/bpf.h>
4954e4ee71SNavdeep Parhar #include <net/ethernet.h>
5054e4ee71SNavdeep Parhar #include <net/if.h>
5154e4ee71SNavdeep Parhar #include <net/if_vlan_var.h>
5254e4ee71SNavdeep Parhar #include <netinet/in.h>
5354e4ee71SNavdeep Parhar #include <netinet/ip.h>
54a1ea9a82SNavdeep Parhar #include <netinet/ip6.h>
5554e4ee71SNavdeep Parhar #include <netinet/tcp.h>
5664db8966SDimitry Andric #include <machine/md_var.h>
5738035ed6SNavdeep Parhar #include <vm/vm.h>
5838035ed6SNavdeep Parhar #include <vm/pmap.h>
59298d969cSNavdeep Parhar #ifdef DEV_NETMAP
60298d969cSNavdeep Parhar #include <machine/bus.h>
61298d969cSNavdeep Parhar #include <sys/selinfo.h>
62298d969cSNavdeep Parhar #include <net/if_var.h>
63298d969cSNavdeep Parhar #include <net/netmap.h>
64298d969cSNavdeep Parhar #include <dev/netmap/netmap_kern.h>
65298d969cSNavdeep Parhar #endif
6654e4ee71SNavdeep Parhar 
6754e4ee71SNavdeep Parhar #include "common/common.h"
6854e4ee71SNavdeep Parhar #include "common/t4_regs.h"
6954e4ee71SNavdeep Parhar #include "common/t4_regs_values.h"
7054e4ee71SNavdeep Parhar #include "common/t4_msg.h"
71*671bf2b8SNavdeep Parhar #include "t4_l2t.h"
727951040fSNavdeep Parhar #include "t4_mp_ring.h"
7354e4ee71SNavdeep Parhar 
74d14b0ac1SNavdeep Parhar #ifdef T4_PKT_TIMESTAMP
75d14b0ac1SNavdeep Parhar #define RX_COPY_THRESHOLD (MINCLSIZE - 8)
76d14b0ac1SNavdeep Parhar #else
77d14b0ac1SNavdeep Parhar #define RX_COPY_THRESHOLD MINCLSIZE
78d14b0ac1SNavdeep Parhar #endif
79d14b0ac1SNavdeep Parhar 
809fb8886bSNavdeep Parhar /*
819fb8886bSNavdeep Parhar  * Ethernet frames are DMA'd at this byte offset into the freelist buffer.
829fb8886bSNavdeep Parhar  * 0-7 are valid values.
839fb8886bSNavdeep Parhar  */
84298d969cSNavdeep Parhar int fl_pktshift = 2;
859fb8886bSNavdeep Parhar TUNABLE_INT("hw.cxgbe.fl_pktshift", &fl_pktshift);
8654e4ee71SNavdeep Parhar 
879fb8886bSNavdeep Parhar /*
889fb8886bSNavdeep Parhar  * Pad ethernet payload up to this boundary.
899fb8886bSNavdeep Parhar  * -1: driver should figure out a good value.
901458bff9SNavdeep Parhar  *  0: disable padding.
911458bff9SNavdeep Parhar  *  Any power of 2 from 32 to 4096 (both inclusive) is also a valid value.
929fb8886bSNavdeep Parhar  */
93298d969cSNavdeep Parhar int fl_pad = -1;
949fb8886bSNavdeep Parhar TUNABLE_INT("hw.cxgbe.fl_pad", &fl_pad);
959fb8886bSNavdeep Parhar 
969fb8886bSNavdeep Parhar /*
979fb8886bSNavdeep Parhar  * Status page length.
989fb8886bSNavdeep Parhar  * -1: driver should figure out a good value.
999fb8886bSNavdeep Parhar  *  64 or 128 are the only other valid values.
1009fb8886bSNavdeep Parhar  */
101298d969cSNavdeep Parhar int spg_len = -1;
1029fb8886bSNavdeep Parhar TUNABLE_INT("hw.cxgbe.spg_len", &spg_len);
1039fb8886bSNavdeep Parhar 
1049fb8886bSNavdeep Parhar /*
1059fb8886bSNavdeep Parhar  * Congestion drops.
1069fb8886bSNavdeep Parhar  * -1: no congestion feedback (not recommended).
1079fb8886bSNavdeep Parhar  *  0: backpressure the channel instead of dropping packets right away.
1089fb8886bSNavdeep Parhar  *  1: no backpressure, drop packets for the congested queue immediately.
1099fb8886bSNavdeep Parhar  */
1109fb8886bSNavdeep Parhar static int cong_drop = 0;
1119fb8886bSNavdeep Parhar TUNABLE_INT("hw.cxgbe.cong_drop", &cong_drop);
11254e4ee71SNavdeep Parhar 
1131458bff9SNavdeep Parhar /*
1141458bff9SNavdeep Parhar  * Deliver multiple frames in the same free list buffer if they fit.
1151458bff9SNavdeep Parhar  * -1: let the driver decide whether to enable buffer packing or not.
1161458bff9SNavdeep Parhar  *  0: disable buffer packing.
1171458bff9SNavdeep Parhar  *  1: enable buffer packing.
1181458bff9SNavdeep Parhar  */
1191458bff9SNavdeep Parhar static int buffer_packing = -1;
1201458bff9SNavdeep Parhar TUNABLE_INT("hw.cxgbe.buffer_packing", &buffer_packing);
1211458bff9SNavdeep Parhar 
1221458bff9SNavdeep Parhar /*
1231458bff9SNavdeep Parhar  * Start next frame in a packed buffer at this boundary.
1241458bff9SNavdeep Parhar  * -1: driver should figure out a good value.
125e3207e19SNavdeep Parhar  * T4: driver will ignore this and use the same value as fl_pad above.
126e3207e19SNavdeep Parhar  * T5: 16, or a power of 2 from 64 to 4096 (both inclusive) is a valid value.
1271458bff9SNavdeep Parhar  */
1281458bff9SNavdeep Parhar static int fl_pack = -1;
1291458bff9SNavdeep Parhar TUNABLE_INT("hw.cxgbe.fl_pack", &fl_pack);
1301458bff9SNavdeep Parhar 
13138035ed6SNavdeep Parhar /*
13238035ed6SNavdeep Parhar  * Allow the driver to create mbuf(s) in a cluster allocated for rx.
13338035ed6SNavdeep Parhar  * 0: never; always allocate mbufs from the zone_mbuf UMA zone.
13438035ed6SNavdeep Parhar  * 1: ok to create mbuf(s) within a cluster if there is room.
13538035ed6SNavdeep Parhar  */
13638035ed6SNavdeep Parhar static int allow_mbufs_in_cluster = 1;
13738035ed6SNavdeep Parhar TUNABLE_INT("hw.cxgbe.allow_mbufs_in_cluster", &allow_mbufs_in_cluster);
13838035ed6SNavdeep Parhar 
13938035ed6SNavdeep Parhar /*
14038035ed6SNavdeep Parhar  * Largest rx cluster size that the driver is allowed to allocate.
14138035ed6SNavdeep Parhar  */
14238035ed6SNavdeep Parhar static int largest_rx_cluster = MJUM16BYTES;
14338035ed6SNavdeep Parhar TUNABLE_INT("hw.cxgbe.largest_rx_cluster", &largest_rx_cluster);
14438035ed6SNavdeep Parhar 
14538035ed6SNavdeep Parhar /*
14638035ed6SNavdeep Parhar  * Size of cluster allocation that's most likely to succeed.  The driver will
14738035ed6SNavdeep Parhar  * fall back to this size if it fails to allocate clusters larger than this.
14838035ed6SNavdeep Parhar  */
14938035ed6SNavdeep Parhar static int safest_rx_cluster = PAGE_SIZE;
15038035ed6SNavdeep Parhar TUNABLE_INT("hw.cxgbe.safest_rx_cluster", &safest_rx_cluster);
15138035ed6SNavdeep Parhar 
15254e4ee71SNavdeep Parhar struct txpkts {
1537951040fSNavdeep Parhar 	u_int wr_type;		/* type 0 or type 1 */
1547951040fSNavdeep Parhar 	u_int npkt;		/* # of packets in this work request */
1557951040fSNavdeep Parhar 	u_int plen;		/* total payload (sum of all packets) */
1567951040fSNavdeep Parhar 	u_int len16;		/* # of 16B pieces used by this work request */
15754e4ee71SNavdeep Parhar };
15854e4ee71SNavdeep Parhar 
15954e4ee71SNavdeep Parhar /* A packet's SGL.  This + m_pkthdr has all info needed for tx */
16054e4ee71SNavdeep Parhar struct sgl {
1617951040fSNavdeep Parhar 	struct sglist sg;
1627951040fSNavdeep Parhar 	struct sglist_seg seg[TX_SGL_SEGS];
16354e4ee71SNavdeep Parhar };
16454e4ee71SNavdeep Parhar 
165733b9277SNavdeep Parhar static int service_iq(struct sge_iq *, int);
1664d6db4e0SNavdeep Parhar static struct mbuf *get_fl_payload(struct adapter *, struct sge_fl *, uint32_t);
167733b9277SNavdeep Parhar static int t4_eth_rx(struct sge_iq *, const struct rss_header *, struct mbuf *);
168b2daa9a9SNavdeep Parhar static inline void init_iq(struct sge_iq *, struct adapter *, int, int, int);
169e3207e19SNavdeep Parhar static inline void init_fl(struct adapter *, struct sge_fl *, int, int, char *);
17090e7434aSNavdeep Parhar static inline void init_eq(struct adapter *, struct sge_eq *, int, int, uint8_t,
17190e7434aSNavdeep Parhar     uint16_t, char *);
17254e4ee71SNavdeep Parhar static int alloc_ring(struct adapter *, size_t, bus_dma_tag_t *, bus_dmamap_t *,
17354e4ee71SNavdeep Parhar     bus_addr_t *, void **);
17454e4ee71SNavdeep Parhar static int free_ring(struct adapter *, bus_dma_tag_t, bus_dmamap_t, bus_addr_t,
17554e4ee71SNavdeep Parhar     void *);
176fe2ebb76SJohn Baldwin static int alloc_iq_fl(struct vi_info *, struct sge_iq *, struct sge_fl *,
177bc14b14dSNavdeep Parhar     int, int);
178fe2ebb76SJohn Baldwin static int free_iq_fl(struct vi_info *, struct sge_iq *, struct sge_fl *);
17938035ed6SNavdeep Parhar static void add_fl_sysctls(struct sysctl_ctx_list *, struct sysctl_oid *,
18038035ed6SNavdeep Parhar     struct sge_fl *);
181733b9277SNavdeep Parhar static int alloc_fwq(struct adapter *);
182733b9277SNavdeep Parhar static int free_fwq(struct adapter *);
183733b9277SNavdeep Parhar static int alloc_mgmtq(struct adapter *);
184733b9277SNavdeep Parhar static int free_mgmtq(struct adapter *);
185fe2ebb76SJohn Baldwin static int alloc_rxq(struct vi_info *, struct sge_rxq *, int, int,
186733b9277SNavdeep Parhar     struct sysctl_oid *);
187fe2ebb76SJohn Baldwin static int free_rxq(struct vi_info *, struct sge_rxq *);
18809fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
189fe2ebb76SJohn Baldwin static int alloc_ofld_rxq(struct vi_info *, struct sge_ofld_rxq *, int, int,
190733b9277SNavdeep Parhar     struct sysctl_oid *);
191fe2ebb76SJohn Baldwin static int free_ofld_rxq(struct vi_info *, struct sge_ofld_rxq *);
192733b9277SNavdeep Parhar #endif
193298d969cSNavdeep Parhar #ifdef DEV_NETMAP
194fe2ebb76SJohn Baldwin static int alloc_nm_rxq(struct vi_info *, struct sge_nm_rxq *, int, int,
195298d969cSNavdeep Parhar     struct sysctl_oid *);
196fe2ebb76SJohn Baldwin static int free_nm_rxq(struct vi_info *, struct sge_nm_rxq *);
197fe2ebb76SJohn Baldwin static int alloc_nm_txq(struct vi_info *, struct sge_nm_txq *, int, int,
198298d969cSNavdeep Parhar     struct sysctl_oid *);
199fe2ebb76SJohn Baldwin static int free_nm_txq(struct vi_info *, struct sge_nm_txq *);
200298d969cSNavdeep Parhar #endif
201733b9277SNavdeep Parhar static int ctrl_eq_alloc(struct adapter *, struct sge_eq *);
202fe2ebb76SJohn Baldwin static int eth_eq_alloc(struct adapter *, struct vi_info *, struct sge_eq *);
20309fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
204fe2ebb76SJohn Baldwin static int ofld_eq_alloc(struct adapter *, struct vi_info *, struct sge_eq *);
205733b9277SNavdeep Parhar #endif
206fe2ebb76SJohn Baldwin static int alloc_eq(struct adapter *, struct vi_info *, struct sge_eq *);
207733b9277SNavdeep Parhar static int free_eq(struct adapter *, struct sge_eq *);
208fe2ebb76SJohn Baldwin static int alloc_wrq(struct adapter *, struct vi_info *, struct sge_wrq *,
209733b9277SNavdeep Parhar     struct sysctl_oid *);
210733b9277SNavdeep Parhar static int free_wrq(struct adapter *, struct sge_wrq *);
211fe2ebb76SJohn Baldwin static int alloc_txq(struct vi_info *, struct sge_txq *, int,
212733b9277SNavdeep Parhar     struct sysctl_oid *);
213fe2ebb76SJohn Baldwin static int free_txq(struct vi_info *, struct sge_txq *);
21454e4ee71SNavdeep Parhar static void oneseg_dma_callback(void *, bus_dma_segment_t *, int, int);
21554e4ee71SNavdeep Parhar static inline void ring_fl_db(struct adapter *, struct sge_fl *);
216733b9277SNavdeep Parhar static int refill_fl(struct adapter *, struct sge_fl *, int);
217733b9277SNavdeep Parhar static void refill_sfl(void *);
21854e4ee71SNavdeep Parhar static int alloc_fl_sdesc(struct sge_fl *);
2191458bff9SNavdeep Parhar static void free_fl_sdesc(struct adapter *, struct sge_fl *);
22038035ed6SNavdeep Parhar static void find_best_refill_source(struct adapter *, struct sge_fl *, int);
22138035ed6SNavdeep Parhar static void find_safe_refill_source(struct adapter *, struct sge_fl *);
222733b9277SNavdeep Parhar static void add_fl_to_sfl(struct adapter *, struct sge_fl *);
22354e4ee71SNavdeep Parhar 
2247951040fSNavdeep Parhar static inline void get_pkt_gl(struct mbuf *, struct sglist *);
2257951040fSNavdeep Parhar static inline u_int txpkt_len16(u_int, u_int);
2267951040fSNavdeep Parhar static inline u_int txpkts0_len16(u_int);
2277951040fSNavdeep Parhar static inline u_int txpkts1_len16(void);
2287951040fSNavdeep Parhar static u_int write_txpkt_wr(struct sge_txq *, struct fw_eth_tx_pkt_wr *,
2297951040fSNavdeep Parhar     struct mbuf *, u_int);
2307951040fSNavdeep Parhar static int try_txpkts(struct mbuf *, struct mbuf *, struct txpkts *, u_int);
2317951040fSNavdeep Parhar static int add_to_txpkts(struct mbuf *, struct txpkts *, u_int);
2327951040fSNavdeep Parhar static u_int write_txpkts_wr(struct sge_txq *, struct fw_eth_tx_pkts_wr *,
2337951040fSNavdeep Parhar     struct mbuf *, const struct txpkts *, u_int);
2347951040fSNavdeep Parhar static void write_gl_to_txd(struct sge_txq *, struct mbuf *, caddr_t *, int);
23554e4ee71SNavdeep Parhar static inline void copy_to_txd(struct sge_eq *, caddr_t, caddr_t *, int);
2367951040fSNavdeep Parhar static inline void ring_eq_db(struct adapter *, struct sge_eq *, u_int);
2377951040fSNavdeep Parhar static inline uint16_t read_hw_cidx(struct sge_eq *);
2387951040fSNavdeep Parhar static inline u_int reclaimable_tx_desc(struct sge_eq *);
2397951040fSNavdeep Parhar static inline u_int total_available_tx_desc(struct sge_eq *);
2407951040fSNavdeep Parhar static u_int reclaim_tx_descs(struct sge_txq *, u_int);
2417951040fSNavdeep Parhar static void tx_reclaim(void *, int);
2427951040fSNavdeep Parhar static __be64 get_flit(struct sglist_seg *, int, int);
243733b9277SNavdeep Parhar static int handle_sge_egr_update(struct sge_iq *, const struct rss_header *,
244733b9277SNavdeep Parhar     struct mbuf *);
2451b4cc91fSNavdeep Parhar static int handle_fw_msg(struct sge_iq *, const struct rss_header *,
246733b9277SNavdeep Parhar     struct mbuf *);
2477951040fSNavdeep Parhar static void wrq_tx_drain(void *, int);
2487951040fSNavdeep Parhar static void drain_wrq_wr_list(struct adapter *, struct sge_wrq *);
24954e4ee71SNavdeep Parhar 
25056599263SNavdeep Parhar static int sysctl_uint16(SYSCTL_HANDLER_ARGS);
25138035ed6SNavdeep Parhar static int sysctl_bufsizes(SYSCTL_HANDLER_ARGS);
25202f972e8SNavdeep Parhar static int sysctl_tc(SYSCTL_HANDLER_ARGS);
253f7dfe243SNavdeep Parhar 
25482eff304SNavdeep Parhar static counter_u64_t extfree_refs;
25582eff304SNavdeep Parhar static counter_u64_t extfree_rels;
25682eff304SNavdeep Parhar 
257*671bf2b8SNavdeep Parhar an_handler_t t4_an_handler;
258*671bf2b8SNavdeep Parhar fw_msg_handler_t t4_fw_msg_handler[NUM_FW6_TYPES];
259*671bf2b8SNavdeep Parhar cpl_handler_t t4_cpl_handler[NUM_CPL_CMDS];
260*671bf2b8SNavdeep Parhar 
261*671bf2b8SNavdeep Parhar 
262*671bf2b8SNavdeep Parhar static int
263*671bf2b8SNavdeep Parhar an_not_handled(struct sge_iq *iq, const struct rsp_ctrl *ctrl)
264*671bf2b8SNavdeep Parhar {
265*671bf2b8SNavdeep Parhar 
266*671bf2b8SNavdeep Parhar #ifdef INVARIANTS
267*671bf2b8SNavdeep Parhar 	panic("%s: async notification on iq %p (ctrl %p)", __func__, iq, ctrl);
268*671bf2b8SNavdeep Parhar #else
269*671bf2b8SNavdeep Parhar 	log(LOG_ERR, "%s: async notification on iq %p (ctrl %p)\n",
270*671bf2b8SNavdeep Parhar 	    __func__, iq, ctrl);
271*671bf2b8SNavdeep Parhar #endif
272*671bf2b8SNavdeep Parhar 	return (EDOOFUS);
273*671bf2b8SNavdeep Parhar }
274*671bf2b8SNavdeep Parhar 
275*671bf2b8SNavdeep Parhar int
276*671bf2b8SNavdeep Parhar t4_register_an_handler(an_handler_t h)
277*671bf2b8SNavdeep Parhar {
278*671bf2b8SNavdeep Parhar 	uintptr_t *loc, new;
279*671bf2b8SNavdeep Parhar 
280*671bf2b8SNavdeep Parhar 	new = h ? (uintptr_t)h : (uintptr_t)an_not_handled;
281*671bf2b8SNavdeep Parhar 	loc = (uintptr_t *) &t4_an_handler;
282*671bf2b8SNavdeep Parhar 	atomic_store_rel_ptr(loc, new);
283*671bf2b8SNavdeep Parhar 
284*671bf2b8SNavdeep Parhar 	return (0);
285*671bf2b8SNavdeep Parhar }
286*671bf2b8SNavdeep Parhar 
287*671bf2b8SNavdeep Parhar static int
288*671bf2b8SNavdeep Parhar fw_msg_not_handled(struct adapter *sc, const __be64 *rpl)
289*671bf2b8SNavdeep Parhar {
290*671bf2b8SNavdeep Parhar 	const struct cpl_fw6_msg *cpl =
291*671bf2b8SNavdeep Parhar 	    __containerof(rpl, struct cpl_fw6_msg, data[0]);
292*671bf2b8SNavdeep Parhar 
293*671bf2b8SNavdeep Parhar #ifdef INVARIANTS
294*671bf2b8SNavdeep Parhar 	panic("%s: fw_msg type %d", __func__, cpl->type);
295*671bf2b8SNavdeep Parhar #else
296*671bf2b8SNavdeep Parhar 	log(LOG_ERR, "%s: fw_msg type %d\n", __func__, cpl->type);
297*671bf2b8SNavdeep Parhar #endif
298*671bf2b8SNavdeep Parhar 	return (EDOOFUS);
299*671bf2b8SNavdeep Parhar }
300*671bf2b8SNavdeep Parhar 
301*671bf2b8SNavdeep Parhar int
302*671bf2b8SNavdeep Parhar t4_register_fw_msg_handler(int type, fw_msg_handler_t h)
303*671bf2b8SNavdeep Parhar {
304*671bf2b8SNavdeep Parhar 	uintptr_t *loc, new;
305*671bf2b8SNavdeep Parhar 
306*671bf2b8SNavdeep Parhar 	if (type >= nitems(t4_fw_msg_handler))
307*671bf2b8SNavdeep Parhar 		return (EINVAL);
308*671bf2b8SNavdeep Parhar 
309*671bf2b8SNavdeep Parhar 	/*
310*671bf2b8SNavdeep Parhar 	 * These are dispatched by the handler for FW{4|6}_CPL_MSG using the CPL
311*671bf2b8SNavdeep Parhar 	 * handler dispatch table.  Reject any attempt to install a handler for
312*671bf2b8SNavdeep Parhar 	 * this subtype.
313*671bf2b8SNavdeep Parhar 	 */
314*671bf2b8SNavdeep Parhar 	if (type == FW_TYPE_RSSCPL || type == FW6_TYPE_RSSCPL)
315*671bf2b8SNavdeep Parhar 		return (EINVAL);
316*671bf2b8SNavdeep Parhar 
317*671bf2b8SNavdeep Parhar 	new = h ? (uintptr_t)h : (uintptr_t)fw_msg_not_handled;
318*671bf2b8SNavdeep Parhar 	loc = (uintptr_t *) &t4_fw_msg_handler[type];
319*671bf2b8SNavdeep Parhar 	atomic_store_rel_ptr(loc, new);
320*671bf2b8SNavdeep Parhar 
321*671bf2b8SNavdeep Parhar 	return (0);
322*671bf2b8SNavdeep Parhar }
323*671bf2b8SNavdeep Parhar 
324*671bf2b8SNavdeep Parhar static int
325*671bf2b8SNavdeep Parhar cpl_not_handled(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
326*671bf2b8SNavdeep Parhar {
327*671bf2b8SNavdeep Parhar 
328*671bf2b8SNavdeep Parhar #ifdef INVARIANTS
329*671bf2b8SNavdeep Parhar 	panic("%s: opcode 0x%02x on iq %p with payload %p",
330*671bf2b8SNavdeep Parhar 	    __func__, rss->opcode, iq, m);
331*671bf2b8SNavdeep Parhar #else
332*671bf2b8SNavdeep Parhar 	log(LOG_ERR, "%s: opcode 0x%02x on iq %p with payload %p\n",
333*671bf2b8SNavdeep Parhar 	    __func__, rss->opcode, iq, m);
334*671bf2b8SNavdeep Parhar 	m_freem(m);
335*671bf2b8SNavdeep Parhar #endif
336*671bf2b8SNavdeep Parhar 	return (EDOOFUS);
337*671bf2b8SNavdeep Parhar }
338*671bf2b8SNavdeep Parhar 
339*671bf2b8SNavdeep Parhar int
340*671bf2b8SNavdeep Parhar t4_register_cpl_handler(int opcode, cpl_handler_t h)
341*671bf2b8SNavdeep Parhar {
342*671bf2b8SNavdeep Parhar 	uintptr_t *loc, new;
343*671bf2b8SNavdeep Parhar 
344*671bf2b8SNavdeep Parhar 	if (opcode >= nitems(t4_cpl_handler))
345*671bf2b8SNavdeep Parhar 		return (EINVAL);
346*671bf2b8SNavdeep Parhar 
347*671bf2b8SNavdeep Parhar 	new = h ? (uintptr_t)h : (uintptr_t)cpl_not_handled;
348*671bf2b8SNavdeep Parhar 	loc = (uintptr_t *) &t4_cpl_handler[opcode];
349*671bf2b8SNavdeep Parhar 	atomic_store_rel_ptr(loc, new);
350*671bf2b8SNavdeep Parhar 
351*671bf2b8SNavdeep Parhar 	return (0);
352*671bf2b8SNavdeep Parhar }
353*671bf2b8SNavdeep Parhar 
35494586193SNavdeep Parhar /*
3551458bff9SNavdeep Parhar  * Called on MOD_LOAD.  Validates and calculates the SGE tunables.
35694586193SNavdeep Parhar  */
35794586193SNavdeep Parhar void
35894586193SNavdeep Parhar t4_sge_modload(void)
35994586193SNavdeep Parhar {
360*671bf2b8SNavdeep Parhar 	int i;
3614defc81bSNavdeep Parhar 
3629fb8886bSNavdeep Parhar 	if (fl_pktshift < 0 || fl_pktshift > 7) {
3639fb8886bSNavdeep Parhar 		printf("Invalid hw.cxgbe.fl_pktshift value (%d),"
3649fb8886bSNavdeep Parhar 		    " using 2 instead.\n", fl_pktshift);
3659fb8886bSNavdeep Parhar 		fl_pktshift = 2;
3669fb8886bSNavdeep Parhar 	}
3679fb8886bSNavdeep Parhar 
3689fb8886bSNavdeep Parhar 	if (spg_len != 64 && spg_len != 128) {
3699fb8886bSNavdeep Parhar 		int len;
3709fb8886bSNavdeep Parhar 
3719fb8886bSNavdeep Parhar #if defined(__i386__) || defined(__amd64__)
3729fb8886bSNavdeep Parhar 		len = cpu_clflush_line_size > 64 ? 128 : 64;
3739fb8886bSNavdeep Parhar #else
3749fb8886bSNavdeep Parhar 		len = 64;
3759fb8886bSNavdeep Parhar #endif
3769fb8886bSNavdeep Parhar 		if (spg_len != -1) {
3779fb8886bSNavdeep Parhar 			printf("Invalid hw.cxgbe.spg_len value (%d),"
3789fb8886bSNavdeep Parhar 			    " using %d instead.\n", spg_len, len);
3799fb8886bSNavdeep Parhar 		}
3809fb8886bSNavdeep Parhar 		spg_len = len;
3819fb8886bSNavdeep Parhar 	}
3829fb8886bSNavdeep Parhar 
3839fb8886bSNavdeep Parhar 	if (cong_drop < -1 || cong_drop > 1) {
3849fb8886bSNavdeep Parhar 		printf("Invalid hw.cxgbe.cong_drop value (%d),"
3859fb8886bSNavdeep Parhar 		    " using 0 instead.\n", cong_drop);
3869fb8886bSNavdeep Parhar 		cong_drop = 0;
3879fb8886bSNavdeep Parhar 	}
38882eff304SNavdeep Parhar 
38982eff304SNavdeep Parhar 	extfree_refs = counter_u64_alloc(M_WAITOK);
39082eff304SNavdeep Parhar 	extfree_rels = counter_u64_alloc(M_WAITOK);
39182eff304SNavdeep Parhar 	counter_u64_zero(extfree_refs);
39282eff304SNavdeep Parhar 	counter_u64_zero(extfree_rels);
393*671bf2b8SNavdeep Parhar 
394*671bf2b8SNavdeep Parhar 	t4_an_handler = an_not_handled;
395*671bf2b8SNavdeep Parhar 	for (i = 0; i < nitems(t4_fw_msg_handler); i++)
396*671bf2b8SNavdeep Parhar 		t4_fw_msg_handler[i] = fw_msg_not_handled;
397*671bf2b8SNavdeep Parhar 	for (i = 0; i < nitems(t4_cpl_handler); i++)
398*671bf2b8SNavdeep Parhar 		t4_cpl_handler[i] = cpl_not_handled;
399*671bf2b8SNavdeep Parhar 
400*671bf2b8SNavdeep Parhar 	t4_register_cpl_handler(CPL_FW4_MSG, handle_fw_msg);
401*671bf2b8SNavdeep Parhar 	t4_register_cpl_handler(CPL_FW6_MSG, handle_fw_msg);
402*671bf2b8SNavdeep Parhar 	t4_register_cpl_handler(CPL_SGE_EGR_UPDATE, handle_sge_egr_update);
403*671bf2b8SNavdeep Parhar 	t4_register_cpl_handler(CPL_RX_PKT, t4_eth_rx);
404*671bf2b8SNavdeep Parhar 	t4_register_fw_msg_handler(FW6_TYPE_CMD_RPL, t4_handle_fw_rpl);
40582eff304SNavdeep Parhar }
40682eff304SNavdeep Parhar 
40782eff304SNavdeep Parhar void
40882eff304SNavdeep Parhar t4_sge_modunload(void)
40982eff304SNavdeep Parhar {
41082eff304SNavdeep Parhar 
41182eff304SNavdeep Parhar 	counter_u64_free(extfree_refs);
41282eff304SNavdeep Parhar 	counter_u64_free(extfree_rels);
41382eff304SNavdeep Parhar }
41482eff304SNavdeep Parhar 
41582eff304SNavdeep Parhar uint64_t
41682eff304SNavdeep Parhar t4_sge_extfree_refs(void)
41782eff304SNavdeep Parhar {
41882eff304SNavdeep Parhar 	uint64_t refs, rels;
41982eff304SNavdeep Parhar 
42082eff304SNavdeep Parhar 	rels = counter_u64_fetch(extfree_rels);
42182eff304SNavdeep Parhar 	refs = counter_u64_fetch(extfree_refs);
42282eff304SNavdeep Parhar 
42382eff304SNavdeep Parhar 	return (refs - rels);
42494586193SNavdeep Parhar }
42594586193SNavdeep Parhar 
426e3207e19SNavdeep Parhar static inline void
427e3207e19SNavdeep Parhar setup_pad_and_pack_boundaries(struct adapter *sc)
428e3207e19SNavdeep Parhar {
429e3207e19SNavdeep Parhar 	uint32_t v, m;
430e3207e19SNavdeep Parhar 	int pad, pack;
431e3207e19SNavdeep Parhar 
432e3207e19SNavdeep Parhar 	pad = fl_pad;
433e3207e19SNavdeep Parhar 	if (fl_pad < 32 || fl_pad > 4096 || !powerof2(fl_pad)) {
434e3207e19SNavdeep Parhar 		/*
435e3207e19SNavdeep Parhar 		 * If there is any chance that we might use buffer packing and
436e3207e19SNavdeep Parhar 		 * the chip is a T4, then pick 64 as the pad/pack boundary.  Set
437e3207e19SNavdeep Parhar 		 * it to 32 in all other cases.
438e3207e19SNavdeep Parhar 		 */
439e3207e19SNavdeep Parhar 		pad = is_t4(sc) && buffer_packing ? 64 : 32;
440e3207e19SNavdeep Parhar 
441e3207e19SNavdeep Parhar 		/*
442e3207e19SNavdeep Parhar 		 * For fl_pad = 0 we'll still write a reasonable value to the
443e3207e19SNavdeep Parhar 		 * register but all the freelists will opt out of padding.
444e3207e19SNavdeep Parhar 		 * We'll complain here only if the user tried to set it to a
445e3207e19SNavdeep Parhar 		 * value greater than 0 that was invalid.
446e3207e19SNavdeep Parhar 		 */
447e3207e19SNavdeep Parhar 		if (fl_pad > 0) {
448e3207e19SNavdeep Parhar 			device_printf(sc->dev, "Invalid hw.cxgbe.fl_pad value"
449e3207e19SNavdeep Parhar 			    " (%d), using %d instead.\n", fl_pad, pad);
450e3207e19SNavdeep Parhar 		}
451e3207e19SNavdeep Parhar 	}
452e3207e19SNavdeep Parhar 	m = V_INGPADBOUNDARY(M_INGPADBOUNDARY);
453e3207e19SNavdeep Parhar 	v = V_INGPADBOUNDARY(ilog2(pad) - 5);
454e3207e19SNavdeep Parhar 	t4_set_reg_field(sc, A_SGE_CONTROL, m, v);
455e3207e19SNavdeep Parhar 
456e3207e19SNavdeep Parhar 	if (is_t4(sc)) {
457e3207e19SNavdeep Parhar 		if (fl_pack != -1 && fl_pack != pad) {
458e3207e19SNavdeep Parhar 			/* Complain but carry on. */
459e3207e19SNavdeep Parhar 			device_printf(sc->dev, "hw.cxgbe.fl_pack (%d) ignored,"
460e3207e19SNavdeep Parhar 			    " using %d instead.\n", fl_pack, pad);
461e3207e19SNavdeep Parhar 		}
462e3207e19SNavdeep Parhar 		return;
463e3207e19SNavdeep Parhar 	}
464e3207e19SNavdeep Parhar 
465e3207e19SNavdeep Parhar 	pack = fl_pack;
466e3207e19SNavdeep Parhar 	if (fl_pack < 16 || fl_pack == 32 || fl_pack > 4096 ||
467e3207e19SNavdeep Parhar 	    !powerof2(fl_pack)) {
468e3207e19SNavdeep Parhar 		pack = max(sc->params.pci.mps, CACHE_LINE_SIZE);
469e3207e19SNavdeep Parhar 		MPASS(powerof2(pack));
470e3207e19SNavdeep Parhar 		if (pack < 16)
471e3207e19SNavdeep Parhar 			pack = 16;
472e3207e19SNavdeep Parhar 		if (pack == 32)
473e3207e19SNavdeep Parhar 			pack = 64;
474e3207e19SNavdeep Parhar 		if (pack > 4096)
475e3207e19SNavdeep Parhar 			pack = 4096;
476e3207e19SNavdeep Parhar 		if (fl_pack != -1) {
477e3207e19SNavdeep Parhar 			device_printf(sc->dev, "Invalid hw.cxgbe.fl_pack value"
478e3207e19SNavdeep Parhar 			    " (%d), using %d instead.\n", fl_pack, pack);
479e3207e19SNavdeep Parhar 		}
480e3207e19SNavdeep Parhar 	}
481e3207e19SNavdeep Parhar 	m = V_INGPACKBOUNDARY(M_INGPACKBOUNDARY);
482e3207e19SNavdeep Parhar 	if (pack == 16)
483e3207e19SNavdeep Parhar 		v = V_INGPACKBOUNDARY(0);
484e3207e19SNavdeep Parhar 	else
485e3207e19SNavdeep Parhar 		v = V_INGPACKBOUNDARY(ilog2(pack) - 5);
486e3207e19SNavdeep Parhar 
487e3207e19SNavdeep Parhar 	MPASS(!is_t4(sc));	/* T4 doesn't have SGE_CONTROL2 */
488e3207e19SNavdeep Parhar 	t4_set_reg_field(sc, A_SGE_CONTROL2, m, v);
489e3207e19SNavdeep Parhar }
490e3207e19SNavdeep Parhar 
491cf738022SNavdeep Parhar /*
492cf738022SNavdeep Parhar  * adap->params.vpd.cclk must be set up before this is called.
493cf738022SNavdeep Parhar  */
494d14b0ac1SNavdeep Parhar void
495d14b0ac1SNavdeep Parhar t4_tweak_chip_settings(struct adapter *sc)
496d14b0ac1SNavdeep Parhar {
497d14b0ac1SNavdeep Parhar 	int i;
498d14b0ac1SNavdeep Parhar 	uint32_t v, m;
499d14b0ac1SNavdeep Parhar 	int intr_timer[SGE_NTIMERS] = {1, 5, 10, 50, 100, 200};
500cf738022SNavdeep Parhar 	int timer_max = M_TIMERVALUE0 * 1000 / sc->params.vpd.cclk;
501d14b0ac1SNavdeep Parhar 	int intr_pktcount[SGE_NCOUNTERS] = {1, 8, 16, 32}; /* 63 max */
502d14b0ac1SNavdeep Parhar 	uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
50338035ed6SNavdeep Parhar 	static int sge_flbuf_sizes[] = {
5041458bff9SNavdeep Parhar 		MCLBYTES,
5051458bff9SNavdeep Parhar #if MJUMPAGESIZE != MCLBYTES
5061458bff9SNavdeep Parhar 		MJUMPAGESIZE,
50738035ed6SNavdeep Parhar 		MJUMPAGESIZE - CL_METADATA_SIZE,
50838035ed6SNavdeep Parhar 		MJUMPAGESIZE - 2 * MSIZE - CL_METADATA_SIZE,
5091458bff9SNavdeep Parhar #endif
5101458bff9SNavdeep Parhar 		MJUM9BYTES,
5111458bff9SNavdeep Parhar 		MJUM16BYTES,
51238035ed6SNavdeep Parhar 		MCLBYTES - MSIZE - CL_METADATA_SIZE,
51338035ed6SNavdeep Parhar 		MJUM9BYTES - CL_METADATA_SIZE,
51438035ed6SNavdeep Parhar 		MJUM16BYTES - CL_METADATA_SIZE,
5151458bff9SNavdeep Parhar 	};
516d14b0ac1SNavdeep Parhar 
517d14b0ac1SNavdeep Parhar 	KASSERT(sc->flags & MASTER_PF,
518d14b0ac1SNavdeep Parhar 	    ("%s: trying to change chip settings when not master.", __func__));
519d14b0ac1SNavdeep Parhar 
5201458bff9SNavdeep Parhar 	m = V_PKTSHIFT(M_PKTSHIFT) | F_RXPKTCPLMODE | F_EGRSTATUSPAGESIZE;
521d14b0ac1SNavdeep Parhar 	v = V_PKTSHIFT(fl_pktshift) | F_RXPKTCPLMODE |
5224defc81bSNavdeep Parhar 	    V_EGRSTATUSPAGESIZE(spg_len == 128);
523d14b0ac1SNavdeep Parhar 	t4_set_reg_field(sc, A_SGE_CONTROL, m, v);
52454e4ee71SNavdeep Parhar 
525e3207e19SNavdeep Parhar 	setup_pad_and_pack_boundaries(sc);
5261458bff9SNavdeep Parhar 
527d14b0ac1SNavdeep Parhar 	v = V_HOSTPAGESIZEPF0(PAGE_SHIFT - 10) |
528733b9277SNavdeep Parhar 	    V_HOSTPAGESIZEPF1(PAGE_SHIFT - 10) |
529733b9277SNavdeep Parhar 	    V_HOSTPAGESIZEPF2(PAGE_SHIFT - 10) |
530733b9277SNavdeep Parhar 	    V_HOSTPAGESIZEPF3(PAGE_SHIFT - 10) |
531733b9277SNavdeep Parhar 	    V_HOSTPAGESIZEPF4(PAGE_SHIFT - 10) |
532733b9277SNavdeep Parhar 	    V_HOSTPAGESIZEPF5(PAGE_SHIFT - 10) |
533733b9277SNavdeep Parhar 	    V_HOSTPAGESIZEPF6(PAGE_SHIFT - 10) |
534733b9277SNavdeep Parhar 	    V_HOSTPAGESIZEPF7(PAGE_SHIFT - 10);
535d14b0ac1SNavdeep Parhar 	t4_write_reg(sc, A_SGE_HOST_PAGE_SIZE, v);
536733b9277SNavdeep Parhar 
53738035ed6SNavdeep Parhar 	KASSERT(nitems(sge_flbuf_sizes) <= SGE_FLBUF_SIZES,
53838035ed6SNavdeep Parhar 	    ("%s: hw buffer size table too big", __func__));
53938035ed6SNavdeep Parhar 	for (i = 0; i < min(nitems(sge_flbuf_sizes), SGE_FLBUF_SIZES); i++) {
54054e4ee71SNavdeep Parhar 		t4_write_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i),
54138035ed6SNavdeep Parhar 		    sge_flbuf_sizes[i]);
54254e4ee71SNavdeep Parhar 	}
54354e4ee71SNavdeep Parhar 
544d14b0ac1SNavdeep Parhar 	v = V_THRESHOLD_0(intr_pktcount[0]) | V_THRESHOLD_1(intr_pktcount[1]) |
545d14b0ac1SNavdeep Parhar 	    V_THRESHOLD_2(intr_pktcount[2]) | V_THRESHOLD_3(intr_pktcount[3]);
546d14b0ac1SNavdeep Parhar 	t4_write_reg(sc, A_SGE_INGRESS_RX_THRESHOLD, v);
54754e4ee71SNavdeep Parhar 
548cf738022SNavdeep Parhar 	KASSERT(intr_timer[0] <= timer_max,
549cf738022SNavdeep Parhar 	    ("%s: not a single usable timer (%d, %d)", __func__, intr_timer[0],
550cf738022SNavdeep Parhar 	    timer_max));
551cf738022SNavdeep Parhar 	for (i = 1; i < nitems(intr_timer); i++) {
552cf738022SNavdeep Parhar 		KASSERT(intr_timer[i] >= intr_timer[i - 1],
553cf738022SNavdeep Parhar 		    ("%s: timers not listed in increasing order (%d)",
554cf738022SNavdeep Parhar 		    __func__, i));
555cf738022SNavdeep Parhar 
556cf738022SNavdeep Parhar 		while (intr_timer[i] > timer_max) {
557cf738022SNavdeep Parhar 			if (i == nitems(intr_timer) - 1) {
558cf738022SNavdeep Parhar 				intr_timer[i] = timer_max;
559cf738022SNavdeep Parhar 				break;
560cf738022SNavdeep Parhar 			}
561cf738022SNavdeep Parhar 			intr_timer[i] += intr_timer[i - 1];
562cf738022SNavdeep Parhar 			intr_timer[i] /= 2;
563cf738022SNavdeep Parhar 		}
564cf738022SNavdeep Parhar 	}
565cf738022SNavdeep Parhar 
566d14b0ac1SNavdeep Parhar 	v = V_TIMERVALUE0(us_to_core_ticks(sc, intr_timer[0])) |
567d14b0ac1SNavdeep Parhar 	    V_TIMERVALUE1(us_to_core_ticks(sc, intr_timer[1]));
568d14b0ac1SNavdeep Parhar 	t4_write_reg(sc, A_SGE_TIMER_VALUE_0_AND_1, v);
569d14b0ac1SNavdeep Parhar 	v = V_TIMERVALUE2(us_to_core_ticks(sc, intr_timer[2])) |
570d14b0ac1SNavdeep Parhar 	    V_TIMERVALUE3(us_to_core_ticks(sc, intr_timer[3]));
571d14b0ac1SNavdeep Parhar 	t4_write_reg(sc, A_SGE_TIMER_VALUE_2_AND_3, v);
572d14b0ac1SNavdeep Parhar 	v = V_TIMERVALUE4(us_to_core_ticks(sc, intr_timer[4])) |
573d14b0ac1SNavdeep Parhar 	    V_TIMERVALUE5(us_to_core_ticks(sc, intr_timer[5]));
574d14b0ac1SNavdeep Parhar 	t4_write_reg(sc, A_SGE_TIMER_VALUE_4_AND_5, v);
57586e02bf2SNavdeep Parhar 
576d14b0ac1SNavdeep Parhar 	/* 4K, 16K, 64K, 256K DDP "page sizes" */
577d14b0ac1SNavdeep Parhar 	v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6);
578d14b0ac1SNavdeep Parhar 	t4_write_reg(sc, A_ULP_RX_TDDP_PSZ, v);
579d14b0ac1SNavdeep Parhar 
580d14b0ac1SNavdeep Parhar 	m = v = F_TDDPTAGTCB;
581d14b0ac1SNavdeep Parhar 	t4_set_reg_field(sc, A_ULP_RX_CTL, m, v);
582d14b0ac1SNavdeep Parhar 
583d14b0ac1SNavdeep Parhar 	m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET |
584d14b0ac1SNavdeep Parhar 	    F_RESETDDPOFFSET;
585d14b0ac1SNavdeep Parhar 	v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET;
586d14b0ac1SNavdeep Parhar 	t4_set_reg_field(sc, A_TP_PARA_REG5, m, v);
587d14b0ac1SNavdeep Parhar }
588d14b0ac1SNavdeep Parhar 
589d14b0ac1SNavdeep Parhar /*
590e3207e19SNavdeep Parhar  * SGE wants the buffer to be at least 64B and then a multiple of 16.  If
591b741402cSNavdeep Parhar  * padding is is use the buffer's start and end need to be aligned to the pad
592b741402cSNavdeep Parhar  * boundary as well.  We'll just make sure that the size is a multiple of the
593b741402cSNavdeep Parhar  * boundary here, it is up to the buffer allocation code to make sure the start
594b741402cSNavdeep Parhar  * of the buffer is aligned as well.
59538035ed6SNavdeep Parhar  */
59638035ed6SNavdeep Parhar static inline int
597e3207e19SNavdeep Parhar hwsz_ok(struct adapter *sc, int hwsz)
59838035ed6SNavdeep Parhar {
59990e7434aSNavdeep Parhar 	int mask = fl_pad ? sc->params.sge.pad_boundary - 1 : 16 - 1;
60038035ed6SNavdeep Parhar 
601b741402cSNavdeep Parhar 	return (hwsz >= 64 && (hwsz & mask) == 0);
60238035ed6SNavdeep Parhar }
60338035ed6SNavdeep Parhar 
60438035ed6SNavdeep Parhar /*
605d14b0ac1SNavdeep Parhar  * XXX: driver really should be able to deal with unexpected settings.
606d14b0ac1SNavdeep Parhar  */
607d14b0ac1SNavdeep Parhar int
608d14b0ac1SNavdeep Parhar t4_read_chip_settings(struct adapter *sc)
609d14b0ac1SNavdeep Parhar {
610d14b0ac1SNavdeep Parhar 	struct sge *s = &sc->sge;
61190e7434aSNavdeep Parhar 	struct sge_params *sp = &sc->params.sge;
6121458bff9SNavdeep Parhar 	int i, j, n, rc = 0;
613d14b0ac1SNavdeep Parhar 	uint32_t m, v, r;
614d14b0ac1SNavdeep Parhar 	uint16_t indsz = min(RX_COPY_THRESHOLD - 1, M_INDICATESIZE);
61538035ed6SNavdeep Parhar 	static int sw_buf_sizes[] = {	/* Sorted by size */
6161458bff9SNavdeep Parhar 		MCLBYTES,
6171458bff9SNavdeep Parhar #if MJUMPAGESIZE != MCLBYTES
6181458bff9SNavdeep Parhar 		MJUMPAGESIZE,
6191458bff9SNavdeep Parhar #endif
6201458bff9SNavdeep Parhar 		MJUM9BYTES,
6211458bff9SNavdeep Parhar 		MJUM16BYTES
6221458bff9SNavdeep Parhar 	};
62338035ed6SNavdeep Parhar 	struct sw_zone_info *swz, *safe_swz;
62438035ed6SNavdeep Parhar 	struct hw_buf_info *hwb;
625d14b0ac1SNavdeep Parhar 
62690e7434aSNavdeep Parhar 	t4_init_sge_params(sc);
62790e7434aSNavdeep Parhar 
62890e7434aSNavdeep Parhar 	m = F_RXPKTCPLMODE;
62990e7434aSNavdeep Parhar 	v = F_RXPKTCPLMODE;
630d14b0ac1SNavdeep Parhar 	r = t4_read_reg(sc, A_SGE_CONTROL);
631d14b0ac1SNavdeep Parhar 	if ((r & m) != v) {
632d14b0ac1SNavdeep Parhar 		device_printf(sc->dev, "invalid SGE_CONTROL(0x%x)\n", r);
633733b9277SNavdeep Parhar 		rc = EINVAL;
634733b9277SNavdeep Parhar 	}
635733b9277SNavdeep Parhar 
63690e7434aSNavdeep Parhar 	/*
63790e7434aSNavdeep Parhar 	 * If this changes then every single use of PAGE_SHIFT in the driver
63890e7434aSNavdeep Parhar 	 * needs to be carefully reviewed for PAGE_SHIFT vs sp->page_shift.
63990e7434aSNavdeep Parhar 	 */
64090e7434aSNavdeep Parhar 	if (sp->page_shift != PAGE_SHIFT) {
641d14b0ac1SNavdeep Parhar 		device_printf(sc->dev, "invalid SGE_HOST_PAGE_SIZE(0x%x)\n", r);
642733b9277SNavdeep Parhar 		rc = EINVAL;
643733b9277SNavdeep Parhar 	}
644733b9277SNavdeep Parhar 
64538035ed6SNavdeep Parhar 	/* Filter out unusable hw buffer sizes entirely (mark with -2). */
64638035ed6SNavdeep Parhar 	hwb = &s->hw_buf_info[0];
64738035ed6SNavdeep Parhar 	for (i = 0; i < nitems(s->hw_buf_info); i++, hwb++) {
6481458bff9SNavdeep Parhar 		r = t4_read_reg(sc, A_SGE_FL_BUFFER_SIZE0 + (4 * i));
64938035ed6SNavdeep Parhar 		hwb->size = r;
650e3207e19SNavdeep Parhar 		hwb->zidx = hwsz_ok(sc, r) ? -1 : -2;
65138035ed6SNavdeep Parhar 		hwb->next = -1;
6521458bff9SNavdeep Parhar 	}
65338035ed6SNavdeep Parhar 
65438035ed6SNavdeep Parhar 	/*
65538035ed6SNavdeep Parhar 	 * Create a sorted list in decreasing order of hw buffer sizes (and so
65638035ed6SNavdeep Parhar 	 * increasing order of spare area) for each software zone.
657e3207e19SNavdeep Parhar 	 *
658e3207e19SNavdeep Parhar 	 * If padding is enabled then the start and end of the buffer must align
659e3207e19SNavdeep Parhar 	 * to the pad boundary; if packing is enabled then they must align with
660e3207e19SNavdeep Parhar 	 * the pack boundary as well.  Allocations from the cluster zones are
661e3207e19SNavdeep Parhar 	 * aligned to min(size, 4K), so the buffer starts at that alignment and
662e3207e19SNavdeep Parhar 	 * ends at hwb->size alignment.  If mbuf inlining is allowed the
663e3207e19SNavdeep Parhar 	 * starting alignment will be reduced to MSIZE and the driver will
664e3207e19SNavdeep Parhar 	 * exercise appropriate caution when deciding on the best buffer layout
665e3207e19SNavdeep Parhar 	 * to use.
66638035ed6SNavdeep Parhar 	 */
66738035ed6SNavdeep Parhar 	n = 0;	/* no usable buffer size to begin with */
66838035ed6SNavdeep Parhar 	swz = &s->sw_zone_info[0];
66938035ed6SNavdeep Parhar 	safe_swz = NULL;
67038035ed6SNavdeep Parhar 	for (i = 0; i < SW_ZONE_SIZES; i++, swz++) {
67138035ed6SNavdeep Parhar 		int8_t head = -1, tail = -1;
67238035ed6SNavdeep Parhar 
67338035ed6SNavdeep Parhar 		swz->size = sw_buf_sizes[i];
67438035ed6SNavdeep Parhar 		swz->zone = m_getzone(swz->size);
67538035ed6SNavdeep Parhar 		swz->type = m_gettype(swz->size);
67638035ed6SNavdeep Parhar 
677e3207e19SNavdeep Parhar 		if (swz->size < PAGE_SIZE) {
678e3207e19SNavdeep Parhar 			MPASS(powerof2(swz->size));
67990e7434aSNavdeep Parhar 			if (fl_pad && (swz->size % sp->pad_boundary != 0))
680e3207e19SNavdeep Parhar 				continue;
681e3207e19SNavdeep Parhar 		}
682e3207e19SNavdeep Parhar 
68338035ed6SNavdeep Parhar 		if (swz->size == safest_rx_cluster)
68438035ed6SNavdeep Parhar 			safe_swz = swz;
68538035ed6SNavdeep Parhar 
68638035ed6SNavdeep Parhar 		hwb = &s->hw_buf_info[0];
68738035ed6SNavdeep Parhar 		for (j = 0; j < SGE_FLBUF_SIZES; j++, hwb++) {
68838035ed6SNavdeep Parhar 			if (hwb->zidx != -1 || hwb->size > swz->size)
6891458bff9SNavdeep Parhar 				continue;
690e3207e19SNavdeep Parhar #ifdef INVARIANTS
691e3207e19SNavdeep Parhar 			if (fl_pad)
69290e7434aSNavdeep Parhar 				MPASS(hwb->size % sp->pad_boundary == 0);
693e3207e19SNavdeep Parhar #endif
69438035ed6SNavdeep Parhar 			hwb->zidx = i;
69538035ed6SNavdeep Parhar 			if (head == -1)
69638035ed6SNavdeep Parhar 				head = tail = j;
69738035ed6SNavdeep Parhar 			else if (hwb->size < s->hw_buf_info[tail].size) {
69838035ed6SNavdeep Parhar 				s->hw_buf_info[tail].next = j;
69938035ed6SNavdeep Parhar 				tail = j;
70038035ed6SNavdeep Parhar 			} else {
70138035ed6SNavdeep Parhar 				int8_t *cur;
70238035ed6SNavdeep Parhar 				struct hw_buf_info *t;
70338035ed6SNavdeep Parhar 
70438035ed6SNavdeep Parhar 				for (cur = &head; *cur != -1; cur = &t->next) {
70538035ed6SNavdeep Parhar 					t = &s->hw_buf_info[*cur];
70638035ed6SNavdeep Parhar 					if (hwb->size == t->size) {
70738035ed6SNavdeep Parhar 						hwb->zidx = -2;
7081458bff9SNavdeep Parhar 						break;
7091458bff9SNavdeep Parhar 					}
71038035ed6SNavdeep Parhar 					if (hwb->size > t->size) {
71138035ed6SNavdeep Parhar 						hwb->next = *cur;
71238035ed6SNavdeep Parhar 						*cur = j;
71338035ed6SNavdeep Parhar 						break;
71438035ed6SNavdeep Parhar 					}
71538035ed6SNavdeep Parhar 				}
71638035ed6SNavdeep Parhar 			}
71738035ed6SNavdeep Parhar 		}
71838035ed6SNavdeep Parhar 		swz->head_hwidx = head;
71938035ed6SNavdeep Parhar 		swz->tail_hwidx = tail;
72038035ed6SNavdeep Parhar 
72138035ed6SNavdeep Parhar 		if (tail != -1) {
72238035ed6SNavdeep Parhar 			n++;
72338035ed6SNavdeep Parhar 			if (swz->size - s->hw_buf_info[tail].size >=
72438035ed6SNavdeep Parhar 			    CL_METADATA_SIZE)
72538035ed6SNavdeep Parhar 				sc->flags |= BUF_PACKING_OK;
72638035ed6SNavdeep Parhar 		}
7271458bff9SNavdeep Parhar 	}
7281458bff9SNavdeep Parhar 	if (n == 0) {
7291458bff9SNavdeep Parhar 		device_printf(sc->dev, "no usable SGE FL buffer size.\n");
7301458bff9SNavdeep Parhar 		rc = EINVAL;
731733b9277SNavdeep Parhar 	}
73238035ed6SNavdeep Parhar 
73338035ed6SNavdeep Parhar 	s->safe_hwidx1 = -1;
73438035ed6SNavdeep Parhar 	s->safe_hwidx2 = -1;
73538035ed6SNavdeep Parhar 	if (safe_swz != NULL) {
73638035ed6SNavdeep Parhar 		s->safe_hwidx1 = safe_swz->head_hwidx;
73738035ed6SNavdeep Parhar 		for (i = safe_swz->head_hwidx; i != -1; i = hwb->next) {
73838035ed6SNavdeep Parhar 			int spare;
73938035ed6SNavdeep Parhar 
74038035ed6SNavdeep Parhar 			hwb = &s->hw_buf_info[i];
741e3207e19SNavdeep Parhar #ifdef INVARIANTS
742e3207e19SNavdeep Parhar 			if (fl_pad)
74390e7434aSNavdeep Parhar 				MPASS(hwb->size % sp->pad_boundary == 0);
744e3207e19SNavdeep Parhar #endif
74538035ed6SNavdeep Parhar 			spare = safe_swz->size - hwb->size;
746e3207e19SNavdeep Parhar 			if (spare >= CL_METADATA_SIZE) {
74738035ed6SNavdeep Parhar 				s->safe_hwidx2 = i;
74838035ed6SNavdeep Parhar 				break;
74938035ed6SNavdeep Parhar 			}
75038035ed6SNavdeep Parhar 		}
751e3207e19SNavdeep Parhar 	}
752733b9277SNavdeep Parhar 
753d14b0ac1SNavdeep Parhar 	v = V_HPZ0(0) | V_HPZ1(2) | V_HPZ2(4) | V_HPZ3(6);
754d14b0ac1SNavdeep Parhar 	r = t4_read_reg(sc, A_ULP_RX_TDDP_PSZ);
755d14b0ac1SNavdeep Parhar 	if (r != v) {
756d14b0ac1SNavdeep Parhar 		device_printf(sc->dev, "invalid ULP_RX_TDDP_PSZ(0x%x)\n", r);
757d14b0ac1SNavdeep Parhar 		rc = EINVAL;
758d14b0ac1SNavdeep Parhar 	}
759733b9277SNavdeep Parhar 
760d14b0ac1SNavdeep Parhar 	m = v = F_TDDPTAGTCB;
761d14b0ac1SNavdeep Parhar 	r = t4_read_reg(sc, A_ULP_RX_CTL);
762d14b0ac1SNavdeep Parhar 	if ((r & m) != v) {
763d14b0ac1SNavdeep Parhar 		device_printf(sc->dev, "invalid ULP_RX_CTL(0x%x)\n", r);
764d14b0ac1SNavdeep Parhar 		rc = EINVAL;
765d14b0ac1SNavdeep Parhar 	}
766d14b0ac1SNavdeep Parhar 
767d14b0ac1SNavdeep Parhar 	m = V_INDICATESIZE(M_INDICATESIZE) | F_REARMDDPOFFSET |
768d14b0ac1SNavdeep Parhar 	    F_RESETDDPOFFSET;
769d14b0ac1SNavdeep Parhar 	v = V_INDICATESIZE(indsz) | F_REARMDDPOFFSET | F_RESETDDPOFFSET;
770d14b0ac1SNavdeep Parhar 	r = t4_read_reg(sc, A_TP_PARA_REG5);
771d14b0ac1SNavdeep Parhar 	if ((r & m) != v) {
772d14b0ac1SNavdeep Parhar 		device_printf(sc->dev, "invalid TP_PARA_REG5(0x%x)\n", r);
773d14b0ac1SNavdeep Parhar 		rc = EINVAL;
774d14b0ac1SNavdeep Parhar 	}
775d14b0ac1SNavdeep Parhar 
776c337fa30SNavdeep Parhar 	t4_init_tp_params(sc);
777d14b0ac1SNavdeep Parhar 
778d14b0ac1SNavdeep Parhar 	t4_read_mtu_tbl(sc, sc->params.mtus, NULL);
779d14b0ac1SNavdeep Parhar 	t4_load_mtus(sc, sc->params.mtus, sc->params.a_wnd, sc->params.b_wnd);
780d14b0ac1SNavdeep Parhar 
781733b9277SNavdeep Parhar 	return (rc);
78254e4ee71SNavdeep Parhar }
78354e4ee71SNavdeep Parhar 
78454e4ee71SNavdeep Parhar int
78554e4ee71SNavdeep Parhar t4_create_dma_tag(struct adapter *sc)
78654e4ee71SNavdeep Parhar {
78754e4ee71SNavdeep Parhar 	int rc;
78854e4ee71SNavdeep Parhar 
78954e4ee71SNavdeep Parhar 	rc = bus_dma_tag_create(bus_get_dma_tag(sc->dev), 1, 0,
79054e4ee71SNavdeep Parhar 	    BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, NULL, BUS_SPACE_MAXSIZE,
79154e4ee71SNavdeep Parhar 	    BUS_SPACE_UNRESTRICTED, BUS_SPACE_MAXSIZE, BUS_DMA_ALLOCNOW, NULL,
79254e4ee71SNavdeep Parhar 	    NULL, &sc->dmat);
79354e4ee71SNavdeep Parhar 	if (rc != 0) {
79454e4ee71SNavdeep Parhar 		device_printf(sc->dev,
79554e4ee71SNavdeep Parhar 		    "failed to create main DMA tag: %d\n", rc);
79654e4ee71SNavdeep Parhar 	}
79754e4ee71SNavdeep Parhar 
79854e4ee71SNavdeep Parhar 	return (rc);
79954e4ee71SNavdeep Parhar }
80054e4ee71SNavdeep Parhar 
8016e22f9f3SNavdeep Parhar void
8026e22f9f3SNavdeep Parhar t4_sge_sysctls(struct adapter *sc, struct sysctl_ctx_list *ctx,
8036e22f9f3SNavdeep Parhar     struct sysctl_oid_list *children)
8046e22f9f3SNavdeep Parhar {
80590e7434aSNavdeep Parhar 	struct sge_params *sp = &sc->params.sge;
8066e22f9f3SNavdeep Parhar 
80738035ed6SNavdeep Parhar 	SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "buffer_sizes",
80838035ed6SNavdeep Parhar 	    CTLTYPE_STRING | CTLFLAG_RD, &sc->sge, 0, sysctl_bufsizes, "A",
80938035ed6SNavdeep Parhar 	    "freelist buffer sizes");
81038035ed6SNavdeep Parhar 
8116e22f9f3SNavdeep Parhar 	SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pktshift", CTLFLAG_RD,
81290e7434aSNavdeep Parhar 	    NULL, sp->fl_pktshift, "payload DMA offset in rx buffer (bytes)");
8136e22f9f3SNavdeep Parhar 
8146e22f9f3SNavdeep Parhar 	SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pad", CTLFLAG_RD,
81590e7434aSNavdeep Parhar 	    NULL, sp->pad_boundary, "payload pad boundary (bytes)");
8166e22f9f3SNavdeep Parhar 
8176e22f9f3SNavdeep Parhar 	SYSCTL_ADD_INT(ctx, children, OID_AUTO, "spg_len", CTLFLAG_RD,
81890e7434aSNavdeep Parhar 	    NULL, sp->spg_len, "status page size (bytes)");
8196e22f9f3SNavdeep Parhar 
8206e22f9f3SNavdeep Parhar 	SYSCTL_ADD_INT(ctx, children, OID_AUTO, "cong_drop", CTLFLAG_RD,
8216e22f9f3SNavdeep Parhar 	    NULL, cong_drop, "congestion drop setting");
8221458bff9SNavdeep Parhar 
8231458bff9SNavdeep Parhar 	SYSCTL_ADD_INT(ctx, children, OID_AUTO, "fl_pack", CTLFLAG_RD,
82490e7434aSNavdeep Parhar 	    NULL, sp->pack_boundary, "payload pack boundary (bytes)");
8256e22f9f3SNavdeep Parhar }
8266e22f9f3SNavdeep Parhar 
82754e4ee71SNavdeep Parhar int
82854e4ee71SNavdeep Parhar t4_destroy_dma_tag(struct adapter *sc)
82954e4ee71SNavdeep Parhar {
83054e4ee71SNavdeep Parhar 	if (sc->dmat)
83154e4ee71SNavdeep Parhar 		bus_dma_tag_destroy(sc->dmat);
83254e4ee71SNavdeep Parhar 
83354e4ee71SNavdeep Parhar 	return (0);
83454e4ee71SNavdeep Parhar }
83554e4ee71SNavdeep Parhar 
83654e4ee71SNavdeep Parhar /*
837733b9277SNavdeep Parhar  * Allocate and initialize the firmware event queue and the management queue.
83854e4ee71SNavdeep Parhar  *
83954e4ee71SNavdeep Parhar  * Returns errno on failure.  Resources allocated up to that point may still be
84054e4ee71SNavdeep Parhar  * allocated.  Caller is responsible for cleanup in case this function fails.
84154e4ee71SNavdeep Parhar  */
84254e4ee71SNavdeep Parhar int
843f7dfe243SNavdeep Parhar t4_setup_adapter_queues(struct adapter *sc)
84454e4ee71SNavdeep Parhar {
845733b9277SNavdeep Parhar 	int rc;
84654e4ee71SNavdeep Parhar 
84754e4ee71SNavdeep Parhar 	ADAPTER_LOCK_ASSERT_NOTOWNED(sc);
84854e4ee71SNavdeep Parhar 
849733b9277SNavdeep Parhar 	sysctl_ctx_init(&sc->ctx);
850733b9277SNavdeep Parhar 	sc->flags |= ADAP_SYSCTL_CTX;
85154e4ee71SNavdeep Parhar 
85256599263SNavdeep Parhar 	/*
85356599263SNavdeep Parhar 	 * Firmware event queue
85456599263SNavdeep Parhar 	 */
855733b9277SNavdeep Parhar 	rc = alloc_fwq(sc);
856aa95b653SNavdeep Parhar 	if (rc != 0)
857f7dfe243SNavdeep Parhar 		return (rc);
858f7dfe243SNavdeep Parhar 
859f7dfe243SNavdeep Parhar 	/*
860733b9277SNavdeep Parhar 	 * Management queue.  This is just a control queue that uses the fwq as
861733b9277SNavdeep Parhar 	 * its associated iq.
862f7dfe243SNavdeep Parhar 	 */
863733b9277SNavdeep Parhar 	rc = alloc_mgmtq(sc);
86454e4ee71SNavdeep Parhar 
86554e4ee71SNavdeep Parhar 	return (rc);
86654e4ee71SNavdeep Parhar }
86754e4ee71SNavdeep Parhar 
86854e4ee71SNavdeep Parhar /*
86954e4ee71SNavdeep Parhar  * Idempotent
87054e4ee71SNavdeep Parhar  */
87154e4ee71SNavdeep Parhar int
872f7dfe243SNavdeep Parhar t4_teardown_adapter_queues(struct adapter *sc)
87354e4ee71SNavdeep Parhar {
87454e4ee71SNavdeep Parhar 
87554e4ee71SNavdeep Parhar 	ADAPTER_LOCK_ASSERT_NOTOWNED(sc);
87654e4ee71SNavdeep Parhar 
877733b9277SNavdeep Parhar 	/* Do this before freeing the queue */
878733b9277SNavdeep Parhar 	if (sc->flags & ADAP_SYSCTL_CTX) {
879f7dfe243SNavdeep Parhar 		sysctl_ctx_free(&sc->ctx);
880733b9277SNavdeep Parhar 		sc->flags &= ~ADAP_SYSCTL_CTX;
881f7dfe243SNavdeep Parhar 	}
882f7dfe243SNavdeep Parhar 
883733b9277SNavdeep Parhar 	free_mgmtq(sc);
884733b9277SNavdeep Parhar 	free_fwq(sc);
88554e4ee71SNavdeep Parhar 
88654e4ee71SNavdeep Parhar 	return (0);
88754e4ee71SNavdeep Parhar }
88854e4ee71SNavdeep Parhar 
889733b9277SNavdeep Parhar static inline int
890fe2ebb76SJohn Baldwin first_vector(struct vi_info *vi)
891298d969cSNavdeep Parhar {
892fe2ebb76SJohn Baldwin 	struct adapter *sc = vi->pi->adapter;
89354e4ee71SNavdeep Parhar 
894733b9277SNavdeep Parhar 	if (sc->intr_count == 1)
895733b9277SNavdeep Parhar 		return (0);
89654e4ee71SNavdeep Parhar 
897fe2ebb76SJohn Baldwin 	return (vi->first_intr);
898733b9277SNavdeep Parhar }
899733b9277SNavdeep Parhar 
900733b9277SNavdeep Parhar /*
901733b9277SNavdeep Parhar  * Given an arbitrary "index," come up with an iq that can be used by other
902fe2ebb76SJohn Baldwin  * queues (of this VI) for interrupt forwarding, SGE egress updates, etc.
903733b9277SNavdeep Parhar  * The iq returned is guaranteed to be something that takes direct interrupts.
904733b9277SNavdeep Parhar  */
905733b9277SNavdeep Parhar static struct sge_iq *
906fe2ebb76SJohn Baldwin vi_intr_iq(struct vi_info *vi, int idx)
907733b9277SNavdeep Parhar {
908fe2ebb76SJohn Baldwin 	struct adapter *sc = vi->pi->adapter;
909733b9277SNavdeep Parhar 	struct sge *s = &sc->sge;
910733b9277SNavdeep Parhar 	struct sge_iq *iq = NULL;
911298d969cSNavdeep Parhar 	int nintr, i;
912733b9277SNavdeep Parhar 
913733b9277SNavdeep Parhar 	if (sc->intr_count == 1)
914733b9277SNavdeep Parhar 		return (&sc->sge.fwq);
915733b9277SNavdeep Parhar 
916fe2ebb76SJohn Baldwin 	nintr = vi->nintr;
917298d969cSNavdeep Parhar 	KASSERT(nintr != 0,
918fe2ebb76SJohn Baldwin 	    ("%s: vi %p has no exclusive interrupts, total interrupts = %d",
919fe2ebb76SJohn Baldwin 	    __func__, vi, sc->intr_count));
920298d969cSNavdeep Parhar 	i = idx % nintr;
921733b9277SNavdeep Parhar 
922fe2ebb76SJohn Baldwin 	if (vi->flags & INTR_RXQ) {
923fe2ebb76SJohn Baldwin 	       	if (i < vi->nrxq) {
924fe2ebb76SJohn Baldwin 			iq = &s->rxq[vi->first_rxq + i].iq;
925298d969cSNavdeep Parhar 			goto done;
926298d969cSNavdeep Parhar 		}
927fe2ebb76SJohn Baldwin 		i -= vi->nrxq;
928298d969cSNavdeep Parhar 	}
929298d969cSNavdeep Parhar #ifdef TCP_OFFLOAD
930fe2ebb76SJohn Baldwin 	if (vi->flags & INTR_OFLD_RXQ) {
931fe2ebb76SJohn Baldwin 	       	if (i < vi->nofldrxq) {
932fe2ebb76SJohn Baldwin 			iq = &s->ofld_rxq[vi->first_ofld_rxq + i].iq;
933298d969cSNavdeep Parhar 			goto done;
934298d969cSNavdeep Parhar 		}
935fe2ebb76SJohn Baldwin 		i -= vi->nofldrxq;
936298d969cSNavdeep Parhar 	}
937298d969cSNavdeep Parhar #endif
938fe2ebb76SJohn Baldwin 	panic("%s: vi %p, intr_flags 0x%lx, idx %d, total intr %d\n", __func__,
939fe2ebb76SJohn Baldwin 	    vi, vi->flags & INTR_ALL, idx, nintr);
940298d969cSNavdeep Parhar done:
941298d969cSNavdeep Parhar 	MPASS(iq != NULL);
942298d969cSNavdeep Parhar 	KASSERT(iq->flags & IQ_INTR,
943fe2ebb76SJohn Baldwin 	    ("%s: iq %p (vi %p, intr_flags 0x%lx, idx %d)", __func__, iq, vi,
944fe2ebb76SJohn Baldwin 	    vi->flags & INTR_ALL, idx));
945733b9277SNavdeep Parhar 	return (iq);
946733b9277SNavdeep Parhar }
947733b9277SNavdeep Parhar 
94838035ed6SNavdeep Parhar /* Maximum payload that can be delivered with a single iq descriptor */
9498340ece5SNavdeep Parhar static inline int
95038035ed6SNavdeep Parhar mtu_to_max_payload(struct adapter *sc, int mtu, const int toe)
9518340ece5SNavdeep Parhar {
95238035ed6SNavdeep Parhar 	int payload;
9538340ece5SNavdeep Parhar 
9546eb3180fSNavdeep Parhar #ifdef TCP_OFFLOAD
95538035ed6SNavdeep Parhar 	if (toe) {
95638035ed6SNavdeep Parhar 		payload = sc->tt.rx_coalesce ?
95738035ed6SNavdeep Parhar 		    G_RXCOALESCESIZE(t4_read_reg(sc, A_TP_PARA_REG2)) : mtu;
95838035ed6SNavdeep Parhar 	} else {
95938035ed6SNavdeep Parhar #endif
96038035ed6SNavdeep Parhar 		/* large enough even when hw VLAN extraction is disabled */
96190e7434aSNavdeep Parhar 		payload = sc->params.sge.fl_pktshift + ETHER_HDR_LEN +
96290e7434aSNavdeep Parhar 		    ETHER_VLAN_ENCAP_LEN + mtu;
96338035ed6SNavdeep Parhar #ifdef TCP_OFFLOAD
9646eb3180fSNavdeep Parhar 	}
9656eb3180fSNavdeep Parhar #endif
96638035ed6SNavdeep Parhar 
96738035ed6SNavdeep Parhar 	return (payload);
96838035ed6SNavdeep Parhar }
9696eb3180fSNavdeep Parhar 
970733b9277SNavdeep Parhar int
971fe2ebb76SJohn Baldwin t4_setup_vi_queues(struct vi_info *vi)
972733b9277SNavdeep Parhar {
973733b9277SNavdeep Parhar 	int rc = 0, i, j, intr_idx, iqid;
974733b9277SNavdeep Parhar 	struct sge_rxq *rxq;
975733b9277SNavdeep Parhar 	struct sge_txq *txq;
976733b9277SNavdeep Parhar 	struct sge_wrq *ctrlq;
97709fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
978733b9277SNavdeep Parhar 	struct sge_ofld_rxq *ofld_rxq;
979733b9277SNavdeep Parhar 	struct sge_wrq *ofld_txq;
980298d969cSNavdeep Parhar #endif
981298d969cSNavdeep Parhar #ifdef DEV_NETMAP
98262291463SNavdeep Parhar 	int saved_idx;
983298d969cSNavdeep Parhar 	struct sge_nm_rxq *nm_rxq;
984298d969cSNavdeep Parhar 	struct sge_nm_txq *nm_txq;
985733b9277SNavdeep Parhar #endif
986733b9277SNavdeep Parhar 	char name[16];
987fe2ebb76SJohn Baldwin 	struct port_info *pi = vi->pi;
988733b9277SNavdeep Parhar 	struct adapter *sc = pi->adapter;
989fe2ebb76SJohn Baldwin 	struct ifnet *ifp = vi->ifp;
990fe2ebb76SJohn Baldwin 	struct sysctl_oid *oid = device_get_sysctl_tree(vi->dev);
991733b9277SNavdeep Parhar 	struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
992e3207e19SNavdeep Parhar 	int maxp, mtu = ifp->if_mtu;
993733b9277SNavdeep Parhar 
994733b9277SNavdeep Parhar 	/* Interrupt vector to start from (when using multiple vectors) */
995fe2ebb76SJohn Baldwin 	intr_idx = first_vector(vi);
996fe2ebb76SJohn Baldwin 
997fe2ebb76SJohn Baldwin #ifdef DEV_NETMAP
99862291463SNavdeep Parhar 	saved_idx = intr_idx;
99962291463SNavdeep Parhar 	if (ifp->if_capabilities & IFCAP_NETMAP) {
100062291463SNavdeep Parhar 
100162291463SNavdeep Parhar 		/* netmap is supported with direct interrupts only. */
100262291463SNavdeep Parhar 		MPASS(vi->flags & INTR_RXQ);
100362291463SNavdeep Parhar 
1004fe2ebb76SJohn Baldwin 		/*
1005fe2ebb76SJohn Baldwin 		 * We don't have buffers to back the netmap rx queues
1006fe2ebb76SJohn Baldwin 		 * right now so we create the queues in a way that
1007fe2ebb76SJohn Baldwin 		 * doesn't set off any congestion signal in the chip.
1008fe2ebb76SJohn Baldwin 		 */
100962291463SNavdeep Parhar 		oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "nm_rxq",
1010fe2ebb76SJohn Baldwin 		    CTLFLAG_RD, NULL, "rx queues");
1011fe2ebb76SJohn Baldwin 		for_each_nm_rxq(vi, i, nm_rxq) {
1012fe2ebb76SJohn Baldwin 			rc = alloc_nm_rxq(vi, nm_rxq, intr_idx, i, oid);
1013fe2ebb76SJohn Baldwin 			if (rc != 0)
1014fe2ebb76SJohn Baldwin 				goto done;
1015fe2ebb76SJohn Baldwin 			intr_idx++;
1016fe2ebb76SJohn Baldwin 		}
1017fe2ebb76SJohn Baldwin 
101862291463SNavdeep Parhar 		oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "nm_txq",
1019fe2ebb76SJohn Baldwin 		    CTLFLAG_RD, NULL, "tx queues");
1020fe2ebb76SJohn Baldwin 		for_each_nm_txq(vi, i, nm_txq) {
102162291463SNavdeep Parhar 			iqid = vi->first_nm_rxq + (i % vi->nnmrxq);
1022fe2ebb76SJohn Baldwin 			rc = alloc_nm_txq(vi, nm_txq, iqid, i, oid);
1023fe2ebb76SJohn Baldwin 			if (rc != 0)
1024fe2ebb76SJohn Baldwin 				goto done;
1025fe2ebb76SJohn Baldwin 		}
1026fe2ebb76SJohn Baldwin 	}
102762291463SNavdeep Parhar 
102862291463SNavdeep Parhar 	/* Normal rx queues and netmap rx queues share the same interrupts. */
102962291463SNavdeep Parhar 	intr_idx = saved_idx;
1030fe2ebb76SJohn Baldwin #endif
1031733b9277SNavdeep Parhar 
1032733b9277SNavdeep Parhar 	/*
1033298d969cSNavdeep Parhar 	 * First pass over all NIC and TOE rx queues:
1034733b9277SNavdeep Parhar 	 * a) initialize iq and fl
1035733b9277SNavdeep Parhar 	 * b) allocate queue iff it will take direct interrupts.
1036733b9277SNavdeep Parhar 	 */
103738035ed6SNavdeep Parhar 	maxp = mtu_to_max_payload(sc, mtu, 0);
1038fe2ebb76SJohn Baldwin 	if (vi->flags & INTR_RXQ) {
1039fe2ebb76SJohn Baldwin 		oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "rxq",
1040298d969cSNavdeep Parhar 		    CTLFLAG_RD, NULL, "rx queues");
1041298d969cSNavdeep Parhar 	}
1042fe2ebb76SJohn Baldwin 	for_each_rxq(vi, i, rxq) {
104354e4ee71SNavdeep Parhar 
1044fe2ebb76SJohn Baldwin 		init_iq(&rxq->iq, sc, vi->tmr_idx, vi->pktc_idx, vi->qsize_rxq);
104554e4ee71SNavdeep Parhar 
104654e4ee71SNavdeep Parhar 		snprintf(name, sizeof(name), "%s rxq%d-fl",
1047fe2ebb76SJohn Baldwin 		    device_get_nameunit(vi->dev), i);
1048fe2ebb76SJohn Baldwin 		init_fl(sc, &rxq->fl, vi->qsize_rxq / 8, maxp, name);
104954e4ee71SNavdeep Parhar 
1050fe2ebb76SJohn Baldwin 		if (vi->flags & INTR_RXQ) {
1051733b9277SNavdeep Parhar 			rxq->iq.flags |= IQ_INTR;
1052fe2ebb76SJohn Baldwin 			rc = alloc_rxq(vi, rxq, intr_idx, i, oid);
105354e4ee71SNavdeep Parhar 			if (rc != 0)
105454e4ee71SNavdeep Parhar 				goto done;
1055733b9277SNavdeep Parhar 			intr_idx++;
1056733b9277SNavdeep Parhar 		}
105754e4ee71SNavdeep Parhar 	}
105862291463SNavdeep Parhar #ifdef DEV_NETMAP
105962291463SNavdeep Parhar 	if (ifp->if_capabilities & IFCAP_NETMAP)
106062291463SNavdeep Parhar 		intr_idx = saved_idx + max(vi->nrxq, vi->nnmrxq);
106162291463SNavdeep Parhar #endif
106209fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
106338035ed6SNavdeep Parhar 	maxp = mtu_to_max_payload(sc, mtu, 1);
1064fe2ebb76SJohn Baldwin 	if (vi->flags & INTR_OFLD_RXQ) {
1065fe2ebb76SJohn Baldwin 		oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "ofld_rxq",
1066298d969cSNavdeep Parhar 		    CTLFLAG_RD, NULL,
1067298d969cSNavdeep Parhar 		    "rx queues for offloaded TCP connections");
1068298d969cSNavdeep Parhar 	}
1069fe2ebb76SJohn Baldwin 	for_each_ofld_rxq(vi, i, ofld_rxq) {
1070733b9277SNavdeep Parhar 
1071fe2ebb76SJohn Baldwin 		init_iq(&ofld_rxq->iq, sc, vi->tmr_idx, vi->pktc_idx,
1072fe2ebb76SJohn Baldwin 		    vi->qsize_rxq);
1073733b9277SNavdeep Parhar 
1074733b9277SNavdeep Parhar 		snprintf(name, sizeof(name), "%s ofld_rxq%d-fl",
1075fe2ebb76SJohn Baldwin 		    device_get_nameunit(vi->dev), i);
1076fe2ebb76SJohn Baldwin 		init_fl(sc, &ofld_rxq->fl, vi->qsize_rxq / 8, maxp, name);
1077733b9277SNavdeep Parhar 
1078fe2ebb76SJohn Baldwin 		if (vi->flags & INTR_OFLD_RXQ) {
1079733b9277SNavdeep Parhar 			ofld_rxq->iq.flags |= IQ_INTR;
1080fe2ebb76SJohn Baldwin 			rc = alloc_ofld_rxq(vi, ofld_rxq, intr_idx, i, oid);
1081733b9277SNavdeep Parhar 			if (rc != 0)
1082733b9277SNavdeep Parhar 				goto done;
1083733b9277SNavdeep Parhar 			intr_idx++;
1084733b9277SNavdeep Parhar 		}
1085733b9277SNavdeep Parhar 	}
1086733b9277SNavdeep Parhar #endif
1087733b9277SNavdeep Parhar 
1088733b9277SNavdeep Parhar 	/*
1089298d969cSNavdeep Parhar 	 * Second pass over all NIC and TOE rx queues.  The queues forwarding
1090733b9277SNavdeep Parhar 	 * their interrupts are allocated now.
1091733b9277SNavdeep Parhar 	 */
1092733b9277SNavdeep Parhar 	j = 0;
1093fe2ebb76SJohn Baldwin 	if (!(vi->flags & INTR_RXQ)) {
1094fe2ebb76SJohn Baldwin 		oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "rxq",
1095298d969cSNavdeep Parhar 		    CTLFLAG_RD, NULL, "rx queues");
1096fe2ebb76SJohn Baldwin 		for_each_rxq(vi, i, rxq) {
1097298d969cSNavdeep Parhar 			MPASS(!(rxq->iq.flags & IQ_INTR));
1098733b9277SNavdeep Parhar 
1099fe2ebb76SJohn Baldwin 			intr_idx = vi_intr_iq(vi, j)->abs_id;
1100733b9277SNavdeep Parhar 
1101fe2ebb76SJohn Baldwin 			rc = alloc_rxq(vi, rxq, intr_idx, i, oid);
1102733b9277SNavdeep Parhar 			if (rc != 0)
1103733b9277SNavdeep Parhar 				goto done;
1104733b9277SNavdeep Parhar 			j++;
1105733b9277SNavdeep Parhar 		}
1106298d969cSNavdeep Parhar 	}
110709fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
1108fe2ebb76SJohn Baldwin 	if (vi->nofldrxq != 0 && !(vi->flags & INTR_OFLD_RXQ)) {
1109fe2ebb76SJohn Baldwin 		oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "ofld_rxq",
1110298d969cSNavdeep Parhar 		    CTLFLAG_RD, NULL,
1111298d969cSNavdeep Parhar 		    "rx queues for offloaded TCP connections");
1112fe2ebb76SJohn Baldwin 		for_each_ofld_rxq(vi, i, ofld_rxq) {
1113298d969cSNavdeep Parhar 			MPASS(!(ofld_rxq->iq.flags & IQ_INTR));
1114733b9277SNavdeep Parhar 
1115fe2ebb76SJohn Baldwin 			intr_idx = vi_intr_iq(vi, j)->abs_id;
1116733b9277SNavdeep Parhar 
1117fe2ebb76SJohn Baldwin 			rc = alloc_ofld_rxq(vi, ofld_rxq, intr_idx, i, oid);
1118733b9277SNavdeep Parhar 			if (rc != 0)
1119733b9277SNavdeep Parhar 				goto done;
1120733b9277SNavdeep Parhar 			j++;
1121733b9277SNavdeep Parhar 		}
1122298d969cSNavdeep Parhar 	}
1123298d969cSNavdeep Parhar #endif
1124733b9277SNavdeep Parhar 
1125733b9277SNavdeep Parhar 	/*
1126733b9277SNavdeep Parhar 	 * Now the tx queues.  Only one pass needed.
1127733b9277SNavdeep Parhar 	 */
1128fe2ebb76SJohn Baldwin 	oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "txq", CTLFLAG_RD,
1129733b9277SNavdeep Parhar 	    NULL, "tx queues");
1130733b9277SNavdeep Parhar 	j = 0;
1131fe2ebb76SJohn Baldwin 	for_each_txq(vi, i, txq) {
1132fe2ebb76SJohn Baldwin 		iqid = vi_intr_iq(vi, j)->cntxt_id;
113354e4ee71SNavdeep Parhar 		snprintf(name, sizeof(name), "%s txq%d",
1134fe2ebb76SJohn Baldwin 		    device_get_nameunit(vi->dev), i);
113590e7434aSNavdeep Parhar 		init_eq(sc, &txq->eq, EQ_ETH, vi->qsize_txq, pi->tx_chan, iqid,
1136733b9277SNavdeep Parhar 		    name);
113754e4ee71SNavdeep Parhar 
1138fe2ebb76SJohn Baldwin 		rc = alloc_txq(vi, txq, i, oid);
113954e4ee71SNavdeep Parhar 		if (rc != 0)
114054e4ee71SNavdeep Parhar 			goto done;
1141733b9277SNavdeep Parhar 		j++;
114254e4ee71SNavdeep Parhar 	}
114309fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
1144fe2ebb76SJohn Baldwin 	oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "ofld_txq",
1145733b9277SNavdeep Parhar 	    CTLFLAG_RD, NULL, "tx queues for offloaded TCP connections");
1146fe2ebb76SJohn Baldwin 	for_each_ofld_txq(vi, i, ofld_txq) {
1147298d969cSNavdeep Parhar 		struct sysctl_oid *oid2;
1148733b9277SNavdeep Parhar 
1149fe2ebb76SJohn Baldwin 		iqid = vi_intr_iq(vi, j)->cntxt_id;
1150733b9277SNavdeep Parhar 		snprintf(name, sizeof(name), "%s ofld_txq%d",
1151fe2ebb76SJohn Baldwin 		    device_get_nameunit(vi->dev), i);
115290e7434aSNavdeep Parhar 		init_eq(sc, &ofld_txq->eq, EQ_OFLD, vi->qsize_txq, pi->tx_chan,
1153733b9277SNavdeep Parhar 		    iqid, name);
1154733b9277SNavdeep Parhar 
1155733b9277SNavdeep Parhar 		snprintf(name, sizeof(name), "%d", i);
1156fe2ebb76SJohn Baldwin 		oid2 = SYSCTL_ADD_NODE(&vi->ctx, SYSCTL_CHILDREN(oid), OID_AUTO,
1157733b9277SNavdeep Parhar 		    name, CTLFLAG_RD, NULL, "offload tx queue");
1158733b9277SNavdeep Parhar 
1159fe2ebb76SJohn Baldwin 		rc = alloc_wrq(sc, vi, ofld_txq, oid2);
1160298d969cSNavdeep Parhar 		if (rc != 0)
1161298d969cSNavdeep Parhar 			goto done;
1162298d969cSNavdeep Parhar 		j++;
1163298d969cSNavdeep Parhar 	}
1164298d969cSNavdeep Parhar #endif
1165733b9277SNavdeep Parhar 
1166733b9277SNavdeep Parhar 	/*
1167733b9277SNavdeep Parhar 	 * Finally, the control queue.
1168733b9277SNavdeep Parhar 	 */
1169fe2ebb76SJohn Baldwin 	if (!IS_MAIN_VI(vi))
1170fe2ebb76SJohn Baldwin 		goto done;
1171fe2ebb76SJohn Baldwin 	oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, "ctrlq", CTLFLAG_RD,
1172733b9277SNavdeep Parhar 	    NULL, "ctrl queue");
1173733b9277SNavdeep Parhar 	ctrlq = &sc->sge.ctrlq[pi->port_id];
1174fe2ebb76SJohn Baldwin 	iqid = vi_intr_iq(vi, 0)->cntxt_id;
1175fe2ebb76SJohn Baldwin 	snprintf(name, sizeof(name), "%s ctrlq", device_get_nameunit(vi->dev));
117690e7434aSNavdeep Parhar 	init_eq(sc, &ctrlq->eq, EQ_CTRL, CTRL_EQ_QSIZE, pi->tx_chan, iqid,
117790e7434aSNavdeep Parhar 	    name);
1178fe2ebb76SJohn Baldwin 	rc = alloc_wrq(sc, vi, ctrlq, oid);
1179733b9277SNavdeep Parhar 
118054e4ee71SNavdeep Parhar done:
118154e4ee71SNavdeep Parhar 	if (rc)
1182fe2ebb76SJohn Baldwin 		t4_teardown_vi_queues(vi);
118354e4ee71SNavdeep Parhar 
118454e4ee71SNavdeep Parhar 	return (rc);
118554e4ee71SNavdeep Parhar }
118654e4ee71SNavdeep Parhar 
118754e4ee71SNavdeep Parhar /*
118854e4ee71SNavdeep Parhar  * Idempotent
118954e4ee71SNavdeep Parhar  */
119054e4ee71SNavdeep Parhar int
1191fe2ebb76SJohn Baldwin t4_teardown_vi_queues(struct vi_info *vi)
119254e4ee71SNavdeep Parhar {
119354e4ee71SNavdeep Parhar 	int i;
1194fe2ebb76SJohn Baldwin 	struct port_info *pi = vi->pi;
1195733b9277SNavdeep Parhar 	struct adapter *sc = pi->adapter;
119654e4ee71SNavdeep Parhar 	struct sge_rxq *rxq;
119754e4ee71SNavdeep Parhar 	struct sge_txq *txq;
119809fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
1199733b9277SNavdeep Parhar 	struct sge_ofld_rxq *ofld_rxq;
1200733b9277SNavdeep Parhar 	struct sge_wrq *ofld_txq;
1201733b9277SNavdeep Parhar #endif
1202298d969cSNavdeep Parhar #ifdef DEV_NETMAP
1203298d969cSNavdeep Parhar 	struct sge_nm_rxq *nm_rxq;
1204298d969cSNavdeep Parhar 	struct sge_nm_txq *nm_txq;
1205298d969cSNavdeep Parhar #endif
120654e4ee71SNavdeep Parhar 
120754e4ee71SNavdeep Parhar 	/* Do this before freeing the queues */
1208fe2ebb76SJohn Baldwin 	if (vi->flags & VI_SYSCTL_CTX) {
1209fe2ebb76SJohn Baldwin 		sysctl_ctx_free(&vi->ctx);
1210fe2ebb76SJohn Baldwin 		vi->flags &= ~VI_SYSCTL_CTX;
121154e4ee71SNavdeep Parhar 	}
121254e4ee71SNavdeep Parhar 
1213fe2ebb76SJohn Baldwin #ifdef DEV_NETMAP
121462291463SNavdeep Parhar 	if (vi->ifp->if_capabilities & IFCAP_NETMAP) {
1215fe2ebb76SJohn Baldwin 		for_each_nm_txq(vi, i, nm_txq) {
1216fe2ebb76SJohn Baldwin 			free_nm_txq(vi, nm_txq);
1217fe2ebb76SJohn Baldwin 		}
1218fe2ebb76SJohn Baldwin 
1219fe2ebb76SJohn Baldwin 		for_each_nm_rxq(vi, i, nm_rxq) {
1220fe2ebb76SJohn Baldwin 			free_nm_rxq(vi, nm_rxq);
1221fe2ebb76SJohn Baldwin 		}
1222fe2ebb76SJohn Baldwin 	}
1223fe2ebb76SJohn Baldwin #endif
1224fe2ebb76SJohn Baldwin 
1225733b9277SNavdeep Parhar 	/*
1226733b9277SNavdeep Parhar 	 * Take down all the tx queues first, as they reference the rx queues
1227733b9277SNavdeep Parhar 	 * (for egress updates, etc.).
1228733b9277SNavdeep Parhar 	 */
1229733b9277SNavdeep Parhar 
1230fe2ebb76SJohn Baldwin 	if (IS_MAIN_VI(vi))
1231733b9277SNavdeep Parhar 		free_wrq(sc, &sc->sge.ctrlq[pi->port_id]);
1232733b9277SNavdeep Parhar 
1233fe2ebb76SJohn Baldwin 	for_each_txq(vi, i, txq) {
1234fe2ebb76SJohn Baldwin 		free_txq(vi, txq);
123554e4ee71SNavdeep Parhar 	}
123609fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
1237fe2ebb76SJohn Baldwin 	for_each_ofld_txq(vi, i, ofld_txq) {
1238733b9277SNavdeep Parhar 		free_wrq(sc, ofld_txq);
1239733b9277SNavdeep Parhar 	}
1240733b9277SNavdeep Parhar #endif
1241733b9277SNavdeep Parhar 
1242733b9277SNavdeep Parhar 	/*
1243733b9277SNavdeep Parhar 	 * Then take down the rx queues that forward their interrupts, as they
1244733b9277SNavdeep Parhar 	 * reference other rx queues.
1245733b9277SNavdeep Parhar 	 */
1246733b9277SNavdeep Parhar 
1247fe2ebb76SJohn Baldwin 	for_each_rxq(vi, i, rxq) {
1248733b9277SNavdeep Parhar 		if ((rxq->iq.flags & IQ_INTR) == 0)
1249fe2ebb76SJohn Baldwin 			free_rxq(vi, rxq);
125054e4ee71SNavdeep Parhar 	}
125109fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
1252fe2ebb76SJohn Baldwin 	for_each_ofld_rxq(vi, i, ofld_rxq) {
1253733b9277SNavdeep Parhar 		if ((ofld_rxq->iq.flags & IQ_INTR) == 0)
1254fe2ebb76SJohn Baldwin 			free_ofld_rxq(vi, ofld_rxq);
1255733b9277SNavdeep Parhar 	}
1256733b9277SNavdeep Parhar #endif
1257733b9277SNavdeep Parhar 
1258733b9277SNavdeep Parhar 	/*
1259733b9277SNavdeep Parhar 	 * Then take down the rx queues that take direct interrupts.
1260733b9277SNavdeep Parhar 	 */
1261733b9277SNavdeep Parhar 
1262fe2ebb76SJohn Baldwin 	for_each_rxq(vi, i, rxq) {
1263733b9277SNavdeep Parhar 		if (rxq->iq.flags & IQ_INTR)
1264fe2ebb76SJohn Baldwin 			free_rxq(vi, rxq);
1265733b9277SNavdeep Parhar 	}
126609fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
1267fe2ebb76SJohn Baldwin 	for_each_ofld_rxq(vi, i, ofld_rxq) {
1268733b9277SNavdeep Parhar 		if (ofld_rxq->iq.flags & IQ_INTR)
1269fe2ebb76SJohn Baldwin 			free_ofld_rxq(vi, ofld_rxq);
1270733b9277SNavdeep Parhar 	}
1271733b9277SNavdeep Parhar #endif
1272733b9277SNavdeep Parhar 
127354e4ee71SNavdeep Parhar 	return (0);
127454e4ee71SNavdeep Parhar }
127554e4ee71SNavdeep Parhar 
1276733b9277SNavdeep Parhar /*
1277733b9277SNavdeep Parhar  * Deals with errors and the firmware event queue.  All data rx queues forward
1278733b9277SNavdeep Parhar  * their interrupt to the firmware event queue.
1279733b9277SNavdeep Parhar  */
128054e4ee71SNavdeep Parhar void
128154e4ee71SNavdeep Parhar t4_intr_all(void *arg)
128254e4ee71SNavdeep Parhar {
128354e4ee71SNavdeep Parhar 	struct adapter *sc = arg;
1284733b9277SNavdeep Parhar 	struct sge_iq *fwq = &sc->sge.fwq;
128554e4ee71SNavdeep Parhar 
128654e4ee71SNavdeep Parhar 	t4_intr_err(arg);
1287733b9277SNavdeep Parhar 	if (atomic_cmpset_int(&fwq->state, IQS_IDLE, IQS_BUSY)) {
1288733b9277SNavdeep Parhar 		service_iq(fwq, 0);
1289733b9277SNavdeep Parhar 		atomic_cmpset_int(&fwq->state, IQS_BUSY, IQS_IDLE);
129054e4ee71SNavdeep Parhar 	}
129154e4ee71SNavdeep Parhar }
129254e4ee71SNavdeep Parhar 
129354e4ee71SNavdeep Parhar /* Deals with error interrupts */
129454e4ee71SNavdeep Parhar void
129554e4ee71SNavdeep Parhar t4_intr_err(void *arg)
129654e4ee71SNavdeep Parhar {
129754e4ee71SNavdeep Parhar 	struct adapter *sc = arg;
129854e4ee71SNavdeep Parhar 
129954e4ee71SNavdeep Parhar 	t4_write_reg(sc, MYPF_REG(A_PCIE_PF_CLI), 0);
130054e4ee71SNavdeep Parhar 	t4_slow_intr_handler(sc);
130154e4ee71SNavdeep Parhar }
130254e4ee71SNavdeep Parhar 
130354e4ee71SNavdeep Parhar void
130454e4ee71SNavdeep Parhar t4_intr_evt(void *arg)
130554e4ee71SNavdeep Parhar {
130654e4ee71SNavdeep Parhar 	struct sge_iq *iq = arg;
13072be67d29SNavdeep Parhar 
1308733b9277SNavdeep Parhar 	if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) {
1309733b9277SNavdeep Parhar 		service_iq(iq, 0);
1310733b9277SNavdeep Parhar 		atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE);
13112be67d29SNavdeep Parhar 	}
13122be67d29SNavdeep Parhar }
13132be67d29SNavdeep Parhar 
1314733b9277SNavdeep Parhar void
1315733b9277SNavdeep Parhar t4_intr(void *arg)
13162be67d29SNavdeep Parhar {
13172be67d29SNavdeep Parhar 	struct sge_iq *iq = arg;
1318733b9277SNavdeep Parhar 
1319733b9277SNavdeep Parhar 	if (atomic_cmpset_int(&iq->state, IQS_IDLE, IQS_BUSY)) {
1320733b9277SNavdeep Parhar 		service_iq(iq, 0);
1321733b9277SNavdeep Parhar 		atomic_cmpset_int(&iq->state, IQS_BUSY, IQS_IDLE);
1322733b9277SNavdeep Parhar 	}
1323733b9277SNavdeep Parhar }
1324733b9277SNavdeep Parhar 
132562291463SNavdeep Parhar void
132662291463SNavdeep Parhar t4_vi_intr(void *arg)
132762291463SNavdeep Parhar {
132862291463SNavdeep Parhar 	struct irq *irq = arg;
132962291463SNavdeep Parhar 
133062291463SNavdeep Parhar #ifdef DEV_NETMAP
133162291463SNavdeep Parhar 	if (atomic_cmpset_int(&irq->nm_state, NM_ON, NM_BUSY)) {
133262291463SNavdeep Parhar 		t4_nm_intr(irq->nm_rxq);
133362291463SNavdeep Parhar 		atomic_cmpset_int(&irq->nm_state, NM_BUSY, NM_ON);
133462291463SNavdeep Parhar 	}
133562291463SNavdeep Parhar #endif
133662291463SNavdeep Parhar 	if (irq->rxq != NULL)
133762291463SNavdeep Parhar 		t4_intr(irq->rxq);
133862291463SNavdeep Parhar }
133962291463SNavdeep Parhar 
1340733b9277SNavdeep Parhar /*
1341733b9277SNavdeep Parhar  * Deals with anything and everything on the given ingress queue.
1342733b9277SNavdeep Parhar  */
1343733b9277SNavdeep Parhar static int
1344733b9277SNavdeep Parhar service_iq(struct sge_iq *iq, int budget)
1345733b9277SNavdeep Parhar {
1346733b9277SNavdeep Parhar 	struct sge_iq *q;
134709fe6320SNavdeep Parhar 	struct sge_rxq *rxq = iq_to_rxq(iq);	/* Use iff iq is part of rxq */
13484d6db4e0SNavdeep Parhar 	struct sge_fl *fl;			/* Use iff IQ_HAS_FL */
134954e4ee71SNavdeep Parhar 	struct adapter *sc = iq->adapter;
1350b2daa9a9SNavdeep Parhar 	struct iq_desc *d = &iq->desc[iq->cidx];
13514d6db4e0SNavdeep Parhar 	int ndescs = 0, limit;
13524d6db4e0SNavdeep Parhar 	int rsp_type, refill;
1353733b9277SNavdeep Parhar 	uint32_t lq;
13544d6db4e0SNavdeep Parhar 	uint16_t fl_hw_cidx;
1355733b9277SNavdeep Parhar 	struct mbuf *m0;
1356733b9277SNavdeep Parhar 	STAILQ_HEAD(, sge_iq) iql = STAILQ_HEAD_INITIALIZER(iql);
1357480e603cSNavdeep Parhar #if defined(INET) || defined(INET6)
1358480e603cSNavdeep Parhar 	const struct timeval lro_timeout = {0, sc->lro_timeout};
1359480e603cSNavdeep Parhar #endif
1360733b9277SNavdeep Parhar 
1361733b9277SNavdeep Parhar 	KASSERT(iq->state == IQS_BUSY, ("%s: iq %p not BUSY", __func__, iq));
1362733b9277SNavdeep Parhar 
13634d6db4e0SNavdeep Parhar 	limit = budget ? budget : iq->qsize / 16;
13644d6db4e0SNavdeep Parhar 
13654d6db4e0SNavdeep Parhar 	if (iq->flags & IQ_HAS_FL) {
13664d6db4e0SNavdeep Parhar 		fl = &rxq->fl;
13674d6db4e0SNavdeep Parhar 		fl_hw_cidx = fl->hw_cidx;	/* stable snapshot */
13684d6db4e0SNavdeep Parhar 	} else {
13694d6db4e0SNavdeep Parhar 		fl = NULL;
13704d6db4e0SNavdeep Parhar 		fl_hw_cidx = 0;			/* to silence gcc warning */
13714d6db4e0SNavdeep Parhar 	}
13724d6db4e0SNavdeep Parhar 
1373733b9277SNavdeep Parhar 	/*
1374733b9277SNavdeep Parhar 	 * We always come back and check the descriptor ring for new indirect
1375733b9277SNavdeep Parhar 	 * interrupts and other responses after running a single handler.
1376733b9277SNavdeep Parhar 	 */
1377733b9277SNavdeep Parhar 	for (;;) {
1378b2daa9a9SNavdeep Parhar 		while ((d->rsp.u.type_gen & F_RSPD_GEN) == iq->gen) {
137954e4ee71SNavdeep Parhar 
138054e4ee71SNavdeep Parhar 			rmb();
138154e4ee71SNavdeep Parhar 
13824d6db4e0SNavdeep Parhar 			refill = 0;
1383733b9277SNavdeep Parhar 			m0 = NULL;
1384b2daa9a9SNavdeep Parhar 			rsp_type = G_RSPD_TYPE(d->rsp.u.type_gen);
1385b2daa9a9SNavdeep Parhar 			lq = be32toh(d->rsp.pldbuflen_qid);
138654e4ee71SNavdeep Parhar 
1387733b9277SNavdeep Parhar 			switch (rsp_type) {
1388733b9277SNavdeep Parhar 			case X_RSPD_TYPE_FLBUF:
138954e4ee71SNavdeep Parhar 
1390733b9277SNavdeep Parhar 				KASSERT(iq->flags & IQ_HAS_FL,
1391733b9277SNavdeep Parhar 				    ("%s: data for an iq (%p) with no freelist",
1392733b9277SNavdeep Parhar 				    __func__, iq));
1393733b9277SNavdeep Parhar 
13944d6db4e0SNavdeep Parhar 				m0 = get_fl_payload(sc, fl, lq);
13951458bff9SNavdeep Parhar 				if (__predict_false(m0 == NULL))
13961458bff9SNavdeep Parhar 					goto process_iql;
13974d6db4e0SNavdeep Parhar 				refill = IDXDIFF(fl->hw_cidx, fl_hw_cidx, fl->sidx) > 2;
1398733b9277SNavdeep Parhar #ifdef T4_PKT_TIMESTAMP
1399733b9277SNavdeep Parhar 				/*
1400733b9277SNavdeep Parhar 				 * 60 bit timestamp for the payload is
1401733b9277SNavdeep Parhar 				 * *(uint64_t *)m0->m_pktdat.  Note that it is
1402733b9277SNavdeep Parhar 				 * in the leading free-space in the mbuf.  The
1403733b9277SNavdeep Parhar 				 * kernel can clobber it during a pullup,
1404733b9277SNavdeep Parhar 				 * m_copymdata, etc.  You need to make sure that
1405733b9277SNavdeep Parhar 				 * the mbuf reaches you unmolested if you care
1406733b9277SNavdeep Parhar 				 * about the timestamp.
1407733b9277SNavdeep Parhar 				 */
1408733b9277SNavdeep Parhar 				*(uint64_t *)m0->m_pktdat =
1409733b9277SNavdeep Parhar 				    be64toh(ctrl->u.last_flit) &
1410733b9277SNavdeep Parhar 				    0xfffffffffffffff;
1411733b9277SNavdeep Parhar #endif
1412733b9277SNavdeep Parhar 
1413733b9277SNavdeep Parhar 				/* fall through */
1414733b9277SNavdeep Parhar 
1415733b9277SNavdeep Parhar 			case X_RSPD_TYPE_CPL:
1416b2daa9a9SNavdeep Parhar 				KASSERT(d->rss.opcode < NUM_CPL_CMDS,
1417733b9277SNavdeep Parhar 				    ("%s: bad opcode %02x.", __func__,
1418b2daa9a9SNavdeep Parhar 				    d->rss.opcode));
1419*671bf2b8SNavdeep Parhar 				t4_cpl_handler[d->rss.opcode](iq, &d->rss, m0);
1420733b9277SNavdeep Parhar 				break;
1421733b9277SNavdeep Parhar 
1422733b9277SNavdeep Parhar 			case X_RSPD_TYPE_INTR:
1423733b9277SNavdeep Parhar 
1424733b9277SNavdeep Parhar 				/*
1425733b9277SNavdeep Parhar 				 * Interrupts should be forwarded only to queues
1426733b9277SNavdeep Parhar 				 * that are not forwarding their interrupts.
1427733b9277SNavdeep Parhar 				 * This means service_iq can recurse but only 1
1428733b9277SNavdeep Parhar 				 * level deep.
1429733b9277SNavdeep Parhar 				 */
1430733b9277SNavdeep Parhar 				KASSERT(budget == 0,
1431733b9277SNavdeep Parhar 				    ("%s: budget %u, rsp_type %u", __func__,
1432733b9277SNavdeep Parhar 				    budget, rsp_type));
1433733b9277SNavdeep Parhar 
143498005176SNavdeep Parhar 				/*
143598005176SNavdeep Parhar 				 * There are 1K interrupt-capable queues (qids 0
143698005176SNavdeep Parhar 				 * through 1023).  A response type indicating a
143798005176SNavdeep Parhar 				 * forwarded interrupt with a qid >= 1K is an
143898005176SNavdeep Parhar 				 * iWARP async notification.
143998005176SNavdeep Parhar 				 */
144098005176SNavdeep Parhar 				if (lq >= 1024) {
1441*671bf2b8SNavdeep Parhar                                         t4_an_handler(iq, &d->rsp);
144298005176SNavdeep Parhar                                         break;
144398005176SNavdeep Parhar                                 }
144498005176SNavdeep Parhar 
1445733b9277SNavdeep Parhar 				q = sc->sge.iqmap[lq - sc->sge.iq_start];
1446733b9277SNavdeep Parhar 				if (atomic_cmpset_int(&q->state, IQS_IDLE,
1447733b9277SNavdeep Parhar 				    IQS_BUSY)) {
14484d6db4e0SNavdeep Parhar 					if (service_iq(q, q->qsize / 16) == 0) {
1449733b9277SNavdeep Parhar 						atomic_cmpset_int(&q->state,
1450733b9277SNavdeep Parhar 						    IQS_BUSY, IQS_IDLE);
1451733b9277SNavdeep Parhar 					} else {
1452733b9277SNavdeep Parhar 						STAILQ_INSERT_TAIL(&iql, q,
1453733b9277SNavdeep Parhar 						    link);
1454733b9277SNavdeep Parhar 					}
1455733b9277SNavdeep Parhar 				}
1456733b9277SNavdeep Parhar 				break;
1457733b9277SNavdeep Parhar 
1458733b9277SNavdeep Parhar 			default:
145998005176SNavdeep Parhar 				KASSERT(0,
146098005176SNavdeep Parhar 				    ("%s: illegal response type %d on iq %p",
146198005176SNavdeep Parhar 				    __func__, rsp_type, iq));
146298005176SNavdeep Parhar 				log(LOG_ERR,
146398005176SNavdeep Parhar 				    "%s: illegal response type %d on iq %p",
146498005176SNavdeep Parhar 				    device_get_nameunit(sc->dev), rsp_type, iq);
146509fe6320SNavdeep Parhar 				break;
146654e4ee71SNavdeep Parhar 			}
146756599263SNavdeep Parhar 
1468b2daa9a9SNavdeep Parhar 			d++;
1469b2daa9a9SNavdeep Parhar 			if (__predict_false(++iq->cidx == iq->sidx)) {
1470b2daa9a9SNavdeep Parhar 				iq->cidx = 0;
1471b2daa9a9SNavdeep Parhar 				iq->gen ^= F_RSPD_GEN;
1472b2daa9a9SNavdeep Parhar 				d = &iq->desc[0];
1473b2daa9a9SNavdeep Parhar 			}
1474b2daa9a9SNavdeep Parhar 			if (__predict_false(++ndescs == limit)) {
1475733b9277SNavdeep Parhar 				t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
1476733b9277SNavdeep Parhar 				    V_CIDXINC(ndescs) |
1477733b9277SNavdeep Parhar 				    V_INGRESSQID(iq->cntxt_id) |
1478733b9277SNavdeep Parhar 				    V_SEINTARM(V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX)));
1479733b9277SNavdeep Parhar 				ndescs = 0;
1480733b9277SNavdeep Parhar 
1481480e603cSNavdeep Parhar #if defined(INET) || defined(INET6)
1482480e603cSNavdeep Parhar 				if (iq->flags & IQ_LRO_ENABLED &&
1483480e603cSNavdeep Parhar 				    sc->lro_timeout != 0) {
1484480e603cSNavdeep Parhar 					tcp_lro_flush_inactive(&rxq->lro,
1485480e603cSNavdeep Parhar 					    &lro_timeout);
1486480e603cSNavdeep Parhar 				}
1487480e603cSNavdeep Parhar #endif
1488480e603cSNavdeep Parhar 
1489861e42b2SNavdeep Parhar 				if (budget) {
14904d6db4e0SNavdeep Parhar 					if (iq->flags & IQ_HAS_FL) {
1491861e42b2SNavdeep Parhar 						FL_LOCK(fl);
1492861e42b2SNavdeep Parhar 						refill_fl(sc, fl, 32);
1493861e42b2SNavdeep Parhar 						FL_UNLOCK(fl);
1494861e42b2SNavdeep Parhar 					}
1495733b9277SNavdeep Parhar 					return (EINPROGRESS);
149654e4ee71SNavdeep Parhar 				}
1497733b9277SNavdeep Parhar 			}
14984d6db4e0SNavdeep Parhar 			if (refill) {
14994d6db4e0SNavdeep Parhar 				FL_LOCK(fl);
15004d6db4e0SNavdeep Parhar 				refill_fl(sc, fl, 32);
15014d6db4e0SNavdeep Parhar 				FL_UNLOCK(fl);
15024d6db4e0SNavdeep Parhar 				fl_hw_cidx = fl->hw_cidx;
15034d6db4e0SNavdeep Parhar 			}
1504861e42b2SNavdeep Parhar 		}
1505733b9277SNavdeep Parhar 
15061458bff9SNavdeep Parhar process_iql:
1507733b9277SNavdeep Parhar 		if (STAILQ_EMPTY(&iql))
1508733b9277SNavdeep Parhar 			break;
1509733b9277SNavdeep Parhar 
1510733b9277SNavdeep Parhar 		/*
1511733b9277SNavdeep Parhar 		 * Process the head only, and send it to the back of the list if
1512733b9277SNavdeep Parhar 		 * it's still not done.
1513733b9277SNavdeep Parhar 		 */
1514733b9277SNavdeep Parhar 		q = STAILQ_FIRST(&iql);
1515733b9277SNavdeep Parhar 		STAILQ_REMOVE_HEAD(&iql, link);
1516733b9277SNavdeep Parhar 		if (service_iq(q, q->qsize / 8) == 0)
1517733b9277SNavdeep Parhar 			atomic_cmpset_int(&q->state, IQS_BUSY, IQS_IDLE);
1518733b9277SNavdeep Parhar 		else
1519733b9277SNavdeep Parhar 			STAILQ_INSERT_TAIL(&iql, q, link);
1520733b9277SNavdeep Parhar 	}
1521733b9277SNavdeep Parhar 
1522a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6)
1523733b9277SNavdeep Parhar 	if (iq->flags & IQ_LRO_ENABLED) {
1524733b9277SNavdeep Parhar 		struct lro_ctrl *lro = &rxq->lro;
1525733b9277SNavdeep Parhar 
15266dd38b87SSepherosa Ziehau 		tcp_lro_flush_all(lro);
1527733b9277SNavdeep Parhar 	}
1528733b9277SNavdeep Parhar #endif
1529733b9277SNavdeep Parhar 
1530733b9277SNavdeep Parhar 	t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_CIDXINC(ndescs) |
1531733b9277SNavdeep Parhar 	    V_INGRESSQID((u32)iq->cntxt_id) | V_SEINTARM(iq->intr_params));
1532733b9277SNavdeep Parhar 
1533733b9277SNavdeep Parhar 	if (iq->flags & IQ_HAS_FL) {
1534733b9277SNavdeep Parhar 		int starved;
1535733b9277SNavdeep Parhar 
1536733b9277SNavdeep Parhar 		FL_LOCK(fl);
153738035ed6SNavdeep Parhar 		starved = refill_fl(sc, fl, 64);
1538733b9277SNavdeep Parhar 		FL_UNLOCK(fl);
1539733b9277SNavdeep Parhar 		if (__predict_false(starved != 0))
1540733b9277SNavdeep Parhar 			add_fl_to_sfl(sc, fl);
1541733b9277SNavdeep Parhar 	}
1542733b9277SNavdeep Parhar 
1543733b9277SNavdeep Parhar 	return (0);
1544733b9277SNavdeep Parhar }
1545733b9277SNavdeep Parhar 
154638035ed6SNavdeep Parhar static inline int
154738035ed6SNavdeep Parhar cl_has_metadata(struct sge_fl *fl, struct cluster_layout *cll)
15481458bff9SNavdeep Parhar {
154938035ed6SNavdeep Parhar 	int rc = fl->flags & FL_BUF_PACKING || cll->region1 > 0;
15501458bff9SNavdeep Parhar 
155138035ed6SNavdeep Parhar 	if (rc)
155238035ed6SNavdeep Parhar 		MPASS(cll->region3 >= CL_METADATA_SIZE);
155338035ed6SNavdeep Parhar 
155438035ed6SNavdeep Parhar 	return (rc);
15551458bff9SNavdeep Parhar }
15561458bff9SNavdeep Parhar 
155738035ed6SNavdeep Parhar static inline struct cluster_metadata *
155838035ed6SNavdeep Parhar cl_metadata(struct adapter *sc, struct sge_fl *fl, struct cluster_layout *cll,
155938035ed6SNavdeep Parhar     caddr_t cl)
15601458bff9SNavdeep Parhar {
15611458bff9SNavdeep Parhar 
156238035ed6SNavdeep Parhar 	if (cl_has_metadata(fl, cll)) {
156338035ed6SNavdeep Parhar 		struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
15641458bff9SNavdeep Parhar 
156538035ed6SNavdeep Parhar 		return ((struct cluster_metadata *)(cl + swz->size) - 1);
15661458bff9SNavdeep Parhar 	}
156738035ed6SNavdeep Parhar 	return (NULL);
15681458bff9SNavdeep Parhar }
15691458bff9SNavdeep Parhar 
157015c28f87SGleb Smirnoff static void
15711458bff9SNavdeep Parhar rxb_free(struct mbuf *m, void *arg1, void *arg2)
15721458bff9SNavdeep Parhar {
15731458bff9SNavdeep Parhar 	uma_zone_t zone = arg1;
15741458bff9SNavdeep Parhar 	caddr_t cl = arg2;
15751458bff9SNavdeep Parhar 
15761458bff9SNavdeep Parhar 	uma_zfree(zone, cl);
157782eff304SNavdeep Parhar 	counter_u64_add(extfree_rels, 1);
15781458bff9SNavdeep Parhar }
15791458bff9SNavdeep Parhar 
158038035ed6SNavdeep Parhar /*
158138035ed6SNavdeep Parhar  * The mbuf returned by this function could be allocated from zone_mbuf or
158238035ed6SNavdeep Parhar  * constructed in spare room in the cluster.
158338035ed6SNavdeep Parhar  *
158438035ed6SNavdeep Parhar  * The mbuf carries the payload in one of these ways
158538035ed6SNavdeep Parhar  * a) frame inside the mbuf (mbuf from zone_mbuf)
158638035ed6SNavdeep Parhar  * b) m_cljset (for clusters without metadata) zone_mbuf
158738035ed6SNavdeep Parhar  * c) m_extaddref (cluster with metadata) inline mbuf
158838035ed6SNavdeep Parhar  * d) m_extaddref (cluster with metadata) zone_mbuf
158938035ed6SNavdeep Parhar  */
15901458bff9SNavdeep Parhar static struct mbuf *
1591b741402cSNavdeep Parhar get_scatter_segment(struct adapter *sc, struct sge_fl *fl, int fr_offset,
1592b741402cSNavdeep Parhar     int remaining)
159338035ed6SNavdeep Parhar {
159438035ed6SNavdeep Parhar 	struct mbuf *m;
159538035ed6SNavdeep Parhar 	struct fl_sdesc *sd = &fl->sdesc[fl->cidx];
159638035ed6SNavdeep Parhar 	struct cluster_layout *cll = &sd->cll;
159738035ed6SNavdeep Parhar 	struct sw_zone_info *swz = &sc->sge.sw_zone_info[cll->zidx];
159838035ed6SNavdeep Parhar 	struct hw_buf_info *hwb = &sc->sge.hw_buf_info[cll->hwidx];
159938035ed6SNavdeep Parhar 	struct cluster_metadata *clm = cl_metadata(sc, fl, cll, sd->cl);
1600b741402cSNavdeep Parhar 	int len, blen;
160138035ed6SNavdeep Parhar 	caddr_t payload;
160238035ed6SNavdeep Parhar 
1603b741402cSNavdeep Parhar 	blen = hwb->size - fl->rx_offset;	/* max possible in this buf */
1604b741402cSNavdeep Parhar 	len = min(remaining, blen);
160538035ed6SNavdeep Parhar 	payload = sd->cl + cll->region1 + fl->rx_offset;
1606e3207e19SNavdeep Parhar 	if (fl->flags & FL_BUF_PACKING) {
1607b741402cSNavdeep Parhar 		const u_int l = fr_offset + len;
1608b741402cSNavdeep Parhar 		const u_int pad = roundup2(l, fl->buf_boundary) - l;
1609b741402cSNavdeep Parhar 
1610b741402cSNavdeep Parhar 		if (fl->rx_offset + len + pad < hwb->size)
1611b741402cSNavdeep Parhar 			blen = len + pad;
1612b741402cSNavdeep Parhar 		MPASS(fl->rx_offset + blen <= hwb->size);
1613e3207e19SNavdeep Parhar 	} else {
1614e3207e19SNavdeep Parhar 		MPASS(fl->rx_offset == 0);	/* not packing */
1615e3207e19SNavdeep Parhar 	}
161638035ed6SNavdeep Parhar 
1617b741402cSNavdeep Parhar 
161838035ed6SNavdeep Parhar 	if (sc->sc_do_rxcopy && len < RX_COPY_THRESHOLD) {
161938035ed6SNavdeep Parhar 
162038035ed6SNavdeep Parhar 		/*
162138035ed6SNavdeep Parhar 		 * Copy payload into a freshly allocated mbuf.
162238035ed6SNavdeep Parhar 		 */
162338035ed6SNavdeep Parhar 
1624b741402cSNavdeep Parhar 		m = fr_offset == 0 ?
162538035ed6SNavdeep Parhar 		    m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA);
162638035ed6SNavdeep Parhar 		if (m == NULL)
162738035ed6SNavdeep Parhar 			return (NULL);
162838035ed6SNavdeep Parhar 		fl->mbuf_allocated++;
162938035ed6SNavdeep Parhar #ifdef T4_PKT_TIMESTAMP
163038035ed6SNavdeep Parhar 		/* Leave room for a timestamp */
163138035ed6SNavdeep Parhar 		m->m_data += 8;
163238035ed6SNavdeep Parhar #endif
163338035ed6SNavdeep Parhar 		/* copy data to mbuf */
163438035ed6SNavdeep Parhar 		bcopy(payload, mtod(m, caddr_t), len);
163538035ed6SNavdeep Parhar 
1636c3fb7725SNavdeep Parhar 	} else if (sd->nmbuf * MSIZE < cll->region1) {
163738035ed6SNavdeep Parhar 
163838035ed6SNavdeep Parhar 		/*
163938035ed6SNavdeep Parhar 		 * There's spare room in the cluster for an mbuf.  Create one
1640ccc69b2fSNavdeep Parhar 		 * and associate it with the payload that's in the cluster.
164138035ed6SNavdeep Parhar 		 */
164238035ed6SNavdeep Parhar 
164338035ed6SNavdeep Parhar 		MPASS(clm != NULL);
1644c3fb7725SNavdeep Parhar 		m = (struct mbuf *)(sd->cl + sd->nmbuf * MSIZE);
164538035ed6SNavdeep Parhar 		/* No bzero required */
1646b4b12e52SGleb Smirnoff 		if (m_init(m, M_NOWAIT, MT_DATA,
1647b741402cSNavdeep Parhar 		    fr_offset == 0 ? M_PKTHDR | M_NOFREE : M_NOFREE))
164838035ed6SNavdeep Parhar 			return (NULL);
164938035ed6SNavdeep Parhar 		fl->mbuf_inlined++;
1650b741402cSNavdeep Parhar 		m_extaddref(m, payload, blen, &clm->refcount, rxb_free,
165138035ed6SNavdeep Parhar 		    swz->zone, sd->cl);
165282eff304SNavdeep Parhar 		if (sd->nmbuf++ == 0)
165382eff304SNavdeep Parhar 			counter_u64_add(extfree_refs, 1);
165438035ed6SNavdeep Parhar 
165538035ed6SNavdeep Parhar 	} else {
165638035ed6SNavdeep Parhar 
165738035ed6SNavdeep Parhar 		/*
165838035ed6SNavdeep Parhar 		 * Grab an mbuf from zone_mbuf and associate it with the
165938035ed6SNavdeep Parhar 		 * payload in the cluster.
166038035ed6SNavdeep Parhar 		 */
166138035ed6SNavdeep Parhar 
1662b741402cSNavdeep Parhar 		m = fr_offset == 0 ?
166338035ed6SNavdeep Parhar 		    m_gethdr(M_NOWAIT, MT_DATA) : m_get(M_NOWAIT, MT_DATA);
166438035ed6SNavdeep Parhar 		if (m == NULL)
166538035ed6SNavdeep Parhar 			return (NULL);
166638035ed6SNavdeep Parhar 		fl->mbuf_allocated++;
1667ccc69b2fSNavdeep Parhar 		if (clm != NULL) {
1668b741402cSNavdeep Parhar 			m_extaddref(m, payload, blen, &clm->refcount,
166938035ed6SNavdeep Parhar 			    rxb_free, swz->zone, sd->cl);
167082eff304SNavdeep Parhar 			if (sd->nmbuf++ == 0)
167182eff304SNavdeep Parhar 				counter_u64_add(extfree_refs, 1);
1672ccc69b2fSNavdeep Parhar 		} else {
167338035ed6SNavdeep Parhar 			m_cljset(m, sd->cl, swz->type);
167438035ed6SNavdeep Parhar 			sd->cl = NULL;	/* consumed, not a recycle candidate */
167538035ed6SNavdeep Parhar 		}
167638035ed6SNavdeep Parhar 	}
1677b741402cSNavdeep Parhar 	if (fr_offset == 0)
1678b741402cSNavdeep Parhar 		m->m_pkthdr.len = remaining;
167938035ed6SNavdeep Parhar 	m->m_len = len;
168038035ed6SNavdeep Parhar 
168138035ed6SNavdeep Parhar 	if (fl->flags & FL_BUF_PACKING) {
1682b741402cSNavdeep Parhar 		fl->rx_offset += blen;
168338035ed6SNavdeep Parhar 		MPASS(fl->rx_offset <= hwb->size);
168438035ed6SNavdeep Parhar 		if (fl->rx_offset < hwb->size)
168538035ed6SNavdeep Parhar 			return (m);	/* without advancing the cidx */
168638035ed6SNavdeep Parhar 	}
168738035ed6SNavdeep Parhar 
16884d6db4e0SNavdeep Parhar 	if (__predict_false(++fl->cidx % 8 == 0)) {
16894d6db4e0SNavdeep Parhar 		uint16_t cidx = fl->cidx / 8;
16904d6db4e0SNavdeep Parhar 
16914d6db4e0SNavdeep Parhar 		if (__predict_false(cidx == fl->sidx))
16924d6db4e0SNavdeep Parhar 			fl->cidx = cidx = 0;
16934d6db4e0SNavdeep Parhar 		fl->hw_cidx = cidx;
16944d6db4e0SNavdeep Parhar 	}
169538035ed6SNavdeep Parhar 	fl->rx_offset = 0;
169638035ed6SNavdeep Parhar 
169738035ed6SNavdeep Parhar 	return (m);
169838035ed6SNavdeep Parhar }
169938035ed6SNavdeep Parhar 
170038035ed6SNavdeep Parhar static struct mbuf *
17014d6db4e0SNavdeep Parhar get_fl_payload(struct adapter *sc, struct sge_fl *fl, uint32_t len_newbuf)
17021458bff9SNavdeep Parhar {
170338035ed6SNavdeep Parhar 	struct mbuf *m0, *m, **pnext;
1704b741402cSNavdeep Parhar 	u_int remaining;
1705b741402cSNavdeep Parhar 	const u_int total = G_RSPD_LEN(len_newbuf);
17061458bff9SNavdeep Parhar 
17074d6db4e0SNavdeep Parhar 	if (__predict_false(fl->flags & FL_BUF_RESUME)) {
1708368541baSNavdeep Parhar 		M_ASSERTPKTHDR(fl->m0);
1709b741402cSNavdeep Parhar 		MPASS(fl->m0->m_pkthdr.len == total);
1710b741402cSNavdeep Parhar 		MPASS(fl->remaining < total);
17111458bff9SNavdeep Parhar 
171238035ed6SNavdeep Parhar 		m0 = fl->m0;
171338035ed6SNavdeep Parhar 		pnext = fl->pnext;
1714b741402cSNavdeep Parhar 		remaining = fl->remaining;
17154d6db4e0SNavdeep Parhar 		fl->flags &= ~FL_BUF_RESUME;
171638035ed6SNavdeep Parhar 		goto get_segment;
17171458bff9SNavdeep Parhar 	}
17181458bff9SNavdeep Parhar 
171938035ed6SNavdeep Parhar 	if (fl->rx_offset > 0 && len_newbuf & F_RSPD_NEWBUF) {
17201458bff9SNavdeep Parhar 		fl->rx_offset = 0;
17214d6db4e0SNavdeep Parhar 		if (__predict_false(++fl->cidx % 8 == 0)) {
17224d6db4e0SNavdeep Parhar 			uint16_t cidx = fl->cidx / 8;
17234d6db4e0SNavdeep Parhar 
17244d6db4e0SNavdeep Parhar 			if (__predict_false(cidx == fl->sidx))
17254d6db4e0SNavdeep Parhar 				fl->cidx = cidx = 0;
17264d6db4e0SNavdeep Parhar 			fl->hw_cidx = cidx;
17274d6db4e0SNavdeep Parhar 		}
17281458bff9SNavdeep Parhar 	}
17291458bff9SNavdeep Parhar 
17301458bff9SNavdeep Parhar 	/*
173138035ed6SNavdeep Parhar 	 * Payload starts at rx_offset in the current hw buffer.  Its length is
173238035ed6SNavdeep Parhar 	 * 'len' and it may span multiple hw buffers.
17331458bff9SNavdeep Parhar 	 */
17341458bff9SNavdeep Parhar 
1735b741402cSNavdeep Parhar 	m0 = get_scatter_segment(sc, fl, 0, total);
1736368541baSNavdeep Parhar 	if (m0 == NULL)
17374d6db4e0SNavdeep Parhar 		return (NULL);
1738b741402cSNavdeep Parhar 	remaining = total - m0->m_len;
173938035ed6SNavdeep Parhar 	pnext = &m0->m_next;
1740b741402cSNavdeep Parhar 	while (remaining > 0) {
174138035ed6SNavdeep Parhar get_segment:
174238035ed6SNavdeep Parhar 		MPASS(fl->rx_offset == 0);
1743b741402cSNavdeep Parhar 		m = get_scatter_segment(sc, fl, total - remaining, remaining);
17444d6db4e0SNavdeep Parhar 		if (__predict_false(m == NULL)) {
174538035ed6SNavdeep Parhar 			fl->m0 = m0;
174638035ed6SNavdeep Parhar 			fl->pnext = pnext;
1747b741402cSNavdeep Parhar 			fl->remaining = remaining;
17484d6db4e0SNavdeep Parhar 			fl->flags |= FL_BUF_RESUME;
17494d6db4e0SNavdeep Parhar 			return (NULL);
17501458bff9SNavdeep Parhar 		}
175138035ed6SNavdeep Parhar 		*pnext = m;
175238035ed6SNavdeep Parhar 		pnext = &m->m_next;
1753b741402cSNavdeep Parhar 		remaining -= m->m_len;
1754733b9277SNavdeep Parhar 	}
175538035ed6SNavdeep Parhar 	*pnext = NULL;
17564d6db4e0SNavdeep Parhar 
1757dbbf46c4SNavdeep Parhar 	M_ASSERTPKTHDR(m0);
1758733b9277SNavdeep Parhar 	return (m0);
1759733b9277SNavdeep Parhar }
1760733b9277SNavdeep Parhar 
1761733b9277SNavdeep Parhar static int
1762733b9277SNavdeep Parhar t4_eth_rx(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m0)
1763733b9277SNavdeep Parhar {
17643c51d154SNavdeep Parhar 	struct sge_rxq *rxq = iq_to_rxq(iq);
1765733b9277SNavdeep Parhar 	struct ifnet *ifp = rxq->ifp;
176690e7434aSNavdeep Parhar 	struct adapter *sc = iq->adapter;
1767733b9277SNavdeep Parhar 	const struct cpl_rx_pkt *cpl = (const void *)(rss + 1);
1768a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6)
1769733b9277SNavdeep Parhar 	struct lro_ctrl *lro = &rxq->lro;
1770733b9277SNavdeep Parhar #endif
177170ca6229SNavdeep Parhar 	static const int sw_hashtype[4][2] = {
177270ca6229SNavdeep Parhar 		{M_HASHTYPE_NONE, M_HASHTYPE_NONE},
177370ca6229SNavdeep Parhar 		{M_HASHTYPE_RSS_IPV4, M_HASHTYPE_RSS_IPV6},
177470ca6229SNavdeep Parhar 		{M_HASHTYPE_RSS_TCP_IPV4, M_HASHTYPE_RSS_TCP_IPV6},
177570ca6229SNavdeep Parhar 		{M_HASHTYPE_RSS_UDP_IPV4, M_HASHTYPE_RSS_UDP_IPV6},
177670ca6229SNavdeep Parhar 	};
1777733b9277SNavdeep Parhar 
1778733b9277SNavdeep Parhar 	KASSERT(m0 != NULL, ("%s: no payload with opcode %02x", __func__,
1779733b9277SNavdeep Parhar 	    rss->opcode));
1780733b9277SNavdeep Parhar 
178190e7434aSNavdeep Parhar 	m0->m_pkthdr.len -= sc->params.sge.fl_pktshift;
178290e7434aSNavdeep Parhar 	m0->m_len -= sc->params.sge.fl_pktshift;
178390e7434aSNavdeep Parhar 	m0->m_data += sc->params.sge.fl_pktshift;
178454e4ee71SNavdeep Parhar 
178554e4ee71SNavdeep Parhar 	m0->m_pkthdr.rcvif = ifp;
178670ca6229SNavdeep Parhar 	M_HASHTYPE_SET(m0, sw_hashtype[rss->hash_type][rss->ipv6]);
1787273ef991SNavdeep Parhar 	m0->m_pkthdr.flowid = be32toh(rss->hash_val);
178854e4ee71SNavdeep Parhar 
17899600bf00SNavdeep Parhar 	if (cpl->csum_calc && !cpl->err_vec) {
17909600bf00SNavdeep Parhar 		if (ifp->if_capenable & IFCAP_RXCSUM &&
17919600bf00SNavdeep Parhar 		    cpl->l2info & htobe32(F_RXF_IP)) {
1792932b1a5fSNavdeep Parhar 			m0->m_pkthdr.csum_flags = (CSUM_IP_CHECKED |
179354e4ee71SNavdeep Parhar 			    CSUM_IP_VALID | CSUM_DATA_VALID | CSUM_PSEUDO_HDR);
17949600bf00SNavdeep Parhar 			rxq->rxcsum++;
17959600bf00SNavdeep Parhar 		} else if (ifp->if_capenable & IFCAP_RXCSUM_IPV6 &&
17969600bf00SNavdeep Parhar 		    cpl->l2info & htobe32(F_RXF_IP6)) {
1797932b1a5fSNavdeep Parhar 			m0->m_pkthdr.csum_flags = (CSUM_DATA_VALID_IPV6 |
17989600bf00SNavdeep Parhar 			    CSUM_PSEUDO_HDR);
17999600bf00SNavdeep Parhar 			rxq->rxcsum++;
18009600bf00SNavdeep Parhar 		}
18019600bf00SNavdeep Parhar 
18029600bf00SNavdeep Parhar 		if (__predict_false(cpl->ip_frag))
180354e4ee71SNavdeep Parhar 			m0->m_pkthdr.csum_data = be16toh(cpl->csum);
180454e4ee71SNavdeep Parhar 		else
180554e4ee71SNavdeep Parhar 			m0->m_pkthdr.csum_data = 0xffff;
180654e4ee71SNavdeep Parhar 	}
180754e4ee71SNavdeep Parhar 
180854e4ee71SNavdeep Parhar 	if (cpl->vlan_ex) {
180954e4ee71SNavdeep Parhar 		m0->m_pkthdr.ether_vtag = be16toh(cpl->vlan);
181054e4ee71SNavdeep Parhar 		m0->m_flags |= M_VLANTAG;
181154e4ee71SNavdeep Parhar 		rxq->vlan_extraction++;
181254e4ee71SNavdeep Parhar 	}
181354e4ee71SNavdeep Parhar 
1814a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6)
181554e4ee71SNavdeep Parhar 	if (cpl->l2info & htobe32(F_RXF_LRO) &&
1816733b9277SNavdeep Parhar 	    iq->flags & IQ_LRO_ENABLED &&
181754e4ee71SNavdeep Parhar 	    tcp_lro_rx(lro, m0, 0) == 0) {
181854e4ee71SNavdeep Parhar 		/* queued for LRO */
181954e4ee71SNavdeep Parhar 	} else
182054e4ee71SNavdeep Parhar #endif
18217d29df59SNavdeep Parhar 	ifp->if_input(ifp, m0);
182254e4ee71SNavdeep Parhar 
1823733b9277SNavdeep Parhar 	return (0);
182454e4ee71SNavdeep Parhar }
182554e4ee71SNavdeep Parhar 
1826733b9277SNavdeep Parhar /*
18277951040fSNavdeep Parhar  * Must drain the wrq or make sure that someone else will.
18287951040fSNavdeep Parhar  */
18297951040fSNavdeep Parhar static void
18307951040fSNavdeep Parhar wrq_tx_drain(void *arg, int n)
18317951040fSNavdeep Parhar {
18327951040fSNavdeep Parhar 	struct sge_wrq *wrq = arg;
18337951040fSNavdeep Parhar 	struct sge_eq *eq = &wrq->eq;
18347951040fSNavdeep Parhar 
18357951040fSNavdeep Parhar 	EQ_LOCK(eq);
18367951040fSNavdeep Parhar 	if (TAILQ_EMPTY(&wrq->incomplete_wrs) && !STAILQ_EMPTY(&wrq->wr_list))
18377951040fSNavdeep Parhar 		drain_wrq_wr_list(wrq->adapter, wrq);
18387951040fSNavdeep Parhar 	EQ_UNLOCK(eq);
18397951040fSNavdeep Parhar }
18407951040fSNavdeep Parhar 
18417951040fSNavdeep Parhar static void
18427951040fSNavdeep Parhar drain_wrq_wr_list(struct adapter *sc, struct sge_wrq *wrq)
18437951040fSNavdeep Parhar {
18447951040fSNavdeep Parhar 	struct sge_eq *eq = &wrq->eq;
18457951040fSNavdeep Parhar 	u_int available, dbdiff;	/* # of hardware descriptors */
18467951040fSNavdeep Parhar 	u_int n;
18477951040fSNavdeep Parhar 	struct wrqe *wr;
18487951040fSNavdeep Parhar 	struct fw_eth_tx_pkt_wr *dst;	/* any fw WR struct will do */
18497951040fSNavdeep Parhar 
18507951040fSNavdeep Parhar 	EQ_LOCK_ASSERT_OWNED(eq);
18517951040fSNavdeep Parhar 	MPASS(TAILQ_EMPTY(&wrq->incomplete_wrs));
18527951040fSNavdeep Parhar 	wr = STAILQ_FIRST(&wrq->wr_list);
18537951040fSNavdeep Parhar 	MPASS(wr != NULL);	/* Must be called with something useful to do */
1854cda2ab0eSNavdeep Parhar 	MPASS(eq->pidx == eq->dbidx);
1855cda2ab0eSNavdeep Parhar 	dbdiff = 0;
18567951040fSNavdeep Parhar 
18577951040fSNavdeep Parhar 	do {
18587951040fSNavdeep Parhar 		eq->cidx = read_hw_cidx(eq);
18597951040fSNavdeep Parhar 		if (eq->pidx == eq->cidx)
18607951040fSNavdeep Parhar 			available = eq->sidx - 1;
18617951040fSNavdeep Parhar 		else
18627951040fSNavdeep Parhar 			available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1;
18637951040fSNavdeep Parhar 
18647951040fSNavdeep Parhar 		MPASS(wr->wrq == wrq);
18657951040fSNavdeep Parhar 		n = howmany(wr->wr_len, EQ_ESIZE);
18667951040fSNavdeep Parhar 		if (available < n)
1867cda2ab0eSNavdeep Parhar 			break;
18687951040fSNavdeep Parhar 
18697951040fSNavdeep Parhar 		dst = (void *)&eq->desc[eq->pidx];
18707951040fSNavdeep Parhar 		if (__predict_true(eq->sidx - eq->pidx > n)) {
18717951040fSNavdeep Parhar 			/* Won't wrap, won't end exactly at the status page. */
18727951040fSNavdeep Parhar 			bcopy(&wr->wr[0], dst, wr->wr_len);
18737951040fSNavdeep Parhar 			eq->pidx += n;
18747951040fSNavdeep Parhar 		} else {
18757951040fSNavdeep Parhar 			int first_portion = (eq->sidx - eq->pidx) * EQ_ESIZE;
18767951040fSNavdeep Parhar 
18777951040fSNavdeep Parhar 			bcopy(&wr->wr[0], dst, first_portion);
18787951040fSNavdeep Parhar 			if (wr->wr_len > first_portion) {
18797951040fSNavdeep Parhar 				bcopy(&wr->wr[first_portion], &eq->desc[0],
18807951040fSNavdeep Parhar 				    wr->wr_len - first_portion);
18817951040fSNavdeep Parhar 			}
18827951040fSNavdeep Parhar 			eq->pidx = n - (eq->sidx - eq->pidx);
18837951040fSNavdeep Parhar 		}
18847951040fSNavdeep Parhar 
18857951040fSNavdeep Parhar 		if (available < eq->sidx / 4 &&
18867951040fSNavdeep Parhar 		    atomic_cmpset_int(&eq->equiq, 0, 1)) {
18877951040fSNavdeep Parhar 			dst->equiq_to_len16 |= htobe32(F_FW_WR_EQUIQ |
18887951040fSNavdeep Parhar 			    F_FW_WR_EQUEQ);
18897951040fSNavdeep Parhar 			eq->equeqidx = eq->pidx;
18907951040fSNavdeep Parhar 		} else if (IDXDIFF(eq->pidx, eq->equeqidx, eq->sidx) >= 32) {
18917951040fSNavdeep Parhar 			dst->equiq_to_len16 |= htobe32(F_FW_WR_EQUEQ);
18927951040fSNavdeep Parhar 			eq->equeqidx = eq->pidx;
18937951040fSNavdeep Parhar 		}
18947951040fSNavdeep Parhar 
18957951040fSNavdeep Parhar 		dbdiff += n;
18967951040fSNavdeep Parhar 		if (dbdiff >= 16) {
18977951040fSNavdeep Parhar 			ring_eq_db(sc, eq, dbdiff);
18987951040fSNavdeep Parhar 			dbdiff = 0;
18997951040fSNavdeep Parhar 		}
19007951040fSNavdeep Parhar 
19017951040fSNavdeep Parhar 		STAILQ_REMOVE_HEAD(&wrq->wr_list, link);
19027951040fSNavdeep Parhar 		free_wrqe(wr);
19037951040fSNavdeep Parhar 		MPASS(wrq->nwr_pending > 0);
19047951040fSNavdeep Parhar 		wrq->nwr_pending--;
19057951040fSNavdeep Parhar 		MPASS(wrq->ndesc_needed >= n);
19067951040fSNavdeep Parhar 		wrq->ndesc_needed -= n;
19077951040fSNavdeep Parhar 	} while ((wr = STAILQ_FIRST(&wrq->wr_list)) != NULL);
19087951040fSNavdeep Parhar 
19097951040fSNavdeep Parhar 	if (dbdiff)
19107951040fSNavdeep Parhar 		ring_eq_db(sc, eq, dbdiff);
19117951040fSNavdeep Parhar }
19127951040fSNavdeep Parhar 
19137951040fSNavdeep Parhar /*
1914733b9277SNavdeep Parhar  * Doesn't fail.  Holds on to work requests it can't send right away.
1915733b9277SNavdeep Parhar  */
191609fe6320SNavdeep Parhar void
191709fe6320SNavdeep Parhar t4_wrq_tx_locked(struct adapter *sc, struct sge_wrq *wrq, struct wrqe *wr)
1918733b9277SNavdeep Parhar {
1919733b9277SNavdeep Parhar #ifdef INVARIANTS
19207951040fSNavdeep Parhar 	struct sge_eq *eq = &wrq->eq;
1921733b9277SNavdeep Parhar #endif
1922733b9277SNavdeep Parhar 
19237951040fSNavdeep Parhar 	EQ_LOCK_ASSERT_OWNED(eq);
19247951040fSNavdeep Parhar 	MPASS(wr != NULL);
19257951040fSNavdeep Parhar 	MPASS(wr->wr_len > 0 && wr->wr_len <= SGE_MAX_WR_LEN);
19267951040fSNavdeep Parhar 	MPASS((wr->wr_len & 0x7) == 0);
1927733b9277SNavdeep Parhar 
19287951040fSNavdeep Parhar 	STAILQ_INSERT_TAIL(&wrq->wr_list, wr, link);
19297951040fSNavdeep Parhar 	wrq->nwr_pending++;
19307951040fSNavdeep Parhar 	wrq->ndesc_needed += howmany(wr->wr_len, EQ_ESIZE);
1931733b9277SNavdeep Parhar 
19327951040fSNavdeep Parhar 	if (!TAILQ_EMPTY(&wrq->incomplete_wrs))
19337951040fSNavdeep Parhar 		return;	/* commit_wrq_wr will drain wr_list as well. */
1934733b9277SNavdeep Parhar 
19357951040fSNavdeep Parhar 	drain_wrq_wr_list(sc, wrq);
1936733b9277SNavdeep Parhar 
19377951040fSNavdeep Parhar 	/* Doorbell must have caught up to the pidx. */
19387951040fSNavdeep Parhar 	MPASS(eq->pidx == eq->dbidx);
193954e4ee71SNavdeep Parhar }
194054e4ee71SNavdeep Parhar 
194154e4ee71SNavdeep Parhar void
194254e4ee71SNavdeep Parhar t4_update_fl_bufsize(struct ifnet *ifp)
194354e4ee71SNavdeep Parhar {
1944fe2ebb76SJohn Baldwin 	struct vi_info *vi = ifp->if_softc;
1945fe2ebb76SJohn Baldwin 	struct adapter *sc = vi->pi->adapter;
194654e4ee71SNavdeep Parhar 	struct sge_rxq *rxq;
19476eb3180fSNavdeep Parhar #ifdef TCP_OFFLOAD
19486eb3180fSNavdeep Parhar 	struct sge_ofld_rxq *ofld_rxq;
19496eb3180fSNavdeep Parhar #endif
195054e4ee71SNavdeep Parhar 	struct sge_fl *fl;
195138035ed6SNavdeep Parhar 	int i, maxp, mtu = ifp->if_mtu;
195254e4ee71SNavdeep Parhar 
195338035ed6SNavdeep Parhar 	maxp = mtu_to_max_payload(sc, mtu, 0);
1954fe2ebb76SJohn Baldwin 	for_each_rxq(vi, i, rxq) {
195554e4ee71SNavdeep Parhar 		fl = &rxq->fl;
195654e4ee71SNavdeep Parhar 
195754e4ee71SNavdeep Parhar 		FL_LOCK(fl);
195838035ed6SNavdeep Parhar 		find_best_refill_source(sc, fl, maxp);
195954e4ee71SNavdeep Parhar 		FL_UNLOCK(fl);
196054e4ee71SNavdeep Parhar 	}
19616eb3180fSNavdeep Parhar #ifdef TCP_OFFLOAD
196238035ed6SNavdeep Parhar 	maxp = mtu_to_max_payload(sc, mtu, 1);
1963fe2ebb76SJohn Baldwin 	for_each_ofld_rxq(vi, i, ofld_rxq) {
19646eb3180fSNavdeep Parhar 		fl = &ofld_rxq->fl;
19656eb3180fSNavdeep Parhar 
19666eb3180fSNavdeep Parhar 		FL_LOCK(fl);
196738035ed6SNavdeep Parhar 		find_best_refill_source(sc, fl, maxp);
19686eb3180fSNavdeep Parhar 		FL_UNLOCK(fl);
19696eb3180fSNavdeep Parhar 	}
19706eb3180fSNavdeep Parhar #endif
197154e4ee71SNavdeep Parhar }
197254e4ee71SNavdeep Parhar 
19737951040fSNavdeep Parhar static inline int
19747951040fSNavdeep Parhar mbuf_nsegs(struct mbuf *m)
1975733b9277SNavdeep Parhar {
19760835ddc7SNavdeep Parhar 
19777951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
19787951040fSNavdeep Parhar 	KASSERT(m->m_pkthdr.l5hlen > 0,
19797951040fSNavdeep Parhar 	    ("%s: mbuf %p missing information on # of segments.", __func__, m));
19807951040fSNavdeep Parhar 
19817951040fSNavdeep Parhar 	return (m->m_pkthdr.l5hlen);
19827951040fSNavdeep Parhar }
19837951040fSNavdeep Parhar 
19847951040fSNavdeep Parhar static inline void
19857951040fSNavdeep Parhar set_mbuf_nsegs(struct mbuf *m, uint8_t nsegs)
19867951040fSNavdeep Parhar {
19877951040fSNavdeep Parhar 
19887951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
19897951040fSNavdeep Parhar 	m->m_pkthdr.l5hlen = nsegs;
19907951040fSNavdeep Parhar }
19917951040fSNavdeep Parhar 
19927951040fSNavdeep Parhar static inline int
19937951040fSNavdeep Parhar mbuf_len16(struct mbuf *m)
19947951040fSNavdeep Parhar {
19957951040fSNavdeep Parhar 	int n;
19967951040fSNavdeep Parhar 
19977951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
19987951040fSNavdeep Parhar 	n = m->m_pkthdr.PH_loc.eight[0];
19997951040fSNavdeep Parhar 	MPASS(n > 0 && n <= SGE_MAX_WR_LEN / 16);
20007951040fSNavdeep Parhar 
20017951040fSNavdeep Parhar 	return (n);
20027951040fSNavdeep Parhar }
20037951040fSNavdeep Parhar 
20047951040fSNavdeep Parhar static inline void
20057951040fSNavdeep Parhar set_mbuf_len16(struct mbuf *m, uint8_t len16)
20067951040fSNavdeep Parhar {
20077951040fSNavdeep Parhar 
20087951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
20097951040fSNavdeep Parhar 	m->m_pkthdr.PH_loc.eight[0] = len16;
20107951040fSNavdeep Parhar }
20117951040fSNavdeep Parhar 
20127951040fSNavdeep Parhar static inline int
20137951040fSNavdeep Parhar needs_tso(struct mbuf *m)
20147951040fSNavdeep Parhar {
20157951040fSNavdeep Parhar 
20167951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
20177951040fSNavdeep Parhar 
20187951040fSNavdeep Parhar 	if (m->m_pkthdr.csum_flags & CSUM_TSO) {
20197951040fSNavdeep Parhar 		KASSERT(m->m_pkthdr.tso_segsz > 0,
20207951040fSNavdeep Parhar 		    ("%s: TSO requested in mbuf %p but MSS not provided",
20217951040fSNavdeep Parhar 		    __func__, m));
20227951040fSNavdeep Parhar 		return (1);
20237951040fSNavdeep Parhar 	}
20247951040fSNavdeep Parhar 
20257951040fSNavdeep Parhar 	return (0);
20267951040fSNavdeep Parhar }
20277951040fSNavdeep Parhar 
20287951040fSNavdeep Parhar static inline int
20297951040fSNavdeep Parhar needs_l3_csum(struct mbuf *m)
20307951040fSNavdeep Parhar {
20317951040fSNavdeep Parhar 
20327951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
20337951040fSNavdeep Parhar 
20347951040fSNavdeep Parhar 	if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TSO))
20357951040fSNavdeep Parhar 		return (1);
20367951040fSNavdeep Parhar 	return (0);
20377951040fSNavdeep Parhar }
20387951040fSNavdeep Parhar 
20397951040fSNavdeep Parhar static inline int
20407951040fSNavdeep Parhar needs_l4_csum(struct mbuf *m)
20417951040fSNavdeep Parhar {
20427951040fSNavdeep Parhar 
20437951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
20447951040fSNavdeep Parhar 
20457951040fSNavdeep Parhar 	if (m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP | CSUM_UDP_IPV6 |
20467951040fSNavdeep Parhar 	    CSUM_TCP_IPV6 | CSUM_TSO))
20477951040fSNavdeep Parhar 		return (1);
20487951040fSNavdeep Parhar 	return (0);
20497951040fSNavdeep Parhar }
20507951040fSNavdeep Parhar 
20517951040fSNavdeep Parhar static inline int
20527951040fSNavdeep Parhar needs_vlan_insertion(struct mbuf *m)
20537951040fSNavdeep Parhar {
20547951040fSNavdeep Parhar 
20557951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
20567951040fSNavdeep Parhar 
20577951040fSNavdeep Parhar 	if (m->m_flags & M_VLANTAG) {
20587951040fSNavdeep Parhar 		KASSERT(m->m_pkthdr.ether_vtag != 0,
20597951040fSNavdeep Parhar 		    ("%s: HWVLAN requested in mbuf %p but tag not provided",
20607951040fSNavdeep Parhar 		    __func__, m));
20617951040fSNavdeep Parhar 		return (1);
20627951040fSNavdeep Parhar 	}
20637951040fSNavdeep Parhar 	return (0);
20647951040fSNavdeep Parhar }
20657951040fSNavdeep Parhar 
20667951040fSNavdeep Parhar static void *
20677951040fSNavdeep Parhar m_advance(struct mbuf **pm, int *poffset, int len)
20687951040fSNavdeep Parhar {
20697951040fSNavdeep Parhar 	struct mbuf *m = *pm;
20707951040fSNavdeep Parhar 	int offset = *poffset;
20717951040fSNavdeep Parhar 	uintptr_t p = 0;
20727951040fSNavdeep Parhar 
20737951040fSNavdeep Parhar 	MPASS(len > 0);
20747951040fSNavdeep Parhar 
20757951040fSNavdeep Parhar 	while (len) {
20767951040fSNavdeep Parhar 		if (offset + len < m->m_len) {
20777951040fSNavdeep Parhar 			offset += len;
20787951040fSNavdeep Parhar 			p = mtod(m, uintptr_t) + offset;
20797951040fSNavdeep Parhar 			break;
20807951040fSNavdeep Parhar 		}
20817951040fSNavdeep Parhar 		len -= m->m_len - offset;
20827951040fSNavdeep Parhar 		m = m->m_next;
20837951040fSNavdeep Parhar 		offset = 0;
20847951040fSNavdeep Parhar 		MPASS(m != NULL);
20857951040fSNavdeep Parhar 	}
20867951040fSNavdeep Parhar 	*poffset = offset;
20877951040fSNavdeep Parhar 	*pm = m;
20887951040fSNavdeep Parhar 	return ((void *)p);
20897951040fSNavdeep Parhar }
20907951040fSNavdeep Parhar 
20917951040fSNavdeep Parhar static inline int
20927951040fSNavdeep Parhar same_paddr(char *a, char *b)
20937951040fSNavdeep Parhar {
20947951040fSNavdeep Parhar 
20957951040fSNavdeep Parhar 	if (a == b)
20967951040fSNavdeep Parhar 		return (1);
20977951040fSNavdeep Parhar 	else if (a != NULL && b != NULL) {
20987951040fSNavdeep Parhar 		vm_offset_t x = (vm_offset_t)a;
20997951040fSNavdeep Parhar 		vm_offset_t y = (vm_offset_t)b;
21007951040fSNavdeep Parhar 
21017951040fSNavdeep Parhar 		if ((x & PAGE_MASK) == (y & PAGE_MASK) &&
21027951040fSNavdeep Parhar 		    pmap_kextract(x) == pmap_kextract(y))
21037951040fSNavdeep Parhar 			return (1);
21047951040fSNavdeep Parhar 	}
21057951040fSNavdeep Parhar 
21067951040fSNavdeep Parhar 	return (0);
21077951040fSNavdeep Parhar }
21087951040fSNavdeep Parhar 
21097951040fSNavdeep Parhar /*
21107951040fSNavdeep Parhar  * Can deal with empty mbufs in the chain that have m_len = 0, but the chain
21117951040fSNavdeep Parhar  * must have at least one mbuf that's not empty.
21127951040fSNavdeep Parhar  */
21137951040fSNavdeep Parhar static inline int
21147951040fSNavdeep Parhar count_mbuf_nsegs(struct mbuf *m)
21157951040fSNavdeep Parhar {
21167951040fSNavdeep Parhar 	char *prev_end, *start;
21177951040fSNavdeep Parhar 	int len, nsegs;
21187951040fSNavdeep Parhar 
21197951040fSNavdeep Parhar 	MPASS(m != NULL);
21207951040fSNavdeep Parhar 
21217951040fSNavdeep Parhar 	nsegs = 0;
21227951040fSNavdeep Parhar 	prev_end = NULL;
21237951040fSNavdeep Parhar 	for (; m; m = m->m_next) {
21247951040fSNavdeep Parhar 
21257951040fSNavdeep Parhar 		len = m->m_len;
21267951040fSNavdeep Parhar 		if (__predict_false(len == 0))
21277951040fSNavdeep Parhar 			continue;
21287951040fSNavdeep Parhar 		start = mtod(m, char *);
21297951040fSNavdeep Parhar 
21307951040fSNavdeep Parhar 		nsegs += sglist_count(start, len);
21317951040fSNavdeep Parhar 		if (same_paddr(prev_end, start))
21327951040fSNavdeep Parhar 			nsegs--;
21337951040fSNavdeep Parhar 		prev_end = start + len;
21347951040fSNavdeep Parhar 	}
21357951040fSNavdeep Parhar 
21367951040fSNavdeep Parhar 	MPASS(nsegs > 0);
21377951040fSNavdeep Parhar 	return (nsegs);
21387951040fSNavdeep Parhar }
21397951040fSNavdeep Parhar 
21407951040fSNavdeep Parhar /*
21417951040fSNavdeep Parhar  * Analyze the mbuf to determine its tx needs.  The mbuf passed in may change:
21427951040fSNavdeep Parhar  * a) caller can assume it's been freed if this function returns with an error.
21437951040fSNavdeep Parhar  * b) it may get defragged up if the gather list is too long for the hardware.
21447951040fSNavdeep Parhar  */
21457951040fSNavdeep Parhar int
21467951040fSNavdeep Parhar parse_pkt(struct mbuf **mp)
21477951040fSNavdeep Parhar {
21487951040fSNavdeep Parhar 	struct mbuf *m0 = *mp, *m;
21497951040fSNavdeep Parhar 	int rc, nsegs, defragged = 0, offset;
21507951040fSNavdeep Parhar 	struct ether_header *eh;
21517951040fSNavdeep Parhar 	void *l3hdr;
21527951040fSNavdeep Parhar #if defined(INET) || defined(INET6)
21537951040fSNavdeep Parhar 	struct tcphdr *tcp;
21547951040fSNavdeep Parhar #endif
21557951040fSNavdeep Parhar 	uint16_t eh_type;
21567951040fSNavdeep Parhar 
21577951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m0);
21587951040fSNavdeep Parhar 	if (__predict_false(m0->m_pkthdr.len < ETHER_HDR_LEN)) {
21597951040fSNavdeep Parhar 		rc = EINVAL;
21607951040fSNavdeep Parhar fail:
21617951040fSNavdeep Parhar 		m_freem(m0);
21627951040fSNavdeep Parhar 		*mp = NULL;
21637951040fSNavdeep Parhar 		return (rc);
21647951040fSNavdeep Parhar 	}
21657951040fSNavdeep Parhar restart:
21667951040fSNavdeep Parhar 	/*
21677951040fSNavdeep Parhar 	 * First count the number of gather list segments in the payload.
21687951040fSNavdeep Parhar 	 * Defrag the mbuf if nsegs exceeds the hardware limit.
21697951040fSNavdeep Parhar 	 */
21707951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m0);
21717951040fSNavdeep Parhar 	MPASS(m0->m_pkthdr.len > 0);
21727951040fSNavdeep Parhar 	nsegs = count_mbuf_nsegs(m0);
21737951040fSNavdeep Parhar 	if (nsegs > (needs_tso(m0) ? TX_SGL_SEGS_TSO : TX_SGL_SEGS)) {
21747951040fSNavdeep Parhar 		if (defragged++ > 0 || (m = m_defrag(m0, M_NOWAIT)) == NULL) {
21757951040fSNavdeep Parhar 			rc = EFBIG;
21767951040fSNavdeep Parhar 			goto fail;
21777951040fSNavdeep Parhar 		}
21787951040fSNavdeep Parhar 		*mp = m0 = m;	/* update caller's copy after defrag */
21797951040fSNavdeep Parhar 		goto restart;
21807951040fSNavdeep Parhar 	}
21817951040fSNavdeep Parhar 
21827951040fSNavdeep Parhar 	if (__predict_false(nsegs > 2 && m0->m_pkthdr.len <= MHLEN)) {
21837951040fSNavdeep Parhar 		m0 = m_pullup(m0, m0->m_pkthdr.len);
21847951040fSNavdeep Parhar 		if (m0 == NULL) {
21857951040fSNavdeep Parhar 			/* Should have left well enough alone. */
21867951040fSNavdeep Parhar 			rc = EFBIG;
21877951040fSNavdeep Parhar 			goto fail;
21887951040fSNavdeep Parhar 		}
21897951040fSNavdeep Parhar 		*mp = m0;	/* update caller's copy after pullup */
21907951040fSNavdeep Parhar 		goto restart;
21917951040fSNavdeep Parhar 	}
21927951040fSNavdeep Parhar 	set_mbuf_nsegs(m0, nsegs);
21937951040fSNavdeep Parhar 	set_mbuf_len16(m0, txpkt_len16(nsegs, needs_tso(m0)));
21947951040fSNavdeep Parhar 
21957951040fSNavdeep Parhar 	if (!needs_tso(m0))
21967951040fSNavdeep Parhar 		return (0);
21977951040fSNavdeep Parhar 
21987951040fSNavdeep Parhar 	m = m0;
21997951040fSNavdeep Parhar 	eh = mtod(m, struct ether_header *);
22007951040fSNavdeep Parhar 	eh_type = ntohs(eh->ether_type);
22017951040fSNavdeep Parhar 	if (eh_type == ETHERTYPE_VLAN) {
22027951040fSNavdeep Parhar 		struct ether_vlan_header *evh = (void *)eh;
22037951040fSNavdeep Parhar 
22047951040fSNavdeep Parhar 		eh_type = ntohs(evh->evl_proto);
22057951040fSNavdeep Parhar 		m0->m_pkthdr.l2hlen = sizeof(*evh);
22067951040fSNavdeep Parhar 	} else
22077951040fSNavdeep Parhar 		m0->m_pkthdr.l2hlen = sizeof(*eh);
22087951040fSNavdeep Parhar 
22097951040fSNavdeep Parhar 	offset = 0;
22107951040fSNavdeep Parhar 	l3hdr = m_advance(&m, &offset, m0->m_pkthdr.l2hlen);
22117951040fSNavdeep Parhar 
22127951040fSNavdeep Parhar 	switch (eh_type) {
22137951040fSNavdeep Parhar #ifdef INET6
22147951040fSNavdeep Parhar 	case ETHERTYPE_IPV6:
22157951040fSNavdeep Parhar 	{
22167951040fSNavdeep Parhar 		struct ip6_hdr *ip6 = l3hdr;
22177951040fSNavdeep Parhar 
22187951040fSNavdeep Parhar 		MPASS(ip6->ip6_nxt == IPPROTO_TCP);
22197951040fSNavdeep Parhar 
22207951040fSNavdeep Parhar 		m0->m_pkthdr.l3hlen = sizeof(*ip6);
22217951040fSNavdeep Parhar 		break;
22227951040fSNavdeep Parhar 	}
22237951040fSNavdeep Parhar #endif
22247951040fSNavdeep Parhar #ifdef INET
22257951040fSNavdeep Parhar 	case ETHERTYPE_IP:
22267951040fSNavdeep Parhar 	{
22277951040fSNavdeep Parhar 		struct ip *ip = l3hdr;
22287951040fSNavdeep Parhar 
22297951040fSNavdeep Parhar 		m0->m_pkthdr.l3hlen = ip->ip_hl * 4;
22307951040fSNavdeep Parhar 		break;
22317951040fSNavdeep Parhar 	}
22327951040fSNavdeep Parhar #endif
22337951040fSNavdeep Parhar 	default:
22347951040fSNavdeep Parhar 		panic("%s: ethertype 0x%04x unknown.  if_cxgbe must be compiled"
22357951040fSNavdeep Parhar 		    " with the same INET/INET6 options as the kernel.",
22367951040fSNavdeep Parhar 		    __func__, eh_type);
22377951040fSNavdeep Parhar 	}
22387951040fSNavdeep Parhar 
22397951040fSNavdeep Parhar #if defined(INET) || defined(INET6)
22407951040fSNavdeep Parhar 	tcp = m_advance(&m, &offset, m0->m_pkthdr.l3hlen);
22417951040fSNavdeep Parhar 	m0->m_pkthdr.l4hlen = tcp->th_off * 4;
22427951040fSNavdeep Parhar #endif
22437951040fSNavdeep Parhar 	MPASS(m0 == *mp);
22447951040fSNavdeep Parhar 	return (0);
22457951040fSNavdeep Parhar }
22467951040fSNavdeep Parhar 
22477951040fSNavdeep Parhar void *
22487951040fSNavdeep Parhar start_wrq_wr(struct sge_wrq *wrq, int len16, struct wrq_cookie *cookie)
22497951040fSNavdeep Parhar {
22507951040fSNavdeep Parhar 	struct sge_eq *eq = &wrq->eq;
22517951040fSNavdeep Parhar 	struct adapter *sc = wrq->adapter;
22527951040fSNavdeep Parhar 	int ndesc, available;
22537951040fSNavdeep Parhar 	struct wrqe *wr;
22547951040fSNavdeep Parhar 	void *w;
22557951040fSNavdeep Parhar 
22567951040fSNavdeep Parhar 	MPASS(len16 > 0);
22577951040fSNavdeep Parhar 	ndesc = howmany(len16, EQ_ESIZE / 16);
22587951040fSNavdeep Parhar 	MPASS(ndesc > 0 && ndesc <= SGE_MAX_WR_NDESC);
22597951040fSNavdeep Parhar 
22607951040fSNavdeep Parhar 	EQ_LOCK(eq);
22617951040fSNavdeep Parhar 
22627951040fSNavdeep Parhar 	if (!STAILQ_EMPTY(&wrq->wr_list))
22637951040fSNavdeep Parhar 		drain_wrq_wr_list(sc, wrq);
22647951040fSNavdeep Parhar 
22657951040fSNavdeep Parhar 	if (!STAILQ_EMPTY(&wrq->wr_list)) {
22667951040fSNavdeep Parhar slowpath:
22677951040fSNavdeep Parhar 		EQ_UNLOCK(eq);
22687951040fSNavdeep Parhar 		wr = alloc_wrqe(len16 * 16, wrq);
22697951040fSNavdeep Parhar 		if (__predict_false(wr == NULL))
22707951040fSNavdeep Parhar 			return (NULL);
22717951040fSNavdeep Parhar 		cookie->pidx = -1;
22727951040fSNavdeep Parhar 		cookie->ndesc = ndesc;
22737951040fSNavdeep Parhar 		return (&wr->wr);
22747951040fSNavdeep Parhar 	}
22757951040fSNavdeep Parhar 
22767951040fSNavdeep Parhar 	eq->cidx = read_hw_cidx(eq);
22777951040fSNavdeep Parhar 	if (eq->pidx == eq->cidx)
22787951040fSNavdeep Parhar 		available = eq->sidx - 1;
22797951040fSNavdeep Parhar 	else
22807951040fSNavdeep Parhar 		available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1;
22817951040fSNavdeep Parhar 	if (available < ndesc)
22827951040fSNavdeep Parhar 		goto slowpath;
22837951040fSNavdeep Parhar 
22847951040fSNavdeep Parhar 	cookie->pidx = eq->pidx;
22857951040fSNavdeep Parhar 	cookie->ndesc = ndesc;
22867951040fSNavdeep Parhar 	TAILQ_INSERT_TAIL(&wrq->incomplete_wrs, cookie, link);
22877951040fSNavdeep Parhar 
22887951040fSNavdeep Parhar 	w = &eq->desc[eq->pidx];
22897951040fSNavdeep Parhar 	IDXINCR(eq->pidx, ndesc, eq->sidx);
22907951040fSNavdeep Parhar 	if (__predict_false(eq->pidx < ndesc - 1)) {
22917951040fSNavdeep Parhar 		w = &wrq->ss[0];
22927951040fSNavdeep Parhar 		wrq->ss_pidx = cookie->pidx;
22937951040fSNavdeep Parhar 		wrq->ss_len = len16 * 16;
22947951040fSNavdeep Parhar 	}
22957951040fSNavdeep Parhar 
22967951040fSNavdeep Parhar 	EQ_UNLOCK(eq);
22977951040fSNavdeep Parhar 
22987951040fSNavdeep Parhar 	return (w);
22997951040fSNavdeep Parhar }
23007951040fSNavdeep Parhar 
23017951040fSNavdeep Parhar void
23027951040fSNavdeep Parhar commit_wrq_wr(struct sge_wrq *wrq, void *w, struct wrq_cookie *cookie)
23037951040fSNavdeep Parhar {
23047951040fSNavdeep Parhar 	struct sge_eq *eq = &wrq->eq;
23057951040fSNavdeep Parhar 	struct adapter *sc = wrq->adapter;
23067951040fSNavdeep Parhar 	int ndesc, pidx;
23077951040fSNavdeep Parhar 	struct wrq_cookie *prev, *next;
23087951040fSNavdeep Parhar 
23097951040fSNavdeep Parhar 	if (cookie->pidx == -1) {
23107951040fSNavdeep Parhar 		struct wrqe *wr = __containerof(w, struct wrqe, wr);
23117951040fSNavdeep Parhar 
23127951040fSNavdeep Parhar 		t4_wrq_tx(sc, wr);
23137951040fSNavdeep Parhar 		return;
23147951040fSNavdeep Parhar 	}
23157951040fSNavdeep Parhar 
23167951040fSNavdeep Parhar 	ndesc = cookie->ndesc;	/* Can be more than SGE_MAX_WR_NDESC here. */
23177951040fSNavdeep Parhar 	pidx = cookie->pidx;
23187951040fSNavdeep Parhar 	MPASS(pidx >= 0 && pidx < eq->sidx);
23197951040fSNavdeep Parhar 	if (__predict_false(w == &wrq->ss[0])) {
23207951040fSNavdeep Parhar 		int n = (eq->sidx - wrq->ss_pidx) * EQ_ESIZE;
23217951040fSNavdeep Parhar 
23227951040fSNavdeep Parhar 		MPASS(wrq->ss_len > n);	/* WR had better wrap around. */
23237951040fSNavdeep Parhar 		bcopy(&wrq->ss[0], &eq->desc[wrq->ss_pidx], n);
23247951040fSNavdeep Parhar 		bcopy(&wrq->ss[n], &eq->desc[0], wrq->ss_len - n);
23257951040fSNavdeep Parhar 		wrq->tx_wrs_ss++;
23267951040fSNavdeep Parhar 	} else
23277951040fSNavdeep Parhar 		wrq->tx_wrs_direct++;
23287951040fSNavdeep Parhar 
23297951040fSNavdeep Parhar 	EQ_LOCK(eq);
23307951040fSNavdeep Parhar 	prev = TAILQ_PREV(cookie, wrq_incomplete_wrs, link);
23317951040fSNavdeep Parhar 	next = TAILQ_NEXT(cookie, link);
23327951040fSNavdeep Parhar 	if (prev == NULL) {
23337951040fSNavdeep Parhar 		MPASS(pidx == eq->dbidx);
23347951040fSNavdeep Parhar 		if (next == NULL || ndesc >= 16)
23357951040fSNavdeep Parhar 			ring_eq_db(wrq->adapter, eq, ndesc);
23367951040fSNavdeep Parhar 		else {
23377951040fSNavdeep Parhar 			MPASS(IDXDIFF(next->pidx, pidx, eq->sidx) == ndesc);
23387951040fSNavdeep Parhar 			next->pidx = pidx;
23397951040fSNavdeep Parhar 			next->ndesc += ndesc;
23407951040fSNavdeep Parhar 		}
23417951040fSNavdeep Parhar 	} else {
23427951040fSNavdeep Parhar 		MPASS(IDXDIFF(pidx, prev->pidx, eq->sidx) == prev->ndesc);
23437951040fSNavdeep Parhar 		prev->ndesc += ndesc;
23447951040fSNavdeep Parhar 	}
23457951040fSNavdeep Parhar 	TAILQ_REMOVE(&wrq->incomplete_wrs, cookie, link);
23467951040fSNavdeep Parhar 
23477951040fSNavdeep Parhar 	if (TAILQ_EMPTY(&wrq->incomplete_wrs) && !STAILQ_EMPTY(&wrq->wr_list))
23487951040fSNavdeep Parhar 		drain_wrq_wr_list(sc, wrq);
23497951040fSNavdeep Parhar 
23507951040fSNavdeep Parhar #ifdef INVARIANTS
23517951040fSNavdeep Parhar 	if (TAILQ_EMPTY(&wrq->incomplete_wrs)) {
23527951040fSNavdeep Parhar 		/* Doorbell must have caught up to the pidx. */
23537951040fSNavdeep Parhar 		MPASS(wrq->eq.pidx == wrq->eq.dbidx);
23547951040fSNavdeep Parhar 	}
23557951040fSNavdeep Parhar #endif
23567951040fSNavdeep Parhar 	EQ_UNLOCK(eq);
23577951040fSNavdeep Parhar }
23587951040fSNavdeep Parhar 
23597951040fSNavdeep Parhar static u_int
23607951040fSNavdeep Parhar can_resume_eth_tx(struct mp_ring *r)
23617951040fSNavdeep Parhar {
23627951040fSNavdeep Parhar 	struct sge_eq *eq = r->cookie;
23637951040fSNavdeep Parhar 
23647951040fSNavdeep Parhar 	return (total_available_tx_desc(eq) > eq->sidx / 8);
23657951040fSNavdeep Parhar }
23667951040fSNavdeep Parhar 
23677951040fSNavdeep Parhar static inline int
23687951040fSNavdeep Parhar cannot_use_txpkts(struct mbuf *m)
23697951040fSNavdeep Parhar {
23707951040fSNavdeep Parhar 	/* maybe put a GL limit too, to avoid silliness? */
23717951040fSNavdeep Parhar 
23727951040fSNavdeep Parhar 	return (needs_tso(m));
23737951040fSNavdeep Parhar }
23747951040fSNavdeep Parhar 
23757951040fSNavdeep Parhar /*
23767951040fSNavdeep Parhar  * r->items[cidx] to r->items[pidx], with a wraparound at r->size, are ready to
23777951040fSNavdeep Parhar  * be consumed.  Return the actual number consumed.  0 indicates a stall.
23787951040fSNavdeep Parhar  */
23797951040fSNavdeep Parhar static u_int
23807951040fSNavdeep Parhar eth_tx(struct mp_ring *r, u_int cidx, u_int pidx)
23817951040fSNavdeep Parhar {
23827951040fSNavdeep Parhar 	struct sge_txq *txq = r->cookie;
23837951040fSNavdeep Parhar 	struct sge_eq *eq = &txq->eq;
23847951040fSNavdeep Parhar 	struct ifnet *ifp = txq->ifp;
2385fe2ebb76SJohn Baldwin 	struct vi_info *vi = ifp->if_softc;
2386fe2ebb76SJohn Baldwin 	struct port_info *pi = vi->pi;
23877951040fSNavdeep Parhar 	struct adapter *sc = pi->adapter;
23887951040fSNavdeep Parhar 	u_int total, remaining;		/* # of packets */
23897951040fSNavdeep Parhar 	u_int available, dbdiff;	/* # of hardware descriptors */
23907951040fSNavdeep Parhar 	u_int n, next_cidx;
23917951040fSNavdeep Parhar 	struct mbuf *m0, *tail;
23927951040fSNavdeep Parhar 	struct txpkts txp;
23937951040fSNavdeep Parhar 	struct fw_eth_tx_pkts_wr *wr;	/* any fw WR struct will do */
23947951040fSNavdeep Parhar 
23957951040fSNavdeep Parhar 	remaining = IDXDIFF(pidx, cidx, r->size);
23967951040fSNavdeep Parhar 	MPASS(remaining > 0);	/* Must not be called without work to do. */
23977951040fSNavdeep Parhar 	total = 0;
23987951040fSNavdeep Parhar 
23997951040fSNavdeep Parhar 	TXQ_LOCK(txq);
24007951040fSNavdeep Parhar 	if (__predict_false((eq->flags & EQ_ENABLED) == 0)) {
24017951040fSNavdeep Parhar 		while (cidx != pidx) {
24027951040fSNavdeep Parhar 			m0 = r->items[cidx];
24037951040fSNavdeep Parhar 			m_freem(m0);
24047951040fSNavdeep Parhar 			if (++cidx == r->size)
24057951040fSNavdeep Parhar 				cidx = 0;
24067951040fSNavdeep Parhar 		}
24077951040fSNavdeep Parhar 		reclaim_tx_descs(txq, 2048);
24087951040fSNavdeep Parhar 		total = remaining;
24097951040fSNavdeep Parhar 		goto done;
24107951040fSNavdeep Parhar 	}
24117951040fSNavdeep Parhar 
24127951040fSNavdeep Parhar 	/* How many hardware descriptors do we have readily available. */
24137951040fSNavdeep Parhar 	if (eq->pidx == eq->cidx)
24147951040fSNavdeep Parhar 		available = eq->sidx - 1;
24157951040fSNavdeep Parhar 	else
24167951040fSNavdeep Parhar 		available = IDXDIFF(eq->cidx, eq->pidx, eq->sidx) - 1;
24177951040fSNavdeep Parhar 	dbdiff = IDXDIFF(eq->pidx, eq->dbidx, eq->sidx);
24187951040fSNavdeep Parhar 
24197951040fSNavdeep Parhar 	while (remaining > 0) {
24207951040fSNavdeep Parhar 
24217951040fSNavdeep Parhar 		m0 = r->items[cidx];
24227951040fSNavdeep Parhar 		M_ASSERTPKTHDR(m0);
24237951040fSNavdeep Parhar 		MPASS(m0->m_nextpkt == NULL);
24247951040fSNavdeep Parhar 
24257951040fSNavdeep Parhar 		if (available < SGE_MAX_WR_NDESC) {
24267951040fSNavdeep Parhar 			available += reclaim_tx_descs(txq, 64);
24277951040fSNavdeep Parhar 			if (available < howmany(mbuf_len16(m0), EQ_ESIZE / 16))
24287951040fSNavdeep Parhar 				break;	/* out of descriptors */
24297951040fSNavdeep Parhar 		}
24307951040fSNavdeep Parhar 
24317951040fSNavdeep Parhar 		next_cidx = cidx + 1;
24327951040fSNavdeep Parhar 		if (__predict_false(next_cidx == r->size))
24337951040fSNavdeep Parhar 			next_cidx = 0;
24347951040fSNavdeep Parhar 
24357951040fSNavdeep Parhar 		wr = (void *)&eq->desc[eq->pidx];
24367951040fSNavdeep Parhar 		if (remaining > 1 &&
24377951040fSNavdeep Parhar 		    try_txpkts(m0, r->items[next_cidx], &txp, available) == 0) {
24387951040fSNavdeep Parhar 
24397951040fSNavdeep Parhar 			/* pkts at cidx, next_cidx should both be in txp. */
24407951040fSNavdeep Parhar 			MPASS(txp.npkt == 2);
24417951040fSNavdeep Parhar 			tail = r->items[next_cidx];
24427951040fSNavdeep Parhar 			MPASS(tail->m_nextpkt == NULL);
24437951040fSNavdeep Parhar 			ETHER_BPF_MTAP(ifp, m0);
24447951040fSNavdeep Parhar 			ETHER_BPF_MTAP(ifp, tail);
24457951040fSNavdeep Parhar 			m0->m_nextpkt = tail;
24467951040fSNavdeep Parhar 
24477951040fSNavdeep Parhar 			if (__predict_false(++next_cidx == r->size))
24487951040fSNavdeep Parhar 				next_cidx = 0;
24497951040fSNavdeep Parhar 
24507951040fSNavdeep Parhar 			while (next_cidx != pidx) {
24517951040fSNavdeep Parhar 				if (add_to_txpkts(r->items[next_cidx], &txp,
24527951040fSNavdeep Parhar 				    available) != 0)
24537951040fSNavdeep Parhar 					break;
24547951040fSNavdeep Parhar 				tail->m_nextpkt = r->items[next_cidx];
24557951040fSNavdeep Parhar 				tail = tail->m_nextpkt;
24567951040fSNavdeep Parhar 				ETHER_BPF_MTAP(ifp, tail);
24577951040fSNavdeep Parhar 				if (__predict_false(++next_cidx == r->size))
24587951040fSNavdeep Parhar 					next_cidx = 0;
24597951040fSNavdeep Parhar 			}
24607951040fSNavdeep Parhar 
24617951040fSNavdeep Parhar 			n = write_txpkts_wr(txq, wr, m0, &txp, available);
24627951040fSNavdeep Parhar 			total += txp.npkt;
24637951040fSNavdeep Parhar 			remaining -= txp.npkt;
24647951040fSNavdeep Parhar 		} else {
24657951040fSNavdeep Parhar 			total++;
24667951040fSNavdeep Parhar 			remaining--;
24677951040fSNavdeep Parhar 			ETHER_BPF_MTAP(ifp, m0);
246878552b23SNavdeep Parhar 			n = write_txpkt_wr(txq, (void *)wr, m0, available);
24697951040fSNavdeep Parhar 		}
24707951040fSNavdeep Parhar 		MPASS(n >= 1 && n <= available && n <= SGE_MAX_WR_NDESC);
24717951040fSNavdeep Parhar 
24727951040fSNavdeep Parhar 		available -= n;
24737951040fSNavdeep Parhar 		dbdiff += n;
24747951040fSNavdeep Parhar 		IDXINCR(eq->pidx, n, eq->sidx);
24757951040fSNavdeep Parhar 
24767951040fSNavdeep Parhar 		if (total_available_tx_desc(eq) < eq->sidx / 4 &&
24777951040fSNavdeep Parhar 		    atomic_cmpset_int(&eq->equiq, 0, 1)) {
24787951040fSNavdeep Parhar 			wr->equiq_to_len16 |= htobe32(F_FW_WR_EQUIQ |
24797951040fSNavdeep Parhar 			    F_FW_WR_EQUEQ);
24807951040fSNavdeep Parhar 			eq->equeqidx = eq->pidx;
24817951040fSNavdeep Parhar 		} else if (IDXDIFF(eq->pidx, eq->equeqidx, eq->sidx) >= 32) {
24827951040fSNavdeep Parhar 			wr->equiq_to_len16 |= htobe32(F_FW_WR_EQUEQ);
24837951040fSNavdeep Parhar 			eq->equeqidx = eq->pidx;
24847951040fSNavdeep Parhar 		}
24857951040fSNavdeep Parhar 
24867951040fSNavdeep Parhar 		if (dbdiff >= 16 && remaining >= 4) {
24877951040fSNavdeep Parhar 			ring_eq_db(sc, eq, dbdiff);
24887951040fSNavdeep Parhar 			available += reclaim_tx_descs(txq, 4 * dbdiff);
24897951040fSNavdeep Parhar 			dbdiff = 0;
24907951040fSNavdeep Parhar 		}
24917951040fSNavdeep Parhar 
24927951040fSNavdeep Parhar 		cidx = next_cidx;
24937951040fSNavdeep Parhar 	}
24947951040fSNavdeep Parhar 	if (dbdiff != 0) {
24957951040fSNavdeep Parhar 		ring_eq_db(sc, eq, dbdiff);
24967951040fSNavdeep Parhar 		reclaim_tx_descs(txq, 32);
24977951040fSNavdeep Parhar 	}
24987951040fSNavdeep Parhar done:
24997951040fSNavdeep Parhar 	TXQ_UNLOCK(txq);
25007951040fSNavdeep Parhar 
25017951040fSNavdeep Parhar 	return (total);
2502733b9277SNavdeep Parhar }
2503733b9277SNavdeep Parhar 
250454e4ee71SNavdeep Parhar static inline void
250554e4ee71SNavdeep Parhar init_iq(struct sge_iq *iq, struct adapter *sc, int tmr_idx, int pktc_idx,
2506b2daa9a9SNavdeep Parhar     int qsize)
250754e4ee71SNavdeep Parhar {
2508b2daa9a9SNavdeep Parhar 
250954e4ee71SNavdeep Parhar 	KASSERT(tmr_idx >= 0 && tmr_idx < SGE_NTIMERS,
251054e4ee71SNavdeep Parhar 	    ("%s: bad tmr_idx %d", __func__, tmr_idx));
251154e4ee71SNavdeep Parhar 	KASSERT(pktc_idx < SGE_NCOUNTERS,	/* -ve is ok, means don't use */
251254e4ee71SNavdeep Parhar 	    ("%s: bad pktc_idx %d", __func__, pktc_idx));
251354e4ee71SNavdeep Parhar 
251454e4ee71SNavdeep Parhar 	iq->flags = 0;
251554e4ee71SNavdeep Parhar 	iq->adapter = sc;
25167a32954cSNavdeep Parhar 	iq->intr_params = V_QINTR_TIMER_IDX(tmr_idx);
25177a32954cSNavdeep Parhar 	iq->intr_pktc_idx = SGE_NCOUNTERS - 1;
25187a32954cSNavdeep Parhar 	if (pktc_idx >= 0) {
25197a32954cSNavdeep Parhar 		iq->intr_params |= F_QINTR_CNT_EN;
252054e4ee71SNavdeep Parhar 		iq->intr_pktc_idx = pktc_idx;
25217a32954cSNavdeep Parhar 	}
2522d14b0ac1SNavdeep Parhar 	iq->qsize = roundup2(qsize, 16);	/* See FW_IQ_CMD/iqsize */
252390e7434aSNavdeep Parhar 	iq->sidx = iq->qsize - sc->params.sge.spg_len / IQ_ESIZE;
252454e4ee71SNavdeep Parhar }
252554e4ee71SNavdeep Parhar 
252654e4ee71SNavdeep Parhar static inline void
2527e3207e19SNavdeep Parhar init_fl(struct adapter *sc, struct sge_fl *fl, int qsize, int maxp, char *name)
252854e4ee71SNavdeep Parhar {
25291458bff9SNavdeep Parhar 
253054e4ee71SNavdeep Parhar 	fl->qsize = qsize;
253190e7434aSNavdeep Parhar 	fl->sidx = qsize - sc->params.sge.spg_len / EQ_ESIZE;
253254e4ee71SNavdeep Parhar 	strlcpy(fl->lockname, name, sizeof(fl->lockname));
2533e3207e19SNavdeep Parhar 	if (sc->flags & BUF_PACKING_OK &&
2534e3207e19SNavdeep Parhar 	    ((!is_t4(sc) && buffer_packing) ||	/* T5+: enabled unless 0 */
2535e3207e19SNavdeep Parhar 	    (is_t4(sc) && buffer_packing == 1)))/* T4: disabled unless 1 */
25361458bff9SNavdeep Parhar 		fl->flags |= FL_BUF_PACKING;
253738035ed6SNavdeep Parhar 	find_best_refill_source(sc, fl, maxp);
253838035ed6SNavdeep Parhar 	find_safe_refill_source(sc, fl);
253954e4ee71SNavdeep Parhar }
254054e4ee71SNavdeep Parhar 
254154e4ee71SNavdeep Parhar static inline void
254290e7434aSNavdeep Parhar init_eq(struct adapter *sc, struct sge_eq *eq, int eqtype, int qsize,
254390e7434aSNavdeep Parhar     uint8_t tx_chan, uint16_t iqid, char *name)
254454e4ee71SNavdeep Parhar {
2545733b9277SNavdeep Parhar 	KASSERT(eqtype <= EQ_TYPEMASK, ("%s: bad qtype %d", __func__, eqtype));
2546733b9277SNavdeep Parhar 
2547733b9277SNavdeep Parhar 	eq->flags = eqtype & EQ_TYPEMASK;
2548733b9277SNavdeep Parhar 	eq->tx_chan = tx_chan;
2549733b9277SNavdeep Parhar 	eq->iqid = iqid;
255090e7434aSNavdeep Parhar 	eq->sidx = qsize - sc->params.sge.spg_len / EQ_ESIZE;
2551f7dfe243SNavdeep Parhar 	strlcpy(eq->lockname, name, sizeof(eq->lockname));
255254e4ee71SNavdeep Parhar }
255354e4ee71SNavdeep Parhar 
255454e4ee71SNavdeep Parhar static int
255554e4ee71SNavdeep Parhar alloc_ring(struct adapter *sc, size_t len, bus_dma_tag_t *tag,
255654e4ee71SNavdeep Parhar     bus_dmamap_t *map, bus_addr_t *pa, void **va)
255754e4ee71SNavdeep Parhar {
255854e4ee71SNavdeep Parhar 	int rc;
255954e4ee71SNavdeep Parhar 
256054e4ee71SNavdeep Parhar 	rc = bus_dma_tag_create(sc->dmat, 512, 0, BUS_SPACE_MAXADDR,
256154e4ee71SNavdeep Parhar 	    BUS_SPACE_MAXADDR, NULL, NULL, len, 1, len, 0, NULL, NULL, tag);
256254e4ee71SNavdeep Parhar 	if (rc != 0) {
256354e4ee71SNavdeep Parhar 		device_printf(sc->dev, "cannot allocate DMA tag: %d\n", rc);
256454e4ee71SNavdeep Parhar 		goto done;
256554e4ee71SNavdeep Parhar 	}
256654e4ee71SNavdeep Parhar 
256754e4ee71SNavdeep Parhar 	rc = bus_dmamem_alloc(*tag, va,
256854e4ee71SNavdeep Parhar 	    BUS_DMA_WAITOK | BUS_DMA_COHERENT | BUS_DMA_ZERO, map);
256954e4ee71SNavdeep Parhar 	if (rc != 0) {
257054e4ee71SNavdeep Parhar 		device_printf(sc->dev, "cannot allocate DMA memory: %d\n", rc);
257154e4ee71SNavdeep Parhar 		goto done;
257254e4ee71SNavdeep Parhar 	}
257354e4ee71SNavdeep Parhar 
257454e4ee71SNavdeep Parhar 	rc = bus_dmamap_load(*tag, *map, *va, len, oneseg_dma_callback, pa, 0);
257554e4ee71SNavdeep Parhar 	if (rc != 0) {
257654e4ee71SNavdeep Parhar 		device_printf(sc->dev, "cannot load DMA map: %d\n", rc);
257754e4ee71SNavdeep Parhar 		goto done;
257854e4ee71SNavdeep Parhar 	}
257954e4ee71SNavdeep Parhar done:
258054e4ee71SNavdeep Parhar 	if (rc)
258154e4ee71SNavdeep Parhar 		free_ring(sc, *tag, *map, *pa, *va);
258254e4ee71SNavdeep Parhar 
258354e4ee71SNavdeep Parhar 	return (rc);
258454e4ee71SNavdeep Parhar }
258554e4ee71SNavdeep Parhar 
258654e4ee71SNavdeep Parhar static int
258754e4ee71SNavdeep Parhar free_ring(struct adapter *sc, bus_dma_tag_t tag, bus_dmamap_t map,
258854e4ee71SNavdeep Parhar     bus_addr_t pa, void *va)
258954e4ee71SNavdeep Parhar {
259054e4ee71SNavdeep Parhar 	if (pa)
259154e4ee71SNavdeep Parhar 		bus_dmamap_unload(tag, map);
259254e4ee71SNavdeep Parhar 	if (va)
259354e4ee71SNavdeep Parhar 		bus_dmamem_free(tag, va, map);
259454e4ee71SNavdeep Parhar 	if (tag)
259554e4ee71SNavdeep Parhar 		bus_dma_tag_destroy(tag);
259654e4ee71SNavdeep Parhar 
259754e4ee71SNavdeep Parhar 	return (0);
259854e4ee71SNavdeep Parhar }
259954e4ee71SNavdeep Parhar 
260054e4ee71SNavdeep Parhar /*
260154e4ee71SNavdeep Parhar  * Allocates the ring for an ingress queue and an optional freelist.  If the
260254e4ee71SNavdeep Parhar  * freelist is specified it will be allocated and then associated with the
260354e4ee71SNavdeep Parhar  * ingress queue.
260454e4ee71SNavdeep Parhar  *
260554e4ee71SNavdeep Parhar  * Returns errno on failure.  Resources allocated up to that point may still be
260654e4ee71SNavdeep Parhar  * allocated.  Caller is responsible for cleanup in case this function fails.
260754e4ee71SNavdeep Parhar  *
2608733b9277SNavdeep Parhar  * If the ingress queue will take interrupts directly (iq->flags & IQ_INTR) then
260954e4ee71SNavdeep Parhar  * the intr_idx specifies the vector, starting from 0.  Otherwise it specifies
2610733b9277SNavdeep Parhar  * the abs_id of the ingress queue to which its interrupts should be forwarded.
261154e4ee71SNavdeep Parhar  */
261254e4ee71SNavdeep Parhar static int
2613fe2ebb76SJohn Baldwin alloc_iq_fl(struct vi_info *vi, struct sge_iq *iq, struct sge_fl *fl,
2614bc14b14dSNavdeep Parhar     int intr_idx, int cong)
261554e4ee71SNavdeep Parhar {
261654e4ee71SNavdeep Parhar 	int rc, i, cntxt_id;
261754e4ee71SNavdeep Parhar 	size_t len;
261854e4ee71SNavdeep Parhar 	struct fw_iq_cmd c;
2619fe2ebb76SJohn Baldwin 	struct port_info *pi = vi->pi;
262054e4ee71SNavdeep Parhar 	struct adapter *sc = iq->adapter;
262190e7434aSNavdeep Parhar 	struct sge_params *sp = &sc->params.sge;
262254e4ee71SNavdeep Parhar 	__be32 v = 0;
262354e4ee71SNavdeep Parhar 
2624b2daa9a9SNavdeep Parhar 	len = iq->qsize * IQ_ESIZE;
262554e4ee71SNavdeep Parhar 	rc = alloc_ring(sc, len, &iq->desc_tag, &iq->desc_map, &iq->ba,
262654e4ee71SNavdeep Parhar 	    (void **)&iq->desc);
262754e4ee71SNavdeep Parhar 	if (rc != 0)
262854e4ee71SNavdeep Parhar 		return (rc);
262954e4ee71SNavdeep Parhar 
263054e4ee71SNavdeep Parhar 	bzero(&c, sizeof(c));
263154e4ee71SNavdeep Parhar 	c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_IQ_CMD) | F_FW_CMD_REQUEST |
263254e4ee71SNavdeep Parhar 	    F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_IQ_CMD_PFN(sc->pf) |
263354e4ee71SNavdeep Parhar 	    V_FW_IQ_CMD_VFN(0));
263454e4ee71SNavdeep Parhar 
263554e4ee71SNavdeep Parhar 	c.alloc_to_len16 = htobe32(F_FW_IQ_CMD_ALLOC | F_FW_IQ_CMD_IQSTART |
263654e4ee71SNavdeep Parhar 	    FW_LEN16(c));
263754e4ee71SNavdeep Parhar 
263854e4ee71SNavdeep Parhar 	/* Special handling for firmware event queue */
263954e4ee71SNavdeep Parhar 	if (iq == &sc->sge.fwq)
264054e4ee71SNavdeep Parhar 		v |= F_FW_IQ_CMD_IQASYNCH;
264154e4ee71SNavdeep Parhar 
2642733b9277SNavdeep Parhar 	if (iq->flags & IQ_INTR) {
264354e4ee71SNavdeep Parhar 		KASSERT(intr_idx < sc->intr_count,
264454e4ee71SNavdeep Parhar 		    ("%s: invalid direct intr_idx %d", __func__, intr_idx));
2645733b9277SNavdeep Parhar 	} else
2646733b9277SNavdeep Parhar 		v |= F_FW_IQ_CMD_IQANDST;
264754e4ee71SNavdeep Parhar 	v |= V_FW_IQ_CMD_IQANDSTINDEX(intr_idx);
264854e4ee71SNavdeep Parhar 
264954e4ee71SNavdeep Parhar 	c.type_to_iqandstindex = htobe32(v |
265054e4ee71SNavdeep Parhar 	    V_FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) |
2651fe2ebb76SJohn Baldwin 	    V_FW_IQ_CMD_VIID(vi->viid) |
265254e4ee71SNavdeep Parhar 	    V_FW_IQ_CMD_IQANUD(X_UPDATEDELIVERY_INTERRUPT));
265354e4ee71SNavdeep Parhar 	c.iqdroprss_to_iqesize = htobe16(V_FW_IQ_CMD_IQPCIECH(pi->tx_chan) |
265454e4ee71SNavdeep Parhar 	    F_FW_IQ_CMD_IQGTSMODE |
265554e4ee71SNavdeep Parhar 	    V_FW_IQ_CMD_IQINTCNTTHRESH(iq->intr_pktc_idx) |
2656b2daa9a9SNavdeep Parhar 	    V_FW_IQ_CMD_IQESIZE(ilog2(IQ_ESIZE) - 4));
265754e4ee71SNavdeep Parhar 	c.iqsize = htobe16(iq->qsize);
265854e4ee71SNavdeep Parhar 	c.iqaddr = htobe64(iq->ba);
2659bc14b14dSNavdeep Parhar 	if (cong >= 0)
2660bc14b14dSNavdeep Parhar 		c.iqns_to_fl0congen = htobe32(F_FW_IQ_CMD_IQFLINTCONGEN);
266154e4ee71SNavdeep Parhar 
266254e4ee71SNavdeep Parhar 	if (fl) {
266354e4ee71SNavdeep Parhar 		mtx_init(&fl->fl_lock, fl->lockname, NULL, MTX_DEF);
266454e4ee71SNavdeep Parhar 
2665b2daa9a9SNavdeep Parhar 		len = fl->qsize * EQ_ESIZE;
266654e4ee71SNavdeep Parhar 		rc = alloc_ring(sc, len, &fl->desc_tag, &fl->desc_map,
266754e4ee71SNavdeep Parhar 		    &fl->ba, (void **)&fl->desc);
266854e4ee71SNavdeep Parhar 		if (rc)
266954e4ee71SNavdeep Parhar 			return (rc);
267054e4ee71SNavdeep Parhar 
267154e4ee71SNavdeep Parhar 		/* Allocate space for one software descriptor per buffer. */
267254e4ee71SNavdeep Parhar 		rc = alloc_fl_sdesc(fl);
267354e4ee71SNavdeep Parhar 		if (rc != 0) {
267454e4ee71SNavdeep Parhar 			device_printf(sc->dev,
267554e4ee71SNavdeep Parhar 			    "failed to setup fl software descriptors: %d\n",
267654e4ee71SNavdeep Parhar 			    rc);
267754e4ee71SNavdeep Parhar 			return (rc);
267854e4ee71SNavdeep Parhar 		}
26794d6db4e0SNavdeep Parhar 
26804d6db4e0SNavdeep Parhar 		if (fl->flags & FL_BUF_PACKING) {
268190e7434aSNavdeep Parhar 			fl->lowat = roundup2(sp->fl_starve_threshold2, 8);
268290e7434aSNavdeep Parhar 			fl->buf_boundary = sp->pack_boundary;
26834d6db4e0SNavdeep Parhar 		} else {
268490e7434aSNavdeep Parhar 			fl->lowat = roundup2(sp->fl_starve_threshold, 8);
2685e3207e19SNavdeep Parhar 			fl->buf_boundary = 16;
26864d6db4e0SNavdeep Parhar 		}
268790e7434aSNavdeep Parhar 		if (fl_pad && fl->buf_boundary < sp->pad_boundary)
268890e7434aSNavdeep Parhar 			fl->buf_boundary = sp->pad_boundary;
268954e4ee71SNavdeep Parhar 
2690214c3582SNavdeep Parhar 		c.iqns_to_fl0congen |=
2691bc14b14dSNavdeep Parhar 		    htobe32(V_FW_IQ_CMD_FL0HOSTFCMODE(X_HOSTFCMODE_NONE) |
2692bc14b14dSNavdeep Parhar 			F_FW_IQ_CMD_FL0FETCHRO | F_FW_IQ_CMD_FL0DATARO |
26931458bff9SNavdeep Parhar 			(fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0) |
26941458bff9SNavdeep Parhar 			(fl->flags & FL_BUF_PACKING ? F_FW_IQ_CMD_FL0PACKEN :
26951458bff9SNavdeep Parhar 			    0));
2696bc14b14dSNavdeep Parhar 		if (cong >= 0) {
2697bc14b14dSNavdeep Parhar 			c.iqns_to_fl0congen |=
2698bc14b14dSNavdeep Parhar 				htobe32(V_FW_IQ_CMD_FL0CNGCHMAP(cong) |
2699bc14b14dSNavdeep Parhar 				    F_FW_IQ_CMD_FL0CONGCIF |
2700bc14b14dSNavdeep Parhar 				    F_FW_IQ_CMD_FL0CONGEN);
2701bc14b14dSNavdeep Parhar 		}
270254e4ee71SNavdeep Parhar 		c.fl0dcaen_to_fl0cidxfthresh =
27036af2071bSNavdeep Parhar 		    htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_128B) |
270454e4ee71SNavdeep Parhar 			V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B));
270554e4ee71SNavdeep Parhar 		c.fl0size = htobe16(fl->qsize);
270654e4ee71SNavdeep Parhar 		c.fl0addr = htobe64(fl->ba);
270754e4ee71SNavdeep Parhar 	}
270854e4ee71SNavdeep Parhar 
270954e4ee71SNavdeep Parhar 	rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
271054e4ee71SNavdeep Parhar 	if (rc != 0) {
271154e4ee71SNavdeep Parhar 		device_printf(sc->dev,
271254e4ee71SNavdeep Parhar 		    "failed to create ingress queue: %d\n", rc);
271354e4ee71SNavdeep Parhar 		return (rc);
271454e4ee71SNavdeep Parhar 	}
271554e4ee71SNavdeep Parhar 
271654e4ee71SNavdeep Parhar 	iq->cidx = 0;
2717b2daa9a9SNavdeep Parhar 	iq->gen = F_RSPD_GEN;
271854e4ee71SNavdeep Parhar 	iq->intr_next = iq->intr_params;
271954e4ee71SNavdeep Parhar 	iq->cntxt_id = be16toh(c.iqid);
272054e4ee71SNavdeep Parhar 	iq->abs_id = be16toh(c.physiqid);
2721733b9277SNavdeep Parhar 	iq->flags |= IQ_ALLOCATED;
272254e4ee71SNavdeep Parhar 
272354e4ee71SNavdeep Parhar 	cntxt_id = iq->cntxt_id - sc->sge.iq_start;
2724733b9277SNavdeep Parhar 	if (cntxt_id >= sc->sge.niq) {
2725733b9277SNavdeep Parhar 		panic ("%s: iq->cntxt_id (%d) more than the max (%d)", __func__,
2726733b9277SNavdeep Parhar 		    cntxt_id, sc->sge.niq - 1);
2727733b9277SNavdeep Parhar 	}
272854e4ee71SNavdeep Parhar 	sc->sge.iqmap[cntxt_id] = iq;
272954e4ee71SNavdeep Parhar 
273054e4ee71SNavdeep Parhar 	if (fl) {
27314d6db4e0SNavdeep Parhar 		u_int qid;
27324d6db4e0SNavdeep Parhar 
27334d6db4e0SNavdeep Parhar 		iq->flags |= IQ_HAS_FL;
273454e4ee71SNavdeep Parhar 		fl->cntxt_id = be16toh(c.fl0id);
273554e4ee71SNavdeep Parhar 		fl->pidx = fl->cidx = 0;
273654e4ee71SNavdeep Parhar 
27379f1f7ec9SNavdeep Parhar 		cntxt_id = fl->cntxt_id - sc->sge.eq_start;
2738733b9277SNavdeep Parhar 		if (cntxt_id >= sc->sge.neq) {
2739733b9277SNavdeep Parhar 			panic("%s: fl->cntxt_id (%d) more than the max (%d)",
2740733b9277SNavdeep Parhar 			    __func__, cntxt_id, sc->sge.neq - 1);
2741733b9277SNavdeep Parhar 		}
274254e4ee71SNavdeep Parhar 		sc->sge.eqmap[cntxt_id] = (void *)fl;
274354e4ee71SNavdeep Parhar 
27444d6db4e0SNavdeep Parhar 		qid = fl->cntxt_id;
27454d6db4e0SNavdeep Parhar 		if (isset(&sc->doorbells, DOORBELL_UDB)) {
274690e7434aSNavdeep Parhar 			uint32_t s_qpp = sc->params.sge.eq_s_qpp;
27474d6db4e0SNavdeep Parhar 			uint32_t mask = (1 << s_qpp) - 1;
27484d6db4e0SNavdeep Parhar 			volatile uint8_t *udb;
27494d6db4e0SNavdeep Parhar 
27504d6db4e0SNavdeep Parhar 			udb = sc->udbs_base + UDBS_DB_OFFSET;
27514d6db4e0SNavdeep Parhar 			udb += (qid >> s_qpp) << PAGE_SHIFT;
27524d6db4e0SNavdeep Parhar 			qid &= mask;
27534d6db4e0SNavdeep Parhar 			if (qid < PAGE_SIZE / UDBS_SEG_SIZE) {
27544d6db4e0SNavdeep Parhar 				udb += qid << UDBS_SEG_SHIFT;
27554d6db4e0SNavdeep Parhar 				qid = 0;
27564d6db4e0SNavdeep Parhar 			}
27574d6db4e0SNavdeep Parhar 			fl->udb = (volatile void *)udb;
27584d6db4e0SNavdeep Parhar 		}
2759d1205d09SNavdeep Parhar 		fl->dbval = V_QID(qid) | sc->chip_params->sge_fl_db;
27604d6db4e0SNavdeep Parhar 
276154e4ee71SNavdeep Parhar 		FL_LOCK(fl);
2762733b9277SNavdeep Parhar 		/* Enough to make sure the SGE doesn't think it's starved */
2763733b9277SNavdeep Parhar 		refill_fl(sc, fl, fl->lowat);
276454e4ee71SNavdeep Parhar 		FL_UNLOCK(fl);
276554e4ee71SNavdeep Parhar 	}
276654e4ee71SNavdeep Parhar 
2767ba41ec48SNavdeep Parhar 	if (is_t5(sc) && cong >= 0) {
2768ba41ec48SNavdeep Parhar 		uint32_t param, val;
2769ba41ec48SNavdeep Parhar 
2770ba41ec48SNavdeep Parhar 		param = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
2771ba41ec48SNavdeep Parhar 		    V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_CONM_CTXT) |
2772ba41ec48SNavdeep Parhar 		    V_FW_PARAMS_PARAM_YZ(iq->cntxt_id);
277373cd9220SNavdeep Parhar 		if (cong == 0)
277473cd9220SNavdeep Parhar 			val = 1 << 19;
277573cd9220SNavdeep Parhar 		else {
277673cd9220SNavdeep Parhar 			val = 2 << 19;
277773cd9220SNavdeep Parhar 			for (i = 0; i < 4; i++) {
277873cd9220SNavdeep Parhar 				if (cong & (1 << i))
277973cd9220SNavdeep Parhar 					val |= 1 << (i << 2);
278073cd9220SNavdeep Parhar 			}
278173cd9220SNavdeep Parhar 		}
278273cd9220SNavdeep Parhar 
2783ba41ec48SNavdeep Parhar 		rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &param, &val);
2784ba41ec48SNavdeep Parhar 		if (rc != 0) {
2785ba41ec48SNavdeep Parhar 			/* report error but carry on */
2786ba41ec48SNavdeep Parhar 			device_printf(sc->dev,
2787ba41ec48SNavdeep Parhar 			    "failed to set congestion manager context for "
2788ba41ec48SNavdeep Parhar 			    "ingress queue %d: %d\n", iq->cntxt_id, rc);
2789ba41ec48SNavdeep Parhar 		}
2790ba41ec48SNavdeep Parhar 	}
2791ba41ec48SNavdeep Parhar 
279254e4ee71SNavdeep Parhar 	/* Enable IQ interrupts */
2793733b9277SNavdeep Parhar 	atomic_store_rel_int(&iq->state, IQS_IDLE);
279454e4ee71SNavdeep Parhar 	t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_SEINTARM(iq->intr_params) |
279554e4ee71SNavdeep Parhar 	    V_INGRESSQID(iq->cntxt_id));
279654e4ee71SNavdeep Parhar 
279754e4ee71SNavdeep Parhar 	return (0);
279854e4ee71SNavdeep Parhar }
279954e4ee71SNavdeep Parhar 
280054e4ee71SNavdeep Parhar static int
2801fe2ebb76SJohn Baldwin free_iq_fl(struct vi_info *vi, struct sge_iq *iq, struct sge_fl *fl)
280254e4ee71SNavdeep Parhar {
280338035ed6SNavdeep Parhar 	int rc;
280454e4ee71SNavdeep Parhar 	struct adapter *sc = iq->adapter;
280554e4ee71SNavdeep Parhar 	device_t dev;
280654e4ee71SNavdeep Parhar 
280754e4ee71SNavdeep Parhar 	if (sc == NULL)
280854e4ee71SNavdeep Parhar 		return (0);	/* nothing to do */
280954e4ee71SNavdeep Parhar 
2810fe2ebb76SJohn Baldwin 	dev = vi ? vi->dev : sc->dev;
281154e4ee71SNavdeep Parhar 
281254e4ee71SNavdeep Parhar 	if (iq->flags & IQ_ALLOCATED) {
281354e4ee71SNavdeep Parhar 		rc = -t4_iq_free(sc, sc->mbox, sc->pf, 0,
281454e4ee71SNavdeep Parhar 		    FW_IQ_TYPE_FL_INT_CAP, iq->cntxt_id,
281554e4ee71SNavdeep Parhar 		    fl ? fl->cntxt_id : 0xffff, 0xffff);
281654e4ee71SNavdeep Parhar 		if (rc != 0) {
281754e4ee71SNavdeep Parhar 			device_printf(dev,
281854e4ee71SNavdeep Parhar 			    "failed to free queue %p: %d\n", iq, rc);
281954e4ee71SNavdeep Parhar 			return (rc);
282054e4ee71SNavdeep Parhar 		}
282154e4ee71SNavdeep Parhar 		iq->flags &= ~IQ_ALLOCATED;
282254e4ee71SNavdeep Parhar 	}
282354e4ee71SNavdeep Parhar 
282454e4ee71SNavdeep Parhar 	free_ring(sc, iq->desc_tag, iq->desc_map, iq->ba, iq->desc);
282554e4ee71SNavdeep Parhar 
282654e4ee71SNavdeep Parhar 	bzero(iq, sizeof(*iq));
282754e4ee71SNavdeep Parhar 
282854e4ee71SNavdeep Parhar 	if (fl) {
282954e4ee71SNavdeep Parhar 		free_ring(sc, fl->desc_tag, fl->desc_map, fl->ba,
283054e4ee71SNavdeep Parhar 		    fl->desc);
283154e4ee71SNavdeep Parhar 
2832aa9a5cc0SNavdeep Parhar 		if (fl->sdesc)
28331458bff9SNavdeep Parhar 			free_fl_sdesc(sc, fl);
28341458bff9SNavdeep Parhar 
283554e4ee71SNavdeep Parhar 		if (mtx_initialized(&fl->fl_lock))
283654e4ee71SNavdeep Parhar 			mtx_destroy(&fl->fl_lock);
283754e4ee71SNavdeep Parhar 
283854e4ee71SNavdeep Parhar 		bzero(fl, sizeof(*fl));
283954e4ee71SNavdeep Parhar 	}
284054e4ee71SNavdeep Parhar 
284154e4ee71SNavdeep Parhar 	return (0);
284254e4ee71SNavdeep Parhar }
284354e4ee71SNavdeep Parhar 
284438035ed6SNavdeep Parhar static void
284538035ed6SNavdeep Parhar add_fl_sysctls(struct sysctl_ctx_list *ctx, struct sysctl_oid *oid,
284638035ed6SNavdeep Parhar     struct sge_fl *fl)
284738035ed6SNavdeep Parhar {
284838035ed6SNavdeep Parhar 	struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
284938035ed6SNavdeep Parhar 
285038035ed6SNavdeep Parhar 	oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "fl", CTLFLAG_RD, NULL,
285138035ed6SNavdeep Parhar 	    "freelist");
285238035ed6SNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
285338035ed6SNavdeep Parhar 
285438035ed6SNavdeep Parhar 	SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id",
285538035ed6SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &fl->cntxt_id, 0, sysctl_uint16, "I",
285638035ed6SNavdeep Parhar 	    "SGE context id of the freelist");
2857e3207e19SNavdeep Parhar 	SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "padding", CTLFLAG_RD, NULL,
2858e3207e19SNavdeep Parhar 	    fl_pad ? 1 : 0, "padding enabled");
2859e3207e19SNavdeep Parhar 	SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "packing", CTLFLAG_RD, NULL,
2860e3207e19SNavdeep Parhar 	    fl->flags & FL_BUF_PACKING ? 1 : 0, "packing enabled");
286138035ed6SNavdeep Parhar 	SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cidx", CTLFLAG_RD, &fl->cidx,
286238035ed6SNavdeep Parhar 	    0, "consumer index");
286338035ed6SNavdeep Parhar 	if (fl->flags & FL_BUF_PACKING) {
286438035ed6SNavdeep Parhar 		SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "rx_offset",
286538035ed6SNavdeep Parhar 		    CTLFLAG_RD, &fl->rx_offset, 0, "packing rx offset");
286638035ed6SNavdeep Parhar 	}
286738035ed6SNavdeep Parhar 	SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "pidx", CTLFLAG_RD, &fl->pidx,
286838035ed6SNavdeep Parhar 	    0, "producer index");
286938035ed6SNavdeep Parhar 	SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_allocated",
287038035ed6SNavdeep Parhar 	    CTLFLAG_RD, &fl->mbuf_allocated, "# of mbuf allocated");
287138035ed6SNavdeep Parhar 	SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "mbuf_inlined",
287238035ed6SNavdeep Parhar 	    CTLFLAG_RD, &fl->mbuf_inlined, "# of mbuf inlined in clusters");
287338035ed6SNavdeep Parhar 	SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_allocated",
287438035ed6SNavdeep Parhar 	    CTLFLAG_RD, &fl->cl_allocated, "# of clusters allocated");
287538035ed6SNavdeep Parhar 	SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_recycled",
287638035ed6SNavdeep Parhar 	    CTLFLAG_RD, &fl->cl_recycled, "# of clusters recycled");
287738035ed6SNavdeep Parhar 	SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "cluster_fast_recycled",
287838035ed6SNavdeep Parhar 	    CTLFLAG_RD, &fl->cl_fast_recycled, "# of clusters recycled (fast)");
287938035ed6SNavdeep Parhar }
288038035ed6SNavdeep Parhar 
288154e4ee71SNavdeep Parhar static int
2882733b9277SNavdeep Parhar alloc_fwq(struct adapter *sc)
288354e4ee71SNavdeep Parhar {
2884733b9277SNavdeep Parhar 	int rc, intr_idx;
288556599263SNavdeep Parhar 	struct sge_iq *fwq = &sc->sge.fwq;
2886733b9277SNavdeep Parhar 	struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev);
2887733b9277SNavdeep Parhar 	struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
288856599263SNavdeep Parhar 
2889b2daa9a9SNavdeep Parhar 	init_iq(fwq, sc, 0, 0, FW_IQ_QSIZE);
2890733b9277SNavdeep Parhar 	fwq->flags |= IQ_INTR;	/* always */
2891733b9277SNavdeep Parhar 	intr_idx = sc->intr_count > 1 ? 1 : 0;
2892*671bf2b8SNavdeep Parhar 	fwq->set_tcb_rpl = t4_filter_rpl;
2893*671bf2b8SNavdeep Parhar 	fwq->l2t_write_rpl = do_l2t_write_rpl;
2894fe2ebb76SJohn Baldwin 	rc = alloc_iq_fl(&sc->port[0]->vi[0], fwq, NULL, intr_idx, -1);
2895733b9277SNavdeep Parhar 	if (rc != 0) {
2896733b9277SNavdeep Parhar 		device_printf(sc->dev,
2897733b9277SNavdeep Parhar 		    "failed to create firmware event queue: %d\n", rc);
289856599263SNavdeep Parhar 		return (rc);
2899733b9277SNavdeep Parhar 	}
290056599263SNavdeep Parhar 
2901733b9277SNavdeep Parhar 	oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "fwq", CTLFLAG_RD,
2902733b9277SNavdeep Parhar 	    NULL, "firmware event queue");
2903733b9277SNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
290456599263SNavdeep Parhar 
290559bc8ce0SNavdeep Parhar 	SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "abs_id",
290659bc8ce0SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &fwq->abs_id, 0, sysctl_uint16, "I",
290759bc8ce0SNavdeep Parhar 	    "absolute id of the queue");
290859bc8ce0SNavdeep Parhar 	SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cntxt_id",
290959bc8ce0SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &fwq->cntxt_id, 0, sysctl_uint16, "I",
291059bc8ce0SNavdeep Parhar 	    "SGE context id of the queue");
291156599263SNavdeep Parhar 	SYSCTL_ADD_PROC(&sc->ctx, children, OID_AUTO, "cidx",
291256599263SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &fwq->cidx, 0, sysctl_uint16, "I",
291356599263SNavdeep Parhar 	    "consumer index");
291456599263SNavdeep Parhar 
2915733b9277SNavdeep Parhar 	return (0);
2916733b9277SNavdeep Parhar }
2917733b9277SNavdeep Parhar 
2918733b9277SNavdeep Parhar static int
2919733b9277SNavdeep Parhar free_fwq(struct adapter *sc)
2920733b9277SNavdeep Parhar {
2921733b9277SNavdeep Parhar 	return free_iq_fl(NULL, &sc->sge.fwq, NULL);
2922733b9277SNavdeep Parhar }
2923733b9277SNavdeep Parhar 
2924733b9277SNavdeep Parhar static int
2925733b9277SNavdeep Parhar alloc_mgmtq(struct adapter *sc)
2926733b9277SNavdeep Parhar {
2927733b9277SNavdeep Parhar 	int rc;
2928733b9277SNavdeep Parhar 	struct sge_wrq *mgmtq = &sc->sge.mgmtq;
2929733b9277SNavdeep Parhar 	char name[16];
2930733b9277SNavdeep Parhar 	struct sysctl_oid *oid = device_get_sysctl_tree(sc->dev);
2931733b9277SNavdeep Parhar 	struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
2932733b9277SNavdeep Parhar 
2933733b9277SNavdeep Parhar 	oid = SYSCTL_ADD_NODE(&sc->ctx, children, OID_AUTO, "mgmtq", CTLFLAG_RD,
2934733b9277SNavdeep Parhar 	    NULL, "management queue");
2935733b9277SNavdeep Parhar 
2936733b9277SNavdeep Parhar 	snprintf(name, sizeof(name), "%s mgmtq", device_get_nameunit(sc->dev));
293790e7434aSNavdeep Parhar 	init_eq(sc, &mgmtq->eq, EQ_CTRL, CTRL_EQ_QSIZE, sc->port[0]->tx_chan,
2938733b9277SNavdeep Parhar 	    sc->sge.fwq.cntxt_id, name);
2939733b9277SNavdeep Parhar 	rc = alloc_wrq(sc, NULL, mgmtq, oid);
2940733b9277SNavdeep Parhar 	if (rc != 0) {
2941733b9277SNavdeep Parhar 		device_printf(sc->dev,
2942733b9277SNavdeep Parhar 		    "failed to create management queue: %d\n", rc);
294356599263SNavdeep Parhar 		return (rc);
294456599263SNavdeep Parhar 	}
294556599263SNavdeep Parhar 
2946733b9277SNavdeep Parhar 	return (0);
294754e4ee71SNavdeep Parhar }
294854e4ee71SNavdeep Parhar 
294954e4ee71SNavdeep Parhar static int
2950733b9277SNavdeep Parhar free_mgmtq(struct adapter *sc)
2951733b9277SNavdeep Parhar {
295209fe6320SNavdeep Parhar 
2953733b9277SNavdeep Parhar 	return free_wrq(sc, &sc->sge.mgmtq);
2954733b9277SNavdeep Parhar }
2955733b9277SNavdeep Parhar 
29561605bac6SNavdeep Parhar int
29579af71ab3SNavdeep Parhar tnl_cong(struct port_info *pi, int drop)
29589fb8886bSNavdeep Parhar {
29599fb8886bSNavdeep Parhar 
29609af71ab3SNavdeep Parhar 	if (drop == -1)
29619fb8886bSNavdeep Parhar 		return (-1);
29629af71ab3SNavdeep Parhar 	else if (drop == 1)
29639fb8886bSNavdeep Parhar 		return (0);
29649fb8886bSNavdeep Parhar 	else
2965e46dcc56SNavdeep Parhar 		return (pi->rx_chan_map);
29669fb8886bSNavdeep Parhar }
29679fb8886bSNavdeep Parhar 
2968733b9277SNavdeep Parhar static int
2969fe2ebb76SJohn Baldwin alloc_rxq(struct vi_info *vi, struct sge_rxq *rxq, int intr_idx, int idx,
2970733b9277SNavdeep Parhar     struct sysctl_oid *oid)
297154e4ee71SNavdeep Parhar {
297254e4ee71SNavdeep Parhar 	int rc;
297354e4ee71SNavdeep Parhar 	struct sysctl_oid_list *children;
297454e4ee71SNavdeep Parhar 	char name[16];
297554e4ee71SNavdeep Parhar 
2976fe2ebb76SJohn Baldwin 	rc = alloc_iq_fl(vi, &rxq->iq, &rxq->fl, intr_idx,
2977fe2ebb76SJohn Baldwin 	    tnl_cong(vi->pi, cong_drop));
297854e4ee71SNavdeep Parhar 	if (rc != 0)
297954e4ee71SNavdeep Parhar 		return (rc);
298054e4ee71SNavdeep Parhar 
29814d6db4e0SNavdeep Parhar 	/*
29824d6db4e0SNavdeep Parhar 	 * The freelist is just barely above the starvation threshold right now,
29834d6db4e0SNavdeep Parhar 	 * fill it up a bit more.
29844d6db4e0SNavdeep Parhar 	 */
29859b4d7b4eSNavdeep Parhar 	FL_LOCK(&rxq->fl);
2986fe2ebb76SJohn Baldwin 	refill_fl(vi->pi->adapter, &rxq->fl, 128);
29879b4d7b4eSNavdeep Parhar 	FL_UNLOCK(&rxq->fl);
29889b4d7b4eSNavdeep Parhar 
2989a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6)
299054e4ee71SNavdeep Parhar 	rc = tcp_lro_init(&rxq->lro);
299154e4ee71SNavdeep Parhar 	if (rc != 0)
299254e4ee71SNavdeep Parhar 		return (rc);
2993fe2ebb76SJohn Baldwin 	rxq->lro.ifp = vi->ifp; /* also indicates LRO init'ed */
299454e4ee71SNavdeep Parhar 
2995fe2ebb76SJohn Baldwin 	if (vi->ifp->if_capenable & IFCAP_LRO)
2996733b9277SNavdeep Parhar 		rxq->iq.flags |= IQ_LRO_ENABLED;
299754e4ee71SNavdeep Parhar #endif
2998fe2ebb76SJohn Baldwin 	rxq->ifp = vi->ifp;
299954e4ee71SNavdeep Parhar 
3000733b9277SNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
300154e4ee71SNavdeep Parhar 
300254e4ee71SNavdeep Parhar 	snprintf(name, sizeof(name), "%d", idx);
3003fe2ebb76SJohn Baldwin 	oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
300454e4ee71SNavdeep Parhar 	    NULL, "rx queue");
300554e4ee71SNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
300654e4ee71SNavdeep Parhar 
3007fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "abs_id",
300856599263SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.abs_id, 0, sysctl_uint16, "I",
3009af49c942SNavdeep Parhar 	    "absolute id of the queue");
3010fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cntxt_id",
301159bc8ce0SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cntxt_id, 0, sysctl_uint16, "I",
301259bc8ce0SNavdeep Parhar 	    "SGE context id of the queue");
3013fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cidx",
301459bc8ce0SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &rxq->iq.cidx, 0, sysctl_uint16, "I",
301559bc8ce0SNavdeep Parhar 	    "consumer index");
3016a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6)
3017e936121dSHans Petter Selasky 	SYSCTL_ADD_U64(&vi->ctx, children, OID_AUTO, "lro_queued", CTLFLAG_RD,
301854e4ee71SNavdeep Parhar 	    &rxq->lro.lro_queued, 0, NULL);
3019e936121dSHans Petter Selasky 	SYSCTL_ADD_U64(&vi->ctx, children, OID_AUTO, "lro_flushed", CTLFLAG_RD,
302054e4ee71SNavdeep Parhar 	    &rxq->lro.lro_flushed, 0, NULL);
30217d29df59SNavdeep Parhar #endif
3022fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "rxcsum", CTLFLAG_RD,
302354e4ee71SNavdeep Parhar 	    &rxq->rxcsum, "# of times hardware assisted with checksum");
3024fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "vlan_extraction",
302554e4ee71SNavdeep Parhar 	    CTLFLAG_RD, &rxq->vlan_extraction,
302654e4ee71SNavdeep Parhar 	    "# of times hardware extracted 802.1Q tag");
302754e4ee71SNavdeep Parhar 
3028fe2ebb76SJohn Baldwin 	add_fl_sysctls(&vi->ctx, oid, &rxq->fl);
302959bc8ce0SNavdeep Parhar 
303054e4ee71SNavdeep Parhar 	return (rc);
303154e4ee71SNavdeep Parhar }
303254e4ee71SNavdeep Parhar 
303354e4ee71SNavdeep Parhar static int
3034fe2ebb76SJohn Baldwin free_rxq(struct vi_info *vi, struct sge_rxq *rxq)
303554e4ee71SNavdeep Parhar {
303654e4ee71SNavdeep Parhar 	int rc;
303754e4ee71SNavdeep Parhar 
3038a1ea9a82SNavdeep Parhar #if defined(INET) || defined(INET6)
303954e4ee71SNavdeep Parhar 	if (rxq->lro.ifp) {
304054e4ee71SNavdeep Parhar 		tcp_lro_free(&rxq->lro);
304154e4ee71SNavdeep Parhar 		rxq->lro.ifp = NULL;
304254e4ee71SNavdeep Parhar 	}
304354e4ee71SNavdeep Parhar #endif
304454e4ee71SNavdeep Parhar 
3045fe2ebb76SJohn Baldwin 	rc = free_iq_fl(vi, &rxq->iq, &rxq->fl);
304654e4ee71SNavdeep Parhar 	if (rc == 0)
304754e4ee71SNavdeep Parhar 		bzero(rxq, sizeof(*rxq));
304854e4ee71SNavdeep Parhar 
304954e4ee71SNavdeep Parhar 	return (rc);
305054e4ee71SNavdeep Parhar }
305154e4ee71SNavdeep Parhar 
305209fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
305354e4ee71SNavdeep Parhar static int
3054fe2ebb76SJohn Baldwin alloc_ofld_rxq(struct vi_info *vi, struct sge_ofld_rxq *ofld_rxq,
3055733b9277SNavdeep Parhar     int intr_idx, int idx, struct sysctl_oid *oid)
3056f7dfe243SNavdeep Parhar {
3057733b9277SNavdeep Parhar 	int rc;
3058f7dfe243SNavdeep Parhar 	struct sysctl_oid_list *children;
3059733b9277SNavdeep Parhar 	char name[16];
3060f7dfe243SNavdeep Parhar 
3061fe2ebb76SJohn Baldwin 	rc = alloc_iq_fl(vi, &ofld_rxq->iq, &ofld_rxq->fl, intr_idx,
3062fe2ebb76SJohn Baldwin 	    vi->pi->rx_chan_map);
3063733b9277SNavdeep Parhar 	if (rc != 0)
3064f7dfe243SNavdeep Parhar 		return (rc);
3065f7dfe243SNavdeep Parhar 
3066733b9277SNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
3067733b9277SNavdeep Parhar 
3068733b9277SNavdeep Parhar 	snprintf(name, sizeof(name), "%d", idx);
3069fe2ebb76SJohn Baldwin 	oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
3070733b9277SNavdeep Parhar 	    NULL, "rx queue");
3071733b9277SNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
3072733b9277SNavdeep Parhar 
3073fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "abs_id",
3074733b9277SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.abs_id, 0, sysctl_uint16,
3075733b9277SNavdeep Parhar 	    "I", "absolute id of the queue");
3076fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cntxt_id",
3077733b9277SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cntxt_id, 0, sysctl_uint16,
3078733b9277SNavdeep Parhar 	    "I", "SGE context id of the queue");
3079fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cidx",
3080733b9277SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &ofld_rxq->iq.cidx, 0, sysctl_uint16, "I",
3081733b9277SNavdeep Parhar 	    "consumer index");
3082733b9277SNavdeep Parhar 
3083fe2ebb76SJohn Baldwin 	add_fl_sysctls(&vi->ctx, oid, &ofld_rxq->fl);
3084733b9277SNavdeep Parhar 
3085733b9277SNavdeep Parhar 	return (rc);
3086733b9277SNavdeep Parhar }
3087733b9277SNavdeep Parhar 
3088733b9277SNavdeep Parhar static int
3089fe2ebb76SJohn Baldwin free_ofld_rxq(struct vi_info *vi, struct sge_ofld_rxq *ofld_rxq)
3090733b9277SNavdeep Parhar {
3091733b9277SNavdeep Parhar 	int rc;
3092733b9277SNavdeep Parhar 
3093fe2ebb76SJohn Baldwin 	rc = free_iq_fl(vi, &ofld_rxq->iq, &ofld_rxq->fl);
3094733b9277SNavdeep Parhar 	if (rc == 0)
3095733b9277SNavdeep Parhar 		bzero(ofld_rxq, sizeof(*ofld_rxq));
3096733b9277SNavdeep Parhar 
3097733b9277SNavdeep Parhar 	return (rc);
3098733b9277SNavdeep Parhar }
3099733b9277SNavdeep Parhar #endif
3100733b9277SNavdeep Parhar 
3101298d969cSNavdeep Parhar #ifdef DEV_NETMAP
3102298d969cSNavdeep Parhar static int
3103fe2ebb76SJohn Baldwin alloc_nm_rxq(struct vi_info *vi, struct sge_nm_rxq *nm_rxq, int intr_idx,
3104298d969cSNavdeep Parhar     int idx, struct sysctl_oid *oid)
3105298d969cSNavdeep Parhar {
3106298d969cSNavdeep Parhar 	int rc;
3107298d969cSNavdeep Parhar 	struct sysctl_oid_list *children;
3108298d969cSNavdeep Parhar 	struct sysctl_ctx_list *ctx;
3109298d969cSNavdeep Parhar 	char name[16];
3110298d969cSNavdeep Parhar 	size_t len;
3111fe2ebb76SJohn Baldwin 	struct adapter *sc = vi->pi->adapter;
3112fe2ebb76SJohn Baldwin 	struct netmap_adapter *na = NA(vi->ifp);
3113298d969cSNavdeep Parhar 
3114298d969cSNavdeep Parhar 	MPASS(na != NULL);
3115298d969cSNavdeep Parhar 
3116fe2ebb76SJohn Baldwin 	len = vi->qsize_rxq * IQ_ESIZE;
3117298d969cSNavdeep Parhar 	rc = alloc_ring(sc, len, &nm_rxq->iq_desc_tag, &nm_rxq->iq_desc_map,
3118298d969cSNavdeep Parhar 	    &nm_rxq->iq_ba, (void **)&nm_rxq->iq_desc);
3119298d969cSNavdeep Parhar 	if (rc != 0)
3120298d969cSNavdeep Parhar 		return (rc);
3121298d969cSNavdeep Parhar 
312290e7434aSNavdeep Parhar 	len = na->num_rx_desc * EQ_ESIZE + sc->params.sge.spg_len;
3123298d969cSNavdeep Parhar 	rc = alloc_ring(sc, len, &nm_rxq->fl_desc_tag, &nm_rxq->fl_desc_map,
3124298d969cSNavdeep Parhar 	    &nm_rxq->fl_ba, (void **)&nm_rxq->fl_desc);
3125298d969cSNavdeep Parhar 	if (rc != 0)
3126298d969cSNavdeep Parhar 		return (rc);
3127298d969cSNavdeep Parhar 
3128fe2ebb76SJohn Baldwin 	nm_rxq->vi = vi;
3129298d969cSNavdeep Parhar 	nm_rxq->nid = idx;
3130298d969cSNavdeep Parhar 	nm_rxq->iq_cidx = 0;
313190e7434aSNavdeep Parhar 	nm_rxq->iq_sidx = vi->qsize_rxq - sc->params.sge.spg_len / IQ_ESIZE;
3132298d969cSNavdeep Parhar 	nm_rxq->iq_gen = F_RSPD_GEN;
3133298d969cSNavdeep Parhar 	nm_rxq->fl_pidx = nm_rxq->fl_cidx = 0;
3134298d969cSNavdeep Parhar 	nm_rxq->fl_sidx = na->num_rx_desc;
3135298d969cSNavdeep Parhar 	nm_rxq->intr_idx = intr_idx;
3136298d969cSNavdeep Parhar 
3137fe2ebb76SJohn Baldwin 	ctx = &vi->ctx;
3138298d969cSNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
3139298d969cSNavdeep Parhar 
3140298d969cSNavdeep Parhar 	snprintf(name, sizeof(name), "%d", idx);
3141298d969cSNavdeep Parhar 	oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, name, CTLFLAG_RD, NULL,
3142298d969cSNavdeep Parhar 	    "rx queue");
3143298d969cSNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
3144298d969cSNavdeep Parhar 
3145298d969cSNavdeep Parhar 	SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "abs_id",
3146298d969cSNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_abs_id, 0, sysctl_uint16,
3147298d969cSNavdeep Parhar 	    "I", "absolute id of the queue");
3148298d969cSNavdeep Parhar 	SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id",
3149298d969cSNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_cntxt_id, 0, sysctl_uint16,
3150298d969cSNavdeep Parhar 	    "I", "SGE context id of the queue");
3151298d969cSNavdeep Parhar 	SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cidx",
3152298d969cSNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->iq_cidx, 0, sysctl_uint16, "I",
3153298d969cSNavdeep Parhar 	    "consumer index");
3154298d969cSNavdeep Parhar 
3155298d969cSNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
3156298d969cSNavdeep Parhar 	oid = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "fl", CTLFLAG_RD, NULL,
3157298d969cSNavdeep Parhar 	    "freelist");
3158298d969cSNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
3159298d969cSNavdeep Parhar 
3160298d969cSNavdeep Parhar 	SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cntxt_id",
3161298d969cSNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &nm_rxq->fl_cntxt_id, 0, sysctl_uint16,
3162298d969cSNavdeep Parhar 	    "I", "SGE context id of the freelist");
3163298d969cSNavdeep Parhar 	SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cidx", CTLFLAG_RD,
3164298d969cSNavdeep Parhar 	    &nm_rxq->fl_cidx, 0, "consumer index");
3165298d969cSNavdeep Parhar 	SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "pidx", CTLFLAG_RD,
3166298d969cSNavdeep Parhar 	    &nm_rxq->fl_pidx, 0, "producer index");
3167298d969cSNavdeep Parhar 
3168298d969cSNavdeep Parhar 	return (rc);
3169298d969cSNavdeep Parhar }
3170298d969cSNavdeep Parhar 
3171298d969cSNavdeep Parhar 
3172298d969cSNavdeep Parhar static int
3173fe2ebb76SJohn Baldwin free_nm_rxq(struct vi_info *vi, struct sge_nm_rxq *nm_rxq)
3174298d969cSNavdeep Parhar {
3175fe2ebb76SJohn Baldwin 	struct adapter *sc = vi->pi->adapter;
3176298d969cSNavdeep Parhar 
3177298d969cSNavdeep Parhar 	free_ring(sc, nm_rxq->iq_desc_tag, nm_rxq->iq_desc_map, nm_rxq->iq_ba,
3178298d969cSNavdeep Parhar 	    nm_rxq->iq_desc);
3179298d969cSNavdeep Parhar 	free_ring(sc, nm_rxq->fl_desc_tag, nm_rxq->fl_desc_map, nm_rxq->fl_ba,
3180298d969cSNavdeep Parhar 	    nm_rxq->fl_desc);
3181298d969cSNavdeep Parhar 
3182298d969cSNavdeep Parhar 	return (0);
3183298d969cSNavdeep Parhar }
3184298d969cSNavdeep Parhar 
3185298d969cSNavdeep Parhar static int
3186fe2ebb76SJohn Baldwin alloc_nm_txq(struct vi_info *vi, struct sge_nm_txq *nm_txq, int iqidx, int idx,
3187298d969cSNavdeep Parhar     struct sysctl_oid *oid)
3188298d969cSNavdeep Parhar {
3189298d969cSNavdeep Parhar 	int rc;
3190298d969cSNavdeep Parhar 	size_t len;
3191fe2ebb76SJohn Baldwin 	struct port_info *pi = vi->pi;
3192298d969cSNavdeep Parhar 	struct adapter *sc = pi->adapter;
3193fe2ebb76SJohn Baldwin 	struct netmap_adapter *na = NA(vi->ifp);
3194298d969cSNavdeep Parhar 	char name[16];
3195298d969cSNavdeep Parhar 	struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
3196298d969cSNavdeep Parhar 
319790e7434aSNavdeep Parhar 	len = na->num_tx_desc * EQ_ESIZE + sc->params.sge.spg_len;
3198298d969cSNavdeep Parhar 	rc = alloc_ring(sc, len, &nm_txq->desc_tag, &nm_txq->desc_map,
3199298d969cSNavdeep Parhar 	    &nm_txq->ba, (void **)&nm_txq->desc);
3200298d969cSNavdeep Parhar 	if (rc)
3201298d969cSNavdeep Parhar 		return (rc);
3202298d969cSNavdeep Parhar 
3203298d969cSNavdeep Parhar 	nm_txq->pidx = nm_txq->cidx = 0;
3204298d969cSNavdeep Parhar 	nm_txq->sidx = na->num_tx_desc;
3205298d969cSNavdeep Parhar 	nm_txq->nid = idx;
3206298d969cSNavdeep Parhar 	nm_txq->iqidx = iqidx;
3207298d969cSNavdeep Parhar 	nm_txq->cpl_ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
3208fe2ebb76SJohn Baldwin 	    V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_VF_VLD(1) |
3209fe2ebb76SJohn Baldwin 	    V_TXPKT_VF(vi->viid));
3210298d969cSNavdeep Parhar 
3211298d969cSNavdeep Parhar 	snprintf(name, sizeof(name), "%d", idx);
3212fe2ebb76SJohn Baldwin 	oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
3213298d969cSNavdeep Parhar 	    NULL, "netmap tx queue");
3214298d969cSNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
3215298d969cSNavdeep Parhar 
3216fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UINT(&vi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
3217298d969cSNavdeep Parhar 	    &nm_txq->cntxt_id, 0, "SGE context id of the queue");
3218fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cidx",
3219298d969cSNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &nm_txq->cidx, 0, sysctl_uint16, "I",
3220298d969cSNavdeep Parhar 	    "consumer index");
3221fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "pidx",
3222298d969cSNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &nm_txq->pidx, 0, sysctl_uint16, "I",
3223298d969cSNavdeep Parhar 	    "producer index");
3224298d969cSNavdeep Parhar 
3225298d969cSNavdeep Parhar 	return (rc);
3226298d969cSNavdeep Parhar }
3227298d969cSNavdeep Parhar 
3228298d969cSNavdeep Parhar static int
3229fe2ebb76SJohn Baldwin free_nm_txq(struct vi_info *vi, struct sge_nm_txq *nm_txq)
3230298d969cSNavdeep Parhar {
3231fe2ebb76SJohn Baldwin 	struct adapter *sc = vi->pi->adapter;
3232298d969cSNavdeep Parhar 
3233298d969cSNavdeep Parhar 	free_ring(sc, nm_txq->desc_tag, nm_txq->desc_map, nm_txq->ba,
3234298d969cSNavdeep Parhar 	    nm_txq->desc);
3235298d969cSNavdeep Parhar 
3236298d969cSNavdeep Parhar 	return (0);
3237298d969cSNavdeep Parhar }
3238298d969cSNavdeep Parhar #endif
3239298d969cSNavdeep Parhar 
3240733b9277SNavdeep Parhar static int
3241733b9277SNavdeep Parhar ctrl_eq_alloc(struct adapter *sc, struct sge_eq *eq)
3242733b9277SNavdeep Parhar {
3243733b9277SNavdeep Parhar 	int rc, cntxt_id;
3244733b9277SNavdeep Parhar 	struct fw_eq_ctrl_cmd c;
324590e7434aSNavdeep Parhar 	int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
3246f7dfe243SNavdeep Parhar 
3247f7dfe243SNavdeep Parhar 	bzero(&c, sizeof(c));
3248f7dfe243SNavdeep Parhar 
3249f7dfe243SNavdeep Parhar 	c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_CTRL_CMD) | F_FW_CMD_REQUEST |
3250f7dfe243SNavdeep Parhar 	    F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_CTRL_CMD_PFN(sc->pf) |
3251f7dfe243SNavdeep Parhar 	    V_FW_EQ_CTRL_CMD_VFN(0));
3252f7dfe243SNavdeep Parhar 	c.alloc_to_len16 = htobe32(F_FW_EQ_CTRL_CMD_ALLOC |
3253f7dfe243SNavdeep Parhar 	    F_FW_EQ_CTRL_CMD_EQSTART | FW_LEN16(c));
32547951040fSNavdeep Parhar 	c.cmpliqid_eqid = htonl(V_FW_EQ_CTRL_CMD_CMPLIQID(eq->iqid));
3255f7dfe243SNavdeep Parhar 	c.physeqid_pkd = htobe32(0);
3256f7dfe243SNavdeep Parhar 	c.fetchszm_to_iqid =
32577951040fSNavdeep Parhar 	    htobe32(V_FW_EQ_CTRL_CMD_HOSTFCMODE(X_HOSTFCMODE_NONE) |
3258733b9277SNavdeep Parhar 		V_FW_EQ_CTRL_CMD_PCIECHN(eq->tx_chan) |
325956599263SNavdeep Parhar 		F_FW_EQ_CTRL_CMD_FETCHRO | V_FW_EQ_CTRL_CMD_IQID(eq->iqid));
3260f7dfe243SNavdeep Parhar 	c.dcaen_to_eqsize =
3261f7dfe243SNavdeep Parhar 	    htobe32(V_FW_EQ_CTRL_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
3262f7dfe243SNavdeep Parhar 		V_FW_EQ_CTRL_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
32637951040fSNavdeep Parhar 		V_FW_EQ_CTRL_CMD_EQSIZE(qsize));
3264f7dfe243SNavdeep Parhar 	c.eqaddr = htobe64(eq->ba);
3265f7dfe243SNavdeep Parhar 
3266f7dfe243SNavdeep Parhar 	rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
3267f7dfe243SNavdeep Parhar 	if (rc != 0) {
3268f7dfe243SNavdeep Parhar 		device_printf(sc->dev,
3269733b9277SNavdeep Parhar 		    "failed to create control queue %d: %d\n", eq->tx_chan, rc);
3270f7dfe243SNavdeep Parhar 		return (rc);
3271f7dfe243SNavdeep Parhar 	}
3272733b9277SNavdeep Parhar 	eq->flags |= EQ_ALLOCATED;
3273f7dfe243SNavdeep Parhar 
3274f7dfe243SNavdeep Parhar 	eq->cntxt_id = G_FW_EQ_CTRL_CMD_EQID(be32toh(c.cmpliqid_eqid));
3275f7dfe243SNavdeep Parhar 	cntxt_id = eq->cntxt_id - sc->sge.eq_start;
3276733b9277SNavdeep Parhar 	if (cntxt_id >= sc->sge.neq)
3277733b9277SNavdeep Parhar 	    panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
3278733b9277SNavdeep Parhar 		cntxt_id, sc->sge.neq - 1);
3279f7dfe243SNavdeep Parhar 	sc->sge.eqmap[cntxt_id] = eq;
3280f7dfe243SNavdeep Parhar 
3281f7dfe243SNavdeep Parhar 	return (rc);
3282f7dfe243SNavdeep Parhar }
3283f7dfe243SNavdeep Parhar 
3284f7dfe243SNavdeep Parhar static int
3285fe2ebb76SJohn Baldwin eth_eq_alloc(struct adapter *sc, struct vi_info *vi, struct sge_eq *eq)
328654e4ee71SNavdeep Parhar {
328754e4ee71SNavdeep Parhar 	int rc, cntxt_id;
328854e4ee71SNavdeep Parhar 	struct fw_eq_eth_cmd c;
328990e7434aSNavdeep Parhar 	int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
329054e4ee71SNavdeep Parhar 
329154e4ee71SNavdeep Parhar 	bzero(&c, sizeof(c));
329254e4ee71SNavdeep Parhar 
329354e4ee71SNavdeep Parhar 	c.op_to_vfn = htobe32(V_FW_CMD_OP(FW_EQ_ETH_CMD) | F_FW_CMD_REQUEST |
329454e4ee71SNavdeep Parhar 	    F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_ETH_CMD_PFN(sc->pf) |
329554e4ee71SNavdeep Parhar 	    V_FW_EQ_ETH_CMD_VFN(0));
329654e4ee71SNavdeep Parhar 	c.alloc_to_len16 = htobe32(F_FW_EQ_ETH_CMD_ALLOC |
329754e4ee71SNavdeep Parhar 	    F_FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c));
32987951040fSNavdeep Parhar 	c.autoequiqe_to_viid = htobe32(F_FW_EQ_ETH_CMD_AUTOEQUIQE |
3299fe2ebb76SJohn Baldwin 	    F_FW_EQ_ETH_CMD_AUTOEQUEQE | V_FW_EQ_ETH_CMD_VIID(vi->viid));
330054e4ee71SNavdeep Parhar 	c.fetchszm_to_iqid =
33017951040fSNavdeep Parhar 	    htobe32(V_FW_EQ_ETH_CMD_HOSTFCMODE(X_HOSTFCMODE_NONE) |
3302733b9277SNavdeep Parhar 		V_FW_EQ_ETH_CMD_PCIECHN(eq->tx_chan) | F_FW_EQ_ETH_CMD_FETCHRO |
3303aa2457e1SNavdeep Parhar 		V_FW_EQ_ETH_CMD_IQID(eq->iqid));
330454e4ee71SNavdeep Parhar 	c.dcaen_to_eqsize = htobe32(V_FW_EQ_ETH_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
330554e4ee71SNavdeep Parhar 	    V_FW_EQ_ETH_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
33067951040fSNavdeep Parhar 	    V_FW_EQ_ETH_CMD_EQSIZE(qsize));
330754e4ee71SNavdeep Parhar 	c.eqaddr = htobe64(eq->ba);
330854e4ee71SNavdeep Parhar 
330954e4ee71SNavdeep Parhar 	rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
331054e4ee71SNavdeep Parhar 	if (rc != 0) {
3311fe2ebb76SJohn Baldwin 		device_printf(vi->dev,
3312733b9277SNavdeep Parhar 		    "failed to create Ethernet egress queue: %d\n", rc);
3313733b9277SNavdeep Parhar 		return (rc);
3314733b9277SNavdeep Parhar 	}
3315733b9277SNavdeep Parhar 	eq->flags |= EQ_ALLOCATED;
3316733b9277SNavdeep Parhar 
3317733b9277SNavdeep Parhar 	eq->cntxt_id = G_FW_EQ_ETH_CMD_EQID(be32toh(c.eqid_pkd));
3318733b9277SNavdeep Parhar 	cntxt_id = eq->cntxt_id - sc->sge.eq_start;
3319733b9277SNavdeep Parhar 	if (cntxt_id >= sc->sge.neq)
3320733b9277SNavdeep Parhar 	    panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
3321733b9277SNavdeep Parhar 		cntxt_id, sc->sge.neq - 1);
3322733b9277SNavdeep Parhar 	sc->sge.eqmap[cntxt_id] = eq;
3323733b9277SNavdeep Parhar 
332454e4ee71SNavdeep Parhar 	return (rc);
332554e4ee71SNavdeep Parhar }
332654e4ee71SNavdeep Parhar 
332709fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
3328733b9277SNavdeep Parhar static int
3329fe2ebb76SJohn Baldwin ofld_eq_alloc(struct adapter *sc, struct vi_info *vi, struct sge_eq *eq)
3330733b9277SNavdeep Parhar {
3331733b9277SNavdeep Parhar 	int rc, cntxt_id;
3332733b9277SNavdeep Parhar 	struct fw_eq_ofld_cmd c;
333390e7434aSNavdeep Parhar 	int qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
333454e4ee71SNavdeep Parhar 
3335733b9277SNavdeep Parhar 	bzero(&c, sizeof(c));
3336733b9277SNavdeep Parhar 
3337733b9277SNavdeep Parhar 	c.op_to_vfn = htonl(V_FW_CMD_OP(FW_EQ_OFLD_CMD) | F_FW_CMD_REQUEST |
3338733b9277SNavdeep Parhar 	    F_FW_CMD_WRITE | F_FW_CMD_EXEC | V_FW_EQ_OFLD_CMD_PFN(sc->pf) |
3339733b9277SNavdeep Parhar 	    V_FW_EQ_OFLD_CMD_VFN(0));
3340733b9277SNavdeep Parhar 	c.alloc_to_len16 = htonl(F_FW_EQ_OFLD_CMD_ALLOC |
3341733b9277SNavdeep Parhar 	    F_FW_EQ_OFLD_CMD_EQSTART | FW_LEN16(c));
3342733b9277SNavdeep Parhar 	c.fetchszm_to_iqid =
33437951040fSNavdeep Parhar 		htonl(V_FW_EQ_OFLD_CMD_HOSTFCMODE(X_HOSTFCMODE_NONE) |
3344733b9277SNavdeep Parhar 		    V_FW_EQ_OFLD_CMD_PCIECHN(eq->tx_chan) |
3345733b9277SNavdeep Parhar 		    F_FW_EQ_OFLD_CMD_FETCHRO | V_FW_EQ_OFLD_CMD_IQID(eq->iqid));
3346733b9277SNavdeep Parhar 	c.dcaen_to_eqsize =
3347733b9277SNavdeep Parhar 	    htobe32(V_FW_EQ_OFLD_CMD_FBMIN(X_FETCHBURSTMIN_64B) |
3348733b9277SNavdeep Parhar 		V_FW_EQ_OFLD_CMD_FBMAX(X_FETCHBURSTMAX_512B) |
33497951040fSNavdeep Parhar 		V_FW_EQ_OFLD_CMD_EQSIZE(qsize));
3350733b9277SNavdeep Parhar 	c.eqaddr = htobe64(eq->ba);
3351733b9277SNavdeep Parhar 
3352733b9277SNavdeep Parhar 	rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
3353733b9277SNavdeep Parhar 	if (rc != 0) {
3354fe2ebb76SJohn Baldwin 		device_printf(vi->dev,
3355733b9277SNavdeep Parhar 		    "failed to create egress queue for TCP offload: %d\n", rc);
3356733b9277SNavdeep Parhar 		return (rc);
3357733b9277SNavdeep Parhar 	}
3358733b9277SNavdeep Parhar 	eq->flags |= EQ_ALLOCATED;
3359733b9277SNavdeep Parhar 
3360733b9277SNavdeep Parhar 	eq->cntxt_id = G_FW_EQ_OFLD_CMD_EQID(be32toh(c.eqid_pkd));
336154e4ee71SNavdeep Parhar 	cntxt_id = eq->cntxt_id - sc->sge.eq_start;
3362733b9277SNavdeep Parhar 	if (cntxt_id >= sc->sge.neq)
3363733b9277SNavdeep Parhar 	    panic("%s: eq->cntxt_id (%d) more than the max (%d)", __func__,
3364733b9277SNavdeep Parhar 		cntxt_id, sc->sge.neq - 1);
336554e4ee71SNavdeep Parhar 	sc->sge.eqmap[cntxt_id] = eq;
336654e4ee71SNavdeep Parhar 
3367733b9277SNavdeep Parhar 	return (rc);
3368733b9277SNavdeep Parhar }
3369733b9277SNavdeep Parhar #endif
3370733b9277SNavdeep Parhar 
3371733b9277SNavdeep Parhar static int
3372fe2ebb76SJohn Baldwin alloc_eq(struct adapter *sc, struct vi_info *vi, struct sge_eq *eq)
3373733b9277SNavdeep Parhar {
33747951040fSNavdeep Parhar 	int rc, qsize;
3375733b9277SNavdeep Parhar 	size_t len;
3376733b9277SNavdeep Parhar 
3377733b9277SNavdeep Parhar 	mtx_init(&eq->eq_lock, eq->lockname, NULL, MTX_DEF);
3378733b9277SNavdeep Parhar 
337990e7434aSNavdeep Parhar 	qsize = eq->sidx + sc->params.sge.spg_len / EQ_ESIZE;
33807951040fSNavdeep Parhar 	len = qsize * EQ_ESIZE;
3381733b9277SNavdeep Parhar 	rc = alloc_ring(sc, len, &eq->desc_tag, &eq->desc_map,
3382733b9277SNavdeep Parhar 	    &eq->ba, (void **)&eq->desc);
3383733b9277SNavdeep Parhar 	if (rc)
3384733b9277SNavdeep Parhar 		return (rc);
3385733b9277SNavdeep Parhar 
3386733b9277SNavdeep Parhar 	eq->pidx = eq->cidx = 0;
33877951040fSNavdeep Parhar 	eq->equeqidx = eq->dbidx = 0;
3388d14b0ac1SNavdeep Parhar 	eq->doorbells = sc->doorbells;
3389733b9277SNavdeep Parhar 
3390733b9277SNavdeep Parhar 	switch (eq->flags & EQ_TYPEMASK) {
3391733b9277SNavdeep Parhar 	case EQ_CTRL:
3392733b9277SNavdeep Parhar 		rc = ctrl_eq_alloc(sc, eq);
3393733b9277SNavdeep Parhar 		break;
3394733b9277SNavdeep Parhar 
3395733b9277SNavdeep Parhar 	case EQ_ETH:
3396fe2ebb76SJohn Baldwin 		rc = eth_eq_alloc(sc, vi, eq);
3397733b9277SNavdeep Parhar 		break;
3398733b9277SNavdeep Parhar 
339909fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
3400733b9277SNavdeep Parhar 	case EQ_OFLD:
3401fe2ebb76SJohn Baldwin 		rc = ofld_eq_alloc(sc, vi, eq);
3402733b9277SNavdeep Parhar 		break;
3403733b9277SNavdeep Parhar #endif
3404733b9277SNavdeep Parhar 
3405733b9277SNavdeep Parhar 	default:
3406733b9277SNavdeep Parhar 		panic("%s: invalid eq type %d.", __func__,
3407733b9277SNavdeep Parhar 		    eq->flags & EQ_TYPEMASK);
3408733b9277SNavdeep Parhar 	}
3409733b9277SNavdeep Parhar 	if (rc != 0) {
3410733b9277SNavdeep Parhar 		device_printf(sc->dev,
3411c086e3d1SNavdeep Parhar 		    "failed to allocate egress queue(%d): %d\n",
3412733b9277SNavdeep Parhar 		    eq->flags & EQ_TYPEMASK, rc);
3413733b9277SNavdeep Parhar 	}
3414733b9277SNavdeep Parhar 
3415d14b0ac1SNavdeep Parhar 	if (isset(&eq->doorbells, DOORBELL_UDB) ||
3416d14b0ac1SNavdeep Parhar 	    isset(&eq->doorbells, DOORBELL_UDBWC) ||
341777ad3c41SNavdeep Parhar 	    isset(&eq->doorbells, DOORBELL_WCWR)) {
341890e7434aSNavdeep Parhar 		uint32_t s_qpp = sc->params.sge.eq_s_qpp;
3419d14b0ac1SNavdeep Parhar 		uint32_t mask = (1 << s_qpp) - 1;
3420d14b0ac1SNavdeep Parhar 		volatile uint8_t *udb;
3421d14b0ac1SNavdeep Parhar 
3422d14b0ac1SNavdeep Parhar 		udb = sc->udbs_base + UDBS_DB_OFFSET;
3423d14b0ac1SNavdeep Parhar 		udb += (eq->cntxt_id >> s_qpp) << PAGE_SHIFT;	/* pg offset */
3424d14b0ac1SNavdeep Parhar 		eq->udb_qid = eq->cntxt_id & mask;		/* id in page */
3425f10405b3SNavdeep Parhar 		if (eq->udb_qid >= PAGE_SIZE / UDBS_SEG_SIZE)
342677ad3c41SNavdeep Parhar 	    		clrbit(&eq->doorbells, DOORBELL_WCWR);
3427d14b0ac1SNavdeep Parhar 		else {
3428d14b0ac1SNavdeep Parhar 			udb += eq->udb_qid << UDBS_SEG_SHIFT;	/* seg offset */
3429d14b0ac1SNavdeep Parhar 			eq->udb_qid = 0;
3430d14b0ac1SNavdeep Parhar 		}
3431d14b0ac1SNavdeep Parhar 		eq->udb = (volatile void *)udb;
3432d14b0ac1SNavdeep Parhar 	}
3433d14b0ac1SNavdeep Parhar 
3434733b9277SNavdeep Parhar 	return (rc);
3435733b9277SNavdeep Parhar }
3436733b9277SNavdeep Parhar 
3437733b9277SNavdeep Parhar static int
3438733b9277SNavdeep Parhar free_eq(struct adapter *sc, struct sge_eq *eq)
3439733b9277SNavdeep Parhar {
3440733b9277SNavdeep Parhar 	int rc;
3441733b9277SNavdeep Parhar 
3442733b9277SNavdeep Parhar 	if (eq->flags & EQ_ALLOCATED) {
3443733b9277SNavdeep Parhar 		switch (eq->flags & EQ_TYPEMASK) {
3444733b9277SNavdeep Parhar 		case EQ_CTRL:
3445733b9277SNavdeep Parhar 			rc = -t4_ctrl_eq_free(sc, sc->mbox, sc->pf, 0,
3446733b9277SNavdeep Parhar 			    eq->cntxt_id);
3447733b9277SNavdeep Parhar 			break;
3448733b9277SNavdeep Parhar 
3449733b9277SNavdeep Parhar 		case EQ_ETH:
3450733b9277SNavdeep Parhar 			rc = -t4_eth_eq_free(sc, sc->mbox, sc->pf, 0,
3451733b9277SNavdeep Parhar 			    eq->cntxt_id);
3452733b9277SNavdeep Parhar 			break;
3453733b9277SNavdeep Parhar 
345409fe6320SNavdeep Parhar #ifdef TCP_OFFLOAD
3455733b9277SNavdeep Parhar 		case EQ_OFLD:
3456733b9277SNavdeep Parhar 			rc = -t4_ofld_eq_free(sc, sc->mbox, sc->pf, 0,
3457733b9277SNavdeep Parhar 			    eq->cntxt_id);
3458733b9277SNavdeep Parhar 			break;
3459733b9277SNavdeep Parhar #endif
3460733b9277SNavdeep Parhar 
3461733b9277SNavdeep Parhar 		default:
3462733b9277SNavdeep Parhar 			panic("%s: invalid eq type %d.", __func__,
3463733b9277SNavdeep Parhar 			    eq->flags & EQ_TYPEMASK);
3464733b9277SNavdeep Parhar 		}
3465733b9277SNavdeep Parhar 		if (rc != 0) {
3466733b9277SNavdeep Parhar 			device_printf(sc->dev,
3467733b9277SNavdeep Parhar 			    "failed to free egress queue (%d): %d\n",
3468733b9277SNavdeep Parhar 			    eq->flags & EQ_TYPEMASK, rc);
3469733b9277SNavdeep Parhar 			return (rc);
3470733b9277SNavdeep Parhar 		}
3471733b9277SNavdeep Parhar 		eq->flags &= ~EQ_ALLOCATED;
3472733b9277SNavdeep Parhar 	}
3473733b9277SNavdeep Parhar 
3474733b9277SNavdeep Parhar 	free_ring(sc, eq->desc_tag, eq->desc_map, eq->ba, eq->desc);
3475733b9277SNavdeep Parhar 
3476733b9277SNavdeep Parhar 	if (mtx_initialized(&eq->eq_lock))
3477733b9277SNavdeep Parhar 		mtx_destroy(&eq->eq_lock);
3478733b9277SNavdeep Parhar 
3479733b9277SNavdeep Parhar 	bzero(eq, sizeof(*eq));
3480733b9277SNavdeep Parhar 	return (0);
3481733b9277SNavdeep Parhar }
3482733b9277SNavdeep Parhar 
3483733b9277SNavdeep Parhar static int
3484fe2ebb76SJohn Baldwin alloc_wrq(struct adapter *sc, struct vi_info *vi, struct sge_wrq *wrq,
3485733b9277SNavdeep Parhar     struct sysctl_oid *oid)
3486733b9277SNavdeep Parhar {
3487733b9277SNavdeep Parhar 	int rc;
3488fe2ebb76SJohn Baldwin 	struct sysctl_ctx_list *ctx = vi ? &vi->ctx : &sc->ctx;
3489733b9277SNavdeep Parhar 	struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
3490733b9277SNavdeep Parhar 
3491fe2ebb76SJohn Baldwin 	rc = alloc_eq(sc, vi, &wrq->eq);
3492733b9277SNavdeep Parhar 	if (rc)
3493733b9277SNavdeep Parhar 		return (rc);
3494733b9277SNavdeep Parhar 
3495733b9277SNavdeep Parhar 	wrq->adapter = sc;
34967951040fSNavdeep Parhar 	TASK_INIT(&wrq->wrq_tx_task, 0, wrq_tx_drain, wrq);
34977951040fSNavdeep Parhar 	TAILQ_INIT(&wrq->incomplete_wrs);
349809fe6320SNavdeep Parhar 	STAILQ_INIT(&wrq->wr_list);
34997951040fSNavdeep Parhar 	wrq->nwr_pending = 0;
35007951040fSNavdeep Parhar 	wrq->ndesc_needed = 0;
3501733b9277SNavdeep Parhar 
3502733b9277SNavdeep Parhar 	SYSCTL_ADD_UINT(ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
3503733b9277SNavdeep Parhar 	    &wrq->eq.cntxt_id, 0, "SGE context id of the queue");
3504733b9277SNavdeep Parhar 	SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "cidx",
3505733b9277SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.cidx, 0, sysctl_uint16, "I",
3506733b9277SNavdeep Parhar 	    "consumer index");
3507733b9277SNavdeep Parhar 	SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "pidx",
3508733b9277SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &wrq->eq.pidx, 0, sysctl_uint16, "I",
3509733b9277SNavdeep Parhar 	    "producer index");
35107951040fSNavdeep Parhar 	SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "tx_wrs_direct", CTLFLAG_RD,
35117951040fSNavdeep Parhar 	    &wrq->tx_wrs_direct, "# of work requests (direct)");
35127951040fSNavdeep Parhar 	SYSCTL_ADD_UQUAD(ctx, children, OID_AUTO, "tx_wrs_copied", CTLFLAG_RD,
35137951040fSNavdeep Parhar 	    &wrq->tx_wrs_copied, "# of work requests (copied)");
3514733b9277SNavdeep Parhar 
3515733b9277SNavdeep Parhar 	return (rc);
3516733b9277SNavdeep Parhar }
3517733b9277SNavdeep Parhar 
3518733b9277SNavdeep Parhar static int
3519733b9277SNavdeep Parhar free_wrq(struct adapter *sc, struct sge_wrq *wrq)
3520733b9277SNavdeep Parhar {
3521733b9277SNavdeep Parhar 	int rc;
3522733b9277SNavdeep Parhar 
3523733b9277SNavdeep Parhar 	rc = free_eq(sc, &wrq->eq);
3524733b9277SNavdeep Parhar 	if (rc)
3525733b9277SNavdeep Parhar 		return (rc);
3526733b9277SNavdeep Parhar 
3527733b9277SNavdeep Parhar 	bzero(wrq, sizeof(*wrq));
3528733b9277SNavdeep Parhar 	return (0);
3529733b9277SNavdeep Parhar }
3530733b9277SNavdeep Parhar 
3531733b9277SNavdeep Parhar static int
3532fe2ebb76SJohn Baldwin alloc_txq(struct vi_info *vi, struct sge_txq *txq, int idx,
3533733b9277SNavdeep Parhar     struct sysctl_oid *oid)
3534733b9277SNavdeep Parhar {
3535733b9277SNavdeep Parhar 	int rc;
3536fe2ebb76SJohn Baldwin 	struct port_info *pi = vi->pi;
3537733b9277SNavdeep Parhar 	struct adapter *sc = pi->adapter;
3538733b9277SNavdeep Parhar 	struct sge_eq *eq = &txq->eq;
3539733b9277SNavdeep Parhar 	char name[16];
3540733b9277SNavdeep Parhar 	struct sysctl_oid_list *children = SYSCTL_CHILDREN(oid);
3541733b9277SNavdeep Parhar 
35427951040fSNavdeep Parhar 	rc = mp_ring_alloc(&txq->r, eq->sidx, txq, eth_tx, can_resume_eth_tx,
35437951040fSNavdeep Parhar 	    M_CXGBE, M_WAITOK);
35447951040fSNavdeep Parhar 	if (rc != 0) {
35457951040fSNavdeep Parhar 		device_printf(sc->dev, "failed to allocate mp_ring: %d\n", rc);
35467951040fSNavdeep Parhar 		return (rc);
35477951040fSNavdeep Parhar 	}
35487951040fSNavdeep Parhar 
3549fe2ebb76SJohn Baldwin 	rc = alloc_eq(sc, vi, eq);
35507951040fSNavdeep Parhar 	if (rc != 0) {
35517951040fSNavdeep Parhar 		mp_ring_free(txq->r);
35527951040fSNavdeep Parhar 		txq->r = NULL;
3553733b9277SNavdeep Parhar 		return (rc);
35547951040fSNavdeep Parhar 	}
3555733b9277SNavdeep Parhar 
35567951040fSNavdeep Parhar 	/* Can't fail after this point. */
35577951040fSNavdeep Parhar 
35587951040fSNavdeep Parhar 	TASK_INIT(&txq->tx_reclaim_task, 0, tx_reclaim, eq);
3559fe2ebb76SJohn Baldwin 	txq->ifp = vi->ifp;
35607951040fSNavdeep Parhar 	txq->gl = sglist_alloc(TX_SGL_SEGS, M_WAITOK);
35617951040fSNavdeep Parhar 	txq->cpl_ctrl0 = htobe32(V_TXPKT_OPCODE(CPL_TX_PKT) |
3562fe2ebb76SJohn Baldwin 	    V_TXPKT_INTF(pi->tx_chan) | V_TXPKT_VF_VLD(1) |
3563fe2ebb76SJohn Baldwin 	    V_TXPKT_VF(vi->viid));
356402f972e8SNavdeep Parhar 	txq->tc_idx = -1;
35657951040fSNavdeep Parhar 	txq->sdesc = malloc(eq->sidx * sizeof(struct tx_sdesc), M_CXGBE,
3566733b9277SNavdeep Parhar 	    M_ZERO | M_WAITOK);
356754e4ee71SNavdeep Parhar 
356854e4ee71SNavdeep Parhar 	snprintf(name, sizeof(name), "%d", idx);
3569fe2ebb76SJohn Baldwin 	oid = SYSCTL_ADD_NODE(&vi->ctx, children, OID_AUTO, name, CTLFLAG_RD,
357054e4ee71SNavdeep Parhar 	    NULL, "tx queue");
357154e4ee71SNavdeep Parhar 	children = SYSCTL_CHILDREN(oid);
357254e4ee71SNavdeep Parhar 
3573fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UINT(&vi->ctx, children, OID_AUTO, "cntxt_id", CTLFLAG_RD,
357459bc8ce0SNavdeep Parhar 	    &eq->cntxt_id, 0, "SGE context id of the queue");
3575fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "cidx",
357659bc8ce0SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &eq->cidx, 0, sysctl_uint16, "I",
357759bc8ce0SNavdeep Parhar 	    "consumer index");
3578fe2ebb76SJohn Baldwin 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "pidx",
357959bc8ce0SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RD, &eq->pidx, 0, sysctl_uint16, "I",
358059bc8ce0SNavdeep Parhar 	    "producer index");
358159bc8ce0SNavdeep Parhar 
358202f972e8SNavdeep Parhar 	SYSCTL_ADD_PROC(&vi->ctx, children, OID_AUTO, "tc",
358302f972e8SNavdeep Parhar 	    CTLTYPE_INT | CTLFLAG_RW, vi, idx, sysctl_tc, "I",
358402f972e8SNavdeep Parhar 	    "traffic class (-1 means none)");
358502f972e8SNavdeep Parhar 
3586fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txcsum", CTLFLAG_RD,
358754e4ee71SNavdeep Parhar 	    &txq->txcsum, "# of times hardware assisted with checksum");
3588fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "vlan_insertion",
358954e4ee71SNavdeep Parhar 	    CTLFLAG_RD, &txq->vlan_insertion,
359054e4ee71SNavdeep Parhar 	    "# of times hardware inserted 802.1Q tag");
3591fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "tso_wrs", CTLFLAG_RD,
3592a1ea9a82SNavdeep Parhar 	    &txq->tso_wrs, "# of TSO work requests");
3593fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "imm_wrs", CTLFLAG_RD,
359454e4ee71SNavdeep Parhar 	    &txq->imm_wrs, "# of work requests with immediate data");
3595fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "sgl_wrs", CTLFLAG_RD,
359654e4ee71SNavdeep Parhar 	    &txq->sgl_wrs, "# of work requests with direct SGL");
3597fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkt_wrs", CTLFLAG_RD,
359854e4ee71SNavdeep Parhar 	    &txq->txpkt_wrs, "# of txpkt work requests (one pkt/WR)");
3599fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkts0_wrs",
36007951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->txpkts0_wrs,
36017951040fSNavdeep Parhar 	    "# of txpkts (type 0) work requests");
3602fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkts1_wrs",
36037951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->txpkts1_wrs,
36047951040fSNavdeep Parhar 	    "# of txpkts (type 1) work requests");
3605fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkts0_pkts",
36067951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->txpkts0_pkts,
36077951040fSNavdeep Parhar 	    "# of frames tx'd using type0 txpkts work requests");
3608fe2ebb76SJohn Baldwin 	SYSCTL_ADD_UQUAD(&vi->ctx, children, OID_AUTO, "txpkts1_pkts",
36097951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->txpkts1_pkts,
36107951040fSNavdeep Parhar 	    "# of frames tx'd using type1 txpkts work requests");
361154e4ee71SNavdeep Parhar 
3612fe2ebb76SJohn Baldwin 	SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_enqueues",
36137951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->r->enqueues,
36147951040fSNavdeep Parhar 	    "# of enqueues to the mp_ring for this queue");
3615fe2ebb76SJohn Baldwin 	SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_drops",
36167951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->r->drops,
36177951040fSNavdeep Parhar 	    "# of drops in the mp_ring for this queue");
3618fe2ebb76SJohn Baldwin 	SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_starts",
36197951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->r->starts,
36207951040fSNavdeep Parhar 	    "# of normal consumer starts in the mp_ring for this queue");
3621fe2ebb76SJohn Baldwin 	SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_stalls",
36227951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->r->stalls,
36237951040fSNavdeep Parhar 	    "# of consumer stalls in the mp_ring for this queue");
3624fe2ebb76SJohn Baldwin 	SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_restarts",
36257951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->r->restarts,
36267951040fSNavdeep Parhar 	    "# of consumer restarts in the mp_ring for this queue");
3627fe2ebb76SJohn Baldwin 	SYSCTL_ADD_COUNTER_U64(&vi->ctx, children, OID_AUTO, "r_abdications",
36287951040fSNavdeep Parhar 	    CTLFLAG_RD, &txq->r->abdications,
36297951040fSNavdeep Parhar 	    "# of consumer abdications in the mp_ring for this queue");
363054e4ee71SNavdeep Parhar 
36317951040fSNavdeep Parhar 	return (0);
363254e4ee71SNavdeep Parhar }
363354e4ee71SNavdeep Parhar 
363454e4ee71SNavdeep Parhar static int
3635fe2ebb76SJohn Baldwin free_txq(struct vi_info *vi, struct sge_txq *txq)
363654e4ee71SNavdeep Parhar {
363754e4ee71SNavdeep Parhar 	int rc;
3638fe2ebb76SJohn Baldwin 	struct adapter *sc = vi->pi->adapter;
363954e4ee71SNavdeep Parhar 	struct sge_eq *eq = &txq->eq;
364054e4ee71SNavdeep Parhar 
3641733b9277SNavdeep Parhar 	rc = free_eq(sc, eq);
3642733b9277SNavdeep Parhar 	if (rc)
364354e4ee71SNavdeep Parhar 		return (rc);
364454e4ee71SNavdeep Parhar 
36457951040fSNavdeep Parhar 	sglist_free(txq->gl);
3646f7dfe243SNavdeep Parhar 	free(txq->sdesc, M_CXGBE);
36477951040fSNavdeep Parhar 	mp_ring_free(txq->r);
364854e4ee71SNavdeep Parhar 
364954e4ee71SNavdeep Parhar 	bzero(txq, sizeof(*txq));
365054e4ee71SNavdeep Parhar 	return (0);
365154e4ee71SNavdeep Parhar }
365254e4ee71SNavdeep Parhar 
365354e4ee71SNavdeep Parhar static void
365454e4ee71SNavdeep Parhar oneseg_dma_callback(void *arg, bus_dma_segment_t *segs, int nseg, int error)
365554e4ee71SNavdeep Parhar {
365654e4ee71SNavdeep Parhar 	bus_addr_t *ba = arg;
365754e4ee71SNavdeep Parhar 
365854e4ee71SNavdeep Parhar 	KASSERT(nseg == 1,
365954e4ee71SNavdeep Parhar 	    ("%s meant for single segment mappings only.", __func__));
366054e4ee71SNavdeep Parhar 
366154e4ee71SNavdeep Parhar 	*ba = error ? 0 : segs->ds_addr;
366254e4ee71SNavdeep Parhar }
366354e4ee71SNavdeep Parhar 
366454e4ee71SNavdeep Parhar static inline void
366554e4ee71SNavdeep Parhar ring_fl_db(struct adapter *sc, struct sge_fl *fl)
366654e4ee71SNavdeep Parhar {
36674d6db4e0SNavdeep Parhar 	uint32_t n, v;
366854e4ee71SNavdeep Parhar 
36694d6db4e0SNavdeep Parhar 	n = IDXDIFF(fl->pidx / 8, fl->dbidx, fl->sidx);
36704d6db4e0SNavdeep Parhar 	MPASS(n > 0);
3671d14b0ac1SNavdeep Parhar 
367254e4ee71SNavdeep Parhar 	wmb();
36734d6db4e0SNavdeep Parhar 	v = fl->dbval | V_PIDX(n);
36744d6db4e0SNavdeep Parhar 	if (fl->udb)
36754d6db4e0SNavdeep Parhar 		*fl->udb = htole32(v);
36764d6db4e0SNavdeep Parhar 	else
3677d14b0ac1SNavdeep Parhar 		t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL), v);
36784d6db4e0SNavdeep Parhar 	IDXINCR(fl->dbidx, n, fl->sidx);
367954e4ee71SNavdeep Parhar }
368054e4ee71SNavdeep Parhar 
3681fb12416cSNavdeep Parhar /*
36824d6db4e0SNavdeep Parhar  * Fills up the freelist by allocating up to 'n' buffers.  Buffers that are
36834d6db4e0SNavdeep Parhar  * recycled do not count towards this allocation budget.
3684733b9277SNavdeep Parhar  *
36854d6db4e0SNavdeep Parhar  * Returns non-zero to indicate that this freelist should be added to the list
36864d6db4e0SNavdeep Parhar  * of starving freelists.
3687fb12416cSNavdeep Parhar  */
3688733b9277SNavdeep Parhar static int
36894d6db4e0SNavdeep Parhar refill_fl(struct adapter *sc, struct sge_fl *fl, int n)
369054e4ee71SNavdeep Parhar {
36914d6db4e0SNavdeep Parhar 	__be64 *d;
36924d6db4e0SNavdeep Parhar 	struct fl_sdesc *sd;
369338035ed6SNavdeep Parhar 	uintptr_t pa;
369454e4ee71SNavdeep Parhar 	caddr_t cl;
36954d6db4e0SNavdeep Parhar 	struct cluster_layout *cll;
36964d6db4e0SNavdeep Parhar 	struct sw_zone_info *swz;
369738035ed6SNavdeep Parhar 	struct cluster_metadata *clm;
36984d6db4e0SNavdeep Parhar 	uint16_t max_pidx;
36994d6db4e0SNavdeep Parhar 	uint16_t hw_cidx = fl->hw_cidx;		/* stable snapshot */
370054e4ee71SNavdeep Parhar 
370154e4ee71SNavdeep Parhar 	FL_LOCK_ASSERT_OWNED(fl);
370254e4ee71SNavdeep Parhar 
37034d6db4e0SNavdeep Parhar 	/*
3704453130d9SPedro F. Giffuni 	 * We always stop at the beginning of the hardware descriptor that's just
37054d6db4e0SNavdeep Parhar 	 * before the one with the hw cidx.  This is to avoid hw pidx = hw cidx,
37064d6db4e0SNavdeep Parhar 	 * which would mean an empty freelist to the chip.
37074d6db4e0SNavdeep Parhar 	 */
37084d6db4e0SNavdeep Parhar 	max_pidx = __predict_false(hw_cidx == 0) ? fl->sidx - 1 : hw_cidx - 1;
37094d6db4e0SNavdeep Parhar 	if (fl->pidx == max_pidx * 8)
37104d6db4e0SNavdeep Parhar 		return (0);
371154e4ee71SNavdeep Parhar 
37124d6db4e0SNavdeep Parhar 	d = &fl->desc[fl->pidx];
37134d6db4e0SNavdeep Parhar 	sd = &fl->sdesc[fl->pidx];
37144d6db4e0SNavdeep Parhar 	cll = &fl->cll_def;	/* default layout */
37154d6db4e0SNavdeep Parhar 	swz = &sc->sge.sw_zone_info[cll->zidx];
37164d6db4e0SNavdeep Parhar 
37174d6db4e0SNavdeep Parhar 	while (n > 0) {
371854e4ee71SNavdeep Parhar 
371954e4ee71SNavdeep Parhar 		if (sd->cl != NULL) {
372054e4ee71SNavdeep Parhar 
3721c3fb7725SNavdeep Parhar 			if (sd->nmbuf == 0) {
372238035ed6SNavdeep Parhar 				/*
372338035ed6SNavdeep Parhar 				 * Fast recycle without involving any atomics on
372438035ed6SNavdeep Parhar 				 * the cluster's metadata (if the cluster has
372538035ed6SNavdeep Parhar 				 * metadata).  This happens when all frames
372638035ed6SNavdeep Parhar 				 * received in the cluster were small enough to
372738035ed6SNavdeep Parhar 				 * fit within a single mbuf each.
372838035ed6SNavdeep Parhar 				 */
372938035ed6SNavdeep Parhar 				fl->cl_fast_recycled++;
3730ccc69b2fSNavdeep Parhar #ifdef INVARIANTS
3731ccc69b2fSNavdeep Parhar 				clm = cl_metadata(sc, fl, &sd->cll, sd->cl);
3732ccc69b2fSNavdeep Parhar 				if (clm != NULL)
3733ccc69b2fSNavdeep Parhar 					MPASS(clm->refcount == 1);
3734ccc69b2fSNavdeep Parhar #endif
373538035ed6SNavdeep Parhar 				goto recycled_fast;
373638035ed6SNavdeep Parhar 			}
373754e4ee71SNavdeep Parhar 
373838035ed6SNavdeep Parhar 			/*
373938035ed6SNavdeep Parhar 			 * Cluster is guaranteed to have metadata.  Clusters
374038035ed6SNavdeep Parhar 			 * without metadata always take the fast recycle path
374138035ed6SNavdeep Parhar 			 * when they're recycled.
374238035ed6SNavdeep Parhar 			 */
374338035ed6SNavdeep Parhar 			clm = cl_metadata(sc, fl, &sd->cll, sd->cl);
374438035ed6SNavdeep Parhar 			MPASS(clm != NULL);
37451458bff9SNavdeep Parhar 
374638035ed6SNavdeep Parhar 			if (atomic_fetchadd_int(&clm->refcount, -1) == 1) {
374738035ed6SNavdeep Parhar 				fl->cl_recycled++;
374882eff304SNavdeep Parhar 				counter_u64_add(extfree_rels, 1);
374954e4ee71SNavdeep Parhar 				goto recycled;
375054e4ee71SNavdeep Parhar 			}
37511458bff9SNavdeep Parhar 			sd->cl = NULL;	/* gave up my reference */
37521458bff9SNavdeep Parhar 		}
375338035ed6SNavdeep Parhar 		MPASS(sd->cl == NULL);
375438035ed6SNavdeep Parhar alloc:
375538035ed6SNavdeep Parhar 		cl = uma_zalloc(swz->zone, M_NOWAIT);
375638035ed6SNavdeep Parhar 		if (__predict_false(cl == NULL)) {
375738035ed6SNavdeep Parhar 			if (cll == &fl->cll_alt || fl->cll_alt.zidx == -1 ||
375838035ed6SNavdeep Parhar 			    fl->cll_def.zidx == fl->cll_alt.zidx)
375954e4ee71SNavdeep Parhar 				break;
376054e4ee71SNavdeep Parhar 
376138035ed6SNavdeep Parhar 			/* fall back to the safe zone */
376238035ed6SNavdeep Parhar 			cll = &fl->cll_alt;
376338035ed6SNavdeep Parhar 			swz = &sc->sge.sw_zone_info[cll->zidx];
376438035ed6SNavdeep Parhar 			goto alloc;
376554e4ee71SNavdeep Parhar 		}
376638035ed6SNavdeep Parhar 		fl->cl_allocated++;
37674d6db4e0SNavdeep Parhar 		n--;
376854e4ee71SNavdeep Parhar 
376938035ed6SNavdeep Parhar 		pa = pmap_kextract((vm_offset_t)cl);
377038035ed6SNavdeep Parhar 		pa += cll->region1;
377154e4ee71SNavdeep Parhar 		sd->cl = cl;
377238035ed6SNavdeep Parhar 		sd->cll = *cll;
377338035ed6SNavdeep Parhar 		*d = htobe64(pa | cll->hwidx);
377438035ed6SNavdeep Parhar 		clm = cl_metadata(sc, fl, cll, cl);
377538035ed6SNavdeep Parhar 		if (clm != NULL) {
37767d29df59SNavdeep Parhar recycled:
377738035ed6SNavdeep Parhar #ifdef INVARIANTS
377838035ed6SNavdeep Parhar 			clm->sd = sd;
377938035ed6SNavdeep Parhar #endif
378038035ed6SNavdeep Parhar 			clm->refcount = 1;
378138035ed6SNavdeep Parhar 		}
3782c3fb7725SNavdeep Parhar 		sd->nmbuf = 0;
378338035ed6SNavdeep Parhar recycled_fast:
378438035ed6SNavdeep Parhar 		d++;
378554e4ee71SNavdeep Parhar 		sd++;
37864d6db4e0SNavdeep Parhar 		if (__predict_false(++fl->pidx % 8 == 0)) {
37874d6db4e0SNavdeep Parhar 			uint16_t pidx = fl->pidx / 8;
37884d6db4e0SNavdeep Parhar 
37894d6db4e0SNavdeep Parhar 			if (__predict_false(pidx == fl->sidx)) {
379054e4ee71SNavdeep Parhar 				fl->pidx = 0;
37914d6db4e0SNavdeep Parhar 				pidx = 0;
379254e4ee71SNavdeep Parhar 				sd = fl->sdesc;
379354e4ee71SNavdeep Parhar 				d = fl->desc;
379454e4ee71SNavdeep Parhar 			}
37954d6db4e0SNavdeep Parhar 			if (pidx == max_pidx)
37964d6db4e0SNavdeep Parhar 				break;
37974d6db4e0SNavdeep Parhar 
37984d6db4e0SNavdeep Parhar 			if (IDXDIFF(pidx, fl->dbidx, fl->sidx) >= 4)
37994d6db4e0SNavdeep Parhar 				ring_fl_db(sc, fl);
38004d6db4e0SNavdeep Parhar 		}
380154e4ee71SNavdeep Parhar 	}
3802fb12416cSNavdeep Parhar 
38034d6db4e0SNavdeep Parhar 	if (fl->pidx / 8 != fl->dbidx)
3804fb12416cSNavdeep Parhar 		ring_fl_db(sc, fl);
3805733b9277SNavdeep Parhar 
3806733b9277SNavdeep Parhar 	return (FL_RUNNING_LOW(fl) && !(fl->flags & FL_STARVING));
3807733b9277SNavdeep Parhar }
3808733b9277SNavdeep Parhar 
3809733b9277SNavdeep Parhar /*
3810733b9277SNavdeep Parhar  * Attempt to refill all starving freelists.
3811733b9277SNavdeep Parhar  */
3812733b9277SNavdeep Parhar static void
3813733b9277SNavdeep Parhar refill_sfl(void *arg)
3814733b9277SNavdeep Parhar {
3815733b9277SNavdeep Parhar 	struct adapter *sc = arg;
3816733b9277SNavdeep Parhar 	struct sge_fl *fl, *fl_temp;
3817733b9277SNavdeep Parhar 
3818fe2ebb76SJohn Baldwin 	mtx_assert(&sc->sfl_lock, MA_OWNED);
3819733b9277SNavdeep Parhar 	TAILQ_FOREACH_SAFE(fl, &sc->sfl, link, fl_temp) {
3820733b9277SNavdeep Parhar 		FL_LOCK(fl);
3821733b9277SNavdeep Parhar 		refill_fl(sc, fl, 64);
3822733b9277SNavdeep Parhar 		if (FL_NOT_RUNNING_LOW(fl) || fl->flags & FL_DOOMED) {
3823733b9277SNavdeep Parhar 			TAILQ_REMOVE(&sc->sfl, fl, link);
3824733b9277SNavdeep Parhar 			fl->flags &= ~FL_STARVING;
3825733b9277SNavdeep Parhar 		}
3826733b9277SNavdeep Parhar 		FL_UNLOCK(fl);
3827733b9277SNavdeep Parhar 	}
3828733b9277SNavdeep Parhar 
3829733b9277SNavdeep Parhar 	if (!TAILQ_EMPTY(&sc->sfl))
3830733b9277SNavdeep Parhar 		callout_schedule(&sc->sfl_callout, hz / 5);
383154e4ee71SNavdeep Parhar }
383254e4ee71SNavdeep Parhar 
383354e4ee71SNavdeep Parhar static int
383454e4ee71SNavdeep Parhar alloc_fl_sdesc(struct sge_fl *fl)
383554e4ee71SNavdeep Parhar {
383654e4ee71SNavdeep Parhar 
38374d6db4e0SNavdeep Parhar 	fl->sdesc = malloc(fl->sidx * 8 * sizeof(struct fl_sdesc), M_CXGBE,
383854e4ee71SNavdeep Parhar 	    M_ZERO | M_WAITOK);
383954e4ee71SNavdeep Parhar 
384054e4ee71SNavdeep Parhar 	return (0);
384154e4ee71SNavdeep Parhar }
384254e4ee71SNavdeep Parhar 
384354e4ee71SNavdeep Parhar static void
38441458bff9SNavdeep Parhar free_fl_sdesc(struct adapter *sc, struct sge_fl *fl)
384554e4ee71SNavdeep Parhar {
384654e4ee71SNavdeep Parhar 	struct fl_sdesc *sd;
384738035ed6SNavdeep Parhar 	struct cluster_metadata *clm;
384838035ed6SNavdeep Parhar 	struct cluster_layout *cll;
384954e4ee71SNavdeep Parhar 	int i;
385054e4ee71SNavdeep Parhar 
385154e4ee71SNavdeep Parhar 	sd = fl->sdesc;
38524d6db4e0SNavdeep Parhar 	for (i = 0; i < fl->sidx * 8; i++, sd++) {
385338035ed6SNavdeep Parhar 		if (sd->cl == NULL)
385438035ed6SNavdeep Parhar 			continue;
385554e4ee71SNavdeep Parhar 
385638035ed6SNavdeep Parhar 		cll = &sd->cll;
385738035ed6SNavdeep Parhar 		clm = cl_metadata(sc, fl, cll, sd->cl);
385882eff304SNavdeep Parhar 		if (sd->nmbuf == 0)
385938035ed6SNavdeep Parhar 			uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl);
386082eff304SNavdeep Parhar 		else if (clm && atomic_fetchadd_int(&clm->refcount, -1) == 1) {
386182eff304SNavdeep Parhar 			uma_zfree(sc->sge.sw_zone_info[cll->zidx].zone, sd->cl);
386282eff304SNavdeep Parhar 			counter_u64_add(extfree_rels, 1);
386354e4ee71SNavdeep Parhar 		}
386438035ed6SNavdeep Parhar 		sd->cl = NULL;
386554e4ee71SNavdeep Parhar 	}
386654e4ee71SNavdeep Parhar 
386754e4ee71SNavdeep Parhar 	free(fl->sdesc, M_CXGBE);
386854e4ee71SNavdeep Parhar 	fl->sdesc = NULL;
386954e4ee71SNavdeep Parhar }
387054e4ee71SNavdeep Parhar 
38717951040fSNavdeep Parhar static inline void
38727951040fSNavdeep Parhar get_pkt_gl(struct mbuf *m, struct sglist *gl)
387354e4ee71SNavdeep Parhar {
38747951040fSNavdeep Parhar 	int rc;
387554e4ee71SNavdeep Parhar 
38767951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m);
387754e4ee71SNavdeep Parhar 
38787951040fSNavdeep Parhar 	sglist_reset(gl);
38797951040fSNavdeep Parhar 	rc = sglist_append_mbuf(gl, m);
38807951040fSNavdeep Parhar 	if (__predict_false(rc != 0)) {
38817951040fSNavdeep Parhar 		panic("%s: mbuf %p (%d segs) was vetted earlier but now fails "
38827951040fSNavdeep Parhar 		    "with %d.", __func__, m, mbuf_nsegs(m), rc);
388354e4ee71SNavdeep Parhar 	}
388454e4ee71SNavdeep Parhar 
38857951040fSNavdeep Parhar 	KASSERT(gl->sg_nseg == mbuf_nsegs(m),
38867951040fSNavdeep Parhar 	    ("%s: nsegs changed for mbuf %p from %d to %d", __func__, m,
38877951040fSNavdeep Parhar 	    mbuf_nsegs(m), gl->sg_nseg));
38887951040fSNavdeep Parhar 	KASSERT(gl->sg_nseg > 0 &&
38897951040fSNavdeep Parhar 	    gl->sg_nseg <= (needs_tso(m) ? TX_SGL_SEGS_TSO : TX_SGL_SEGS),
38907951040fSNavdeep Parhar 	    ("%s: %d segments, should have been 1 <= nsegs <= %d", __func__,
38917951040fSNavdeep Parhar 		gl->sg_nseg, needs_tso(m) ? TX_SGL_SEGS_TSO : TX_SGL_SEGS));
389254e4ee71SNavdeep Parhar }
389354e4ee71SNavdeep Parhar 
389454e4ee71SNavdeep Parhar /*
38957951040fSNavdeep Parhar  * len16 for a txpkt WR with a GL.  Includes the firmware work request header.
389654e4ee71SNavdeep Parhar  */
38977951040fSNavdeep Parhar static inline u_int
38987951040fSNavdeep Parhar txpkt_len16(u_int nsegs, u_int tso)
38997951040fSNavdeep Parhar {
39007951040fSNavdeep Parhar 	u_int n;
39017951040fSNavdeep Parhar 
39027951040fSNavdeep Parhar 	MPASS(nsegs > 0);
39037951040fSNavdeep Parhar 
39047951040fSNavdeep Parhar 	nsegs--; /* first segment is part of ulptx_sgl */
39057951040fSNavdeep Parhar 	n = sizeof(struct fw_eth_tx_pkt_wr) + sizeof(struct cpl_tx_pkt_core) +
39067951040fSNavdeep Parhar 	    sizeof(struct ulptx_sgl) + 8 * ((3 * nsegs) / 2 + (nsegs & 1));
39077951040fSNavdeep Parhar 	if (tso)
39087951040fSNavdeep Parhar 		n += sizeof(struct cpl_tx_pkt_lso_core);
39097951040fSNavdeep Parhar 
39107951040fSNavdeep Parhar 	return (howmany(n, 16));
39117951040fSNavdeep Parhar }
391254e4ee71SNavdeep Parhar 
391354e4ee71SNavdeep Parhar /*
39147951040fSNavdeep Parhar  * len16 for a txpkts type 0 WR with a GL.  Does not include the firmware work
39157951040fSNavdeep Parhar  * request header.
39167951040fSNavdeep Parhar  */
39177951040fSNavdeep Parhar static inline u_int
39187951040fSNavdeep Parhar txpkts0_len16(u_int nsegs)
39197951040fSNavdeep Parhar {
39207951040fSNavdeep Parhar 	u_int n;
39217951040fSNavdeep Parhar 
39227951040fSNavdeep Parhar 	MPASS(nsegs > 0);
39237951040fSNavdeep Parhar 
39247951040fSNavdeep Parhar 	nsegs--; /* first segment is part of ulptx_sgl */
39257951040fSNavdeep Parhar 	n = sizeof(struct ulp_txpkt) + sizeof(struct ulptx_idata) +
39267951040fSNavdeep Parhar 	    sizeof(struct cpl_tx_pkt_core) + sizeof(struct ulptx_sgl) +
39277951040fSNavdeep Parhar 	    8 * ((3 * nsegs) / 2 + (nsegs & 1));
39287951040fSNavdeep Parhar 
39297951040fSNavdeep Parhar 	return (howmany(n, 16));
39307951040fSNavdeep Parhar }
39317951040fSNavdeep Parhar 
39327951040fSNavdeep Parhar /*
39337951040fSNavdeep Parhar  * len16 for a txpkts type 1 WR with a GL.  Does not include the firmware work
39347951040fSNavdeep Parhar  * request header.
39357951040fSNavdeep Parhar  */
39367951040fSNavdeep Parhar static inline u_int
39377951040fSNavdeep Parhar txpkts1_len16(void)
39387951040fSNavdeep Parhar {
39397951040fSNavdeep Parhar 	u_int n;
39407951040fSNavdeep Parhar 
39417951040fSNavdeep Parhar 	n = sizeof(struct cpl_tx_pkt_core) + sizeof(struct ulptx_sgl);
39427951040fSNavdeep Parhar 
39437951040fSNavdeep Parhar 	return (howmany(n, 16));
39447951040fSNavdeep Parhar }
39457951040fSNavdeep Parhar 
39467951040fSNavdeep Parhar static inline u_int
39477951040fSNavdeep Parhar imm_payload(u_int ndesc)
39487951040fSNavdeep Parhar {
39497951040fSNavdeep Parhar 	u_int n;
39507951040fSNavdeep Parhar 
39517951040fSNavdeep Parhar 	n = ndesc * EQ_ESIZE - sizeof(struct fw_eth_tx_pkt_wr) -
39527951040fSNavdeep Parhar 	    sizeof(struct cpl_tx_pkt_core);
39537951040fSNavdeep Parhar 
39547951040fSNavdeep Parhar 	return (n);
39557951040fSNavdeep Parhar }
39567951040fSNavdeep Parhar 
39577951040fSNavdeep Parhar /*
39587951040fSNavdeep Parhar  * Write a txpkt WR for this packet to the hardware descriptors, update the
39597951040fSNavdeep Parhar  * software descriptor, and advance the pidx.  It is guaranteed that enough
39607951040fSNavdeep Parhar  * descriptors are available.
396154e4ee71SNavdeep Parhar  *
39627951040fSNavdeep Parhar  * The return value is the # of hardware descriptors used.
396354e4ee71SNavdeep Parhar  */
39647951040fSNavdeep Parhar static u_int
39657951040fSNavdeep Parhar write_txpkt_wr(struct sge_txq *txq, struct fw_eth_tx_pkt_wr *wr,
39667951040fSNavdeep Parhar     struct mbuf *m0, u_int available)
396754e4ee71SNavdeep Parhar {
396854e4ee71SNavdeep Parhar 	struct sge_eq *eq = &txq->eq;
39697951040fSNavdeep Parhar 	struct tx_sdesc *txsd;
397054e4ee71SNavdeep Parhar 	struct cpl_tx_pkt_core *cpl;
397154e4ee71SNavdeep Parhar 	uint32_t ctrl;	/* used in many unrelated places */
397254e4ee71SNavdeep Parhar 	uint64_t ctrl1;
39737951040fSNavdeep Parhar 	int len16, ndesc, pktlen, nsegs;
397454e4ee71SNavdeep Parhar 	caddr_t dst;
397554e4ee71SNavdeep Parhar 
397654e4ee71SNavdeep Parhar 	TXQ_LOCK_ASSERT_OWNED(txq);
39777951040fSNavdeep Parhar 	M_ASSERTPKTHDR(m0);
39787951040fSNavdeep Parhar 	MPASS(available > 0 && available < eq->sidx);
397954e4ee71SNavdeep Parhar 
39807951040fSNavdeep Parhar 	len16 = mbuf_len16(m0);
39817951040fSNavdeep Parhar 	nsegs = mbuf_nsegs(m0);
39827951040fSNavdeep Parhar 	pktlen = m0->m_pkthdr.len;
398354e4ee71SNavdeep Parhar 	ctrl = sizeof(struct cpl_tx_pkt_core);
39847951040fSNavdeep Parhar 	if (needs_tso(m0))
39852a5f6b0eSNavdeep Parhar 		ctrl += sizeof(struct cpl_tx_pkt_lso_core);
39867951040fSNavdeep Parhar 	else if (pktlen <= imm_payload(2) && available >= 2) {
39877951040fSNavdeep Parhar 		/* Immediate data.  Recalculate len16 and set nsegs to 0. */
3988ecb79ca4SNavdeep Parhar 		ctrl += pktlen;
39897951040fSNavdeep Parhar 		len16 = howmany(sizeof(struct fw_eth_tx_pkt_wr) +
39907951040fSNavdeep Parhar 		    sizeof(struct cpl_tx_pkt_core) + pktlen, 16);
39917951040fSNavdeep Parhar 		nsegs = 0;
399254e4ee71SNavdeep Parhar 	}
39937951040fSNavdeep Parhar 	ndesc = howmany(len16, EQ_ESIZE / 16);
39947951040fSNavdeep Parhar 	MPASS(ndesc <= available);
399554e4ee71SNavdeep Parhar 
399654e4ee71SNavdeep Parhar 	/* Firmware work request header */
39977951040fSNavdeep Parhar 	MPASS(wr == (void *)&eq->desc[eq->pidx]);
399854e4ee71SNavdeep Parhar 	wr->op_immdlen = htobe32(V_FW_WR_OP(FW_ETH_TX_PKT_WR) |
3999733b9277SNavdeep Parhar 	    V_FW_ETH_TX_PKT_WR_IMMDLEN(ctrl));
40006b49a4ecSNavdeep Parhar 
40017951040fSNavdeep Parhar 	ctrl = V_FW_WR_LEN16(len16);
400254e4ee71SNavdeep Parhar 	wr->equiq_to_len16 = htobe32(ctrl);
400354e4ee71SNavdeep Parhar 	wr->r3 = 0;
400454e4ee71SNavdeep Parhar 
40057951040fSNavdeep Parhar 	if (needs_tso(m0)) {
40062a5f6b0eSNavdeep Parhar 		struct cpl_tx_pkt_lso_core *lso = (void *)(wr + 1);
40077951040fSNavdeep Parhar 
40087951040fSNavdeep Parhar 		KASSERT(m0->m_pkthdr.l2hlen > 0 && m0->m_pkthdr.l3hlen > 0 &&
40097951040fSNavdeep Parhar 		    m0->m_pkthdr.l4hlen > 0,
40107951040fSNavdeep Parhar 		    ("%s: mbuf %p needs TSO but missing header lengths",
40117951040fSNavdeep Parhar 			__func__, m0));
401254e4ee71SNavdeep Parhar 
401354e4ee71SNavdeep Parhar 		ctrl = V_LSO_OPCODE(CPL_TX_PKT_LSO) | F_LSO_FIRST_SLICE |
40147951040fSNavdeep Parhar 		    F_LSO_LAST_SLICE | V_LSO_IPHDR_LEN(m0->m_pkthdr.l3hlen >> 2)
40157951040fSNavdeep Parhar 		    | V_LSO_TCPHDR_LEN(m0->m_pkthdr.l4hlen >> 2);
40167951040fSNavdeep Parhar 		if (m0->m_pkthdr.l2hlen == sizeof(struct ether_vlan_header))
401754e4ee71SNavdeep Parhar 			ctrl |= V_LSO_ETHHDR_LEN(1);
40187951040fSNavdeep Parhar 		if (m0->m_pkthdr.l3hlen == sizeof(struct ip6_hdr))
4019a1ea9a82SNavdeep Parhar 			ctrl |= F_LSO_IPV6;
402054e4ee71SNavdeep Parhar 
402154e4ee71SNavdeep Parhar 		lso->lso_ctrl = htobe32(ctrl);
402254e4ee71SNavdeep Parhar 		lso->ipid_ofst = htobe16(0);
40237951040fSNavdeep Parhar 		lso->mss = htobe16(m0->m_pkthdr.tso_segsz);
402454e4ee71SNavdeep Parhar 		lso->seqno_offset = htobe32(0);
4025ecb79ca4SNavdeep Parhar 		lso->len = htobe32(pktlen);
402654e4ee71SNavdeep Parhar 
402754e4ee71SNavdeep Parhar 		cpl = (void *)(lso + 1);
402854e4ee71SNavdeep Parhar 
402954e4ee71SNavdeep Parhar 		txq->tso_wrs++;
403054e4ee71SNavdeep Parhar 	} else
403154e4ee71SNavdeep Parhar 		cpl = (void *)(wr + 1);
403254e4ee71SNavdeep Parhar 
403354e4ee71SNavdeep Parhar 	/* Checksum offload */
403454e4ee71SNavdeep Parhar 	ctrl1 = 0;
40357951040fSNavdeep Parhar 	if (needs_l3_csum(m0) == 0)
403654e4ee71SNavdeep Parhar 		ctrl1 |= F_TXPKT_IPCSUM_DIS;
40377951040fSNavdeep Parhar 	if (needs_l4_csum(m0) == 0)
403854e4ee71SNavdeep Parhar 		ctrl1 |= F_TXPKT_L4CSUM_DIS;
40397951040fSNavdeep Parhar 	if (m0->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
4040b8531380SNavdeep Parhar 	    CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO))
404154e4ee71SNavdeep Parhar 		txq->txcsum++;	/* some hardware assistance provided */
404254e4ee71SNavdeep Parhar 
404354e4ee71SNavdeep Parhar 	/* VLAN tag insertion */
40447951040fSNavdeep Parhar 	if (needs_vlan_insertion(m0)) {
40457951040fSNavdeep Parhar 		ctrl1 |= F_TXPKT_VLAN_VLD | V_TXPKT_VLAN(m0->m_pkthdr.ether_vtag);
404654e4ee71SNavdeep Parhar 		txq->vlan_insertion++;
404754e4ee71SNavdeep Parhar 	}
404854e4ee71SNavdeep Parhar 
404954e4ee71SNavdeep Parhar 	/* CPL header */
40507951040fSNavdeep Parhar 	cpl->ctrl0 = txq->cpl_ctrl0;
405154e4ee71SNavdeep Parhar 	cpl->pack = 0;
4052ecb79ca4SNavdeep Parhar 	cpl->len = htobe16(pktlen);
405354e4ee71SNavdeep Parhar 	cpl->ctrl1 = htobe64(ctrl1);
405454e4ee71SNavdeep Parhar 
405554e4ee71SNavdeep Parhar 	/* SGL */
405654e4ee71SNavdeep Parhar 	dst = (void *)(cpl + 1);
40577951040fSNavdeep Parhar 	if (nsegs > 0) {
40587951040fSNavdeep Parhar 
40597951040fSNavdeep Parhar 		write_gl_to_txd(txq, m0, &dst, eq->sidx - ndesc < eq->pidx);
406054e4ee71SNavdeep Parhar 		txq->sgl_wrs++;
406154e4ee71SNavdeep Parhar 	} else {
40627951040fSNavdeep Parhar 		struct mbuf *m;
40637951040fSNavdeep Parhar 
40647951040fSNavdeep Parhar 		for (m = m0; m != NULL; m = m->m_next) {
406554e4ee71SNavdeep Parhar 			copy_to_txd(eq, mtod(m, caddr_t), &dst, m->m_len);
4066ecb79ca4SNavdeep Parhar #ifdef INVARIANTS
4067ecb79ca4SNavdeep Parhar 			pktlen -= m->m_len;
4068ecb79ca4SNavdeep Parhar #endif
406954e4ee71SNavdeep Parhar 		}
4070ecb79ca4SNavdeep Parhar #ifdef INVARIANTS
4071ecb79ca4SNavdeep Parhar 		KASSERT(pktlen == 0, ("%s: %d bytes left.", __func__, pktlen));
4072ecb79ca4SNavdeep Parhar #endif
40737951040fSNavdeep Parhar 		txq->imm_wrs++;
407454e4ee71SNavdeep Parhar 	}
407554e4ee71SNavdeep Parhar 
407654e4ee71SNavdeep Parhar 	txq->txpkt_wrs++;
407754e4ee71SNavdeep Parhar 
4078f7dfe243SNavdeep Parhar 	txsd = &txq->sdesc[eq->pidx];
40797951040fSNavdeep Parhar 	txsd->m = m0;
408054e4ee71SNavdeep Parhar 	txsd->desc_used = ndesc;
408154e4ee71SNavdeep Parhar 
40827951040fSNavdeep Parhar 	return (ndesc);
408354e4ee71SNavdeep Parhar }
408454e4ee71SNavdeep Parhar 
40857951040fSNavdeep Parhar static int
40867951040fSNavdeep Parhar try_txpkts(struct mbuf *m, struct mbuf *n, struct txpkts *txp, u_int available)
408754e4ee71SNavdeep Parhar {
40887951040fSNavdeep Parhar 	u_int needed, nsegs1, nsegs2, l1, l2;
40897951040fSNavdeep Parhar 
40907951040fSNavdeep Parhar 	if (cannot_use_txpkts(m) || cannot_use_txpkts(n))
40917951040fSNavdeep Parhar 		return (1);
40927951040fSNavdeep Parhar 
40937951040fSNavdeep Parhar 	nsegs1 = mbuf_nsegs(m);
40947951040fSNavdeep Parhar 	nsegs2 = mbuf_nsegs(n);
40957951040fSNavdeep Parhar 	if (nsegs1 + nsegs2 == 2) {
40967951040fSNavdeep Parhar 		txp->wr_type = 1;
40977951040fSNavdeep Parhar 		l1 = l2 = txpkts1_len16();
40987951040fSNavdeep Parhar 	} else {
40997951040fSNavdeep Parhar 		txp->wr_type = 0;
41007951040fSNavdeep Parhar 		l1 = txpkts0_len16(nsegs1);
41017951040fSNavdeep Parhar 		l2 = txpkts0_len16(nsegs2);
41027951040fSNavdeep Parhar 	}
41037951040fSNavdeep Parhar 	txp->len16 = howmany(sizeof(struct fw_eth_tx_pkts_wr), 16) + l1 + l2;
41047951040fSNavdeep Parhar 	needed = howmany(txp->len16, EQ_ESIZE / 16);
41057951040fSNavdeep Parhar 	if (needed > SGE_MAX_WR_NDESC || needed > available)
41067951040fSNavdeep Parhar 		return (1);
41077951040fSNavdeep Parhar 
41087951040fSNavdeep Parhar 	txp->plen = m->m_pkthdr.len + n->m_pkthdr.len;
41097951040fSNavdeep Parhar 	if (txp->plen > 65535)
41107951040fSNavdeep Parhar 		return (1);
41117951040fSNavdeep Parhar 
41127951040fSNavdeep Parhar 	txp->npkt = 2;
41137951040fSNavdeep Parhar 	set_mbuf_len16(m, l1);
41147951040fSNavdeep Parhar 	set_mbuf_len16(n, l2);
41157951040fSNavdeep Parhar 
41167951040fSNavdeep Parhar 	return (0);
41177951040fSNavdeep Parhar }
41187951040fSNavdeep Parhar 
41197951040fSNavdeep Parhar static int
41207951040fSNavdeep Parhar add_to_txpkts(struct mbuf *m, struct txpkts *txp, u_int available)
41217951040fSNavdeep Parhar {
41227951040fSNavdeep Parhar 	u_int plen, len16, needed, nsegs;
41237951040fSNavdeep Parhar 
41247951040fSNavdeep Parhar 	MPASS(txp->wr_type == 0 || txp->wr_type == 1);
41257951040fSNavdeep Parhar 
41267951040fSNavdeep Parhar 	nsegs = mbuf_nsegs(m);
41277951040fSNavdeep Parhar 	if (needs_tso(m) || (txp->wr_type == 1 && nsegs != 1))
41287951040fSNavdeep Parhar 		return (1);
41297951040fSNavdeep Parhar 
41307951040fSNavdeep Parhar 	plen = txp->plen + m->m_pkthdr.len;
41317951040fSNavdeep Parhar 	if (plen > 65535)
41327951040fSNavdeep Parhar 		return (1);
41337951040fSNavdeep Parhar 
41347951040fSNavdeep Parhar 	if (txp->wr_type == 0)
41357951040fSNavdeep Parhar 		len16 = txpkts0_len16(nsegs);
41367951040fSNavdeep Parhar 	else
41377951040fSNavdeep Parhar 		len16 = txpkts1_len16();
41387951040fSNavdeep Parhar 	needed = howmany(txp->len16 + len16, EQ_ESIZE / 16);
41397951040fSNavdeep Parhar 	if (needed > SGE_MAX_WR_NDESC || needed > available)
41407951040fSNavdeep Parhar 		return (1);
41417951040fSNavdeep Parhar 
41427951040fSNavdeep Parhar 	txp->npkt++;
41437951040fSNavdeep Parhar 	txp->plen = plen;
41447951040fSNavdeep Parhar 	txp->len16 += len16;
41457951040fSNavdeep Parhar 	set_mbuf_len16(m, len16);
41467951040fSNavdeep Parhar 
41477951040fSNavdeep Parhar 	return (0);
41487951040fSNavdeep Parhar }
41497951040fSNavdeep Parhar 
41507951040fSNavdeep Parhar /*
41517951040fSNavdeep Parhar  * Write a txpkts WR for the packets in txp to the hardware descriptors, update
41527951040fSNavdeep Parhar  * the software descriptor, and advance the pidx.  It is guaranteed that enough
41537951040fSNavdeep Parhar  * descriptors are available.
41547951040fSNavdeep Parhar  *
41557951040fSNavdeep Parhar  * The return value is the # of hardware descriptors used.
41567951040fSNavdeep Parhar  */
41577951040fSNavdeep Parhar static u_int
41587951040fSNavdeep Parhar write_txpkts_wr(struct sge_txq *txq, struct fw_eth_tx_pkts_wr *wr,
41597951040fSNavdeep Parhar     struct mbuf *m0, const struct txpkts *txp, u_int available)
41607951040fSNavdeep Parhar {
41617951040fSNavdeep Parhar 	struct sge_eq *eq = &txq->eq;
41627951040fSNavdeep Parhar 	struct tx_sdesc *txsd;
41637951040fSNavdeep Parhar 	struct cpl_tx_pkt_core *cpl;
41647951040fSNavdeep Parhar 	uint32_t ctrl;
41657951040fSNavdeep Parhar 	uint64_t ctrl1;
41667951040fSNavdeep Parhar 	int ndesc, checkwrap;
41677951040fSNavdeep Parhar 	struct mbuf *m;
41687951040fSNavdeep Parhar 	void *flitp;
41697951040fSNavdeep Parhar 
41707951040fSNavdeep Parhar 	TXQ_LOCK_ASSERT_OWNED(txq);
41717951040fSNavdeep Parhar 	MPASS(txp->npkt > 0);
41727951040fSNavdeep Parhar 	MPASS(txp->plen < 65536);
41737951040fSNavdeep Parhar 	MPASS(m0 != NULL);
41747951040fSNavdeep Parhar 	MPASS(m0->m_nextpkt != NULL);
41757951040fSNavdeep Parhar 	MPASS(txp->len16 <= howmany(SGE_MAX_WR_LEN, 16));
41767951040fSNavdeep Parhar 	MPASS(available > 0 && available < eq->sidx);
41777951040fSNavdeep Parhar 
41787951040fSNavdeep Parhar 	ndesc = howmany(txp->len16, EQ_ESIZE / 16);
41797951040fSNavdeep Parhar 	MPASS(ndesc <= available);
41807951040fSNavdeep Parhar 
41817951040fSNavdeep Parhar 	MPASS(wr == (void *)&eq->desc[eq->pidx]);
41827951040fSNavdeep Parhar 	wr->op_pkd = htobe32(V_FW_WR_OP(FW_ETH_TX_PKTS_WR));
41837951040fSNavdeep Parhar 	ctrl = V_FW_WR_LEN16(txp->len16);
41847951040fSNavdeep Parhar 	wr->equiq_to_len16 = htobe32(ctrl);
41857951040fSNavdeep Parhar 	wr->plen = htobe16(txp->plen);
41867951040fSNavdeep Parhar 	wr->npkt = txp->npkt;
41877951040fSNavdeep Parhar 	wr->r3 = 0;
41887951040fSNavdeep Parhar 	wr->type = txp->wr_type;
41897951040fSNavdeep Parhar 	flitp = wr + 1;
41907951040fSNavdeep Parhar 
41917951040fSNavdeep Parhar 	/*
41927951040fSNavdeep Parhar 	 * At this point we are 16B into a hardware descriptor.  If checkwrap is
41937951040fSNavdeep Parhar 	 * set then we know the WR is going to wrap around somewhere.  We'll
41947951040fSNavdeep Parhar 	 * check for that at appropriate points.
41957951040fSNavdeep Parhar 	 */
41967951040fSNavdeep Parhar 	checkwrap = eq->sidx - ndesc < eq->pidx;
41977951040fSNavdeep Parhar 	for (m = m0; m != NULL; m = m->m_nextpkt) {
41987951040fSNavdeep Parhar 		if (txp->wr_type == 0) {
419954e4ee71SNavdeep Parhar 			struct ulp_txpkt *ulpmc;
420054e4ee71SNavdeep Parhar 			struct ulptx_idata *ulpsc;
420154e4ee71SNavdeep Parhar 
42027951040fSNavdeep Parhar 			/* ULP master command */
42037951040fSNavdeep Parhar 			ulpmc = flitp;
42047951040fSNavdeep Parhar 			ulpmc->cmd_dest = htobe32(V_ULPTX_CMD(ULP_TX_PKT) |
42057951040fSNavdeep Parhar 			    V_ULP_TXPKT_DEST(0) | V_ULP_TXPKT_FID(eq->iqid));
42067951040fSNavdeep Parhar 			ulpmc->len = htobe32(mbuf_len16(m));
420754e4ee71SNavdeep Parhar 
42087951040fSNavdeep Parhar 			/* ULP subcommand */
42097951040fSNavdeep Parhar 			ulpsc = (void *)(ulpmc + 1);
42107951040fSNavdeep Parhar 			ulpsc->cmd_more = htobe32(V_ULPTX_CMD(ULP_TX_SC_IMM) |
42117951040fSNavdeep Parhar 			    F_ULP_TX_SC_MORE);
42127951040fSNavdeep Parhar 			ulpsc->len = htobe32(sizeof(struct cpl_tx_pkt_core));
42137951040fSNavdeep Parhar 
42147951040fSNavdeep Parhar 			cpl = (void *)(ulpsc + 1);
42157951040fSNavdeep Parhar 			if (checkwrap &&
42167951040fSNavdeep Parhar 			    (uintptr_t)cpl == (uintptr_t)&eq->desc[eq->sidx])
42177951040fSNavdeep Parhar 				cpl = (void *)&eq->desc[0];
42187951040fSNavdeep Parhar 			txq->txpkts0_pkts += txp->npkt;
42197951040fSNavdeep Parhar 			txq->txpkts0_wrs++;
42207951040fSNavdeep Parhar 		} else {
42217951040fSNavdeep Parhar 			cpl = flitp;
42227951040fSNavdeep Parhar 			txq->txpkts1_pkts += txp->npkt;
42237951040fSNavdeep Parhar 			txq->txpkts1_wrs++;
42247951040fSNavdeep Parhar 		}
422554e4ee71SNavdeep Parhar 
422654e4ee71SNavdeep Parhar 		/* Checksum offload */
42277951040fSNavdeep Parhar 		ctrl1 = 0;
42287951040fSNavdeep Parhar 		if (needs_l3_csum(m) == 0)
42297951040fSNavdeep Parhar 			ctrl1 |= F_TXPKT_IPCSUM_DIS;
42307951040fSNavdeep Parhar 		if (needs_l4_csum(m) == 0)
42317951040fSNavdeep Parhar 			ctrl1 |= F_TXPKT_L4CSUM_DIS;
4232b8531380SNavdeep Parhar 		if (m->m_pkthdr.csum_flags & (CSUM_IP | CSUM_TCP | CSUM_UDP |
4233b8531380SNavdeep Parhar 		    CSUM_UDP_IPV6 | CSUM_TCP_IPV6 | CSUM_TSO))
423454e4ee71SNavdeep Parhar 			txq->txcsum++;	/* some hardware assistance provided */
423554e4ee71SNavdeep Parhar 
423654e4ee71SNavdeep Parhar 		/* VLAN tag insertion */
42377951040fSNavdeep Parhar 		if (needs_vlan_insertion(m)) {
42387951040fSNavdeep Parhar 			ctrl1 |= F_TXPKT_VLAN_VLD |
42397951040fSNavdeep Parhar 			    V_TXPKT_VLAN(m->m_pkthdr.ether_vtag);
424054e4ee71SNavdeep Parhar 			txq->vlan_insertion++;
424154e4ee71SNavdeep Parhar 		}
424254e4ee71SNavdeep Parhar 
42437951040fSNavdeep Parhar 		/* CPL header */
42447951040fSNavdeep Parhar 		cpl->ctrl0 = txq->cpl_ctrl0;
424554e4ee71SNavdeep Parhar 		cpl->pack = 0;
424654e4ee71SNavdeep Parhar 		cpl->len = htobe16(m->m_pkthdr.len);
42477951040fSNavdeep Parhar 		cpl->ctrl1 = htobe64(ctrl1);
424854e4ee71SNavdeep Parhar 
42497951040fSNavdeep Parhar 		flitp = cpl + 1;
42507951040fSNavdeep Parhar 		if (checkwrap &&
42517951040fSNavdeep Parhar 		    (uintptr_t)flitp == (uintptr_t)&eq->desc[eq->sidx])
42527951040fSNavdeep Parhar 			flitp = (void *)&eq->desc[0];
425354e4ee71SNavdeep Parhar 
42547951040fSNavdeep Parhar 		write_gl_to_txd(txq, m, (caddr_t *)(&flitp), checkwrap);
425554e4ee71SNavdeep Parhar 
42567951040fSNavdeep Parhar 	}
42577951040fSNavdeep Parhar 
42587951040fSNavdeep Parhar 	txsd = &txq->sdesc[eq->pidx];
42597951040fSNavdeep Parhar 	txsd->m = m0;
42607951040fSNavdeep Parhar 	txsd->desc_used = ndesc;
42617951040fSNavdeep Parhar 
42627951040fSNavdeep Parhar 	return (ndesc);
426354e4ee71SNavdeep Parhar }
426454e4ee71SNavdeep Parhar 
426554e4ee71SNavdeep Parhar /*
426654e4ee71SNavdeep Parhar  * If the SGL ends on an address that is not 16 byte aligned, this function will
42677951040fSNavdeep Parhar  * add a 0 filled flit at the end.
426854e4ee71SNavdeep Parhar  */
42697951040fSNavdeep Parhar static void
42707951040fSNavdeep Parhar write_gl_to_txd(struct sge_txq *txq, struct mbuf *m, caddr_t *to, int checkwrap)
427154e4ee71SNavdeep Parhar {
42727951040fSNavdeep Parhar 	struct sge_eq *eq = &txq->eq;
42737951040fSNavdeep Parhar 	struct sglist *gl = txq->gl;
42747951040fSNavdeep Parhar 	struct sglist_seg *seg;
42757951040fSNavdeep Parhar 	__be64 *flitp, *wrap;
427654e4ee71SNavdeep Parhar 	struct ulptx_sgl *usgl;
42777951040fSNavdeep Parhar 	int i, nflits, nsegs;
427854e4ee71SNavdeep Parhar 
427954e4ee71SNavdeep Parhar 	KASSERT(((uintptr_t)(*to) & 0xf) == 0,
428054e4ee71SNavdeep Parhar 	    ("%s: SGL must start at a 16 byte boundary: %p", __func__, *to));
42817951040fSNavdeep Parhar 	MPASS((uintptr_t)(*to) >= (uintptr_t)&eq->desc[0]);
42827951040fSNavdeep Parhar 	MPASS((uintptr_t)(*to) < (uintptr_t)&eq->desc[eq->sidx]);
428354e4ee71SNavdeep Parhar 
42847951040fSNavdeep Parhar 	get_pkt_gl(m, gl);
42857951040fSNavdeep Parhar 	nsegs = gl->sg_nseg;
42867951040fSNavdeep Parhar 	MPASS(nsegs > 0);
42877951040fSNavdeep Parhar 
42887951040fSNavdeep Parhar 	nflits = (3 * (nsegs - 1)) / 2 + ((nsegs - 1) & 1) + 2;
428954e4ee71SNavdeep Parhar 	flitp = (__be64 *)(*to);
42907951040fSNavdeep Parhar 	wrap = (__be64 *)(&eq->desc[eq->sidx]);
42917951040fSNavdeep Parhar 	seg = &gl->sg_segs[0];
429254e4ee71SNavdeep Parhar 	usgl = (void *)flitp;
429354e4ee71SNavdeep Parhar 
429454e4ee71SNavdeep Parhar 	/*
429554e4ee71SNavdeep Parhar 	 * We start at a 16 byte boundary somewhere inside the tx descriptor
429654e4ee71SNavdeep Parhar 	 * ring, so we're at least 16 bytes away from the status page.  There is
429754e4ee71SNavdeep Parhar 	 * no chance of a wrap around in the middle of usgl (which is 16 bytes).
429854e4ee71SNavdeep Parhar 	 */
429954e4ee71SNavdeep Parhar 
430054e4ee71SNavdeep Parhar 	usgl->cmd_nsge = htobe32(V_ULPTX_CMD(ULP_TX_SC_DSGL) |
43017951040fSNavdeep Parhar 	    V_ULPTX_NSGE(nsegs));
43027951040fSNavdeep Parhar 	usgl->len0 = htobe32(seg->ss_len);
43037951040fSNavdeep Parhar 	usgl->addr0 = htobe64(seg->ss_paddr);
430454e4ee71SNavdeep Parhar 	seg++;
430554e4ee71SNavdeep Parhar 
43067951040fSNavdeep Parhar 	if (checkwrap == 0 || (uintptr_t)(flitp + nflits) <= (uintptr_t)wrap) {
430754e4ee71SNavdeep Parhar 
430854e4ee71SNavdeep Parhar 		/* Won't wrap around at all */
430954e4ee71SNavdeep Parhar 
43107951040fSNavdeep Parhar 		for (i = 0; i < nsegs - 1; i++, seg++) {
43117951040fSNavdeep Parhar 			usgl->sge[i / 2].len[i & 1] = htobe32(seg->ss_len);
43127951040fSNavdeep Parhar 			usgl->sge[i / 2].addr[i & 1] = htobe64(seg->ss_paddr);
431354e4ee71SNavdeep Parhar 		}
431454e4ee71SNavdeep Parhar 		if (i & 1)
431554e4ee71SNavdeep Parhar 			usgl->sge[i / 2].len[1] = htobe32(0);
43167951040fSNavdeep Parhar 		flitp += nflits;
431754e4ee71SNavdeep Parhar 	} else {
431854e4ee71SNavdeep Parhar 
431954e4ee71SNavdeep Parhar 		/* Will wrap somewhere in the rest of the SGL */
432054e4ee71SNavdeep Parhar 
432154e4ee71SNavdeep Parhar 		/* 2 flits already written, write the rest flit by flit */
432254e4ee71SNavdeep Parhar 		flitp = (void *)(usgl + 1);
43237951040fSNavdeep Parhar 		for (i = 0; i < nflits - 2; i++) {
43247951040fSNavdeep Parhar 			if (flitp == wrap)
432554e4ee71SNavdeep Parhar 				flitp = (void *)eq->desc;
43267951040fSNavdeep Parhar 			*flitp++ = get_flit(seg, nsegs - 1, i);
432754e4ee71SNavdeep Parhar 		}
432854e4ee71SNavdeep Parhar 	}
432954e4ee71SNavdeep Parhar 
43307951040fSNavdeep Parhar 	if (nflits & 1) {
43317951040fSNavdeep Parhar 		MPASS(((uintptr_t)flitp) & 0xf);
43327951040fSNavdeep Parhar 		*flitp++ = 0;
43337951040fSNavdeep Parhar 	}
433454e4ee71SNavdeep Parhar 
43357951040fSNavdeep Parhar 	MPASS((((uintptr_t)flitp) & 0xf) == 0);
43367951040fSNavdeep Parhar 	if (__predict_false(flitp == wrap))
433754e4ee71SNavdeep Parhar 		*to = (void *)eq->desc;
433854e4ee71SNavdeep Parhar 	else
43397951040fSNavdeep Parhar 		*to = (void *)flitp;
434054e4ee71SNavdeep Parhar }
434154e4ee71SNavdeep Parhar 
434254e4ee71SNavdeep Parhar static inline void
434354e4ee71SNavdeep Parhar copy_to_txd(struct sge_eq *eq, caddr_t from, caddr_t *to, int len)
434454e4ee71SNavdeep Parhar {
43457951040fSNavdeep Parhar 
43467951040fSNavdeep Parhar 	MPASS((uintptr_t)(*to) >= (uintptr_t)&eq->desc[0]);
43477951040fSNavdeep Parhar 	MPASS((uintptr_t)(*to) < (uintptr_t)&eq->desc[eq->sidx]);
43487951040fSNavdeep Parhar 
43497951040fSNavdeep Parhar 	if (__predict_true((uintptr_t)(*to) + len <=
43507951040fSNavdeep Parhar 	    (uintptr_t)&eq->desc[eq->sidx])) {
435154e4ee71SNavdeep Parhar 		bcopy(from, *to, len);
435254e4ee71SNavdeep Parhar 		(*to) += len;
435354e4ee71SNavdeep Parhar 	} else {
43547951040fSNavdeep Parhar 		int portion = (uintptr_t)&eq->desc[eq->sidx] - (uintptr_t)(*to);
435554e4ee71SNavdeep Parhar 
435654e4ee71SNavdeep Parhar 		bcopy(from, *to, portion);
435754e4ee71SNavdeep Parhar 		from += portion;
435854e4ee71SNavdeep Parhar 		portion = len - portion;	/* remaining */
435954e4ee71SNavdeep Parhar 		bcopy(from, (void *)eq->desc, portion);
436054e4ee71SNavdeep Parhar 		(*to) = (caddr_t)eq->desc + portion;
436154e4ee71SNavdeep Parhar 	}
436254e4ee71SNavdeep Parhar }
436354e4ee71SNavdeep Parhar 
436454e4ee71SNavdeep Parhar static inline void
43657951040fSNavdeep Parhar ring_eq_db(struct adapter *sc, struct sge_eq *eq, u_int n)
436654e4ee71SNavdeep Parhar {
43677951040fSNavdeep Parhar 	u_int db;
43687951040fSNavdeep Parhar 
43697951040fSNavdeep Parhar 	MPASS(n > 0);
4370d14b0ac1SNavdeep Parhar 
4371d14b0ac1SNavdeep Parhar 	db = eq->doorbells;
43727951040fSNavdeep Parhar 	if (n > 1)
437377ad3c41SNavdeep Parhar 		clrbit(&db, DOORBELL_WCWR);
4374d14b0ac1SNavdeep Parhar 	wmb();
4375d14b0ac1SNavdeep Parhar 
4376d14b0ac1SNavdeep Parhar 	switch (ffs(db) - 1) {
4377d14b0ac1SNavdeep Parhar 	case DOORBELL_UDB:
43787951040fSNavdeep Parhar 		*eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(n));
43797951040fSNavdeep Parhar 		break;
4380d14b0ac1SNavdeep Parhar 
438177ad3c41SNavdeep Parhar 	case DOORBELL_WCWR: {
4382d14b0ac1SNavdeep Parhar 		volatile uint64_t *dst, *src;
4383d14b0ac1SNavdeep Parhar 		int i;
4384d14b0ac1SNavdeep Parhar 
4385d14b0ac1SNavdeep Parhar 		/*
4386d14b0ac1SNavdeep Parhar 		 * Queues whose 128B doorbell segment fits in the page do not
4387d14b0ac1SNavdeep Parhar 		 * use relative qid (udb_qid is always 0).  Only queues with
438877ad3c41SNavdeep Parhar 		 * doorbell segments can do WCWR.
4389d14b0ac1SNavdeep Parhar 		 */
43907951040fSNavdeep Parhar 		KASSERT(eq->udb_qid == 0 && n == 1,
4391d14b0ac1SNavdeep Parhar 		    ("%s: inappropriate doorbell (0x%x, %d, %d) for eq %p",
43927951040fSNavdeep Parhar 		    __func__, eq->doorbells, n, eq->dbidx, eq));
4393d14b0ac1SNavdeep Parhar 
4394d14b0ac1SNavdeep Parhar 		dst = (volatile void *)((uintptr_t)eq->udb + UDBS_WR_OFFSET -
4395d14b0ac1SNavdeep Parhar 		    UDBS_DB_OFFSET);
43967951040fSNavdeep Parhar 		i = eq->dbidx;
4397d14b0ac1SNavdeep Parhar 		src = (void *)&eq->desc[i];
4398d14b0ac1SNavdeep Parhar 		while (src != (void *)&eq->desc[i + 1])
4399d14b0ac1SNavdeep Parhar 			*dst++ = *src++;
4400d14b0ac1SNavdeep Parhar 		wmb();
44017951040fSNavdeep Parhar 		break;
4402d14b0ac1SNavdeep Parhar 	}
4403d14b0ac1SNavdeep Parhar 
4404d14b0ac1SNavdeep Parhar 	case DOORBELL_UDBWC:
44057951040fSNavdeep Parhar 		*eq->udb = htole32(V_QID(eq->udb_qid) | V_PIDX(n));
4406d14b0ac1SNavdeep Parhar 		wmb();
44077951040fSNavdeep Parhar 		break;
4408d14b0ac1SNavdeep Parhar 
4409d14b0ac1SNavdeep Parhar 	case DOORBELL_KDB:
4410d14b0ac1SNavdeep Parhar 		t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
44117951040fSNavdeep Parhar 		    V_QID(eq->cntxt_id) | V_PIDX(n));
44127951040fSNavdeep Parhar 		break;
441354e4ee71SNavdeep Parhar 	}
441454e4ee71SNavdeep Parhar 
44157951040fSNavdeep Parhar 	IDXINCR(eq->dbidx, n, eq->sidx);
44167951040fSNavdeep Parhar }
44177951040fSNavdeep Parhar 
44187951040fSNavdeep Parhar static inline u_int
44197951040fSNavdeep Parhar reclaimable_tx_desc(struct sge_eq *eq)
442054e4ee71SNavdeep Parhar {
44217951040fSNavdeep Parhar 	uint16_t hw_cidx;
442254e4ee71SNavdeep Parhar 
44237951040fSNavdeep Parhar 	hw_cidx = read_hw_cidx(eq);
44247951040fSNavdeep Parhar 	return (IDXDIFF(hw_cidx, eq->cidx, eq->sidx));
44257951040fSNavdeep Parhar }
442654e4ee71SNavdeep Parhar 
44277951040fSNavdeep Parhar static inline u_int
44287951040fSNavdeep Parhar total_available_tx_desc(struct sge_eq *eq)
44297951040fSNavdeep Parhar {
44307951040fSNavdeep Parhar 	uint16_t hw_cidx, pidx;
44317951040fSNavdeep Parhar 
44327951040fSNavdeep Parhar 	hw_cidx = read_hw_cidx(eq);
44337951040fSNavdeep Parhar 	pidx = eq->pidx;
44347951040fSNavdeep Parhar 
44357951040fSNavdeep Parhar 	if (pidx == hw_cidx)
44367951040fSNavdeep Parhar 		return (eq->sidx - 1);
443754e4ee71SNavdeep Parhar 	else
44387951040fSNavdeep Parhar 		return (IDXDIFF(hw_cidx, pidx, eq->sidx) - 1);
44397951040fSNavdeep Parhar }
44407951040fSNavdeep Parhar 
44417951040fSNavdeep Parhar static inline uint16_t
44427951040fSNavdeep Parhar read_hw_cidx(struct sge_eq *eq)
44437951040fSNavdeep Parhar {
44447951040fSNavdeep Parhar 	struct sge_qstat *spg = (void *)&eq->desc[eq->sidx];
44457951040fSNavdeep Parhar 	uint16_t cidx = spg->cidx;	/* stable snapshot */
44467951040fSNavdeep Parhar 
44477951040fSNavdeep Parhar 	return (be16toh(cidx));
4448e874ff7aSNavdeep Parhar }
444954e4ee71SNavdeep Parhar 
4450e874ff7aSNavdeep Parhar /*
44517951040fSNavdeep Parhar  * Reclaim 'n' descriptors approximately.
4452e874ff7aSNavdeep Parhar  */
44537951040fSNavdeep Parhar static u_int
44547951040fSNavdeep Parhar reclaim_tx_descs(struct sge_txq *txq, u_int n)
4455e874ff7aSNavdeep Parhar {
4456e874ff7aSNavdeep Parhar 	struct tx_sdesc *txsd;
4457f7dfe243SNavdeep Parhar 	struct sge_eq *eq = &txq->eq;
44587951040fSNavdeep Parhar 	u_int can_reclaim, reclaimed;
445954e4ee71SNavdeep Parhar 
4460733b9277SNavdeep Parhar 	TXQ_LOCK_ASSERT_OWNED(txq);
44617951040fSNavdeep Parhar 	MPASS(n > 0);
4462e874ff7aSNavdeep Parhar 
44637951040fSNavdeep Parhar 	reclaimed = 0;
44647951040fSNavdeep Parhar 	can_reclaim = reclaimable_tx_desc(eq);
44657951040fSNavdeep Parhar 	while (can_reclaim && reclaimed < n) {
446654e4ee71SNavdeep Parhar 		int ndesc;
44677951040fSNavdeep Parhar 		struct mbuf *m, *nextpkt;
446854e4ee71SNavdeep Parhar 
4469f7dfe243SNavdeep Parhar 		txsd = &txq->sdesc[eq->cidx];
447054e4ee71SNavdeep Parhar 		ndesc = txsd->desc_used;
447154e4ee71SNavdeep Parhar 
447254e4ee71SNavdeep Parhar 		/* Firmware doesn't return "partial" credits. */
447354e4ee71SNavdeep Parhar 		KASSERT(can_reclaim >= ndesc,
447454e4ee71SNavdeep Parhar 		    ("%s: unexpected number of credits: %d, %d",
447554e4ee71SNavdeep Parhar 		    __func__, can_reclaim, ndesc));
447654e4ee71SNavdeep Parhar 
44777951040fSNavdeep Parhar 		for (m = txsd->m; m != NULL; m = nextpkt) {
44787951040fSNavdeep Parhar 			nextpkt = m->m_nextpkt;
44797951040fSNavdeep Parhar 			m->m_nextpkt = NULL;
44807951040fSNavdeep Parhar 			m_freem(m);
44817951040fSNavdeep Parhar 		}
448254e4ee71SNavdeep Parhar 		reclaimed += ndesc;
448354e4ee71SNavdeep Parhar 		can_reclaim -= ndesc;
44847951040fSNavdeep Parhar 		IDXINCR(eq->cidx, ndesc, eq->sidx);
448554e4ee71SNavdeep Parhar 	}
448654e4ee71SNavdeep Parhar 
448754e4ee71SNavdeep Parhar 	return (reclaimed);
448854e4ee71SNavdeep Parhar }
448954e4ee71SNavdeep Parhar 
449054e4ee71SNavdeep Parhar static void
44917951040fSNavdeep Parhar tx_reclaim(void *arg, int n)
449254e4ee71SNavdeep Parhar {
44937951040fSNavdeep Parhar 	struct sge_txq *txq = arg;
44947951040fSNavdeep Parhar 	struct sge_eq *eq = &txq->eq;
449554e4ee71SNavdeep Parhar 
44967951040fSNavdeep Parhar 	do {
44977951040fSNavdeep Parhar 		if (TXQ_TRYLOCK(txq) == 0)
44987951040fSNavdeep Parhar 			break;
44997951040fSNavdeep Parhar 		n = reclaim_tx_descs(txq, 32);
45007951040fSNavdeep Parhar 		if (eq->cidx == eq->pidx)
45017951040fSNavdeep Parhar 			eq->equeqidx = eq->pidx;
45027951040fSNavdeep Parhar 		TXQ_UNLOCK(txq);
45037951040fSNavdeep Parhar 	} while (n > 0);
450454e4ee71SNavdeep Parhar }
450554e4ee71SNavdeep Parhar 
450654e4ee71SNavdeep Parhar static __be64
45077951040fSNavdeep Parhar get_flit(struct sglist_seg *segs, int nsegs, int idx)
450854e4ee71SNavdeep Parhar {
450954e4ee71SNavdeep Parhar 	int i = (idx / 3) * 2;
451054e4ee71SNavdeep Parhar 
451154e4ee71SNavdeep Parhar 	switch (idx % 3) {
451254e4ee71SNavdeep Parhar 	case 0: {
451354e4ee71SNavdeep Parhar 		__be64 rc;
451454e4ee71SNavdeep Parhar 
45157951040fSNavdeep Parhar 		rc = htobe32(segs[i].ss_len);
451654e4ee71SNavdeep Parhar 		if (i + 1 < nsegs)
45177951040fSNavdeep Parhar 			rc |= (uint64_t)htobe32(segs[i + 1].ss_len) << 32;
451854e4ee71SNavdeep Parhar 
451954e4ee71SNavdeep Parhar 		return (rc);
452054e4ee71SNavdeep Parhar 	}
452154e4ee71SNavdeep Parhar 	case 1:
45227951040fSNavdeep Parhar 		return (htobe64(segs[i].ss_paddr));
452354e4ee71SNavdeep Parhar 	case 2:
45247951040fSNavdeep Parhar 		return (htobe64(segs[i + 1].ss_paddr));
452554e4ee71SNavdeep Parhar 	}
452654e4ee71SNavdeep Parhar 
452754e4ee71SNavdeep Parhar 	return (0);
452854e4ee71SNavdeep Parhar }
452954e4ee71SNavdeep Parhar 
453054e4ee71SNavdeep Parhar static void
453138035ed6SNavdeep Parhar find_best_refill_source(struct adapter *sc, struct sge_fl *fl, int maxp)
453254e4ee71SNavdeep Parhar {
453338035ed6SNavdeep Parhar 	int8_t zidx, hwidx, idx;
453438035ed6SNavdeep Parhar 	uint16_t region1, region3;
453538035ed6SNavdeep Parhar 	int spare, spare_needed, n;
453638035ed6SNavdeep Parhar 	struct sw_zone_info *swz;
453738035ed6SNavdeep Parhar 	struct hw_buf_info *hwb, *hwb_list = &sc->sge.hw_buf_info[0];
453854e4ee71SNavdeep Parhar 
453938035ed6SNavdeep Parhar 	/*
454038035ed6SNavdeep Parhar 	 * Buffer Packing: Look for PAGE_SIZE or larger zone which has a bufsize
454138035ed6SNavdeep Parhar 	 * large enough for the max payload and cluster metadata.  Otherwise
454238035ed6SNavdeep Parhar 	 * settle for the largest bufsize that leaves enough room in the cluster
454338035ed6SNavdeep Parhar 	 * for metadata.
454438035ed6SNavdeep Parhar 	 *
454538035ed6SNavdeep Parhar 	 * Without buffer packing: Look for the smallest zone which has a
454638035ed6SNavdeep Parhar 	 * bufsize large enough for the max payload.  Settle for the largest
454738035ed6SNavdeep Parhar 	 * bufsize available if there's nothing big enough for max payload.
454838035ed6SNavdeep Parhar 	 */
454938035ed6SNavdeep Parhar 	spare_needed = fl->flags & FL_BUF_PACKING ? CL_METADATA_SIZE : 0;
455038035ed6SNavdeep Parhar 	swz = &sc->sge.sw_zone_info[0];
455138035ed6SNavdeep Parhar 	hwidx = -1;
455238035ed6SNavdeep Parhar 	for (zidx = 0; zidx < SW_ZONE_SIZES; zidx++, swz++) {
455338035ed6SNavdeep Parhar 		if (swz->size > largest_rx_cluster) {
455438035ed6SNavdeep Parhar 			if (__predict_true(hwidx != -1))
455538035ed6SNavdeep Parhar 				break;
455638035ed6SNavdeep Parhar 
455738035ed6SNavdeep Parhar 			/*
455838035ed6SNavdeep Parhar 			 * This is a misconfiguration.  largest_rx_cluster is
455938035ed6SNavdeep Parhar 			 * preventing us from finding a refill source.  See
456038035ed6SNavdeep Parhar 			 * dev.t5nex.<n>.buffer_sizes to figure out why.
456138035ed6SNavdeep Parhar 			 */
456238035ed6SNavdeep Parhar 			device_printf(sc->dev, "largest_rx_cluster=%u leaves no"
456338035ed6SNavdeep Parhar 			    " refill source for fl %p (dma %u).  Ignored.\n",
456438035ed6SNavdeep Parhar 			    largest_rx_cluster, fl, maxp);
456538035ed6SNavdeep Parhar 		}
456638035ed6SNavdeep Parhar 		for (idx = swz->head_hwidx; idx != -1; idx = hwb->next) {
456738035ed6SNavdeep Parhar 			hwb = &hwb_list[idx];
456838035ed6SNavdeep Parhar 			spare = swz->size - hwb->size;
456938035ed6SNavdeep Parhar 			if (spare < spare_needed)
457038035ed6SNavdeep Parhar 				continue;
457138035ed6SNavdeep Parhar 
457238035ed6SNavdeep Parhar 			hwidx = idx;		/* best option so far */
457338035ed6SNavdeep Parhar 			if (hwb->size >= maxp) {
457438035ed6SNavdeep Parhar 
457538035ed6SNavdeep Parhar 				if ((fl->flags & FL_BUF_PACKING) == 0)
457638035ed6SNavdeep Parhar 					goto done; /* stop looking (not packing) */
457738035ed6SNavdeep Parhar 
457838035ed6SNavdeep Parhar 				if (swz->size >= safest_rx_cluster)
457938035ed6SNavdeep Parhar 					goto done; /* stop looking (packing) */
458038035ed6SNavdeep Parhar 			}
458138035ed6SNavdeep Parhar 			break;		/* keep looking, next zone */
458238035ed6SNavdeep Parhar 		}
458338035ed6SNavdeep Parhar 	}
458438035ed6SNavdeep Parhar done:
458538035ed6SNavdeep Parhar 	/* A usable hwidx has been located. */
458638035ed6SNavdeep Parhar 	MPASS(hwidx != -1);
458738035ed6SNavdeep Parhar 	hwb = &hwb_list[hwidx];
458838035ed6SNavdeep Parhar 	zidx = hwb->zidx;
458938035ed6SNavdeep Parhar 	swz = &sc->sge.sw_zone_info[zidx];
459038035ed6SNavdeep Parhar 	region1 = 0;
459138035ed6SNavdeep Parhar 	region3 = swz->size - hwb->size;
459238035ed6SNavdeep Parhar 
459338035ed6SNavdeep Parhar 	/*
459438035ed6SNavdeep Parhar 	 * Stay within this zone and see if there is a better match when mbuf
459538035ed6SNavdeep Parhar 	 * inlining is allowed.  Remember that the hwidx's are sorted in
459638035ed6SNavdeep Parhar 	 * decreasing order of size (so in increasing order of spare area).
459738035ed6SNavdeep Parhar 	 */
459838035ed6SNavdeep Parhar 	for (idx = hwidx; idx != -1; idx = hwb->next) {
459938035ed6SNavdeep Parhar 		hwb = &hwb_list[idx];
460038035ed6SNavdeep Parhar 		spare = swz->size - hwb->size;
460138035ed6SNavdeep Parhar 
460238035ed6SNavdeep Parhar 		if (allow_mbufs_in_cluster == 0 || hwb->size < maxp)
460338035ed6SNavdeep Parhar 			break;
4604e3207e19SNavdeep Parhar 
4605e3207e19SNavdeep Parhar 		/*
4606e3207e19SNavdeep Parhar 		 * Do not inline mbufs if doing so would violate the pad/pack
4607e3207e19SNavdeep Parhar 		 * boundary alignment requirement.
4608e3207e19SNavdeep Parhar 		 */
460990e7434aSNavdeep Parhar 		if (fl_pad && (MSIZE % sc->params.sge.pad_boundary) != 0)
4610e3207e19SNavdeep Parhar 			continue;
4611e3207e19SNavdeep Parhar 		if (fl->flags & FL_BUF_PACKING &&
461290e7434aSNavdeep Parhar 		    (MSIZE % sc->params.sge.pack_boundary) != 0)
4613e3207e19SNavdeep Parhar 			continue;
4614e3207e19SNavdeep Parhar 
461538035ed6SNavdeep Parhar 		if (spare < CL_METADATA_SIZE + MSIZE)
461638035ed6SNavdeep Parhar 			continue;
461738035ed6SNavdeep Parhar 		n = (spare - CL_METADATA_SIZE) / MSIZE;
461838035ed6SNavdeep Parhar 		if (n > howmany(hwb->size, maxp))
461938035ed6SNavdeep Parhar 			break;
462038035ed6SNavdeep Parhar 
462138035ed6SNavdeep Parhar 		hwidx = idx;
46221458bff9SNavdeep Parhar 		if (fl->flags & FL_BUF_PACKING) {
462338035ed6SNavdeep Parhar 			region1 = n * MSIZE;
462438035ed6SNavdeep Parhar 			region3 = spare - region1;
462538035ed6SNavdeep Parhar 		} else {
462638035ed6SNavdeep Parhar 			region1 = MSIZE;
462738035ed6SNavdeep Parhar 			region3 = spare - region1;
462838035ed6SNavdeep Parhar 			break;
462938035ed6SNavdeep Parhar 		}
463038035ed6SNavdeep Parhar 	}
463138035ed6SNavdeep Parhar 
463238035ed6SNavdeep Parhar 	KASSERT(zidx >= 0 && zidx < SW_ZONE_SIZES,
463338035ed6SNavdeep Parhar 	    ("%s: bad zone %d for fl %p, maxp %d", __func__, zidx, fl, maxp));
463438035ed6SNavdeep Parhar 	KASSERT(hwidx >= 0 && hwidx <= SGE_FLBUF_SIZES,
463538035ed6SNavdeep Parhar 	    ("%s: bad hwidx %d for fl %p, maxp %d", __func__, hwidx, fl, maxp));
463638035ed6SNavdeep Parhar 	KASSERT(region1 + sc->sge.hw_buf_info[hwidx].size + region3 ==
463738035ed6SNavdeep Parhar 	    sc->sge.sw_zone_info[zidx].size,
463838035ed6SNavdeep Parhar 	    ("%s: bad buffer layout for fl %p, maxp %d. "
463938035ed6SNavdeep Parhar 		"cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
464038035ed6SNavdeep Parhar 		sc->sge.sw_zone_info[zidx].size, region1,
464138035ed6SNavdeep Parhar 		sc->sge.hw_buf_info[hwidx].size, region3));
464238035ed6SNavdeep Parhar 	if (fl->flags & FL_BUF_PACKING || region1 > 0) {
464338035ed6SNavdeep Parhar 		KASSERT(region3 >= CL_METADATA_SIZE,
464438035ed6SNavdeep Parhar 		    ("%s: no room for metadata.  fl %p, maxp %d; "
464538035ed6SNavdeep Parhar 		    "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
464638035ed6SNavdeep Parhar 		    sc->sge.sw_zone_info[zidx].size, region1,
464738035ed6SNavdeep Parhar 		    sc->sge.hw_buf_info[hwidx].size, region3));
464838035ed6SNavdeep Parhar 		KASSERT(region1 % MSIZE == 0,
464938035ed6SNavdeep Parhar 		    ("%s: bad mbuf region for fl %p, maxp %d. "
465038035ed6SNavdeep Parhar 		    "cl %d; r1 %d, payload %d, r3 %d", __func__, fl, maxp,
465138035ed6SNavdeep Parhar 		    sc->sge.sw_zone_info[zidx].size, region1,
465238035ed6SNavdeep Parhar 		    sc->sge.hw_buf_info[hwidx].size, region3));
465338035ed6SNavdeep Parhar 	}
465438035ed6SNavdeep Parhar 
465538035ed6SNavdeep Parhar 	fl->cll_def.zidx = zidx;
465638035ed6SNavdeep Parhar 	fl->cll_def.hwidx = hwidx;
465738035ed6SNavdeep Parhar 	fl->cll_def.region1 = region1;
465838035ed6SNavdeep Parhar 	fl->cll_def.region3 = region3;
465938035ed6SNavdeep Parhar }
466038035ed6SNavdeep Parhar 
466138035ed6SNavdeep Parhar static void
466238035ed6SNavdeep Parhar find_safe_refill_source(struct adapter *sc, struct sge_fl *fl)
466338035ed6SNavdeep Parhar {
466438035ed6SNavdeep Parhar 	struct sge *s = &sc->sge;
466538035ed6SNavdeep Parhar 	struct hw_buf_info *hwb;
466638035ed6SNavdeep Parhar 	struct sw_zone_info *swz;
466738035ed6SNavdeep Parhar 	int spare;
466838035ed6SNavdeep Parhar 	int8_t hwidx;
466938035ed6SNavdeep Parhar 
467038035ed6SNavdeep Parhar 	if (fl->flags & FL_BUF_PACKING)
467138035ed6SNavdeep Parhar 		hwidx = s->safe_hwidx2;	/* with room for metadata */
467238035ed6SNavdeep Parhar 	else if (allow_mbufs_in_cluster && s->safe_hwidx2 != -1) {
467338035ed6SNavdeep Parhar 		hwidx = s->safe_hwidx2;
467438035ed6SNavdeep Parhar 		hwb = &s->hw_buf_info[hwidx];
467538035ed6SNavdeep Parhar 		swz = &s->sw_zone_info[hwb->zidx];
467638035ed6SNavdeep Parhar 		spare = swz->size - hwb->size;
467738035ed6SNavdeep Parhar 
467838035ed6SNavdeep Parhar 		/* no good if there isn't room for an mbuf as well */
467938035ed6SNavdeep Parhar 		if (spare < CL_METADATA_SIZE + MSIZE)
468038035ed6SNavdeep Parhar 			hwidx = s->safe_hwidx1;
468138035ed6SNavdeep Parhar 	} else
468238035ed6SNavdeep Parhar 		hwidx = s->safe_hwidx1;
468338035ed6SNavdeep Parhar 
468438035ed6SNavdeep Parhar 	if (hwidx == -1) {
468538035ed6SNavdeep Parhar 		/* No fallback source */
468638035ed6SNavdeep Parhar 		fl->cll_alt.hwidx = -1;
468738035ed6SNavdeep Parhar 		fl->cll_alt.zidx = -1;
468838035ed6SNavdeep Parhar 
46891458bff9SNavdeep Parhar 		return;
469054e4ee71SNavdeep Parhar 	}
469154e4ee71SNavdeep Parhar 
469238035ed6SNavdeep Parhar 	hwb = &s->hw_buf_info[hwidx];
469338035ed6SNavdeep Parhar 	swz = &s->sw_zone_info[hwb->zidx];
469438035ed6SNavdeep Parhar 	spare = swz->size - hwb->size;
469538035ed6SNavdeep Parhar 	fl->cll_alt.hwidx = hwidx;
469638035ed6SNavdeep Parhar 	fl->cll_alt.zidx = hwb->zidx;
4697e3207e19SNavdeep Parhar 	if (allow_mbufs_in_cluster &&
469890e7434aSNavdeep Parhar 	    (fl_pad == 0 || (MSIZE % sc->params.sge.pad_boundary) == 0))
469938035ed6SNavdeep Parhar 		fl->cll_alt.region1 = ((spare - CL_METADATA_SIZE) / MSIZE) * MSIZE;
47001458bff9SNavdeep Parhar 	else
470138035ed6SNavdeep Parhar 		fl->cll_alt.region1 = 0;
470238035ed6SNavdeep Parhar 	fl->cll_alt.region3 = spare - fl->cll_alt.region1;
470354e4ee71SNavdeep Parhar }
4704ecb79ca4SNavdeep Parhar 
4705733b9277SNavdeep Parhar static void
4706733b9277SNavdeep Parhar add_fl_to_sfl(struct adapter *sc, struct sge_fl *fl)
4707ecb79ca4SNavdeep Parhar {
4708733b9277SNavdeep Parhar 	mtx_lock(&sc->sfl_lock);
4709733b9277SNavdeep Parhar 	FL_LOCK(fl);
4710733b9277SNavdeep Parhar 	if ((fl->flags & FL_DOOMED) == 0) {
4711733b9277SNavdeep Parhar 		fl->flags |= FL_STARVING;
4712733b9277SNavdeep Parhar 		TAILQ_INSERT_TAIL(&sc->sfl, fl, link);
4713733b9277SNavdeep Parhar 		callout_reset(&sc->sfl_callout, hz / 5, refill_sfl, sc);
4714733b9277SNavdeep Parhar 	}
4715733b9277SNavdeep Parhar 	FL_UNLOCK(fl);
4716733b9277SNavdeep Parhar 	mtx_unlock(&sc->sfl_lock);
4717733b9277SNavdeep Parhar }
4718ecb79ca4SNavdeep Parhar 
47197951040fSNavdeep Parhar static void
47207951040fSNavdeep Parhar handle_wrq_egr_update(struct adapter *sc, struct sge_eq *eq)
47217951040fSNavdeep Parhar {
47227951040fSNavdeep Parhar 	struct sge_wrq *wrq = (void *)eq;
47237951040fSNavdeep Parhar 
47247951040fSNavdeep Parhar 	atomic_readandclear_int(&eq->equiq);
47257951040fSNavdeep Parhar 	taskqueue_enqueue(sc->tq[eq->tx_chan], &wrq->wrq_tx_task);
47267951040fSNavdeep Parhar }
47277951040fSNavdeep Parhar 
47287951040fSNavdeep Parhar static void
47297951040fSNavdeep Parhar handle_eth_egr_update(struct adapter *sc, struct sge_eq *eq)
47307951040fSNavdeep Parhar {
47317951040fSNavdeep Parhar 	struct sge_txq *txq = (void *)eq;
47327951040fSNavdeep Parhar 
47337951040fSNavdeep Parhar 	MPASS((eq->flags & EQ_TYPEMASK) == EQ_ETH);
47347951040fSNavdeep Parhar 
47357951040fSNavdeep Parhar 	atomic_readandclear_int(&eq->equiq);
47367951040fSNavdeep Parhar 	mp_ring_check_drainage(txq->r, 0);
47377951040fSNavdeep Parhar 	taskqueue_enqueue(sc->tq[eq->tx_chan], &txq->tx_reclaim_task);
47387951040fSNavdeep Parhar }
47397951040fSNavdeep Parhar 
4740733b9277SNavdeep Parhar static int
4741733b9277SNavdeep Parhar handle_sge_egr_update(struct sge_iq *iq, const struct rss_header *rss,
4742733b9277SNavdeep Parhar     struct mbuf *m)
4743733b9277SNavdeep Parhar {
4744733b9277SNavdeep Parhar 	const struct cpl_sge_egr_update *cpl = (const void *)(rss + 1);
4745733b9277SNavdeep Parhar 	unsigned int qid = G_EGR_QID(ntohl(cpl->opcode_qid));
4746733b9277SNavdeep Parhar 	struct adapter *sc = iq->adapter;
4747733b9277SNavdeep Parhar 	struct sge *s = &sc->sge;
4748733b9277SNavdeep Parhar 	struct sge_eq *eq;
47497951040fSNavdeep Parhar 	static void (*h[])(struct adapter *, struct sge_eq *) = {NULL,
47507951040fSNavdeep Parhar 		&handle_wrq_egr_update, &handle_eth_egr_update,
47517951040fSNavdeep Parhar 		&handle_wrq_egr_update};
4752733b9277SNavdeep Parhar 
4753733b9277SNavdeep Parhar 	KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__,
4754733b9277SNavdeep Parhar 	    rss->opcode));
4755733b9277SNavdeep Parhar 
4756733b9277SNavdeep Parhar 	eq = s->eqmap[qid - s->eq_start];
47577951040fSNavdeep Parhar 	(*h[eq->flags & EQ_TYPEMASK])(sc, eq);
4758ecb79ca4SNavdeep Parhar 
4759ecb79ca4SNavdeep Parhar 	return (0);
4760ecb79ca4SNavdeep Parhar }
4761f7dfe243SNavdeep Parhar 
47620abd31e2SNavdeep Parhar /* handle_fw_msg works for both fw4_msg and fw6_msg because this is valid */
47630abd31e2SNavdeep Parhar CTASSERT(offsetof(struct cpl_fw4_msg, data) == \
47640abd31e2SNavdeep Parhar     offsetof(struct cpl_fw6_msg, data));
47650abd31e2SNavdeep Parhar 
4766733b9277SNavdeep Parhar static int
47671b4cc91fSNavdeep Parhar handle_fw_msg(struct sge_iq *iq, const struct rss_header *rss, struct mbuf *m)
476856599263SNavdeep Parhar {
47691b4cc91fSNavdeep Parhar 	struct adapter *sc = iq->adapter;
477056599263SNavdeep Parhar 	const struct cpl_fw6_msg *cpl = (const void *)(rss + 1);
477156599263SNavdeep Parhar 
4772733b9277SNavdeep Parhar 	KASSERT(m == NULL, ("%s: payload with opcode %02x", __func__,
4773733b9277SNavdeep Parhar 	    rss->opcode));
4774733b9277SNavdeep Parhar 
47750abd31e2SNavdeep Parhar 	if (cpl->type == FW_TYPE_RSSCPL || cpl->type == FW6_TYPE_RSSCPL) {
47760abd31e2SNavdeep Parhar 		const struct rss_header *rss2;
47770abd31e2SNavdeep Parhar 
47780abd31e2SNavdeep Parhar 		rss2 = (const struct rss_header *)&cpl->data[0];
4779*671bf2b8SNavdeep Parhar 		return (t4_cpl_handler[rss2->opcode](iq, rss2, m));
47800abd31e2SNavdeep Parhar 	}
47810abd31e2SNavdeep Parhar 
4782*671bf2b8SNavdeep Parhar 	return (t4_fw_msg_handler[cpl->type](sc, &cpl->data[0]));
4783f7dfe243SNavdeep Parhar }
4784af49c942SNavdeep Parhar 
4785af49c942SNavdeep Parhar static int
478656599263SNavdeep Parhar sysctl_uint16(SYSCTL_HANDLER_ARGS)
4787af49c942SNavdeep Parhar {
4788af49c942SNavdeep Parhar 	uint16_t *id = arg1;
4789af49c942SNavdeep Parhar 	int i = *id;
4790af49c942SNavdeep Parhar 
4791af49c942SNavdeep Parhar 	return sysctl_handle_int(oidp, &i, 0, req);
4792af49c942SNavdeep Parhar }
479338035ed6SNavdeep Parhar 
479438035ed6SNavdeep Parhar static int
479538035ed6SNavdeep Parhar sysctl_bufsizes(SYSCTL_HANDLER_ARGS)
479638035ed6SNavdeep Parhar {
479738035ed6SNavdeep Parhar 	struct sge *s = arg1;
479838035ed6SNavdeep Parhar 	struct hw_buf_info *hwb = &s->hw_buf_info[0];
479938035ed6SNavdeep Parhar 	struct sw_zone_info *swz = &s->sw_zone_info[0];
480038035ed6SNavdeep Parhar 	int i, rc;
480138035ed6SNavdeep Parhar 	struct sbuf sb;
480238035ed6SNavdeep Parhar 	char c;
480338035ed6SNavdeep Parhar 
480438035ed6SNavdeep Parhar 	sbuf_new(&sb, NULL, 32, SBUF_AUTOEXTEND);
480538035ed6SNavdeep Parhar 	for (i = 0; i < SGE_FLBUF_SIZES; i++, hwb++) {
480638035ed6SNavdeep Parhar 		if (hwb->zidx >= 0 && swz[hwb->zidx].size <= largest_rx_cluster)
480738035ed6SNavdeep Parhar 			c = '*';
480838035ed6SNavdeep Parhar 		else
480938035ed6SNavdeep Parhar 			c = '\0';
481038035ed6SNavdeep Parhar 
481138035ed6SNavdeep Parhar 		sbuf_printf(&sb, "%u%c ", hwb->size, c);
481238035ed6SNavdeep Parhar 	}
481338035ed6SNavdeep Parhar 	sbuf_trim(&sb);
481438035ed6SNavdeep Parhar 	sbuf_finish(&sb);
481538035ed6SNavdeep Parhar 	rc = sysctl_handle_string(oidp, sbuf_data(&sb), sbuf_len(&sb), req);
481638035ed6SNavdeep Parhar 	sbuf_delete(&sb);
481738035ed6SNavdeep Parhar 	return (rc);
481838035ed6SNavdeep Parhar }
481902f972e8SNavdeep Parhar 
482002f972e8SNavdeep Parhar static int
482102f972e8SNavdeep Parhar sysctl_tc(SYSCTL_HANDLER_ARGS)
482202f972e8SNavdeep Parhar {
482302f972e8SNavdeep Parhar 	struct vi_info *vi = arg1;
482402f972e8SNavdeep Parhar 	struct port_info *pi;
482502f972e8SNavdeep Parhar 	struct adapter *sc;
482602f972e8SNavdeep Parhar 	struct sge_txq *txq;
482702f972e8SNavdeep Parhar 	struct tx_sched_class *tc;
482802f972e8SNavdeep Parhar 	int qidx = arg2, rc, tc_idx;
482902f972e8SNavdeep Parhar 	uint32_t fw_queue, fw_class;
483002f972e8SNavdeep Parhar 
483102f972e8SNavdeep Parhar 	MPASS(qidx >= 0 && qidx < vi->ntxq);
483202f972e8SNavdeep Parhar 	pi = vi->pi;
483302f972e8SNavdeep Parhar 	sc = pi->adapter;
483402f972e8SNavdeep Parhar 	txq = &sc->sge.txq[vi->first_txq + qidx];
483502f972e8SNavdeep Parhar 
483602f972e8SNavdeep Parhar 	tc_idx = txq->tc_idx;
483702f972e8SNavdeep Parhar 	rc = sysctl_handle_int(oidp, &tc_idx, 0, req);
483802f972e8SNavdeep Parhar 	if (rc != 0 || req->newptr == NULL)
483902f972e8SNavdeep Parhar 		return (rc);
484002f972e8SNavdeep Parhar 
484102f972e8SNavdeep Parhar 	/* Note that -1 is legitimate input (it means unbind). */
484202f972e8SNavdeep Parhar 	if (tc_idx < -1 || tc_idx >= sc->chip_params->nsched_cls)
484302f972e8SNavdeep Parhar 		return (EINVAL);
484402f972e8SNavdeep Parhar 
484502f972e8SNavdeep Parhar 	rc = begin_synchronized_op(sc, vi, SLEEP_OK | INTR_OK, "t4stc");
484602f972e8SNavdeep Parhar 	if (rc)
484702f972e8SNavdeep Parhar 		return (rc);
484802f972e8SNavdeep Parhar 
484902f972e8SNavdeep Parhar 	if (tc_idx == txq->tc_idx) {
485002f972e8SNavdeep Parhar 		rc = 0;		/* No change, nothing to do. */
485102f972e8SNavdeep Parhar 		goto done;
485202f972e8SNavdeep Parhar 	}
485302f972e8SNavdeep Parhar 
485402f972e8SNavdeep Parhar 	fw_queue = V_FW_PARAMS_MNEM(FW_PARAMS_MNEM_DMAQ) |
485502f972e8SNavdeep Parhar 	    V_FW_PARAMS_PARAM_X(FW_PARAMS_PARAM_DMAQ_EQ_SCHEDCLASS_ETH) |
485602f972e8SNavdeep Parhar 	    V_FW_PARAMS_PARAM_YZ(txq->eq.cntxt_id);
485702f972e8SNavdeep Parhar 
485802f972e8SNavdeep Parhar 	if (tc_idx == -1)
485902f972e8SNavdeep Parhar 		fw_class = 0xffffffff;	/* Unbind. */
486002f972e8SNavdeep Parhar 	else {
486102f972e8SNavdeep Parhar 		/*
486202f972e8SNavdeep Parhar 		 * Bind to a different class.  Ethernet txq's are only allowed
486302f972e8SNavdeep Parhar 		 * to bind to cl-rl mode-class for now.  XXX: too restrictive.
486402f972e8SNavdeep Parhar 		 */
486502f972e8SNavdeep Parhar 		tc = &pi->tc[tc_idx];
486602f972e8SNavdeep Parhar 		if (tc->flags & TX_SC_OK &&
486702f972e8SNavdeep Parhar 		    tc->params.level == SCHED_CLASS_LEVEL_CL_RL &&
486802f972e8SNavdeep Parhar 		    tc->params.mode == SCHED_CLASS_MODE_CLASS) {
486902f972e8SNavdeep Parhar 			/* Ok to proceed. */
487002f972e8SNavdeep Parhar 			fw_class = tc_idx;
487102f972e8SNavdeep Parhar 		} else {
487202f972e8SNavdeep Parhar 			rc = tc->flags & TX_SC_OK ? EBUSY : ENXIO;
487302f972e8SNavdeep Parhar 			goto done;
487402f972e8SNavdeep Parhar 		}
487502f972e8SNavdeep Parhar 	}
487602f972e8SNavdeep Parhar 
487702f972e8SNavdeep Parhar 	rc = -t4_set_params(sc, sc->mbox, sc->pf, 0, 1, &fw_queue, &fw_class);
487802f972e8SNavdeep Parhar 	if (rc == 0) {
487902f972e8SNavdeep Parhar 		if (txq->tc_idx != -1) {
488002f972e8SNavdeep Parhar 			tc = &pi->tc[txq->tc_idx];
488102f972e8SNavdeep Parhar 			MPASS(tc->refcount > 0);
488202f972e8SNavdeep Parhar 			tc->refcount--;
488302f972e8SNavdeep Parhar 		}
488402f972e8SNavdeep Parhar 		if (tc_idx != -1) {
488502f972e8SNavdeep Parhar 			tc = &pi->tc[tc_idx];
488602f972e8SNavdeep Parhar 			tc->refcount++;
488702f972e8SNavdeep Parhar 		}
488802f972e8SNavdeep Parhar 		txq->tc_idx = tc_idx;
488902f972e8SNavdeep Parhar 	}
489002f972e8SNavdeep Parhar done:
489102f972e8SNavdeep Parhar 	end_synchronized_op(sc, 0);
489202f972e8SNavdeep Parhar 	return (rc);
489302f972e8SNavdeep Parhar }
4894