xref: /freebsd/sys/dev/cxgbe/t4_l2t.c (revision 3823d5e198425b4f5e5a80267d195769d1063773)
1 /*-
2  * Copyright (c) 2012 Chelsio Communications, Inc.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 #include <sys/cdefs.h>
27 __FBSDID("$FreeBSD$");
28 
29 #include "opt_inet.h"
30 #include "opt_inet6.h"
31 
32 #include <sys/param.h>
33 #include <sys/eventhandler.h>
34 #include <sys/systm.h>
35 #include <sys/kernel.h>
36 #include <sys/module.h>
37 #include <sys/bus.h>
38 #include <sys/lock.h>
39 #include <sys/mutex.h>
40 #include <sys/rwlock.h>
41 #include <sys/socket.h>
42 #include <sys/sbuf.h>
43 #include <netinet/in.h>
44 
45 #include "common/common.h"
46 #include "common/t4_msg.h"
47 #include "t4_l2t.h"
48 
49 /*
50  * Module locking notes:  There is a RW lock protecting the L2 table as a
51  * whole plus a spinlock per L2T entry.  Entry lookups and allocations happen
52  * under the protection of the table lock, individual entry changes happen
53  * while holding that entry's spinlock.  The table lock nests outside the
54  * entry locks.  Allocations of new entries take the table lock as writers so
55  * no other lookups can happen while allocating new entries.  Entry updates
56  * take the table lock as readers so multiple entries can be updated in
57  * parallel.  An L2T entry can be dropped by decrementing its reference count
58  * and therefore can happen in parallel with entry allocation but no entry
59  * can change state or increment its ref count during allocation as both of
60  * these perform lookups.
61  *
62  * Note: We do not take refereces to ifnets in this module because both
63  * the TOE and the sockets already hold references to the interfaces and the
64  * lifetime of an L2T entry is fully contained in the lifetime of the TOE.
65  */
66 
67 /*
68  * Allocate a free L2T entry.  Must be called with l2t_data.lock held.
69  */
70 struct l2t_entry *
71 t4_alloc_l2e(struct l2t_data *d)
72 {
73 	struct l2t_entry *end, *e, **p;
74 
75 	rw_assert(&d->lock, RA_WLOCKED);
76 
77 	if (!atomic_load_acq_int(&d->nfree))
78 		return (NULL);
79 
80 	/* there's definitely a free entry */
81 	for (e = d->rover, end = &d->l2tab[d->l2t_size]; e != end; ++e)
82 		if (atomic_load_acq_int(&e->refcnt) == 0)
83 			goto found;
84 
85 	for (e = d->l2tab; atomic_load_acq_int(&e->refcnt); ++e)
86 		continue;
87 found:
88 	d->rover = e + 1;
89 	atomic_subtract_int(&d->nfree, 1);
90 
91 	/*
92 	 * The entry we found may be an inactive entry that is
93 	 * presently in the hash table.  We need to remove it.
94 	 */
95 	if (e->state < L2T_STATE_SWITCHING) {
96 		for (p = &d->l2tab[e->hash].first; *p; p = &(*p)->next) {
97 			if (*p == e) {
98 				*p = e->next;
99 				e->next = NULL;
100 				break;
101 			}
102 		}
103 	}
104 
105 	e->state = L2T_STATE_UNUSED;
106 	return (e);
107 }
108 
109 /*
110  * Write an L2T entry.  Must be called with the entry locked.
111  * The write may be synchronous or asynchronous.
112  */
113 int
114 t4_write_l2e(struct adapter *sc, struct l2t_entry *e, int sync)
115 {
116 	struct wrqe *wr;
117 	struct cpl_l2t_write_req *req;
118 	int idx = e->idx + sc->vres.l2t.start;
119 
120 	mtx_assert(&e->lock, MA_OWNED);
121 
122 	wr = alloc_wrqe(sizeof(*req), &sc->sge.mgmtq);
123 	if (wr == NULL)
124 		return (ENOMEM);
125 	req = wrtod(wr);
126 
127 	INIT_TP_WR(req, 0);
128 	OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, idx |
129 	    V_SYNC_WR(sync) | V_TID_QID(sc->sge.fwq.abs_id)));
130 	req->params = htons(V_L2T_W_PORT(e->lport) | V_L2T_W_NOREPLY(!sync));
131 	req->l2t_idx = htons(idx);
132 	req->vlan = htons(e->vlan);
133 	memcpy(req->dst_mac, e->dmac, sizeof(req->dst_mac));
134 
135 	t4_wrq_tx(sc, wr);
136 
137 	if (sync && e->state != L2T_STATE_SWITCHING)
138 		e->state = L2T_STATE_SYNC_WRITE;
139 
140 	return (0);
141 }
142 
143 /*
144  * Allocate an L2T entry for use by a switching rule.  Such need to be
145  * explicitly freed and while busy they are not on any hash chain, so normal
146  * address resolution updates do not see them.
147  */
148 struct l2t_entry *
149 t4_l2t_alloc_switching(struct l2t_data *d)
150 {
151 	struct l2t_entry *e;
152 
153 	rw_wlock(&d->lock);
154 	e = t4_alloc_l2e(d);
155 	if (e) {
156 		mtx_lock(&e->lock);          /* avoid race with t4_l2t_free */
157 		e->state = L2T_STATE_SWITCHING;
158 		atomic_store_rel_int(&e->refcnt, 1);
159 		mtx_unlock(&e->lock);
160 	}
161 	rw_wunlock(&d->lock);
162 	return e;
163 }
164 
165 /*
166  * Sets/updates the contents of a switching L2T entry that has been allocated
167  * with an earlier call to @t4_l2t_alloc_switching.
168  */
169 int
170 t4_l2t_set_switching(struct adapter *sc, struct l2t_entry *e, uint16_t vlan,
171     uint8_t port, uint8_t *eth_addr)
172 {
173 	int rc;
174 
175 	e->vlan = vlan;
176 	e->lport = port;
177 	memcpy(e->dmac, eth_addr, ETHER_ADDR_LEN);
178 	mtx_lock(&e->lock);
179 	rc = t4_write_l2e(sc, e, 0);
180 	mtx_unlock(&e->lock);
181 	return (rc);
182 }
183 
184 int
185 t4_init_l2t(struct adapter *sc, int flags)
186 {
187 	int i, l2t_size;
188 	struct l2t_data *d;
189 
190 	l2t_size = sc->vres.l2t.size;
191 	if (l2t_size < 2)	/* At least 1 bucket for IP and 1 for IPv6 */
192 		return (EINVAL);
193 
194 	d = malloc(sizeof(*d) + l2t_size * sizeof (struct l2t_entry), M_CXGBE,
195 	    M_ZERO | flags);
196 	if (!d)
197 		return (ENOMEM);
198 
199 	d->l2t_size = l2t_size;
200 	d->rover = d->l2tab;
201 	atomic_store_rel_int(&d->nfree, l2t_size);
202 	rw_init(&d->lock, "L2T");
203 
204 	for (i = 0; i < l2t_size; i++) {
205 		struct l2t_entry *e = &d->l2tab[i];
206 
207 		e->idx = i;
208 		e->state = L2T_STATE_UNUSED;
209 		mtx_init(&e->lock, "L2T_E", NULL, MTX_DEF);
210 		STAILQ_INIT(&e->wr_list);
211 		atomic_store_rel_int(&e->refcnt, 0);
212 	}
213 
214 	sc->l2t = d;
215 	t4_register_cpl_handler(sc, CPL_L2T_WRITE_RPL, do_l2t_write_rpl);
216 
217 	return (0);
218 }
219 
220 int
221 t4_free_l2t(struct l2t_data *d)
222 {
223 	int i;
224 
225 	for (i = 0; i < d->l2t_size; i++)
226 		mtx_destroy(&d->l2tab[i].lock);
227 	rw_destroy(&d->lock);
228 	free(d, M_CXGBE);
229 
230 	return (0);
231 }
232 
233 int
234 do_l2t_write_rpl(struct sge_iq *iq, const struct rss_header *rss,
235     struct mbuf *m)
236 {
237 	const struct cpl_l2t_write_rpl *rpl = (const void *)(rss + 1);
238 	unsigned int tid = GET_TID(rpl);
239 	unsigned int idx = tid % L2T_SIZE;
240 
241 	if (__predict_false(rpl->status != CPL_ERR_NONE)) {
242 		log(LOG_ERR,
243 		    "Unexpected L2T_WRITE_RPL (%u) for entry at hw_idx %u\n",
244 		    rpl->status, idx);
245 		return (EINVAL);
246 	}
247 
248 	return (0);
249 }
250 
251 #ifdef SBUF_DRAIN
252 static inline unsigned int
253 vlan_prio(const struct l2t_entry *e)
254 {
255 	return e->vlan >> 13;
256 }
257 
258 static char
259 l2e_state(const struct l2t_entry *e)
260 {
261 	switch (e->state) {
262 	case L2T_STATE_VALID: return 'V';  /* valid, fast-path entry */
263 	case L2T_STATE_STALE: return 'S';  /* needs revalidation, but usable */
264 	case L2T_STATE_SYNC_WRITE: return 'W';
265 	case L2T_STATE_RESOLVING: return STAILQ_EMPTY(&e->wr_list) ? 'R' : 'A';
266 	case L2T_STATE_SWITCHING: return 'X';
267 	default: return 'U';
268 	}
269 }
270 
271 int
272 sysctl_l2t(SYSCTL_HANDLER_ARGS)
273 {
274 	struct adapter *sc = arg1;
275 	struct l2t_data *l2t = sc->l2t;
276 	struct l2t_entry *e;
277 	struct sbuf *sb;
278 	int rc, i, header = 0;
279 	char ip[INET6_ADDRSTRLEN];
280 
281 	if (l2t == NULL)
282 		return (ENXIO);
283 
284 	rc = sysctl_wire_old_buffer(req, 0);
285 	if (rc != 0)
286 		return (rc);
287 
288 	sb = sbuf_new_for_sysctl(NULL, NULL, 4096, req);
289 	if (sb == NULL)
290 		return (ENOMEM);
291 
292 	e = &l2t->l2tab[0];
293 	for (i = 0; i < l2t->l2t_size; i++, e++) {
294 		mtx_lock(&e->lock);
295 		if (e->state == L2T_STATE_UNUSED)
296 			goto skip;
297 
298 		if (header == 0) {
299 			sbuf_printf(sb, " Idx IP address      "
300 			    "Ethernet address  VLAN/P LP State Users Port");
301 			header = 1;
302 		}
303 		if (e->state == L2T_STATE_SWITCHING)
304 			ip[0] = 0;
305 		else {
306 			inet_ntop(e->ipv6 ? AF_INET6 : AF_INET, &e->addr[0],
307 			    &ip[0], sizeof(ip));
308 		}
309 
310 		/*
311 		 * XXX: e->ifp may not be around.
312 		 * XXX: IPv6 addresses may not align properly in the output.
313 		 */
314 		sbuf_printf(sb, "\n%4u %-15s %02x:%02x:%02x:%02x:%02x:%02x %4d"
315 			   " %u %2u   %c   %5u %s",
316 			   e->idx, ip, e->dmac[0], e->dmac[1], e->dmac[2],
317 			   e->dmac[3], e->dmac[4], e->dmac[5],
318 			   e->vlan & 0xfff, vlan_prio(e), e->lport,
319 			   l2e_state(e), atomic_load_acq_int(&e->refcnt),
320 			   e->ifp->if_xname);
321 skip:
322 		mtx_unlock(&e->lock);
323 	}
324 
325 	rc = sbuf_finish(sb);
326 	sbuf_delete(sb);
327 
328 	return (rc);
329 }
330 #endif
331