1 /*- 2 * Copyright (c) 2015-2016 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: John Baldwin <jhb@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 #include <sys/param.h> 30 #include <sys/bus.h> 31 #include <sys/kernel.h> 32 #include <sys/module.h> 33 #include <sys/systm.h> 34 #include <dev/pci/pcivar.h> 35 36 #ifdef PCI_IOV 37 #include <sys/nv.h> 38 #include <sys/iov_schema.h> 39 #include <dev/pci/pci_iov.h> 40 #endif 41 42 #include "common/common.h" 43 #include "common/t4_regs.h" 44 #include "t4_if.h" 45 46 struct t4iov_softc { 47 device_t sc_dev; 48 device_t sc_main; 49 bool sc_attached; 50 51 int pf; 52 int regs_rid; 53 struct resource *regs_res; 54 bus_space_handle_t bh; 55 bus_space_tag_t bt; 56 }; 57 58 struct { 59 uint16_t device; 60 char *desc; 61 } t4iov_pciids[] = { 62 {0x4000, "Chelsio T440-dbg"}, 63 {0x4001, "Chelsio T420-CR"}, 64 {0x4002, "Chelsio T422-CR"}, 65 {0x4003, "Chelsio T440-CR"}, 66 {0x4004, "Chelsio T420-BCH"}, 67 {0x4005, "Chelsio T440-BCH"}, 68 {0x4006, "Chelsio T440-CH"}, 69 {0x4007, "Chelsio T420-SO"}, 70 {0x4008, "Chelsio T420-CX"}, 71 {0x4009, "Chelsio T420-BT"}, 72 {0x400a, "Chelsio T404-BT"}, 73 {0x400e, "Chelsio T440-LP-CR"}, 74 }, t5iov_pciids[] = { 75 {0x5000, "Chelsio T580-dbg"}, 76 {0x5001, "Chelsio T520-CR"}, /* 2 x 10G */ 77 {0x5002, "Chelsio T522-CR"}, /* 2 x 10G, 2 X 1G */ 78 {0x5003, "Chelsio T540-CR"}, /* 4 x 10G */ 79 {0x5007, "Chelsio T520-SO"}, /* 2 x 10G, nomem */ 80 {0x5009, "Chelsio T520-BT"}, /* 2 x 10GBaseT */ 81 {0x500a, "Chelsio T504-BT"}, /* 4 x 1G */ 82 {0x500d, "Chelsio T580-CR"}, /* 2 x 40G */ 83 {0x500e, "Chelsio T540-LP-CR"}, /* 4 x 10G */ 84 {0x5010, "Chelsio T580-LP-CR"}, /* 2 x 40G */ 85 {0x5011, "Chelsio T520-LL-CR"}, /* 2 x 10G */ 86 {0x5012, "Chelsio T560-CR"}, /* 1 x 40G, 2 x 10G */ 87 {0x5014, "Chelsio T580-LP-SO-CR"}, /* 2 x 40G, nomem */ 88 {0x5015, "Chelsio T502-BT"}, /* 2 x 1G */ 89 {0x5018, "Chelsio T540-BT"}, /* 4 x 10GBaseT */ 90 {0x5019, "Chelsio T540-LP-BT"}, /* 4 x 10GBaseT */ 91 {0x501a, "Chelsio T540-SO-BT"}, /* 4 x 10GBaseT, nomem */ 92 {0x501b, "Chelsio T540-SO-CR"}, /* 4 x 10G, nomem */ 93 }, t6iov_pciids[] = { 94 {0x6000, "Chelsio T6-DBG-25"}, /* 2 x 10/25G, debug */ 95 {0x6001, "Chelsio T6225-CR"}, /* 2 x 10/25G */ 96 {0x6002, "Chelsio T6225-SO-CR"}, /* 2 x 10/25G, nomem */ 97 {0x6003, "Chelsio T6425-CR"}, /* 4 x 10/25G */ 98 {0x6004, "Chelsio T6425-SO-CR"}, /* 4 x 10/25G, nomem */ 99 {0x6005, "Chelsio T6225-OCP-SO"}, /* 2 x 10/25G, nomem */ 100 {0x6006, "Chelsio T62100-OCP-SO"}, /* 2 x 40/50/100G, nomem */ 101 {0x6007, "Chelsio T62100-LP-CR"}, /* 2 x 40/50/100G */ 102 {0x6008, "Chelsio T62100-SO-CR"}, /* 2 x 40/50/100G, nomem */ 103 {0x6009, "Chelsio T6210-BT"}, /* 2 x 10GBASE-T */ 104 {0x600d, "Chelsio T62100-CR"}, /* 2 x 40/50/100G */ 105 {0x6010, "Chelsio T6-DBG-100"}, /* 2 x 40/50/100G, debug */ 106 {0x6011, "Chelsio T6225-LL-CR"}, /* 2 x 10/25G */ 107 {0x6014, "Chelsio T61100-OCP-SO"}, /* 1 x 40/50/100G, nomem */ 108 {0x6015, "Chelsio T6201-BT"}, /* 2 x 1000BASE-T */ 109 110 /* Custom */ 111 {0x6080, "Chelsio T6225 80"}, 112 {0x6081, "Chelsio T62100 81"}, 113 {0x6082, "Chelsio T6225-CR 82"}, 114 {0x6083, "Chelsio T62100-CR 83"}, 115 {0x6084, "Chelsio T64100-CR 84"}, 116 {0x6085, "Chelsio T6240-SO 85"}, 117 {0x6086, "Chelsio T6225-SO-CR 86"}, 118 {0x6087, "Chelsio T6225-CR 87"}, 119 }; 120 121 static inline uint32_t 122 t4iov_read_reg(struct t4iov_softc *sc, uint32_t reg) 123 { 124 125 return bus_space_read_4(sc->bt, sc->bh, reg); 126 } 127 128 static int t4iov_attach_child(device_t dev); 129 130 static int 131 t4iov_probe(device_t dev) 132 { 133 uint16_t d; 134 size_t i; 135 136 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO) 137 return (ENXIO); 138 139 d = pci_get_device(dev); 140 for (i = 0; i < nitems(t4iov_pciids); i++) { 141 if (d == t4iov_pciids[i].device) { 142 device_set_desc(dev, t4iov_pciids[i].desc); 143 device_quiet(dev); 144 return (BUS_PROBE_DEFAULT); 145 } 146 } 147 return (ENXIO); 148 } 149 150 static int 151 t5iov_probe(device_t dev) 152 { 153 uint16_t d; 154 size_t i; 155 156 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO) 157 return (ENXIO); 158 159 d = pci_get_device(dev); 160 for (i = 0; i < nitems(t5iov_pciids); i++) { 161 if (d == t5iov_pciids[i].device) { 162 device_set_desc(dev, t5iov_pciids[i].desc); 163 device_quiet(dev); 164 return (BUS_PROBE_DEFAULT); 165 } 166 } 167 return (ENXIO); 168 } 169 170 static int 171 t6iov_probe(device_t dev) 172 { 173 uint16_t d; 174 size_t i; 175 176 if (pci_get_vendor(dev) != PCI_VENDOR_ID_CHELSIO) 177 return (ENXIO); 178 179 d = pci_get_device(dev); 180 for (i = 0; i < nitems(t6iov_pciids); i++) { 181 if (d == t6iov_pciids[i].device) { 182 device_set_desc(dev, t6iov_pciids[i].desc); 183 device_quiet(dev); 184 return (BUS_PROBE_DEFAULT); 185 } 186 } 187 return (ENXIO); 188 } 189 190 static int 191 t4iov_attach(device_t dev) 192 { 193 struct t4iov_softc *sc; 194 uint32_t pl_rev, whoami; 195 int error; 196 197 sc = device_get_softc(dev); 198 sc->sc_dev = dev; 199 200 sc->regs_rid = PCIR_BAR(0); 201 sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 202 &sc->regs_rid, RF_ACTIVE); 203 if (sc->regs_res == NULL) { 204 device_printf(dev, "cannot map registers.\n"); 205 return (ENXIO); 206 } 207 sc->bt = rman_get_bustag(sc->regs_res); 208 sc->bh = rman_get_bushandle(sc->regs_res); 209 210 pl_rev = t4iov_read_reg(sc, A_PL_REV); 211 whoami = t4iov_read_reg(sc, A_PL_WHOAMI); 212 if (G_CHIPID(pl_rev) <= CHELSIO_T5) 213 sc->pf = G_SOURCEPF(whoami); 214 else 215 sc->pf = G_T6_SOURCEPF(whoami); 216 217 sc->sc_main = pci_find_dbsf(pci_get_domain(dev), pci_get_bus(dev), 218 pci_get_slot(dev), 4); 219 if (sc->sc_main == NULL) { 220 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid, 221 sc->regs_res); 222 return (ENXIO); 223 } 224 if (T4_IS_MAIN_READY(sc->sc_main) == 0) { 225 error = t4iov_attach_child(dev); 226 if (error != 0) 227 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid, 228 sc->regs_res); 229 return (error); 230 } 231 return (0); 232 } 233 234 static int 235 t4iov_attach_child(device_t dev) 236 { 237 struct t4iov_softc *sc; 238 #ifdef PCI_IOV 239 nvlist_t *pf_schema, *vf_schema; 240 #endif 241 device_t pdev; 242 int error; 243 244 sc = device_get_softc(dev); 245 MPASS(!sc->sc_attached); 246 247 /* 248 * PF0-3 are associated with a specific port on the NIC (PF0 249 * with port 0, etc.). Ask the PF4 driver for the device for 250 * this function's associated port to determine if the port is 251 * present. 252 */ 253 error = T4_READ_PORT_DEVICE(sc->sc_main, pci_get_function(dev), &pdev); 254 if (error) 255 return (0); 256 257 #ifdef PCI_IOV 258 pf_schema = pci_iov_schema_alloc_node(); 259 vf_schema = pci_iov_schema_alloc_node(); 260 pci_iov_schema_add_unicast_mac(vf_schema, "mac-addr", 0, NULL); 261 error = pci_iov_attach_name(dev, pf_schema, vf_schema, "%s", 262 device_get_nameunit(pdev)); 263 if (error) { 264 device_printf(dev, "Failed to initialize SR-IOV: %d\n", error); 265 return (0); 266 } 267 #endif 268 269 sc->sc_attached = true; 270 return (0); 271 } 272 273 static int 274 t4iov_detach_child(device_t dev) 275 { 276 struct t4iov_softc *sc; 277 #ifdef PCI_IOV 278 int error; 279 #endif 280 281 sc = device_get_softc(dev); 282 if (!sc->sc_attached) 283 return (0); 284 285 #ifdef PCI_IOV 286 error = pci_iov_detach(dev); 287 if (error != 0) { 288 device_printf(dev, "Failed to disable SR-IOV\n"); 289 return (error); 290 } 291 #endif 292 293 sc->sc_attached = false; 294 return (0); 295 } 296 297 static int 298 t4iov_detach(device_t dev) 299 { 300 struct t4iov_softc *sc; 301 int error; 302 303 sc = device_get_softc(dev); 304 if (sc->sc_attached) { 305 error = t4iov_detach_child(dev); 306 if (error) 307 return (error); 308 } 309 if (sc->regs_res) { 310 bus_release_resource(dev, SYS_RES_MEMORY, sc->regs_rid, 311 sc->regs_res); 312 } 313 return (0); 314 } 315 316 #ifdef PCI_IOV 317 static int 318 t4iov_iov_init(device_t dev, uint16_t num_vfs, const struct nvlist *config) 319 { 320 321 /* XXX: The Linux driver sets up a vf_monitor task on T4 adapters. */ 322 return (0); 323 } 324 325 static void 326 t4iov_iov_uninit(device_t dev) 327 { 328 } 329 330 static int 331 t4iov_add_vf(device_t dev, uint16_t vfnum, const struct nvlist *config) 332 { 333 const void *mac; 334 struct t4iov_softc *sc; 335 struct adapter *adap; 336 uint8_t ma[ETHER_ADDR_LEN]; 337 size_t size; 338 int rc; 339 340 if (nvlist_exists_binary(config, "mac-addr")) { 341 mac = nvlist_get_binary(config, "mac-addr", &size); 342 bcopy(mac, ma, ETHER_ADDR_LEN); 343 344 sc = device_get_softc(dev); 345 MPASS(sc->sc_attached); 346 MPASS(sc->sc_main != NULL); 347 adap = device_get_softc(sc->sc_main); 348 if (begin_synchronized_op(adap, NULL, SLEEP_OK | INTR_OK, 349 "t4vfma") != 0) 350 return (ENXIO); 351 rc = -t4_set_vf_mac(adap, sc->pf, vfnum + 1, 1, ma); 352 end_synchronized_op(adap, 0); 353 if (rc != 0) { 354 device_printf(dev, 355 "Failed to set VF%d MAC address to " 356 "%02x:%02x:%02x:%02x:%02x:%02x, rc = %d\n", vfnum, 357 ma[0], ma[1], ma[2], ma[3], ma[4], ma[5], rc); 358 return (rc); 359 } 360 } 361 362 return (0); 363 } 364 #endif 365 366 static device_method_t t4iov_methods[] = { 367 DEVMETHOD(device_probe, t4iov_probe), 368 DEVMETHOD(device_attach, t4iov_attach), 369 DEVMETHOD(device_detach, t4iov_detach), 370 371 #ifdef PCI_IOV 372 DEVMETHOD(pci_iov_init, t4iov_iov_init), 373 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit), 374 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf), 375 #endif 376 377 DEVMETHOD(t4_attach_child, t4iov_attach_child), 378 DEVMETHOD(t4_detach_child, t4iov_detach_child), 379 380 DEVMETHOD_END 381 }; 382 383 static driver_t t4iov_driver = { 384 "t4iov", 385 t4iov_methods, 386 sizeof(struct t4iov_softc) 387 }; 388 389 static device_method_t t5iov_methods[] = { 390 DEVMETHOD(device_probe, t5iov_probe), 391 DEVMETHOD(device_attach, t4iov_attach), 392 DEVMETHOD(device_detach, t4iov_detach), 393 394 #ifdef PCI_IOV 395 DEVMETHOD(pci_iov_init, t4iov_iov_init), 396 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit), 397 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf), 398 #endif 399 400 DEVMETHOD(t4_attach_child, t4iov_attach_child), 401 DEVMETHOD(t4_detach_child, t4iov_detach_child), 402 403 DEVMETHOD_END 404 }; 405 406 static driver_t t5iov_driver = { 407 "t5iov", 408 t5iov_methods, 409 sizeof(struct t4iov_softc) 410 }; 411 412 static device_method_t t6iov_methods[] = { 413 DEVMETHOD(device_probe, t6iov_probe), 414 DEVMETHOD(device_attach, t4iov_attach), 415 DEVMETHOD(device_detach, t4iov_detach), 416 417 #ifdef PCI_IOV 418 DEVMETHOD(pci_iov_init, t4iov_iov_init), 419 DEVMETHOD(pci_iov_uninit, t4iov_iov_uninit), 420 DEVMETHOD(pci_iov_add_vf, t4iov_add_vf), 421 #endif 422 423 DEVMETHOD(t4_attach_child, t4iov_attach_child), 424 DEVMETHOD(t4_detach_child, t4iov_detach_child), 425 426 DEVMETHOD_END 427 }; 428 429 static driver_t t6iov_driver = { 430 "t6iov", 431 t6iov_methods, 432 sizeof(struct t4iov_softc) 433 }; 434 435 DRIVER_MODULE(t4iov, pci, t4iov_driver, 0, 0); 436 MODULE_VERSION(t4iov, 1); 437 438 DRIVER_MODULE(t5iov, pci, t5iov_driver, 0, 0); 439 MODULE_VERSION(t5iov, 1); 440 441 DRIVER_MODULE(t6iov, pci, t6iov_driver, 0, 0); 442 MODULE_VERSION(t6iov, 1); 443