1 /*- 2 * Copyright (c) 2010 Chelsio Communications, Inc. 3 * All rights reserved. 4 * Written by: Navdeep Parhar <np@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 #ifndef __CXGBE_OSDEP_H_ 32 #define __CXGBE_OSDEP_H_ 33 34 #include <sys/cdefs.h> 35 #include <sys/ctype.h> 36 #include <sys/types.h> 37 #include <sys/param.h> 38 #include <sys/endian.h> 39 #include <sys/systm.h> 40 #include <sys/syslog.h> 41 #include <dev/pci/pcireg.h> 42 43 #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__) 44 #define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__) 45 #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__) 46 #define CH_WARN_RATELIMIT(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__) 47 48 typedef int8_t s8; 49 typedef int16_t s16; 50 typedef int32_t s32; 51 typedef int64_t s64; 52 typedef uint8_t u8; 53 typedef uint16_t u16; 54 typedef uint32_t u32; 55 typedef uint64_t u64; 56 typedef uint8_t __u8; 57 typedef uint16_t __u16; 58 typedef uint32_t __u32; 59 typedef uint64_t __u64; 60 typedef uint8_t __be8; 61 typedef uint16_t __be16; 62 typedef uint32_t __be32; 63 typedef uint64_t __be64; 64 65 #if BYTE_ORDER == BIG_ENDIAN 66 #define __BIG_ENDIAN_BITFIELD 67 #define htobe32_const(x) (x) 68 #elif BYTE_ORDER == LITTLE_ENDIAN 69 #define __LITTLE_ENDIAN_BITFIELD 70 #define htobe32_const(x) (((x) >> 24) | (((x) >> 8) & 0xff00) | \ 71 ((((x) & 0xffffff) << 8) & 0xff0000) | ((((x) & 0xff) << 24) & 0xff000000)) 72 #else 73 #error "Must set BYTE_ORDER" 74 #endif 75 76 #ifndef __bool_true_false_are_defined 77 typedef boolean_t bool; 78 #define false FALSE 79 #define true TRUE 80 #endif 81 82 #define mdelay(x) DELAY((x) * 1000) 83 #define udelay(x) DELAY(x) 84 85 #define __devinit 86 #define simple_strtoul strtoul 87 #define DIV_ROUND_UP(x, y) howmany(x, y) 88 89 #define ARRAY_SIZE(x) nitems(x) 90 #define container_of(p, s, f) ((s *)(((uint8_t *)(p)) - offsetof(s, f))) 91 92 #define swab16(x) bswap16(x) 93 #define swab32(x) bswap32(x) 94 #define swab64(x) bswap64(x) 95 #define le16_to_cpu(x) le16toh(x) 96 #define le32_to_cpu(x) le32toh(x) 97 #define le64_to_cpu(x) le64toh(x) 98 #define cpu_to_le16(x) htole16(x) 99 #define cpu_to_le32(x) htole32(x) 100 #define cpu_to_le64(x) htole64(x) 101 #define be16_to_cpu(x) be16toh(x) 102 #define be32_to_cpu(x) be32toh(x) 103 #define be64_to_cpu(x) be64toh(x) 104 #define cpu_to_be16(x) htobe16(x) 105 #define cpu_to_be32(x) htobe32(x) 106 #define cpu_to_be64(x) htobe64(x) 107 108 #define SPEED_10 10 109 #define SPEED_100 100 110 #define SPEED_1000 1000 111 #define SPEED_10000 10000 112 #define SPEED_40000 40000 113 #define DUPLEX_HALF 0 114 #define DUPLEX_FULL 1 115 #define AUTONEG_DISABLE 0 116 #define AUTONEG_ENABLE 1 117 118 #define PCI_DEVICE_ID PCIR_DEVICE 119 #define PCI_CAP_ID_VPD PCIY_VPD 120 #define PCI_VPD_ADDR PCIR_VPD_ADDR 121 #define PCI_VPD_ADDR_F 0x8000 122 #define PCI_VPD_DATA PCIR_VPD_DATA 123 124 #define PCI_CAP_ID_EXP PCIY_EXPRESS 125 #define PCI_EXP_DEVCTL PCIER_DEVICE_CTL 126 #define PCI_EXP_DEVCTL_PAYLOAD PCIEM_CTL_MAX_PAYLOAD 127 #define PCI_EXP_DEVCTL_READRQ PCIEM_CTL_MAX_READ_REQUEST 128 #define PCI_EXP_LNKCTL PCIER_LINK_CTL 129 #define PCI_EXP_LNKSTA PCIER_LINK_STA 130 #define PCI_EXP_LNKSTA_CLS PCIEM_LINK_STA_SPEED 131 #define PCI_EXP_LNKSTA_NLW PCIEM_LINK_STA_WIDTH 132 #define PCI_EXP_DEVCTL2 PCIER_DEVICE_CTL2 133 134 static inline int 135 ilog2(long x) 136 { 137 KASSERT(x > 0 && powerof2(x), ("%s: invalid arg %ld", __func__, x)); 138 139 return (flsl(x) - 1); 140 } 141 142 static inline char * 143 strstrip(char *s) 144 { 145 char c, *r, *trim_at; 146 147 while (isspace(*s)) 148 s++; 149 r = trim_at = s; 150 151 while ((c = *s++) != 0) { 152 if (!isspace(c)) 153 trim_at = s; 154 } 155 *trim_at = 0; 156 157 return (r); 158 } 159 160 #endif 161