xref: /freebsd/sys/dev/cxgbe/iw_cxgbe/iw_cxgbe.h (revision f5ef5f675d9d9eb6e35ed9142d70ecf774456ad4)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2009-2013, 2016 Chelsio, Inc. All rights reserved.
5  *
6  * This software is available to you under a choice of one of two
7  * licenses.  You may choose to be licensed under the terms of the GNU
8  * General Public License (GPL) Version 2, available from the file
9  * COPYING in the main directory of this source tree, or the
10  * OpenIB.org BSD license below:
11  *
12  *     Redistribution and use in source and binary forms, with or
13  *     without modification, are permitted provided that the following
14  *     conditions are met:
15  *
16  *      - Redistributions of source code must retain the above
17  *	  copyright notice, this list of conditions and the following
18  *	  disclaimer.
19  *      - Redistributions in binary form must reproduce the above
20  *	  copyright notice, this list of conditions and the following
21  *	  disclaimer in the documentation and/or other materials
22  *	  provided with the distribution.
23  *
24  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31  * SOFTWARE.
32  *
33  * $FreeBSD$
34  */
35 #ifndef __IW_CXGB4_H__
36 #define __IW_CXGB4_H__
37 
38 #include <linux/list.h>
39 #include <linux/spinlock.h>
40 #include <linux/idr.h>
41 #include <linux/completion.h>
42 #include <linux/netdevice.h>
43 #include <linux/sched.h>
44 #include <linux/pci.h>
45 #include <linux/dma-mapping.h>
46 #include <linux/wait.h>
47 #include <linux/kref.h>
48 #include <linux/timer.h>
49 #include <linux/io.h>
50 #include <sys/vmem.h>
51 
52 #include <asm/byteorder.h>
53 
54 #include <netinet/in.h>
55 #include <netinet/toecore.h>
56 
57 #include <rdma/ib_verbs.h>
58 #include <rdma/iw_cm.h>
59 
60 #undef prefetch
61 
62 #include "common/common.h"
63 #include "common/t4_msg.h"
64 #include "common/t4_regs.h"
65 #include "common/t4_tcb.h"
66 #include "t4_l2t.h"
67 
68 #define DRV_NAME "iw_cxgbe"
69 #define MOD DRV_NAME ":"
70 #define KTR_IW_CXGBE	KTR_SPARE3
71 
72 extern int c4iw_debug;
73 extern int use_dsgl;
74 extern int inline_threshold;
75 
76 #define PDBG(fmt, args...) \
77 do { \
78 	if (c4iw_debug) \
79 		printf(MOD fmt, ## args); \
80 } while (0)
81 
82 #include "t4.h"
83 
84 static inline void *cplhdr(struct mbuf *m)
85 {
86 	return mtod(m, void*);
87 }
88 
89 #define PBL_OFF(rdev_p, a) ((a) - (rdev_p)->adap->vres.pbl.start)
90 #define RQT_OFF(rdev_p, a) ((a) - (rdev_p)->adap->vres.rq.start)
91 
92 #define C4IW_ID_TABLE_F_RANDOM 1       /* Pseudo-randomize the id's returned */
93 #define C4IW_ID_TABLE_F_EMPTY  2       /* Table is initially empty */
94 
95 struct c4iw_id_table {
96 	u32 flags;
97 	u32 start;              /* logical minimal id */
98 	u32 last;               /* hint for find */
99 	u32 max;
100 	spinlock_t lock;
101 	unsigned long *table;
102 };
103 
104 struct c4iw_resource {
105 	struct c4iw_id_table tpt_table;
106 	struct c4iw_id_table qid_table;
107 	struct c4iw_id_table pdid_table;
108 };
109 
110 struct c4iw_qid_list {
111 	struct list_head entry;
112 	u32 qid;
113 };
114 
115 struct c4iw_dev_ucontext {
116 	struct list_head qpids;
117 	struct list_head cqids;
118 	struct mutex lock;
119 };
120 
121 enum c4iw_rdev_flags {
122 	T4_FATAL_ERROR = (1<<0),
123 	T4_STATUS_PAGE_DISABLED = (1<<1),
124 };
125 
126 struct c4iw_stat {
127 	u64 total;
128 	u64 cur;
129 	u64 max;
130 	u64 fail;
131 };
132 
133 struct c4iw_stats {
134 	struct mutex lock;
135 	struct c4iw_stat qid;
136 	struct c4iw_stat pd;
137 	struct c4iw_stat stag;
138 	struct c4iw_stat pbl;
139 	struct c4iw_stat rqt;
140 };
141 
142 struct c4iw_hw_queue {
143 	int t4_eq_status_entries;
144 	int t4_max_eq_size;
145 	int t4_max_iq_size;
146 	int t4_max_rq_size;
147 	int t4_max_sq_size;
148 	int t4_max_qp_depth;
149 	int t4_max_cq_depth;
150 	int t4_stat_len;
151 };
152 
153 struct c4iw_rdev {
154 	struct adapter *adap;
155 	struct c4iw_resource resource;
156 	unsigned long qpshift;
157 	u32 qpmask;
158 	unsigned long cqshift;
159 	u32 cqmask;
160 	struct c4iw_dev_ucontext uctx;
161 	vmem_t          *rqt_arena;
162 	vmem_t          *pbl_arena;
163 	u32 flags;
164 	struct c4iw_stats stats;
165 	struct c4iw_hw_queue hw_queue;
166 	struct t4_dev_status_page *status_page;
167 	unsigned long bar2_pa;
168 	void __iomem *bar2_kva;
169 	unsigned int bar2_len;
170 	struct workqueue_struct *free_workq;
171 };
172 
173 static inline int c4iw_fatal_error(struct c4iw_rdev *rdev)
174 {
175 	return rdev->flags & T4_FATAL_ERROR;
176 }
177 
178 static inline int c4iw_num_stags(struct c4iw_rdev *rdev)
179 {
180 	return (int)(rdev->adap->vres.stag.size >> 5);
181 }
182 
183 #define C4IW_WR_TO (60*HZ)
184 
185 struct c4iw_wr_wait {
186 	int ret;
187 	struct completion completion;
188 };
189 
190 static inline void c4iw_init_wr_wait(struct c4iw_wr_wait *wr_waitp)
191 {
192 	wr_waitp->ret = 0;
193 	init_completion(&wr_waitp->completion);
194 }
195 
196 static inline void c4iw_wake_up(struct c4iw_wr_wait *wr_waitp, int ret)
197 {
198 	wr_waitp->ret = ret;
199 	complete(&wr_waitp->completion);
200 }
201 
202 static inline int
203 c4iw_wait_for_reply(struct c4iw_rdev *rdev, struct c4iw_wr_wait *wr_waitp,
204 		u32 hwtid, u32 qpid, struct socket *so, const char *func)
205 {
206 	struct adapter *sc = rdev->adap;
207 	unsigned to = C4IW_WR_TO;
208 	int ret;
209 	int timedout = 0;
210 	struct timeval t1, t2;
211 
212 	if (c4iw_fatal_error(rdev)) {
213 		wr_waitp->ret = -EIO;
214 		goto out;
215 	}
216 
217 	getmicrotime(&t1);
218 	do {
219 		/* If waiting for reply in rdma_init()/rdma_fini() threads, then
220 		 * check if there are any connection errors.
221 		 */
222 		if (so && so->so_error) {
223 			wr_waitp->ret = -ECONNRESET;
224 			CTR5(KTR_IW_CXGBE, "%s - Connection ERROR %u for sock %p"
225 			    "tid %u qpid %u", func,
226 			    so->so_error, so, hwtid, qpid);
227 			break;
228 		}
229 
230 		ret = wait_for_completion_timeout(&wr_waitp->completion, to);
231 		if (!ret) {
232 			getmicrotime(&t2);
233 			timevalsub(&t2, &t1);
234 			printf("%s - Device %s not responding after %ld.%06ld "
235 			    "seconds - tid %u qpid %u\n", func,
236 			    device_get_nameunit(sc->dev), t2.tv_sec, t2.tv_usec,
237 			    hwtid, qpid);
238 			if (c4iw_fatal_error(rdev)) {
239 				wr_waitp->ret = -EIO;
240 				break;
241 			}
242 			to = to << 2;
243 			timedout = 1;
244 		}
245 	} while (!ret);
246 
247 out:
248 	if (timedout) {
249 		getmicrotime(&t2);
250 		timevalsub(&t2, &t1);
251 		printf("%s - Device %s reply after %ld.%06ld seconds - "
252 		    "tid %u qpid %u\n", func, device_get_nameunit(sc->dev),
253 		    t2.tv_sec, t2.tv_usec, hwtid, qpid);
254 	}
255 	if (wr_waitp->ret)
256 		CTR4(KTR_IW_CXGBE, "%p: FW reply %d tid %u qpid %u", sc,
257 		    wr_waitp->ret, hwtid, qpid);
258 	return (wr_waitp->ret);
259 }
260 
261 struct c4iw_dev {
262 	struct ib_device ibdev;
263 	struct c4iw_rdev rdev;
264 	u32 device_cap_flags;
265 	struct idr cqidr;
266 	struct idr qpidr;
267 	struct idr mmidr;
268 	spinlock_t lock;
269 	struct dentry *debugfs_root;
270 	u32 avail_ird;
271 };
272 
273 static inline struct c4iw_dev *to_c4iw_dev(struct ib_device *ibdev)
274 {
275 	return container_of(ibdev, struct c4iw_dev, ibdev);
276 }
277 
278 static inline struct c4iw_dev *rdev_to_c4iw_dev(struct c4iw_rdev *rdev)
279 {
280 	return container_of(rdev, struct c4iw_dev, rdev);
281 }
282 
283 static inline struct c4iw_cq *get_chp(struct c4iw_dev *rhp, u32 cqid)
284 {
285 	return idr_find(&rhp->cqidr, cqid);
286 }
287 
288 static inline struct c4iw_qp *get_qhp(struct c4iw_dev *rhp, u32 qpid)
289 {
290 	return idr_find(&rhp->qpidr, qpid);
291 }
292 
293 static inline struct c4iw_mr *get_mhp(struct c4iw_dev *rhp, u32 mmid)
294 {
295 	return idr_find(&rhp->mmidr, mmid);
296 }
297 
298 static inline int _insert_handle(struct c4iw_dev *rhp, struct idr *idr,
299 				 void *handle, u32 id, int lock)
300 {
301 	int ret;
302 	int newid;
303 
304 	do {
305 		if (!idr_pre_get(idr, lock ? GFP_KERNEL : GFP_ATOMIC))
306 			return -ENOMEM;
307 		if (lock)
308 			spin_lock_irq(&rhp->lock);
309 		ret = idr_get_new_above(idr, handle, id, &newid);
310 		BUG_ON(!ret && newid != id);
311 		if (lock)
312 			spin_unlock_irq(&rhp->lock);
313 	} while (ret == -EAGAIN);
314 
315 	return ret;
316 }
317 
318 static inline int insert_handle(struct c4iw_dev *rhp, struct idr *idr,
319 				void *handle, u32 id)
320 {
321 	return _insert_handle(rhp, idr, handle, id, 1);
322 }
323 
324 static inline int insert_handle_nolock(struct c4iw_dev *rhp, struct idr *idr,
325 				       void *handle, u32 id)
326 {
327 	return _insert_handle(rhp, idr, handle, id, 0);
328 }
329 
330 static inline void _remove_handle(struct c4iw_dev *rhp, struct idr *idr,
331 				   u32 id, int lock)
332 {
333 	if (lock)
334 		spin_lock_irq(&rhp->lock);
335 	idr_remove(idr, id);
336 	if (lock)
337 		spin_unlock_irq(&rhp->lock);
338 }
339 
340 static inline void remove_handle(struct c4iw_dev *rhp, struct idr *idr, u32 id)
341 {
342 	_remove_handle(rhp, idr, id, 1);
343 }
344 
345 static inline void remove_handle_nolock(struct c4iw_dev *rhp,
346 					 struct idr *idr, u32 id)
347 {
348 	_remove_handle(rhp, idr, id, 0);
349 }
350 
351 extern int c4iw_max_read_depth;
352 
353 static inline int cur_max_read_depth(struct c4iw_dev *dev)
354 {
355 	return min(dev->rdev.adap->params.max_ordird_qp, c4iw_max_read_depth);
356 }
357 
358 struct c4iw_pd {
359 	struct ib_pd ibpd;
360 	u32 pdid;
361 	struct c4iw_dev *rhp;
362 };
363 
364 static inline struct c4iw_pd *to_c4iw_pd(struct ib_pd *ibpd)
365 {
366 	return container_of(ibpd, struct c4iw_pd, ibpd);
367 }
368 
369 struct tpt_attributes {
370 	u64 len;
371 	u64 va_fbo;
372 	enum fw_ri_mem_perms perms;
373 	u32 stag;
374 	u32 pdid;
375 	u32 qpid;
376 	u32 pbl_addr;
377 	u32 pbl_size;
378 	u32 state:1;
379 	u32 type:2;
380 	u32 rsvd:1;
381 	u32 remote_invaliate_disable:1;
382 	u32 zbva:1;
383 	u32 mw_bind_enable:1;
384 	u32 page_size:5;
385 };
386 
387 struct c4iw_mr {
388 	struct ib_mr ibmr;
389 	struct ib_umem *umem;
390 	struct c4iw_dev *rhp;
391 	u64 kva;
392 	struct tpt_attributes attr;
393 	u64 *mpl;
394 	dma_addr_t mpl_addr;
395 	u32 max_mpl_len;
396 	u32 mpl_len;
397 };
398 
399 static inline struct c4iw_mr *to_c4iw_mr(struct ib_mr *ibmr)
400 {
401 	return container_of(ibmr, struct c4iw_mr, ibmr);
402 }
403 
404 struct c4iw_mw {
405 	struct ib_mw ibmw;
406 	struct c4iw_dev *rhp;
407 	u64 kva;
408 	struct tpt_attributes attr;
409 };
410 
411 static inline struct c4iw_mw *to_c4iw_mw(struct ib_mw *ibmw)
412 {
413 	return container_of(ibmw, struct c4iw_mw, ibmw);
414 }
415 
416 struct c4iw_cq {
417 	struct ib_cq ibcq;
418 	struct c4iw_dev *rhp;
419 	struct t4_cq cq;
420 	spinlock_t lock;
421 	spinlock_t comp_handler_lock;
422 	atomic_t refcnt;
423 	wait_queue_head_t wait;
424 };
425 
426 static inline struct c4iw_cq *to_c4iw_cq(struct ib_cq *ibcq)
427 {
428 	return container_of(ibcq, struct c4iw_cq, ibcq);
429 }
430 
431 struct c4iw_mpa_attributes {
432 	u8 initiator;
433 	u8 recv_marker_enabled;
434 	u8 xmit_marker_enabled;
435 	u8 crc_enabled;
436 	u8 enhanced_rdma_conn;
437 	u8 version;
438 	u8 p2p_type;
439 };
440 
441 struct c4iw_qp_attributes {
442 	u32 scq;
443 	u32 rcq;
444 	u32 sq_num_entries;
445 	u32 rq_num_entries;
446 	u32 sq_max_sges;
447 	u32 sq_max_sges_rdma_write;
448 	u32 rq_max_sges;
449 	u32 state;
450 	u8 enable_rdma_read;
451 	u8 enable_rdma_write;
452 	u8 enable_bind;
453 	u8 enable_mmid0_fastreg;
454 	u32 max_ord;
455 	u32 max_ird;
456 	u32 pd;
457 	u32 next_state;
458 	char terminate_buffer[52];
459 	u32 terminate_msg_len;
460 	u8 is_terminate_local;
461 	struct c4iw_mpa_attributes mpa_attr;
462 	struct c4iw_ep *llp_stream_handle;
463 	u8 layer_etype;
464 	u8 ecode;
465 	u16 sq_db_inc;
466 	u16 rq_db_inc;
467 	u8 send_term;
468 };
469 
470 struct c4iw_qp {
471 	struct ib_qp ibqp;
472 	struct c4iw_dev *rhp;
473 	struct c4iw_ep *ep;
474 	struct c4iw_qp_attributes attr;
475 	struct t4_wq wq;
476 	spinlock_t lock;
477 	struct mutex mutex;
478 	struct kref kref;
479 	wait_queue_head_t wait;
480 	struct timer_list timer;
481 	int sq_sig_all;
482 	struct work_struct free_work;
483 	struct c4iw_ucontext *ucontext;
484 };
485 
486 static inline struct c4iw_qp *to_c4iw_qp(struct ib_qp *ibqp)
487 {
488 	return container_of(ibqp, struct c4iw_qp, ibqp);
489 }
490 
491 struct c4iw_ucontext {
492 	struct ib_ucontext ibucontext;
493 	struct c4iw_dev_ucontext uctx;
494 	u32 key;
495 	spinlock_t mmap_lock;
496 	struct list_head mmaps;
497 	struct kref kref;
498 };
499 
500 static inline struct c4iw_ucontext *to_c4iw_ucontext(struct ib_ucontext *c)
501 {
502 	return container_of(c, struct c4iw_ucontext, ibucontext);
503 }
504 
505 void _c4iw_free_ucontext(struct kref *kref);
506 
507 static inline void c4iw_put_ucontext(struct c4iw_ucontext *ucontext)
508 {
509 	kref_put(&ucontext->kref, _c4iw_free_ucontext);
510 }
511 static inline void c4iw_get_ucontext(struct c4iw_ucontext *ucontext)
512 {
513 	kref_get(&ucontext->kref);
514 }
515 
516 struct c4iw_mm_entry {
517 	struct list_head entry;
518 	u64 addr;
519 	u32 key;
520 	unsigned len;
521 };
522 
523 static inline struct c4iw_mm_entry *remove_mmap(struct c4iw_ucontext *ucontext,
524 						u32 key, unsigned len)
525 {
526 	struct list_head *pos, *nxt;
527 	struct c4iw_mm_entry *mm;
528 
529 	spin_lock(&ucontext->mmap_lock);
530 	list_for_each_safe(pos, nxt, &ucontext->mmaps) {
531 
532 		mm = list_entry(pos, struct c4iw_mm_entry, entry);
533 		if (mm->key == key && mm->len == len) {
534 			list_del_init(&mm->entry);
535 			spin_unlock(&ucontext->mmap_lock);
536 			CTR4(KTR_IW_CXGBE, "%s key 0x%x addr 0x%llx len %d",
537 			     __func__, key, (unsigned long long) mm->addr,
538 			     mm->len);
539 			return mm;
540 		}
541 	}
542 	spin_unlock(&ucontext->mmap_lock);
543 	return NULL;
544 }
545 
546 static inline void insert_mmap(struct c4iw_ucontext *ucontext,
547 			       struct c4iw_mm_entry *mm)
548 {
549 	spin_lock(&ucontext->mmap_lock);
550 	CTR4(KTR_IW_CXGBE, "%s key 0x%x addr 0x%llx len %d", __func__, mm->key,
551 	    (unsigned long long) mm->addr, mm->len);
552 	list_add_tail(&mm->entry, &ucontext->mmaps);
553 	spin_unlock(&ucontext->mmap_lock);
554 }
555 
556 enum c4iw_qp_attr_mask {
557 	C4IW_QP_ATTR_NEXT_STATE = 1 << 0,
558 	C4IW_QP_ATTR_SQ_DB = 1<<1,
559 	C4IW_QP_ATTR_RQ_DB = 1<<2,
560 	C4IW_QP_ATTR_ENABLE_RDMA_READ = 1 << 7,
561 	C4IW_QP_ATTR_ENABLE_RDMA_WRITE = 1 << 8,
562 	C4IW_QP_ATTR_ENABLE_RDMA_BIND = 1 << 9,
563 	C4IW_QP_ATTR_MAX_ORD = 1 << 11,
564 	C4IW_QP_ATTR_MAX_IRD = 1 << 12,
565 	C4IW_QP_ATTR_LLP_STREAM_HANDLE = 1 << 22,
566 	C4IW_QP_ATTR_STREAM_MSG_BUFFER = 1 << 23,
567 	C4IW_QP_ATTR_MPA_ATTR = 1 << 24,
568 	C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE = 1 << 25,
569 	C4IW_QP_ATTR_VALID_MODIFY = (C4IW_QP_ATTR_ENABLE_RDMA_READ |
570 				     C4IW_QP_ATTR_ENABLE_RDMA_WRITE |
571 				     C4IW_QP_ATTR_MAX_ORD |
572 				     C4IW_QP_ATTR_MAX_IRD |
573 				     C4IW_QP_ATTR_LLP_STREAM_HANDLE |
574 				     C4IW_QP_ATTR_STREAM_MSG_BUFFER |
575 				     C4IW_QP_ATTR_MPA_ATTR |
576 				     C4IW_QP_ATTR_QP_CONTEXT_ACTIVATE)
577 };
578 
579 int c4iw_modify_qp(struct c4iw_dev *rhp,
580 				struct c4iw_qp *qhp,
581 				enum c4iw_qp_attr_mask mask,
582 				struct c4iw_qp_attributes *attrs,
583 				int internal);
584 
585 enum c4iw_qp_state {
586 	C4IW_QP_STATE_IDLE,
587 	C4IW_QP_STATE_RTS,
588 	C4IW_QP_STATE_ERROR,
589 	C4IW_QP_STATE_TERMINATE,
590 	C4IW_QP_STATE_CLOSING,
591 	C4IW_QP_STATE_TOT
592 };
593 
594 /*
595  * IW_CXGBE event bits.
596  * These bits are used for handling all events for a particular 'ep' serially.
597  */
598 #define	C4IW_EVENT_SOCKET	0x0001
599 #define	C4IW_EVENT_TIMEOUT	0x0002
600 #define	C4IW_EVENT_TERM		0x0004
601 
602 static inline int c4iw_convert_state(enum ib_qp_state ib_state)
603 {
604 	switch (ib_state) {
605 	case IB_QPS_RESET:
606 	case IB_QPS_INIT:
607 		return C4IW_QP_STATE_IDLE;
608 	case IB_QPS_RTS:
609 		return C4IW_QP_STATE_RTS;
610 	case IB_QPS_SQD:
611 		return C4IW_QP_STATE_CLOSING;
612 	case IB_QPS_SQE:
613 		return C4IW_QP_STATE_TERMINATE;
614 	case IB_QPS_ERR:
615 		return C4IW_QP_STATE_ERROR;
616 	default:
617 		return -1;
618 	}
619 }
620 
621 static inline int to_ib_qp_state(int c4iw_qp_state)
622 {
623 	switch (c4iw_qp_state) {
624 	case C4IW_QP_STATE_IDLE:
625 		return IB_QPS_INIT;
626 	case C4IW_QP_STATE_RTS:
627 		return IB_QPS_RTS;
628 	case C4IW_QP_STATE_CLOSING:
629 		return IB_QPS_SQD;
630 	case C4IW_QP_STATE_TERMINATE:
631 		return IB_QPS_SQE;
632 	case C4IW_QP_STATE_ERROR:
633 		return IB_QPS_ERR;
634 	}
635 	return IB_QPS_ERR;
636 }
637 
638 #define C4IW_DRAIN_OPCODE FW_RI_SGE_EC_CR_RETURN
639 
640 static inline u32 c4iw_ib_to_tpt_access(int a)
641 {
642 	return (a & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
643 	       (a & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0) |
644 	       (a & IB_ACCESS_LOCAL_WRITE ? FW_RI_MEM_ACCESS_LOCAL_WRITE : 0) |
645 	       FW_RI_MEM_ACCESS_LOCAL_READ;
646 }
647 
648 static inline u32 c4iw_ib_to_tpt_bind_access(int acc)
649 {
650 	return (acc & IB_ACCESS_REMOTE_WRITE ? FW_RI_MEM_ACCESS_REM_WRITE : 0) |
651 	       (acc & IB_ACCESS_REMOTE_READ ? FW_RI_MEM_ACCESS_REM_READ : 0);
652 }
653 
654 enum c4iw_mmid_state {
655 	C4IW_STAG_STATE_VALID,
656 	C4IW_STAG_STATE_INVALID
657 };
658 
659 #define C4IW_NODE_DESC "iw_cxgbe Chelsio Communications"
660 
661 #define MPA_KEY_REQ "MPA ID Req Frame"
662 #define MPA_KEY_REP "MPA ID Rep Frame"
663 
664 #define MPA_MAX_PRIVATE_DATA	256
665 #define MPA_ENHANCED_RDMA_CONN	0x10
666 #define MPA_REJECT		0x20
667 #define MPA_CRC			0x40
668 #define MPA_MARKERS		0x80
669 #define MPA_FLAGS_MASK		0xE0
670 
671 #define MPA_V2_PEER2PEER_MODEL          0x8000
672 #define MPA_V2_ZERO_LEN_FPDU_RTR        0x4000
673 #define MPA_V2_RDMA_WRITE_RTR           0x8000
674 #define MPA_V2_RDMA_READ_RTR            0x4000
675 #define MPA_V2_IRD_ORD_MASK             0x3FFF
676 
677 #define c4iw_put_ep(ep) { \
678 	CTR4(KTR_IW_CXGBE, "put_ep (%s:%u) ep %p, refcnt %d", \
679 	     __func__, __LINE__, ep, atomic_read(&(ep)->kref.refcount)); \
680 	WARN_ON(atomic_read(&(ep)->kref.refcount) < 1); \
681         kref_put(&((ep)->kref), _c4iw_free_ep); \
682 }
683 
684 #define c4iw_get_ep(ep) { \
685 	CTR4(KTR_IW_CXGBE, "get_ep (%s:%u) ep %p, refcnt %d", \
686 	      __func__, __LINE__, ep, atomic_read(&(ep)->kref.refcount)); \
687         kref_get(&((ep)->kref));  \
688 }
689 
690 void _c4iw_free_ep(struct kref *kref);
691 
692 struct mpa_message {
693 	u8 key[16];
694 	u8 flags;
695 	u8 revision;
696 	__be16 private_data_size;
697 	u8 private_data[0];
698 };
699 
700 struct mpa_v2_conn_params {
701 	__be16 ird;
702 	__be16 ord;
703 };
704 
705 struct terminate_message {
706 	u8 layer_etype;
707 	u8 ecode;
708 	__be16 hdrct_rsvd;
709 	u8 len_hdrs[0];
710 };
711 
712 #define TERM_MAX_LENGTH (sizeof(struct terminate_message) + 2 + 18 + 28)
713 
714 enum c4iw_layers_types {
715 	LAYER_RDMAP		= 0x00,
716 	LAYER_DDP		= 0x10,
717 	LAYER_MPA		= 0x20,
718 	RDMAP_LOCAL_CATA	= 0x00,
719 	RDMAP_REMOTE_PROT	= 0x01,
720 	RDMAP_REMOTE_OP		= 0x02,
721 	DDP_LOCAL_CATA		= 0x00,
722 	DDP_TAGGED_ERR		= 0x01,
723 	DDP_UNTAGGED_ERR	= 0x02,
724 	DDP_LLP			= 0x03
725 };
726 
727 enum c4iw_rdma_ecodes {
728 	RDMAP_INV_STAG		= 0x00,
729 	RDMAP_BASE_BOUNDS	= 0x01,
730 	RDMAP_ACC_VIOL		= 0x02,
731 	RDMAP_STAG_NOT_ASSOC	= 0x03,
732 	RDMAP_TO_WRAP		= 0x04,
733 	RDMAP_INV_VERS		= 0x05,
734 	RDMAP_INV_OPCODE	= 0x06,
735 	RDMAP_STREAM_CATA	= 0x07,
736 	RDMAP_GLOBAL_CATA	= 0x08,
737 	RDMAP_CANT_INV_STAG	= 0x09,
738 	RDMAP_UNSPECIFIED	= 0xff
739 };
740 
741 enum c4iw_ddp_ecodes {
742 	DDPT_INV_STAG		= 0x00,
743 	DDPT_BASE_BOUNDS	= 0x01,
744 	DDPT_STAG_NOT_ASSOC	= 0x02,
745 	DDPT_TO_WRAP		= 0x03,
746 	DDPT_INV_VERS		= 0x04,
747 	DDPU_INV_QN		= 0x01,
748 	DDPU_INV_MSN_NOBUF	= 0x02,
749 	DDPU_INV_MSN_RANGE	= 0x03,
750 	DDPU_INV_MO		= 0x04,
751 	DDPU_MSG_TOOBIG		= 0x05,
752 	DDPU_INV_VERS		= 0x06
753 };
754 
755 enum c4iw_mpa_ecodes {
756 	MPA_CRC_ERR		= 0x02,
757 	MPA_MARKER_ERR		= 0x03,
758 	MPA_LOCAL_CATA          = 0x05,
759 	MPA_INSUFF_IRD          = 0x06,
760 	MPA_NOMATCH_RTR         = 0x07,
761 };
762 
763 enum c4iw_ep_state {
764 	IDLE = 0,
765 	LISTEN,
766 	CONNECTING,
767 	MPA_REQ_WAIT,
768 	MPA_REQ_SENT,
769 	MPA_REQ_RCVD,
770 	MPA_REP_SENT,
771 	FPDU_MODE,
772 	ABORTING,
773 	CLOSING,
774 	MORIBUND,
775 	DEAD,
776 };
777 
778 enum c4iw_ep_flags {
779 	PEER_ABORT_IN_PROGRESS	= 0,
780 	ABORT_REQ_IN_PROGRESS	= 1,
781 	RELEASE_RESOURCES	= 2,
782 	CLOSE_SENT		= 3,
783 	TIMEOUT                 = 4,
784 	QP_REFERENCED		= 5,
785 	STOP_MPA_TIMER		= 7,
786 };
787 
788 enum c4iw_ep_history {
789         ACT_OPEN_REQ            = 0,
790         ACT_OFLD_CONN           = 1,
791         ACT_OPEN_RPL            = 2,
792         ACT_ESTAB               = 3,
793         PASS_ACCEPT_REQ         = 4,
794         PASS_ESTAB              = 5,
795         ABORT_UPCALL            = 6,
796         ESTAB_UPCALL            = 7,
797         CLOSE_UPCALL            = 8,
798         ULP_ACCEPT              = 9,
799         ULP_REJECT              = 10,
800         TIMEDOUT                = 11,
801         PEER_ABORT              = 12,
802         PEER_CLOSE              = 13,
803         CONNREQ_UPCALL          = 14,
804         ABORT_CONN              = 15,
805         DISCONN_UPCALL          = 16,
806         EP_DISC_CLOSE           = 17,
807         EP_DISC_ABORT           = 18,
808         CONN_RPL_UPCALL         = 19,
809         ACT_RETRY_NOMEM         = 20,
810         ACT_RETRY_INUSE         = 21,
811         CLOSE_CON_RPL           = 22,
812         EP_DISC_FAIL            = 24,
813         QP_REFED                = 25,
814         QP_DEREFED              = 26,
815         CM_ID_REFED             = 27,
816         CM_ID_DEREFED           = 28
817 };
818 
819 struct c4iw_ep_common {
820 	TAILQ_ENTRY(c4iw_ep_common) entry;	/* Work queue attachment */
821 	struct iw_cm_id *cm_id;
822 	struct c4iw_qp *qp;
823 	struct c4iw_dev *dev;
824 	enum c4iw_ep_state state;
825 	struct kref kref;
826 	struct mutex mutex;
827 	struct sockaddr_storage local_addr;
828 	struct sockaddr_storage remote_addr;
829 	struct c4iw_wr_wait wr_wait;
830 	unsigned long flags;
831 	unsigned long history;
832         int rpl_err;
833         int rpl_done;
834         struct thread *thread;
835         struct socket *so;
836 	int ep_events;
837 };
838 
839 struct c4iw_listen_ep {
840 	struct c4iw_ep_common com;
841 	unsigned int stid;
842 	int backlog;
843 	struct list_head listen_ep_list;  /* list of all listener ep's bound
844 					     to one port address */
845 };
846 
847 struct c4iw_ep {
848 	struct c4iw_ep_common com;
849 	struct c4iw_listen_ep *parent_ep;
850 	struct timer_list timer;
851 	unsigned int atid;
852 	u32 hwtid;
853 	u32 snd_seq;
854 	u32 rcv_seq;
855 	struct l2t_entry *l2t;
856 	struct dst_entry *dst;
857 	struct c4iw_mpa_attributes mpa_attr;
858 	u8 mpa_pkt[sizeof(struct mpa_message) + MPA_MAX_PRIVATE_DATA];
859 	unsigned int mpa_pkt_len;
860 	u32 ird;
861 	u32 ord;
862 	u32 tx_chan;
863 	u32 mtu;
864 	u16 mss;
865 	u16 plen;
866 	u16 rss_qid;
867 	u16 txq_idx;
868 	u16 ctrlq_idx;
869 	u8 tos;
870 	u8 retry_with_mpa_v1;
871 	u8 tried_with_mpa_v1;
872 };
873 
874 static inline struct c4iw_ep *to_ep(struct iw_cm_id *cm_id)
875 {
876 	return cm_id->provider_data;
877 }
878 
879 static inline struct c4iw_listen_ep *to_listen_ep(struct iw_cm_id *cm_id)
880 {
881 	return cm_id->provider_data;
882 }
883 
884 static inline int compute_wscale(int win)
885 {
886 	int wscale = 0;
887 
888 	while (wscale < 14 && (65535<<wscale) < win)
889 		wscale++;
890 	return wscale;
891 }
892 
893 u32 c4iw_id_alloc(struct c4iw_id_table *alloc);
894 void c4iw_id_free(struct c4iw_id_table *alloc, u32 obj);
895 int c4iw_id_table_alloc(struct c4iw_id_table *alloc, u32 start, u32 num,
896 			u32 reserved, u32 flags);
897 void c4iw_id_table_free(struct c4iw_id_table *alloc);
898 
899 typedef int (*c4iw_handler_func)(struct c4iw_dev *dev, struct mbuf *m);
900 
901 int c4iw_ep_redirect(void *ctx, struct dst_entry *old, struct dst_entry *new,
902 		     struct l2t_entry *l2t);
903 u32 c4iw_get_resource(struct c4iw_id_table *id_table);
904 void c4iw_put_resource(struct c4iw_id_table *id_table, u32 entry);
905 int c4iw_init_resource(struct c4iw_rdev *rdev, u32 nr_tpt, u32 nr_pdid);
906 int c4iw_init_ctrl_qp(struct c4iw_rdev *rdev);
907 int c4iw_pblpool_create(struct c4iw_rdev *rdev);
908 int c4iw_rqtpool_create(struct c4iw_rdev *rdev);
909 void c4iw_pblpool_destroy(struct c4iw_rdev *rdev);
910 void c4iw_rqtpool_destroy(struct c4iw_rdev *rdev);
911 void c4iw_destroy_resource(struct c4iw_resource *rscp);
912 int c4iw_destroy_ctrl_qp(struct c4iw_rdev *rdev);
913 int c4iw_register_device(struct c4iw_dev *dev);
914 void c4iw_unregister_device(struct c4iw_dev *dev);
915 int __init c4iw_cm_init(void);
916 void __exit c4iw_cm_term(void);
917 void c4iw_release_dev_ucontext(struct c4iw_rdev *rdev,
918 			       struct c4iw_dev_ucontext *uctx);
919 void c4iw_init_dev_ucontext(struct c4iw_rdev *rdev,
920 			    struct c4iw_dev_ucontext *uctx);
921 int c4iw_poll_cq(struct ib_cq *ibcq, int num_entries, struct ib_wc *wc);
922 int c4iw_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
923 		      struct ib_send_wr **bad_wr);
924 int c4iw_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
925 		      struct ib_recv_wr **bad_wr);
926 int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
927 int c4iw_create_listen(struct iw_cm_id *cm_id, int backlog);
928 int c4iw_destroy_listen(struct iw_cm_id *cm_id);
929 int c4iw_accept_cr(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param);
930 int c4iw_reject_cr(struct iw_cm_id *cm_id, const void *pdata, u8 pdata_len);
931 void c4iw_qp_add_ref(struct ib_qp *qp);
932 void c4iw_qp_rem_ref(struct ib_qp *qp);
933 struct ib_mr *c4iw_alloc_mr(struct ib_pd *pd, enum ib_mr_type mr_type,
934 			u32 max_num_sg);
935 int c4iw_map_mr_sg(struct ib_mr *ibmr, struct scatterlist *sg,
936 		int sg_nents, unsigned int *sg_offset);
937 int c4iw_dealloc_mw(struct ib_mw *mw);
938 struct ib_mw *c4iw_alloc_mw(struct ib_pd *pd, enum ib_mw_type type,
939 		struct ib_udata *udata);
940 struct ib_mr *c4iw_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, u64
941 		virt, int acc, struct ib_udata *udata);
942 struct ib_mr *c4iw_get_dma_mr(struct ib_pd *pd, int acc);
943 int c4iw_dereg_mr(struct ib_mr *ib_mr);
944 void c4iw_invalidate_mr(struct c4iw_dev *rhp, u32 rkey);
945 int c4iw_destroy_cq(struct ib_cq *ib_cq);
946 struct ib_cq *c4iw_create_cq(struct ib_device *ibdev,
947 				const struct ib_cq_init_attr *attr,
948 				struct ib_ucontext *ib_context,
949 				struct ib_udata *udata);
950 int c4iw_resize_cq(struct ib_cq *cq, int cqe, struct ib_udata *udata);
951 int c4iw_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags);
952 int c4iw_destroy_qp(struct ib_qp *ib_qp);
953 struct ib_qp *c4iw_create_qp(struct ib_pd *pd,
954 			     struct ib_qp_init_attr *attrs,
955 			     struct ib_udata *udata);
956 int c4iw_ib_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
957 				 int attr_mask, struct ib_udata *udata);
958 int c4iw_ib_query_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
959 		     int attr_mask, struct ib_qp_init_attr *init_attr);
960 struct ib_qp *c4iw_get_qp(struct ib_device *dev, int qpn);
961 u32 c4iw_rqtpool_alloc(struct c4iw_rdev *rdev, int size);
962 void c4iw_rqtpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
963 u32 c4iw_pblpool_alloc(struct c4iw_rdev *rdev, int size);
964 void c4iw_pblpool_free(struct c4iw_rdev *rdev, u32 addr, int size);
965 int c4iw_ofld_send(struct c4iw_rdev *rdev, struct mbuf *m);
966 void c4iw_flush_hw_cq(struct c4iw_cq *cq);
967 void c4iw_count_rcqes(struct t4_cq *cq, struct t4_wq *wq, int *count);
968 int c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp);
969 int __c4iw_ep_disconnect(struct c4iw_ep *ep, int abrupt, gfp_t gfp);
970 int c4iw_flush_rq(struct t4_wq *wq, struct t4_cq *cq, int count);
971 int c4iw_flush_sq(struct c4iw_qp *qhp);
972 int c4iw_ev_handler(struct sge_iq *, const struct rsp_ctrl *);
973 u16 c4iw_rqes_posted(struct c4iw_qp *qhp);
974 int c4iw_post_terminate(struct c4iw_qp *qhp, struct t4_cqe *err_cqe);
975 u32 c4iw_get_cqid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
976 void c4iw_put_cqid(struct c4iw_rdev *rdev, u32 qid,
977 		struct c4iw_dev_ucontext *uctx);
978 u32 c4iw_get_qpid(struct c4iw_rdev *rdev, struct c4iw_dev_ucontext *uctx);
979 void c4iw_put_qpid(struct c4iw_rdev *rdev, u32 qid,
980 		struct c4iw_dev_ucontext *uctx);
981 void c4iw_ev_dispatch(struct c4iw_dev *dev, struct t4_cqe *err_cqe);
982 #endif
983