1# Firmware configuration file. 2# 3# Global limits (some are hardware limits, others are due to the firmware). 4# nvi = 128 virtual interfaces 5# niqflint = 1023 ingress queues with freelists and/or interrupts 6# nethctrl = 64K Ethernet or ctrl egress queues 7# neq = 64K egress queues of all kinds, including freelists 8# nexactf = 512 MPS TCAM entries, can oversubscribe. 9# 10 11[global] 12 rss_glb_config_mode = basicvirtual 13 rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp 14 15 # PL_TIMEOUT register 16 pl_timeout_value = 10000 # the timeout value in units of us 17 18 # SGE_THROTTLE_CONTROL 19 bar2throttlecount = 500 # bar2throttlecount in us 20 21 sge_timer_value = 1, 5, 10, 50, 100, 200 # SGE_TIMER_VALUE* in usecs 22 23 reg[0x1124] = 0x00000400/0x00000400 # SGE_CONTROL2, enable VFIFO; if 24 # SGE_VFIFO_SIZE is not set, then 25 # firmware will set it up in function 26 # of number of egress queues used 27 28 reg[0x1130] = 0x00d5ffeb # SGE_DBP_FETCH_THRESHOLD, fetch 29 # threshold set to queue depth 30 # minus 128-entries for FL and HP 31 # queues, and 0xfff for LP which 32 # prompts the firmware to set it up 33 # in function of egress queues 34 # used 35 36 reg[0x113c] = 0x0002ffc0 # SGE_VFIFO_SIZE, set to 0x2ffc0 which 37 # prompts the firmware to set it up in 38 # function of number of egress queues 39 # used 40 41 # enable TP_OUT_CONFIG.IPIDSPLITMODE 42 reg[0x7d04] = 0x00010000/0x00010000 43 44 # disable TP_PARA_REG3.RxFragEn 45 reg[0x7d6c] = 0x00000000/0x00007000 46 47 # enable TP_PARA_REG6.EnableCSnd 48 reg[0x7d78] = 0x00000400/0x00000000 49 50 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT 51 52 filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe 53 filterMask = protocol, fcoe 54 55 tp_pmrx = 36, 512 56 tp_pmrx_pagesize = 64K 57 58 # TP number of RX channels (0 = auto) 59 tp_nrxch = 0 60 61 tp_pmtx = 46, 512 62 tp_pmtx_pagesize = 64K 63 64 # TP number of TX channels (0 = auto) 65 tp_ntxch = 0 66 67 # TP OFLD MTUs 68 tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600 69 70 # TP_GLOBAL_CONFIG 71 reg[0x7d08] = 0x00000800/0x00000800 # set IssFromCplEnable 72 73 # TP_PC_CONFIG 74 reg[0x7d48] = 0x00000000/0x00000400 # clear EnableFLMError 75 76 # TP_PARA_REG0 77 reg[0x7d60] = 0x06000000/0x07000000 # set InitCWND to 6 78 79 # cluster, lan, or wan. 80 tp_tcptuning = lan 81 82 # MC configuration 83 mc_mode_brc[0] = 1 # mc0 - 1: enable BRC, 0: enable RBC 84 mc_mode_brc[1] = 1 # mc1 - 1: enable BRC, 0: enable RBC 85 86 # ULP_TX_CONFIG 87 reg[0x8dc0] = 0x00000004/0x00000004 # Enable more error msg for ... 88 # TPT error. 89 90# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by 91# these 4 PFs only. 92[function "0"] 93 nvf = 4 94 wx_caps = all 95 r_caps = all 96 nvi = 2 97 rssnvi = 2 98 niqflint = 4 99 nethctrl = 4 100 neq = 8 101 nexactf = 4 102 cmask = all 103 pmask = 0x1 104 105[function "1"] 106 nvf = 4 107 wx_caps = all 108 r_caps = all 109 nvi = 2 110 rssnvi = 2 111 niqflint = 4 112 nethctrl = 4 113 neq = 8 114 nexactf = 4 115 cmask = all 116 pmask = 0x2 117 118[function "2"] 119 nvf = 4 120 wx_caps = all 121 r_caps = all 122 nvi = 2 123 rssnvi = 2 124 niqflint = 4 125 nethctrl = 4 126 neq = 8 127 nexactf = 4 128 cmask = all 129 pmask = 0x4 130 131[function "3"] 132 nvf = 4 133 wx_caps = all 134 r_caps = all 135 nvi = 2 136 rssnvi = 2 137 niqflint = 4 138 nethctrl = 4 139 neq = 8 140 nexactf = 4 141 cmask = all 142 pmask = 0x8 143 144# PF4 is the resource-rich PF that the bus/nexus driver attaches to. 145# It gets 32 MSI/128 MSI-X vectors. 146[function "4"] 147 wx_caps = all 148 r_caps = all 149 nvi = 32 150 rssnvi = 8 151 niqflint = 512 152 nethctrl = 1024 153 neq = 2048 154 nqpcq = 8192 155 nexactf = 456 156 cmask = all 157 pmask = all 158 nethofld = 8192 159 160 # driver will mask off features it won't use 161 protocol = ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu, iscsi_t10dif 162 163 tp_l2t = 4096 164 tp_ddp = 2 165 tp_ddp_iscsi = 2 166 tp_stag = 2 167 tp_pbl = 5 168 tp_rq = 7 169 170 # TCAM has 8K cells; each region must start at a multiple of 128 cell. 171 # Each entry in these categories takes 4 cells each. nhash will use the 172 # TCAM iff there is room left (that is, the rest don't add up to 2048). 173 nroute = 32 174 nclip = 32 175 nfilter = 1008 176 nserver = 512 177 nhash = 16384 178 179# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors. 180# Not used right now. 181[function "5"] 182 nvi = 1 183 rssnvi = 0 184 185# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors. 186# Not used right now. 187[function "6"] 188 nvi = 1 189 rssnvi = 0 190 191# The following function, 1023, is not an actual PCIE function but is used to 192# configure and reserve firmware internal resources that come from the global 193# resource pool. 194[function "1023"] 195 wx_caps = all 196 r_caps = all 197 nvi = 4 198 rssnvi = 0 199 cmask = all 200 pmask = all 201 nexactf = 8 202 nfilter = 16 203 204# For Virtual functions, we only allow NIC functionality and we only allow 205# access to one port (1 << PF). Note that because of limitations in the 206# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL 207# and GTS registers, the number of Ingress and Egress Queues must be a power 208# of 2. 209# 210[function "0/*"] 211 wx_caps = 0x82 212 r_caps = 0x86 213 nvi = 1 214 rssnvi = 1 215 niqflint = 2 216 nethctrl = 2 217 neq = 4 218 nexactf = 2 219 cmask = all 220 pmask = 0x1 221 222[function "1/*"] 223 wx_caps = 0x82 224 r_caps = 0x86 225 nvi = 1 226 rssnvi = 1 227 niqflint = 2 228 nethctrl = 2 229 neq = 4 230 nexactf = 2 231 cmask = all 232 pmask = 0x2 233 234[function "2/*"] 235 wx_caps = 0x82 236 r_caps = 0x86 237 nvi = 1 238 rssnvi = 1 239 niqflint = 2 240 nethctrl = 2 241 neq = 4 242 nexactf = 2 243 cmask = all 244 pmask = 0x4 245 246[function "3/*"] 247 wx_caps = 0x82 248 r_caps = 0x86 249 nvi = 1 250 rssnvi = 1 251 niqflint = 2 252 nethctrl = 2 253 neq = 4 254 nexactf = 2 255 cmask = all 256 pmask = 0x8 257 258# MPS has 192K buffer space for ingress packets from the wire as well as 259# loopback path of the L2 switch. 260[port "0"] 261 dcb = none 262 bg_mem = 25 263 lpbk_mem = 25 264 hwm = 30 265 lwm = 15 266 dwm = 30 267 268[port "1"] 269 dcb = none 270 bg_mem = 25 271 lpbk_mem = 25 272 hwm = 30 273 lwm = 15 274 dwm = 30 275 276[port "2"] 277 dcb = none 278 bg_mem = 25 279 lpbk_mem = 25 280 hwm = 30 281 lwm = 15 282 dwm = 30 283 284[port "3"] 285 dcb = none 286 bg_mem = 25 287 lpbk_mem = 25 288 hwm = 30 289 lwm = 15 290 dwm = 30 291 292[fini] 293 version = 0x1 294 checksum = 0x30b6a157 295# 296# $FreeBSD$ 297# 298