1# Firmware configuration file. 2# 3# Global limits (some are hardware limits, others are due to the firmware). 4# nvi = 128 virtual interfaces 5# niqflint = 1023 ingress queues with freelists and/or interrupts 6# nethctrl = 64K Ethernet or ctrl egress queues 7# neq = 64K egress queues of all kinds, including freelists 8# nexactf = 336 MPS TCAM entries, can oversubscribe. 9# 10 11[global] 12 rss_glb_config_mode = basicvirtual 13 rss_glb_config_options = tnlmapen,hashtoeplitz,tnlalllkp 14 15 sge_timer_value = 1, 5, 10, 50, 100, 200 # usecs 16 17 # enable TP_OUT_CONFIG.IPIDSPLITMODE 18 reg[0x7d04] = 0x00010000/0x00010000 19 20 # disable TP_PARA_REG3.RxFragEn 21 reg[0x7d6c] = 0x00000000/0x00007000 22 23 reg[0x7dc0] = 0x0e2f8849 # TP_SHIFT_CNT 24 25 filterMode = fragmentation, mpshittype, protocol, vlan, port, fcoe 26 filterMask = protocol, fcoe 27 28 tp_pmrx = 36, 512 29 tp_pmrx_pagesize = 64K 30 31 # TP number of RX channels (0 = auto) 32 tp_nrxch = 0 33 34 tp_pmtx = 46, 512 35 tp_pmtx_pagesize = 64K 36 37 # TP number of TX channels (0 = auto) 38 tp_ntxch = 0 39 40 # TP OFLD MTUs 41 tp_mtus = 88, 256, 512, 576, 808, 1024, 1280, 1488, 1500, 2002, 2048, 4096, 4352, 8192, 9000, 9600 42 43 # cluster, lan, or wan. 44 tp_tcptuning = lan 45 46# PFs 0-3. These get 8 MSI/8 MSI-X vectors each. VFs are supported by 47# these 4 PFs only. 48[function "0"] 49 wx_caps = all 50 r_caps = all 51 nvi = 1 52 rssnvi = 0 53 niqflint = 2 54 nethctrl = 2 55 neq = 4 56 nexactf = 2 57 cmask = all 58 pmask = 0x1 59 60[function "1"] 61 wx_caps = all 62 r_caps = all 63 nvi = 1 64 rssnvi = 0 65 niqflint = 2 66 nethctrl = 2 67 neq = 4 68 nexactf = 2 69 cmask = all 70 pmask = 0x2 71 72[function "2"] 73 wx_caps = all 74 r_caps = all 75 nvi = 1 76 rssnvi = 0 77 niqflint = 2 78 nethctrl = 2 79 neq = 4 80 nexactf = 2 81 cmask = all 82 pmask = 0x4 83 84[function "3"] 85 wx_caps = all 86 r_caps = all 87 nvi = 1 88 rssnvi = 0 89 niqflint = 2 90 nethctrl = 2 91 neq = 4 92 nexactf = 2 93 cmask = all 94 pmask = 0x8 95 96# PF4 is the resource-rich PF that the bus/nexus driver attaches to. 97# It gets 32 MSI/128 MSI-X vectors. 98[function "4"] 99 wx_caps = all 100 r_caps = all 101 nvi = 32 102 rssnvi = 16 103 niqflint = 512 104 nethctrl = 1024 105 neq = 2048 106 nexactf = 280 107 cmask = all 108 pmask = all 109 nethofld = 2048 110 111 # driver will mask off features it won't use 112 protocol = ofld, rddp, rdmac, iscsi_initiator_pdu, iscsi_target_pdu 113 114 tp_l2t = 4096 115 tp_ddp = 2 116 tp_ddp_iscsi = 2 117 tp_stag = 2 118 tp_pbl = 5 119 tp_rq = 7 120 121 # TCAM has 8K cells; each region must start at a multiple of 128 cell. 122 # Each entry in these categories takes 4 cells each. nhash will use the 123 # TCAM iff there is room left (that is, the rest don't add up to 2048). 124 nroute = 32 125 nclip = 32 126 nfilter = 1456 127 nserver = 512 128 nhash = 16384 129 130# PF5 is the SCSI Controller PF. It gets 32 MSI/40 MSI-X vectors. 131# Not used right now. 132[function "5"] 133 nvi = 1 134 rssnvi = 0 135 136# PF6 is the FCoE Controller PF. It gets 32 MSI/40 MSI-X vectors. 137# Not used right now. 138[function "6"] 139 nvi = 1 140 rssnvi = 0 141 142# The following function, 1023, is not an actual PCIE function but is used to 143# configure and reserve firmware internal resources that come from the global 144# resource pool. 145[function "1023"] 146 wx_caps = all 147 r_caps = all 148 nvi = 4 149 rssnvi = 0 150 cmask = all 151 pmask = all 152 nexactf = 8 153 nfilter = 16 154 155# For Virtual functions, we only allow NIC functionality and we only allow 156# access to one port (1 << PF). Note that because of limitations in the 157# Scatter Gather Engine (SGE) hardware which checks writes to VF KDOORBELL 158# and GTS registers, the number of Ingress and Egress Queues must be a power 159# of 2. 160# 161[function "0/*"] 162 wx_caps = 0x82 163 r_caps = 0x86 164 nvi = 1 165 rssnvi = 0 166 niqflint = 2 167 nethctrl = 2 168 neq = 4 169 nexactf = 2 170 cmask = all 171 pmask = 0x1 172 173[function "1/*"] 174 wx_caps = 0x82 175 r_caps = 0x86 176 nvi = 1 177 rssnvi = 0 178 niqflint = 2 179 nethctrl = 2 180 neq = 4 181 nexactf = 2 182 cmask = all 183 pmask = 0x2 184 185[function "2/*"] 186 wx_caps = 0x82 187 r_caps = 0x86 188 nvi = 1 189 rssnvi = 0 190 niqflint = 2 191 nethctrl = 2 192 neq = 4 193 nexactf = 2 194 cmask = all 195 pmask = 0x4 196 197[function "3/*"] 198 wx_caps = 0x82 199 r_caps = 0x86 200 nvi = 1 201 rssnvi = 0 202 niqflint = 2 203 nethctrl = 2 204 neq = 4 205 nexactf = 2 206 cmask = all 207 pmask = 0x8 208 209# MPS has 192K buffer space for ingress packets from the wire as well as 210# loopback path of the L2 switch. 211[port "0"] 212 dcb = none 213 bg_mem = 25 214 lpbk_mem = 25 215 hwm = 30 216 lwm = 15 217 dwm = 30 218 219[port "1"] 220 dcb = none 221 bg_mem = 25 222 lpbk_mem = 25 223 hwm = 30 224 lwm = 15 225 dwm = 30 226 227[port "2"] 228 dcb = none 229 bg_mem = 25 230 lpbk_mem = 25 231 hwm = 30 232 lwm = 15 233 dwm = 30 234 235[port "3"] 236 dcb = none 237 bg_mem = 25 238 lpbk_mem = 25 239 hwm = 30 240 lwm = 15 241 dwm = 30 242 243[fini] 244 version = 0x1 245 checksum = 0x3ecbe8a0 246# 247# 248