1 /*- 2 * Copyright (c) 2012, 2015 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 30 #ifndef __CXGBEI_OFLD_H__ 31 #define __CXGBEI_OFLD_H__ 32 33 #include <dev/iscsi/icl.h> 34 35 enum { 36 CWT_SLEEPING = 1, 37 CWT_RUNNING = 2, 38 CWT_STOP = 3, 39 CWT_STOPPED = 4, 40 }; 41 42 struct cxgbei_worker_thread_softc { 43 struct mtx cwt_lock; 44 struct cv cwt_cv; 45 volatile int cwt_state; 46 47 TAILQ_HEAD(, icl_cxgbei_conn) rx_head; 48 } __aligned(CACHE_LINE_SIZE); 49 50 #define CXGBEI_CONN_SIGNATURE 0x56788765 51 52 enum { 53 RXF_ACTIVE = 1 << 0, /* In the worker thread's queue */ 54 }; 55 56 struct icl_cxgbei_conn { 57 struct icl_conn ic; 58 59 /* cxgbei specific stuff goes here. */ 60 uint32_t icc_signature; 61 int ulp_submode; 62 struct adapter *sc; 63 struct toepcb *toep; 64 65 /* Receive related. */ 66 u_int rx_flags; /* protected by so_rcv lock */ 67 u_int cwt; 68 STAILQ_HEAD(, icl_pdu) rcvd_pdus; /* protected by so_rcv lock */ 69 TAILQ_ENTRY(icl_cxgbei_conn) rx_link; /* protected by cwt lock */ 70 }; 71 72 static inline struct icl_cxgbei_conn * 73 ic_to_icc(struct icl_conn *ic) 74 { 75 76 return (__containerof(ic, struct icl_cxgbei_conn, ic)); 77 } 78 79 /* PDU flags and signature. */ 80 enum { 81 ICPF_RX_HDR = 1 << 0, /* PDU header received. */ 82 ICPF_RX_FLBUF = 1 << 1, /* PDU payload received in a freelist. */ 83 ICPF_RX_DDP = 1 << 2, /* PDU payload DDP'd. */ 84 ICPF_RX_STATUS = 1 << 3, /* Rx status received. */ 85 ICPF_HCRC_ERR = 1 << 4, /* Header digest error. */ 86 ICPF_DCRC_ERR = 1 << 5, /* Data digest error. */ 87 ICPF_PAD_ERR = 1 << 6, /* Padding error. */ 88 89 CXGBEI_PDU_SIGNATURE = 0x12344321 90 }; 91 92 struct icl_cxgbei_pdu { 93 struct icl_pdu ip; 94 95 /* cxgbei specific stuff goes here. */ 96 uint32_t icp_signature; 97 uint32_t icp_seq; /* For debug only */ 98 u_int icp_flags; 99 }; 100 101 static inline struct icl_cxgbei_pdu * 102 ip_to_icp(struct icl_pdu *ip) 103 { 104 105 return (__containerof(ip, struct icl_cxgbei_pdu, ip)); 106 } 107 108 struct cxgbei_sgl { 109 int sg_flag; 110 void *sg_addr; 111 void *sg_dma_addr; 112 size_t sg_offset; 113 size_t sg_length; 114 }; 115 116 #define cxgbei_scsi_for_each_sg(_sgl, _sgel, _n, _i) \ 117 for (_i = 0, _sgel = (cxgbei_sgl*) (_sgl); _i < _n; _i++, \ 118 _sgel++) 119 #define sg_dma_addr(_sgel) _sgel->sg_dma_addr 120 #define sg_virt(_sgel) _sgel->sg_addr 121 #define sg_len(_sgel) _sgel->sg_length 122 #define sg_off(_sgel) _sgel->sg_offset 123 #define sg_next(_sgel) _sgel + 1 124 125 /* private data for each scsi task */ 126 struct cxgbei_task_data { 127 struct cxgbei_sgl sgl[256]; 128 u_int nsge; 129 u_int sc_ddp_tag; 130 }; 131 132 struct cxgbei_ulp2_tag_format { 133 u_char sw_bits; 134 u_char rsvd_bits; 135 u_char rsvd_shift; 136 u_char filler[1]; 137 uint32_t rsvd_mask; 138 }; 139 140 struct cxgbei_data { 141 u_int llimit; 142 u_int ulimit; 143 u_int nppods; 144 u_int idx_last; 145 u_char idx_bits; 146 uint32_t idx_mask; 147 uint32_t rsvd_tag_mask; 148 u_int max_tx_pdu_len; 149 u_int max_rx_pdu_len; 150 151 struct mtx map_lock; 152 bus_dma_tag_t ulp_ddp_tag; 153 unsigned char *colors; 154 struct cxgbei_ulp2_gather_list **gl_map; 155 156 struct cxgbei_ulp2_tag_format tag_format; 157 }; 158 159 void cxgbei_conn_task_reserve_itt(void *, void **, void *, unsigned int *); 160 void cxgbei_conn_transfer_reserve_ttt(void *, void **, void *, unsigned int *); 161 void cxgbei_cleanup_task(void *, void *); 162 u_int cxgbei_select_worker_thread(struct icl_cxgbei_conn *); 163 164 struct cxgbei_ulp2_pagepod_hdr; 165 int t4_ddp_set_map(struct cxgbei_data *, void *, 166 struct cxgbei_ulp2_pagepod_hdr *, u_int, u_int, 167 struct cxgbei_ulp2_gather_list *, int); 168 void t4_ddp_clear_map(struct cxgbei_data *, struct cxgbei_ulp2_gather_list *, 169 u_int, u_int, u_int, struct icl_cxgbei_conn *); 170 171 /* icl_cxgbei.c */ 172 int icl_cxgbei_mod_load(void); 173 int icl_cxgbei_mod_unload(void); 174 #endif 175