1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2011, 2016 Chelsio Communications, Inc. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 * 30 */ 31 32 #ifndef __T4_HW_H 33 #define __T4_HW_H 34 35 #include "osdep.h" 36 37 enum { 38 NCHAN = 4, /* # of HW channels */ 39 T6_NCHAN = 2, 40 MAX_NCHAN = 4, 41 MAX_MTU = 9600, /* max MAC MTU, excluding header + FCS */ 42 EEPROMSIZE = 17408, /* Serial EEPROM physical size */ 43 EEPROMVSIZE = 32768, /* Serial EEPROM virtual address space size */ 44 EEPROMPFSIZE = 1024, /* EEPROM writable area size for PFn, n>0 */ 45 RSS_NENTRIES = 2048, /* # of entries in RSS mapping table */ 46 T6_RSS_NENTRIES = 4096, 47 TCB_SIZE = 128, /* TCB size */ 48 NMTUS = 16, /* size of MTU table */ 49 NCCTRL_WIN = 32, /* # of congestion control windows */ 50 NTX_SCHED = 8, /* # of HW Tx scheduling queues */ 51 PM_NSTATS = 5, /* # of PM stats */ 52 T6_PM_NSTATS = 7, 53 MAX_PM_NSTATS = 7, 54 MBOX_LEN = 64, /* mailbox size in bytes */ 55 NTRACE = 4, /* # of tracing filters */ 56 TRACE_LEN = 112, /* length of trace data and mask */ 57 FILTER_OPT_LEN = 36, /* filter tuple width of optional components */ 58 T5_FILTER_OPT_LEN = 40, 59 NWOL_PAT = 8, /* # of WoL patterns */ 60 WOL_PAT_LEN = 128, /* length of WoL patterns */ 61 UDBS_SEG_SIZE = 128, /* Segment size of BAR2 doorbells */ 62 UDBS_SEG_SHIFT = 7, /* log2(UDBS_SEG_SIZE) */ 63 UDBS_DB_OFFSET = 8, /* offset of the 4B doorbell in a segment */ 64 UDBS_WR_OFFSET = 64, /* offset of the work request in a segment */ 65 }; 66 67 enum { 68 CIM_NUM_IBQ = 6, /* # of CIM IBQs */ 69 CIM_NUM_OBQ = 6, /* # of CIM OBQs */ 70 CIM_NUM_OBQ_T5 = 8, /* # of CIM OBQs for T5 adapter */ 71 CIMLA_SIZE = 2048, /* # of 32-bit words in CIM LA */ 72 CIM_PIFLA_SIZE = 64, /* # of 192-bit words in CIM PIF LA */ 73 CIM_MALA_SIZE = 64, /* # of 160-bit words in CIM MA LA */ 74 CIM_IBQ_SIZE = 128, /* # of 128-bit words in a CIM IBQ */ 75 CIM_OBQ_SIZE = 128, /* # of 128-bit words in a CIM OBQ */ 76 TPLA_SIZE = 128, /* # of 64-bit words in TP LA */ 77 ULPRX_LA_SIZE = 512, /* # of 256-bit words in ULP_RX LA */ 78 }; 79 80 enum { 81 SF_PAGE_SIZE = 256, /* serial flash page size */ 82 SF_SEC_SIZE = 64 * 1024, /* serial flash sector size */ 83 }; 84 85 /* SGE context types */ 86 enum ctxt_type { CTXT_EGRESS, CTXT_INGRESS, CTXT_FLM, CTXT_CNM }; 87 88 enum { RSP_TYPE_FLBUF, RSP_TYPE_CPL, RSP_TYPE_INTR }; /* response entry types */ 89 90 enum { MBOX_OWNER_NONE, MBOX_OWNER_FW, MBOX_OWNER_DRV }; /* mailbox owners */ 91 92 enum { 93 SGE_MAX_WR_LEN = 512, /* max WR size in bytes */ 94 SGE_CTXT_SIZE = 24, /* size of SGE context */ 95 SGE_NTIMERS = 6, /* # of interrupt holdoff timer values */ 96 SGE_NCOUNTERS = 4, /* # of interrupt packet counter values */ 97 SGE_NDBQTIMERS = 8, /* # of Doorbell Queue Timer values */ 98 SGE_MAX_IQ_SIZE = 65520, 99 SGE_FLBUF_SIZES = 16, 100 }; 101 102 struct sge_qstat { /* data written to SGE queue status entries */ 103 volatile __be32 qid; 104 volatile __be16 cidx; 105 volatile __be16 pidx; 106 }; 107 108 #define S_QSTAT_PIDX 0 109 #define M_QSTAT_PIDX 0xffff 110 #define G_QSTAT_PIDX(x) (((x) >> S_QSTAT_PIDX) & M_QSTAT_PIDX) 111 112 #define S_QSTAT_CIDX 16 113 #define M_QSTAT_CIDX 0xffff 114 #define G_QSTAT_CIDX(x) (((x) >> S_QSTAT_CIDX) & M_QSTAT_CIDX) 115 116 /* 117 * Structure for last 128 bits of response descriptors 118 */ 119 struct rsp_ctrl { 120 __be32 hdrbuflen_pidx; 121 __be32 pldbuflen_qid; 122 union { 123 u8 type_gen; 124 __be64 last_flit; 125 } u; 126 }; 127 128 #define S_RSPD_NEWBUF 31 129 #define V_RSPD_NEWBUF(x) ((x) << S_RSPD_NEWBUF) 130 #define F_RSPD_NEWBUF V_RSPD_NEWBUF(1U) 131 132 #define S_RSPD_LEN 0 133 #define M_RSPD_LEN 0x7fffffff 134 #define V_RSPD_LEN(x) ((x) << S_RSPD_LEN) 135 #define G_RSPD_LEN(x) (((x) >> S_RSPD_LEN) & M_RSPD_LEN) 136 137 #define S_RSPD_QID S_RSPD_LEN 138 #define M_RSPD_QID M_RSPD_LEN 139 #define V_RSPD_QID(x) V_RSPD_LEN(x) 140 #define G_RSPD_QID(x) G_RSPD_LEN(x) 141 142 #define S_RSPD_GEN 7 143 #define V_RSPD_GEN(x) ((x) << S_RSPD_GEN) 144 #define F_RSPD_GEN V_RSPD_GEN(1U) 145 146 #define S_RSPD_QOVFL 6 147 #define V_RSPD_QOVFL(x) ((x) << S_RSPD_QOVFL) 148 #define F_RSPD_QOVFL V_RSPD_QOVFL(1U) 149 150 #define S_RSPD_TYPE 4 151 #define M_RSPD_TYPE 0x3 152 #define V_RSPD_TYPE(x) ((x) << S_RSPD_TYPE) 153 #define G_RSPD_TYPE(x) (((x) >> S_RSPD_TYPE) & M_RSPD_TYPE) 154 155 /* Rx queue interrupt deferral fields: counter enable and timer index */ 156 #define S_QINTR_CNT_EN 0 157 #define V_QINTR_CNT_EN(x) ((x) << S_QINTR_CNT_EN) 158 #define F_QINTR_CNT_EN V_QINTR_CNT_EN(1U) 159 160 #define S_QINTR_TIMER_IDX 1 161 #define M_QINTR_TIMER_IDX 0x7 162 #define V_QINTR_TIMER_IDX(x) ((x) << S_QINTR_TIMER_IDX) 163 #define G_QINTR_TIMER_IDX(x) (((x) >> S_QINTR_TIMER_IDX) & M_QINTR_TIMER_IDX) 164 165 /* # of pages a pagepod can hold without needing another pagepod */ 166 #define PPOD_PAGES 4U 167 168 struct pagepod { 169 __be64 vld_tid_pgsz_tag_color; 170 __be64 len_offset; 171 __be64 rsvd; 172 __be64 addr[PPOD_PAGES + 1]; 173 }; 174 175 #define S_PPOD_COLOR 0 176 #define M_PPOD_COLOR 0x3F 177 #define V_PPOD_COLOR(x) ((x) << S_PPOD_COLOR) 178 179 #define S_PPOD_TAG 6 180 #define M_PPOD_TAG 0xFFFFFF 181 #define V_PPOD_TAG(x) ((x) << S_PPOD_TAG) 182 #define G_PPOD_TAG(x) (((x) >> S_PPOD_TAG) & M_PPOD_TAG) 183 184 #define S_PPOD_PGSZ 30 185 #define M_PPOD_PGSZ 0x3 186 #define V_PPOD_PGSZ(x) ((x) << S_PPOD_PGSZ) 187 #define G_PPOD_PGSZ(x) (((x) >> S_PPOD_PGSZ) & M_PPOD_PGSZ) 188 189 #define S_PPOD_TID 32 190 #define M_PPOD_TID 0xFFFFFF 191 #define V_PPOD_TID(x) ((__u64)(x) << S_PPOD_TID) 192 193 #define S_PPOD_VALID 56 194 #define V_PPOD_VALID(x) ((__u64)(x) << S_PPOD_VALID) 195 #define F_PPOD_VALID V_PPOD_VALID(1ULL) 196 197 #define S_PPOD_LEN 32 198 #define M_PPOD_LEN 0xFFFFFFFF 199 #define V_PPOD_LEN(x) ((__u64)(x) << S_PPOD_LEN) 200 201 #define S_PPOD_OFST 0 202 #define M_PPOD_OFST 0xFFFFFFFF 203 #define V_PPOD_OFST(x) ((x) << S_PPOD_OFST) 204 205 /* 206 * Flash layout. 207 */ 208 #define FLASH_START(start) ((start) * SF_SEC_SIZE) 209 #define FLASH_MAX_SIZE(nsecs) ((nsecs) * SF_SEC_SIZE) 210 211 enum { 212 /* 213 * Various Expansion-ROM boot images, etc. 214 */ 215 FLASH_EXP_ROM_START_SEC = 0, 216 FLASH_EXP_ROM_NSECS = 6, 217 FLASH_EXP_ROM_START = FLASH_START(FLASH_EXP_ROM_START_SEC), 218 FLASH_EXP_ROM_MAX_SIZE = FLASH_MAX_SIZE(FLASH_EXP_ROM_NSECS), 219 220 /* 221 * iSCSI Boot Firmware Table (iBFT) and other driver-related 222 * parameters ... 223 */ 224 FLASH_IBFT_START_SEC = 6, 225 FLASH_IBFT_NSECS = 1, 226 FLASH_IBFT_START = FLASH_START(FLASH_IBFT_START_SEC), 227 FLASH_IBFT_MAX_SIZE = FLASH_MAX_SIZE(FLASH_IBFT_NSECS), 228 229 /* 230 * Boot configuration data. 231 */ 232 FLASH_BOOTCFG_START_SEC = 7, 233 FLASH_BOOTCFG_NSECS = 1, 234 FLASH_BOOTCFG_START = FLASH_START(FLASH_BOOTCFG_START_SEC), 235 FLASH_BOOTCFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_BOOTCFG_NSECS), 236 237 /* 238 * Location of firmware image in FLASH. 239 */ 240 FLASH_FW_START_SEC = 8, 241 FLASH_FW_NSECS = 16, 242 FLASH_FW_START = FLASH_START(FLASH_FW_START_SEC), 243 FLASH_FW_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FW_NSECS), 244 245 /* 246 * Location of bootstrap firmware image in FLASH. 247 */ 248 FLASH_FWBOOTSTRAP_START_SEC = 27, 249 FLASH_FWBOOTSTRAP_NSECS = 1, 250 FLASH_FWBOOTSTRAP_START = FLASH_START(FLASH_FWBOOTSTRAP_START_SEC), 251 FLASH_FWBOOTSTRAP_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FWBOOTSTRAP_NSECS), 252 253 /* 254 * iSCSI persistent/crash information. 255 */ 256 FLASH_ISCSI_CRASH_START_SEC = 29, 257 FLASH_ISCSI_CRASH_NSECS = 1, 258 FLASH_ISCSI_CRASH_START = FLASH_START(FLASH_ISCSI_CRASH_START_SEC), 259 FLASH_ISCSI_CRASH_MAX_SIZE = FLASH_MAX_SIZE(FLASH_ISCSI_CRASH_NSECS), 260 261 /* 262 * FCoE persistent/crash information. 263 */ 264 FLASH_FCOE_CRASH_START_SEC = 30, 265 FLASH_FCOE_CRASH_NSECS = 1, 266 FLASH_FCOE_CRASH_START = FLASH_START(FLASH_FCOE_CRASH_START_SEC), 267 FLASH_FCOE_CRASH_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FCOE_CRASH_NSECS), 268 269 /* 270 * Location of Firmware Configuration File in FLASH. 271 */ 272 FLASH_CFG_START_SEC = 31, 273 FLASH_CFG_NSECS = 1, 274 FLASH_CFG_START = FLASH_START(FLASH_CFG_START_SEC), 275 FLASH_CFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_CFG_NSECS), 276 277 /* 278 * We don't support FLASH devices which can't support the full 279 * standard set of sections which we need for normal operations. 280 */ 281 FLASH_MIN_SIZE = FLASH_CFG_START + FLASH_CFG_MAX_SIZE, 282 283 /* 284 * Sectors 32-63 for CUDBG. 285 */ 286 FLASH_CUDBG_START_SEC = 32, 287 FLASH_CUDBG_NSECS = 32, 288 FLASH_CUDBG_START = FLASH_START(FLASH_CUDBG_START_SEC), 289 FLASH_CUDBG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_CUDBG_NSECS), 290 291 /* 292 * Size of defined FLASH regions. 293 */ 294 FLASH_END_SEC = 64, 295 }; 296 297 #undef FLASH_START 298 #undef FLASH_MAX_SIZE 299 300 #define S_SGE_TIMESTAMP 0 301 #define M_SGE_TIMESTAMP 0xfffffffffffffffULL 302 #define V_SGE_TIMESTAMP(x) ((__u64)(x) << S_SGE_TIMESTAMP) 303 #define G_SGE_TIMESTAMP(x) (((__u64)(x) >> S_SGE_TIMESTAMP) & M_SGE_TIMESTAMP) 304 305 #define I2C_DEV_ADDR_A0 0xa0 306 #define I2C_DEV_ADDR_A2 0xa2 307 #define I2C_PAGE_SIZE 0x100 308 #define SFP_DIAG_TYPE_ADDR 0x5c 309 #define SFP_DIAG_TYPE_LEN 0x1 310 #define SFF_8472_COMP_ADDR 0x5e 311 #define SFF_8472_COMP_LEN 0x1 312 #define SFF_REV_ADDR 0x1 313 #define SFF_REV_LEN 0x1 314 315 #endif /* __T4_HW_H */ 316