1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 30 #ifndef __T4_HW_H 31 #define __T4_HW_H 32 33 #include "osdep.h" 34 35 enum { 36 NCHAN = 4, /* # of HW channels */ 37 MAX_MTU = 9600, /* max MAC MTU, excluding header + FCS */ 38 EEPROMSIZE = 17408, /* Serial EEPROM physical size */ 39 EEPROMVSIZE = 32768, /* Serial EEPROM virtual address space size */ 40 EEPROMPFSIZE = 1024, /* EEPROM writable area size for PFn, n>0 */ 41 RSS_NENTRIES = 2048, /* # of entries in RSS mapping table */ 42 TCB_SIZE = 128, /* TCB size */ 43 NMTUS = 16, /* size of MTU table */ 44 NCCTRL_WIN = 32, /* # of congestion control windows */ 45 NTX_SCHED = 8, /* # of HW Tx scheduling queues */ 46 PM_NSTATS = 5, /* # of PM stats */ 47 MBOX_LEN = 64, /* mailbox size in bytes */ 48 NTRACE = 4, /* # of tracing filters */ 49 TRACE_LEN = 112, /* length of trace data and mask */ 50 FILTER_OPT_LEN = 36, /* filter tuple width of optional components */ 51 NWOL_PAT = 8, /* # of WoL patterns */ 52 WOL_PAT_LEN = 128, /* length of WoL patterns */ 53 UDBS_SEG_SIZE = 128, /* Segment size of BAR2 doorbells */ 54 UDBS_SEG_SHIFT = 7, /* log2(UDBS_SEG_SIZE) */ 55 UDBS_DB_OFFSET = 8, /* offset of the 4B doorbell in a segment */ 56 UDBS_WR_OFFSET = 64, /* offset of the work request in a segment */ 57 }; 58 59 enum { 60 CIM_NUM_IBQ = 6, /* # of CIM IBQs */ 61 CIM_NUM_OBQ = 6, /* # of CIM OBQs */ 62 CIM_NUM_OBQ_T5 = 8, /* # of CIM OBQs for T5 adapter */ 63 CIMLA_SIZE = 2048, /* # of 32-bit words in CIM LA */ 64 CIM_PIFLA_SIZE = 64, /* # of 192-bit words in CIM PIF LA */ 65 CIM_MALA_SIZE = 64, /* # of 160-bit words in CIM MA LA */ 66 CIM_IBQ_SIZE = 128, /* # of 128-bit words in a CIM IBQ */ 67 CIM_OBQ_SIZE = 128, /* # of 128-bit words in a CIM OBQ */ 68 TPLA_SIZE = 128, /* # of 64-bit words in TP LA */ 69 ULPRX_LA_SIZE = 512, /* # of 256-bit words in ULP_RX LA */ 70 }; 71 72 enum { 73 SF_PAGE_SIZE = 256, /* serial flash page size */ 74 SF_SEC_SIZE = 64 * 1024, /* serial flash sector size */ 75 }; 76 77 /* SGE context types */ 78 enum ctxt_type { CTXT_EGRESS, CTXT_INGRESS, CTXT_FLM, CTXT_CNM }; 79 80 enum { RSP_TYPE_FLBUF, RSP_TYPE_CPL, RSP_TYPE_INTR }; /* response entry types */ 81 82 enum { MBOX_OWNER_NONE, MBOX_OWNER_FW, MBOX_OWNER_DRV }; /* mailbox owners */ 83 84 enum { 85 SGE_MAX_WR_LEN = 512, /* max WR size in bytes */ 86 SGE_CTXT_SIZE = 24, /* size of SGE context */ 87 SGE_NTIMERS = 6, /* # of interrupt holdoff timer values */ 88 SGE_NCOUNTERS = 4, /* # of interrupt packet counter values */ 89 SGE_MAX_IQ_SIZE = 65520, 90 SGE_FLBUF_SIZES = 16, 91 }; 92 93 struct sge_qstat { /* data written to SGE queue status entries */ 94 volatile __be32 qid; 95 volatile __be16 cidx; 96 volatile __be16 pidx; 97 }; 98 99 #define S_QSTAT_PIDX 0 100 #define M_QSTAT_PIDX 0xffff 101 #define G_QSTAT_PIDX(x) (((x) >> S_QSTAT_PIDX) & M_QSTAT_PIDX) 102 103 #define S_QSTAT_CIDX 16 104 #define M_QSTAT_CIDX 0xffff 105 #define G_QSTAT_CIDX(x) (((x) >> S_QSTAT_CIDX) & M_QSTAT_CIDX) 106 107 /* 108 * Structure for last 128 bits of response descriptors 109 */ 110 struct rsp_ctrl { 111 __be32 hdrbuflen_pidx; 112 __be32 pldbuflen_qid; 113 union { 114 u8 type_gen; 115 __be64 last_flit; 116 } u; 117 }; 118 119 #define S_RSPD_NEWBUF 31 120 #define V_RSPD_NEWBUF(x) ((x) << S_RSPD_NEWBUF) 121 #define F_RSPD_NEWBUF V_RSPD_NEWBUF(1U) 122 123 #define S_RSPD_LEN 0 124 #define M_RSPD_LEN 0x7fffffff 125 #define V_RSPD_LEN(x) ((x) << S_RSPD_LEN) 126 #define G_RSPD_LEN(x) (((x) >> S_RSPD_LEN) & M_RSPD_LEN) 127 128 #define S_RSPD_QID S_RSPD_LEN 129 #define M_RSPD_QID M_RSPD_LEN 130 #define V_RSPD_QID(x) V_RSPD_LEN(x) 131 #define G_RSPD_QID(x) G_RSPD_LEN(x) 132 133 #define S_RSPD_GEN 7 134 #define V_RSPD_GEN(x) ((x) << S_RSPD_GEN) 135 #define F_RSPD_GEN V_RSPD_GEN(1U) 136 137 #define S_RSPD_QOVFL 6 138 #define V_RSPD_QOVFL(x) ((x) << S_RSPD_QOVFL) 139 #define F_RSPD_QOVFL V_RSPD_QOVFL(1U) 140 141 #define S_RSPD_TYPE 4 142 #define M_RSPD_TYPE 0x3 143 #define V_RSPD_TYPE(x) ((x) << S_RSPD_TYPE) 144 #define G_RSPD_TYPE(x) (((x) >> S_RSPD_TYPE) & M_RSPD_TYPE) 145 146 /* Rx queue interrupt deferral fields: counter enable and timer index */ 147 #define S_QINTR_CNT_EN 0 148 #define V_QINTR_CNT_EN(x) ((x) << S_QINTR_CNT_EN) 149 #define F_QINTR_CNT_EN V_QINTR_CNT_EN(1U) 150 151 #define S_QINTR_TIMER_IDX 1 152 #define M_QINTR_TIMER_IDX 0x7 153 #define V_QINTR_TIMER_IDX(x) ((x) << S_QINTR_TIMER_IDX) 154 #define G_QINTR_TIMER_IDX(x) (((x) >> S_QINTR_TIMER_IDX) & M_QINTR_TIMER_IDX) 155 156 /* # of pages a pagepod can hold without needing another pagepod */ 157 #define PPOD_PAGES 4U 158 159 struct pagepod { 160 __be64 vld_tid_pgsz_tag_color; 161 __be64 len_offset; 162 __be64 rsvd; 163 __be64 addr[PPOD_PAGES + 1]; 164 }; 165 166 #define S_PPOD_COLOR 0 167 #define M_PPOD_COLOR 0x3F 168 #define V_PPOD_COLOR(x) ((x) << S_PPOD_COLOR) 169 170 #define S_PPOD_TAG 6 171 #define M_PPOD_TAG 0xFFFFFF 172 #define V_PPOD_TAG(x) ((x) << S_PPOD_TAG) 173 #define G_PPOD_TAG(x) (((x) >> S_PPOD_TAG) & M_PPOD_TAG) 174 175 #define S_PPOD_PGSZ 30 176 #define M_PPOD_PGSZ 0x3 177 #define V_PPOD_PGSZ(x) ((x) << S_PPOD_PGSZ) 178 #define G_PPOD_PGSZ(x) (((x) >> S_PPOD_PGSZ) & M_PPOD_PGSZ) 179 180 #define S_PPOD_TID 32 181 #define M_PPOD_TID 0xFFFFFF 182 #define V_PPOD_TID(x) ((__u64)(x) << S_PPOD_TID) 183 184 #define S_PPOD_VALID 56 185 #define V_PPOD_VALID(x) ((__u64)(x) << S_PPOD_VALID) 186 #define F_PPOD_VALID V_PPOD_VALID(1ULL) 187 188 #define S_PPOD_LEN 32 189 #define M_PPOD_LEN 0xFFFFFFFF 190 #define V_PPOD_LEN(x) ((__u64)(x) << S_PPOD_LEN) 191 192 #define S_PPOD_OFST 0 193 #define M_PPOD_OFST 0xFFFFFFFF 194 #define V_PPOD_OFST(x) ((x) << S_PPOD_OFST) 195 196 /* 197 * Flash layout. 198 */ 199 #define FLASH_START(start) ((start) * SF_SEC_SIZE) 200 #define FLASH_MAX_SIZE(nsecs) ((nsecs) * SF_SEC_SIZE) 201 202 enum { 203 /* 204 * Various Expansion-ROM boot images, etc. 205 */ 206 FLASH_EXP_ROM_START_SEC = 0, 207 FLASH_EXP_ROM_NSECS = 6, 208 FLASH_EXP_ROM_START = FLASH_START(FLASH_EXP_ROM_START_SEC), 209 FLASH_EXP_ROM_MAX_SIZE = FLASH_MAX_SIZE(FLASH_EXP_ROM_NSECS), 210 211 /* 212 * iSCSI Boot Firmware Table (iBFT) and other driver-related 213 * parameters ... 214 */ 215 FLASH_IBFT_START_SEC = 6, 216 FLASH_IBFT_NSECS = 1, 217 FLASH_IBFT_START = FLASH_START(FLASH_IBFT_START_SEC), 218 FLASH_IBFT_MAX_SIZE = FLASH_MAX_SIZE(FLASH_IBFT_NSECS), 219 220 /* 221 * Boot configuration data. 222 */ 223 FLASH_BOOTCFG_START_SEC = 7, 224 FLASH_BOOTCFG_NSECS = 1, 225 FLASH_BOOTCFG_START = FLASH_START(FLASH_BOOTCFG_START_SEC), 226 FLASH_BOOTCFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_BOOTCFG_NSECS), 227 228 /* 229 * Location of firmware image in FLASH. 230 */ 231 FLASH_FW_START_SEC = 8, 232 FLASH_FW_NSECS = 16, 233 FLASH_FW_START = FLASH_START(FLASH_FW_START_SEC), 234 FLASH_FW_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FW_NSECS), 235 236 /* 237 * Location of bootstrap firmware image in FLASH. 238 */ 239 FLASH_FWBOOTSTRAP_START_SEC = 27, 240 FLASH_FWBOOTSTRAP_NSECS = 1, 241 FLASH_FWBOOTSTRAP_START = FLASH_START(FLASH_FWBOOTSTRAP_START_SEC), 242 FLASH_FWBOOTSTRAP_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FWBOOTSTRAP_NSECS), 243 244 /* 245 * iSCSI persistent/crash information. 246 */ 247 FLASH_ISCSI_CRASH_START_SEC = 29, 248 FLASH_ISCSI_CRASH_NSECS = 1, 249 FLASH_ISCSI_CRASH_START = FLASH_START(FLASH_ISCSI_CRASH_START_SEC), 250 FLASH_ISCSI_CRASH_MAX_SIZE = FLASH_MAX_SIZE(FLASH_ISCSI_CRASH_NSECS), 251 252 /* 253 * FCoE persistent/crash information. 254 */ 255 FLASH_FCOE_CRASH_START_SEC = 30, 256 FLASH_FCOE_CRASH_NSECS = 1, 257 FLASH_FCOE_CRASH_START = FLASH_START(FLASH_FCOE_CRASH_START_SEC), 258 FLASH_FCOE_CRASH_MAX_SIZE = FLASH_MAX_SIZE(FLASH_FCOE_CRASH_NSECS), 259 260 /* 261 * Location of Firmware Configuration File in FLASH. 262 */ 263 FLASH_CFG_START_SEC = 31, 264 FLASH_CFG_NSECS = 1, 265 FLASH_CFG_START = FLASH_START(FLASH_CFG_START_SEC), 266 FLASH_CFG_MAX_SIZE = FLASH_MAX_SIZE(FLASH_CFG_NSECS), 267 268 /* 269 * Sectors 32-63 are reserved for FLASH failover. 270 */ 271 }; 272 273 #undef FLASH_START 274 #undef FLASH_MAX_SIZE 275 276 #endif /* __T4_HW_H */ 277