1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 30 #ifndef __CHELSIO_COMMON_H 31 #define __CHELSIO_COMMON_H 32 33 #include "t4_hw.h" 34 35 36 enum { 37 MAX_NPORTS = 4, /* max # of ports */ 38 SERNUM_LEN = 24, /* Serial # length */ 39 EC_LEN = 16, /* E/C length */ 40 ID_LEN = 16, /* ID length */ 41 }; 42 43 enum { MEM_EDC0, MEM_EDC1, MEM_MC }; 44 45 enum { 46 MEMWIN0_APERTURE = 2048, 47 MEMWIN0_BASE = 0x1b800, 48 MEMWIN1_APERTURE = 32768, 49 MEMWIN1_BASE = 0x28000, 50 MEMWIN2_APERTURE = 65536, 51 MEMWIN2_BASE = 0x30000, 52 }; 53 54 enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST }; 55 56 enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR }; 57 58 enum { 59 PAUSE_RX = 1 << 0, 60 PAUSE_TX = 1 << 1, 61 PAUSE_AUTONEG = 1 << 2 62 }; 63 64 #define FW_VERSION_MAJOR 1 65 #define FW_VERSION_MINOR 4 66 #define FW_VERSION_MICRO 16 67 68 struct port_stats { 69 u64 tx_octets; /* total # of octets in good frames */ 70 u64 tx_frames; /* all good frames */ 71 u64 tx_bcast_frames; /* all broadcast frames */ 72 u64 tx_mcast_frames; /* all multicast frames */ 73 u64 tx_ucast_frames; /* all unicast frames */ 74 u64 tx_error_frames; /* all error frames */ 75 76 u64 tx_frames_64; /* # of Tx frames in a particular range */ 77 u64 tx_frames_65_127; 78 u64 tx_frames_128_255; 79 u64 tx_frames_256_511; 80 u64 tx_frames_512_1023; 81 u64 tx_frames_1024_1518; 82 u64 tx_frames_1519_max; 83 84 u64 tx_drop; /* # of dropped Tx frames */ 85 u64 tx_pause; /* # of transmitted pause frames */ 86 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */ 87 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */ 88 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */ 89 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */ 90 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */ 91 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */ 92 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */ 93 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */ 94 95 u64 rx_octets; /* total # of octets in good frames */ 96 u64 rx_frames; /* all good frames */ 97 u64 rx_bcast_frames; /* all broadcast frames */ 98 u64 rx_mcast_frames; /* all multicast frames */ 99 u64 rx_ucast_frames; /* all unicast frames */ 100 u64 rx_too_long; /* # of frames exceeding MTU */ 101 u64 rx_jabber; /* # of jabber frames */ 102 u64 rx_fcs_err; /* # of received frames with bad FCS */ 103 u64 rx_len_err; /* # of received frames with length error */ 104 u64 rx_symbol_err; /* symbol errors */ 105 u64 rx_runt; /* # of short frames */ 106 107 u64 rx_frames_64; /* # of Rx frames in a particular range */ 108 u64 rx_frames_65_127; 109 u64 rx_frames_128_255; 110 u64 rx_frames_256_511; 111 u64 rx_frames_512_1023; 112 u64 rx_frames_1024_1518; 113 u64 rx_frames_1519_max; 114 115 u64 rx_pause; /* # of received pause frames */ 116 u64 rx_ppp0; /* # of received PPP prio 0 frames */ 117 u64 rx_ppp1; /* # of received PPP prio 1 frames */ 118 u64 rx_ppp2; /* # of received PPP prio 2 frames */ 119 u64 rx_ppp3; /* # of received PPP prio 3 frames */ 120 u64 rx_ppp4; /* # of received PPP prio 4 frames */ 121 u64 rx_ppp5; /* # of received PPP prio 5 frames */ 122 u64 rx_ppp6; /* # of received PPP prio 6 frames */ 123 u64 rx_ppp7; /* # of received PPP prio 7 frames */ 124 125 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */ 126 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */ 127 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */ 128 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */ 129 u64 rx_trunc0; /* buffer-group 0 truncated packets */ 130 u64 rx_trunc1; /* buffer-group 1 truncated packets */ 131 u64 rx_trunc2; /* buffer-group 2 truncated packets */ 132 u64 rx_trunc3; /* buffer-group 3 truncated packets */ 133 }; 134 135 struct lb_port_stats { 136 u64 octets; 137 u64 frames; 138 u64 bcast_frames; 139 u64 mcast_frames; 140 u64 ucast_frames; 141 u64 error_frames; 142 143 u64 frames_64; 144 u64 frames_65_127; 145 u64 frames_128_255; 146 u64 frames_256_511; 147 u64 frames_512_1023; 148 u64 frames_1024_1518; 149 u64 frames_1519_max; 150 151 u64 drop; 152 153 u64 ovflow0; 154 u64 ovflow1; 155 u64 ovflow2; 156 u64 ovflow3; 157 u64 trunc0; 158 u64 trunc1; 159 u64 trunc2; 160 u64 trunc3; 161 }; 162 163 struct tp_tcp_stats { 164 u32 tcpOutRsts; 165 u64 tcpInSegs; 166 u64 tcpOutSegs; 167 u64 tcpRetransSegs; 168 }; 169 170 struct tp_usm_stats { 171 u32 frames; 172 u32 drops; 173 u64 octets; 174 }; 175 176 struct tp_fcoe_stats { 177 u32 framesDDP; 178 u32 framesDrop; 179 u64 octetsDDP; 180 }; 181 182 struct tp_err_stats { 183 u32 macInErrs[4]; 184 u32 hdrInErrs[4]; 185 u32 tcpInErrs[4]; 186 u32 tnlCongDrops[4]; 187 u32 ofldChanDrops[4]; 188 u32 tnlTxDrops[4]; 189 u32 ofldVlanDrops[4]; 190 u32 tcp6InErrs[4]; 191 u32 ofldNoNeigh; 192 u32 ofldCongDefer; 193 }; 194 195 struct tp_proxy_stats { 196 u32 proxy[4]; 197 }; 198 199 struct tp_cpl_stats { 200 u32 req[4]; 201 u32 rsp[4]; 202 }; 203 204 struct tp_rdma_stats { 205 u32 rqe_dfr_mod; 206 u32 rqe_dfr_pkt; 207 }; 208 209 struct tp_params { 210 unsigned int ntxchan; /* # of Tx channels */ 211 unsigned int tre; /* log2 of core clocks per TP tick */ 212 unsigned int dack_re; /* DACK timer resolution */ 213 unsigned int la_mask; /* what events are recorded by TP LA */ 214 unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */ 215 }; 216 217 struct vpd_params { 218 unsigned int cclk; 219 u8 ec[EC_LEN + 1]; 220 u8 sn[SERNUM_LEN + 1]; 221 u8 id[ID_LEN + 1]; 222 }; 223 224 struct pci_params { 225 unsigned int vpd_cap_addr; 226 unsigned short speed; 227 unsigned short width; 228 }; 229 230 /* 231 * Firmware device log. 232 */ 233 struct devlog_params { 234 u32 memtype; /* which memory (EDC0, EDC1, MC) */ 235 u32 start; /* start of log in firmware memory */ 236 u32 size; /* size of log */ 237 }; 238 239 struct adapter_params { 240 struct tp_params tp; 241 struct vpd_params vpd; 242 struct pci_params pci; 243 struct devlog_params devlog; 244 245 unsigned int sf_size; /* serial flash size in bytes */ 246 unsigned int sf_nsec; /* # of flash sectors */ 247 248 unsigned int fw_vers; 249 unsigned int tp_vers; 250 251 unsigned short mtus[NMTUS]; 252 unsigned short a_wnd[NCCTRL_WIN]; 253 unsigned short b_wnd[NCCTRL_WIN]; 254 255 unsigned int mc_size; /* MC memory size */ 256 unsigned int nfilters; /* size of filter region */ 257 258 unsigned int cim_la_size; 259 260 /* Used as int in sysctls, do not reduce size */ 261 unsigned int nports; /* # of ethernet ports */ 262 unsigned int portvec; 263 unsigned int rev; /* chip revision */ 264 unsigned int offload; 265 266 unsigned int ofldq_wr_cred; 267 }; 268 269 enum { /* chip revisions */ 270 T4_REV_A = 0, 271 }; 272 273 struct trace_params { 274 u32 data[TRACE_LEN / 4]; 275 u32 mask[TRACE_LEN / 4]; 276 unsigned short snap_len; 277 unsigned short min_len; 278 unsigned char skip_ofst; 279 unsigned char skip_len; 280 unsigned char invert; 281 unsigned char port; 282 }; 283 284 struct link_config { 285 unsigned short supported; /* link capabilities */ 286 unsigned short advertising; /* advertised capabilities */ 287 unsigned short requested_speed; /* speed user has requested */ 288 unsigned short speed; /* actual link speed */ 289 unsigned char requested_fc; /* flow control user has requested */ 290 unsigned char fc; /* actual link flow control */ 291 unsigned char autoneg; /* autonegotiating? */ 292 unsigned char link_ok; /* link up? */ 293 }; 294 295 #include "adapter.h" 296 297 #ifndef PCI_VENDOR_ID_CHELSIO 298 # define PCI_VENDOR_ID_CHELSIO 0x1425 299 #endif 300 301 #define for_each_port(adapter, iter) \ 302 for (iter = 0; iter < (adapter)->params.nports; ++iter) 303 304 static inline int is_offload(const struct adapter *adap) 305 { 306 return adap->params.offload; 307 } 308 309 static inline unsigned int core_ticks_per_usec(const struct adapter *adap) 310 { 311 return adap->params.vpd.cclk / 1000; 312 } 313 314 static inline unsigned int us_to_core_ticks(const struct adapter *adap, 315 unsigned int us) 316 { 317 return (us * adap->params.vpd.cclk) / 1000; 318 } 319 320 static inline unsigned int dack_ticks_to_usec(const struct adapter *adap, 321 unsigned int ticks) 322 { 323 return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap); 324 } 325 326 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val); 327 int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask, int polarity, 328 int attempts, int delay, u32 *valp); 329 330 static inline int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask, 331 int polarity, int attempts, int delay) 332 { 333 return t4_wait_op_done_val(adapter, reg, mask, polarity, attempts, 334 delay, NULL); 335 } 336 337 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, 338 void *rpl, bool sleep_ok); 339 340 static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, 341 int size, void *rpl) 342 { 343 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true); 344 } 345 346 static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, 347 int size, void *rpl) 348 { 349 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false); 350 } 351 352 void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, 353 unsigned int data_reg, u32 *vals, unsigned int nregs, 354 unsigned int start_idx); 355 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg, 356 unsigned int data_reg, const u32 *vals, 357 unsigned int nregs, unsigned int start_idx); 358 359 struct fw_filter_wr; 360 361 void t4_intr_enable(struct adapter *adapter); 362 void t4_intr_disable(struct adapter *adapter); 363 void t4_intr_clear(struct adapter *adapter); 364 int t4_slow_intr_handler(struct adapter *adapter); 365 366 int t4_hash_mac_addr(const u8 *addr); 367 int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port, 368 struct link_config *lc); 369 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); 370 int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data); 371 int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data); 372 int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz); 373 int t4_seeprom_wp(struct adapter *adapter, int enable); 374 int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords, 375 u32 *data, int byte_oriented); 376 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); 377 int t4_load_boot(struct adapter *adap, const u8 *boot_data, 378 unsigned int boot_addr, unsigned int size); 379 unsigned int t4_flash_cfg_addr(struct adapter *adapter); 380 int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 381 int t4_get_fw_version(struct adapter *adapter, u32 *vers); 382 int t4_get_tp_version(struct adapter *adapter, u32 *vers); 383 int t4_check_fw_version(struct adapter *adapter); 384 int t4_init_hw(struct adapter *adapter, u32 fw_params); 385 int t4_prep_adapter(struct adapter *adapter); 386 int t4_port_init(struct port_info *p, int mbox, int pf, int vf); 387 int t4_reinit_adapter(struct adapter *adap); 388 void t4_fatal_err(struct adapter *adapter); 389 int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, 390 int filter_index, int enable); 391 void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, 392 int filter_index, int *enabled); 393 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, 394 int start, int n, const u16 *rspq, unsigned int nrspq); 395 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, 396 unsigned int flags); 397 int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid, 398 unsigned int flags, unsigned int defq); 399 int t4_read_rss(struct adapter *adapter, u16 *entries); 400 void t4_read_rss_key(struct adapter *adapter, u32 *key); 401 void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx); 402 void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, u32 *valp); 403 void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, u32 val); 404 void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, 405 u32 *vfl, u32 *vfh); 406 void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index, 407 u32 vfl, u32 vfh); 408 u32 t4_read_rss_pf_map(struct adapter *adapter); 409 void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap); 410 u32 t4_read_rss_pf_mask(struct adapter *adapter); 411 void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask); 412 int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask); 413 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 414 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 415 void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); 416 int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 417 int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 418 int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, 419 unsigned int *valp); 420 int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, 421 const unsigned int *valp); 422 int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n, 423 unsigned int *valp); 424 int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); 425 void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, 426 unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr); 427 void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); 428 int t4_mc_read(struct adapter *adap, u32 addr, __be32 *data, u64 *parity); 429 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity); 430 int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size, 431 __be32 *data); 432 433 void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p); 434 void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p); 435 void t4_clr_port_stats(struct adapter *adap, int idx); 436 437 void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log); 438 void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]); 439 void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]); 440 void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps, 441 unsigned int *ipg); 442 void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, 443 unsigned int mask, unsigned int val); 444 void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr); 445 void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st); 446 void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st); 447 void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st); 448 void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st); 449 void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st); 450 void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4, 451 struct tp_tcp_stats *v6); 452 void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx, 453 struct tp_fcoe_stats *st); 454 void t4_load_mtus(struct adapter *adap, const unsigned short *mtus, 455 const unsigned short *alpha, const unsigned short *beta); 456 457 void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf); 458 459 int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps); 460 int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg); 461 int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals, 462 unsigned int start, unsigned int n); 463 void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate); 464 int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map); 465 void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid); 466 467 void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr); 468 int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, 469 u64 mask0, u64 mask1, unsigned int crc, bool enable); 470 471 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, 472 enum dev_master master, enum dev_state *state); 473 int t4_fw_bye(struct adapter *adap, unsigned int mbox); 474 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset); 475 int t4_fw_initialize(struct adapter *adap, unsigned int mbox); 476 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 477 unsigned int vf, unsigned int nparams, const u32 *params, 478 u32 *val); 479 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 480 unsigned int vf, unsigned int nparams, const u32 *params, 481 const u32 *val); 482 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, 483 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, 484 unsigned int rxqi, unsigned int rxq, unsigned int tc, 485 unsigned int vi, unsigned int cmask, unsigned int pmask, 486 unsigned int exactf, unsigned int rcaps, unsigned int wxcaps); 487 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, 488 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, 489 unsigned int *rss_size); 490 int t4_free_vi(struct adapter *adap, unsigned int mbox, 491 unsigned int pf, unsigned int vf, 492 unsigned int viid); 493 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, 494 int mtu, int promisc, int all_multi, int bcast, int vlanex, 495 bool sleep_ok); 496 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid, 497 bool free, unsigned int naddr, const u8 **addr, u16 *idx, 498 u64 *hash, bool sleep_ok); 499 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, 500 int idx, const u8 *addr, bool persist, bool add_smt); 501 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, 502 bool ucast, u64 vec, bool sleep_ok); 503 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid, 504 bool rx_en, bool tx_en); 505 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, 506 unsigned int nblinks); 507 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 508 unsigned int mmd, unsigned int reg, unsigned int *valp); 509 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 510 unsigned int mmd, unsigned int reg, unsigned int val); 511 int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start, 512 unsigned int pf, unsigned int vf, unsigned int iqid, 513 unsigned int fl0id, unsigned int fl1id); 514 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 515 unsigned int vf, unsigned int iqtype, unsigned int iqid, 516 unsigned int fl0id, unsigned int fl1id); 517 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 518 unsigned int vf, unsigned int eqid); 519 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 520 unsigned int vf, unsigned int eqid); 521 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 522 unsigned int vf, unsigned int eqid); 523 int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid, 524 enum ctxt_type ctype, u32 *data); 525 int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype, 526 u32 *data); 527 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl); 528 #endif /* __CHELSIO_COMMON_H */ 529