1 /*- 2 * Copyright (c) 2011 Chelsio Communications, Inc. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 * 28 */ 29 30 #ifndef __CHELSIO_COMMON_H 31 #define __CHELSIO_COMMON_H 32 33 #include "t4_hw.h" 34 35 36 enum { 37 MAX_NPORTS = 4, /* max # of ports */ 38 SERNUM_LEN = 24, /* Serial # length */ 39 EC_LEN = 16, /* E/C length */ 40 ID_LEN = 16, /* ID length */ 41 PN_LEN = 16, /* Part Number length */ 42 MACADDR_LEN = 12, /* MAC Address length */ 43 }; 44 45 enum { MEM_EDC0, MEM_EDC1, MEM_MC, MEM_MC0 = MEM_MC, MEM_MC1 }; 46 47 enum { 48 MEMWIN0_APERTURE = 2048, 49 MEMWIN0_BASE = 0x1b800, 50 MEMWIN1_APERTURE = 32768, 51 MEMWIN1_BASE = 0x28000, 52 53 MEMWIN2_APERTURE_T4 = 65536, 54 MEMWIN2_BASE_T4 = 0x30000, 55 56 MEMWIN2_APERTURE_T5 = 128 * 1024, 57 MEMWIN2_BASE_T5 = 0x60000, 58 }; 59 60 enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST }; 61 62 enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR }; 63 64 enum { 65 PAUSE_RX = 1 << 0, 66 PAUSE_TX = 1 << 1, 67 PAUSE_AUTONEG = 1 << 2 68 }; 69 70 struct memwin { 71 uint32_t base; 72 uint32_t aperture; 73 }; 74 75 struct port_stats { 76 u64 tx_octets; /* total # of octets in good frames */ 77 u64 tx_frames; /* all good frames */ 78 u64 tx_bcast_frames; /* all broadcast frames */ 79 u64 tx_mcast_frames; /* all multicast frames */ 80 u64 tx_ucast_frames; /* all unicast frames */ 81 u64 tx_error_frames; /* all error frames */ 82 83 u64 tx_frames_64; /* # of Tx frames in a particular range */ 84 u64 tx_frames_65_127; 85 u64 tx_frames_128_255; 86 u64 tx_frames_256_511; 87 u64 tx_frames_512_1023; 88 u64 tx_frames_1024_1518; 89 u64 tx_frames_1519_max; 90 91 u64 tx_drop; /* # of dropped Tx frames */ 92 u64 tx_pause; /* # of transmitted pause frames */ 93 u64 tx_ppp0; /* # of transmitted PPP prio 0 frames */ 94 u64 tx_ppp1; /* # of transmitted PPP prio 1 frames */ 95 u64 tx_ppp2; /* # of transmitted PPP prio 2 frames */ 96 u64 tx_ppp3; /* # of transmitted PPP prio 3 frames */ 97 u64 tx_ppp4; /* # of transmitted PPP prio 4 frames */ 98 u64 tx_ppp5; /* # of transmitted PPP prio 5 frames */ 99 u64 tx_ppp6; /* # of transmitted PPP prio 6 frames */ 100 u64 tx_ppp7; /* # of transmitted PPP prio 7 frames */ 101 102 u64 rx_octets; /* total # of octets in good frames */ 103 u64 rx_frames; /* all good frames */ 104 u64 rx_bcast_frames; /* all broadcast frames */ 105 u64 rx_mcast_frames; /* all multicast frames */ 106 u64 rx_ucast_frames; /* all unicast frames */ 107 u64 rx_too_long; /* # of frames exceeding MTU */ 108 u64 rx_jabber; /* # of jabber frames */ 109 u64 rx_fcs_err; /* # of received frames with bad FCS */ 110 u64 rx_len_err; /* # of received frames with length error */ 111 u64 rx_symbol_err; /* symbol errors */ 112 u64 rx_runt; /* # of short frames */ 113 114 u64 rx_frames_64; /* # of Rx frames in a particular range */ 115 u64 rx_frames_65_127; 116 u64 rx_frames_128_255; 117 u64 rx_frames_256_511; 118 u64 rx_frames_512_1023; 119 u64 rx_frames_1024_1518; 120 u64 rx_frames_1519_max; 121 122 u64 rx_pause; /* # of received pause frames */ 123 u64 rx_ppp0; /* # of received PPP prio 0 frames */ 124 u64 rx_ppp1; /* # of received PPP prio 1 frames */ 125 u64 rx_ppp2; /* # of received PPP prio 2 frames */ 126 u64 rx_ppp3; /* # of received PPP prio 3 frames */ 127 u64 rx_ppp4; /* # of received PPP prio 4 frames */ 128 u64 rx_ppp5; /* # of received PPP prio 5 frames */ 129 u64 rx_ppp6; /* # of received PPP prio 6 frames */ 130 u64 rx_ppp7; /* # of received PPP prio 7 frames */ 131 132 u64 rx_ovflow0; /* drops due to buffer-group 0 overflows */ 133 u64 rx_ovflow1; /* drops due to buffer-group 1 overflows */ 134 u64 rx_ovflow2; /* drops due to buffer-group 2 overflows */ 135 u64 rx_ovflow3; /* drops due to buffer-group 3 overflows */ 136 u64 rx_trunc0; /* buffer-group 0 truncated packets */ 137 u64 rx_trunc1; /* buffer-group 1 truncated packets */ 138 u64 rx_trunc2; /* buffer-group 2 truncated packets */ 139 u64 rx_trunc3; /* buffer-group 3 truncated packets */ 140 }; 141 142 struct lb_port_stats { 143 u64 octets; 144 u64 frames; 145 u64 bcast_frames; 146 u64 mcast_frames; 147 u64 ucast_frames; 148 u64 error_frames; 149 150 u64 frames_64; 151 u64 frames_65_127; 152 u64 frames_128_255; 153 u64 frames_256_511; 154 u64 frames_512_1023; 155 u64 frames_1024_1518; 156 u64 frames_1519_max; 157 158 u64 drop; 159 160 u64 ovflow0; 161 u64 ovflow1; 162 u64 ovflow2; 163 u64 ovflow3; 164 u64 trunc0; 165 u64 trunc1; 166 u64 trunc2; 167 u64 trunc3; 168 }; 169 170 struct tp_tcp_stats { 171 u32 tcpOutRsts; 172 u64 tcpInSegs; 173 u64 tcpOutSegs; 174 u64 tcpRetransSegs; 175 }; 176 177 struct tp_usm_stats { 178 u32 frames; 179 u32 drops; 180 u64 octets; 181 }; 182 183 struct tp_fcoe_stats { 184 u32 framesDDP; 185 u32 framesDrop; 186 u64 octetsDDP; 187 }; 188 189 struct tp_err_stats { 190 u32 macInErrs[4]; 191 u32 hdrInErrs[4]; 192 u32 tcpInErrs[4]; 193 u32 tnlCongDrops[4]; 194 u32 ofldChanDrops[4]; 195 u32 tnlTxDrops[4]; 196 u32 ofldVlanDrops[4]; 197 u32 tcp6InErrs[4]; 198 u32 ofldNoNeigh; 199 u32 ofldCongDefer; 200 }; 201 202 struct tp_proxy_stats { 203 u32 proxy[4]; 204 }; 205 206 struct tp_cpl_stats { 207 u32 req[4]; 208 u32 rsp[4]; 209 }; 210 211 struct tp_rdma_stats { 212 u32 rqe_dfr_mod; 213 u32 rqe_dfr_pkt; 214 }; 215 216 struct tp_params { 217 unsigned int ntxchan; /* # of Tx channels */ 218 unsigned int tre; /* log2 of core clocks per TP tick */ 219 unsigned int dack_re; /* DACK timer resolution */ 220 unsigned int la_mask; /* what events are recorded by TP LA */ 221 unsigned short tx_modq[NCHAN]; /* channel to modulation queue map */ 222 uint32_t vlan_pri_map; 223 uint32_t ingress_config; 224 int8_t vlan_shift; 225 int8_t vnic_shift; 226 int8_t port_shift; 227 int8_t protocol_shift; 228 }; 229 230 struct vpd_params { 231 unsigned int cclk; 232 u8 ec[EC_LEN + 1]; 233 u8 sn[SERNUM_LEN + 1]; 234 u8 id[ID_LEN + 1]; 235 u8 pn[PN_LEN + 1]; 236 u8 na[MACADDR_LEN + 1]; 237 }; 238 239 struct pci_params { 240 unsigned int vpd_cap_addr; 241 unsigned short speed; 242 unsigned short width; 243 }; 244 245 /* 246 * Firmware device log. 247 */ 248 struct devlog_params { 249 u32 memtype; /* which memory (EDC0, EDC1, MC) */ 250 u32 start; /* start of log in firmware memory */ 251 u32 size; /* size of log */ 252 }; 253 254 struct adapter_params { 255 struct tp_params tp; 256 struct vpd_params vpd; 257 struct pci_params pci; 258 struct devlog_params devlog; 259 260 unsigned int sf_size; /* serial flash size in bytes */ 261 unsigned int sf_nsec; /* # of flash sectors */ 262 263 unsigned int fw_vers; 264 unsigned int tp_vers; 265 266 unsigned short mtus[NMTUS]; 267 unsigned short a_wnd[NCCTRL_WIN]; 268 unsigned short b_wnd[NCCTRL_WIN]; 269 270 unsigned int mc_size; /* MC memory size */ 271 unsigned int nfilters; /* size of filter region */ 272 273 unsigned int cim_la_size; 274 275 uint8_t nports; /* # of ethernet ports */ 276 uint8_t portvec; 277 unsigned int chipid:4; /* chip ID. T4 = 4, T5 = 5, ... */ 278 unsigned int rev:4; /* chip revision */ 279 unsigned int fpga:1; /* this is an FPGA */ 280 unsigned int offload:1; /* hw is TOE capable, fw has divvied up card 281 resources for TOE operation. */ 282 unsigned int bypass:1; /* this is a bypass card */ 283 284 unsigned int ofldq_wr_cred; 285 }; 286 287 #define CHELSIO_T4 0x4 288 #define CHELSIO_T5 0x5 289 290 struct trace_params { 291 u32 data[TRACE_LEN / 4]; 292 u32 mask[TRACE_LEN / 4]; 293 unsigned short snap_len; 294 unsigned short min_len; 295 unsigned char skip_ofst; 296 unsigned char skip_len; 297 unsigned char invert; 298 unsigned char port; 299 }; 300 301 struct link_config { 302 unsigned short supported; /* link capabilities */ 303 unsigned short advertising; /* advertised capabilities */ 304 unsigned short requested_speed; /* speed user has requested */ 305 unsigned short speed; /* actual link speed */ 306 unsigned char requested_fc; /* flow control user has requested */ 307 unsigned char fc; /* actual link flow control */ 308 unsigned char autoneg; /* autonegotiating? */ 309 unsigned char link_ok; /* link up? */ 310 }; 311 312 #include "adapter.h" 313 314 #ifndef PCI_VENDOR_ID_CHELSIO 315 # define PCI_VENDOR_ID_CHELSIO 0x1425 316 #endif 317 318 #define for_each_port(adapter, iter) \ 319 for (iter = 0; iter < (adapter)->params.nports; ++iter) 320 321 static inline int is_offload(const struct adapter *adap) 322 { 323 return adap->params.offload; 324 } 325 326 static inline int chip_id(struct adapter *adap) 327 { 328 return adap->params.chipid; 329 } 330 331 static inline int chip_rev(struct adapter *adap) 332 { 333 return adap->params.rev; 334 } 335 336 static inline int is_t4(struct adapter *adap) 337 { 338 return adap->params.chipid == CHELSIO_T4; 339 } 340 341 static inline int is_t5(struct adapter *adap) 342 { 343 return adap->params.chipid == CHELSIO_T5; 344 } 345 346 static inline int is_fpga(struct adapter *adap) 347 { 348 return adap->params.fpga; 349 } 350 351 static inline unsigned int core_ticks_per_usec(const struct adapter *adap) 352 { 353 return adap->params.vpd.cclk / 1000; 354 } 355 356 static inline unsigned int us_to_core_ticks(const struct adapter *adap, 357 unsigned int us) 358 { 359 return (us * adap->params.vpd.cclk) / 1000; 360 } 361 362 static inline unsigned int dack_ticks_to_usec(const struct adapter *adap, 363 unsigned int ticks) 364 { 365 return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap); 366 } 367 368 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val); 369 int t4_wait_op_done_val(struct adapter *adapter, int reg, u32 mask, int polarity, 370 int attempts, int delay, u32 *valp); 371 372 static inline int t4_wait_op_done(struct adapter *adapter, int reg, u32 mask, 373 int polarity, int attempts, int delay) 374 { 375 return t4_wait_op_done_val(adapter, reg, mask, polarity, attempts, 376 delay, NULL); 377 } 378 379 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size, 380 void *rpl, bool sleep_ok); 381 382 static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd, 383 int size, void *rpl) 384 { 385 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true); 386 } 387 388 static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd, 389 int size, void *rpl) 390 { 391 return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false); 392 } 393 394 void t4_read_indirect(struct adapter *adap, unsigned int addr_reg, 395 unsigned int data_reg, u32 *vals, unsigned int nregs, 396 unsigned int start_idx); 397 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg, 398 unsigned int data_reg, const u32 *vals, 399 unsigned int nregs, unsigned int start_idx); 400 401 u32 t4_hw_pci_read_cfg4(adapter_t *adapter, int reg); 402 403 struct fw_filter_wr; 404 405 void t4_intr_enable(struct adapter *adapter); 406 void t4_intr_disable(struct adapter *adapter); 407 void t4_intr_clear(struct adapter *adapter); 408 int t4_slow_intr_handler(struct adapter *adapter); 409 410 int t4_hash_mac_addr(const u8 *addr); 411 int t4_link_start(struct adapter *adap, unsigned int mbox, unsigned int port, 412 struct link_config *lc); 413 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port); 414 int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data); 415 int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data); 416 int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz); 417 int t4_seeprom_wp(struct adapter *adapter, int enable); 418 int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords, 419 u32 *data, int byte_oriented); 420 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size); 421 int t4_load_boot(struct adapter *adap, u8 *boot_data, 422 unsigned int boot_addr, unsigned int size); 423 int t4_flash_cfg_addr(struct adapter *adapter); 424 int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size); 425 int t4_get_fw_version(struct adapter *adapter, u32 *vers); 426 int t4_get_tp_version(struct adapter *adapter, u32 *vers); 427 int t4_check_fw_version(struct adapter *adapter); 428 int t4_init_hw(struct adapter *adapter, u32 fw_params); 429 int t4_prep_adapter(struct adapter *adapter); 430 int t4_init_tp_params(struct adapter *adap); 431 int t4_filter_field_shift(const struct adapter *adap, int filter_sel); 432 int t4_port_init(struct port_info *p, int mbox, int pf, int vf); 433 int t4_reinit_adapter(struct adapter *adap); 434 void t4_fatal_err(struct adapter *adapter); 435 int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp, 436 int filter_index, int enable); 437 void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp, 438 int filter_index, int *enabled); 439 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid, 440 int start, int n, const u16 *rspq, unsigned int nrspq); 441 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode, 442 unsigned int flags); 443 int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid, 444 unsigned int flags, unsigned int defq); 445 int t4_read_rss(struct adapter *adapter, u16 *entries); 446 void t4_read_rss_key(struct adapter *adapter, u32 *key); 447 void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx); 448 void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index, u32 *valp); 449 void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index, u32 val); 450 void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index, 451 u32 *vfl, u32 *vfh); 452 void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index, 453 u32 vfl, u32 vfh); 454 u32 t4_read_rss_pf_map(struct adapter *adapter); 455 void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap); 456 u32 t4_read_rss_pf_mask(struct adapter *adapter); 457 void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask); 458 int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask); 459 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 460 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]); 461 void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres); 462 int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 463 int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n); 464 int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n, 465 unsigned int *valp); 466 int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n, 467 const unsigned int *valp); 468 int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n, 469 unsigned int *valp); 470 int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr); 471 void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp, 472 unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr); 473 void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp); 474 int t4_mc_read(struct adapter *adap, int idx, u32 addr, 475 __be32 *data, u64 *parity); 476 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity); 477 int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size, 478 __be32 *data); 479 480 void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p); 481 void t4_get_port_stats_offset(struct adapter *adap, int idx, 482 struct port_stats *stats, 483 struct port_stats *offset); 484 void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p); 485 void t4_clr_port_stats(struct adapter *adap, int idx); 486 487 void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log); 488 void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]); 489 void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]); 490 void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps, 491 unsigned int *ipg); 492 void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr, 493 unsigned int mask, unsigned int val); 494 void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr); 495 void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st); 496 void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st); 497 void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st); 498 void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st); 499 void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st); 500 void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4, 501 struct tp_tcp_stats *v6); 502 void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx, 503 struct tp_fcoe_stats *st); 504 void t4_load_mtus(struct adapter *adap, const unsigned short *mtus, 505 const unsigned short *alpha, const unsigned short *beta); 506 507 void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf); 508 509 int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps); 510 int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg); 511 int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals, 512 unsigned int start, unsigned int n); 513 void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate); 514 int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map); 515 void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid); 516 517 void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr); 518 int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map, 519 u64 mask0, u64 mask1, unsigned int crc, bool enable); 520 521 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox, 522 enum dev_master master, enum dev_state *state); 523 int t4_fw_bye(struct adapter *adap, unsigned int mbox); 524 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset); 525 int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force); 526 int t4_fw_restart(struct adapter *adap, unsigned int mbox, int reset); 527 int t4_fw_upgrade(struct adapter *adap, unsigned int mbox, 528 const u8 *fw_data, unsigned int size, int force); 529 int t4_fw_initialize(struct adapter *adap, unsigned int mbox); 530 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 531 unsigned int vf, unsigned int nparams, const u32 *params, 532 u32 *val); 533 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf, 534 unsigned int vf, unsigned int nparams, const u32 *params, 535 const u32 *val); 536 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf, 537 unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl, 538 unsigned int rxqi, unsigned int rxq, unsigned int tc, 539 unsigned int vi, unsigned int cmask, unsigned int pmask, 540 unsigned int exactf, unsigned int rcaps, unsigned int wxcaps); 541 int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox, 542 unsigned int port, unsigned int pf, unsigned int vf, 543 unsigned int nmac, u8 *mac, unsigned int *rss_size, 544 unsigned int portfunc, unsigned int idstype); 545 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port, 546 unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac, 547 unsigned int *rss_size); 548 int t4_free_vi(struct adapter *adap, unsigned int mbox, 549 unsigned int pf, unsigned int vf, 550 unsigned int viid); 551 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid, 552 int mtu, int promisc, int all_multi, int bcast, int vlanex, 553 bool sleep_ok); 554 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid, 555 bool free, unsigned int naddr, const u8 **addr, u16 *idx, 556 u64 *hash, bool sleep_ok); 557 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid, 558 int idx, const u8 *addr, bool persist, bool add_smt); 559 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid, 560 bool ucast, u64 vec, bool sleep_ok); 561 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid, 562 bool rx_en, bool tx_en); 563 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, 564 unsigned int nblinks); 565 int t4_i2c_rd(struct adapter *adap, unsigned int mbox, unsigned int port_id, 566 u8 dev_addr, u8 offset, u8 *valp); 567 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 568 unsigned int mmd, unsigned int reg, unsigned int *valp); 569 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr, 570 unsigned int mmd, unsigned int reg, unsigned int val); 571 int t4_iq_start_stop(struct adapter *adap, unsigned int mbox, bool start, 572 unsigned int pf, unsigned int vf, unsigned int iqid, 573 unsigned int fl0id, unsigned int fl1id); 574 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 575 unsigned int vf, unsigned int iqtype, unsigned int iqid, 576 unsigned int fl0id, unsigned int fl1id); 577 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 578 unsigned int vf, unsigned int eqid); 579 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 580 unsigned int vf, unsigned int eqid); 581 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf, 582 unsigned int vf, unsigned int eqid); 583 int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid, 584 enum ctxt_type ctype, u32 *data); 585 int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype, 586 u32 *data); 587 int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox); 588 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl); 589 int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val); 590 #endif /* __CHELSIO_COMMON_H */ 591