xref: /freebsd/sys/dev/cxgbe/common/common.h (revision 06e20d1babecec1f45ffda513f55a8db5f1c0f56)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2011 Chelsio Communications, Inc.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26  * SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  *
30  */
31 
32 #ifndef __CHELSIO_COMMON_H
33 #define __CHELSIO_COMMON_H
34 
35 #include "t4_hw.h"
36 
37 enum {
38 	MAX_NPORTS     = 4,     /* max # of ports */
39 	SERNUM_LEN     = 24,    /* Serial # length */
40 	EC_LEN         = 16,    /* E/C length */
41 	ID_LEN         = 16,    /* ID length */
42 	PN_LEN         = 16,    /* Part Number length */
43 	MD_LEN         = 16,    /* MFG diags version length */
44 	MACADDR_LEN    = 12,    /* MAC Address length */
45 };
46 
47 enum {
48 	T4_REGMAP_SIZE = (160 * 1024),
49 	T5_REGMAP_SIZE = (332 * 1024),
50 };
51 
52 enum { MEM_EDC0, MEM_EDC1, MEM_MC, MEM_MC0 = MEM_MC, MEM_MC1 };
53 
54 enum dev_master { MASTER_CANT, MASTER_MAY, MASTER_MUST };
55 
56 enum dev_state { DEV_STATE_UNINIT, DEV_STATE_INIT, DEV_STATE_ERR };
57 
58 enum {
59 	PAUSE_RX      = 1 << 0,
60 	PAUSE_TX      = 1 << 1,
61 	PAUSE_AUTONEG = 1 << 2
62 };
63 
64 enum {
65 	/*
66 	 * Real FECs.  In the same order as the FEC portion of caps32 so that
67 	 * the code can do (fec & M_FW_PORT_CAP32_FEC) to get all the real FECs.
68 	 */
69 	FEC_RS        = 1 << 0,	/* Reed-Solomon */
70 	FEC_BASER_RS  = 1 << 1,	/* BASE-R, aka Firecode */
71 	FEC_NONE      = 1 << 2,	/* no FEC */
72 
73 	/*
74 	 * Pseudo FECs that translate to real FECs.  The firmware knows nothing
75 	 * about these and they start at M_FW_PORT_CAP32_FEC + 1.  AUTO should
76 	 * be set all by itself.
77 	 */
78 	FEC_AUTO      = 1 << 5,
79 	FEC_MODULE    = 1 << 6,	/* FEC suggested by the cable/transceiver. */
80 };
81 
82 enum t4_bar2_qtype { T4_BAR2_QTYPE_EGRESS, T4_BAR2_QTYPE_INGRESS };
83 
84 struct port_stats {
85 	u64 tx_octets;            /* total # of octets in good frames */
86 	u64 tx_frames;            /* all good frames */
87 	u64 tx_bcast_frames;      /* all broadcast frames */
88 	u64 tx_mcast_frames;      /* all multicast frames */
89 	u64 tx_ucast_frames;      /* all unicast frames */
90 	u64 tx_error_frames;      /* all error frames */
91 
92 	u64 tx_frames_64;         /* # of Tx frames in a particular range */
93 	u64 tx_frames_65_127;
94 	u64 tx_frames_128_255;
95 	u64 tx_frames_256_511;
96 	u64 tx_frames_512_1023;
97 	u64 tx_frames_1024_1518;
98 	u64 tx_frames_1519_max;
99 
100 	u64 tx_drop;              /* # of dropped Tx frames */
101 	u64 tx_pause;             /* # of transmitted pause frames */
102 	u64 tx_ppp0;              /* # of transmitted PPP prio 0 frames */
103 	u64 tx_ppp1;              /* # of transmitted PPP prio 1 frames */
104 	u64 tx_ppp2;              /* # of transmitted PPP prio 2 frames */
105 	u64 tx_ppp3;              /* # of transmitted PPP prio 3 frames */
106 	u64 tx_ppp4;              /* # of transmitted PPP prio 4 frames */
107 	u64 tx_ppp5;              /* # of transmitted PPP prio 5 frames */
108 	u64 tx_ppp6;              /* # of transmitted PPP prio 6 frames */
109 	u64 tx_ppp7;              /* # of transmitted PPP prio 7 frames */
110 
111 	u64 rx_octets;            /* total # of octets in good frames */
112 	u64 rx_frames;            /* all good frames */
113 	u64 rx_bcast_frames;      /* all broadcast frames */
114 	u64 rx_mcast_frames;      /* all multicast frames */
115 	u64 rx_ucast_frames;      /* all unicast frames */
116 	u64 rx_too_long;          /* # of frames exceeding MTU */
117 	u64 rx_jabber;            /* # of jabber frames */
118 	u64 rx_fcs_err;           /* # of received frames with bad FCS */
119 	u64 rx_len_err;           /* # of received frames with length error */
120 	u64 rx_symbol_err;        /* symbol errors */
121 	u64 rx_runt;              /* # of short frames */
122 
123 	u64 rx_frames_64;         /* # of Rx frames in a particular range */
124 	u64 rx_frames_65_127;
125 	u64 rx_frames_128_255;
126 	u64 rx_frames_256_511;
127 	u64 rx_frames_512_1023;
128 	u64 rx_frames_1024_1518;
129 	u64 rx_frames_1519_max;
130 
131 	u64 rx_pause;             /* # of received pause frames */
132 	u64 rx_ppp0;              /* # of received PPP prio 0 frames */
133 	u64 rx_ppp1;              /* # of received PPP prio 1 frames */
134 	u64 rx_ppp2;              /* # of received PPP prio 2 frames */
135 	u64 rx_ppp3;              /* # of received PPP prio 3 frames */
136 	u64 rx_ppp4;              /* # of received PPP prio 4 frames */
137 	u64 rx_ppp5;              /* # of received PPP prio 5 frames */
138 	u64 rx_ppp6;              /* # of received PPP prio 6 frames */
139 	u64 rx_ppp7;              /* # of received PPP prio 7 frames */
140 
141 	u64 rx_ovflow0;           /* drops due to buffer-group 0 overflows */
142 	u64 rx_ovflow1;           /* drops due to buffer-group 1 overflows */
143 	u64 rx_ovflow2;           /* drops due to buffer-group 2 overflows */
144 	u64 rx_ovflow3;           /* drops due to buffer-group 3 overflows */
145 	u64 rx_trunc0;            /* buffer-group 0 truncated packets */
146 	u64 rx_trunc1;            /* buffer-group 1 truncated packets */
147 	u64 rx_trunc2;            /* buffer-group 2 truncated packets */
148 	u64 rx_trunc3;            /* buffer-group 3 truncated packets */
149 };
150 
151 struct lb_port_stats {
152 	u64 octets;
153 	u64 frames;
154 	u64 bcast_frames;
155 	u64 mcast_frames;
156 	u64 ucast_frames;
157 	u64 error_frames;
158 
159 	u64 frames_64;
160 	u64 frames_65_127;
161 	u64 frames_128_255;
162 	u64 frames_256_511;
163 	u64 frames_512_1023;
164 	u64 frames_1024_1518;
165 	u64 frames_1519_max;
166 
167 	u64 drop;
168 
169 	u64 ovflow0;
170 	u64 ovflow1;
171 	u64 ovflow2;
172 	u64 ovflow3;
173 	u64 trunc0;
174 	u64 trunc1;
175 	u64 trunc2;
176 	u64 trunc3;
177 };
178 
179 struct tp_tcp_stats {
180 	u32 tcp_out_rsts;
181 	u64 tcp_in_segs;
182 	u64 tcp_out_segs;
183 	u64 tcp_retrans_segs;
184 };
185 
186 struct tp_usm_stats {
187 	u32 frames;
188 	u32 drops;
189 	u64 octets;
190 };
191 
192 struct tp_fcoe_stats {
193 	u32 frames_ddp;
194 	u32 frames_drop;
195 	u64 octets_ddp;
196 };
197 
198 struct tp_err_stats {
199 	u32 mac_in_errs[MAX_NCHAN];
200 	u32 hdr_in_errs[MAX_NCHAN];
201 	u32 tcp_in_errs[MAX_NCHAN];
202 	u32 tnl_cong_drops[MAX_NCHAN];
203 	u32 ofld_chan_drops[MAX_NCHAN];
204 	u32 tnl_tx_drops[MAX_NCHAN];
205 	u32 ofld_vlan_drops[MAX_NCHAN];
206 	u32 tcp6_in_errs[MAX_NCHAN];
207 	u32 ofld_no_neigh;
208 	u32 ofld_cong_defer;
209 };
210 
211 struct tp_proxy_stats {
212 	u32 proxy[MAX_NCHAN];
213 };
214 
215 struct tp_cpl_stats {
216 	u32 req[MAX_NCHAN];
217 	u32 rsp[MAX_NCHAN];
218 };
219 
220 struct tp_rdma_stats {
221 	u32 rqe_dfr_pkt;
222 	u32 rqe_dfr_mod;
223 };
224 
225 struct sge_params {
226 	int timer_val[SGE_NTIMERS];	/* final, scaled values */
227 	int counter_val[SGE_NCOUNTERS];
228 	int fl_starve_threshold;
229 	int fl_starve_threshold2;
230 	int page_shift;
231 	int eq_s_qpp;
232 	int iq_s_qpp;
233 	int spg_len;
234 	int pad_boundary;
235 	int pack_boundary;
236 	int fl_pktshift;
237 	u32 sge_control;
238 	u32 sge_fl_buffer_size[SGE_FLBUF_SIZES];
239 };
240 
241 struct tp_params {
242 	unsigned int tre;            /* log2 of core clocks per TP tick */
243 	unsigned int dack_re;        /* DACK timer resolution */
244 	unsigned int la_mask;        /* what events are recorded by TP LA */
245 	unsigned short tx_modq[MAX_NCHAN];  /* channel to modulation queue map */
246 
247 	uint32_t vlan_pri_map;
248 	uint32_t ingress_config;
249 	uint32_t max_rx_pdu;
250 	uint32_t max_tx_pdu;
251 	uint64_t hash_filter_mask;
252 	__be16 err_vec_mask;
253 
254 	int8_t fcoe_shift;
255 	int8_t port_shift;
256 	int8_t vnic_shift;
257 	int8_t vlan_shift;
258 	int8_t tos_shift;
259 	int8_t protocol_shift;
260 	int8_t ethertype_shift;
261 	int8_t macmatch_shift;
262 	int8_t matchtype_shift;
263 	int8_t frag_shift;
264 };
265 
266 struct vpd_params {
267 	unsigned int cclk;
268 	u8 ec[EC_LEN + 1];
269 	u8 sn[SERNUM_LEN + 1];
270 	u8 id[ID_LEN + 1];
271 	u8 pn[PN_LEN + 1];
272 	u8 na[MACADDR_LEN + 1];
273 	u8 md[MD_LEN + 1];
274 };
275 
276 struct pci_params {
277 	unsigned int vpd_cap_addr;
278 	unsigned int mps;
279 	unsigned short speed;
280 	unsigned short width;
281 };
282 
283 /*
284  * Firmware device log.
285  */
286 struct devlog_params {
287 	u32 memtype;			/* which memory (FW_MEMTYPE_* ) */
288 	u32 start;			/* start of log in firmware memory */
289 	u32 size;			/* size of log */
290 	u32 addr;			/* start address in flat addr space */
291 };
292 
293 /* Stores chip specific parameters */
294 struct chip_params {
295 	u8 nchan;
296 	u8 pm_stats_cnt;
297 	u8 cng_ch_bits_log;		/* congestion channel map bits width */
298 	u8 nsched_cls;
299 	u8 cim_num_obq;
300 	u16 mps_rplc_size;
301 	u16 vfcount;
302 	u32 sge_fl_db;
303 	u16 mps_tcam_size;
304 	u16 rss_nentries;
305 };
306 
307 /* VF-only parameters. */
308 
309 /*
310  * Global Receive Side Scaling (RSS) parameters in host-native format.
311  */
312 struct rss_params {
313 	unsigned int mode;		/* RSS mode */
314 	union {
315 	    struct {
316 		u_int synmapen:1;	/* SYN Map Enable */
317 		u_int syn4tupenipv6:1;	/* enable hashing 4-tuple IPv6 SYNs */
318 		u_int syn2tupenipv6:1;	/* enable hashing 2-tuple IPv6 SYNs */
319 		u_int syn4tupenipv4:1;	/* enable hashing 4-tuple IPv4 SYNs */
320 		u_int syn2tupenipv4:1;	/* enable hashing 2-tuple IPv4 SYNs */
321 		u_int ofdmapen:1;	/* Offload Map Enable */
322 		u_int tnlmapen:1;	/* Tunnel Map Enable */
323 		u_int tnlalllookup:1;	/* Tunnel All Lookup */
324 		u_int hashtoeplitz:1;	/* use Toeplitz hash */
325 	    } basicvirtual;
326 	} u;
327 };
328 
329 /*
330  * Maximum resources provisioned for a PCI VF.
331  */
332 struct vf_resources {
333 	unsigned int nvi;		/* N virtual interfaces */
334 	unsigned int neq;		/* N egress Qs */
335 	unsigned int nethctrl;		/* N egress ETH or CTRL Qs */
336 	unsigned int niqflint;		/* N ingress Qs/w free list(s) & intr */
337 	unsigned int niq;		/* N ingress Qs */
338 	unsigned int tc;		/* PCI-E traffic class */
339 	unsigned int pmask;		/* port access rights mask */
340 	unsigned int nexactf;		/* N exact MPS filters */
341 	unsigned int r_caps;		/* read capabilities */
342 	unsigned int wx_caps;		/* write/execute capabilities */
343 };
344 
345 struct adapter_params {
346 	struct sge_params sge;
347 	struct tp_params  tp;		/* PF-only */
348 	struct vpd_params vpd;
349 	struct pci_params pci;
350 	struct devlog_params devlog;	/* PF-only */
351 	struct rss_params rss;		/* VF-only */
352 	struct vf_resources vfres;	/* VF-only */
353 	unsigned int core_vdd;
354 
355 	unsigned int sf_size;             /* serial flash size in bytes */
356 	unsigned int sf_nsec;             /* # of flash sectors */
357 
358 	unsigned int fw_vers;		/* firmware version */
359 	unsigned int bs_vers;		/* bootstrap version */
360 	unsigned int tp_vers;		/* TP microcode version */
361 	unsigned int er_vers;		/* expansion ROM version */
362 	unsigned int scfg_vers;		/* Serial Configuration version */
363 	unsigned int vpd_vers;		/* VPD version */
364 
365 	unsigned short mtus[NMTUS];
366 	unsigned short a_wnd[NCCTRL_WIN];
367 	unsigned short b_wnd[NCCTRL_WIN];
368 
369 	unsigned int cim_la_size;
370 
371 	uint8_t nports;		/* # of ethernet ports */
372 	uint8_t portvec;
373 	unsigned int chipid:4;	/* chip ID.  T4 = 4, T5 = 5, ... */
374 	unsigned int rev:4;	/* chip revision */
375 	unsigned int fpga:1;	/* this is an FPGA */
376 	unsigned int offload:1;	/* hw is TOE capable, fw has divvied up card
377 				   resources for TOE operation. */
378 	unsigned int bypass:1;	/* this is a bypass card */
379 	unsigned int ethoffload:1;
380 	unsigned int hash_filter:1;
381 	unsigned int filter2_wr_support:1;
382 	unsigned int port_caps32:1;
383 	unsigned int smac_add_support:1;
384 
385 	unsigned int ofldq_wr_cred;
386 	unsigned int eo_wr_cred;
387 
388 	unsigned int max_ordird_qp;
389 	unsigned int max_ird_adapter;
390 
391 	uint32_t mps_bg_map;	/* rx buffer group map for all ports (upto 4) */
392 
393 	bool ulptx_memwrite_dsgl;	/* use of T5 DSGL allowed */
394 	bool fr_nsmr_tpte_wr_support;	/* FW support for FR_NSMR_TPTE_WR */
395 	bool viid_smt_extn_support;	/* FW returns vin, vfvld & smt index? */
396 	unsigned int max_pkts_per_eth_tx_pkts_wr;
397 };
398 
399 #define CHELSIO_T4		0x4
400 #define CHELSIO_T5		0x5
401 #define CHELSIO_T6		0x6
402 
403 /*
404  * State needed to monitor the forward progress of SGE Ingress DMA activities
405  * and possible hangs.
406  */
407 struct sge_idma_monitor_state {
408 	unsigned int idma_1s_thresh;	/* 1s threshold in Core Clock ticks */
409 	unsigned int idma_stalled[2];	/* synthesized stalled timers in HZ */
410 	unsigned int idma_state[2];	/* IDMA Hang detect state */
411 	unsigned int idma_qid[2];	/* IDMA Hung Ingress Queue ID */
412 	unsigned int idma_warn[2];	/* time to warning in HZ */
413 };
414 
415 struct trace_params {
416 	u32 data[TRACE_LEN / 4];
417 	u32 mask[TRACE_LEN / 4];
418 	unsigned short snap_len;
419 	unsigned short min_len;
420 	unsigned char skip_ofst;
421 	unsigned char skip_len;
422 	unsigned char invert;
423 	unsigned char port;
424 };
425 
426 struct link_config {
427 	/* OS-specific code owns all the requested_* fields. */
428 	int8_t requested_aneg;	/* link autonegotiation */
429 	int8_t requested_fc;	/* flow control */
430 	int8_t requested_fec;	/* FEC */
431 	u_int requested_speed;	/* speed (Mbps) */
432 
433 	uint32_t pcaps;		/* link capabilities */
434 	uint32_t acaps;		/* advertised capabilities */
435 	uint32_t lpacaps;	/* peer advertised capabilities */
436 	u_int speed;		/* actual link speed (Mbps) */
437 	int8_t fc;		/* actual link flow control */
438 	int8_t fec_hint;	/* cable/transceiver recommended fec */
439 	int8_t fec;		/* actual FEC */
440 	bool link_ok;		/* link up? */
441 	uint8_t link_down_rc;	/* link down reason */
442 };
443 
444 #include "adapter.h"
445 
446 #ifndef PCI_VENDOR_ID_CHELSIO
447 # define PCI_VENDOR_ID_CHELSIO 0x1425
448 #endif
449 
450 #define for_each_port(adapter, iter) \
451 	for (iter = 0; iter < (adapter)->params.nports; ++iter)
452 
453 static inline int is_ftid(const struct adapter *sc, u_int tid)
454 {
455 
456 	return (sc->tids.nftids > 0 && tid >= sc->tids.ftid_base &&
457 	    tid <= sc->tids.ftid_end);
458 }
459 
460 static inline int is_hpftid(const struct adapter *sc, u_int tid)
461 {
462 
463 	return (sc->tids.nhpftids > 0 && tid >= sc->tids.hpftid_base &&
464 	    tid <= sc->tids.hpftid_end);
465 }
466 
467 static inline int is_etid(const struct adapter *sc, u_int tid)
468 {
469 
470 	return (sc->tids.netids > 0 && tid >= sc->tids.etid_base &&
471 	    tid <= sc->tids.etid_end);
472 }
473 
474 static inline int is_offload(const struct adapter *adap)
475 {
476 	return adap->params.offload;
477 }
478 
479 static inline int is_ethoffload(const struct adapter *adap)
480 {
481 	return adap->params.ethoffload;
482 }
483 
484 static inline int is_hashfilter(const struct adapter *adap)
485 {
486 	return adap->params.hash_filter;
487 }
488 
489 static inline int chip_id(struct adapter *adap)
490 {
491 	return adap->params.chipid;
492 }
493 
494 static inline int chip_rev(struct adapter *adap)
495 {
496 	return adap->params.rev;
497 }
498 
499 static inline int is_t4(struct adapter *adap)
500 {
501 	return adap->params.chipid == CHELSIO_T4;
502 }
503 
504 static inline int is_t5(struct adapter *adap)
505 {
506 	return adap->params.chipid == CHELSIO_T5;
507 }
508 
509 static inline int is_t6(struct adapter *adap)
510 {
511 	return adap->params.chipid == CHELSIO_T6;
512 }
513 
514 static inline int is_fpga(struct adapter *adap)
515 {
516 	 return adap->params.fpga;
517 }
518 
519 static inline unsigned int core_ticks_per_usec(const struct adapter *adap)
520 {
521 	return adap->params.vpd.cclk / 1000;
522 }
523 
524 static inline unsigned int us_to_core_ticks(const struct adapter *adap,
525 					    unsigned int us)
526 {
527 	return (us * adap->params.vpd.cclk) / 1000;
528 }
529 
530 static inline unsigned int core_ticks_to_us(const struct adapter *adapter,
531 					    unsigned int ticks)
532 {
533 	/* add Core Clock / 2 to round ticks to nearest uS */
534 	return ((ticks * 1000 + adapter->params.vpd.cclk/2) /
535 		adapter->params.vpd.cclk);
536 }
537 
538 static inline unsigned int dack_ticks_to_usec(const struct adapter *adap,
539 					      unsigned int ticks)
540 {
541 	return (ticks << adap->params.tp.dack_re) / core_ticks_per_usec(adap);
542 }
543 
544 static inline u_int us_to_tcp_ticks(const struct adapter *adap, u_long us)
545 {
546 
547 	return (us * adap->params.vpd.cclk / 1000 >> adap->params.tp.tre);
548 }
549 
550 static inline u_int tcp_ticks_to_us(const struct adapter *adap, u_int ticks)
551 {
552 	return ((uint64_t)ticks << adap->params.tp.tre) /
553 	    core_ticks_per_usec(adap);
554 }
555 
556 void t4_set_reg_field(struct adapter *adap, unsigned int addr, u32 mask, u32 val);
557 
558 int t4_wr_mbox_meat_timeout(struct adapter *adap, int mbox, const void *cmd,
559 			    int size, void *rpl, bool sleep_ok, int timeout);
560 int t4_wr_mbox_meat(struct adapter *adap, int mbox, const void *cmd, int size,
561 		    void *rpl, bool sleep_ok);
562 
563 static inline int t4_wr_mbox_timeout(struct adapter *adap, int mbox,
564 				     const void *cmd, int size, void *rpl,
565 				     int timeout)
566 {
567 	return t4_wr_mbox_meat_timeout(adap, mbox, cmd, size, rpl, true,
568 				       timeout);
569 }
570 
571 static inline int t4_wr_mbox(struct adapter *adap, int mbox, const void *cmd,
572 			     int size, void *rpl)
573 {
574 	return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, true);
575 }
576 
577 static inline int t4_wr_mbox_ns(struct adapter *adap, int mbox, const void *cmd,
578 				int size, void *rpl)
579 {
580 	return t4_wr_mbox_meat(adap, mbox, cmd, size, rpl, false);
581 }
582 
583 void t4_read_indirect(struct adapter *adap, unsigned int addr_reg,
584 		      unsigned int data_reg, u32 *vals, unsigned int nregs,
585 		      unsigned int start_idx);
586 void t4_write_indirect(struct adapter *adap, unsigned int addr_reg,
587 		       unsigned int data_reg, const u32 *vals,
588 		       unsigned int nregs, unsigned int start_idx);
589 
590 u32 t4_hw_pci_read_cfg4(adapter_t *adapter, int reg);
591 
592 struct fw_filter_wr;
593 
594 void t4_intr_enable(struct adapter *adapter);
595 void t4_intr_disable(struct adapter *adapter);
596 void t4_intr_clear(struct adapter *adapter);
597 int t4_slow_intr_handler(struct adapter *adapter, bool verbose);
598 
599 int t4_hash_mac_addr(const u8 *addr);
600 int t4_link_l1cfg(struct adapter *adap, unsigned int mbox, unsigned int port,
601 		  struct link_config *lc);
602 int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
603 int t4_seeprom_read(struct adapter *adapter, u32 addr, u32 *data);
604 int t4_seeprom_write(struct adapter *adapter, u32 addr, u32 data);
605 int t4_eeprom_ptov(unsigned int phys_addr, unsigned int fn, unsigned int sz);
606 int t4_seeprom_wp(struct adapter *adapter, int enable);
607 int t4_read_flash(struct adapter *adapter, unsigned int addr, unsigned int nwords,
608 		  u32 *data, int byte_oriented);
609 int t4_write_flash(struct adapter *adapter, unsigned int addr,
610 		   unsigned int n, const u8 *data, int byte_oriented);
611 int t4_load_fw(struct adapter *adapter, const u8 *fw_data, unsigned int size);
612 int t4_fwcache(struct adapter *adap, enum fw_params_param_dev_fwcache op);
613 int t5_fw_init_extern_mem(struct adapter *adap);
614 int t4_load_bootcfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
615 int t4_load_boot(struct adapter *adap, u8 *boot_data,
616                  unsigned int boot_addr, unsigned int size);
617 int t4_flash_erase_sectors(struct adapter *adapter, int start, int end);
618 int t4_flash_cfg_addr(struct adapter *adapter);
619 int t4_load_cfg(struct adapter *adapter, const u8 *cfg_data, unsigned int size);
620 int t4_get_fw_version(struct adapter *adapter, u32 *vers);
621 int t4_get_fw_hdr(struct adapter *adapter, struct fw_hdr *hdr);
622 int t4_get_bs_version(struct adapter *adapter, u32 *vers);
623 int t4_get_tp_version(struct adapter *adapter, u32 *vers);
624 int t4_get_exprom_version(struct adapter *adapter, u32 *vers);
625 int t4_get_scfg_version(struct adapter *adapter, u32 *vers);
626 int t4_get_vpd_version(struct adapter *adapter, u32 *vers);
627 int t4_get_version_info(struct adapter *adapter);
628 int t4_init_hw(struct adapter *adapter, u32 fw_params);
629 const struct chip_params *t4_get_chip_params(int chipid);
630 int t4_prep_adapter(struct adapter *adapter, u32 *buf);
631 int t4_shutdown_adapter(struct adapter *adapter);
632 int t4_init_devlog_params(struct adapter *adapter, int fw_attach);
633 int t4_init_sge_params(struct adapter *adapter);
634 int t4_init_tp_params(struct adapter *adap, bool sleep_ok);
635 int t4_filter_field_shift(const struct adapter *adap, int filter_sel);
636 int t4_port_init(struct adapter *adap, int mbox, int pf, int vf, int port_id);
637 void t4_fatal_err(struct adapter *adapter, bool fw_error);
638 int t4_set_trace_filter(struct adapter *adapter, const struct trace_params *tp,
639 			int filter_index, int enable);
640 void t4_get_trace_filter(struct adapter *adapter, struct trace_params *tp,
641 			 int filter_index, int *enabled);
642 int t4_config_rss_range(struct adapter *adapter, int mbox, unsigned int viid,
643 			int start, int n, const u16 *rspq, unsigned int nrspq);
644 int t4_config_glbl_rss(struct adapter *adapter, int mbox, unsigned int mode,
645 		       unsigned int flags);
646 int t4_config_vi_rss(struct adapter *adapter, int mbox, unsigned int viid,
647 		     unsigned int flags, unsigned int defq, unsigned int skeyidx,
648 		     unsigned int skey);
649 int t4_read_rss(struct adapter *adapter, u16 *entries);
650 void t4_read_rss_key(struct adapter *adapter, u32 *key, bool sleep_ok);
651 void t4_write_rss_key(struct adapter *adap, const u32 *key, int idx,
652 		      bool sleep_ok);
653 void t4_read_rss_pf_config(struct adapter *adapter, unsigned int index,
654 			   u32 *valp, bool sleep_ok);
655 void t4_write_rss_pf_config(struct adapter *adapter, unsigned int index,
656 			    u32 val, bool sleep_ok);
657 void t4_read_rss_vf_config(struct adapter *adapter, unsigned int index,
658 			   u32 *vfl, u32 *vfh, bool sleep_ok);
659 void t4_write_rss_vf_config(struct adapter *adapter, unsigned int index,
660 			    u32 vfl, u32 vfh, bool sleep_ok);
661 u32 t4_read_rss_pf_map(struct adapter *adapter, bool sleep_ok);
662 void t4_write_rss_pf_map(struct adapter *adapter, u32 pfmap, bool sleep_ok);
663 u32 t4_read_rss_pf_mask(struct adapter *adapter, bool sleep_ok);
664 void t4_write_rss_pf_mask(struct adapter *adapter, u32 pfmask, bool sleep_ok);
665 int t4_mps_set_active_ports(struct adapter *adap, unsigned int port_mask);
666 void t4_pmtx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
667 void t4_pmrx_get_stats(struct adapter *adap, u32 cnt[], u64 cycles[]);
668 void t4_read_cimq_cfg(struct adapter *adap, u16 *base, u16 *size, u16 *thres);
669 int t4_read_cim_ibq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
670 int t4_read_cim_obq(struct adapter *adap, unsigned int qid, u32 *data, size_t n);
671 int t4_cim_read(struct adapter *adap, unsigned int addr, unsigned int n,
672 		unsigned int *valp);
673 int t4_cim_write(struct adapter *adap, unsigned int addr, unsigned int n,
674 		 const unsigned int *valp);
675 int t4_cim_ctl_read(struct adapter *adap, unsigned int addr, unsigned int n,
676 		    unsigned int *valp);
677 int t4_cim_read_la(struct adapter *adap, u32 *la_buf, unsigned int *wrptr);
678 void t4_cim_read_pif_la(struct adapter *adap, u32 *pif_req, u32 *pif_rsp,
679 		unsigned int *pif_req_wrptr, unsigned int *pif_rsp_wrptr);
680 void t4_cim_read_ma_la(struct adapter *adap, u32 *ma_req, u32 *ma_rsp);
681 int t4_get_flash_params(struct adapter *adapter);
682 
683 u32 t4_read_pcie_cfg4(struct adapter *adap, int reg, int drv_fw_attach);
684 int t4_mc_read(struct adapter *adap, int idx, u32 addr,
685 	       __be32 *data, u64 *parity);
686 int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *parity);
687 int t4_mem_read(struct adapter *adap, int mtype, u32 addr, u32 size,
688 		__be32 *data);
689 void t4_idma_monitor_init(struct adapter *adapter,
690 			  struct sge_idma_monitor_state *idma);
691 void t4_idma_monitor(struct adapter *adapter,
692 		     struct sge_idma_monitor_state *idma,
693 		     int hz, int ticks);
694 
695 unsigned int t4_get_regs_len(struct adapter *adapter);
696 void t4_get_regs(struct adapter *adap, u8 *buf, size_t buf_size);
697 
698 const char *t4_get_port_type_description(enum fw_port_type port_type);
699 void t4_get_port_stats(struct adapter *adap, int idx, struct port_stats *p);
700 void t4_get_port_stats_offset(struct adapter *adap, int idx,
701 		struct port_stats *stats,
702 		struct port_stats *offset);
703 void t4_get_lb_stats(struct adapter *adap, int idx, struct lb_port_stats *p);
704 void t4_clr_port_stats(struct adapter *adap, int idx);
705 
706 void t4_read_mtu_tbl(struct adapter *adap, u16 *mtus, u8 *mtu_log);
707 void t4_read_cong_tbl(struct adapter *adap, u16 incr[NMTUS][NCCTRL_WIN]);
708 void t4_read_pace_tbl(struct adapter *adap, unsigned int pace_vals[NTX_SCHED]);
709 void t4_get_tx_sched(struct adapter *adap, unsigned int sched, unsigned int *kbps,
710 		     unsigned int *ipg, bool sleep_ok);
711 void t4_tp_wr_bits_indirect(struct adapter *adap, unsigned int addr,
712 			    unsigned int mask, unsigned int val);
713 void t4_tp_read_la(struct adapter *adap, u64 *la_buf, unsigned int *wrptr);
714 void t4_tp_get_err_stats(struct adapter *adap, struct tp_err_stats *st,
715 			 bool sleep_ok);
716 void t4_tp_get_proxy_stats(struct adapter *adap, struct tp_proxy_stats *st,
717     			   bool sleep_ok);
718 void t4_tp_get_cpl_stats(struct adapter *adap, struct tp_cpl_stats *st,
719 			 bool sleep_ok);
720 void t4_tp_get_rdma_stats(struct adapter *adap, struct tp_rdma_stats *st,
721 			  bool sleep_ok);
722 void t4_get_usm_stats(struct adapter *adap, struct tp_usm_stats *st,
723 		      bool sleep_ok);
724 void t4_tp_get_tcp_stats(struct adapter *adap, struct tp_tcp_stats *v4,
725 			 struct tp_tcp_stats *v6, bool sleep_ok);
726 void t4_get_fcoe_stats(struct adapter *adap, unsigned int idx,
727 		       struct tp_fcoe_stats *st, bool sleep_ok);
728 void t4_load_mtus(struct adapter *adap, const unsigned short *mtus,
729 		  const unsigned short *alpha, const unsigned short *beta);
730 
731 void t4_ulprx_read_la(struct adapter *adap, u32 *la_buf);
732 
733 int t4_set_sched_bps(struct adapter *adap, int sched, unsigned int kbps);
734 int t4_set_sched_ipg(struct adapter *adap, int sched, unsigned int ipg);
735 int t4_set_pace_tbl(struct adapter *adap, const unsigned int *pace_vals,
736 		    unsigned int start, unsigned int n);
737 void t4_get_chan_txrate(struct adapter *adap, u64 *nic_rate, u64 *ofld_rate);
738 int t4_set_filter_mode(struct adapter *adap, unsigned int mode_map,
739     bool sleep_ok);
740 void t4_mk_filtdelwr(unsigned int ftid, struct fw_filter_wr *wr, int qid);
741 
742 void t4_wol_magic_enable(struct adapter *adap, unsigned int port, const u8 *addr);
743 int t4_wol_pat_enable(struct adapter *adap, unsigned int port, unsigned int map,
744 		      u64 mask0, u64 mask1, unsigned int crc, bool enable);
745 
746 int t4_fw_hello(struct adapter *adap, unsigned int mbox, unsigned int evt_mbox,
747 		enum dev_master master, enum dev_state *state);
748 int t4_fw_bye(struct adapter *adap, unsigned int mbox);
749 int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset);
750 int t4_fw_halt(struct adapter *adap, unsigned int mbox, int force);
751 int t4_fw_restart(struct adapter *adap, unsigned int mbox);
752 int t4_fw_upgrade(struct adapter *adap, unsigned int mbox,
753 		  const u8 *fw_data, unsigned int size, int force);
754 int t4_fw_initialize(struct adapter *adap, unsigned int mbox);
755 int t4_query_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
756 		    unsigned int vf, unsigned int nparams, const u32 *params,
757 		    u32 *val);
758 int t4_query_params_rw(struct adapter *adap, unsigned int mbox, unsigned int pf,
759 		       unsigned int vf, unsigned int nparams, const u32 *params,
760 		       u32 *val, int rw);
761 int t4_set_params_timeout(struct adapter *adap, unsigned int mbox,
762 			  unsigned int pf, unsigned int vf,
763 			  unsigned int nparams, const u32 *params,
764 			  const u32 *val, int timeout);
765 int t4_set_params(struct adapter *adap, unsigned int mbox, unsigned int pf,
766 		  unsigned int vf, unsigned int nparams, const u32 *params,
767 		  const u32 *val);
768 int t4_cfg_pfvf(struct adapter *adap, unsigned int mbox, unsigned int pf,
769 		unsigned int vf, unsigned int txq, unsigned int txq_eth_ctrl,
770 		unsigned int rxqi, unsigned int rxq, unsigned int tc,
771 		unsigned int vi, unsigned int cmask, unsigned int pmask,
772 		unsigned int exactf, unsigned int rcaps, unsigned int wxcaps);
773 int t4_alloc_vi_func(struct adapter *adap, unsigned int mbox,
774 		     unsigned int port, unsigned int pf, unsigned int vf,
775 		     unsigned int nmac, u8 *mac, u16 *rss_size,
776 		     uint8_t *vfvld, uint16_t *vin,
777 		     unsigned int portfunc, unsigned int idstype);
778 int t4_alloc_vi(struct adapter *adap, unsigned int mbox, unsigned int port,
779 		unsigned int pf, unsigned int vf, unsigned int nmac, u8 *mac,
780 		u16 *rss_size, uint8_t *vfvld, uint16_t *vin);
781 int t4_free_vi(struct adapter *adap, unsigned int mbox,
782 	       unsigned int pf, unsigned int vf,
783 	       unsigned int viid);
784 int t4_set_rxmode(struct adapter *adap, unsigned int mbox, unsigned int viid,
785 		  int mtu, int promisc, int all_multi, int bcast, int vlanex,
786 		  bool sleep_ok);
787 int t4_alloc_mac_filt(struct adapter *adap, unsigned int mbox, unsigned int viid,
788 		      bool free, unsigned int naddr, const u8 **addr, u16 *idx,
789 		      u64 *hash, bool sleep_ok);
790 int t4_free_mac_filt(struct adapter *adap, unsigned int mbox,
791 		      unsigned int viid, unsigned int naddr,
792 		      const u8 **addr, bool sleep_ok);
793 int t4_free_encap_mac_filt(struct adapter *adap, unsigned int viid,
794 			   int idx, bool sleep_ok);
795 int t4_free_raw_mac_filt(struct adapter *adap, unsigned int viid,
796 			 const u8 *addr, const u8 *mask, unsigned int idx,
797 			 u8 lookup_type, u8 port_id, bool sleep_ok);
798 int t4_alloc_raw_mac_filt(struct adapter *adap, unsigned int viid,
799 			  const u8 *addr, const u8 *mask, unsigned int idx,
800 			  u8 lookup_type, u8 port_id, bool sleep_ok);
801 int t4_alloc_encap_mac_filt(struct adapter *adap, unsigned int viid,
802 			    const u8 *addr, const u8 *mask, unsigned int vni,
803 			    unsigned int vni_mask, u8 dip_hit, u8 lookup_type,
804 			    bool sleep_ok);
805 int t4_change_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
806 		  int idx, const u8 *addr, bool persist, uint16_t *smt_idx);
807 int t4_del_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
808 	       const u8 *addr, bool smac);
809 int t4_add_mac(struct adapter *adap, unsigned int mbox, unsigned int viid,
810 	       int idx, const u8 *addr, bool persist, u8 *smt_idx, bool smac);
811 int t4_set_addr_hash(struct adapter *adap, unsigned int mbox, unsigned int viid,
812 		     bool ucast, u64 vec, bool sleep_ok);
813 int t4_enable_vi_params(struct adapter *adap, unsigned int mbox,
814 			unsigned int viid, bool rx_en, bool tx_en, bool dcb_en);
815 int t4_enable_vi(struct adapter *adap, unsigned int mbox, unsigned int viid,
816 		 bool rx_en, bool tx_en);
817 int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid,
818 		     unsigned int nblinks);
819 int t4_mdio_rd(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
820 	       unsigned int mmd, unsigned int reg, unsigned int *valp);
821 int t4_mdio_wr(struct adapter *adap, unsigned int mbox, unsigned int phy_addr,
822 	       unsigned int mmd, unsigned int reg, unsigned int val);
823 int t4_i2c_io(struct adapter *adap, unsigned int mbox,
824 	      int port, unsigned int devid,
825 	      unsigned int offset, unsigned int len,
826 	      u8 *buf, bool write);
827 int t4_i2c_rd(struct adapter *adap, unsigned int mbox,
828 	      int port, unsigned int devid,
829 	      unsigned int offset, unsigned int len,
830 	      u8 *buf);
831 int t4_i2c_wr(struct adapter *adap, unsigned int mbox,
832 	      int port, unsigned int devid,
833 	      unsigned int offset, unsigned int len,
834 	      u8 *buf);
835 int t4_iq_stop(struct adapter *adap, unsigned int mbox, unsigned int pf,
836 	       unsigned int vf, unsigned int iqtype, unsigned int iqid,
837 	       unsigned int fl0id, unsigned int fl1id);
838 int t4_iq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
839 	       unsigned int vf, unsigned int iqtype, unsigned int iqid,
840 	       unsigned int fl0id, unsigned int fl1id);
841 int t4_eth_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
842 		   unsigned int vf, unsigned int eqid);
843 int t4_ctrl_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
844 		    unsigned int vf, unsigned int eqid);
845 int t4_ofld_eq_free(struct adapter *adap, unsigned int mbox, unsigned int pf,
846 		    unsigned int vf, unsigned int eqid);
847 int t4_sge_ctxt_rd(struct adapter *adap, unsigned int mbox, unsigned int cid,
848 		   enum ctxt_type ctype, u32 *data);
849 int t4_sge_ctxt_rd_bd(struct adapter *adap, unsigned int cid, enum ctxt_type ctype,
850 		      u32 *data);
851 int t4_sge_ctxt_flush(struct adapter *adap, unsigned int mbox, int ctxt_type);
852 const char *t4_link_down_rc_str(unsigned char link_down_rc);
853 int t4_update_port_info(struct port_info *pi);
854 int t4_handle_fw_rpl(struct adapter *adap, const __be64 *rpl);
855 int t4_fwaddrspace_write(struct adapter *adap, unsigned int mbox, u32 addr, u32 val);
856 int t4_sched_config(struct adapter *adapter, int type, int minmaxen,
857 		    int sleep_ok);
858 int t4_sched_params(struct adapter *adapter, int type, int level, int mode,
859 		    int rateunit, int ratemode, int channel, int cl,
860 		    int minrate, int maxrate, int weight, int pktsize,
861 		    int burstsize, int sleep_ok);
862 int t4_sched_params_ch_rl(struct adapter *adapter, int channel, int ratemode,
863 			  unsigned int maxrate, int sleep_ok);
864 int t4_sched_params_cl_wrr(struct adapter *adapter, int channel, int cl,
865 			   int weight, int sleep_ok);
866 int t4_sched_params_cl_rl_kbps(struct adapter *adapter, int channel, int cl,
867 			       int mode, unsigned int maxrate, int pktsize,
868 			       int sleep_ok);
869 int t4_config_watchdog(struct adapter *adapter, unsigned int mbox,
870 		       unsigned int pf, unsigned int vf,
871 		       unsigned int timeout, unsigned int action);
872 int t4_get_devlog_level(struct adapter *adapter, unsigned int *level);
873 int t4_set_devlog_level(struct adapter *adapter, unsigned int level);
874 void t4_sge_decode_idma_state(struct adapter *adapter, int state);
875 
876 void t4_tp_pio_read(struct adapter *adap, u32 *buff, u32 nregs,
877 		    u32 start_index, bool sleep_ok);
878 void t4_tp_pio_write(struct adapter *adap, const u32 *buff, u32 nregs,
879 		     u32 start_index, bool sleep_ok);
880 void t4_tp_tm_pio_read(struct adapter *adap, u32 *buff, u32 nregs,
881 		       u32 start_index, bool sleep_ok);
882 void t4_tp_mib_read(struct adapter *adap, u32 *buff, u32 nregs,
883 		    u32 start_index, bool sleep_ok);
884 int t4_configure_ringbb(struct adapter *adap);
885 int t4_configure_add_smac(struct adapter *adap);
886 int t4_set_vlan_acl(struct adapter *adap, unsigned int mbox, unsigned int vf,
887 		    u16 vlan);
888 
889 static inline int t4vf_query_params(struct adapter *adapter,
890 				    unsigned int nparams, const u32 *params,
891 				    u32 *vals)
892 {
893 	return t4_query_params(adapter, 0, 0, 0, nparams, params, vals);
894 }
895 
896 static inline int t4vf_set_params(struct adapter *adapter,
897 				  unsigned int nparams, const u32 *params,
898 				  const u32 *vals)
899 {
900 	return t4_set_params(adapter, 0, 0, 0, nparams, params, vals);
901 }
902 
903 static inline int t4vf_wr_mbox(struct adapter *adap, const void *cmd,
904 			       int size, void *rpl)
905 {
906 	return t4_wr_mbox(adap, adap->mbox, cmd, size, rpl);
907 }
908 
909 int t4vf_wait_dev_ready(struct adapter *adapter);
910 int t4vf_fw_reset(struct adapter *adapter);
911 int t4vf_get_sge_params(struct adapter *adapter);
912 int t4vf_get_rss_glb_config(struct adapter *adapter);
913 int t4vf_get_vfres(struct adapter *adapter);
914 int t4vf_prep_adapter(struct adapter *adapter);
915 int t4_bar2_sge_qregs(struct adapter *adapter, unsigned int qid,
916 		enum t4_bar2_qtype qtype, int user, u64 *pbar2_qoffset,
917 		unsigned int *pbar2_qid);
918 unsigned int fwcap_to_speed(uint32_t caps);
919 uint32_t speed_to_fwcap(unsigned int speed);
920 uint32_t fwcap_top_speed(uint32_t caps);
921 
922 static inline int
923 port_top_speed(const struct port_info *pi)
924 {
925 
926 	/* Mbps -> Gbps */
927 	return (fwcap_to_speed(pi->link_cfg.pcaps) / 1000);
928 }
929 
930 #endif /* __CHELSIO_COMMON_H */
931