xref: /freebsd/sys/dev/cxgb/cxgb_osdep.h (revision 830940567b49bb0c08dfaed40418999e76616909)
1 /**************************************************************************
2 
3 Copyright (c) 2007, Chelsio Inc.
4 All rights reserved.
5 
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8 
9  1. Redistributions of source code must retain the above copyright notice,
10     this list of conditions and the following disclaimer.
11 
12  2. Neither the name of the Chelsio Corporation nor the names of its
13     contributors may be used to endorse or promote products derived from
14     this software without specific prior written permission.
15 
16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26 POSSIBILITY OF SUCH DAMAGE.
27 
28 
29 $FreeBSD$
30 
31 ***************************************************************************/
32 
33 #include <sys/param.h>
34 #include <sys/systm.h>
35 #include <sys/ctype.h>
36 #include <sys/endian.h>
37 #include <sys/bus.h>
38 
39 #include <sys/lock.h>
40 #include <sys/mutex.h>
41 
42 #include <dev/mii/mii.h>
43 
44 #define	CONFIG_CHELSIO_T3_CORE
45 #include <common/cxgb_version.h>
46 
47 #ifndef _CXGB_OSDEP_H_
48 #define _CXGB_OSDEP_H_
49 
50 typedef struct adapter adapter_t;
51 struct sge_rspq;
52 
53 enum {
54 	TP_TMR_RES = 200,	/* TP timer resolution in usec */
55 	MAX_NPORTS = 4,		/* max # of ports */
56 	TP_SRAM_OFFSET = 4096,	/* TP SRAM content offset in eeprom */
57 	TP_SRAM_LEN = 2112,	/* TP SRAM content offset in eeprom */
58 };
59 
60 struct t3_mbuf_hdr {
61 	struct mbuf *mh_head;
62 	struct mbuf *mh_tail;
63 };
64 
65 #ifndef PANIC_IF
66 #define PANIC_IF(exp) do {                  \
67 	if (exp)                            \
68 		panic("BUG: %s", #exp);      \
69 } while (0)
70 #endif
71 
72 #define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif)
73 #define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri))
74 #define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl))
75 #define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header)
76 #define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len)
77 #define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag)
78 
79 /*
80  * XXX FIXME
81  */
82 #define m_set_toep(m, a) ((m)->m_pkthdr.header = (a))
83 #define m_get_toep(m) ((m)->m_pkthdr.header)
84 #define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler))
85 
86 #define m_set_socket(m, a) ((m)->m_pkthdr.header = (a))
87 #define m_get_socket(m) ((m)->m_pkthdr.header)
88 
89 #define	KTR_CXGB	KTR_SPARE2
90 
91 #define MT_DONTFREE  128
92 
93 #if __FreeBSD_version > 700030
94 #define INTR_FILTERS
95 #define FIRMWARE_LATEST
96 #endif
97 
98 #if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000))
99 #define FIRMWARE_LATEST
100 #endif
101 
102 #if __FreeBSD_version > 700000
103 #define MSI_SUPPORTED
104 #define TSO_SUPPORTED
105 #define VLAN_SUPPORTED
106 #define TASKQUEUE_CURRENT
107 #else
108 #define if_name(ifp) (ifp)->if_xname
109 #define M_SANITY(m, n)
110 #endif
111 
112 #if __FreeBSD_version >= 701000
113 #include "opt_inet.h"
114 #ifdef INET
115 #define LRO_SUPPORTED
116 #define TOE_SUPPORTED
117 #endif
118 #endif
119 
120 #if __FreeBSD_version < 800054
121 #if defined (__GNUC__)
122   #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__
123     #define mb()  __asm__ __volatile__ ("mfence;": : :"memory")
124     #define wmb()  __asm__ __volatile__ ("sfence;": : :"memory")
125     #define rmb()  __asm__ __volatile__ ("lfence;": : :"memory")
126   #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9
127     #define mb()  __asm__ __volatile__ ("membar #MemIssue": : :"memory")
128     #define wmb() mb()
129     #define rmb() mb()
130   #elif #cpu(sparc) || defined sparc || defined __sparc__
131     #define mb()  __asm__ __volatile__ ("stbar;": : :"memory")
132     #define wmb() mb()
133     #define rmb() mb()
134 #else
135     #define wmb() mb()
136     #define rmb() mb()
137     #define mb() 	/* XXX just to make this compile */
138   #endif
139 #else
140   #error "unknown compiler"
141 #endif
142 #endif
143 
144 #define __read_mostly __attribute__((__section__(".data.read_mostly")))
145 
146 /*
147  * Workaround for weird Chelsio issue
148  */
149 #if __FreeBSD_version > 700029
150 #define PRIV_SUPPORTED
151 #endif
152 
153 #define CXGB_TX_CLEANUP_THRESHOLD        32
154 
155 
156 #ifdef DEBUG_PRINT
157 #define DPRINTF printf
158 #else
159 #define DPRINTF(...)
160 #endif
161 
162 #define TX_MAX_SIZE                (1 << 16)    /* 64KB                          */
163 #define TX_MAX_SEGS                      36     /* maximum supported by card     */
164 
165 #define TX_MAX_DESC                       4     /* max descriptors per packet    */
166 
167 
168 #define TX_START_MAX_DESC (TX_MAX_DESC << 2)    /* maximum number of descriptors
169 						 * call to start used per 	 */
170 
171 #define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4)    /* maximum tx descriptors
172 						 * to clean per iteration        */
173 #define TX_WR_SIZE_MAX    11*1024              /* the maximum total size of packets aggregated into a single
174 						* TX WR
175 						*/
176 #define TX_WR_COUNT_MAX         7              /* the maximum total number of packets that can be
177 						* aggregated into a single TX WR
178 						*/
179 #if defined(__i386__) || defined(__amd64__)
180 
181 static __inline
182 void prefetch(void *x)
183 {
184         __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x));
185 }
186 
187 #define smp_mb() mb()
188 
189 #define L1_CACHE_BYTES 128
190 extern void kdb_backtrace(void);
191 
192 #define WARN_ON(condition) do { \
193        if (__predict_false((condition)!=0)) {  \
194                 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \
195                 kdb_backtrace(); \
196         } \
197 } while (0)
198 
199 #else
200 #define smp_mb()
201 #define prefetch(x)
202 #define L1_CACHE_BYTES 32
203 #endif
204 
205 #define DBG_RX          (1 << 0)
206 static const int debug_flags = DBG_RX;
207 
208 #ifdef DEBUG_PRINT
209 #define DBG(flag, msg) do {	\
210 	if ((flag & debug_flags))	\
211 		printf msg; \
212 } while (0)
213 #else
214 #define DBG(...)
215 #endif
216 
217 #include <sys/syslog.h>
218 
219 #define promisc_rx_mode(rm)  ((rm)->port->ifp->if_flags & IFF_PROMISC)
220 #define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI)
221 
222 #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__)
223 #define CH_WARN(adap, fmt, ...)	log(LOG_WARNING, fmt, ##__VA_ARGS__)
224 #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__)
225 
226 #define t3_os_sleep(x) DELAY((x) * 1000)
227 
228 #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
229 
230 #define max_t(type, a, b) (type)max((a), (b))
231 #define net_device ifnet
232 #define cpu_to_be32            htobe32
233 
234 /* Standard PHY definitions */
235 #define BMCR_LOOPBACK		BMCR_LOOP
236 #define BMCR_ISOLATE		BMCR_ISO
237 #define BMCR_ANENABLE		BMCR_AUTOEN
238 #define BMCR_SPEED1000		BMCR_SPEED1
239 #define BMCR_SPEED100		BMCR_SPEED0
240 #define BMCR_ANRESTART		BMCR_STARTNEG
241 #define BMCR_FULLDPLX		BMCR_FDX
242 #define BMSR_LSTATUS		BMSR_LINK
243 #define BMSR_ANEGCOMPLETE	BMSR_ACOMP
244 
245 #define MII_LPA			MII_ANLPAR
246 #define MII_ADVERTISE		MII_ANAR
247 #define MII_CTRL1000		MII_100T2CR
248 
249 #define ADVERTISE_PAUSE_CAP	ANAR_FC
250 #define ADVERTISE_PAUSE_ASYM	ANAR_X_PAUSE_ASYM
251 #define ADVERTISE_PAUSE		ANAR_X_PAUSE_SYM
252 #define ADVERTISE_1000HALF	ANAR_X_HD
253 #define ADVERTISE_1000FULL	ANAR_X_FD
254 #define ADVERTISE_10FULL	ANAR_10_FD
255 #define ADVERTISE_10HALF	ANAR_10
256 #define ADVERTISE_100FULL	ANAR_TX_FD
257 #define ADVERTISE_100HALF	ANAR_TX
258 
259 
260 #define ADVERTISE_1000XHALF	ANAR_X_HD
261 #define ADVERTISE_1000XFULL	ANAR_X_FD
262 #define ADVERTISE_1000XPSE_ASYM	ANAR_X_PAUSE_ASYM
263 #define ADVERTISE_1000XPAUSE	ANAR_X_PAUSE_SYM
264 
265 #define ADVERTISE_CSMA		ANAR_CSMA
266 #define ADVERTISE_NPAGE		ANAR_NP
267 
268 
269 /* Standard PCI Extended Capaibilities definitions */
270 #define PCI_CAP_ID_VPD	0x03
271 #define PCI_VPD_ADDR	2
272 #define PCI_VPD_ADDR_F	0x8000
273 #define PCI_VPD_DATA	4
274 
275 #define PCI_CAP_ID_EXP	0x10
276 #define PCI_EXP_DEVCTL	8
277 #define PCI_EXP_DEVCTL_PAYLOAD 0x00e0
278 #define PCI_EXP_LNKCTL	16
279 #define PCI_EXP_LNKSTA	18
280 
281 /*
282  * Linux compatibility macros
283  */
284 
285 /* Some simple translations */
286 #define __devinit
287 #define udelay(x) DELAY(x)
288 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
289 #define le32_to_cpu(x) le32toh(x)
290 #define le16_to_cpu(x) le16toh(x)
291 #define cpu_to_le32(x) htole32(x)
292 #define swab32(x) bswap32(x)
293 #define simple_strtoul strtoul
294 
295 
296 #ifndef LINUX_TYPES_DEFINED
297 typedef uint8_t 	u8;
298 typedef uint16_t 	u16;
299 typedef uint32_t 	u32;
300 typedef uint64_t 	u64;
301 
302 typedef uint8_t		__u8;
303 typedef uint16_t	__u16;
304 typedef uint32_t	__u32;
305 typedef uint8_t		__be8;
306 typedef uint16_t	__be16;
307 typedef uint32_t	__be32;
308 typedef uint64_t	__be64;
309 #endif
310 
311 
312 #if BYTE_ORDER == BIG_ENDIAN
313 #define __BIG_ENDIAN_BITFIELD
314 #elif BYTE_ORDER == LITTLE_ENDIAN
315 #define __LITTLE_ENDIAN_BITFIELD
316 #else
317 #error "Must set BYTE_ORDER"
318 #endif
319 
320 /* Indicates what features are supported by the interface. */
321 #define SUPPORTED_10baseT_Half          (1 << 0)
322 #define SUPPORTED_10baseT_Full          (1 << 1)
323 #define SUPPORTED_100baseT_Half         (1 << 2)
324 #define SUPPORTED_100baseT_Full         (1 << 3)
325 #define SUPPORTED_1000baseT_Half        (1 << 4)
326 #define SUPPORTED_1000baseT_Full        (1 << 5)
327 #define SUPPORTED_Autoneg               (1 << 6)
328 #define SUPPORTED_TP                    (1 << 7)
329 #define SUPPORTED_AUI                   (1 << 8)
330 #define SUPPORTED_MII                   (1 << 9)
331 #define SUPPORTED_FIBRE                 (1 << 10)
332 #define SUPPORTED_BNC                   (1 << 11)
333 #define SUPPORTED_10000baseT_Full       (1 << 12)
334 #define SUPPORTED_Pause                 (1 << 13)
335 #define SUPPORTED_Asym_Pause            (1 << 14)
336 
337 /* Indicates what features are advertised by the interface. */
338 #define ADVERTISED_10baseT_Half         (1 << 0)
339 #define ADVERTISED_10baseT_Full         (1 << 1)
340 #define ADVERTISED_100baseT_Half        (1 << 2)
341 #define ADVERTISED_100baseT_Full        (1 << 3)
342 #define ADVERTISED_1000baseT_Half       (1 << 4)
343 #define ADVERTISED_1000baseT_Full       (1 << 5)
344 #define ADVERTISED_Autoneg              (1 << 6)
345 #define ADVERTISED_TP                   (1 << 7)
346 #define ADVERTISED_AUI                  (1 << 8)
347 #define ADVERTISED_MII                  (1 << 9)
348 #define ADVERTISED_FIBRE                (1 << 10)
349 #define ADVERTISED_BNC                  (1 << 11)
350 #define ADVERTISED_10000baseT_Full      (1 << 12)
351 #define ADVERTISED_Pause                (1 << 13)
352 #define ADVERTISED_Asym_Pause           (1 << 14)
353 
354 /* Enable or disable autonegotiation.  If this is set to enable,
355  * the forced link modes above are completely ignored.
356  */
357 #define AUTONEG_DISABLE         0x00
358 #define AUTONEG_ENABLE          0x01
359 
360 #define SPEED_10		10
361 #define SPEED_100		100
362 #define SPEED_1000		1000
363 #define SPEED_10000		10000
364 #define DUPLEX_HALF		0
365 #define DUPLEX_FULL		1
366 
367 #endif
368