1 /************************************************************************** 2 3 Copyright (c) 2007, Chelsio Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Neither the name of the Chelsio Corporation nor the names of its 13 contributors may be used to endorse or promote products derived from 14 this software without specific prior written permission. 15 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 POSSIBILITY OF SUCH DAMAGE. 27 28 29 $FreeBSD$ 30 31 ***************************************************************************/ 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/ctype.h> 36 #include <sys/endian.h> 37 #include <sys/bus.h> 38 39 #include <sys/lock.h> 40 #include <sys/mutex.h> 41 42 #include <dev/mii/mii.h> 43 44 #ifdef CONFIG_DEFINED 45 #include <common/cxgb_version.h> 46 #include <cxgb_config.h> 47 #else 48 #include <dev/cxgb/common/cxgb_version.h> 49 #include <dev/cxgb/cxgb_config.h> 50 #endif 51 52 #ifndef _CXGB_OSDEP_H_ 53 #define _CXGB_OSDEP_H_ 54 55 typedef struct adapter adapter_t; 56 struct sge_rspq; 57 58 59 struct t3_mbuf_hdr { 60 struct mbuf *mh_head; 61 struct mbuf *mh_tail; 62 }; 63 64 #define PANIC_IF(exp) do { \ 65 if (exp) \ 66 panic("BUG: %s", #exp); \ 67 } while (0) 68 69 #define m_get_priority(m) ((uintptr_t)(m)->m_pkthdr.rcvif) 70 #define m_set_priority(m, pri) ((m)->m_pkthdr.rcvif = (struct ifnet *)((uintptr_t)pri)) 71 #define m_set_sgl(m, sgl) ((m)->m_pkthdr.header = (sgl)) 72 #define m_get_sgl(m) ((bus_dma_segment_t *)(m)->m_pkthdr.header) 73 #define m_set_sgllen(m, len) ((m)->m_pkthdr.ether_vtag = len) 74 #define m_get_sgllen(m) ((m)->m_pkthdr.ether_vtag) 75 76 /* 77 * XXX FIXME 78 */ 79 #define m_set_toep(m, a) ((m)->m_pkthdr.header = (a)) 80 #define m_get_toep(m) ((m)->m_pkthdr.header) 81 #define m_set_handler(m, handler) ((m)->m_pkthdr.header = (handler)) 82 83 #define m_set_socket(m, a) ((m)->m_pkthdr.header = (a)) 84 #define m_get_socket(m) ((m)->m_pkthdr.header) 85 86 #define MT_DONTFREE 128 87 88 #if __FreeBSD_version > 700030 89 #define INTR_FILTERS 90 #define FIRMWARE_LATEST 91 #endif 92 93 #if ((__FreeBSD_version > 602103) && (__FreeBSD_version < 700000)) 94 #define FIRMWARE_LATEST 95 #endif 96 97 #if __FreeBSD_version > 700000 98 #define MSI_SUPPORTED 99 #define TSO_SUPPORTED 100 #define VLAN_SUPPORTED 101 #define TASKQUEUE_CURRENT 102 #else 103 #define if_name(ifp) (ifp)->if_xname 104 #define M_SANITY(m, n) 105 #endif 106 107 #define __read_mostly __attribute__((__section__(".data.read_mostly"))) 108 109 /* 110 * Workaround for weird Chelsio issue 111 */ 112 #if __FreeBSD_version > 700029 113 #define PRIV_SUPPORTED 114 #endif 115 116 #define CXGB_TX_CLEANUP_THRESHOLD 32 117 118 119 #ifdef DEBUG_PRINT 120 #define DPRINTF printf 121 #else 122 #define DPRINTF(...) 123 #endif 124 125 #define TX_MAX_SIZE (1 << 16) /* 64KB */ 126 #define TX_MAX_SEGS 36 /* maximum supported by card */ 127 128 #define TX_MAX_DESC 4 /* max descriptors per packet */ 129 130 131 #define TX_START_MIN_DESC (TX_MAX_DESC << 2) 132 133 134 135 #define TX_START_MAX_DESC (TX_MAX_DESC << 3) /* maximum number of descriptors 136 * call to start used per */ 137 138 #define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors 139 * to clean per iteration */ 140 #define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single 141 * TX WR 142 */ 143 #define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be 144 * aggregated into a single TX WR 145 */ 146 147 148 #if defined(__i386__) || defined(__amd64__) 149 #define mb() __asm volatile("mfence":::"memory") 150 #define rmb() __asm volatile("lfence":::"memory") 151 #define wmb() __asm volatile("sfence" ::: "memory") 152 #define smp_mb() mb() 153 154 #define L1_CACHE_BYTES 128 155 static __inline 156 void prefetch(void *x) 157 { 158 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 159 } 160 161 extern void kdb_backtrace(void); 162 163 #define WARN_ON(condition) do { \ 164 if (unlikely((condition)!=0)) { \ 165 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \ 166 kdb_backtrace(); \ 167 } \ 168 } while (0) 169 170 171 #else /* !i386 && !amd64 */ 172 #define mb() 173 #define rmb() 174 #define wmb() 175 #define smp_mb() 176 #define prefetch(x) 177 #define L1_CACHE_BYTES 32 178 #endif 179 180 struct buf_ring { 181 caddr_t *br_ring; 182 volatile uint32_t br_cons; 183 volatile uint32_t br_prod; 184 int br_size; 185 struct mtx br_lock; 186 }; 187 188 struct buf_ring *buf_ring_alloc(int count, int flags); 189 void buf_ring_free(struct buf_ring *); 190 191 static __inline int 192 buf_ring_count(struct buf_ring *mr) 193 { 194 int size = mr->br_size; 195 int mask = size - 1; 196 197 return ((size + mr->br_prod - mr->br_cons) & mask); 198 } 199 200 static __inline int 201 buf_ring_empty(struct buf_ring *mr) 202 { 203 return (mr->br_cons == mr->br_prod); 204 } 205 206 /* 207 * The producer and consumer are independently locked 208 * this relies on the consumer providing his own serialization 209 * 210 */ 211 static __inline void * 212 buf_ring_dequeue(struct buf_ring *mr) 213 { 214 int prod, cons, mask; 215 caddr_t *ring, m; 216 217 ring = (caddr_t *)mr->br_ring; 218 mask = mr->br_size - 1; 219 cons = mr->br_cons; 220 prod = mr->br_prod; 221 m = NULL; 222 if (cons != prod) { 223 m = ring[cons]; 224 mr->br_cons = (cons + 1) & mask; 225 mb(); 226 } 227 return (m); 228 } 229 230 231 static __inline int 232 __buf_ring_enqueue(struct buf_ring *mr, void *m) 233 { 234 235 int prod, cons, mask, err; 236 237 cons = mr->br_cons; 238 prod = mr->br_prod; 239 mask = mr->br_size - 1; 240 if (((prod + 1) & mask) != cons) { 241 mr->br_ring[prod] = m; 242 mb(); 243 mr->br_prod = (prod + 1) & mask; 244 err = 0; 245 } else 246 err = ENOBUFS; 247 248 return (err); 249 } 250 251 static __inline int 252 buf_ring_enqueue(struct buf_ring *mr, void *m) 253 { 254 int err; 255 256 mtx_lock(&mr->br_lock); 257 err = __buf_ring_enqueue(mr, m); 258 mtx_unlock(&mr->br_lock); 259 260 return (err); 261 } 262 263 static __inline void * 264 buf_ring_peek(struct buf_ring *mr) 265 { 266 int prod, cons, mask; 267 caddr_t *ring, m; 268 269 ring = (caddr_t *)mr->br_ring; 270 mask = mr->br_size - 1; 271 cons = mr->br_cons; 272 prod = mr->br_prod; 273 m = NULL; 274 if (cons != prod) 275 m = ring[cons]; 276 277 return (m); 278 } 279 280 #define DBG_RX (1 << 0) 281 static const int debug_flags = DBG_RX; 282 283 #ifdef DEBUG_PRINT 284 #define DBG(flag, msg) do { \ 285 if ((flag & debug_flags)) \ 286 printf msg; \ 287 } while (0) 288 #else 289 #define DBG(...) 290 #endif 291 292 #define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC) 293 #define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI) 294 295 #define CH_ERR(adap, fmt, ...)device_printf(adap->dev, fmt, ##__VA_ARGS__); 296 297 #define CH_WARN(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__) 298 #define CH_ALERT(adap, fmt, ...) device_printf(adap->dev, fmt, ##__VA_ARGS__) 299 300 #define t3_os_sleep(x) DELAY((x) * 1000) 301 302 #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit))) 303 304 #define max_t(type, a, b) (type)max((a), (b)) 305 #define net_device ifnet 306 #define cpu_to_be32 htobe32 307 308 /* Standard PHY definitions */ 309 #define BMCR_LOOPBACK BMCR_LOOP 310 #define BMCR_ISOLATE BMCR_ISO 311 #define BMCR_ANENABLE BMCR_AUTOEN 312 #define BMCR_SPEED1000 BMCR_SPEED1 313 #define BMCR_SPEED100 BMCR_SPEED0 314 #define BMCR_ANRESTART BMCR_STARTNEG 315 #define BMCR_FULLDPLX BMCR_FDX 316 #define BMSR_LSTATUS BMSR_LINK 317 #define BMSR_ANEGCOMPLETE BMSR_ACOMP 318 319 #define MII_LPA MII_ANLPAR 320 #define MII_ADVERTISE MII_ANAR 321 #define MII_CTRL1000 MII_100T2CR 322 323 #define ADVERTISE_PAUSE_CAP ANAR_FC 324 #define ADVERTISE_PAUSE_ASYM 0x0800 325 #define ADVERTISE_1000HALF ANAR_X_HD 326 #define ADVERTISE_1000FULL ANAR_X_FD 327 #define ADVERTISE_10FULL ANAR_10_FD 328 #define ADVERTISE_10HALF ANAR_10 329 #define ADVERTISE_100FULL ANAR_TX_FD 330 #define ADVERTISE_100HALF ANAR_TX 331 332 /* Standard PCI Extended Capaibilities definitions */ 333 #define PCI_CAP_ID_VPD 0x03 334 #define PCI_VPD_ADDR 2 335 #define PCI_VPD_ADDR_F 0x8000 336 #define PCI_VPD_DATA 4 337 338 #define PCI_CAP_ID_EXP 0x10 339 #define PCI_EXP_DEVCTL 8 340 #define PCI_EXP_DEVCTL_PAYLOAD 0x00e0 341 #define PCI_EXP_LNKCTL 16 342 #define PCI_EXP_LNKSTA 18 343 344 /* 345 * Linux compatibility macros 346 */ 347 348 /* Some simple translations */ 349 #define __devinit 350 #define udelay(x) DELAY(x) 351 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 352 #define le32_to_cpu(x) le32toh(x) 353 #define cpu_to_le32(x) htole32(x) 354 #define swab32(x) bswap32(x) 355 #define simple_strtoul strtoul 356 357 358 typedef uint8_t u8; 359 typedef uint16_t u16; 360 typedef uint32_t u32; 361 typedef uint64_t u64; 362 363 typedef uint8_t __u8; 364 typedef uint16_t __u16; 365 typedef uint32_t __u32; 366 typedef uint8_t __be8; 367 typedef uint16_t __be16; 368 typedef uint32_t __be32; 369 typedef uint64_t __be64; 370 371 372 #if BYTE_ORDER == BIG_ENDIAN 373 #define __BIG_ENDIAN_BITFIELD 374 #elif BYTE_ORDER == LITTLE_ENDIAN 375 #define __LITTLE_ENDIAN_BITFIELD 376 #else 377 #error "Must set BYTE_ORDER" 378 #endif 379 380 /* Indicates what features are supported by the interface. */ 381 #define SUPPORTED_10baseT_Half (1 << 0) 382 #define SUPPORTED_10baseT_Full (1 << 1) 383 #define SUPPORTED_100baseT_Half (1 << 2) 384 #define SUPPORTED_100baseT_Full (1 << 3) 385 #define SUPPORTED_1000baseT_Half (1 << 4) 386 #define SUPPORTED_1000baseT_Full (1 << 5) 387 #define SUPPORTED_Autoneg (1 << 6) 388 #define SUPPORTED_TP (1 << 7) 389 #define SUPPORTED_AUI (1 << 8) 390 #define SUPPORTED_MII (1 << 9) 391 #define SUPPORTED_FIBRE (1 << 10) 392 #define SUPPORTED_BNC (1 << 11) 393 #define SUPPORTED_10000baseT_Full (1 << 12) 394 #define SUPPORTED_Pause (1 << 13) 395 #define SUPPORTED_Asym_Pause (1 << 14) 396 397 /* Indicates what features are advertised by the interface. */ 398 #define ADVERTISED_10baseT_Half (1 << 0) 399 #define ADVERTISED_10baseT_Full (1 << 1) 400 #define ADVERTISED_100baseT_Half (1 << 2) 401 #define ADVERTISED_100baseT_Full (1 << 3) 402 #define ADVERTISED_1000baseT_Half (1 << 4) 403 #define ADVERTISED_1000baseT_Full (1 << 5) 404 #define ADVERTISED_Autoneg (1 << 6) 405 #define ADVERTISED_TP (1 << 7) 406 #define ADVERTISED_AUI (1 << 8) 407 #define ADVERTISED_MII (1 << 9) 408 #define ADVERTISED_FIBRE (1 << 10) 409 #define ADVERTISED_BNC (1 << 11) 410 #define ADVERTISED_10000baseT_Full (1 << 12) 411 #define ADVERTISED_Pause (1 << 13) 412 #define ADVERTISED_Asym_Pause (1 << 14) 413 414 /* Enable or disable autonegotiation. If this is set to enable, 415 * the forced link modes above are completely ignored. 416 */ 417 #define AUTONEG_DISABLE 0x00 418 #define AUTONEG_ENABLE 0x01 419 420 #define SPEED_10 10 421 #define SPEED_100 100 422 #define SPEED_1000 1000 423 #define SPEED_10000 10000 424 #define DUPLEX_HALF 0 425 #define DUPLEX_FULL 1 426 427 #endif 428