1 /************************************************************************** 2 3 Copyright (c) 2007, Chelsio Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Neither the name of the Chelsio Corporation nor the names of its 13 contributors may be used to endorse or promote products derived from 14 this software without specific prior written permission. 15 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 POSSIBILITY OF SUCH DAMAGE. 27 28 29 $FreeBSD$ 30 31 ***************************************************************************/ 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/ctype.h> 36 #include <sys/endian.h> 37 #include <sys/bus.h> 38 39 #include <sys/lock.h> 40 #include <sys/mutex.h> 41 42 #include <dev/mii/mii.h> 43 44 #ifndef _CXGB_OSDEP_H_ 45 #define _CXGB_OSDEP_H_ 46 47 typedef struct adapter adapter_t; 48 typedef struct port_info pinfo_t; 49 struct sge_rspq; 50 51 enum { 52 TP_TMR_RES = 200, /* TP timer resolution in usec */ 53 MAX_NPORTS = 4, /* max # of ports */ 54 TP_SRAM_OFFSET = 4096, /* TP SRAM content offset in eeprom */ 55 TP_SRAM_LEN = 2112, /* TP SRAM content offset in eeprom */ 56 }; 57 58 struct t3_mbuf_hdr { 59 struct mbuf *mh_head; 60 struct mbuf *mh_tail; 61 }; 62 63 #ifndef PANIC_IF 64 #define PANIC_IF(exp) do { \ 65 if (exp) \ 66 panic("BUG: %s", #exp); \ 67 } while (0) 68 #endif 69 70 #if __FreeBSD_version < 800054 71 #if defined (__GNUC__) 72 #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__ 73 #define mb() __asm__ __volatile__ ("mfence;": : :"memory") 74 #define wmb() __asm__ __volatile__ ("sfence;": : :"memory") 75 #define rmb() __asm__ __volatile__ ("lfence;": : :"memory") 76 #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9 77 #define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory") 78 #define wmb() mb() 79 #define rmb() mb() 80 #elif #cpu(sparc) || defined sparc || defined __sparc__ 81 #define mb() __asm__ __volatile__ ("stbar;": : :"memory") 82 #define wmb() mb() 83 #define rmb() mb() 84 #else 85 #define wmb() mb() 86 #define rmb() mb() 87 #define mb() /* XXX just to make this compile */ 88 #endif 89 #else 90 #error "unknown compiler" 91 #endif 92 #endif 93 94 #define __read_mostly __attribute__((__section__(".data.read_mostly"))) 95 96 /* 97 * Workaround for weird Chelsio issue 98 */ 99 #if __FreeBSD_version > 700029 100 #define PRIV_SUPPORTED 101 #endif 102 103 #define CXGB_TX_CLEANUP_THRESHOLD 32 104 105 #define TX_MAX_SIZE (1 << 16) /* 64KB */ 106 #define TX_MAX_SEGS 36 /* maximum supported by card */ 107 108 #define TX_MAX_DESC 4 /* max descriptors per packet */ 109 110 111 #define TX_START_MAX_DESC (TX_MAX_DESC << 2) /* maximum number of descriptors 112 * call to start used per */ 113 114 #define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors 115 * to clean per iteration */ 116 #define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single 117 * TX WR 118 */ 119 #define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be 120 * aggregated into a single TX WR 121 */ 122 #if defined(__i386__) || defined(__amd64__) 123 124 static __inline 125 void prefetch(void *x) 126 { 127 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 128 } 129 130 #define smp_mb() mb() 131 132 #define L1_CACHE_BYTES 128 133 extern void kdb_backtrace(void); 134 135 #define WARN_ON(condition) do { \ 136 if (__predict_false((condition)!=0)) { \ 137 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \ 138 kdb_backtrace(); \ 139 } \ 140 } while (0) 141 142 #else 143 #define smp_mb() 144 #define prefetch(x) 145 #define L1_CACHE_BYTES 32 146 #endif 147 148 #define DBG_RX (1 << 0) 149 static const int debug_flags = DBG_RX; 150 151 #ifdef DEBUG_PRINT 152 #define DBG(flag, msg) do { \ 153 if ((flag & debug_flags)) \ 154 printf msg; \ 155 } while (0) 156 #else 157 #define DBG(...) 158 #endif 159 160 #include <sys/syslog.h> 161 162 #define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC) 163 #define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI) 164 165 #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__) 166 #define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__) 167 #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__) 168 169 #define t3_os_sleep(x) DELAY((x) * 1000) 170 171 #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit))) 172 173 #define max_t(type, a, b) (type)max((a), (b)) 174 #define cpu_to_be32 htobe32 175 176 /* Standard PHY definitions */ 177 #define BMCR_LOOPBACK BMCR_LOOP 178 #define BMCR_ISOLATE BMCR_ISO 179 #define BMCR_ANENABLE BMCR_AUTOEN 180 #define BMCR_SPEED1000 BMCR_SPEED1 181 #define BMCR_SPEED100 BMCR_SPEED0 182 #define BMCR_ANRESTART BMCR_STARTNEG 183 #define BMCR_FULLDPLX BMCR_FDX 184 #define BMSR_LSTATUS BMSR_LINK 185 #define BMSR_ANEGCOMPLETE BMSR_ACOMP 186 187 #define MII_LPA MII_ANLPAR 188 #define MII_ADVERTISE MII_ANAR 189 #define MII_CTRL1000 MII_100T2CR 190 191 #define ADVERTISE_PAUSE_CAP ANAR_FC 192 #define ADVERTISE_PAUSE_ASYM 0x800 193 #define ADVERTISE_PAUSE ANAR_FC 194 #define ADVERTISE_1000HALF 0x100 195 #define ADVERTISE_1000FULL 0x200 196 #define ADVERTISE_10FULL ANAR_10_FD 197 #define ADVERTISE_10HALF ANAR_10 198 #define ADVERTISE_100FULL ANAR_TX_FD 199 #define ADVERTISE_100HALF ANAR_TX 200 201 202 #define ADVERTISE_1000XHALF ANAR_X_HD 203 #define ADVERTISE_1000XFULL ANAR_X_FD 204 #define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM 205 #define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM 206 207 #define ADVERTISE_CSMA ANAR_CSMA 208 #define ADVERTISE_NPAGE ANAR_NP 209 210 211 /* Standard PCI Extended Capabilities definitions */ 212 #define PCI_CAP_ID_VPD PCIY_VPD 213 #define PCI_VPD_ADDR PCIR_VPD_ADDR 214 #define PCI_VPD_ADDR_F 0x8000 215 #define PCI_VPD_DATA PCIR_VPD_DATA 216 217 #define PCI_CAP_ID_EXP PCIY_EXPRESS 218 #define PCI_EXP_DEVCTL PCIR_EXPRESS_DEVICE_CTL 219 #define PCI_EXP_DEVCTL_PAYLOAD PCIM_EXP_CTL_MAX_PAYLOAD 220 #define PCI_EXP_DEVCTL_READRQ PCIM_EXP_CTL_MAX_READ_REQUEST 221 #define PCI_EXP_LNKCTL PCIR_EXPRESS_LINK_CTL 222 #define PCI_EXP_LNKSTA PCIR_EXPRESS_LINK_STA 223 224 /* 225 * Linux compatibility macros 226 */ 227 228 /* Some simple translations */ 229 #define __devinit 230 #define udelay(x) DELAY(x) 231 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 232 #define le32_to_cpu(x) le32toh(x) 233 #define le16_to_cpu(x) le16toh(x) 234 #define cpu_to_le32(x) htole32(x) 235 #define swab32(x) bswap32(x) 236 #define simple_strtoul strtoul 237 238 239 #ifndef LINUX_TYPES_DEFINED 240 typedef uint8_t u8; 241 typedef uint16_t u16; 242 typedef uint32_t u32; 243 typedef uint64_t u64; 244 245 typedef uint8_t __u8; 246 typedef uint16_t __u16; 247 typedef uint32_t __u32; 248 typedef uint8_t __be8; 249 typedef uint16_t __be16; 250 typedef uint32_t __be32; 251 typedef uint64_t __be64; 252 #endif 253 254 255 #if BYTE_ORDER == BIG_ENDIAN 256 #define __BIG_ENDIAN_BITFIELD 257 #elif BYTE_ORDER == LITTLE_ENDIAN 258 #define __LITTLE_ENDIAN_BITFIELD 259 #else 260 #error "Must set BYTE_ORDER" 261 #endif 262 263 /* Indicates what features are supported by the interface. */ 264 #define SUPPORTED_10baseT_Half (1 << 0) 265 #define SUPPORTED_10baseT_Full (1 << 1) 266 #define SUPPORTED_100baseT_Half (1 << 2) 267 #define SUPPORTED_100baseT_Full (1 << 3) 268 #define SUPPORTED_1000baseT_Half (1 << 4) 269 #define SUPPORTED_1000baseT_Full (1 << 5) 270 #define SUPPORTED_Autoneg (1 << 6) 271 #define SUPPORTED_TP (1 << 7) 272 #define SUPPORTED_AUI (1 << 8) 273 #define SUPPORTED_MII (1 << 9) 274 #define SUPPORTED_FIBRE (1 << 10) 275 #define SUPPORTED_BNC (1 << 11) 276 #define SUPPORTED_10000baseT_Full (1 << 12) 277 #define SUPPORTED_Pause (1 << 13) 278 #define SUPPORTED_Asym_Pause (1 << 14) 279 280 /* Indicates what features are advertised by the interface. */ 281 #define ADVERTISED_10baseT_Half (1 << 0) 282 #define ADVERTISED_10baseT_Full (1 << 1) 283 #define ADVERTISED_100baseT_Half (1 << 2) 284 #define ADVERTISED_100baseT_Full (1 << 3) 285 #define ADVERTISED_1000baseT_Half (1 << 4) 286 #define ADVERTISED_1000baseT_Full (1 << 5) 287 #define ADVERTISED_Autoneg (1 << 6) 288 #define ADVERTISED_TP (1 << 7) 289 #define ADVERTISED_AUI (1 << 8) 290 #define ADVERTISED_MII (1 << 9) 291 #define ADVERTISED_FIBRE (1 << 10) 292 #define ADVERTISED_BNC (1 << 11) 293 #define ADVERTISED_10000baseT_Full (1 << 12) 294 #define ADVERTISED_Pause (1 << 13) 295 #define ADVERTISED_Asym_Pause (1 << 14) 296 297 /* Enable or disable autonegotiation. If this is set to enable, 298 * the forced link modes above are completely ignored. 299 */ 300 #define AUTONEG_DISABLE 0x00 301 #define AUTONEG_ENABLE 0x01 302 303 #define SPEED_10 10 304 #define SPEED_100 100 305 #define SPEED_1000 1000 306 #define SPEED_10000 10000 307 #define DUPLEX_HALF 0 308 #define DUPLEX_FULL 1 309 310 #endif 311