1 /************************************************************************** 2 SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 4 Copyright (c) 2007, Chelsio Inc. 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Neither the name of the Chelsio Corporation nor the names of its 14 contributors may be used to endorse or promote products derived from 15 this software without specific prior written permission. 16 17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 POSSIBILITY OF SUCH DAMAGE. 28 29 30 $FreeBSD$ 31 32 ***************************************************************************/ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/ctype.h> 37 #include <sys/endian.h> 38 #include <sys/bus.h> 39 40 #include <sys/lock.h> 41 #include <sys/mutex.h> 42 43 #include <sys/kdb.h> 44 45 #include <dev/mii/mii.h> 46 47 #ifndef _CXGB_OSDEP_H_ 48 #define _CXGB_OSDEP_H_ 49 50 typedef struct adapter adapter_t; 51 typedef struct port_info pinfo_t; 52 struct sge_rspq; 53 54 enum { 55 TP_TMR_RES = 200, /* TP timer resolution in usec */ 56 MAX_NPORTS = 4, /* max # of ports */ 57 TP_SRAM_OFFSET = 4096, /* TP SRAM content offset in eeprom */ 58 TP_SRAM_LEN = 2112, /* TP SRAM content offset in eeprom */ 59 }; 60 61 struct t3_mbuf_hdr { 62 struct mbuf *mh_head; 63 struct mbuf *mh_tail; 64 }; 65 66 #ifndef PANIC_IF 67 #define PANIC_IF(exp) do { \ 68 if (exp) \ 69 panic("BUG: %s", #exp); \ 70 } while (0) 71 #endif 72 73 #if __FreeBSD_version < 800054 74 #if defined (__GNUC__) 75 #if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__ 76 #define mb() __asm__ __volatile__ ("mfence;": : :"memory") 77 #define wmb() __asm__ __volatile__ ("sfence;": : :"memory") 78 #define rmb() __asm__ __volatile__ ("lfence;": : :"memory") 79 #elif #cpu(sparc64) || defined sparc64 || defined __sparcv9 80 #define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory") 81 #define wmb() mb() 82 #define rmb() mb() 83 #elif #cpu(sparc) || defined sparc || defined __sparc__ 84 #define mb() __asm__ __volatile__ ("stbar;": : :"memory") 85 #define wmb() mb() 86 #define rmb() mb() 87 #else 88 #define wmb() mb() 89 #define rmb() mb() 90 #define mb() /* XXX just to make this compile */ 91 #endif 92 #else 93 #error "unknown compiler" 94 #endif 95 #endif 96 97 /* 98 * Workaround for weird Chelsio issue 99 */ 100 #if __FreeBSD_version > 700029 101 #define PRIV_SUPPORTED 102 #endif 103 104 #define CXGB_TX_CLEANUP_THRESHOLD 32 105 106 #define TX_MAX_SIZE (1 << 16) /* 64KB */ 107 #define TX_MAX_SEGS 36 /* maximum supported by card */ 108 109 #define TX_MAX_DESC 4 /* max descriptors per packet */ 110 111 112 #define TX_START_MAX_DESC (TX_MAX_DESC << 2) /* maximum number of descriptors 113 * call to start used per */ 114 115 #define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors 116 * to clean per iteration */ 117 #define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single 118 * TX WR 119 */ 120 #define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be 121 * aggregated into a single TX WR 122 */ 123 #if defined(__i386__) || defined(__amd64__) 124 125 static __inline 126 void prefetch(void *x) 127 { 128 __asm volatile("prefetcht0 %0" :: "m" (*(unsigned long *)x)); 129 } 130 131 #define smp_mb() mb() 132 133 #define L1_CACHE_BYTES 128 134 #define WARN_ON(condition) do { \ 135 if (__predict_false((condition)!=0)) { \ 136 log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \ 137 kdb_backtrace(); \ 138 } \ 139 } while (0) 140 141 #else 142 #define smp_mb() 143 #define prefetch(x) 144 #define L1_CACHE_BYTES 32 145 #endif 146 147 #define DBG_RX (1 << 0) 148 static const int debug_flags = DBG_RX; 149 150 #ifdef DEBUG_PRINT 151 #define DBG(flag, msg) do { \ 152 if ((flag & debug_flags)) \ 153 printf msg; \ 154 } while (0) 155 #else 156 #define DBG(...) 157 #endif 158 159 #include <sys/syslog.h> 160 161 #define promisc_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_PROMISC) 162 #define allmulti_rx_mode(rm) ((rm)->port->ifp->if_flags & IFF_ALLMULTI) 163 164 #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__) 165 #define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__) 166 #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__) 167 168 #define t3_os_sleep(x) DELAY((x) * 1000) 169 170 #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit))) 171 172 #define max_t(type, a, b) (type)max((a), (b)) 173 #define cpu_to_be32(x) htobe32(x) 174 175 /* Standard PHY definitions */ 176 #define BMCR_LOOPBACK BMCR_LOOP 177 #define BMCR_ISOLATE BMCR_ISO 178 #define BMCR_ANENABLE BMCR_AUTOEN 179 #define BMCR_SPEED1000 BMCR_SPEED1 180 #define BMCR_SPEED100 BMCR_SPEED0 181 #define BMCR_ANRESTART BMCR_STARTNEG 182 #define BMCR_FULLDPLX BMCR_FDX 183 #define BMSR_LSTATUS BMSR_LINK 184 #define BMSR_ANEGCOMPLETE BMSR_ACOMP 185 186 #define MII_LPA MII_ANLPAR 187 #define MII_ADVERTISE MII_ANAR 188 #define MII_CTRL1000 MII_100T2CR 189 190 #define ADVERTISE_PAUSE_CAP ANAR_FC 191 #define ADVERTISE_PAUSE_ASYM 0x800 192 #define ADVERTISE_PAUSE ANAR_FC 193 #define ADVERTISE_1000HALF 0x100 194 #define ADVERTISE_1000FULL 0x200 195 #define ADVERTISE_10FULL ANAR_10_FD 196 #define ADVERTISE_10HALF ANAR_10 197 #define ADVERTISE_100FULL ANAR_TX_FD 198 #define ADVERTISE_100HALF ANAR_TX 199 200 201 #define ADVERTISE_1000XHALF ANAR_X_HD 202 #define ADVERTISE_1000XFULL ANAR_X_FD 203 #define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM 204 #define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM 205 206 #define ADVERTISE_CSMA ANAR_CSMA 207 #define ADVERTISE_NPAGE ANAR_NP 208 209 210 /* Standard PCI Extended Capabilities definitions */ 211 #define PCI_CAP_ID_VPD PCIY_VPD 212 #define PCI_VPD_ADDR PCIR_VPD_ADDR 213 #define PCI_VPD_ADDR_F 0x8000 214 #define PCI_VPD_DATA PCIR_VPD_DATA 215 216 #define PCI_CAP_ID_EXP PCIY_EXPRESS 217 #define PCI_EXP_DEVCTL PCIER_DEVICE_CTL 218 #define PCI_EXP_DEVCTL_PAYLOAD PCIEM_CTL_MAX_PAYLOAD 219 #define PCI_EXP_DEVCTL_READRQ PCIEM_CTL_MAX_READ_REQUEST 220 #define PCI_EXP_LNKCTL PCIER_LINK_CTL 221 #define PCI_EXP_LNKSTA PCIER_LINK_STA 222 223 /* 224 * Linux compatibility macros 225 */ 226 227 /* Some simple translations */ 228 #define __devinit 229 #define udelay(x) DELAY(x) 230 #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 231 #define le32_to_cpu(x) le32toh(x) 232 #define le16_to_cpu(x) le16toh(x) 233 #define cpu_to_le32(x) htole32(x) 234 #define swab32(x) bswap32(x) 235 #ifndef simple_strtoul 236 #define simple_strtoul(...) strtoul(__VA_ARGS__) 237 #endif 238 239 240 #ifndef LINUX_TYPES_DEFINED 241 typedef uint8_t u8; 242 typedef uint16_t u16; 243 typedef uint32_t u32; 244 typedef uint64_t u64; 245 246 typedef uint8_t __u8; 247 typedef uint16_t __u16; 248 typedef uint32_t __u32; 249 typedef uint8_t __be8; 250 typedef uint16_t __be16; 251 typedef uint32_t __be32; 252 typedef uint64_t __be64; 253 #endif 254 255 256 #if BYTE_ORDER == BIG_ENDIAN 257 #define __BIG_ENDIAN_BITFIELD 258 #elif BYTE_ORDER == LITTLE_ENDIAN 259 #define __LITTLE_ENDIAN_BITFIELD 260 #else 261 #error "Must set BYTE_ORDER" 262 #endif 263 264 /* Indicates what features are supported by the interface. */ 265 #define SUPPORTED_10baseT_Half (1 << 0) 266 #define SUPPORTED_10baseT_Full (1 << 1) 267 #define SUPPORTED_100baseT_Half (1 << 2) 268 #define SUPPORTED_100baseT_Full (1 << 3) 269 #define SUPPORTED_1000baseT_Half (1 << 4) 270 #define SUPPORTED_1000baseT_Full (1 << 5) 271 #define SUPPORTED_Autoneg (1 << 6) 272 #define SUPPORTED_TP (1 << 7) 273 #define SUPPORTED_AUI (1 << 8) 274 #define SUPPORTED_MII (1 << 9) 275 #define SUPPORTED_FIBRE (1 << 10) 276 #define SUPPORTED_BNC (1 << 11) 277 #define SUPPORTED_10000baseT_Full (1 << 12) 278 #define SUPPORTED_Pause (1 << 13) 279 #define SUPPORTED_Asym_Pause (1 << 14) 280 281 /* Indicates what features are advertised by the interface. */ 282 #define ADVERTISED_10baseT_Half (1 << 0) 283 #define ADVERTISED_10baseT_Full (1 << 1) 284 #define ADVERTISED_100baseT_Half (1 << 2) 285 #define ADVERTISED_100baseT_Full (1 << 3) 286 #define ADVERTISED_1000baseT_Half (1 << 4) 287 #define ADVERTISED_1000baseT_Full (1 << 5) 288 #define ADVERTISED_Autoneg (1 << 6) 289 #define ADVERTISED_TP (1 << 7) 290 #define ADVERTISED_AUI (1 << 8) 291 #define ADVERTISED_MII (1 << 9) 292 #define ADVERTISED_FIBRE (1 << 10) 293 #define ADVERTISED_BNC (1 << 11) 294 #define ADVERTISED_10000baseT_Full (1 << 12) 295 #define ADVERTISED_Pause (1 << 13) 296 #define ADVERTISED_Asym_Pause (1 << 14) 297 298 /* Enable or disable autonegotiation. If this is set to enable, 299 * the forced link modes above are completely ignored. 300 */ 301 #define AUTONEG_DISABLE 0x00 302 #define AUTONEG_ENABLE 0x01 303 304 #define SPEED_10 10 305 #define SPEED_100 100 306 #define SPEED_1000 1000 307 #define SPEED_10000 10000 308 #define DUPLEX_HALF 0 309 #define DUPLEX_FULL 1 310 311 #endif 312