1b6d90eb7SKip Macy /************************************************************************** 2*4d846d26SWarner Losh SPDX-License-Identifier: BSD-2-Clause 3b6d90eb7SKip Macy 4b6d90eb7SKip Macy Copyright (c) 2007, Chelsio Inc. 5b6d90eb7SKip Macy All rights reserved. 6b6d90eb7SKip Macy 7b6d90eb7SKip Macy Redistribution and use in source and binary forms, with or without 8b6d90eb7SKip Macy modification, are permitted provided that the following conditions are met: 9b6d90eb7SKip Macy 10b6d90eb7SKip Macy 1. Redistributions of source code must retain the above copyright notice, 11b6d90eb7SKip Macy this list of conditions and the following disclaimer. 12b6d90eb7SKip Macy 13d722cab4SKip Macy 2. Neither the name of the Chelsio Corporation nor the names of its 14b6d90eb7SKip Macy contributors may be used to endorse or promote products derived from 15b6d90eb7SKip Macy this software without specific prior written permission. 16b6d90eb7SKip Macy 17b6d90eb7SKip Macy THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18b6d90eb7SKip Macy AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19b6d90eb7SKip Macy IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20b6d90eb7SKip Macy ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21b6d90eb7SKip Macy LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22b6d90eb7SKip Macy CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23b6d90eb7SKip Macy SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24b6d90eb7SKip Macy INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25b6d90eb7SKip Macy CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26b6d90eb7SKip Macy ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27b6d90eb7SKip Macy POSSIBILITY OF SUCH DAMAGE. 28b6d90eb7SKip Macy 29b6d90eb7SKip Macy ***************************************************************************/ 30b6d90eb7SKip Macy 31b6d90eb7SKip Macy #include <sys/param.h> 32b6d90eb7SKip Macy #include <sys/systm.h> 33b6d90eb7SKip Macy #include <sys/ctype.h> 34b6d90eb7SKip Macy #include <sys/endian.h> 35b6d90eb7SKip Macy #include <sys/bus.h> 36b6d90eb7SKip Macy 378090c9f5SKip Macy #include <sys/lock.h> 388090c9f5SKip Macy #include <sys/mutex.h> 398090c9f5SKip Macy 40ee3a7d2fSEnji Cooper #include <sys/kdb.h> 41ee3a7d2fSEnji Cooper 42b6d90eb7SKip Macy #include <dev/mii/mii.h> 43b6d90eb7SKip Macy 44b6d90eb7SKip Macy #ifndef _CXGB_OSDEP_H_ 45b6d90eb7SKip Macy #define _CXGB_OSDEP_H_ 46b6d90eb7SKip Macy 47b6d90eb7SKip Macy typedef struct adapter adapter_t; 48c01f2b83SNavdeep Parhar typedef struct port_info pinfo_t; 49b6d90eb7SKip Macy struct sge_rspq; 50b6d90eb7SKip Macy 514af83c8cSKip Macy enum { 524af83c8cSKip Macy TP_TMR_RES = 200, /* TP timer resolution in usec */ 534af83c8cSKip Macy MAX_NPORTS = 4, /* max # of ports */ 544af83c8cSKip Macy TP_SRAM_OFFSET = 4096, /* TP SRAM content offset in eeprom */ 554af83c8cSKip Macy TP_SRAM_LEN = 2112, /* TP SRAM content offset in eeprom */ 564af83c8cSKip Macy }; 578090c9f5SKip Macy 588adc65adSKip Macy struct t3_mbuf_hdr { 598adc65adSKip Macy struct mbuf *mh_head; 608adc65adSKip Macy struct mbuf *mh_tail; 618adc65adSKip Macy }; 628adc65adSKip Macy 6371dba7f3SKip Macy #ifndef PANIC_IF 64d722cab4SKip Macy #define PANIC_IF(exp) do { \ 65d722cab4SKip Macy if (exp) \ 663e96c7e7SKip Macy panic("BUG: %s", #exp); \ 67d722cab4SKip Macy } while (0) 6871dba7f3SKip Macy #endif 69d722cab4SKip Macy 70b6d90eb7SKip Macy /* 71b6d90eb7SKip Macy * Workaround for weird Chelsio issue 72b6d90eb7SKip Macy */ 73b6d90eb7SKip Macy #define PRIV_SUPPORTED 74b6d90eb7SKip Macy 75b6d90eb7SKip Macy #define CXGB_TX_CLEANUP_THRESHOLD 32 76b6d90eb7SKip Macy 77b6d90eb7SKip Macy #define TX_MAX_SIZE (1 << 16) /* 64KB */ 78b6d90eb7SKip Macy #define TX_MAX_SEGS 36 /* maximum supported by card */ 798090c9f5SKip Macy 80b6d90eb7SKip Macy #define TX_MAX_DESC 4 /* max descriptors per packet */ 81ac3a6d9cSKip Macy 828090c9f5SKip Macy 833f345a5dSKip Macy #define TX_START_MAX_DESC (TX_MAX_DESC << 2) /* maximum number of descriptors 84b6d90eb7SKip Macy * call to start used per */ 85ac3a6d9cSKip Macy 8604ad3390SKip Macy #define TX_CLEAN_MAX_DESC (TX_MAX_DESC << 4) /* maximum tx descriptors 87b6d90eb7SKip Macy * to clean per iteration */ 888090c9f5SKip Macy #define TX_WR_SIZE_MAX 11*1024 /* the maximum total size of packets aggregated into a single 898090c9f5SKip Macy * TX WR 908090c9f5SKip Macy */ 918090c9f5SKip Macy #define TX_WR_COUNT_MAX 7 /* the maximum total number of packets that can be 928090c9f5SKip Macy * aggregated into a single TX WR 938090c9f5SKip Macy */ 946792568fSNavdeep Parhar 956792568fSNavdeep Parhar #define prefetch(x) __builtin_prefetch(x) 966792568fSNavdeep Parhar 97b6d90eb7SKip Macy #if defined(__i386__) || defined(__amd64__) 983f345a5dSKip Macy #define smp_mb() mb() 99d722cab4SKip Macy #define WARN_ON(condition) do { \ 10071dba7f3SKip Macy if (__predict_false((condition)!=0)) { \ 101d722cab4SKip Macy log(LOG_WARNING, "BUG: warning at %s:%d/%s()\n", __FILE__, __LINE__, __FUNCTION__); \ 102d722cab4SKip Macy kdb_backtrace(); \ 103d722cab4SKip Macy } \ 104d722cab4SKip Macy } while (0) 1053f345a5dSKip Macy #else 106bede276bSKip Macy #define smp_mb() 107b6d90eb7SKip Macy #endif 1088090c9f5SKip Macy 109b6d90eb7SKip Macy #define DBG_RX (1 << 0) 110b6d90eb7SKip Macy static const int debug_flags = DBG_RX; 111b6d90eb7SKip Macy 112b6d90eb7SKip Macy #ifdef DEBUG_PRINT 113b6d90eb7SKip Macy #define DBG(flag, msg) do { \ 114b6d90eb7SKip Macy if ((flag & debug_flags)) \ 115b6d90eb7SKip Macy printf msg; \ 116b6d90eb7SKip Macy } while (0) 117b6d90eb7SKip Macy #else 118b6d90eb7SKip Macy #define DBG(...) 119b6d90eb7SKip Macy #endif 120b6d90eb7SKip Macy 1218e10660fSKip Macy #include <sys/syslog.h> 1228e10660fSKip Macy 123954712e8SJustin Hibbits #define promisc_rx_mode(rm) (if_getflags((rm)->port->ifp) & IFF_PROMISC) 124954712e8SJustin Hibbits #define allmulti_rx_mode(rm) (if_getflags((rm)->port->ifp) & IFF_ALLMULTI) 125b6d90eb7SKip Macy 1268e10660fSKip Macy #define CH_ERR(adap, fmt, ...) log(LOG_ERR, fmt, ##__VA_ARGS__) 1278e10660fSKip Macy #define CH_WARN(adap, fmt, ...) log(LOG_WARNING, fmt, ##__VA_ARGS__) 1288e10660fSKip Macy #define CH_ALERT(adap, fmt, ...) log(LOG_ALERT, fmt, ##__VA_ARGS__) 129b6d90eb7SKip Macy 130b6d90eb7SKip Macy #define t3_os_sleep(x) DELAY((x) * 1000) 131b6d90eb7SKip Macy 1328090c9f5SKip Macy #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit))) 133d722cab4SKip Macy 134577e9bbeSKip Macy #define max_t(type, a, b) (type)max((a), (b)) 135ae14b499SHans Petter Selasky #define cpu_to_be32(x) htobe32(x) 136d722cab4SKip Macy 137b6d90eb7SKip Macy /* Standard PHY definitions */ 138b6d90eb7SKip Macy #define BMCR_LOOPBACK BMCR_LOOP 139b6d90eb7SKip Macy #define BMCR_ISOLATE BMCR_ISO 140b6d90eb7SKip Macy #define BMCR_ANENABLE BMCR_AUTOEN 141b6d90eb7SKip Macy #define BMCR_SPEED1000 BMCR_SPEED1 142b6d90eb7SKip Macy #define BMCR_SPEED100 BMCR_SPEED0 143b6d90eb7SKip Macy #define BMCR_ANRESTART BMCR_STARTNEG 144b6d90eb7SKip Macy #define BMCR_FULLDPLX BMCR_FDX 145b6d90eb7SKip Macy #define BMSR_LSTATUS BMSR_LINK 146b6d90eb7SKip Macy #define BMSR_ANEGCOMPLETE BMSR_ACOMP 147b6d90eb7SKip Macy 148b6d90eb7SKip Macy #define MII_LPA MII_ANLPAR 149b6d90eb7SKip Macy #define MII_ADVERTISE MII_ANAR 150b6d90eb7SKip Macy #define MII_CTRL1000 MII_100T2CR 151b6d90eb7SKip Macy 152b6d90eb7SKip Macy #define ADVERTISE_PAUSE_CAP ANAR_FC 153c01f2b83SNavdeep Parhar #define ADVERTISE_PAUSE_ASYM 0x800 154c01f2b83SNavdeep Parhar #define ADVERTISE_PAUSE ANAR_FC 155c01f2b83SNavdeep Parhar #define ADVERTISE_1000HALF 0x100 156c01f2b83SNavdeep Parhar #define ADVERTISE_1000FULL 0x200 157b6d90eb7SKip Macy #define ADVERTISE_10FULL ANAR_10_FD 158b6d90eb7SKip Macy #define ADVERTISE_10HALF ANAR_10 159b6d90eb7SKip Macy #define ADVERTISE_100FULL ANAR_TX_FD 160b6d90eb7SKip Macy #define ADVERTISE_100HALF ANAR_TX 161b6d90eb7SKip Macy 1628e10660fSKip Macy 1638e10660fSKip Macy #define ADVERTISE_1000XHALF ANAR_X_HD 1648e10660fSKip Macy #define ADVERTISE_1000XFULL ANAR_X_FD 1658e10660fSKip Macy #define ADVERTISE_1000XPSE_ASYM ANAR_X_PAUSE_ASYM 1668e10660fSKip Macy #define ADVERTISE_1000XPAUSE ANAR_X_PAUSE_SYM 1678e10660fSKip Macy 1684af83c8cSKip Macy #define ADVERTISE_CSMA ANAR_CSMA 1694af83c8cSKip Macy #define ADVERTISE_NPAGE ANAR_NP 1704af83c8cSKip Macy 1718e10660fSKip Macy 172c01f2b83SNavdeep Parhar /* Standard PCI Extended Capabilities definitions */ 173c01f2b83SNavdeep Parhar #define PCI_CAP_ID_VPD PCIY_VPD 174c01f2b83SNavdeep Parhar #define PCI_VPD_ADDR PCIR_VPD_ADDR 175b6d90eb7SKip Macy #define PCI_VPD_ADDR_F 0x8000 176c01f2b83SNavdeep Parhar #define PCI_VPD_DATA PCIR_VPD_DATA 177b6d90eb7SKip Macy 178c01f2b83SNavdeep Parhar #define PCI_CAP_ID_EXP PCIY_EXPRESS 179389c8bd5SGavin Atkinson #define PCI_EXP_DEVCTL PCIER_DEVICE_CTL 180389c8bd5SGavin Atkinson #define PCI_EXP_DEVCTL_PAYLOAD PCIEM_CTL_MAX_PAYLOAD 181389c8bd5SGavin Atkinson #define PCI_EXP_DEVCTL_READRQ PCIEM_CTL_MAX_READ_REQUEST 182389c8bd5SGavin Atkinson #define PCI_EXP_LNKCTL PCIER_LINK_CTL 183389c8bd5SGavin Atkinson #define PCI_EXP_LNKSTA PCIER_LINK_STA 184b6d90eb7SKip Macy 185b6d90eb7SKip Macy /* 186b6d90eb7SKip Macy * Linux compatibility macros 187b6d90eb7SKip Macy */ 188b6d90eb7SKip Macy 189b6d90eb7SKip Macy /* Some simple translations */ 190b6d90eb7SKip Macy #define __devinit 191b6d90eb7SKip Macy #define udelay(x) DELAY(x) 192b6d90eb7SKip Macy #define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) 193b6d90eb7SKip Macy #define le32_to_cpu(x) le32toh(x) 1948e10660fSKip Macy #define le16_to_cpu(x) le16toh(x) 195b6d90eb7SKip Macy #define cpu_to_le32(x) htole32(x) 196b6d90eb7SKip Macy #define swab32(x) bswap32(x) 197fe68f570SHans Petter Selasky #ifndef simple_strtoul 198fe68f570SHans Petter Selasky #define simple_strtoul(...) strtoul(__VA_ARGS__) 199fe68f570SHans Petter Selasky #endif 200b6d90eb7SKip Macy 2018090c9f5SKip Macy 2028e10660fSKip Macy #ifndef LINUX_TYPES_DEFINED 203b6d90eb7SKip Macy typedef uint8_t u8; 204b6d90eb7SKip Macy typedef uint16_t u16; 205b6d90eb7SKip Macy typedef uint32_t u32; 206b6d90eb7SKip Macy typedef uint64_t u64; 207b6d90eb7SKip Macy 208b6d90eb7SKip Macy typedef uint8_t __u8; 209b6d90eb7SKip Macy typedef uint16_t __u16; 210b6d90eb7SKip Macy typedef uint32_t __u32; 211b6d90eb7SKip Macy typedef uint8_t __be8; 212b6d90eb7SKip Macy typedef uint16_t __be16; 213b6d90eb7SKip Macy typedef uint32_t __be32; 214b6d90eb7SKip Macy typedef uint64_t __be64; 2158e10660fSKip Macy #endif 216b6d90eb7SKip Macy 2178090c9f5SKip Macy 218b6d90eb7SKip Macy #if BYTE_ORDER == BIG_ENDIAN 219b6d90eb7SKip Macy #define __BIG_ENDIAN_BITFIELD 220b6d90eb7SKip Macy #elif BYTE_ORDER == LITTLE_ENDIAN 221b6d90eb7SKip Macy #define __LITTLE_ENDIAN_BITFIELD 222b6d90eb7SKip Macy #else 223b6d90eb7SKip Macy #error "Must set BYTE_ORDER" 224b6d90eb7SKip Macy #endif 225b6d90eb7SKip Macy 226b6d90eb7SKip Macy /* Indicates what features are supported by the interface. */ 227b6d90eb7SKip Macy #define SUPPORTED_10baseT_Half (1 << 0) 228b6d90eb7SKip Macy #define SUPPORTED_10baseT_Full (1 << 1) 229b6d90eb7SKip Macy #define SUPPORTED_100baseT_Half (1 << 2) 230b6d90eb7SKip Macy #define SUPPORTED_100baseT_Full (1 << 3) 231b6d90eb7SKip Macy #define SUPPORTED_1000baseT_Half (1 << 4) 232b6d90eb7SKip Macy #define SUPPORTED_1000baseT_Full (1 << 5) 233b6d90eb7SKip Macy #define SUPPORTED_Autoneg (1 << 6) 234b6d90eb7SKip Macy #define SUPPORTED_TP (1 << 7) 235b6d90eb7SKip Macy #define SUPPORTED_AUI (1 << 8) 236b6d90eb7SKip Macy #define SUPPORTED_MII (1 << 9) 237b6d90eb7SKip Macy #define SUPPORTED_FIBRE (1 << 10) 238b6d90eb7SKip Macy #define SUPPORTED_BNC (1 << 11) 239b6d90eb7SKip Macy #define SUPPORTED_10000baseT_Full (1 << 12) 240b6d90eb7SKip Macy #define SUPPORTED_Pause (1 << 13) 241b6d90eb7SKip Macy #define SUPPORTED_Asym_Pause (1 << 14) 242b6d90eb7SKip Macy 243b6d90eb7SKip Macy /* Indicates what features are advertised by the interface. */ 244b6d90eb7SKip Macy #define ADVERTISED_10baseT_Half (1 << 0) 245b6d90eb7SKip Macy #define ADVERTISED_10baseT_Full (1 << 1) 246b6d90eb7SKip Macy #define ADVERTISED_100baseT_Half (1 << 2) 247b6d90eb7SKip Macy #define ADVERTISED_100baseT_Full (1 << 3) 248b6d90eb7SKip Macy #define ADVERTISED_1000baseT_Half (1 << 4) 249b6d90eb7SKip Macy #define ADVERTISED_1000baseT_Full (1 << 5) 250b6d90eb7SKip Macy #define ADVERTISED_Autoneg (1 << 6) 251b6d90eb7SKip Macy #define ADVERTISED_TP (1 << 7) 252b6d90eb7SKip Macy #define ADVERTISED_AUI (1 << 8) 253b6d90eb7SKip Macy #define ADVERTISED_MII (1 << 9) 254b6d90eb7SKip Macy #define ADVERTISED_FIBRE (1 << 10) 255b6d90eb7SKip Macy #define ADVERTISED_BNC (1 << 11) 256b6d90eb7SKip Macy #define ADVERTISED_10000baseT_Full (1 << 12) 257b6d90eb7SKip Macy #define ADVERTISED_Pause (1 << 13) 258b6d90eb7SKip Macy #define ADVERTISED_Asym_Pause (1 << 14) 259b6d90eb7SKip Macy 260b6d90eb7SKip Macy /* Enable or disable autonegotiation. If this is set to enable, 261b6d90eb7SKip Macy * the forced link modes above are completely ignored. 262b6d90eb7SKip Macy */ 263b6d90eb7SKip Macy #define AUTONEG_DISABLE 0x00 264b6d90eb7SKip Macy #define AUTONEG_ENABLE 0x01 265b6d90eb7SKip Macy 266b6d90eb7SKip Macy #define SPEED_10 10 267b6d90eb7SKip Macy #define SPEED_100 100 268b6d90eb7SKip Macy #define SPEED_1000 1000 269b6d90eb7SKip Macy #define SPEED_10000 10000 270b6d90eb7SKip Macy #define DUPLEX_HALF 0 271b6d90eb7SKip Macy #define DUPLEX_FULL 1 272b6d90eb7SKip Macy 273b6d90eb7SKip Macy #endif 274