1b6d90eb7SKip Macy /************************************************************************** 2b6d90eb7SKip Macy 346b0a854SKip Macy Copyright (c) 2007-2008, Chelsio Inc. 4b6d90eb7SKip Macy All rights reserved. 5b6d90eb7SKip Macy 6b6d90eb7SKip Macy Redistribution and use in source and binary forms, with or without 7b6d90eb7SKip Macy modification, are permitted provided that the following conditions are met: 8b6d90eb7SKip Macy 9b6d90eb7SKip Macy 1. Redistributions of source code must retain the above copyright notice, 10b6d90eb7SKip Macy this list of conditions and the following disclaimer. 11b6d90eb7SKip Macy 12d722cab4SKip Macy 2. Neither the name of the Chelsio Corporation nor the names of its 13b6d90eb7SKip Macy contributors may be used to endorse or promote products derived from 14b6d90eb7SKip Macy this software without specific prior written permission. 15b6d90eb7SKip Macy 16b6d90eb7SKip Macy THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17b6d90eb7SKip Macy AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18b6d90eb7SKip Macy IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19b6d90eb7SKip Macy ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20b6d90eb7SKip Macy LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21b6d90eb7SKip Macy CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22b6d90eb7SKip Macy SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23b6d90eb7SKip Macy INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24b6d90eb7SKip Macy CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25b6d90eb7SKip Macy ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26b6d90eb7SKip Macy POSSIBILITY OF SUCH DAMAGE. 27b6d90eb7SKip Macy 28b6d90eb7SKip Macy ***************************************************************************/ 29b6d90eb7SKip Macy 30b6d90eb7SKip Macy #include <sys/cdefs.h> 31b6d90eb7SKip Macy __FBSDID("$FreeBSD$"); 32b6d90eb7SKip Macy 33b6d90eb7SKip Macy #include <sys/param.h> 34b6d90eb7SKip Macy #include <sys/systm.h> 35b6d90eb7SKip Macy #include <sys/kernel.h> 36b6d90eb7SKip Macy #include <sys/bus.h> 37b6d90eb7SKip Macy #include <sys/module.h> 38b6d90eb7SKip Macy #include <sys/pciio.h> 39b6d90eb7SKip Macy #include <sys/conf.h> 40b6d90eb7SKip Macy #include <machine/bus.h> 41b6d90eb7SKip Macy #include <machine/resource.h> 42b6d90eb7SKip Macy #include <sys/bus_dma.h> 438e10660fSKip Macy #include <sys/ktr.h> 44b6d90eb7SKip Macy #include <sys/rman.h> 45b6d90eb7SKip Macy #include <sys/ioccom.h> 46b6d90eb7SKip Macy #include <sys/mbuf.h> 47b6d90eb7SKip Macy #include <sys/linker.h> 48b6d90eb7SKip Macy #include <sys/firmware.h> 49b6d90eb7SKip Macy #include <sys/socket.h> 50b6d90eb7SKip Macy #include <sys/sockio.h> 51b6d90eb7SKip Macy #include <sys/smp.h> 52b6d90eb7SKip Macy #include <sys/sysctl.h> 538090c9f5SKip Macy #include <sys/syslog.h> 54b6d90eb7SKip Macy #include <sys/queue.h> 55b6d90eb7SKip Macy #include <sys/taskqueue.h> 568090c9f5SKip Macy #include <sys/proc.h> 57b6d90eb7SKip Macy 58b6d90eb7SKip Macy #include <net/bpf.h> 59b6d90eb7SKip Macy #include <net/ethernet.h> 60b6d90eb7SKip Macy #include <net/if.h> 61b6d90eb7SKip Macy #include <net/if_arp.h> 62b6d90eb7SKip Macy #include <net/if_dl.h> 63b6d90eb7SKip Macy #include <net/if_media.h> 64b6d90eb7SKip Macy #include <net/if_types.h> 654af83c8cSKip Macy #include <net/if_vlan_var.h> 66b6d90eb7SKip Macy 67b6d90eb7SKip Macy #include <netinet/in_systm.h> 68b6d90eb7SKip Macy #include <netinet/in.h> 69b6d90eb7SKip Macy #include <netinet/if_ether.h> 70b6d90eb7SKip Macy #include <netinet/ip.h> 71b6d90eb7SKip Macy #include <netinet/ip.h> 72b6d90eb7SKip Macy #include <netinet/tcp.h> 73b6d90eb7SKip Macy #include <netinet/udp.h> 74b6d90eb7SKip Macy 75b6d90eb7SKip Macy #include <dev/pci/pcireg.h> 76b6d90eb7SKip Macy #include <dev/pci/pcivar.h> 77b6d90eb7SKip Macy #include <dev/pci/pci_private.h> 78b6d90eb7SKip Macy 7910faa568SKip Macy #ifdef CONFIG_DEFINED 8010faa568SKip Macy #include <cxgb_include.h> 8110faa568SKip Macy #else 8210faa568SKip Macy #include <dev/cxgb/cxgb_include.h> 8310faa568SKip Macy #endif 84b6d90eb7SKip Macy 85b6d90eb7SKip Macy #ifdef PRIV_SUPPORTED 86b6d90eb7SKip Macy #include <sys/priv.h> 87b6d90eb7SKip Macy #endif 88b6d90eb7SKip Macy 8981186fb4SKip Macy #ifdef IFNET_MULTIQUEUE 908090c9f5SKip Macy #include <machine/intr_machdep.h> 9181186fb4SKip Macy #endif 928090c9f5SKip Macy 93b6d90eb7SKip Macy static int cxgb_setup_msix(adapter_t *, int); 94ef72318fSKip Macy static void cxgb_teardown_msix(adapter_t *); 95b6d90eb7SKip Macy static void cxgb_init(void *); 96b6d90eb7SKip Macy static void cxgb_init_locked(struct port_info *); 9777f07749SKip Macy static void cxgb_stop_locked(struct port_info *); 98b6d90eb7SKip Macy static void cxgb_set_rxmode(struct port_info *); 99b6d90eb7SKip Macy static int cxgb_ioctl(struct ifnet *, unsigned long, caddr_t); 100b6d90eb7SKip Macy static int cxgb_media_change(struct ifnet *); 101b6d90eb7SKip Macy static void cxgb_media_status(struct ifnet *, struct ifmediareq *); 102b6d90eb7SKip Macy static int setup_sge_qsets(adapter_t *); 103b6d90eb7SKip Macy static void cxgb_async_intr(void *); 104b6d90eb7SKip Macy static void cxgb_ext_intr_handler(void *, int); 105bb38cd2fSKip Macy static void cxgb_tick_handler(void *, int); 106bb38cd2fSKip Macy static void cxgb_down_locked(struct adapter *sc); 107b6d90eb7SKip Macy static void cxgb_tick(void *); 108b6d90eb7SKip Macy static void setup_rss(adapter_t *sc); 109b6d90eb7SKip Macy 110b6d90eb7SKip Macy /* Attachment glue for the PCI controller end of the device. Each port of 111b6d90eb7SKip Macy * the device is attached separately, as defined later. 112b6d90eb7SKip Macy */ 113b6d90eb7SKip Macy static int cxgb_controller_probe(device_t); 114b6d90eb7SKip Macy static int cxgb_controller_attach(device_t); 115b6d90eb7SKip Macy static int cxgb_controller_detach(device_t); 116b6d90eb7SKip Macy static void cxgb_free(struct adapter *); 117b6d90eb7SKip Macy static __inline void reg_block_dump(struct adapter *ap, uint8_t *buf, unsigned int start, 118b6d90eb7SKip Macy unsigned int end); 119b6d90eb7SKip Macy static void cxgb_get_regs(adapter_t *sc, struct ifconf_regs *regs, uint8_t *buf); 120b6d90eb7SKip Macy static int cxgb_get_regs_len(void); 121d722cab4SKip Macy static int offload_open(struct port_info *pi); 1227ac2e6c3SKip Macy static void touch_bars(device_t dev); 1233e96c7e7SKip Macy static int offload_close(struct t3cdev *tdev); 1248e10660fSKip Macy static void cxgb_link_start(struct port_info *p); 125b6d90eb7SKip Macy 126b6d90eb7SKip Macy static device_method_t cxgb_controller_methods[] = { 127b6d90eb7SKip Macy DEVMETHOD(device_probe, cxgb_controller_probe), 128b6d90eb7SKip Macy DEVMETHOD(device_attach, cxgb_controller_attach), 129b6d90eb7SKip Macy DEVMETHOD(device_detach, cxgb_controller_detach), 130b6d90eb7SKip Macy 131b6d90eb7SKip Macy /* bus interface */ 132b6d90eb7SKip Macy DEVMETHOD(bus_print_child, bus_generic_print_child), 133b6d90eb7SKip Macy DEVMETHOD(bus_driver_added, bus_generic_driver_added), 134b6d90eb7SKip Macy 135b6d90eb7SKip Macy { 0, 0 } 136b6d90eb7SKip Macy }; 137b6d90eb7SKip Macy 138b6d90eb7SKip Macy static driver_t cxgb_controller_driver = { 139b6d90eb7SKip Macy "cxgbc", 140b6d90eb7SKip Macy cxgb_controller_methods, 141b6d90eb7SKip Macy sizeof(struct adapter) 142b6d90eb7SKip Macy }; 143b6d90eb7SKip Macy 144b6d90eb7SKip Macy static devclass_t cxgb_controller_devclass; 145b6d90eb7SKip Macy DRIVER_MODULE(cxgbc, pci, cxgb_controller_driver, cxgb_controller_devclass, 0, 0); 146b6d90eb7SKip Macy 147b6d90eb7SKip Macy /* 148b6d90eb7SKip Macy * Attachment glue for the ports. Attachment is done directly to the 149b6d90eb7SKip Macy * controller device. 150b6d90eb7SKip Macy */ 151b6d90eb7SKip Macy static int cxgb_port_probe(device_t); 152b6d90eb7SKip Macy static int cxgb_port_attach(device_t); 153b6d90eb7SKip Macy static int cxgb_port_detach(device_t); 154b6d90eb7SKip Macy 155b6d90eb7SKip Macy static device_method_t cxgb_port_methods[] = { 156b6d90eb7SKip Macy DEVMETHOD(device_probe, cxgb_port_probe), 157b6d90eb7SKip Macy DEVMETHOD(device_attach, cxgb_port_attach), 158b6d90eb7SKip Macy DEVMETHOD(device_detach, cxgb_port_detach), 159b6d90eb7SKip Macy { 0, 0 } 160b6d90eb7SKip Macy }; 161b6d90eb7SKip Macy 162b6d90eb7SKip Macy static driver_t cxgb_port_driver = { 163b6d90eb7SKip Macy "cxgb", 164b6d90eb7SKip Macy cxgb_port_methods, 165b6d90eb7SKip Macy 0 166b6d90eb7SKip Macy }; 167b6d90eb7SKip Macy 168b6d90eb7SKip Macy static d_ioctl_t cxgb_extension_ioctl; 169ef72318fSKip Macy static d_open_t cxgb_extension_open; 170ef72318fSKip Macy static d_close_t cxgb_extension_close; 171ef72318fSKip Macy 172ef72318fSKip Macy static struct cdevsw cxgb_cdevsw = { 173ef72318fSKip Macy .d_version = D_VERSION, 174ef72318fSKip Macy .d_flags = 0, 175ef72318fSKip Macy .d_open = cxgb_extension_open, 176ef72318fSKip Macy .d_close = cxgb_extension_close, 177ef72318fSKip Macy .d_ioctl = cxgb_extension_ioctl, 178ef72318fSKip Macy .d_name = "cxgb", 179ef72318fSKip Macy }; 180b6d90eb7SKip Macy 181b6d90eb7SKip Macy static devclass_t cxgb_port_devclass; 182b6d90eb7SKip Macy DRIVER_MODULE(cxgb, cxgbc, cxgb_port_driver, cxgb_port_devclass, 0, 0); 183b6d90eb7SKip Macy 184b6d90eb7SKip Macy #define SGE_MSIX_COUNT (SGE_QSETS + 1) 185b6d90eb7SKip Macy 186b6d90eb7SKip Macy /* 187b6d90eb7SKip Macy * The driver uses the best interrupt scheme available on a platform in the 188b6d90eb7SKip Macy * order MSI-X, MSI, legacy pin interrupts. This parameter determines which 189b6d90eb7SKip Macy * of these schemes the driver may consider as follows: 190b6d90eb7SKip Macy * 191b6d90eb7SKip Macy * msi = 2: choose from among all three options 192b6d90eb7SKip Macy * msi = 1 : only consider MSI and pin interrupts 193b6d90eb7SKip Macy * msi = 0: force pin interrupts 194b6d90eb7SKip Macy */ 195693d746cSKip Macy static int msi_allowed = 2; 196cebf6b9fSKip Macy 197b6d90eb7SKip Macy TUNABLE_INT("hw.cxgb.msi_allowed", &msi_allowed); 198b6d90eb7SKip Macy SYSCTL_NODE(_hw, OID_AUTO, cxgb, CTLFLAG_RD, 0, "CXGB driver parameters"); 199b6d90eb7SKip Macy SYSCTL_UINT(_hw_cxgb, OID_AUTO, msi_allowed, CTLFLAG_RDTUN, &msi_allowed, 0, 200b6d90eb7SKip Macy "MSI-X, MSI, INTx selector"); 201d722cab4SKip Macy 20264c43db5SKip Macy /* 203d722cab4SKip Macy * The driver enables offload as a default. 204d722cab4SKip Macy * To disable it, use ofld_disable = 1. 205d722cab4SKip Macy */ 206d722cab4SKip Macy static int ofld_disable = 0; 207d722cab4SKip Macy TUNABLE_INT("hw.cxgb.ofld_disable", &ofld_disable); 208d722cab4SKip Macy SYSCTL_UINT(_hw_cxgb, OID_AUTO, ofld_disable, CTLFLAG_RDTUN, &ofld_disable, 0, 209d722cab4SKip Macy "disable ULP offload"); 210d722cab4SKip Macy 211d722cab4SKip Macy /* 212d722cab4SKip Macy * The driver uses an auto-queue algorithm by default. 213d722cab4SKip Macy * To disable it and force a single queue-set per port, use singleq = 1. 21464c43db5SKip Macy */ 2158090c9f5SKip Macy static int singleq = 0; 216d722cab4SKip Macy TUNABLE_INT("hw.cxgb.singleq", &singleq); 217d722cab4SKip Macy SYSCTL_UINT(_hw_cxgb, OID_AUTO, singleq, CTLFLAG_RDTUN, &singleq, 0, 218d722cab4SKip Macy "use a single queue-set per port"); 219b6d90eb7SKip Macy 220f001b63dSKip Macy 221404825a7SKip Macy /* 222404825a7SKip Macy * The driver uses an auto-queue algorithm by default. 223404825a7SKip Macy * To disable it and force a single queue-set per port, use singleq = 1. 224404825a7SKip Macy */ 225404825a7SKip Macy static int force_fw_update = 0; 226404825a7SKip Macy TUNABLE_INT("hw.cxgb.force_fw_update", &force_fw_update); 227404825a7SKip Macy SYSCTL_UINT(_hw_cxgb, OID_AUTO, force_fw_update, CTLFLAG_RDTUN, &force_fw_update, 0, 228404825a7SKip Macy "update firmware even if up to date"); 229f001b63dSKip Macy 230f001b63dSKip Macy int cxgb_use_16k_clusters = 0; 231f001b63dSKip Macy TUNABLE_INT("hw.cxgb.use_16k_clusters", &cxgb_use_16k_clusters); 232f001b63dSKip Macy SYSCTL_UINT(_hw_cxgb, OID_AUTO, use_16k_clusters, CTLFLAG_RDTUN, 233f001b63dSKip Macy &cxgb_use_16k_clusters, 0, "use 16kB clusters for the jumbo queue "); 234f001b63dSKip Macy 235b6d90eb7SKip Macy enum { 236b6d90eb7SKip Macy MAX_TXQ_ENTRIES = 16384, 237b6d90eb7SKip Macy MAX_CTRL_TXQ_ENTRIES = 1024, 238b6d90eb7SKip Macy MAX_RSPQ_ENTRIES = 16384, 239b6d90eb7SKip Macy MAX_RX_BUFFERS = 16384, 240b6d90eb7SKip Macy MAX_RX_JUMBO_BUFFERS = 16384, 241b6d90eb7SKip Macy MIN_TXQ_ENTRIES = 4, 242b6d90eb7SKip Macy MIN_CTRL_TXQ_ENTRIES = 4, 243b6d90eb7SKip Macy MIN_RSPQ_ENTRIES = 32, 2445c5df3daSKip Macy MIN_FL_ENTRIES = 32, 2455c5df3daSKip Macy MIN_FL_JUMBO_ENTRIES = 32 246b6d90eb7SKip Macy }; 247b6d90eb7SKip Macy 248ac3a6d9cSKip Macy struct filter_info { 249ac3a6d9cSKip Macy u32 sip; 250ac3a6d9cSKip Macy u32 sip_mask; 251ac3a6d9cSKip Macy u32 dip; 252ac3a6d9cSKip Macy u16 sport; 253ac3a6d9cSKip Macy u16 dport; 254ac3a6d9cSKip Macy u32 vlan:12; 255ac3a6d9cSKip Macy u32 vlan_prio:3; 256ac3a6d9cSKip Macy u32 mac_hit:1; 257ac3a6d9cSKip Macy u32 mac_idx:4; 258ac3a6d9cSKip Macy u32 mac_vld:1; 259ac3a6d9cSKip Macy u32 pkt_type:2; 260ac3a6d9cSKip Macy u32 report_filter_id:1; 261ac3a6d9cSKip Macy u32 pass:1; 262ac3a6d9cSKip Macy u32 rss:1; 263ac3a6d9cSKip Macy u32 qset:3; 264ac3a6d9cSKip Macy u32 locked:1; 265ac3a6d9cSKip Macy u32 valid:1; 266ac3a6d9cSKip Macy }; 267ac3a6d9cSKip Macy 268ac3a6d9cSKip Macy enum { FILTER_NO_VLAN_PRI = 7 }; 269ac3a6d9cSKip Macy 270b6d90eb7SKip Macy #define PORT_MASK ((1 << MAX_NPORTS) - 1) 271b6d90eb7SKip Macy 272b6d90eb7SKip Macy /* Table for probing the cards. The desc field isn't actually used */ 273b6d90eb7SKip Macy struct cxgb_ident { 274b6d90eb7SKip Macy uint16_t vendor; 275b6d90eb7SKip Macy uint16_t device; 276b6d90eb7SKip Macy int index; 277b6d90eb7SKip Macy char *desc; 278b6d90eb7SKip Macy } cxgb_identifiers[] = { 279b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0020, 0, "PE9000"}, 280b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0021, 1, "T302E"}, 281b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0022, 2, "T310E"}, 282b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0023, 3, "T320X"}, 283b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0024, 1, "T302X"}, 284b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0025, 3, "T320E"}, 285b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0026, 2, "T310X"}, 286b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0030, 2, "T3B10"}, 287b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0031, 3, "T3B20"}, 288b6d90eb7SKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0032, 1, "T3B02"}, 289ef72318fSKip Macy {PCI_VENDOR_ID_CHELSIO, 0x0033, 4, "T3B04"}, 290b6d90eb7SKip Macy {0, 0, 0, NULL} 291b6d90eb7SKip Macy }; 292b6d90eb7SKip Macy 293ac3a6d9cSKip Macy static int set_eeprom(struct port_info *pi, const uint8_t *data, int len, int offset); 294ac3a6d9cSKip Macy 2958e10660fSKip Macy 2968e10660fSKip Macy void 2978e10660fSKip Macy cxgb_log_tcb(struct adapter *sc, unsigned int tid) 2988e10660fSKip Macy { 2998e10660fSKip Macy char buf[TCB_SIZE]; 3008e10660fSKip Macy uint64_t *tcb = (uint64_t *)buf; 3018e10660fSKip Macy int i, error; 3028e10660fSKip Macy struct mc7 *mem = &sc->cm; 3038e10660fSKip Macy 3048e10660fSKip Macy error = t3_mc7_bd_read(mem, tid*TCB_SIZE/8, TCB_SIZE/8, tcb); 3058e10660fSKip Macy if (error) 3068e10660fSKip Macy printf("cxgb_tcb_log failed\n"); 3078e10660fSKip Macy 3088e10660fSKip Macy CTR1(KTR_CXGB, "TCB tid=%u", tid); 3098e10660fSKip Macy for (i = 0; i < TCB_SIZE / 32; i++) { 3108e10660fSKip Macy CTR5(KTR_CXGB, "%1d: %08x %08x %08x %08x", 3118e10660fSKip Macy i, (uint32_t)tcb[1], (uint32_t)(tcb[1] >> 32), 3128e10660fSKip Macy (uint32_t)tcb[0], (uint32_t)(tcb[0] >> 32)); 3138e10660fSKip Macy tcb += 2; 3148e10660fSKip Macy CTR4(KTR_CXGB, " %08x %08x %08x %08x", 3158e10660fSKip Macy (uint32_t)tcb[1], (uint32_t)(tcb[1] >> 32), 3168e10660fSKip Macy (uint32_t)tcb[0], (uint32_t)(tcb[0] >> 32)); 3178e10660fSKip Macy tcb += 2; 3188e10660fSKip Macy } 3198e10660fSKip Macy } 3208e10660fSKip Macy 3218090c9f5SKip Macy static __inline char 322ac3a6d9cSKip Macy t3rev2char(struct adapter *adapter) 323ac3a6d9cSKip Macy { 324ac3a6d9cSKip Macy char rev = 'z'; 325ac3a6d9cSKip Macy 326ac3a6d9cSKip Macy switch(adapter->params.rev) { 327ac3a6d9cSKip Macy case T3_REV_A: 328ac3a6d9cSKip Macy rev = 'a'; 329ac3a6d9cSKip Macy break; 330ac3a6d9cSKip Macy case T3_REV_B: 331ac3a6d9cSKip Macy case T3_REV_B2: 332ac3a6d9cSKip Macy rev = 'b'; 333ac3a6d9cSKip Macy break; 334ac3a6d9cSKip Macy case T3_REV_C: 335ac3a6d9cSKip Macy rev = 'c'; 336ac3a6d9cSKip Macy break; 337ac3a6d9cSKip Macy } 338ac3a6d9cSKip Macy return rev; 339ac3a6d9cSKip Macy } 340ac3a6d9cSKip Macy 341b6d90eb7SKip Macy static struct cxgb_ident * 342b6d90eb7SKip Macy cxgb_get_ident(device_t dev) 343b6d90eb7SKip Macy { 344b6d90eb7SKip Macy struct cxgb_ident *id; 345b6d90eb7SKip Macy 346b6d90eb7SKip Macy for (id = cxgb_identifiers; id->desc != NULL; id++) { 347b6d90eb7SKip Macy if ((id->vendor == pci_get_vendor(dev)) && 348b6d90eb7SKip Macy (id->device == pci_get_device(dev))) { 349b6d90eb7SKip Macy return (id); 350b6d90eb7SKip Macy } 351b6d90eb7SKip Macy } 352b6d90eb7SKip Macy return (NULL); 353b6d90eb7SKip Macy } 354b6d90eb7SKip Macy 355b6d90eb7SKip Macy static const struct adapter_info * 356b6d90eb7SKip Macy cxgb_get_adapter_info(device_t dev) 357b6d90eb7SKip Macy { 358b6d90eb7SKip Macy struct cxgb_ident *id; 359b6d90eb7SKip Macy const struct adapter_info *ai; 360b6d90eb7SKip Macy 361b6d90eb7SKip Macy id = cxgb_get_ident(dev); 362b6d90eb7SKip Macy if (id == NULL) 363b6d90eb7SKip Macy return (NULL); 364b6d90eb7SKip Macy 365b6d90eb7SKip Macy ai = t3_get_adapter_info(id->index); 366b6d90eb7SKip Macy 367b6d90eb7SKip Macy return (ai); 368b6d90eb7SKip Macy } 369b6d90eb7SKip Macy 370b6d90eb7SKip Macy static int 371b6d90eb7SKip Macy cxgb_controller_probe(device_t dev) 372b6d90eb7SKip Macy { 373b6d90eb7SKip Macy const struct adapter_info *ai; 374b6d90eb7SKip Macy char *ports, buf[80]; 375ef72318fSKip Macy int nports; 376b6d90eb7SKip Macy 377b6d90eb7SKip Macy ai = cxgb_get_adapter_info(dev); 378b6d90eb7SKip Macy if (ai == NULL) 379b6d90eb7SKip Macy return (ENXIO); 380b6d90eb7SKip Macy 381ef72318fSKip Macy nports = ai->nports0 + ai->nports1; 382ef72318fSKip Macy if (nports == 1) 383b6d90eb7SKip Macy ports = "port"; 384b6d90eb7SKip Macy else 385b6d90eb7SKip Macy ports = "ports"; 386b6d90eb7SKip Macy 387ef72318fSKip Macy snprintf(buf, sizeof(buf), "%s RNIC, %d %s", ai->desc, nports, ports); 388b6d90eb7SKip Macy device_set_desc_copy(dev, buf); 389b6d90eb7SKip Macy return (BUS_PROBE_DEFAULT); 390b6d90eb7SKip Macy } 391b6d90eb7SKip Macy 392404825a7SKip Macy #define FW_FNAME "cxgb_t3fw" 39364a37133SKip Macy #define TPEEPROM_NAME "t3b_tp_eeprom" 39464a37133SKip Macy #define TPSRAM_NAME "t3b_protocol_sram" 395ac3a6d9cSKip Macy 396b6d90eb7SKip Macy static int 397d722cab4SKip Macy upgrade_fw(adapter_t *sc) 398b6d90eb7SKip Macy { 399b6d90eb7SKip Macy #ifdef FIRMWARE_LATEST 400b6d90eb7SKip Macy const struct firmware *fw; 401b6d90eb7SKip Macy #else 402b6d90eb7SKip Macy struct firmware *fw; 403b6d90eb7SKip Macy #endif 404b6d90eb7SKip Macy int status; 405b6d90eb7SKip Macy 406404825a7SKip Macy if ((fw = firmware_get(FW_FNAME)) == NULL) { 407404825a7SKip Macy device_printf(sc->dev, "Could not find firmware image %s\n", FW_FNAME); 408d722cab4SKip Macy return (ENOENT); 409ac3a6d9cSKip Macy } else 410404825a7SKip Macy device_printf(sc->dev, "updating firmware on card\n"); 411b6d90eb7SKip Macy status = t3_load_fw(sc, (const uint8_t *)fw->data, fw->datasize); 412b6d90eb7SKip Macy 413ac3a6d9cSKip Macy device_printf(sc->dev, "firmware update returned %s %d\n", (status == 0) ? "success" : "fail", status); 414ac3a6d9cSKip Macy 415b6d90eb7SKip Macy firmware_put(fw, FIRMWARE_UNLOAD); 416b6d90eb7SKip Macy 417b6d90eb7SKip Macy return (status); 418b6d90eb7SKip Macy } 419b6d90eb7SKip Macy 420b6d90eb7SKip Macy static int 421b6d90eb7SKip Macy cxgb_controller_attach(device_t dev) 422b6d90eb7SKip Macy { 423b6d90eb7SKip Macy device_t child; 424b6d90eb7SKip Macy const struct adapter_info *ai; 425b6d90eb7SKip Macy struct adapter *sc; 4262de1fa86SKip Macy int i, error = 0; 427b6d90eb7SKip Macy uint32_t vers; 428693d746cSKip Macy int port_qsets = 1; 4297aff6d8eSKip Macy #ifdef MSI_SUPPORTED 4302de1fa86SKip Macy int msi_needed, reg; 4317aff6d8eSKip Macy #endif 4328e10660fSKip Macy int must_load = 0; 433b6d90eb7SKip Macy sc = device_get_softc(dev); 434b6d90eb7SKip Macy sc->dev = dev; 435d722cab4SKip Macy sc->msi_count = 0; 4362de1fa86SKip Macy ai = cxgb_get_adapter_info(dev); 437b6d90eb7SKip Macy 4382de1fa86SKip Macy /* 4392de1fa86SKip Macy * XXX not really related but a recent addition 4402de1fa86SKip Macy */ 4412de1fa86SKip Macy #ifdef MSI_SUPPORTED 442fc01c613SKip Macy /* find the PCIe link width and set max read request to 4KB*/ 443fc01c613SKip Macy if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) { 444fc01c613SKip Macy uint16_t lnk, pectl; 445fc01c613SKip Macy lnk = pci_read_config(dev, reg + 0x12, 2); 446fc01c613SKip Macy sc->link_width = (lnk >> 4) & 0x3f; 447fc01c613SKip Macy 448fc01c613SKip Macy pectl = pci_read_config(dev, reg + 0x8, 2); 449fc01c613SKip Macy pectl = (pectl & ~0x7000) | (5 << 12); 450fc01c613SKip Macy pci_write_config(dev, reg + 0x8, pectl, 2); 451fc01c613SKip Macy } 452ac3a6d9cSKip Macy 453ac3a6d9cSKip Macy if (sc->link_width != 0 && sc->link_width <= 4 && 454ac3a6d9cSKip Macy (ai->nports0 + ai->nports1) <= 2) { 455fc01c613SKip Macy device_printf(sc->dev, 456ac6b4cf1SKip Macy "PCIe x%d Link, expect reduced performance\n", 457fc01c613SKip Macy sc->link_width); 458fc01c613SKip Macy } 4592de1fa86SKip Macy #endif 4607ac2e6c3SKip Macy touch_bars(dev); 461b6d90eb7SKip Macy pci_enable_busmaster(dev); 462b6d90eb7SKip Macy /* 463b6d90eb7SKip Macy * Allocate the registers and make them available to the driver. 464b6d90eb7SKip Macy * The registers that we care about for NIC mode are in BAR 0 465b6d90eb7SKip Macy */ 466b6d90eb7SKip Macy sc->regs_rid = PCIR_BAR(0); 467b6d90eb7SKip Macy if ((sc->regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 468b6d90eb7SKip Macy &sc->regs_rid, RF_ACTIVE)) == NULL) { 4698e10660fSKip Macy device_printf(dev, "Cannot allocate BAR region 0\n"); 470b6d90eb7SKip Macy return (ENXIO); 471b6d90eb7SKip Macy } 4728e10660fSKip Macy sc->udbs_rid = PCIR_BAR(2); 4738e10660fSKip Macy if ((sc->udbs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 4748e10660fSKip Macy &sc->udbs_rid, RF_ACTIVE)) == NULL) { 4758e10660fSKip Macy device_printf(dev, "Cannot allocate BAR region 1\n"); 4768e10660fSKip Macy error = ENXIO; 4778e10660fSKip Macy goto out; 4788e10660fSKip Macy } 479b6d90eb7SKip Macy 480bb38cd2fSKip Macy snprintf(sc->lockbuf, ADAPTER_LOCK_NAME_LEN, "cxgb controller lock %d", 481bb38cd2fSKip Macy device_get_unit(dev)); 482bb38cd2fSKip Macy ADAPTER_LOCK_INIT(sc, sc->lockbuf); 483bb38cd2fSKip Macy 484bb38cd2fSKip Macy snprintf(sc->reglockbuf, ADAPTER_LOCK_NAME_LEN, "SGE reg lock %d", 485bb38cd2fSKip Macy device_get_unit(dev)); 486bb38cd2fSKip Macy snprintf(sc->mdiolockbuf, ADAPTER_LOCK_NAME_LEN, "cxgb mdio lock %d", 487bb38cd2fSKip Macy device_get_unit(dev)); 488bb38cd2fSKip Macy snprintf(sc->elmerlockbuf, ADAPTER_LOCK_NAME_LEN, "cxgb elmer lock %d", 489bb38cd2fSKip Macy device_get_unit(dev)); 490bb38cd2fSKip Macy 4918e10660fSKip Macy MTX_INIT(&sc->sge.reg_lock, sc->reglockbuf, NULL, MTX_SPIN); 492bb38cd2fSKip Macy MTX_INIT(&sc->mdio_lock, sc->mdiolockbuf, NULL, MTX_DEF); 493bb38cd2fSKip Macy MTX_INIT(&sc->elmer_lock, sc->elmerlockbuf, NULL, MTX_DEF); 494b6d90eb7SKip Macy 495b6d90eb7SKip Macy sc->bt = rman_get_bustag(sc->regs_res); 496b6d90eb7SKip Macy sc->bh = rman_get_bushandle(sc->regs_res); 497b6d90eb7SKip Macy sc->mmio_len = rman_get_size(sc->regs_res); 498b6d90eb7SKip Macy 49924cdd067SKip Macy if (t3_prep_adapter(sc, ai, 1) < 0) { 500ef72318fSKip Macy printf("prep adapter failed\n"); 50124cdd067SKip Macy error = ENODEV; 50224cdd067SKip Macy goto out; 50324cdd067SKip Macy } 504b6d90eb7SKip Macy /* Allocate the BAR for doing MSI-X. If it succeeds, try to allocate 505b6d90eb7SKip Macy * enough messages for the queue sets. If that fails, try falling 506b6d90eb7SKip Macy * back to MSI. If that fails, then try falling back to the legacy 507b6d90eb7SKip Macy * interrupt pin model. 508b6d90eb7SKip Macy */ 509b6d90eb7SKip Macy #ifdef MSI_SUPPORTED 510693d746cSKip Macy 511b6d90eb7SKip Macy sc->msix_regs_rid = 0x20; 512b6d90eb7SKip Macy if ((msi_allowed >= 2) && 513b6d90eb7SKip Macy (sc->msix_regs_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 514b6d90eb7SKip Macy &sc->msix_regs_rid, RF_ACTIVE)) != NULL) { 515b6d90eb7SKip Macy 516d722cab4SKip Macy msi_needed = sc->msi_count = SGE_MSIX_COUNT; 517693d746cSKip Macy 518d722cab4SKip Macy if (((error = pci_alloc_msix(dev, &sc->msi_count)) != 0) || 519d722cab4SKip Macy (sc->msi_count != msi_needed)) { 520d722cab4SKip Macy device_printf(dev, "msix allocation failed - msi_count = %d" 521d722cab4SKip Macy " msi_needed=%d will try msi err=%d\n", sc->msi_count, 522d722cab4SKip Macy msi_needed, error); 523d722cab4SKip Macy sc->msi_count = 0; 524b6d90eb7SKip Macy pci_release_msi(dev); 525b6d90eb7SKip Macy bus_release_resource(dev, SYS_RES_MEMORY, 526b6d90eb7SKip Macy sc->msix_regs_rid, sc->msix_regs_res); 527b6d90eb7SKip Macy sc->msix_regs_res = NULL; 528b6d90eb7SKip Macy } else { 529b6d90eb7SKip Macy sc->flags |= USING_MSIX; 530f0a542f8SKip Macy sc->cxgb_intr = t3_intr_msix; 531b6d90eb7SKip Macy } 532b6d90eb7SKip Macy } 533b6d90eb7SKip Macy 534d722cab4SKip Macy if ((msi_allowed >= 1) && (sc->msi_count == 0)) { 535d722cab4SKip Macy sc->msi_count = 1; 536d722cab4SKip Macy if (pci_alloc_msi(dev, &sc->msi_count)) { 537693d746cSKip Macy device_printf(dev, "alloc msi failed - will try INTx\n"); 538d722cab4SKip Macy sc->msi_count = 0; 539b6d90eb7SKip Macy pci_release_msi(dev); 540b6d90eb7SKip Macy } else { 541b6d90eb7SKip Macy sc->flags |= USING_MSI; 542b6d90eb7SKip Macy sc->irq_rid = 1; 543f0a542f8SKip Macy sc->cxgb_intr = t3_intr_msi; 544b6d90eb7SKip Macy } 545b6d90eb7SKip Macy } 546b6d90eb7SKip Macy #endif 547d722cab4SKip Macy if (sc->msi_count == 0) { 548693d746cSKip Macy device_printf(dev, "using line interrupts\n"); 549b6d90eb7SKip Macy sc->irq_rid = 0; 550f0a542f8SKip Macy sc->cxgb_intr = t3b_intr; 551b6d90eb7SKip Macy } 552b6d90eb7SKip Macy 553f705d735SKip Macy if ((sc->flags & USING_MSIX) && !singleq) 554f705d735SKip Macy port_qsets = min((SGE_QSETS/(sc)->params.nports), mp_ncpus); 555b6d90eb7SKip Macy 556b6d90eb7SKip Macy /* Create a private taskqueue thread for handling driver events */ 557b6d90eb7SKip Macy #ifdef TASKQUEUE_CURRENT 558b6d90eb7SKip Macy sc->tq = taskqueue_create("cxgb_taskq", M_NOWAIT, 559b6d90eb7SKip Macy taskqueue_thread_enqueue, &sc->tq); 560b6d90eb7SKip Macy #else 561b6d90eb7SKip Macy sc->tq = taskqueue_create_fast("cxgb_taskq", M_NOWAIT, 562b6d90eb7SKip Macy taskqueue_thread_enqueue, &sc->tq); 563b6d90eb7SKip Macy #endif 564b6d90eb7SKip Macy if (sc->tq == NULL) { 565b6d90eb7SKip Macy device_printf(dev, "failed to allocate controller task queue\n"); 566b6d90eb7SKip Macy goto out; 567b6d90eb7SKip Macy } 568b6d90eb7SKip Macy 569b6d90eb7SKip Macy taskqueue_start_threads(&sc->tq, 1, PI_NET, "%s taskq", 570b6d90eb7SKip Macy device_get_nameunit(dev)); 571b6d90eb7SKip Macy TASK_INIT(&sc->ext_intr_task, 0, cxgb_ext_intr_handler, sc); 572bb38cd2fSKip Macy TASK_INIT(&sc->tick_task, 0, cxgb_tick_handler, sc); 573b6d90eb7SKip Macy 574b6d90eb7SKip Macy 575b6d90eb7SKip Macy /* Create a periodic callout for checking adapter status */ 576bb38cd2fSKip Macy callout_init(&sc->cxgb_tick_ch, TRUE); 577b6d90eb7SKip Macy 578404825a7SKip Macy if ((t3_check_fw_version(sc, &must_load) != 0 && must_load) || force_fw_update) { 579b6d90eb7SKip Macy /* 580b6d90eb7SKip Macy * Warn user that a firmware update will be attempted in init. 581b6d90eb7SKip Macy */ 582d722cab4SKip Macy device_printf(dev, "firmware needs to be updated to version %d.%d.%d\n", 583d722cab4SKip Macy FW_VERSION_MAJOR, FW_VERSION_MINOR, FW_VERSION_MICRO); 584b6d90eb7SKip Macy sc->flags &= ~FW_UPTODATE; 585b6d90eb7SKip Macy } else { 586b6d90eb7SKip Macy sc->flags |= FW_UPTODATE; 587b6d90eb7SKip Macy } 588b6d90eb7SKip Macy 5898e10660fSKip Macy if (t3_check_tpsram_version(sc, &must_load) != 0 && must_load) { 590ac3a6d9cSKip Macy /* 591ac3a6d9cSKip Macy * Warn user that a firmware update will be attempted in init. 592ac3a6d9cSKip Macy */ 593ac3a6d9cSKip Macy device_printf(dev, "SRAM needs to be updated to version %c-%d.%d.%d\n", 594ac3a6d9cSKip Macy t3rev2char(sc), TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO); 595ac3a6d9cSKip Macy sc->flags &= ~TPS_UPTODATE; 596ac3a6d9cSKip Macy } else { 597ac3a6d9cSKip Macy sc->flags |= TPS_UPTODATE; 598ac3a6d9cSKip Macy } 599ac3a6d9cSKip Macy 600b6d90eb7SKip Macy /* 601b6d90eb7SKip Macy * Create a child device for each MAC. The ethernet attachment 602b6d90eb7SKip Macy * will be done in these children. 603b6d90eb7SKip Macy */ 604693d746cSKip Macy for (i = 0; i < (sc)->params.nports; i++) { 6057ac2e6c3SKip Macy struct port_info *pi; 6067ac2e6c3SKip Macy 607b6d90eb7SKip Macy if ((child = device_add_child(dev, "cxgb", -1)) == NULL) { 608b6d90eb7SKip Macy device_printf(dev, "failed to add child port\n"); 609b6d90eb7SKip Macy error = EINVAL; 610b6d90eb7SKip Macy goto out; 611b6d90eb7SKip Macy } 6127ac2e6c3SKip Macy pi = &sc->port[i]; 6137ac2e6c3SKip Macy pi->adapter = sc; 6147ac2e6c3SKip Macy pi->nqsets = port_qsets; 6157ac2e6c3SKip Macy pi->first_qset = i*port_qsets; 6167ac2e6c3SKip Macy pi->port_id = i; 6177ac2e6c3SKip Macy pi->tx_chan = i >= ai->nports0; 6187ac2e6c3SKip Macy pi->txpkt_intf = pi->tx_chan ? 2 * (i - ai->nports0) + 1 : 2 * i; 6197ac2e6c3SKip Macy sc->rxpkt_map[pi->txpkt_intf] = i; 6208090c9f5SKip Macy sc->port[i].tx_chan = i >= ai->nports0; 621ac3a6d9cSKip Macy sc->portdev[i] = child; 6227ac2e6c3SKip Macy device_set_softc(child, pi); 623b6d90eb7SKip Macy } 624b6d90eb7SKip Macy if ((error = bus_generic_attach(dev)) != 0) 625b6d90eb7SKip Macy goto out; 626b6d90eb7SKip Macy 627b6d90eb7SKip Macy /* initialize sge private state */ 628ef72318fSKip Macy t3_sge_init_adapter(sc); 629b6d90eb7SKip Macy 630b6d90eb7SKip Macy t3_led_ready(sc); 631b6d90eb7SKip Macy 632d722cab4SKip Macy cxgb_offload_init(); 633d722cab4SKip Macy if (is_offload(sc)) { 634d722cab4SKip Macy setbit(&sc->registered_device_map, OFFLOAD_DEVMAP_BIT); 635d722cab4SKip Macy cxgb_adapter_ofld(sc); 636d722cab4SKip Macy } 637b6d90eb7SKip Macy error = t3_get_fw_version(sc, &vers); 638b6d90eb7SKip Macy if (error) 639b6d90eb7SKip Macy goto out; 640b6d90eb7SKip Macy 641d722cab4SKip Macy snprintf(&sc->fw_version[0], sizeof(sc->fw_version), "%d.%d.%d", 642d722cab4SKip Macy G_FW_VERSION_MAJOR(vers), G_FW_VERSION_MINOR(vers), 643d722cab4SKip Macy G_FW_VERSION_MICRO(vers)); 644b6d90eb7SKip Macy 6458e10660fSKip Macy device_printf(sc->dev, "Firmware Version %s\n", &sc->fw_version[0]); 646706cb31fSKip Macy callout_reset(&sc->cxgb_tick_ch, CXGB_TICKS(sc), cxgb_tick, sc); 6478090c9f5SKip Macy t3_add_attach_sysctls(sc); 648b6d90eb7SKip Macy out: 649b6d90eb7SKip Macy if (error) 650b6d90eb7SKip Macy cxgb_free(sc); 651b6d90eb7SKip Macy 652b6d90eb7SKip Macy return (error); 653b6d90eb7SKip Macy } 654b6d90eb7SKip Macy 655b6d90eb7SKip Macy static int 656b6d90eb7SKip Macy cxgb_controller_detach(device_t dev) 657b6d90eb7SKip Macy { 658b6d90eb7SKip Macy struct adapter *sc; 659b6d90eb7SKip Macy 660b6d90eb7SKip Macy sc = device_get_softc(dev); 661b6d90eb7SKip Macy 662b6d90eb7SKip Macy cxgb_free(sc); 663b6d90eb7SKip Macy 664b6d90eb7SKip Macy return (0); 665b6d90eb7SKip Macy } 666b6d90eb7SKip Macy 667b6d90eb7SKip Macy static void 668b6d90eb7SKip Macy cxgb_free(struct adapter *sc) 669b6d90eb7SKip Macy { 670b6d90eb7SKip Macy int i; 671b6d90eb7SKip Macy 6728e10660fSKip Macy ADAPTER_LOCK(sc); 6738e10660fSKip Macy sc->flags |= CXGB_SHUTDOWN; 6748e10660fSKip Macy ADAPTER_UNLOCK(sc); 6758090c9f5SKip Macy cxgb_pcpu_shutdown_threads(sc); 676bb38cd2fSKip Macy ADAPTER_LOCK(sc); 6778e10660fSKip Macy 678bb38cd2fSKip Macy /* 679bb38cd2fSKip Macy * drops the lock 680bb38cd2fSKip Macy */ 681bb38cd2fSKip Macy cxgb_down_locked(sc); 682d722cab4SKip Macy 683d722cab4SKip Macy #ifdef MSI_SUPPORTED 684d722cab4SKip Macy if (sc->flags & (USING_MSI | USING_MSIX)) { 685d722cab4SKip Macy device_printf(sc->dev, "releasing msi message(s)\n"); 686d722cab4SKip Macy pci_release_msi(sc->dev); 687d722cab4SKip Macy } else { 688d722cab4SKip Macy device_printf(sc->dev, "no msi message to release\n"); 689d722cab4SKip Macy } 690d722cab4SKip Macy #endif 691d722cab4SKip Macy if (sc->msix_regs_res != NULL) { 692d722cab4SKip Macy bus_release_resource(sc->dev, SYS_RES_MEMORY, sc->msix_regs_rid, 693d722cab4SKip Macy sc->msix_regs_res); 694d722cab4SKip Macy } 695d722cab4SKip Macy 6967ac2e6c3SKip Macy t3_sge_deinit_sw(sc); 6977ac2e6c3SKip Macy /* 6987ac2e6c3SKip Macy * Wait for last callout 6997ac2e6c3SKip Macy */ 700b6d90eb7SKip Macy 7018090c9f5SKip Macy DELAY(hz*100); 702bb38cd2fSKip Macy 703693d746cSKip Macy for (i = 0; i < (sc)->params.nports; ++i) { 704693d746cSKip Macy if (sc->portdev[i] != NULL) 705693d746cSKip Macy device_delete_child(sc->dev, sc->portdev[i]); 706693d746cSKip Macy } 707b6d90eb7SKip Macy 708b6d90eb7SKip Macy bus_generic_detach(sc->dev); 7098e10660fSKip Macy if (sc->tq != NULL) { 7107ac2e6c3SKip Macy taskqueue_free(sc->tq); 7118e10660fSKip Macy sc->tq = NULL; 7128e10660fSKip Macy } 7138e10660fSKip Macy 714d722cab4SKip Macy if (is_offload(sc)) { 715d722cab4SKip Macy cxgb_adapter_unofld(sc); 716d722cab4SKip Macy if (isset(&sc->open_device_map, OFFLOAD_DEVMAP_BIT)) 717d722cab4SKip Macy offload_close(&sc->tdev); 7188090c9f5SKip Macy else 7198090c9f5SKip Macy printf("cxgb_free: DEVMAP_BIT not set\n"); 7208090c9f5SKip Macy } else 7218090c9f5SKip Macy printf("not offloading set\n"); 72246b0a854SKip Macy #ifdef notyet 7238e10660fSKip Macy if (sc->flags & CXGB_OFLD_INIT) 7248e10660fSKip Macy cxgb_offload_deactivate(sc); 72546b0a854SKip Macy #endif 726ac3a6d9cSKip Macy free(sc->filters, M_DEVBUF); 727b6d90eb7SKip Macy t3_sge_free(sc); 728b6d90eb7SKip Macy 729bb38cd2fSKip Macy cxgb_offload_exit(); 730bb38cd2fSKip Macy 7318e10660fSKip Macy if (sc->udbs_res != NULL) 7328e10660fSKip Macy bus_release_resource(sc->dev, SYS_RES_MEMORY, sc->udbs_rid, 7338e10660fSKip Macy sc->udbs_res); 7348e10660fSKip Macy 735b6d90eb7SKip Macy if (sc->regs_res != NULL) 736b6d90eb7SKip Macy bus_release_resource(sc->dev, SYS_RES_MEMORY, sc->regs_rid, 737b6d90eb7SKip Macy sc->regs_res); 738b6d90eb7SKip Macy 739bb38cd2fSKip Macy MTX_DESTROY(&sc->mdio_lock); 740bb38cd2fSKip Macy MTX_DESTROY(&sc->sge.reg_lock); 741bb38cd2fSKip Macy MTX_DESTROY(&sc->elmer_lock); 742bb38cd2fSKip Macy ADAPTER_LOCK_DEINIT(sc); 743b6d90eb7SKip Macy } 744b6d90eb7SKip Macy 745b6d90eb7SKip Macy /** 746b6d90eb7SKip Macy * setup_sge_qsets - configure SGE Tx/Rx/response queues 747b6d90eb7SKip Macy * @sc: the controller softc 748b6d90eb7SKip Macy * 749b6d90eb7SKip Macy * Determines how many sets of SGE queues to use and initializes them. 750b6d90eb7SKip Macy * We support multiple queue sets per port if we have MSI-X, otherwise 751b6d90eb7SKip Macy * just one queue set per port. 752b6d90eb7SKip Macy */ 753b6d90eb7SKip Macy static int 754b6d90eb7SKip Macy setup_sge_qsets(adapter_t *sc) 755b6d90eb7SKip Macy { 7565c5df3daSKip Macy int i, j, err, irq_idx = 0, qset_idx = 0; 757d722cab4SKip Macy u_int ntxq = SGE_TXQ_PER_SET; 758b6d90eb7SKip Macy 759b6d90eb7SKip Macy if ((err = t3_sge_alloc(sc)) != 0) { 760693d746cSKip Macy device_printf(sc->dev, "t3_sge_alloc returned %d\n", err); 761b6d90eb7SKip Macy return (err); 762b6d90eb7SKip Macy } 763b6d90eb7SKip Macy 764b6d90eb7SKip Macy if (sc->params.rev > 0 && !(sc->flags & USING_MSI)) 765b6d90eb7SKip Macy irq_idx = -1; 766b6d90eb7SKip Macy 7675c5df3daSKip Macy for (i = 0; i < (sc)->params.nports; i++) { 768b6d90eb7SKip Macy struct port_info *pi = &sc->port[i]; 769b6d90eb7SKip Macy 7707ac2e6c3SKip Macy for (j = 0; j < pi->nqsets; j++, qset_idx++) { 771693d746cSKip Macy err = t3_sge_alloc_qset(sc, qset_idx, (sc)->params.nports, 772b6d90eb7SKip Macy (sc->flags & USING_MSIX) ? qset_idx + 1 : irq_idx, 773b6d90eb7SKip Macy &sc->params.sge.qset[qset_idx], ntxq, pi); 774b6d90eb7SKip Macy if (err) { 775b6d90eb7SKip Macy t3_free_sge_resources(sc); 7767ac2e6c3SKip Macy device_printf(sc->dev, "t3_sge_alloc_qset failed with %d\n", 7777ac2e6c3SKip Macy err); 778b6d90eb7SKip Macy return (err); 779b6d90eb7SKip Macy } 780b6d90eb7SKip Macy } 781b6d90eb7SKip Macy } 782b6d90eb7SKip Macy 783b6d90eb7SKip Macy return (0); 784b6d90eb7SKip Macy } 785b6d90eb7SKip Macy 786ef72318fSKip Macy static void 787ef72318fSKip Macy cxgb_teardown_msix(adapter_t *sc) 788ef72318fSKip Macy { 789ef72318fSKip Macy int i, nqsets; 790ef72318fSKip Macy 791ef72318fSKip Macy for (nqsets = i = 0; i < (sc)->params.nports; i++) 792ef72318fSKip Macy nqsets += sc->port[i].nqsets; 793ef72318fSKip Macy 794ef72318fSKip Macy for (i = 0; i < nqsets; i++) { 795ef72318fSKip Macy if (sc->msix_intr_tag[i] != NULL) { 796ef72318fSKip Macy bus_teardown_intr(sc->dev, sc->msix_irq_res[i], 797ef72318fSKip Macy sc->msix_intr_tag[i]); 798ef72318fSKip Macy sc->msix_intr_tag[i] = NULL; 799ef72318fSKip Macy } 800ef72318fSKip Macy if (sc->msix_irq_res[i] != NULL) { 801ef72318fSKip Macy bus_release_resource(sc->dev, SYS_RES_IRQ, 802ef72318fSKip Macy sc->msix_irq_rid[i], sc->msix_irq_res[i]); 803ef72318fSKip Macy sc->msix_irq_res[i] = NULL; 804ef72318fSKip Macy } 805ef72318fSKip Macy } 806ef72318fSKip Macy } 807ef72318fSKip Macy 808b6d90eb7SKip Macy static int 809b6d90eb7SKip Macy cxgb_setup_msix(adapter_t *sc, int msix_count) 810b6d90eb7SKip Macy { 811b6d90eb7SKip Macy int i, j, k, nqsets, rid; 812b6d90eb7SKip Macy 813b6d90eb7SKip Macy /* The first message indicates link changes and error conditions */ 814b6d90eb7SKip Macy sc->irq_rid = 1; 815b6d90eb7SKip Macy if ((sc->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, 816b6d90eb7SKip Macy &sc->irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 817b6d90eb7SKip Macy device_printf(sc->dev, "Cannot allocate msix interrupt\n"); 818b6d90eb7SKip Macy return (EINVAL); 819b6d90eb7SKip Macy } 820693d746cSKip Macy 821b6d90eb7SKip Macy if (bus_setup_intr(sc->dev, sc->irq_res, INTR_MPSAFE|INTR_TYPE_NET, 822b6d90eb7SKip Macy #ifdef INTR_FILTERS 823b6d90eb7SKip Macy NULL, 824b6d90eb7SKip Macy #endif 825b6d90eb7SKip Macy cxgb_async_intr, sc, &sc->intr_tag)) { 826b6d90eb7SKip Macy device_printf(sc->dev, "Cannot set up interrupt\n"); 827b6d90eb7SKip Macy return (EINVAL); 828b6d90eb7SKip Macy } 829ef72318fSKip Macy for (i = k = 0; i < (sc)->params.nports; i++) { 830b6d90eb7SKip Macy nqsets = sc->port[i].nqsets; 831ef72318fSKip Macy for (j = 0; j < nqsets; j++, k++) { 832b6d90eb7SKip Macy struct sge_qset *qs = &sc->sge.qs[k]; 833b6d90eb7SKip Macy 834b6d90eb7SKip Macy rid = k + 2; 835b6d90eb7SKip Macy if (cxgb_debug) 836b6d90eb7SKip Macy printf("rid=%d ", rid); 837b6d90eb7SKip Macy if ((sc->msix_irq_res[k] = bus_alloc_resource_any( 838b6d90eb7SKip Macy sc->dev, SYS_RES_IRQ, &rid, 839b6d90eb7SKip Macy RF_SHAREABLE | RF_ACTIVE)) == NULL) { 840b6d90eb7SKip Macy device_printf(sc->dev, "Cannot allocate " 841b6d90eb7SKip Macy "interrupt for message %d\n", rid); 842b6d90eb7SKip Macy return (EINVAL); 843b6d90eb7SKip Macy } 844b6d90eb7SKip Macy sc->msix_irq_rid[k] = rid; 845ef72318fSKip Macy if (bus_setup_intr(sc->dev, sc->msix_irq_res[k], 846b6d90eb7SKip Macy INTR_MPSAFE|INTR_TYPE_NET, 847b6d90eb7SKip Macy #ifdef INTR_FILTERS 848b6d90eb7SKip Macy NULL, 849b6d90eb7SKip Macy #endif 850b6d90eb7SKip Macy t3_intr_msix, qs, &sc->msix_intr_tag[k])) { 851b6d90eb7SKip Macy device_printf(sc->dev, "Cannot set up " 852b6d90eb7SKip Macy "interrupt for message %d\n", rid); 853b6d90eb7SKip Macy return (EINVAL); 854b6d90eb7SKip Macy } 8558090c9f5SKip Macy #ifdef IFNET_MULTIQUEUE 8568090c9f5SKip Macy if (singleq == 0) { 8578090c9f5SKip Macy int vector = rman_get_start(sc->msix_irq_res[k]); 8588090c9f5SKip Macy if (bootverbose) 8598090c9f5SKip Macy device_printf(sc->dev, "binding vector=%d to cpu=%d\n", vector, k % mp_ncpus); 8608090c9f5SKip Macy intr_bind(vector, k % mp_ncpus); 8618090c9f5SKip Macy } 8628090c9f5SKip Macy #endif 863b6d90eb7SKip Macy } 864b6d90eb7SKip Macy } 865693d746cSKip Macy 866b6d90eb7SKip Macy return (0); 867b6d90eb7SKip Macy } 868b6d90eb7SKip Macy 869b6d90eb7SKip Macy static int 870b6d90eb7SKip Macy cxgb_port_probe(device_t dev) 871b6d90eb7SKip Macy { 872b6d90eb7SKip Macy struct port_info *p; 873b6d90eb7SKip Macy char buf[80]; 8748e10660fSKip Macy const char *desc; 875b6d90eb7SKip Macy 876b6d90eb7SKip Macy p = device_get_softc(dev); 8778e10660fSKip Macy desc = p->phy.desc; 8788e10660fSKip Macy snprintf(buf, sizeof(buf), "Port %d %s", p->port_id, desc); 879b6d90eb7SKip Macy device_set_desc_copy(dev, buf); 880b6d90eb7SKip Macy return (0); 881b6d90eb7SKip Macy } 882b6d90eb7SKip Macy 883b6d90eb7SKip Macy 884b6d90eb7SKip Macy static int 885b6d90eb7SKip Macy cxgb_makedev(struct port_info *pi) 886b6d90eb7SKip Macy { 887b6d90eb7SKip Macy 888ef72318fSKip Macy pi->port_cdev = make_dev(&cxgb_cdevsw, pi->ifp->if_dunit, 889ef72318fSKip Macy UID_ROOT, GID_WHEEL, 0600, if_name(pi->ifp)); 890b6d90eb7SKip Macy 891b6d90eb7SKip Macy if (pi->port_cdev == NULL) 892b6d90eb7SKip Macy return (ENOMEM); 893b6d90eb7SKip Macy 894b6d90eb7SKip Macy pi->port_cdev->si_drv1 = (void *)pi; 895b6d90eb7SKip Macy 896b6d90eb7SKip Macy return (0); 897b6d90eb7SKip Macy } 898b6d90eb7SKip Macy 899b6d90eb7SKip Macy 900b6d90eb7SKip Macy #ifdef TSO_SUPPORTED 90125292debSKip Macy #define CXGB_CAP (IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU | IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | IFCAP_TSO | IFCAP_JUMBO_MTU | IFCAP_LRO) 902b6d90eb7SKip Macy /* Don't enable TSO6 yet */ 90325292debSKip Macy #define CXGB_CAP_ENABLE (IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU | IFCAP_HWCSUM | IFCAP_VLAN_HWCSUM | IFCAP_TSO4 | IFCAP_JUMBO_MTU | IFCAP_LRO) 904b6d90eb7SKip Macy #else 905b6d90eb7SKip Macy #define CXGB_CAP (IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU | IFCAP_HWCSUM | IFCAP_JUMBO_MTU) 906b6d90eb7SKip Macy /* Don't enable TSO6 yet */ 907b6d90eb7SKip Macy #define CXGB_CAP_ENABLE (IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU | IFCAP_HWCSUM | IFCAP_JUMBO_MTU) 908b6d90eb7SKip Macy #define IFCAP_TSO4 0x0 9097aff6d8eSKip Macy #define IFCAP_TSO6 0x0 910b6d90eb7SKip Macy #define CSUM_TSO 0x0 911b6d90eb7SKip Macy #endif 912b6d90eb7SKip Macy 913b6d90eb7SKip Macy 914b6d90eb7SKip Macy static int 915b6d90eb7SKip Macy cxgb_port_attach(device_t dev) 916b6d90eb7SKip Macy { 917b6d90eb7SKip Macy struct port_info *p; 918b6d90eb7SKip Macy struct ifnet *ifp; 919ef72318fSKip Macy int err, media_flags; 9208e10660fSKip Macy struct adapter *sc; 9218e10660fSKip Macy 922b6d90eb7SKip Macy 923b6d90eb7SKip Macy p = device_get_softc(dev); 9248e10660fSKip Macy sc = p->adapter; 925bb38cd2fSKip Macy snprintf(p->lockbuf, PORT_NAME_LEN, "cxgb port lock %d:%d", 9266b68e276SKip Macy device_get_unit(device_get_parent(dev)), p->port_id); 927bb38cd2fSKip Macy PORT_LOCK_INIT(p, p->lockbuf); 928b6d90eb7SKip Macy 929b6d90eb7SKip Macy /* Allocate an ifnet object and set it up */ 930b6d90eb7SKip Macy ifp = p->ifp = if_alloc(IFT_ETHER); 931b6d90eb7SKip Macy if (ifp == NULL) { 932b6d90eb7SKip Macy device_printf(dev, "Cannot allocate ifnet\n"); 933b6d90eb7SKip Macy return (ENOMEM); 934b6d90eb7SKip Macy } 935b6d90eb7SKip Macy 936b6d90eb7SKip Macy /* 937b6d90eb7SKip Macy * Note that there is currently no watchdog timer. 938b6d90eb7SKip Macy */ 939b6d90eb7SKip Macy if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 940b6d90eb7SKip Macy ifp->if_init = cxgb_init; 941b6d90eb7SKip Macy ifp->if_softc = p; 942b6d90eb7SKip Macy ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 943b6d90eb7SKip Macy ifp->if_ioctl = cxgb_ioctl; 944b6d90eb7SKip Macy ifp->if_start = cxgb_start; 9458090c9f5SKip Macy 9468e10660fSKip Macy #if 0 9478090c9f5SKip Macy #ifdef IFNET_MULTIQUEUE 9488090c9f5SKip Macy ifp->if_flags |= IFF_MULTIQ; 9498090c9f5SKip Macy ifp->if_mq_start = cxgb_pcpu_start; 9508090c9f5SKip Macy #endif 9518e10660fSKip Macy #endif 952b6d90eb7SKip Macy ifp->if_timer = 0; /* Disable ifnet watchdog */ 953b6d90eb7SKip Macy ifp->if_watchdog = NULL; 954b6d90eb7SKip Macy 9559346e519SKip Macy ifp->if_snd.ifq_drv_maxlen = IFQ_MAXLEN; 956b6d90eb7SKip Macy IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen); 957b6d90eb7SKip Macy IFQ_SET_READY(&ifp->if_snd); 958b6d90eb7SKip Macy 959b6d90eb7SKip Macy ifp->if_hwassist = ifp->if_capabilities = ifp->if_capenable = 0; 960b6d90eb7SKip Macy ifp->if_capabilities |= CXGB_CAP; 961b6d90eb7SKip Macy ifp->if_capenable |= CXGB_CAP_ENABLE; 962b6d90eb7SKip Macy ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP | CSUM_IP | CSUM_TSO); 963ac3a6d9cSKip Macy /* 964ac3a6d9cSKip Macy * disable TSO on 4-port - it isn't supported by the firmware yet 965ac3a6d9cSKip Macy */ 966ac3a6d9cSKip Macy if (p->adapter->params.nports > 2) { 967ac3a6d9cSKip Macy ifp->if_capabilities &= ~(IFCAP_TSO4 | IFCAP_TSO6); 968ac3a6d9cSKip Macy ifp->if_capenable &= ~(IFCAP_TSO4 | IFCAP_TSO6); 969ac3a6d9cSKip Macy ifp->if_hwassist &= ~CSUM_TSO; 970ac3a6d9cSKip Macy } 971b6d90eb7SKip Macy 972b6d90eb7SKip Macy ether_ifattach(ifp, p->hw_addr); 973ac3a6d9cSKip Macy /* 974ac3a6d9cSKip Macy * Only default to jumbo frames on 10GigE 975ac3a6d9cSKip Macy */ 976ac3a6d9cSKip Macy if (p->adapter->params.nports <= 2) 9774af83c8cSKip Macy ifp->if_mtu = ETHERMTU_JUMBO; 978b6d90eb7SKip Macy if ((err = cxgb_makedev(p)) != 0) { 979b6d90eb7SKip Macy printf("makedev failed %d\n", err); 980b6d90eb7SKip Macy return (err); 981b6d90eb7SKip Macy } 982b6d90eb7SKip Macy ifmedia_init(&p->media, IFM_IMASK, cxgb_media_change, 983b6d90eb7SKip Macy cxgb_media_status); 984b6d90eb7SKip Macy 9858e10660fSKip Macy if (!strcmp(p->phy.desc, "10GBASE-CX4")) { 986ef72318fSKip Macy media_flags = IFM_ETHER | IFM_10G_CX4 | IFM_FDX; 9878e10660fSKip Macy } else if (!strcmp(p->phy.desc, "10GBASE-SR")) { 988ef72318fSKip Macy media_flags = IFM_ETHER | IFM_10G_SR | IFM_FDX; 98919905d6dSKip Macy } else if (!strcmp(p->phy.desc, "10GBASE-R")) { 990ef72318fSKip Macy media_flags = IFM_ETHER | IFM_10G_LR | IFM_FDX; 9918e10660fSKip Macy } else if (!strcmp(p->phy.desc, "10/100/1000BASE-T")) { 992ef72318fSKip Macy ifmedia_add(&p->media, IFM_ETHER | IFM_10_T, 0, NULL); 993ef72318fSKip Macy ifmedia_add(&p->media, IFM_ETHER | IFM_10_T | IFM_FDX, 994ef72318fSKip Macy 0, NULL); 995ef72318fSKip Macy ifmedia_add(&p->media, IFM_ETHER | IFM_100_TX, 996ef72318fSKip Macy 0, NULL); 997ef72318fSKip Macy ifmedia_add(&p->media, IFM_ETHER | IFM_100_TX | IFM_FDX, 998ef72318fSKip Macy 0, NULL); 999ef72318fSKip Macy ifmedia_add(&p->media, IFM_ETHER | IFM_1000_T | IFM_FDX, 1000ef72318fSKip Macy 0, NULL); 1001ef72318fSKip Macy media_flags = 0; 1002ef72318fSKip Macy } else { 10038e10660fSKip Macy printf("unsupported media type %s\n", p->phy.desc); 1004b6d90eb7SKip Macy return (ENXIO); 1005b6d90eb7SKip Macy } 1006ef72318fSKip Macy if (media_flags) { 1007b6d90eb7SKip Macy ifmedia_add(&p->media, media_flags, 0, NULL); 1008b6d90eb7SKip Macy ifmedia_set(&p->media, media_flags); 1009ef72318fSKip Macy } else { 1010ef72318fSKip Macy ifmedia_add(&p->media, IFM_ETHER | IFM_AUTO, 0, NULL); 1011ef72318fSKip Macy ifmedia_set(&p->media, IFM_ETHER | IFM_AUTO); 1012ef72318fSKip Macy } 1013ef72318fSKip Macy 1014b6d90eb7SKip Macy 10156b68e276SKip Macy snprintf(p->taskqbuf, TASKQ_NAME_LEN, "cxgb_port_taskq%d", p->port_id); 1016b6d90eb7SKip Macy #ifdef TASKQUEUE_CURRENT 1017b6d90eb7SKip Macy /* Create a port for handling TX without starvation */ 1018bb38cd2fSKip Macy p->tq = taskqueue_create(p->taskqbuf, M_NOWAIT, 1019b6d90eb7SKip Macy taskqueue_thread_enqueue, &p->tq); 1020b6d90eb7SKip Macy #else 1021b6d90eb7SKip Macy /* Create a port for handling TX without starvation */ 10227aff6d8eSKip Macy p->tq = taskqueue_create_fast(p->taskqbuf, M_NOWAIT, 1023b6d90eb7SKip Macy taskqueue_thread_enqueue, &p->tq); 1024b6d90eb7SKip Macy #endif 102519905d6dSKip Macy /* Get the latest mac address, User can use a LAA */ 102619905d6dSKip Macy bcopy(IF_LLADDR(p->ifp), p->hw_addr, ETHER_ADDR_LEN); 1027ef72318fSKip Macy t3_sge_init_port(p); 1028ef027c52SKip Macy #if defined(LINK_ATTACH) 10298e10660fSKip Macy cxgb_link_start(p); 10308e10660fSKip Macy t3_link_changed(sc, p->port_id); 1031ef027c52SKip Macy #endif 1032b6d90eb7SKip Macy return (0); 1033b6d90eb7SKip Macy } 1034b6d90eb7SKip Macy 1035b6d90eb7SKip Macy static int 1036b6d90eb7SKip Macy cxgb_port_detach(device_t dev) 1037b6d90eb7SKip Macy { 1038b6d90eb7SKip Macy struct port_info *p; 1039b6d90eb7SKip Macy 1040b6d90eb7SKip Macy p = device_get_softc(dev); 1041d722cab4SKip Macy 1042d722cab4SKip Macy PORT_LOCK(p); 1043ef72318fSKip Macy if (p->ifp->if_drv_flags & IFF_DRV_RUNNING) 1044d722cab4SKip Macy cxgb_stop_locked(p); 1045d722cab4SKip Macy PORT_UNLOCK(p); 1046d722cab4SKip Macy 1047b6d90eb7SKip Macy if (p->tq != NULL) { 1048b6d90eb7SKip Macy taskqueue_drain(p->tq, &p->start_task); 1049b6d90eb7SKip Macy taskqueue_free(p->tq); 1050b6d90eb7SKip Macy p->tq = NULL; 1051b6d90eb7SKip Macy } 1052b6d90eb7SKip Macy 1053b6d90eb7SKip Macy ether_ifdetach(p->ifp); 10548090c9f5SKip Macy printf("waiting for callout to stop ..."); 10558090c9f5SKip Macy DELAY(1000000); 10568090c9f5SKip Macy printf("done\n"); 10577ac2e6c3SKip Macy /* 10587ac2e6c3SKip Macy * the lock may be acquired in ifdetach 10597ac2e6c3SKip Macy */ 10607ac2e6c3SKip Macy PORT_LOCK_DEINIT(p); 1061b6d90eb7SKip Macy if_free(p->ifp); 1062b6d90eb7SKip Macy 1063ef72318fSKip Macy if (p->port_cdev != NULL) 1064b6d90eb7SKip Macy destroy_dev(p->port_cdev); 1065b6d90eb7SKip Macy 1066b6d90eb7SKip Macy return (0); 1067b6d90eb7SKip Macy } 1068b6d90eb7SKip Macy 1069b6d90eb7SKip Macy void 1070b6d90eb7SKip Macy t3_fatal_err(struct adapter *sc) 1071b6d90eb7SKip Macy { 1072b6d90eb7SKip Macy u_int fw_status[4]; 1073b6d90eb7SKip Macy 10745c5df3daSKip Macy if (sc->flags & FULL_INIT_DONE) { 10755c5df3daSKip Macy t3_sge_stop(sc); 10765c5df3daSKip Macy t3_write_reg(sc, A_XGM_TX_CTRL, 0); 10775c5df3daSKip Macy t3_write_reg(sc, A_XGM_RX_CTRL, 0); 10785c5df3daSKip Macy t3_write_reg(sc, XGM_REG(A_XGM_TX_CTRL, 1), 0); 10795c5df3daSKip Macy t3_write_reg(sc, XGM_REG(A_XGM_RX_CTRL, 1), 0); 10805c5df3daSKip Macy t3_intr_disable(sc); 10815c5df3daSKip Macy } 1082b6d90eb7SKip Macy device_printf(sc->dev,"encountered fatal error, operation suspended\n"); 1083b6d90eb7SKip Macy if (!t3_cim_ctl_blk_read(sc, 0xa0, 4, fw_status)) 1084b6d90eb7SKip Macy device_printf(sc->dev, "FW_ status: 0x%x, 0x%x, 0x%x, 0x%x\n", 1085b6d90eb7SKip Macy fw_status[0], fw_status[1], fw_status[2], fw_status[3]); 1086b6d90eb7SKip Macy } 1087b6d90eb7SKip Macy 1088b6d90eb7SKip Macy int 1089b6d90eb7SKip Macy t3_os_find_pci_capability(adapter_t *sc, int cap) 1090b6d90eb7SKip Macy { 1091b6d90eb7SKip Macy device_t dev; 1092b6d90eb7SKip Macy struct pci_devinfo *dinfo; 1093b6d90eb7SKip Macy pcicfgregs *cfg; 1094b6d90eb7SKip Macy uint32_t status; 1095b6d90eb7SKip Macy uint8_t ptr; 1096b6d90eb7SKip Macy 1097b6d90eb7SKip Macy dev = sc->dev; 1098b6d90eb7SKip Macy dinfo = device_get_ivars(dev); 1099b6d90eb7SKip Macy cfg = &dinfo->cfg; 1100b6d90eb7SKip Macy 1101b6d90eb7SKip Macy status = pci_read_config(dev, PCIR_STATUS, 2); 1102b6d90eb7SKip Macy if (!(status & PCIM_STATUS_CAPPRESENT)) 1103b6d90eb7SKip Macy return (0); 1104b6d90eb7SKip Macy 1105b6d90eb7SKip Macy switch (cfg->hdrtype & PCIM_HDRTYPE) { 1106b6d90eb7SKip Macy case 0: 1107b6d90eb7SKip Macy case 1: 1108b6d90eb7SKip Macy ptr = PCIR_CAP_PTR; 1109b6d90eb7SKip Macy break; 1110b6d90eb7SKip Macy case 2: 1111b6d90eb7SKip Macy ptr = PCIR_CAP_PTR_2; 1112b6d90eb7SKip Macy break; 1113b6d90eb7SKip Macy default: 1114b6d90eb7SKip Macy return (0); 1115b6d90eb7SKip Macy break; 1116b6d90eb7SKip Macy } 1117b6d90eb7SKip Macy ptr = pci_read_config(dev, ptr, 1); 1118b6d90eb7SKip Macy 1119b6d90eb7SKip Macy while (ptr != 0) { 1120b6d90eb7SKip Macy if (pci_read_config(dev, ptr + PCICAP_ID, 1) == cap) 1121b6d90eb7SKip Macy return (ptr); 1122b6d90eb7SKip Macy ptr = pci_read_config(dev, ptr + PCICAP_NEXTPTR, 1); 1123b6d90eb7SKip Macy } 1124b6d90eb7SKip Macy 1125b6d90eb7SKip Macy return (0); 1126b6d90eb7SKip Macy } 1127b6d90eb7SKip Macy 1128b6d90eb7SKip Macy int 1129b6d90eb7SKip Macy t3_os_pci_save_state(struct adapter *sc) 1130b6d90eb7SKip Macy { 1131b6d90eb7SKip Macy device_t dev; 1132b6d90eb7SKip Macy struct pci_devinfo *dinfo; 1133b6d90eb7SKip Macy 1134b6d90eb7SKip Macy dev = sc->dev; 1135b6d90eb7SKip Macy dinfo = device_get_ivars(dev); 1136b6d90eb7SKip Macy 1137b6d90eb7SKip Macy pci_cfg_save(dev, dinfo, 0); 1138b6d90eb7SKip Macy return (0); 1139b6d90eb7SKip Macy } 1140b6d90eb7SKip Macy 1141b6d90eb7SKip Macy int 1142b6d90eb7SKip Macy t3_os_pci_restore_state(struct adapter *sc) 1143b6d90eb7SKip Macy { 1144b6d90eb7SKip Macy device_t dev; 1145b6d90eb7SKip Macy struct pci_devinfo *dinfo; 1146b6d90eb7SKip Macy 1147b6d90eb7SKip Macy dev = sc->dev; 1148b6d90eb7SKip Macy dinfo = device_get_ivars(dev); 1149b6d90eb7SKip Macy 1150b6d90eb7SKip Macy pci_cfg_restore(dev, dinfo); 1151b6d90eb7SKip Macy return (0); 1152b6d90eb7SKip Macy } 1153b6d90eb7SKip Macy 1154b6d90eb7SKip Macy /** 1155b6d90eb7SKip Macy * t3_os_link_changed - handle link status changes 1156b6d90eb7SKip Macy * @adapter: the adapter associated with the link change 1157b6d90eb7SKip Macy * @port_id: the port index whose limk status has changed 115819905d6dSKip Macy * @link_status: the new status of the link 1159b6d90eb7SKip Macy * @speed: the new speed setting 1160b6d90eb7SKip Macy * @duplex: the new duplex setting 1161b6d90eb7SKip Macy * @fc: the new flow-control setting 1162b6d90eb7SKip Macy * 1163b6d90eb7SKip Macy * This is the OS-dependent handler for link status changes. The OS 1164b6d90eb7SKip Macy * neutral handler takes care of most of the processing for these events, 1165b6d90eb7SKip Macy * then calls this handler for any OS-specific processing. 1166b6d90eb7SKip Macy */ 1167b6d90eb7SKip Macy void 1168b6d90eb7SKip Macy t3_os_link_changed(adapter_t *adapter, int port_id, int link_status, int speed, 1169b6d90eb7SKip Macy int duplex, int fc) 1170b6d90eb7SKip Macy { 1171b6d90eb7SKip Macy struct port_info *pi = &adapter->port[port_id]; 1172d722cab4SKip Macy struct cmac *mac = &adapter->port[port_id].mac; 1173b6d90eb7SKip Macy 1174d722cab4SKip Macy if (link_status) { 117519905d6dSKip Macy DELAY(10); 117619905d6dSKip Macy t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX); 117719905d6dSKip Macy /* Clear errors created by MAC enable */ 117819905d6dSKip Macy t3_set_reg_field(adapter, 117919905d6dSKip Macy A_XGM_STAT_CTRL + pi->mac.offset, 118019905d6dSKip Macy F_CLRSTATS, 1); 1181b6d90eb7SKip Macy if_link_state_change(pi->ifp, LINK_STATE_UP); 118219905d6dSKip Macy 1183d722cab4SKip Macy } else { 1184d722cab4SKip Macy pi->phy.ops->power_down(&pi->phy, 1); 1185d722cab4SKip Macy t3_mac_disable(mac, MAC_DIRECTION_RX); 1186d722cab4SKip Macy t3_link_start(&pi->phy, mac, &pi->link_config); 118719905d6dSKip Macy t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX); 11888e10660fSKip Macy if_link_state_change(pi->ifp, LINK_STATE_DOWN); 1189d722cab4SKip Macy } 1190b6d90eb7SKip Macy } 1191b6d90eb7SKip Macy 11929b4de886SKip Macy /** 11939b4de886SKip Macy * t3_os_phymod_changed - handle PHY module changes 11949b4de886SKip Macy * @phy: the PHY reporting the module change 11959b4de886SKip Macy * @mod_type: new module type 11969b4de886SKip Macy * 11979b4de886SKip Macy * This is the OS-dependent handler for PHY module changes. It is 11989b4de886SKip Macy * invoked when a PHY module is removed or inserted for any OS-specific 11999b4de886SKip Macy * processing. 12009b4de886SKip Macy */ 12019b4de886SKip Macy void t3_os_phymod_changed(struct adapter *adap, int port_id) 12029b4de886SKip Macy { 12039b4de886SKip Macy static const char *mod_str[] = { 12049b4de886SKip Macy NULL, "SR", "LR", "LRM", "TWINAX", "TWINAX", "unknown" 12059b4de886SKip Macy }; 12069b4de886SKip Macy 12079b4de886SKip Macy struct port_info *pi = &adap->port[port_id]; 12089b4de886SKip Macy 12099b4de886SKip Macy if (pi->phy.modtype == phy_modtype_none) 12109b4de886SKip Macy device_printf(adap->dev, "PHY module unplugged\n"); 12119b4de886SKip Macy else { 12129b4de886SKip Macy KASSERT(pi->phy.modtype < ARRAY_SIZE(mod_str), 12139b4de886SKip Macy ("invalid PHY module type %d", pi->phy.modtype)); 12149b4de886SKip Macy device_printf(adap->dev, "%s PHY module inserted\n", 12159b4de886SKip Macy mod_str[pi->phy.modtype]); 12169b4de886SKip Macy } 12179b4de886SKip Macy } 12189b4de886SKip Macy 1219b6d90eb7SKip Macy /* 1220b6d90eb7SKip Macy * Interrupt-context handler for external (PHY) interrupts. 1221b6d90eb7SKip Macy */ 1222b6d90eb7SKip Macy void 1223b6d90eb7SKip Macy t3_os_ext_intr_handler(adapter_t *sc) 1224b6d90eb7SKip Macy { 1225b6d90eb7SKip Macy if (cxgb_debug) 1226b6d90eb7SKip Macy printf("t3_os_ext_intr_handler\n"); 1227b6d90eb7SKip Macy /* 1228b6d90eb7SKip Macy * Schedule a task to handle external interrupts as they may be slow 1229b6d90eb7SKip Macy * and we use a mutex to protect MDIO registers. We disable PHY 1230b6d90eb7SKip Macy * interrupts in the meantime and let the task reenable them when 1231b6d90eb7SKip Macy * it's done. 1232b6d90eb7SKip Macy */ 1233d722cab4SKip Macy ADAPTER_LOCK(sc); 1234b6d90eb7SKip Macy if (sc->slow_intr_mask) { 1235b6d90eb7SKip Macy sc->slow_intr_mask &= ~F_T3DBG; 1236b6d90eb7SKip Macy t3_write_reg(sc, A_PL_INT_ENABLE0, sc->slow_intr_mask); 1237b6d90eb7SKip Macy taskqueue_enqueue(sc->tq, &sc->ext_intr_task); 1238b6d90eb7SKip Macy } 1239d722cab4SKip Macy ADAPTER_UNLOCK(sc); 1240b6d90eb7SKip Macy } 1241b6d90eb7SKip Macy 1242b6d90eb7SKip Macy void 1243b6d90eb7SKip Macy t3_os_set_hw_addr(adapter_t *adapter, int port_idx, u8 hw_addr[]) 1244b6d90eb7SKip Macy { 1245b6d90eb7SKip Macy 1246b6d90eb7SKip Macy /* 1247b6d90eb7SKip Macy * The ifnet might not be allocated before this gets called, 1248b6d90eb7SKip Macy * as this is called early on in attach by t3_prep_adapter 1249b6d90eb7SKip Macy * save the address off in the port structure 1250b6d90eb7SKip Macy */ 1251b6d90eb7SKip Macy if (cxgb_debug) 1252b6d90eb7SKip Macy printf("set_hw_addr on idx %d addr %6D\n", port_idx, hw_addr, ":"); 1253b6d90eb7SKip Macy bcopy(hw_addr, adapter->port[port_idx].hw_addr, ETHER_ADDR_LEN); 1254b6d90eb7SKip Macy } 1255b6d90eb7SKip Macy 1256b6d90eb7SKip Macy /** 1257b6d90eb7SKip Macy * link_start - enable a port 1258b6d90eb7SKip Macy * @p: the port to enable 1259b6d90eb7SKip Macy * 1260b6d90eb7SKip Macy * Performs the MAC and PHY actions needed to enable a port. 1261b6d90eb7SKip Macy */ 1262b6d90eb7SKip Macy static void 1263b6d90eb7SKip Macy cxgb_link_start(struct port_info *p) 1264b6d90eb7SKip Macy { 1265b6d90eb7SKip Macy struct ifnet *ifp; 1266b6d90eb7SKip Macy struct t3_rx_mode rm; 1267b6d90eb7SKip Macy struct cmac *mac = &p->mac; 12684af83c8cSKip Macy int mtu, hwtagging; 1269b6d90eb7SKip Macy 1270b6d90eb7SKip Macy ifp = p->ifp; 1271b6d90eb7SKip Macy 12724af83c8cSKip Macy bcopy(IF_LLADDR(ifp), p->hw_addr, ETHER_ADDR_LEN); 12734af83c8cSKip Macy 12744af83c8cSKip Macy mtu = ifp->if_mtu; 12754af83c8cSKip Macy if (ifp->if_capenable & IFCAP_VLAN_MTU) 12764af83c8cSKip Macy mtu += ETHER_VLAN_ENCAP_LEN; 12774af83c8cSKip Macy 12784af83c8cSKip Macy hwtagging = (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) != 0; 12794af83c8cSKip Macy 1280b6d90eb7SKip Macy t3_init_rx_mode(&rm, p); 12817ac2e6c3SKip Macy if (!mac->multiport) 1282b6d90eb7SKip Macy t3_mac_reset(mac); 12834af83c8cSKip Macy t3_mac_set_mtu(mac, mtu); 12844af83c8cSKip Macy t3_set_vlan_accel(p->adapter, 1 << p->tx_chan, hwtagging); 1285b6d90eb7SKip Macy t3_mac_set_address(mac, 0, p->hw_addr); 1286b6d90eb7SKip Macy t3_mac_set_rx_mode(mac, &rm); 1287b6d90eb7SKip Macy t3_link_start(&p->phy, mac, &p->link_config); 1288b6d90eb7SKip Macy t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX); 1289b6d90eb7SKip Macy } 1290b6d90eb7SKip Macy 12918e10660fSKip Macy 12928e10660fSKip Macy static int 12938e10660fSKip Macy await_mgmt_replies(struct adapter *adap, unsigned long init_cnt, 12948e10660fSKip Macy unsigned long n) 12958e10660fSKip Macy { 12968e10660fSKip Macy int attempts = 5; 12978e10660fSKip Macy 12988e10660fSKip Macy while (adap->sge.qs[0].rspq.offload_pkts < init_cnt + n) { 12998e10660fSKip Macy if (!--attempts) 13008e10660fSKip Macy return (ETIMEDOUT); 13018e10660fSKip Macy t3_os_sleep(10); 13028e10660fSKip Macy } 13038e10660fSKip Macy return 0; 13048e10660fSKip Macy } 13058e10660fSKip Macy 13068e10660fSKip Macy static int 13078e10660fSKip Macy init_tp_parity(struct adapter *adap) 13088e10660fSKip Macy { 13098e10660fSKip Macy int i; 13108e10660fSKip Macy struct mbuf *m; 13118e10660fSKip Macy struct cpl_set_tcb_field *greq; 13128e10660fSKip Macy unsigned long cnt = adap->sge.qs[0].rspq.offload_pkts; 13138e10660fSKip Macy 13148e10660fSKip Macy t3_tp_set_offload_mode(adap, 1); 13158e10660fSKip Macy 13168e10660fSKip Macy for (i = 0; i < 16; i++) { 13178e10660fSKip Macy struct cpl_smt_write_req *req; 13188e10660fSKip Macy 13198e10660fSKip Macy m = m_gethdr(M_WAITOK, MT_DATA); 13208e10660fSKip Macy req = mtod(m, struct cpl_smt_write_req *); 13218e10660fSKip Macy m->m_len = m->m_pkthdr.len = sizeof(*req); 13228e10660fSKip Macy memset(req, 0, sizeof(*req)); 13238e10660fSKip Macy req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); 13248e10660fSKip Macy OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, i)); 13258e10660fSKip Macy req->iff = i; 13268e10660fSKip Macy t3_mgmt_tx(adap, m); 13278e10660fSKip Macy } 13288e10660fSKip Macy 13298e10660fSKip Macy for (i = 0; i < 2048; i++) { 13308e10660fSKip Macy struct cpl_l2t_write_req *req; 13318e10660fSKip Macy 13328e10660fSKip Macy m = m_gethdr(M_WAITOK, MT_DATA); 13338e10660fSKip Macy req = mtod(m, struct cpl_l2t_write_req *); 13348e10660fSKip Macy m->m_len = m->m_pkthdr.len = sizeof(*req); 13358e10660fSKip Macy memset(req, 0, sizeof(*req)); 13368e10660fSKip Macy req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); 13378e10660fSKip Macy OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_L2T_WRITE_REQ, i)); 13388e10660fSKip Macy req->params = htonl(V_L2T_W_IDX(i)); 13398e10660fSKip Macy t3_mgmt_tx(adap, m); 13408e10660fSKip Macy } 13418e10660fSKip Macy 13428e10660fSKip Macy for (i = 0; i < 2048; i++) { 13438e10660fSKip Macy struct cpl_rte_write_req *req; 13448e10660fSKip Macy 13458e10660fSKip Macy m = m_gethdr(M_WAITOK, MT_DATA); 13468e10660fSKip Macy req = mtod(m, struct cpl_rte_write_req *); 13478e10660fSKip Macy m->m_len = m->m_pkthdr.len = sizeof(*req); 13488e10660fSKip Macy memset(req, 0, sizeof(*req)); 13498e10660fSKip Macy req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); 13508e10660fSKip Macy OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_RTE_WRITE_REQ, i)); 13518e10660fSKip Macy req->l2t_idx = htonl(V_L2T_W_IDX(i)); 13528e10660fSKip Macy t3_mgmt_tx(adap, m); 13538e10660fSKip Macy } 13548e10660fSKip Macy 13558e10660fSKip Macy m = m_gethdr(M_WAITOK, MT_DATA); 13568e10660fSKip Macy greq = mtod(m, struct cpl_set_tcb_field *); 13578e10660fSKip Macy m->m_len = m->m_pkthdr.len = sizeof(*greq); 13588e10660fSKip Macy memset(greq, 0, sizeof(*greq)); 13598e10660fSKip Macy greq->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); 13608e10660fSKip Macy OPCODE_TID(greq) = htonl(MK_OPCODE_TID(CPL_SET_TCB_FIELD, 0)); 13618e10660fSKip Macy greq->mask = htobe64(1); 13628e10660fSKip Macy t3_mgmt_tx(adap, m); 13638e10660fSKip Macy 13648e10660fSKip Macy i = await_mgmt_replies(adap, cnt, 16 + 2048 + 2048 + 1); 13658e10660fSKip Macy t3_tp_set_offload_mode(adap, 0); 13668e10660fSKip Macy return (i); 13678e10660fSKip Macy } 13688e10660fSKip Macy 1369b6d90eb7SKip Macy /** 1370b6d90eb7SKip Macy * setup_rss - configure Receive Side Steering (per-queue connection demux) 1371b6d90eb7SKip Macy * @adap: the adapter 1372b6d90eb7SKip Macy * 1373b6d90eb7SKip Macy * Sets up RSS to distribute packets to multiple receive queues. We 1374b6d90eb7SKip Macy * configure the RSS CPU lookup table to distribute to the number of HW 1375b6d90eb7SKip Macy * receive queues, and the response queue lookup table to narrow that 1376b6d90eb7SKip Macy * down to the response queues actually configured for each port. 1377b6d90eb7SKip Macy * We always configure the RSS mapping for two ports since the mapping 1378b6d90eb7SKip Macy * table has plenty of entries. 1379b6d90eb7SKip Macy */ 1380b6d90eb7SKip Macy static void 1381b6d90eb7SKip Macy setup_rss(adapter_t *adap) 1382b6d90eb7SKip Macy { 1383b6d90eb7SKip Macy int i; 1384ac3a6d9cSKip Macy u_int nq[2]; 1385b6d90eb7SKip Macy uint8_t cpus[SGE_QSETS + 1]; 1386b6d90eb7SKip Macy uint16_t rspq_map[RSS_TABLE_SIZE]; 13875c5df3daSKip Macy 1388b6d90eb7SKip Macy for (i = 0; i < SGE_QSETS; ++i) 1389b6d90eb7SKip Macy cpus[i] = i; 1390b6d90eb7SKip Macy cpus[SGE_QSETS] = 0xff; 1391b6d90eb7SKip Macy 13927ac2e6c3SKip Macy nq[0] = nq[1] = 0; 13937ac2e6c3SKip Macy for_each_port(adap, i) { 13947ac2e6c3SKip Macy const struct port_info *pi = adap2pinfo(adap, i); 13957ac2e6c3SKip Macy 13967ac2e6c3SKip Macy nq[pi->tx_chan] += pi->nqsets; 13977ac2e6c3SKip Macy } 1398b6d90eb7SKip Macy for (i = 0; i < RSS_TABLE_SIZE / 2; ++i) { 13998e10660fSKip Macy rspq_map[i] = nq[0] ? i % nq[0] : 0; 14008e10660fSKip Macy rspq_map[i + RSS_TABLE_SIZE / 2] = nq[1] ? i % nq[1] + nq[0] : 0; 1401b6d90eb7SKip Macy } 1402ac3a6d9cSKip Macy /* Calculate the reverse RSS map table */ 1403ac3a6d9cSKip Macy for (i = 0; i < RSS_TABLE_SIZE; ++i) 1404ac3a6d9cSKip Macy if (adap->rrss_map[rspq_map[i]] == 0xff) 1405ac3a6d9cSKip Macy adap->rrss_map[rspq_map[i]] = i; 1406b6d90eb7SKip Macy 1407b6d90eb7SKip Macy t3_config_rss(adap, F_RQFEEDBACKENABLE | F_TNLLKPEN | F_TNLMAPEN | 1408ac3a6d9cSKip Macy F_TNLPRTEN | F_TNL2TUPEN | F_TNL4TUPEN | F_OFDMAPEN | 14098e10660fSKip Macy F_RRCPLMAPEN | V_RRCPLCPUSIZE(6) | F_HASHTOEPLITZ, 14108e10660fSKip Macy cpus, rspq_map); 1411ac3a6d9cSKip Macy 1412b6d90eb7SKip Macy } 1413b6d90eb7SKip Macy 1414d722cab4SKip Macy /* 1415d722cab4SKip Macy * Sends an mbuf to an offload queue driver 1416d722cab4SKip Macy * after dealing with any active network taps. 1417d722cab4SKip Macy */ 1418d722cab4SKip Macy static inline int 14193e96c7e7SKip Macy offload_tx(struct t3cdev *tdev, struct mbuf *m) 1420d722cab4SKip Macy { 1421d722cab4SKip Macy int ret; 1422d722cab4SKip Macy 1423d722cab4SKip Macy ret = t3_offload_tx(tdev, m); 1424ef72318fSKip Macy return (ret); 1425d722cab4SKip Macy } 1426d722cab4SKip Macy 1427d722cab4SKip Macy static int 1428d722cab4SKip Macy write_smt_entry(struct adapter *adapter, int idx) 1429d722cab4SKip Macy { 1430d722cab4SKip Macy struct port_info *pi = &adapter->port[idx]; 1431d722cab4SKip Macy struct cpl_smt_write_req *req; 1432d722cab4SKip Macy struct mbuf *m; 1433d722cab4SKip Macy 1434d722cab4SKip Macy if ((m = m_gethdr(M_NOWAIT, MT_DATA)) == NULL) 1435d722cab4SKip Macy return (ENOMEM); 1436d722cab4SKip Macy 1437d722cab4SKip Macy req = mtod(m, struct cpl_smt_write_req *); 14388090c9f5SKip Macy m->m_pkthdr.len = m->m_len = sizeof(struct cpl_smt_write_req); 14398090c9f5SKip Macy 1440d722cab4SKip Macy req->wr.wr_hi = htonl(V_WR_OP(FW_WROPCODE_FORWARD)); 1441d722cab4SKip Macy OPCODE_TID(req) = htonl(MK_OPCODE_TID(CPL_SMT_WRITE_REQ, idx)); 1442d722cab4SKip Macy req->mtu_idx = NMTUS - 1; /* should be 0 but there's a T3 bug */ 1443d722cab4SKip Macy req->iff = idx; 1444d722cab4SKip Macy memset(req->src_mac1, 0, sizeof(req->src_mac1)); 1445d722cab4SKip Macy memcpy(req->src_mac0, pi->hw_addr, ETHER_ADDR_LEN); 1446d722cab4SKip Macy 1447d722cab4SKip Macy m_set_priority(m, 1); 1448d722cab4SKip Macy 1449d722cab4SKip Macy offload_tx(&adapter->tdev, m); 1450d722cab4SKip Macy 1451d722cab4SKip Macy return (0); 1452d722cab4SKip Macy } 1453d722cab4SKip Macy 1454d722cab4SKip Macy static int 1455d722cab4SKip Macy init_smt(struct adapter *adapter) 1456d722cab4SKip Macy { 1457d722cab4SKip Macy int i; 1458d722cab4SKip Macy 1459d722cab4SKip Macy for_each_port(adapter, i) 1460d722cab4SKip Macy write_smt_entry(adapter, i); 1461d722cab4SKip Macy return 0; 1462d722cab4SKip Macy } 1463d722cab4SKip Macy 1464d722cab4SKip Macy static void 1465d722cab4SKip Macy init_port_mtus(adapter_t *adapter) 1466d722cab4SKip Macy { 1467d722cab4SKip Macy unsigned int mtus = adapter->port[0].ifp->if_mtu; 1468d722cab4SKip Macy 1469d722cab4SKip Macy if (adapter->port[1].ifp) 1470d722cab4SKip Macy mtus |= adapter->port[1].ifp->if_mtu << 16; 1471d722cab4SKip Macy t3_write_reg(adapter, A_TP_MTU_PORT_TABLE, mtus); 1472d722cab4SKip Macy } 1473d722cab4SKip Macy 1474b6d90eb7SKip Macy static void 1475b6d90eb7SKip Macy send_pktsched_cmd(struct adapter *adap, int sched, int qidx, int lo, 1476b6d90eb7SKip Macy int hi, int port) 1477b6d90eb7SKip Macy { 1478b6d90eb7SKip Macy struct mbuf *m; 1479b6d90eb7SKip Macy struct mngt_pktsched_wr *req; 1480b6d90eb7SKip Macy 1481ac3a6d9cSKip Macy m = m_gethdr(M_DONTWAIT, MT_DATA); 148220fe52b8SKip Macy if (m) { 1483d722cab4SKip Macy req = mtod(m, struct mngt_pktsched_wr *); 1484b6d90eb7SKip Macy req->wr_hi = htonl(V_WR_OP(FW_WROPCODE_MNGT)); 1485b6d90eb7SKip Macy req->mngt_opcode = FW_MNGTOPCODE_PKTSCHED_SET; 1486b6d90eb7SKip Macy req->sched = sched; 1487b6d90eb7SKip Macy req->idx = qidx; 1488b6d90eb7SKip Macy req->min = lo; 1489b6d90eb7SKip Macy req->max = hi; 1490b6d90eb7SKip Macy req->binding = port; 1491b6d90eb7SKip Macy m->m_len = m->m_pkthdr.len = sizeof(*req); 1492b6d90eb7SKip Macy t3_mgmt_tx(adap, m); 1493b6d90eb7SKip Macy } 149420fe52b8SKip Macy } 1495b6d90eb7SKip Macy 1496b6d90eb7SKip Macy static void 1497b6d90eb7SKip Macy bind_qsets(adapter_t *sc) 1498b6d90eb7SKip Macy { 1499b6d90eb7SKip Macy int i, j; 1500b6d90eb7SKip Macy 15018090c9f5SKip Macy cxgb_pcpu_startup_threads(sc); 1502b6d90eb7SKip Macy for (i = 0; i < (sc)->params.nports; ++i) { 1503b6d90eb7SKip Macy const struct port_info *pi = adap2pinfo(sc, i); 1504b6d90eb7SKip Macy 15055c5df3daSKip Macy for (j = 0; j < pi->nqsets; ++j) { 1506b6d90eb7SKip Macy send_pktsched_cmd(sc, 1, pi->first_qset + j, -1, 15075c5df3daSKip Macy -1, pi->tx_chan); 15085c5df3daSKip Macy 15095c5df3daSKip Macy } 1510b6d90eb7SKip Macy } 1511b6d90eb7SKip Macy } 1512b6d90eb7SKip Macy 1513ac3a6d9cSKip Macy static void 1514ac3a6d9cSKip Macy update_tpeeprom(struct adapter *adap) 1515ac3a6d9cSKip Macy { 15162de1fa86SKip Macy #ifdef FIRMWARE_LATEST 1517ac3a6d9cSKip Macy const struct firmware *tpeeprom; 15182de1fa86SKip Macy #else 15192de1fa86SKip Macy struct firmware *tpeeprom; 15202de1fa86SKip Macy #endif 15212de1fa86SKip Macy 1522ac3a6d9cSKip Macy uint32_t version; 1523ac3a6d9cSKip Macy unsigned int major, minor; 1524ac3a6d9cSKip Macy int ret, len; 1525ac3a6d9cSKip Macy char rev; 1526ac3a6d9cSKip Macy 1527ac3a6d9cSKip Macy t3_seeprom_read(adap, TP_SRAM_OFFSET, &version); 1528ac3a6d9cSKip Macy 1529ac3a6d9cSKip Macy major = G_TP_VERSION_MAJOR(version); 1530ac3a6d9cSKip Macy minor = G_TP_VERSION_MINOR(version); 1531ac3a6d9cSKip Macy if (major == TP_VERSION_MAJOR && minor == TP_VERSION_MINOR) 1532ac3a6d9cSKip Macy return; 1533ac3a6d9cSKip Macy 1534ac3a6d9cSKip Macy rev = t3rev2char(adap); 1535ac3a6d9cSKip Macy 153664a37133SKip Macy tpeeprom = firmware_get(TPEEPROM_NAME); 1537ac3a6d9cSKip Macy if (tpeeprom == NULL) { 1538ac3a6d9cSKip Macy device_printf(adap->dev, "could not load TP EEPROM: unable to load %s\n", 153964a37133SKip Macy TPEEPROM_NAME); 1540ac3a6d9cSKip Macy return; 1541ac3a6d9cSKip Macy } 1542ac3a6d9cSKip Macy 1543ac3a6d9cSKip Macy len = tpeeprom->datasize - 4; 1544ac3a6d9cSKip Macy 1545ac3a6d9cSKip Macy ret = t3_check_tpsram(adap, tpeeprom->data, tpeeprom->datasize); 1546ac3a6d9cSKip Macy if (ret) 1547ac3a6d9cSKip Macy goto release_tpeeprom; 1548ac3a6d9cSKip Macy 1549ac3a6d9cSKip Macy if (len != TP_SRAM_LEN) { 155064a37133SKip Macy device_printf(adap->dev, "%s length is wrong len=%d expected=%d\n", TPEEPROM_NAME, len, TP_SRAM_LEN); 1551ac3a6d9cSKip Macy return; 1552ac3a6d9cSKip Macy } 1553ac3a6d9cSKip Macy 1554ac3a6d9cSKip Macy ret = set_eeprom(&adap->port[0], tpeeprom->data, tpeeprom->datasize, 1555ac3a6d9cSKip Macy TP_SRAM_OFFSET); 1556ac3a6d9cSKip Macy 1557ac3a6d9cSKip Macy if (!ret) { 1558ac3a6d9cSKip Macy device_printf(adap->dev, 1559ac3a6d9cSKip Macy "Protocol SRAM image updated in EEPROM to %d.%d.%d\n", 1560ac3a6d9cSKip Macy TP_VERSION_MAJOR, TP_VERSION_MINOR, TP_VERSION_MICRO); 1561ac3a6d9cSKip Macy } else 1562ac3a6d9cSKip Macy device_printf(adap->dev, "Protocol SRAM image update in EEPROM failed\n"); 1563ac3a6d9cSKip Macy 1564ac3a6d9cSKip Macy release_tpeeprom: 1565ac3a6d9cSKip Macy firmware_put(tpeeprom, FIRMWARE_UNLOAD); 1566ac3a6d9cSKip Macy 1567ac3a6d9cSKip Macy return; 1568ac3a6d9cSKip Macy } 1569ac3a6d9cSKip Macy 1570ac3a6d9cSKip Macy static int 1571ac3a6d9cSKip Macy update_tpsram(struct adapter *adap) 1572ac3a6d9cSKip Macy { 15732de1fa86SKip Macy #ifdef FIRMWARE_LATEST 1574ac3a6d9cSKip Macy const struct firmware *tpsram; 15752de1fa86SKip Macy #else 15762de1fa86SKip Macy struct firmware *tpsram; 15772de1fa86SKip Macy #endif 1578ac3a6d9cSKip Macy int ret; 1579ac3a6d9cSKip Macy char rev; 1580ac3a6d9cSKip Macy 1581ac3a6d9cSKip Macy rev = t3rev2char(adap); 1582ac3a6d9cSKip Macy if (!rev) 1583ac3a6d9cSKip Macy return 0; 1584ac3a6d9cSKip Macy 1585ac3a6d9cSKip Macy update_tpeeprom(adap); 1586ac3a6d9cSKip Macy 158764a37133SKip Macy tpsram = firmware_get(TPSRAM_NAME); 1588ac3a6d9cSKip Macy if (tpsram == NULL){ 158964a37133SKip Macy device_printf(adap->dev, "could not load TP SRAM\n"); 1590ac3a6d9cSKip Macy return (EINVAL); 1591ac3a6d9cSKip Macy } else 159264a37133SKip Macy device_printf(adap->dev, "updating TP SRAM\n"); 1593ac3a6d9cSKip Macy 1594ac3a6d9cSKip Macy ret = t3_check_tpsram(adap, tpsram->data, tpsram->datasize); 1595ac3a6d9cSKip Macy if (ret) 1596ac3a6d9cSKip Macy goto release_tpsram; 1597ac3a6d9cSKip Macy 1598ac3a6d9cSKip Macy ret = t3_set_proto_sram(adap, tpsram->data); 1599ac3a6d9cSKip Macy if (ret) 1600ac3a6d9cSKip Macy device_printf(adap->dev, "loading protocol SRAM failed\n"); 1601ac3a6d9cSKip Macy 1602ac3a6d9cSKip Macy release_tpsram: 1603ac3a6d9cSKip Macy firmware_put(tpsram, FIRMWARE_UNLOAD); 1604ac3a6d9cSKip Macy 1605ac3a6d9cSKip Macy return ret; 1606ac3a6d9cSKip Macy } 1607ac3a6d9cSKip Macy 1608d722cab4SKip Macy /** 1609d722cab4SKip Macy * cxgb_up - enable the adapter 1610d722cab4SKip Macy * @adap: adapter being enabled 1611d722cab4SKip Macy * 1612d722cab4SKip Macy * Called when the first port is enabled, this function performs the 1613d722cab4SKip Macy * actions necessary to make an adapter operational, such as completing 1614d722cab4SKip Macy * the initialization of HW modules, and enabling interrupts. 1615d722cab4SKip Macy * 1616d722cab4SKip Macy */ 1617d722cab4SKip Macy static int 1618d722cab4SKip Macy cxgb_up(struct adapter *sc) 1619d722cab4SKip Macy { 1620d722cab4SKip Macy int err = 0; 1621d722cab4SKip Macy 1622d722cab4SKip Macy if ((sc->flags & FULL_INIT_DONE) == 0) { 1623d722cab4SKip Macy 1624d722cab4SKip Macy if ((sc->flags & FW_UPTODATE) == 0) 1625ac3a6d9cSKip Macy if ((err = upgrade_fw(sc))) 1626d722cab4SKip Macy goto out; 1627ac3a6d9cSKip Macy if ((sc->flags & TPS_UPTODATE) == 0) 1628ac3a6d9cSKip Macy if ((err = update_tpsram(sc))) 1629ac3a6d9cSKip Macy goto out; 1630d722cab4SKip Macy err = t3_init_hw(sc, 0); 1631d722cab4SKip Macy if (err) 1632d722cab4SKip Macy goto out; 1633d722cab4SKip Macy 16348e10660fSKip Macy t3_set_reg_field(sc, A_TP_PARA_REG5, 0, F_RXDDPOFFINIT); 1635d722cab4SKip Macy t3_write_reg(sc, A_ULPRX_TDDP_PSZ, V_HPZ0(PAGE_SHIFT - 12)); 1636d722cab4SKip Macy 1637d722cab4SKip Macy err = setup_sge_qsets(sc); 1638d722cab4SKip Macy if (err) 1639d722cab4SKip Macy goto out; 1640d722cab4SKip Macy 1641d722cab4SKip Macy setup_rss(sc); 16428090c9f5SKip Macy t3_add_configured_sysctls(sc); 1643d722cab4SKip Macy sc->flags |= FULL_INIT_DONE; 1644d722cab4SKip Macy } 1645d722cab4SKip Macy 1646d722cab4SKip Macy t3_intr_clear(sc); 1647d722cab4SKip Macy 1648d722cab4SKip Macy /* If it's MSI or INTx, allocate a single interrupt for everything */ 1649d722cab4SKip Macy if ((sc->flags & USING_MSIX) == 0) { 1650d722cab4SKip Macy if ((sc->irq_res = bus_alloc_resource_any(sc->dev, SYS_RES_IRQ, 1651d722cab4SKip Macy &sc->irq_rid, RF_SHAREABLE | RF_ACTIVE)) == NULL) { 16527ac2e6c3SKip Macy device_printf(sc->dev, "Cannot allocate interrupt rid=%d\n", 16537ac2e6c3SKip Macy sc->irq_rid); 1654d722cab4SKip Macy err = EINVAL; 1655d722cab4SKip Macy goto out; 1656d722cab4SKip Macy } 1657d722cab4SKip Macy device_printf(sc->dev, "allocated irq_res=%p\n", sc->irq_res); 1658d722cab4SKip Macy 1659d722cab4SKip Macy if (bus_setup_intr(sc->dev, sc->irq_res, INTR_MPSAFE|INTR_TYPE_NET, 1660d722cab4SKip Macy #ifdef INTR_FILTERS 1661d722cab4SKip Macy NULL, 1662d722cab4SKip Macy #endif 1663d722cab4SKip Macy sc->cxgb_intr, sc, &sc->intr_tag)) { 1664d722cab4SKip Macy device_printf(sc->dev, "Cannot set up interrupt\n"); 1665d722cab4SKip Macy err = EINVAL; 1666d722cab4SKip Macy goto irq_err; 1667d722cab4SKip Macy } 1668d722cab4SKip Macy } else { 1669d722cab4SKip Macy cxgb_setup_msix(sc, sc->msi_count); 1670d722cab4SKip Macy } 1671d722cab4SKip Macy 1672d722cab4SKip Macy t3_sge_start(sc); 1673d722cab4SKip Macy t3_intr_enable(sc); 1674d722cab4SKip Macy 16758e10660fSKip Macy if (sc->params.rev >= T3_REV_C && !(sc->flags & TP_PARITY_INIT) && 16768e10660fSKip Macy is_offload(sc) && init_tp_parity(sc) == 0) 16778e10660fSKip Macy sc->flags |= TP_PARITY_INIT; 16788e10660fSKip Macy 16798e10660fSKip Macy if (sc->flags & TP_PARITY_INIT) { 16808e10660fSKip Macy t3_write_reg(sc, A_TP_INT_CAUSE, 16818e10660fSKip Macy F_CMCACHEPERR | F_ARPLUTPERR); 16828e10660fSKip Macy t3_write_reg(sc, A_TP_INT_ENABLE, 0x7fbfffff); 16838e10660fSKip Macy } 16848e10660fSKip Macy 16858e10660fSKip Macy 16865c5df3daSKip Macy if (!(sc->flags & QUEUES_BOUND)) { 1687d722cab4SKip Macy bind_qsets(sc); 1688d722cab4SKip Macy sc->flags |= QUEUES_BOUND; 1689ac3a6d9cSKip Macy } 1690d722cab4SKip Macy out: 1691d722cab4SKip Macy return (err); 1692d722cab4SKip Macy irq_err: 1693d722cab4SKip Macy CH_ERR(sc, "request_irq failed, err %d\n", err); 1694d722cab4SKip Macy goto out; 1695d722cab4SKip Macy } 1696d722cab4SKip Macy 1697d722cab4SKip Macy 1698d722cab4SKip Macy /* 1699d722cab4SKip Macy * Release resources when all the ports and offloading have been stopped. 1700d722cab4SKip Macy */ 1701d722cab4SKip Macy static void 1702bb38cd2fSKip Macy cxgb_down_locked(struct adapter *sc) 1703d722cab4SKip Macy { 1704d722cab4SKip Macy 1705d722cab4SKip Macy t3_sge_stop(sc); 1706d722cab4SKip Macy t3_intr_disable(sc); 1707d722cab4SKip Macy 1708d722cab4SKip Macy if (sc->intr_tag != NULL) { 1709d722cab4SKip Macy bus_teardown_intr(sc->dev, sc->irq_res, sc->intr_tag); 1710d722cab4SKip Macy sc->intr_tag = NULL; 1711d722cab4SKip Macy } 1712d722cab4SKip Macy if (sc->irq_res != NULL) { 1713d722cab4SKip Macy device_printf(sc->dev, "de-allocating interrupt irq_rid=%d irq_res=%p\n", 1714d722cab4SKip Macy sc->irq_rid, sc->irq_res); 1715d722cab4SKip Macy bus_release_resource(sc->dev, SYS_RES_IRQ, sc->irq_rid, 1716d722cab4SKip Macy sc->irq_res); 1717d722cab4SKip Macy sc->irq_res = NULL; 1718d722cab4SKip Macy } 1719d722cab4SKip Macy 1720ef72318fSKip Macy if (sc->flags & USING_MSIX) 1721ef72318fSKip Macy cxgb_teardown_msix(sc); 1722ef72318fSKip Macy 17238090c9f5SKip Macy callout_stop(&sc->cxgb_tick_ch); 17248090c9f5SKip Macy callout_stop(&sc->sge_timer_ch); 1725bb38cd2fSKip Macy callout_drain(&sc->cxgb_tick_ch); 1726d722cab4SKip Macy callout_drain(&sc->sge_timer_ch); 1727bb38cd2fSKip Macy 17287ac2e6c3SKip Macy if (sc->tq != NULL) { 17298e10660fSKip Macy printf("draining slow intr\n"); 17308e10660fSKip Macy 1731d722cab4SKip Macy taskqueue_drain(sc->tq, &sc->slow_intr_task); 17328e10660fSKip Macy printf("draining ext intr\n"); 17338e10660fSKip Macy taskqueue_drain(sc->tq, &sc->ext_intr_task); 17348e10660fSKip Macy printf("draining tick task\n"); 17358e10660fSKip Macy taskqueue_drain(sc->tq, &sc->tick_task); 17367ac2e6c3SKip Macy } 17378e10660fSKip Macy ADAPTER_UNLOCK(sc); 1738d722cab4SKip Macy } 1739d722cab4SKip Macy 1740d722cab4SKip Macy static int 1741d722cab4SKip Macy offload_open(struct port_info *pi) 1742d722cab4SKip Macy { 1743d722cab4SKip Macy struct adapter *adapter = pi->adapter; 17448090c9f5SKip Macy struct t3cdev *tdev = &adapter->tdev; 17458090c9f5SKip Macy #ifdef notyet 17468090c9f5SKip Macy T3CDEV(pi->ifp); 17478090c9f5SKip Macy #endif 1748d722cab4SKip Macy int adap_up = adapter->open_device_map & PORT_MASK; 1749d722cab4SKip Macy int err = 0; 1750d722cab4SKip Macy 17518e10660fSKip Macy CTR1(KTR_CXGB, "device_map=0x%x", adapter->open_device_map); 1752d722cab4SKip Macy if (atomic_cmpset_int(&adapter->open_device_map, 17538090c9f5SKip Macy (adapter->open_device_map & ~(1<<OFFLOAD_DEVMAP_BIT)), 17548090c9f5SKip Macy (adapter->open_device_map | (1<<OFFLOAD_DEVMAP_BIT))) == 0) 1755d722cab4SKip Macy return (0); 1756d722cab4SKip Macy 17578090c9f5SKip Macy 17588090c9f5SKip Macy if (!isset(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT)) 17598090c9f5SKip Macy printf("offload_open: DEVMAP_BIT did not get set 0x%x\n", adapter->open_device_map); 1760d722cab4SKip Macy ADAPTER_LOCK(pi->adapter); 1761d722cab4SKip Macy if (!adap_up) 1762d722cab4SKip Macy err = cxgb_up(adapter); 1763d722cab4SKip Macy ADAPTER_UNLOCK(pi->adapter); 1764ac3a6d9cSKip Macy if (err) 1765d722cab4SKip Macy return (err); 1766d722cab4SKip Macy 1767d722cab4SKip Macy t3_tp_set_offload_mode(adapter, 1); 17688090c9f5SKip Macy tdev->lldev = pi->ifp; 1769d722cab4SKip Macy 1770d722cab4SKip Macy init_port_mtus(adapter); 1771d722cab4SKip Macy t3_load_mtus(adapter, adapter->params.mtus, adapter->params.a_wnd, 1772d722cab4SKip Macy adapter->params.b_wnd, 1773d722cab4SKip Macy adapter->params.rev == 0 ? 1774d722cab4SKip Macy adapter->port[0].ifp->if_mtu : 0xffff); 1775d722cab4SKip Macy init_smt(adapter); 1776d722cab4SKip Macy 1777ed0fb18dSKip Macy /* Call back all registered clients */ 1778ed0fb18dSKip Macy cxgb_add_clients(tdev); 1779ed0fb18dSKip Macy 1780ed0fb18dSKip Macy 1781d722cab4SKip Macy /* restore them in case the offload module has changed them */ 1782d722cab4SKip Macy if (err) { 1783d722cab4SKip Macy t3_tp_set_offload_mode(adapter, 0); 1784d722cab4SKip Macy clrbit(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT); 1785d722cab4SKip Macy cxgb_set_dummy_ops(tdev); 1786d722cab4SKip Macy } 1787d722cab4SKip Macy return (err); 1788d722cab4SKip Macy } 17898090c9f5SKip Macy 1790d722cab4SKip Macy static int 17918090c9f5SKip Macy offload_close(struct t3cdev *tdev) 1792d722cab4SKip Macy { 1793d722cab4SKip Macy struct adapter *adapter = tdev2adap(tdev); 1794d722cab4SKip Macy 17958e10660fSKip Macy if (!isset(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT)) 1796ef72318fSKip Macy return (0); 1797d722cab4SKip Macy 1798ed0fb18dSKip Macy /* Call back all registered clients */ 1799ed0fb18dSKip Macy cxgb_remove_clients(tdev); 1800ed0fb18dSKip Macy 1801d722cab4SKip Macy tdev->lldev = NULL; 1802d722cab4SKip Macy cxgb_set_dummy_ops(tdev); 1803d722cab4SKip Macy t3_tp_set_offload_mode(adapter, 0); 1804d722cab4SKip Macy clrbit(&adapter->open_device_map, OFFLOAD_DEVMAP_BIT); 1805d722cab4SKip Macy 18068090c9f5SKip Macy ADAPTER_LOCK(adapter); 1807d722cab4SKip Macy if (!adapter->open_device_map) 18088090c9f5SKip Macy cxgb_down_locked(adapter); 18098090c9f5SKip Macy else 18108090c9f5SKip Macy ADAPTER_UNLOCK(adapter); 1811ef72318fSKip Macy return (0); 1812d722cab4SKip Macy } 18138090c9f5SKip Macy 1814d722cab4SKip Macy 1815b6d90eb7SKip Macy static void 1816b6d90eb7SKip Macy cxgb_init(void *arg) 1817b6d90eb7SKip Macy { 1818b6d90eb7SKip Macy struct port_info *p = arg; 1819b6d90eb7SKip Macy 1820b6d90eb7SKip Macy PORT_LOCK(p); 1821b6d90eb7SKip Macy cxgb_init_locked(p); 1822b6d90eb7SKip Macy PORT_UNLOCK(p); 1823b6d90eb7SKip Macy } 1824b6d90eb7SKip Macy 1825b6d90eb7SKip Macy static void 1826b6d90eb7SKip Macy cxgb_init_locked(struct port_info *p) 1827b6d90eb7SKip Macy { 1828b6d90eb7SKip Macy struct ifnet *ifp; 1829b6d90eb7SKip Macy adapter_t *sc = p->adapter; 1830d722cab4SKip Macy int err; 1831b6d90eb7SKip Macy 1832bb38cd2fSKip Macy PORT_LOCK_ASSERT_OWNED(p); 1833b6d90eb7SKip Macy ifp = p->ifp; 1834d722cab4SKip Macy 1835d722cab4SKip Macy ADAPTER_LOCK(p->adapter); 1836ac3a6d9cSKip Macy if ((sc->open_device_map == 0) && (err = cxgb_up(sc))) { 1837d722cab4SKip Macy ADAPTER_UNLOCK(p->adapter); 1838d722cab4SKip Macy cxgb_stop_locked(p); 1839b6d90eb7SKip Macy return; 1840b6d90eb7SKip Macy } 1841bb38cd2fSKip Macy if (p->adapter->open_device_map == 0) { 1842b6d90eb7SKip Macy t3_intr_clear(sc); 1843bb38cd2fSKip Macy } 18446b68e276SKip Macy setbit(&p->adapter->open_device_map, p->port_id); 1845b6d90eb7SKip Macy ADAPTER_UNLOCK(p->adapter); 1846ef72318fSKip Macy 1847d722cab4SKip Macy if (is_offload(sc) && !ofld_disable) { 1848d722cab4SKip Macy err = offload_open(p); 1849d722cab4SKip Macy if (err) 1850d722cab4SKip Macy log(LOG_WARNING, 1851d722cab4SKip Macy "Could not initialize offload capabilities\n"); 1852d722cab4SKip Macy } 1853ef027c52SKip Macy #if !defined(LINK_ATTACH) 1854ef027c52SKip Macy cxgb_link_start(p); 1855ef027c52SKip Macy t3_link_changed(sc, p->port_id); 1856ef027c52SKip Macy #endif 1857ef72318fSKip Macy ifp->if_baudrate = p->link_config.speed * 1000000; 1858ef72318fSKip Macy 18595c5df3daSKip Macy device_printf(sc->dev, "enabling interrupts on port=%d\n", p->port_id); 18606b68e276SKip Macy t3_port_intr_enable(sc, p->port_id); 1861693d746cSKip Macy 18629330dbc3SKip Macy t3_sge_reset_adapter(sc); 1863b6d90eb7SKip Macy 1864b6d90eb7SKip Macy ifp->if_drv_flags |= IFF_DRV_RUNNING; 1865b6d90eb7SKip Macy ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 1866b6d90eb7SKip Macy } 1867b6d90eb7SKip Macy 1868b6d90eb7SKip Macy static void 1869b6d90eb7SKip Macy cxgb_set_rxmode(struct port_info *p) 1870b6d90eb7SKip Macy { 1871b6d90eb7SKip Macy struct t3_rx_mode rm; 1872b6d90eb7SKip Macy struct cmac *mac = &p->mac; 1873b6d90eb7SKip Macy 1874b6d90eb7SKip Macy t3_init_rx_mode(&rm, p); 18758e10660fSKip Macy mtx_lock(&p->adapter->mdio_lock); 1876b6d90eb7SKip Macy t3_mac_set_rx_mode(mac, &rm); 18778e10660fSKip Macy mtx_unlock(&p->adapter->mdio_lock); 1878b6d90eb7SKip Macy } 1879b6d90eb7SKip Macy 1880b6d90eb7SKip Macy static void 188119905d6dSKip Macy cxgb_stop_locked(struct port_info *pi) 1882b6d90eb7SKip Macy { 1883b6d90eb7SKip Macy struct ifnet *ifp; 1884b6d90eb7SKip Macy 188519905d6dSKip Macy PORT_LOCK_ASSERT_OWNED(pi); 188619905d6dSKip Macy ADAPTER_LOCK_ASSERT_NOTOWNED(pi->adapter); 188777f07749SKip Macy 188819905d6dSKip Macy ifp = pi->ifp; 188919905d6dSKip Macy t3_port_intr_disable(pi->adapter, pi->port_id); 1890d722cab4SKip Macy ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 1891b6d90eb7SKip Macy 189219905d6dSKip Macy /* disable pause frames */ 189319905d6dSKip Macy t3_set_reg_field(pi->adapter, A_XGM_TX_CFG + pi->mac.offset, 189419905d6dSKip Macy F_TXPAUSEEN, 0); 1895bb38cd2fSKip Macy 189619905d6dSKip Macy /* Reset RX FIFO HWM */ 189719905d6dSKip Macy t3_set_reg_field(pi->adapter, A_XGM_RXFIFO_CFG + pi->mac.offset, 189819905d6dSKip Macy V_RXFIFOPAUSEHWM(M_RXFIFOPAUSEHWM), 0); 189919905d6dSKip Macy 190019905d6dSKip Macy 190119905d6dSKip Macy ADAPTER_LOCK(pi->adapter); 190219905d6dSKip Macy clrbit(&pi->adapter->open_device_map, pi->port_id); 190319905d6dSKip Macy 190419905d6dSKip Macy if (pi->adapter->open_device_map == 0) { 190519905d6dSKip Macy cxgb_down_locked(pi->adapter); 1906bb38cd2fSKip Macy } else 190719905d6dSKip Macy ADAPTER_UNLOCK(pi->adapter); 190819905d6dSKip Macy 1909ef027c52SKip Macy #if !defined(LINK_ATTACH) 191019905d6dSKip Macy DELAY(100); 191119905d6dSKip Macy 191219905d6dSKip Macy /* Wait for TXFIFO empty */ 191319905d6dSKip Macy t3_wait_op_done(pi->adapter, A_XGM_TXFIFO_CFG + pi->mac.offset, 191419905d6dSKip Macy F_TXFIFO_EMPTY, 1, 20, 5); 191519905d6dSKip Macy 191619905d6dSKip Macy DELAY(100); 191719905d6dSKip Macy t3_mac_disable(&pi->mac, MAC_DIRECTION_TX | MAC_DIRECTION_RX); 191819905d6dSKip Macy 191919905d6dSKip Macy pi->phy.ops->power_down(&pi->phy, 1); 1920ef027c52SKip Macy #endif 1921bb38cd2fSKip Macy 1922b6d90eb7SKip Macy } 1923b6d90eb7SKip Macy 1924b6d90eb7SKip Macy static int 1925ef72318fSKip Macy cxgb_set_mtu(struct port_info *p, int mtu) 1926ef72318fSKip Macy { 1927ef72318fSKip Macy struct ifnet *ifp = p->ifp; 1928ef72318fSKip Macy int error = 0; 1929ef72318fSKip Macy 19304af83c8cSKip Macy if ((mtu < ETHERMIN) || (mtu > ETHERMTU_JUMBO)) 1931ef72318fSKip Macy error = EINVAL; 1932ef72318fSKip Macy else if (ifp->if_mtu != mtu) { 1933ef72318fSKip Macy PORT_LOCK(p); 1934ef72318fSKip Macy ifp->if_mtu = mtu; 1935ef72318fSKip Macy if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1936ef72318fSKip Macy cxgb_stop_locked(p); 1937ef72318fSKip Macy cxgb_init_locked(p); 1938ef72318fSKip Macy } 1939ef72318fSKip Macy PORT_UNLOCK(p); 1940ef72318fSKip Macy } 1941ef72318fSKip Macy return (error); 1942ef72318fSKip Macy } 1943ef72318fSKip Macy 194425292debSKip Macy /* 194525292debSKip Macy * Mark lro enabled or disabled in all qsets for this port 194625292debSKip Macy */ 194725292debSKip Macy static int 194825292debSKip Macy cxgb_set_lro(struct port_info *p, int enabled) 194925292debSKip Macy { 195025292debSKip Macy int i; 195125292debSKip Macy struct adapter *adp = p->adapter; 195225292debSKip Macy struct sge_qset *q; 195325292debSKip Macy 195425292debSKip Macy PORT_LOCK_ASSERT_OWNED(p); 195525292debSKip Macy for (i = 0; i < p->nqsets; i++) { 195625292debSKip Macy q = &adp->sge.qs[p->first_qset + i]; 195725292debSKip Macy q->lro.enabled = (enabled != 0); 195825292debSKip Macy } 195925292debSKip Macy return (0); 196025292debSKip Macy } 196125292debSKip Macy 1962ef72318fSKip Macy static int 1963b6d90eb7SKip Macy cxgb_ioctl(struct ifnet *ifp, unsigned long command, caddr_t data) 1964b6d90eb7SKip Macy { 1965b6d90eb7SKip Macy struct port_info *p = ifp->if_softc; 1966b6d90eb7SKip Macy struct ifaddr *ifa = (struct ifaddr *)data; 1967b6d90eb7SKip Macy struct ifreq *ifr = (struct ifreq *)data; 19684af83c8cSKip Macy int flags, error = 0, reinit = 0; 1969b6d90eb7SKip Macy uint32_t mask; 1970b6d90eb7SKip Macy 197151580731SKip Macy /* 197251580731SKip Macy * XXX need to check that we aren't in the middle of an unload 197351580731SKip Macy */ 1974b6d90eb7SKip Macy switch (command) { 1975b6d90eb7SKip Macy case SIOCSIFMTU: 1976ef72318fSKip Macy error = cxgb_set_mtu(p, ifr->ifr_mtu); 1977b6d90eb7SKip Macy break; 1978b6d90eb7SKip Macy case SIOCSIFADDR: 1979b6d90eb7SKip Macy if (ifa->ifa_addr->sa_family == AF_INET) { 1980b6d90eb7SKip Macy ifp->if_flags |= IFF_UP; 19818e10660fSKip Macy if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 19828e10660fSKip Macy PORT_LOCK(p); 1983ef72318fSKip Macy cxgb_init_locked(p); 19844f6a96aeSKip Macy PORT_UNLOCK(p); 19858e10660fSKip Macy } 19868e10660fSKip Macy arp_ifinit(ifp, ifa); 1987b6d90eb7SKip Macy } else 1988b6d90eb7SKip Macy error = ether_ioctl(ifp, command, data); 1989b6d90eb7SKip Macy break; 1990b6d90eb7SKip Macy case SIOCSIFFLAGS: 1991693d746cSKip Macy PORT_LOCK(p); 1992ef72318fSKip Macy if (ifp->if_flags & IFF_UP) { 1993b6d90eb7SKip Macy if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 1994b6d90eb7SKip Macy flags = p->if_flags; 1995b6d90eb7SKip Macy if (((ifp->if_flags ^ flags) & IFF_PROMISC) || 1996b6d90eb7SKip Macy ((ifp->if_flags ^ flags) & IFF_ALLMULTI)) 1997b6d90eb7SKip Macy cxgb_set_rxmode(p); 1998b6d90eb7SKip Macy } else 1999b6d90eb7SKip Macy cxgb_init_locked(p); 2000b6d90eb7SKip Macy p->if_flags = ifp->if_flags; 2001bb38cd2fSKip Macy } else if (ifp->if_drv_flags & IFF_DRV_RUNNING) 2002693d746cSKip Macy cxgb_stop_locked(p); 2003bb38cd2fSKip Macy 2004ef72318fSKip Macy PORT_UNLOCK(p); 2005b6d90eb7SKip Macy break; 20068e10660fSKip Macy case SIOCADDMULTI: 20078e10660fSKip Macy case SIOCDELMULTI: 20088e10660fSKip Macy if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 20098e10660fSKip Macy cxgb_set_rxmode(p); 20108e10660fSKip Macy } 20118e10660fSKip Macy break; 2012b6d90eb7SKip Macy case SIOCSIFMEDIA: 2013b6d90eb7SKip Macy case SIOCGIFMEDIA: 2014b6d90eb7SKip Macy error = ifmedia_ioctl(ifp, ifr, &p->media, command); 2015b6d90eb7SKip Macy break; 2016b6d90eb7SKip Macy case SIOCSIFCAP: 2017b6d90eb7SKip Macy PORT_LOCK(p); 2018b6d90eb7SKip Macy mask = ifr->ifr_reqcap ^ ifp->if_capenable; 2019b6d90eb7SKip Macy if (mask & IFCAP_TXCSUM) { 2020b6d90eb7SKip Macy if (IFCAP_TXCSUM & ifp->if_capenable) { 2021b6d90eb7SKip Macy ifp->if_capenable &= ~(IFCAP_TXCSUM|IFCAP_TSO4); 2022b6d90eb7SKip Macy ifp->if_hwassist &= ~(CSUM_TCP | CSUM_UDP 20234af83c8cSKip Macy | CSUM_IP | CSUM_TSO); 2024b6d90eb7SKip Macy } else { 2025b6d90eb7SKip Macy ifp->if_capenable |= IFCAP_TXCSUM; 20264af83c8cSKip Macy ifp->if_hwassist |= (CSUM_TCP | CSUM_UDP 20274af83c8cSKip Macy | CSUM_IP); 2028b6d90eb7SKip Macy } 2029b6d90eb7SKip Macy } 20304af83c8cSKip Macy if (mask & IFCAP_RXCSUM) { 20314af83c8cSKip Macy ifp->if_capenable ^= IFCAP_RXCSUM; 2032b6d90eb7SKip Macy } 2033b6d90eb7SKip Macy if (mask & IFCAP_TSO4) { 2034b6d90eb7SKip Macy if (IFCAP_TSO4 & ifp->if_capenable) { 2035b6d90eb7SKip Macy ifp->if_capenable &= ~IFCAP_TSO4; 2036b6d90eb7SKip Macy ifp->if_hwassist &= ~CSUM_TSO; 2037b6d90eb7SKip Macy } else if (IFCAP_TXCSUM & ifp->if_capenable) { 2038b6d90eb7SKip Macy ifp->if_capenable |= IFCAP_TSO4; 2039b6d90eb7SKip Macy ifp->if_hwassist |= CSUM_TSO; 2040b6d90eb7SKip Macy } else { 2041b6d90eb7SKip Macy if (cxgb_debug) 2042b6d90eb7SKip Macy printf("cxgb requires tx checksum offload" 2043b6d90eb7SKip Macy " be enabled to use TSO\n"); 2044b6d90eb7SKip Macy error = EINVAL; 2045b6d90eb7SKip Macy } 2046b6d90eb7SKip Macy } 204725292debSKip Macy if (mask & IFCAP_LRO) { 204825292debSKip Macy ifp->if_capenable ^= IFCAP_LRO; 204925292debSKip Macy 205025292debSKip Macy /* Safe to do this even if cxgb_up not called yet */ 205125292debSKip Macy cxgb_set_lro(p, ifp->if_capenable & IFCAP_LRO); 205225292debSKip Macy } 20534af83c8cSKip Macy if (mask & IFCAP_VLAN_HWTAGGING) { 20544af83c8cSKip Macy ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 20554af83c8cSKip Macy reinit = ifp->if_drv_flags & IFF_DRV_RUNNING; 20564af83c8cSKip Macy } 20574af83c8cSKip Macy if (mask & IFCAP_VLAN_MTU) { 20584af83c8cSKip Macy ifp->if_capenable ^= IFCAP_VLAN_MTU; 20594af83c8cSKip Macy reinit = ifp->if_drv_flags & IFF_DRV_RUNNING; 20604af83c8cSKip Macy } 20614af83c8cSKip Macy if (mask & IFCAP_VLAN_HWCSUM) { 20624af83c8cSKip Macy ifp->if_capenable ^= IFCAP_VLAN_HWCSUM; 20634af83c8cSKip Macy } 20644af83c8cSKip Macy if (reinit) { 20654af83c8cSKip Macy cxgb_stop_locked(p); 20664af83c8cSKip Macy cxgb_init_locked(p); 20674af83c8cSKip Macy } 2068b6d90eb7SKip Macy PORT_UNLOCK(p); 20694af83c8cSKip Macy 20704af83c8cSKip Macy #ifdef VLAN_CAPABILITIES 20714af83c8cSKip Macy VLAN_CAPABILITIES(ifp); 20724af83c8cSKip Macy #endif 2073b6d90eb7SKip Macy break; 2074b6d90eb7SKip Macy default: 2075b6d90eb7SKip Macy error = ether_ioctl(ifp, command, data); 2076b6d90eb7SKip Macy break; 2077b6d90eb7SKip Macy } 2078b6d90eb7SKip Macy return (error); 2079b6d90eb7SKip Macy } 2080b6d90eb7SKip Macy 2081b6d90eb7SKip Macy static int 2082b6d90eb7SKip Macy cxgb_media_change(struct ifnet *ifp) 2083b6d90eb7SKip Macy { 2084b6d90eb7SKip Macy if_printf(ifp, "media change not supported\n"); 2085b6d90eb7SKip Macy return (ENXIO); 2086b6d90eb7SKip Macy } 2087b6d90eb7SKip Macy 2088b6d90eb7SKip Macy static void 2089b6d90eb7SKip Macy cxgb_media_status(struct ifnet *ifp, struct ifmediareq *ifmr) 2090b6d90eb7SKip Macy { 2091b6d90eb7SKip Macy struct port_info *p = ifp->if_softc; 2092b6d90eb7SKip Macy 2093b6d90eb7SKip Macy ifmr->ifm_status = IFM_AVALID; 2094b6d90eb7SKip Macy ifmr->ifm_active = IFM_ETHER; 2095b6d90eb7SKip Macy 2096b6d90eb7SKip Macy if (!p->link_config.link_ok) 2097b6d90eb7SKip Macy return; 2098b6d90eb7SKip Macy 2099b6d90eb7SKip Macy ifmr->ifm_status |= IFM_ACTIVE; 2100b6d90eb7SKip Macy 2101ef72318fSKip Macy switch (p->link_config.speed) { 2102ef72318fSKip Macy case 10: 2103ef72318fSKip Macy ifmr->ifm_active |= IFM_10_T; 2104ef72318fSKip Macy break; 2105ef72318fSKip Macy case 100: 2106ef72318fSKip Macy ifmr->ifm_active |= IFM_100_TX; 2107ef72318fSKip Macy break; 2108ef72318fSKip Macy case 1000: 2109ef72318fSKip Macy ifmr->ifm_active |= IFM_1000_T; 2110ef72318fSKip Macy break; 2111ef72318fSKip Macy } 2112ef72318fSKip Macy 2113b6d90eb7SKip Macy if (p->link_config.duplex) 2114b6d90eb7SKip Macy ifmr->ifm_active |= IFM_FDX; 2115b6d90eb7SKip Macy else 2116b6d90eb7SKip Macy ifmr->ifm_active |= IFM_HDX; 2117b6d90eb7SKip Macy } 2118b6d90eb7SKip Macy 2119b6d90eb7SKip Macy static void 2120b6d90eb7SKip Macy cxgb_async_intr(void *data) 2121b6d90eb7SKip Macy { 2122693d746cSKip Macy adapter_t *sc = data; 2123693d746cSKip Macy 2124b6d90eb7SKip Macy if (cxgb_debug) 2125693d746cSKip Macy device_printf(sc->dev, "cxgb_async_intr\n"); 2126bb38cd2fSKip Macy /* 2127bb38cd2fSKip Macy * May need to sleep - defer to taskqueue 2128bb38cd2fSKip Macy */ 2129bb38cd2fSKip Macy taskqueue_enqueue(sc->tq, &sc->slow_intr_task); 2130b6d90eb7SKip Macy } 2131b6d90eb7SKip Macy 2132b6d90eb7SKip Macy static void 2133b6d90eb7SKip Macy cxgb_ext_intr_handler(void *arg, int count) 2134b6d90eb7SKip Macy { 2135b6d90eb7SKip Macy adapter_t *sc = (adapter_t *)arg; 2136b6d90eb7SKip Macy 2137b6d90eb7SKip Macy if (cxgb_debug) 2138b6d90eb7SKip Macy printf("cxgb_ext_intr_handler\n"); 2139b6d90eb7SKip Macy 2140b6d90eb7SKip Macy t3_phy_intr_handler(sc); 2141b6d90eb7SKip Macy 2142b6d90eb7SKip Macy /* Now reenable external interrupts */ 2143d722cab4SKip Macy ADAPTER_LOCK(sc); 2144b6d90eb7SKip Macy if (sc->slow_intr_mask) { 2145b6d90eb7SKip Macy sc->slow_intr_mask |= F_T3DBG; 2146b6d90eb7SKip Macy t3_write_reg(sc, A_PL_INT_CAUSE0, F_T3DBG); 2147b6d90eb7SKip Macy t3_write_reg(sc, A_PL_INT_ENABLE0, sc->slow_intr_mask); 2148b6d90eb7SKip Macy } 2149d722cab4SKip Macy ADAPTER_UNLOCK(sc); 2150b6d90eb7SKip Macy } 2151b6d90eb7SKip Macy 2152b6d90eb7SKip Macy static void 2153b6d90eb7SKip Macy check_link_status(adapter_t *sc) 2154b6d90eb7SKip Macy { 2155b6d90eb7SKip Macy int i; 2156b6d90eb7SKip Macy 2157b6d90eb7SKip Macy for (i = 0; i < (sc)->params.nports; ++i) { 2158b6d90eb7SKip Macy struct port_info *p = &sc->port[i]; 2159b6d90eb7SKip Macy 21608e10660fSKip Macy if (!(p->phy.caps & SUPPORTED_IRQ)) 2161b6d90eb7SKip Macy t3_link_changed(sc, i); 2162ef72318fSKip Macy p->ifp->if_baudrate = p->link_config.speed * 1000000; 2163b6d90eb7SKip Macy } 2164b6d90eb7SKip Macy } 2165b6d90eb7SKip Macy 2166577e9bbeSKip Macy static void 2167577e9bbeSKip Macy check_t3b2_mac(struct adapter *adapter) 2168577e9bbeSKip Macy { 2169577e9bbeSKip Macy int i; 2170577e9bbeSKip Macy 21718e10660fSKip Macy if(adapter->flags & CXGB_SHUTDOWN) 21728e10660fSKip Macy return; 21738e10660fSKip Macy 2174577e9bbeSKip Macy for_each_port(adapter, i) { 2175577e9bbeSKip Macy struct port_info *p = &adapter->port[i]; 2176577e9bbeSKip Macy struct ifnet *ifp = p->ifp; 2177577e9bbeSKip Macy int status; 2178577e9bbeSKip Macy 21798e10660fSKip Macy if(adapter->flags & CXGB_SHUTDOWN) 21808e10660fSKip Macy return; 21818e10660fSKip Macy 2182577e9bbeSKip Macy if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) 2183577e9bbeSKip Macy continue; 2184577e9bbeSKip Macy 2185577e9bbeSKip Macy status = 0; 2186577e9bbeSKip Macy PORT_LOCK(p); 2187577e9bbeSKip Macy if ((ifp->if_drv_flags & IFF_DRV_RUNNING)) 2188577e9bbeSKip Macy status = t3b2_mac_watchdog_task(&p->mac); 2189577e9bbeSKip Macy if (status == 1) 2190577e9bbeSKip Macy p->mac.stats.num_toggled++; 2191577e9bbeSKip Macy else if (status == 2) { 2192577e9bbeSKip Macy struct cmac *mac = &p->mac; 21934af83c8cSKip Macy int mtu = ifp->if_mtu; 2194577e9bbeSKip Macy 21954af83c8cSKip Macy if (ifp->if_capenable & IFCAP_VLAN_MTU) 21964af83c8cSKip Macy mtu += ETHER_VLAN_ENCAP_LEN; 21974af83c8cSKip Macy t3_mac_set_mtu(mac, mtu); 2198577e9bbeSKip Macy t3_mac_set_address(mac, 0, p->hw_addr); 2199577e9bbeSKip Macy cxgb_set_rxmode(p); 2200577e9bbeSKip Macy t3_link_start(&p->phy, mac, &p->link_config); 2201577e9bbeSKip Macy t3_mac_enable(mac, MAC_DIRECTION_RX | MAC_DIRECTION_TX); 22026b68e276SKip Macy t3_port_intr_enable(adapter, p->port_id); 2203577e9bbeSKip Macy p->mac.stats.num_resets++; 2204577e9bbeSKip Macy } 2205577e9bbeSKip Macy PORT_UNLOCK(p); 2206577e9bbeSKip Macy } 2207577e9bbeSKip Macy } 2208577e9bbeSKip Macy 2209577e9bbeSKip Macy static void 2210577e9bbeSKip Macy cxgb_tick(void *arg) 2211577e9bbeSKip Macy { 2212577e9bbeSKip Macy adapter_t *sc = (adapter_t *)arg; 22138090c9f5SKip Macy 22148e10660fSKip Macy if(sc->flags & CXGB_SHUTDOWN) 22158090c9f5SKip Macy return; 2216577e9bbeSKip Macy 2217bb38cd2fSKip Macy taskqueue_enqueue(sc->tq, &sc->tick_task); 2218706cb31fSKip Macy callout_reset(&sc->cxgb_tick_ch, CXGB_TICKS(sc), cxgb_tick, sc); 2219bb38cd2fSKip Macy } 2220bb38cd2fSKip Macy 2221bb38cd2fSKip Macy static void 2222bb38cd2fSKip Macy cxgb_tick_handler(void *arg, int count) 2223bb38cd2fSKip Macy { 2224bb38cd2fSKip Macy adapter_t *sc = (adapter_t *)arg; 2225bb38cd2fSKip Macy const struct adapter_params *p = &sc->params; 2226706cb31fSKip Macy int i; 2227bb38cd2fSKip Macy 22288e10660fSKip Macy if(sc->flags & CXGB_SHUTDOWN) 22298e10660fSKip Macy return; 22308e10660fSKip Macy 2231bb38cd2fSKip Macy ADAPTER_LOCK(sc); 2232bb38cd2fSKip Macy if (p->linkpoll_period) 2233bb38cd2fSKip Macy check_link_status(sc); 2234577e9bbeSKip Macy 2235706cb31fSKip Macy sc->check_task_cnt++; 2236706cb31fSKip Macy 2237577e9bbeSKip Macy /* 22388e10660fSKip Macy * adapter lock can currently only be acquired after the 2239577e9bbeSKip Macy * port lock 2240577e9bbeSKip Macy */ 2241577e9bbeSKip Macy ADAPTER_UNLOCK(sc); 2242ef72318fSKip Macy 22438e10660fSKip Macy if (p->rev == T3_REV_B2 && p->nports < 4 && sc->open_device_map) 2244577e9bbeSKip Macy check_t3b2_mac(sc); 2245706cb31fSKip Macy 2246706cb31fSKip Macy /* Update MAC stats if it's time to do so */ 2247706cb31fSKip Macy if (!p->linkpoll_period || 2248706cb31fSKip Macy (sc->check_task_cnt * p->linkpoll_period) / 10 >= 2249706cb31fSKip Macy p->stats_update_period) { 2250706cb31fSKip Macy for_each_port(sc, i) { 2251706cb31fSKip Macy struct port_info *port = &sc->port[i]; 2252706cb31fSKip Macy PORT_LOCK(port); 2253706cb31fSKip Macy t3_mac_update_stats(&port->mac); 2254706cb31fSKip Macy PORT_UNLOCK(port); 2255706cb31fSKip Macy } 2256706cb31fSKip Macy sc->check_task_cnt = 0; 2257706cb31fSKip Macy } 2258577e9bbeSKip Macy } 2259577e9bbeSKip Macy 22607ac2e6c3SKip Macy static void 22617ac2e6c3SKip Macy touch_bars(device_t dev) 22627ac2e6c3SKip Macy { 22637ac2e6c3SKip Macy /* 22647ac2e6c3SKip Macy * Don't enable yet 22657ac2e6c3SKip Macy */ 22667ac2e6c3SKip Macy #if !defined(__LP64__) && 0 22677ac2e6c3SKip Macy u32 v; 22687ac2e6c3SKip Macy 22697ac2e6c3SKip Macy pci_read_config_dword(pdev, PCI_BASE_ADDRESS_1, &v); 22707ac2e6c3SKip Macy pci_write_config_dword(pdev, PCI_BASE_ADDRESS_1, v); 22717ac2e6c3SKip Macy pci_read_config_dword(pdev, PCI_BASE_ADDRESS_3, &v); 22727ac2e6c3SKip Macy pci_write_config_dword(pdev, PCI_BASE_ADDRESS_3, v); 22737ac2e6c3SKip Macy pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &v); 22747ac2e6c3SKip Macy pci_write_config_dword(pdev, PCI_BASE_ADDRESS_5, v); 22757ac2e6c3SKip Macy #endif 22767ac2e6c3SKip Macy } 22777ac2e6c3SKip Macy 2278ac3a6d9cSKip Macy static int 2279ac3a6d9cSKip Macy set_eeprom(struct port_info *pi, const uint8_t *data, int len, int offset) 2280ac3a6d9cSKip Macy { 2281ac3a6d9cSKip Macy uint8_t *buf; 2282ac3a6d9cSKip Macy int err = 0; 2283ac3a6d9cSKip Macy u32 aligned_offset, aligned_len, *p; 2284ac3a6d9cSKip Macy struct adapter *adapter = pi->adapter; 2285ac3a6d9cSKip Macy 2286ac3a6d9cSKip Macy 2287ac3a6d9cSKip Macy aligned_offset = offset & ~3; 2288ac3a6d9cSKip Macy aligned_len = (len + (offset & 3) + 3) & ~3; 2289ac3a6d9cSKip Macy 2290ac3a6d9cSKip Macy if (aligned_offset != offset || aligned_len != len) { 2291ac3a6d9cSKip Macy buf = malloc(aligned_len, M_DEVBUF, M_WAITOK|M_ZERO); 2292ac3a6d9cSKip Macy if (!buf) 2293ac3a6d9cSKip Macy return (ENOMEM); 2294ac3a6d9cSKip Macy err = t3_seeprom_read(adapter, aligned_offset, (u32 *)buf); 2295ac3a6d9cSKip Macy if (!err && aligned_len > 4) 2296ac3a6d9cSKip Macy err = t3_seeprom_read(adapter, 2297ac3a6d9cSKip Macy aligned_offset + aligned_len - 4, 2298ac3a6d9cSKip Macy (u32 *)&buf[aligned_len - 4]); 2299ac3a6d9cSKip Macy if (err) 2300ac3a6d9cSKip Macy goto out; 2301ac3a6d9cSKip Macy memcpy(buf + (offset & 3), data, len); 2302ac3a6d9cSKip Macy } else 2303ac3a6d9cSKip Macy buf = (uint8_t *)(uintptr_t)data; 2304ac3a6d9cSKip Macy 2305ac3a6d9cSKip Macy err = t3_seeprom_wp(adapter, 0); 2306ac3a6d9cSKip Macy if (err) 2307ac3a6d9cSKip Macy goto out; 2308ac3a6d9cSKip Macy 2309ac3a6d9cSKip Macy for (p = (u32 *)buf; !err && aligned_len; aligned_len -= 4, p++) { 2310ac3a6d9cSKip Macy err = t3_seeprom_write(adapter, aligned_offset, *p); 2311ac3a6d9cSKip Macy aligned_offset += 4; 2312ac3a6d9cSKip Macy } 2313ac3a6d9cSKip Macy 2314ac3a6d9cSKip Macy if (!err) 2315ac3a6d9cSKip Macy err = t3_seeprom_wp(adapter, 1); 2316ac3a6d9cSKip Macy out: 2317ac3a6d9cSKip Macy if (buf != data) 2318ac3a6d9cSKip Macy free(buf, M_DEVBUF); 2319ac3a6d9cSKip Macy return err; 2320ac3a6d9cSKip Macy } 2321ac3a6d9cSKip Macy 2322ac3a6d9cSKip Macy 2323b6d90eb7SKip Macy static int 2324b6d90eb7SKip Macy in_range(int val, int lo, int hi) 2325b6d90eb7SKip Macy { 2326b6d90eb7SKip Macy return val < 0 || (val <= hi && val >= lo); 2327b6d90eb7SKip Macy } 2328b6d90eb7SKip Macy 2329b6d90eb7SKip Macy static int 2330ef72318fSKip Macy cxgb_extension_open(struct cdev *dev, int flags, int fmp, d_thread_t *td) 2331ef72318fSKip Macy { 2332ef72318fSKip Macy return (0); 2333ef72318fSKip Macy } 2334ef72318fSKip Macy 2335ef72318fSKip Macy static int 2336ef72318fSKip Macy cxgb_extension_close(struct cdev *dev, int flags, int fmt, d_thread_t *td) 2337ef72318fSKip Macy { 2338ef72318fSKip Macy return (0); 2339ef72318fSKip Macy } 2340ef72318fSKip Macy 2341ef72318fSKip Macy static int 2342b6d90eb7SKip Macy cxgb_extension_ioctl(struct cdev *dev, unsigned long cmd, caddr_t data, 2343b6d90eb7SKip Macy int fflag, struct thread *td) 2344b6d90eb7SKip Macy { 2345b6d90eb7SKip Macy int mmd, error = 0; 2346b6d90eb7SKip Macy struct port_info *pi = dev->si_drv1; 2347b6d90eb7SKip Macy adapter_t *sc = pi->adapter; 2348b6d90eb7SKip Macy 2349b6d90eb7SKip Macy #ifdef PRIV_SUPPORTED 2350b6d90eb7SKip Macy if (priv_check(td, PRIV_DRIVER)) { 2351b6d90eb7SKip Macy if (cxgb_debug) 2352b6d90eb7SKip Macy printf("user does not have access to privileged ioctls\n"); 2353b6d90eb7SKip Macy return (EPERM); 2354b6d90eb7SKip Macy } 2355b6d90eb7SKip Macy #else 2356b6d90eb7SKip Macy if (suser(td)) { 2357b6d90eb7SKip Macy if (cxgb_debug) 2358b6d90eb7SKip Macy printf("user does not have access to privileged ioctls\n"); 2359b6d90eb7SKip Macy return (EPERM); 2360b6d90eb7SKip Macy } 2361b6d90eb7SKip Macy #endif 2362b6d90eb7SKip Macy 2363b6d90eb7SKip Macy switch (cmd) { 2364b6d90eb7SKip Macy case SIOCGMIIREG: { 2365b6d90eb7SKip Macy uint32_t val; 2366b6d90eb7SKip Macy struct cphy *phy = &pi->phy; 2367b6d90eb7SKip Macy struct mii_data *mid = (struct mii_data *)data; 2368b6d90eb7SKip Macy 2369b6d90eb7SKip Macy if (!phy->mdio_read) 2370b6d90eb7SKip Macy return (EOPNOTSUPP); 2371b6d90eb7SKip Macy if (is_10G(sc)) { 2372b6d90eb7SKip Macy mmd = mid->phy_id >> 8; 2373b6d90eb7SKip Macy if (!mmd) 2374b6d90eb7SKip Macy mmd = MDIO_DEV_PCS; 2375b6d90eb7SKip Macy else if (mmd > MDIO_DEV_XGXS) 2376ac3a6d9cSKip Macy return (EINVAL); 2377b6d90eb7SKip Macy 2378b6d90eb7SKip Macy error = phy->mdio_read(sc, mid->phy_id & 0x1f, mmd, 2379b6d90eb7SKip Macy mid->reg_num, &val); 2380b6d90eb7SKip Macy } else 2381b6d90eb7SKip Macy error = phy->mdio_read(sc, mid->phy_id & 0x1f, 0, 2382b6d90eb7SKip Macy mid->reg_num & 0x1f, &val); 2383b6d90eb7SKip Macy if (error == 0) 2384b6d90eb7SKip Macy mid->val_out = val; 2385b6d90eb7SKip Macy break; 2386b6d90eb7SKip Macy } 2387b6d90eb7SKip Macy case SIOCSMIIREG: { 2388b6d90eb7SKip Macy struct cphy *phy = &pi->phy; 2389b6d90eb7SKip Macy struct mii_data *mid = (struct mii_data *)data; 2390b6d90eb7SKip Macy 2391b6d90eb7SKip Macy if (!phy->mdio_write) 2392b6d90eb7SKip Macy return (EOPNOTSUPP); 2393b6d90eb7SKip Macy if (is_10G(sc)) { 2394b6d90eb7SKip Macy mmd = mid->phy_id >> 8; 2395b6d90eb7SKip Macy if (!mmd) 2396b6d90eb7SKip Macy mmd = MDIO_DEV_PCS; 2397b6d90eb7SKip Macy else if (mmd > MDIO_DEV_XGXS) 2398b6d90eb7SKip Macy return (EINVAL); 2399b6d90eb7SKip Macy 2400b6d90eb7SKip Macy error = phy->mdio_write(sc, mid->phy_id & 0x1f, 2401b6d90eb7SKip Macy mmd, mid->reg_num, mid->val_in); 2402b6d90eb7SKip Macy } else 2403b6d90eb7SKip Macy error = phy->mdio_write(sc, mid->phy_id & 0x1f, 0, 2404b6d90eb7SKip Macy mid->reg_num & 0x1f, 2405b6d90eb7SKip Macy mid->val_in); 2406b6d90eb7SKip Macy break; 2407b6d90eb7SKip Macy } 2408b6d90eb7SKip Macy case CHELSIO_SETREG: { 2409b6d90eb7SKip Macy struct ch_reg *edata = (struct ch_reg *)data; 2410b6d90eb7SKip Macy if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) 2411b6d90eb7SKip Macy return (EFAULT); 2412b6d90eb7SKip Macy t3_write_reg(sc, edata->addr, edata->val); 2413b6d90eb7SKip Macy break; 2414b6d90eb7SKip Macy } 2415b6d90eb7SKip Macy case CHELSIO_GETREG: { 2416b6d90eb7SKip Macy struct ch_reg *edata = (struct ch_reg *)data; 2417b6d90eb7SKip Macy if ((edata->addr & 0x3) != 0 || edata->addr >= sc->mmio_len) 2418b6d90eb7SKip Macy return (EFAULT); 2419b6d90eb7SKip Macy edata->val = t3_read_reg(sc, edata->addr); 2420b6d90eb7SKip Macy break; 2421b6d90eb7SKip Macy } 2422b6d90eb7SKip Macy case CHELSIO_GET_SGE_CONTEXT: { 2423b6d90eb7SKip Macy struct ch_cntxt *ecntxt = (struct ch_cntxt *)data; 24248e10660fSKip Macy mtx_lock_spin(&sc->sge.reg_lock); 2425b6d90eb7SKip Macy switch (ecntxt->cntxt_type) { 2426b6d90eb7SKip Macy case CNTXT_TYPE_EGRESS: 2427b6d90eb7SKip Macy error = t3_sge_read_ecntxt(sc, ecntxt->cntxt_id, 2428b6d90eb7SKip Macy ecntxt->data); 2429b6d90eb7SKip Macy break; 2430b6d90eb7SKip Macy case CNTXT_TYPE_FL: 2431b6d90eb7SKip Macy error = t3_sge_read_fl(sc, ecntxt->cntxt_id, 2432b6d90eb7SKip Macy ecntxt->data); 2433b6d90eb7SKip Macy break; 2434b6d90eb7SKip Macy case CNTXT_TYPE_RSP: 2435b6d90eb7SKip Macy error = t3_sge_read_rspq(sc, ecntxt->cntxt_id, 2436b6d90eb7SKip Macy ecntxt->data); 2437b6d90eb7SKip Macy break; 2438b6d90eb7SKip Macy case CNTXT_TYPE_CQ: 2439b6d90eb7SKip Macy error = t3_sge_read_cq(sc, ecntxt->cntxt_id, 2440b6d90eb7SKip Macy ecntxt->data); 2441b6d90eb7SKip Macy break; 2442b6d90eb7SKip Macy default: 2443b6d90eb7SKip Macy error = EINVAL; 2444b6d90eb7SKip Macy break; 2445b6d90eb7SKip Macy } 24468e10660fSKip Macy mtx_unlock_spin(&sc->sge.reg_lock); 2447b6d90eb7SKip Macy break; 2448b6d90eb7SKip Macy } 2449b6d90eb7SKip Macy case CHELSIO_GET_SGE_DESC: { 2450b6d90eb7SKip Macy struct ch_desc *edesc = (struct ch_desc *)data; 2451b6d90eb7SKip Macy int ret; 2452b6d90eb7SKip Macy if (edesc->queue_num >= SGE_QSETS * 6) 2453b6d90eb7SKip Macy return (EINVAL); 2454b6d90eb7SKip Macy ret = t3_get_desc(&sc->sge.qs[edesc->queue_num / 6], 2455b6d90eb7SKip Macy edesc->queue_num % 6, edesc->idx, edesc->data); 2456b6d90eb7SKip Macy if (ret < 0) 2457b6d90eb7SKip Macy return (EINVAL); 2458b6d90eb7SKip Macy edesc->size = ret; 2459b6d90eb7SKip Macy break; 2460b6d90eb7SKip Macy } 2461b6d90eb7SKip Macy case CHELSIO_SET_QSET_PARAMS: { 2462b6d90eb7SKip Macy struct qset_params *q; 2463b6d90eb7SKip Macy struct ch_qset_params *t = (struct ch_qset_params *)data; 24648e10660fSKip Macy int i; 2465b6d90eb7SKip Macy 2466b6d90eb7SKip Macy if (t->qset_idx >= SGE_QSETS) 2467ac3a6d9cSKip Macy return (EINVAL); 2468b6d90eb7SKip Macy if (!in_range(t->intr_lat, 0, M_NEWTIMER) || 2469b6d90eb7SKip Macy !in_range(t->cong_thres, 0, 255) || 2470b6d90eb7SKip Macy !in_range(t->txq_size[0], MIN_TXQ_ENTRIES, 2471b6d90eb7SKip Macy MAX_TXQ_ENTRIES) || 2472b6d90eb7SKip Macy !in_range(t->txq_size[1], MIN_TXQ_ENTRIES, 2473b6d90eb7SKip Macy MAX_TXQ_ENTRIES) || 2474b6d90eb7SKip Macy !in_range(t->txq_size[2], MIN_CTRL_TXQ_ENTRIES, 2475b6d90eb7SKip Macy MAX_CTRL_TXQ_ENTRIES) || 2476b6d90eb7SKip Macy !in_range(t->fl_size[0], MIN_FL_ENTRIES, MAX_RX_BUFFERS) || 2477b6d90eb7SKip Macy !in_range(t->fl_size[1], MIN_FL_ENTRIES, 2478b6d90eb7SKip Macy MAX_RX_JUMBO_BUFFERS) || 2479b6d90eb7SKip Macy !in_range(t->rspq_size, MIN_RSPQ_ENTRIES, MAX_RSPQ_ENTRIES)) 2480ac3a6d9cSKip Macy return (EINVAL); 24818e10660fSKip Macy 24828e10660fSKip Macy if ((sc->flags & FULL_INIT_DONE) && t->lro > 0) 24838e10660fSKip Macy for_each_port(sc, i) { 24848e10660fSKip Macy pi = adap2pinfo(sc, i); 24858e10660fSKip Macy if (t->qset_idx >= pi->first_qset && 24868e10660fSKip Macy t->qset_idx < pi->first_qset + pi->nqsets 24878e10660fSKip Macy #if 0 24888e10660fSKip Macy && !pi->rx_csum_offload 24898e10660fSKip Macy #endif 24908e10660fSKip Macy ) 24918e10660fSKip Macy return -EINVAL; 24928e10660fSKip Macy } 2493b6d90eb7SKip Macy if ((sc->flags & FULL_INIT_DONE) && 2494b6d90eb7SKip Macy (t->rspq_size >= 0 || t->fl_size[0] >= 0 || 2495b6d90eb7SKip Macy t->fl_size[1] >= 0 || t->txq_size[0] >= 0 || 2496b6d90eb7SKip Macy t->txq_size[1] >= 0 || t->txq_size[2] >= 0 || 2497b6d90eb7SKip Macy t->polling >= 0 || t->cong_thres >= 0)) 2498ac3a6d9cSKip Macy return (EBUSY); 2499b6d90eb7SKip Macy 2500b6d90eb7SKip Macy q = &sc->params.sge.qset[t->qset_idx]; 2501b6d90eb7SKip Macy 2502b6d90eb7SKip Macy if (t->rspq_size >= 0) 2503b6d90eb7SKip Macy q->rspq_size = t->rspq_size; 2504b6d90eb7SKip Macy if (t->fl_size[0] >= 0) 2505b6d90eb7SKip Macy q->fl_size = t->fl_size[0]; 2506b6d90eb7SKip Macy if (t->fl_size[1] >= 0) 2507b6d90eb7SKip Macy q->jumbo_size = t->fl_size[1]; 2508b6d90eb7SKip Macy if (t->txq_size[0] >= 0) 2509b6d90eb7SKip Macy q->txq_size[0] = t->txq_size[0]; 2510b6d90eb7SKip Macy if (t->txq_size[1] >= 0) 2511b6d90eb7SKip Macy q->txq_size[1] = t->txq_size[1]; 2512b6d90eb7SKip Macy if (t->txq_size[2] >= 0) 2513b6d90eb7SKip Macy q->txq_size[2] = t->txq_size[2]; 2514b6d90eb7SKip Macy if (t->cong_thres >= 0) 2515b6d90eb7SKip Macy q->cong_thres = t->cong_thres; 2516b6d90eb7SKip Macy if (t->intr_lat >= 0) { 2517b6d90eb7SKip Macy struct sge_qset *qs = &sc->sge.qs[t->qset_idx]; 2518b6d90eb7SKip Macy 25194af83c8cSKip Macy q->coalesce_usecs = t->intr_lat; 2520b6d90eb7SKip Macy t3_update_qset_coalesce(qs, q); 2521b6d90eb7SKip Macy } 2522b6d90eb7SKip Macy break; 2523b6d90eb7SKip Macy } 2524b6d90eb7SKip Macy case CHELSIO_GET_QSET_PARAMS: { 2525b6d90eb7SKip Macy struct qset_params *q; 2526b6d90eb7SKip Macy struct ch_qset_params *t = (struct ch_qset_params *)data; 2527b6d90eb7SKip Macy 2528b6d90eb7SKip Macy if (t->qset_idx >= SGE_QSETS) 2529b6d90eb7SKip Macy return (EINVAL); 2530b6d90eb7SKip Macy 2531b6d90eb7SKip Macy q = &(sc)->params.sge.qset[t->qset_idx]; 2532b6d90eb7SKip Macy t->rspq_size = q->rspq_size; 2533b6d90eb7SKip Macy t->txq_size[0] = q->txq_size[0]; 2534b6d90eb7SKip Macy t->txq_size[1] = q->txq_size[1]; 2535b6d90eb7SKip Macy t->txq_size[2] = q->txq_size[2]; 2536b6d90eb7SKip Macy t->fl_size[0] = q->fl_size; 2537b6d90eb7SKip Macy t->fl_size[1] = q->jumbo_size; 2538b6d90eb7SKip Macy t->polling = q->polling; 25394af83c8cSKip Macy t->intr_lat = q->coalesce_usecs; 2540b6d90eb7SKip Macy t->cong_thres = q->cong_thres; 2541b6d90eb7SKip Macy break; 2542b6d90eb7SKip Macy } 2543b6d90eb7SKip Macy case CHELSIO_SET_QSET_NUM: { 2544b6d90eb7SKip Macy struct ch_reg *edata = (struct ch_reg *)data; 25456b68e276SKip Macy unsigned int port_idx = pi->port_id; 2546b6d90eb7SKip Macy 2547b6d90eb7SKip Macy if (sc->flags & FULL_INIT_DONE) 2548b6d90eb7SKip Macy return (EBUSY); 2549b6d90eb7SKip Macy if (edata->val < 1 || 2550b6d90eb7SKip Macy (edata->val > 1 && !(sc->flags & USING_MSIX))) 2551b6d90eb7SKip Macy return (EINVAL); 2552b6d90eb7SKip Macy if (edata->val + sc->port[!port_idx].nqsets > SGE_QSETS) 2553b6d90eb7SKip Macy return (EINVAL); 2554b6d90eb7SKip Macy sc->port[port_idx].nqsets = edata->val; 2555d722cab4SKip Macy sc->port[0].first_qset = 0; 2556b6d90eb7SKip Macy /* 2557d722cab4SKip Macy * XXX hardcode ourselves to 2 ports just like LEEENUX 2558b6d90eb7SKip Macy */ 2559b6d90eb7SKip Macy sc->port[1].first_qset = sc->port[0].nqsets; 2560b6d90eb7SKip Macy break; 2561b6d90eb7SKip Macy } 2562b6d90eb7SKip Macy case CHELSIO_GET_QSET_NUM: { 2563b6d90eb7SKip Macy struct ch_reg *edata = (struct ch_reg *)data; 2564b6d90eb7SKip Macy edata->val = pi->nqsets; 2565b6d90eb7SKip Macy break; 2566b6d90eb7SKip Macy } 2567b6d90eb7SKip Macy #ifdef notyet 2568b6d90eb7SKip Macy case CHELSIO_LOAD_FW: 2569b6d90eb7SKip Macy case CHELSIO_GET_PM: 2570b6d90eb7SKip Macy case CHELSIO_SET_PM: 2571b6d90eb7SKip Macy return (EOPNOTSUPP); 2572b6d90eb7SKip Macy break; 2573b6d90eb7SKip Macy #endif 2574d722cab4SKip Macy case CHELSIO_SETMTUTAB: { 2575d722cab4SKip Macy struct ch_mtus *m = (struct ch_mtus *)data; 2576d722cab4SKip Macy int i; 2577d722cab4SKip Macy 2578d722cab4SKip Macy if (!is_offload(sc)) 2579d722cab4SKip Macy return (EOPNOTSUPP); 2580d722cab4SKip Macy if (offload_running(sc)) 2581d722cab4SKip Macy return (EBUSY); 2582d722cab4SKip Macy if (m->nmtus != NMTUS) 2583d722cab4SKip Macy return (EINVAL); 2584d722cab4SKip Macy if (m->mtus[0] < 81) /* accommodate SACK */ 2585d722cab4SKip Macy return (EINVAL); 2586d722cab4SKip Macy 2587d722cab4SKip Macy /* 2588d722cab4SKip Macy * MTUs must be in ascending order 2589d722cab4SKip Macy */ 2590d722cab4SKip Macy for (i = 1; i < NMTUS; ++i) 2591d722cab4SKip Macy if (m->mtus[i] < m->mtus[i - 1]) 2592d722cab4SKip Macy return (EINVAL); 2593d722cab4SKip Macy 2594d722cab4SKip Macy memcpy(sc->params.mtus, m->mtus, 2595d722cab4SKip Macy sizeof(sc->params.mtus)); 2596d722cab4SKip Macy break; 2597d722cab4SKip Macy } 2598d722cab4SKip Macy case CHELSIO_GETMTUTAB: { 2599d722cab4SKip Macy struct ch_mtus *m = (struct ch_mtus *)data; 2600d722cab4SKip Macy 2601d722cab4SKip Macy if (!is_offload(sc)) 2602d722cab4SKip Macy return (EOPNOTSUPP); 2603d722cab4SKip Macy 2604d722cab4SKip Macy memcpy(m->mtus, sc->params.mtus, sizeof(m->mtus)); 2605d722cab4SKip Macy m->nmtus = NMTUS; 2606d722cab4SKip Macy break; 2607d722cab4SKip Macy } 2608d722cab4SKip Macy case CHELSIO_DEVUP: 2609d722cab4SKip Macy if (!is_offload(sc)) 2610d722cab4SKip Macy return (EOPNOTSUPP); 2611d722cab4SKip Macy return offload_open(pi); 2612d722cab4SKip Macy break; 2613b6d90eb7SKip Macy case CHELSIO_GET_MEM: { 2614b6d90eb7SKip Macy struct ch_mem_range *t = (struct ch_mem_range *)data; 2615b6d90eb7SKip Macy struct mc7 *mem; 2616b6d90eb7SKip Macy uint8_t *useraddr; 2617b6d90eb7SKip Macy u64 buf[32]; 2618b6d90eb7SKip Macy 2619b6d90eb7SKip Macy if (!is_offload(sc)) 2620b6d90eb7SKip Macy return (EOPNOTSUPP); 2621b6d90eb7SKip Macy if (!(sc->flags & FULL_INIT_DONE)) 2622b6d90eb7SKip Macy return (EIO); /* need the memory controllers */ 2623b6d90eb7SKip Macy if ((t->addr & 0x7) || (t->len & 0x7)) 2624b6d90eb7SKip Macy return (EINVAL); 2625b6d90eb7SKip Macy if (t->mem_id == MEM_CM) 2626b6d90eb7SKip Macy mem = &sc->cm; 2627b6d90eb7SKip Macy else if (t->mem_id == MEM_PMRX) 2628b6d90eb7SKip Macy mem = &sc->pmrx; 2629b6d90eb7SKip Macy else if (t->mem_id == MEM_PMTX) 2630b6d90eb7SKip Macy mem = &sc->pmtx; 2631b6d90eb7SKip Macy else 2632b6d90eb7SKip Macy return (EINVAL); 2633b6d90eb7SKip Macy 2634b6d90eb7SKip Macy /* 2635b6d90eb7SKip Macy * Version scheme: 2636b6d90eb7SKip Macy * bits 0..9: chip version 2637b6d90eb7SKip Macy * bits 10..15: chip revision 2638b6d90eb7SKip Macy */ 2639b6d90eb7SKip Macy t->version = 3 | (sc->params.rev << 10); 2640b6d90eb7SKip Macy 2641b6d90eb7SKip Macy /* 2642b6d90eb7SKip Macy * Read 256 bytes at a time as len can be large and we don't 2643b6d90eb7SKip Macy * want to use huge intermediate buffers. 2644b6d90eb7SKip Macy */ 26458090c9f5SKip Macy useraddr = (uint8_t *)t->buf; 2646b6d90eb7SKip Macy while (t->len) { 2647b6d90eb7SKip Macy unsigned int chunk = min(t->len, sizeof(buf)); 2648b6d90eb7SKip Macy 2649b6d90eb7SKip Macy error = t3_mc7_bd_read(mem, t->addr / 8, chunk / 8, buf); 2650b6d90eb7SKip Macy if (error) 2651b6d90eb7SKip Macy return (-error); 2652b6d90eb7SKip Macy if (copyout(buf, useraddr, chunk)) 2653b6d90eb7SKip Macy return (EFAULT); 2654b6d90eb7SKip Macy useraddr += chunk; 2655b6d90eb7SKip Macy t->addr += chunk; 2656b6d90eb7SKip Macy t->len -= chunk; 2657b6d90eb7SKip Macy } 2658b6d90eb7SKip Macy break; 2659b6d90eb7SKip Macy } 2660d722cab4SKip Macy case CHELSIO_READ_TCAM_WORD: { 2661d722cab4SKip Macy struct ch_tcam_word *t = (struct ch_tcam_word *)data; 2662d722cab4SKip Macy 2663d722cab4SKip Macy if (!is_offload(sc)) 2664d722cab4SKip Macy return (EOPNOTSUPP); 2665ac3a6d9cSKip Macy if (!(sc->flags & FULL_INIT_DONE)) 2666ac3a6d9cSKip Macy return (EIO); /* need MC5 */ 2667d722cab4SKip Macy return -t3_read_mc5_range(&sc->mc5, t->addr, 1, t->buf); 2668d722cab4SKip Macy break; 2669d722cab4SKip Macy } 2670b6d90eb7SKip Macy case CHELSIO_SET_TRACE_FILTER: { 2671b6d90eb7SKip Macy struct ch_trace *t = (struct ch_trace *)data; 2672b6d90eb7SKip Macy const struct trace_params *tp; 2673b6d90eb7SKip Macy 2674b6d90eb7SKip Macy tp = (const struct trace_params *)&t->sip; 2675b6d90eb7SKip Macy if (t->config_tx) 2676b6d90eb7SKip Macy t3_config_trace_filter(sc, tp, 0, t->invert_match, 2677b6d90eb7SKip Macy t->trace_tx); 2678b6d90eb7SKip Macy if (t->config_rx) 2679b6d90eb7SKip Macy t3_config_trace_filter(sc, tp, 1, t->invert_match, 2680b6d90eb7SKip Macy t->trace_rx); 2681b6d90eb7SKip Macy break; 2682b6d90eb7SKip Macy } 2683b6d90eb7SKip Macy case CHELSIO_SET_PKTSCHED: { 2684b6d90eb7SKip Macy struct ch_pktsched_params *p = (struct ch_pktsched_params *)data; 2685b6d90eb7SKip Macy if (sc->open_device_map == 0) 2686b6d90eb7SKip Macy return (EAGAIN); 2687b6d90eb7SKip Macy send_pktsched_cmd(sc, p->sched, p->idx, p->min, p->max, 2688b6d90eb7SKip Macy p->binding); 2689b6d90eb7SKip Macy break; 2690b6d90eb7SKip Macy } 2691b6d90eb7SKip Macy case CHELSIO_IFCONF_GETREGS: { 2692b6d90eb7SKip Macy struct ifconf_regs *regs = (struct ifconf_regs *)data; 2693b6d90eb7SKip Macy int reglen = cxgb_get_regs_len(); 2694b6d90eb7SKip Macy uint8_t *buf = malloc(REGDUMP_SIZE, M_DEVBUF, M_NOWAIT); 2695b6d90eb7SKip Macy if (buf == NULL) { 2696b6d90eb7SKip Macy return (ENOMEM); 2697b6d90eb7SKip Macy } if (regs->len > reglen) 2698b6d90eb7SKip Macy regs->len = reglen; 2699b6d90eb7SKip Macy else if (regs->len < reglen) { 2700b6d90eb7SKip Macy error = E2BIG; 2701b6d90eb7SKip Macy goto done; 2702b6d90eb7SKip Macy } 2703b6d90eb7SKip Macy cxgb_get_regs(sc, regs, buf); 2704b6d90eb7SKip Macy error = copyout(buf, regs->data, reglen); 2705b6d90eb7SKip Macy 2706b6d90eb7SKip Macy done: 2707b6d90eb7SKip Macy free(buf, M_DEVBUF); 2708b6d90eb7SKip Macy 2709b6d90eb7SKip Macy break; 2710b6d90eb7SKip Macy } 2711d722cab4SKip Macy case CHELSIO_SET_HW_SCHED: { 2712d722cab4SKip Macy struct ch_hw_sched *t = (struct ch_hw_sched *)data; 2713d722cab4SKip Macy unsigned int ticks_per_usec = core_ticks_per_usec(sc); 2714d722cab4SKip Macy 2715d722cab4SKip Macy if ((sc->flags & FULL_INIT_DONE) == 0) 2716d722cab4SKip Macy return (EAGAIN); /* need TP to be initialized */ 2717d722cab4SKip Macy if (t->sched >= NTX_SCHED || !in_range(t->mode, 0, 1) || 2718d722cab4SKip Macy !in_range(t->channel, 0, 1) || 2719d722cab4SKip Macy !in_range(t->kbps, 0, 10000000) || 2720d722cab4SKip Macy !in_range(t->class_ipg, 0, 10000 * 65535 / ticks_per_usec) || 2721d722cab4SKip Macy !in_range(t->flow_ipg, 0, 2722d722cab4SKip Macy dack_ticks_to_usec(sc, 0x7ff))) 2723d722cab4SKip Macy return (EINVAL); 2724d722cab4SKip Macy 2725d722cab4SKip Macy if (t->kbps >= 0) { 2726d722cab4SKip Macy error = t3_config_sched(sc, t->kbps, t->sched); 2727d722cab4SKip Macy if (error < 0) 2728d722cab4SKip Macy return (-error); 2729d722cab4SKip Macy } 2730d722cab4SKip Macy if (t->class_ipg >= 0) 2731d722cab4SKip Macy t3_set_sched_ipg(sc, t->sched, t->class_ipg); 2732d722cab4SKip Macy if (t->flow_ipg >= 0) { 2733d722cab4SKip Macy t->flow_ipg *= 1000; /* us -> ns */ 2734d722cab4SKip Macy t3_set_pace_tbl(sc, &t->flow_ipg, t->sched, 1); 2735d722cab4SKip Macy } 2736d722cab4SKip Macy if (t->mode >= 0) { 2737d722cab4SKip Macy int bit = 1 << (S_TX_MOD_TIMER_MODE + t->sched); 2738d722cab4SKip Macy 2739d722cab4SKip Macy t3_set_reg_field(sc, A_TP_TX_MOD_QUEUE_REQ_MAP, 2740d722cab4SKip Macy bit, t->mode ? bit : 0); 2741d722cab4SKip Macy } 2742d722cab4SKip Macy if (t->channel >= 0) 2743d722cab4SKip Macy t3_set_reg_field(sc, A_TP_TX_MOD_QUEUE_REQ_MAP, 2744d722cab4SKip Macy 1 << t->sched, t->channel << t->sched); 2745d722cab4SKip Macy break; 2746d722cab4SKip Macy } 2747b6d90eb7SKip Macy default: 2748b6d90eb7SKip Macy return (EOPNOTSUPP); 2749b6d90eb7SKip Macy break; 2750b6d90eb7SKip Macy } 2751b6d90eb7SKip Macy 2752b6d90eb7SKip Macy return (error); 2753b6d90eb7SKip Macy } 2754b6d90eb7SKip Macy 2755b6d90eb7SKip Macy static __inline void 2756b6d90eb7SKip Macy reg_block_dump(struct adapter *ap, uint8_t *buf, unsigned int start, 2757b6d90eb7SKip Macy unsigned int end) 2758b6d90eb7SKip Macy { 2759b6d90eb7SKip Macy uint32_t *p = (uint32_t *)buf + start; 2760b6d90eb7SKip Macy 2761b6d90eb7SKip Macy for ( ; start <= end; start += sizeof(uint32_t)) 2762b6d90eb7SKip Macy *p++ = t3_read_reg(ap, start); 2763b6d90eb7SKip Macy } 2764b6d90eb7SKip Macy 2765b6d90eb7SKip Macy #define T3_REGMAP_SIZE (3 * 1024) 2766b6d90eb7SKip Macy static int 2767b6d90eb7SKip Macy cxgb_get_regs_len(void) 2768b6d90eb7SKip Macy { 2769b6d90eb7SKip Macy return T3_REGMAP_SIZE; 2770b6d90eb7SKip Macy } 2771b6d90eb7SKip Macy #undef T3_REGMAP_SIZE 2772b6d90eb7SKip Macy 2773b6d90eb7SKip Macy static void 2774b6d90eb7SKip Macy cxgb_get_regs(adapter_t *sc, struct ifconf_regs *regs, uint8_t *buf) 2775b6d90eb7SKip Macy { 2776b6d90eb7SKip Macy 2777b6d90eb7SKip Macy /* 2778b6d90eb7SKip Macy * Version scheme: 2779b6d90eb7SKip Macy * bits 0..9: chip version 2780b6d90eb7SKip Macy * bits 10..15: chip revision 2781b6d90eb7SKip Macy * bit 31: set for PCIe cards 2782b6d90eb7SKip Macy */ 2783b6d90eb7SKip Macy regs->version = 3 | (sc->params.rev << 10) | (is_pcie(sc) << 31); 2784b6d90eb7SKip Macy 2785b6d90eb7SKip Macy /* 2786b6d90eb7SKip Macy * We skip the MAC statistics registers because they are clear-on-read. 2787b6d90eb7SKip Macy * Also reading multi-register stats would need to synchronize with the 2788b6d90eb7SKip Macy * periodic mac stats accumulation. Hard to justify the complexity. 2789b6d90eb7SKip Macy */ 2790b6d90eb7SKip Macy memset(buf, 0, REGDUMP_SIZE); 2791b6d90eb7SKip Macy reg_block_dump(sc, buf, 0, A_SG_RSPQ_CREDIT_RETURN); 2792b6d90eb7SKip Macy reg_block_dump(sc, buf, A_SG_HI_DRB_HI_THRSH, A_ULPRX_PBL_ULIMIT); 2793b6d90eb7SKip Macy reg_block_dump(sc, buf, A_ULPTX_CONFIG, A_MPS_INT_CAUSE); 2794b6d90eb7SKip Macy reg_block_dump(sc, buf, A_CPL_SWITCH_CNTRL, A_CPL_MAP_TBL_DATA); 2795b6d90eb7SKip Macy reg_block_dump(sc, buf, A_SMB_GLOBAL_TIME_CFG, A_XGM_SERDES_STAT3); 2796b6d90eb7SKip Macy reg_block_dump(sc, buf, A_XGM_SERDES_STATUS0, 2797b6d90eb7SKip Macy XGM_REG(A_XGM_SERDES_STAT3, 1)); 2798b6d90eb7SKip Macy reg_block_dump(sc, buf, XGM_REG(A_XGM_SERDES_STATUS0, 1), 2799b6d90eb7SKip Macy XGM_REG(A_XGM_RX_SPI4_SOP_EOP_CNT, 1)); 2800b6d90eb7SKip Macy } 2801404825a7SKip Macy 2802404825a7SKip Macy 2803404825a7SKip Macy MODULE_DEPEND(if_cxgb, cxgb_t3fw, 1, 1, 1); 2804