1 /************************************************************************** 2 3 Copyright (c) 2007-2008, Chelsio Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Neither the name of the Chelsio Corporation nor the names of its 13 contributors may be used to endorse or promote products derived from 14 this software without specific prior written permission. 15 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 POSSIBILITY OF SUCH DAMAGE. 27 28 $FreeBSD$ 29 30 ***************************************************************************/ 31 #ifndef __CHIOCTL_H__ 32 #define __CHIOCTL_H__ 33 34 /* 35 * Ioctl commands specific to this driver. 36 */ 37 enum { 38 CH_SETREG = 0x40, 39 CH_GETREG, 40 CH_GETMTUTAB, 41 CH_SETMTUTAB, 42 CH_SET_PM, 43 CH_GET_PM, 44 CH_READ_TCAM_WORD, 45 CH_GET_MEM, 46 CH_GET_SGE_CONTEXT, 47 CH_GET_SGE_DESC, 48 CH_LOAD_FW, 49 CH_SET_TRACE_FILTER, 50 CH_GET_QSET_PARAMS, 51 CH_GET_QSET_NUM, 52 CH_SET_PKTSCHED, 53 CH_IFCONF_GETREGS, 54 CH_GET_MIIREG, 55 CH_SET_MIIREG, 56 CH_GET_EEPROM, 57 CH_SET_HW_SCHED, 58 CH_LOAD_BOOT, 59 CH_CLEAR_STATS, 60 CH_GET_UP_LA, 61 CH_GET_UP_IOQS, 62 }; 63 64 /* statistics categories */ 65 enum { 66 STATS_PORT = 1 << 1, 67 STATS_QUEUE = 1 << 2, 68 }; 69 70 struct ch_reg { 71 uint32_t addr; 72 uint32_t val; 73 }; 74 75 struct ch_cntxt { 76 uint32_t cntxt_type; 77 uint32_t cntxt_id; 78 uint32_t data[4]; 79 }; 80 81 /* context types */ 82 enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ }; 83 84 struct ch_desc { 85 uint32_t queue_num; 86 uint32_t idx; 87 uint32_t size; 88 uint8_t data[128]; 89 }; 90 91 struct ch_mem_range { 92 uint32_t mem_id; 93 uint32_t addr; 94 uint32_t len; 95 uint32_t version; 96 uint8_t *buf; 97 }; 98 99 enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */ 100 101 struct ch_qset_params { 102 uint32_t qset_idx; 103 int32_t txq_size[3]; 104 int32_t rspq_size; 105 int32_t fl_size[2]; 106 int32_t intr_lat; 107 int32_t polling; 108 int32_t lro; 109 int32_t cong_thres; 110 int32_t vector; 111 int32_t qnum; 112 }; 113 114 struct ch_pktsched_params { 115 uint8_t sched; 116 uint8_t idx; 117 uint8_t min; 118 uint8_t max; 119 uint8_t binding; 120 }; 121 122 struct ch_hw_sched { 123 uint8_t sched; 124 int8_t mode; 125 int8_t channel; 126 int32_t kbps; /* rate in Kbps */ 127 int32_t class_ipg; /* tenths of nanoseconds */ 128 int32_t flow_ipg; /* usec */ 129 }; 130 131 struct ch_mtus { 132 uint32_t nmtus; 133 uint16_t mtus[NMTUS]; 134 }; 135 136 struct ch_pm { 137 uint32_t tx_pg_sz; 138 uint32_t tx_num_pg; 139 uint32_t rx_pg_sz; 140 uint32_t rx_num_pg; 141 uint32_t pm_total; 142 }; 143 144 struct ch_tcam_word { 145 uint32_t addr; 146 uint32_t buf[3]; 147 }; 148 149 struct ch_trace { 150 uint32_t sip; 151 uint32_t sip_mask; 152 uint32_t dip; 153 uint32_t dip_mask; 154 uint16_t sport; 155 uint16_t sport_mask; 156 uint16_t dport; 157 uint16_t dport_mask; 158 uint32_t vlan:12; 159 uint32_t vlan_mask:12; 160 uint32_t intf:4; 161 uint32_t intf_mask:4; 162 uint8_t proto; 163 uint8_t proto_mask; 164 uint8_t invert_match:1; 165 uint8_t config_tx:1; 166 uint8_t config_rx:1; 167 uint8_t trace_tx:1; 168 uint8_t trace_rx:1; 169 }; 170 171 #define REGDUMP_SIZE (4 * 1024) 172 173 struct ch_ifconf_regs { 174 uint32_t version; 175 uint32_t len; /* bytes */ 176 uint8_t *data; 177 }; 178 179 struct ch_mii_data { 180 uint32_t phy_id; 181 uint32_t reg_num; 182 uint32_t val_in; 183 uint32_t val_out; 184 }; 185 186 struct ch_eeprom { 187 uint32_t magic; 188 uint32_t offset; 189 uint32_t len; 190 uint8_t *data; 191 }; 192 193 #define LA_BUFSIZE (2 * 1024) 194 struct ch_up_la { 195 uint32_t stopped; 196 uint32_t idx; 197 uint32_t bufsize; 198 uint32_t *data; 199 }; 200 201 struct t3_ioq_entry { 202 uint32_t ioq_cp; 203 uint32_t ioq_pp; 204 uint32_t ioq_alen; 205 uint32_t ioq_stats; 206 }; 207 208 #define IOQS_BUFSIZE (1024) 209 struct ch_up_ioqs { 210 uint32_t ioq_rx_enable; 211 uint32_t ioq_tx_enable; 212 uint32_t ioq_rx_status; 213 uint32_t ioq_tx_status; 214 uint32_t bufsize; 215 struct t3_ioq_entry *data; 216 }; 217 218 #define CHELSIO_SETREG _IOW('f', CH_SETREG, struct ch_reg) 219 #define CHELSIO_GETREG _IOWR('f', CH_GETREG, struct ch_reg) 220 #define CHELSIO_GETMTUTAB _IOR('f', CH_GETMTUTAB, struct ch_mtus) 221 #define CHELSIO_SETMTUTAB _IOW('f', CH_SETMTUTAB, struct ch_mtus) 222 #define CHELSIO_SET_PM _IOW('f', CH_SET_PM, struct ch_pm) 223 #define CHELSIO_GET_PM _IOR('f', CH_GET_PM, struct ch_pm) 224 #define CHELSIO_READ_TCAM_WORD _IOWR('f', CH_READ_TCAM_WORD, struct ch_tcam_word) 225 #define CHELSIO_GET_MEM _IOWR('f', CH_GET_MEM, struct ch_mem_range) 226 #define CHELSIO_GET_SGE_CONTEXT _IOWR('f', CH_GET_SGE_CONTEXT, struct ch_cntxt) 227 #define CHELSIO_GET_SGE_DESC _IOWR('f', CH_GET_SGE_DESC, struct ch_desc) 228 #define CHELSIO_LOAD_FW _IOWR('f', CH_LOAD_FW, struct ch_mem_range) 229 #define CHELSIO_SET_TRACE_FILTER _IOW('f', CH_SET_TRACE_FILTER, struct ch_trace) 230 #define CHELSIO_GET_QSET_PARAMS _IOWR('f', CH_GET_QSET_PARAMS, struct ch_qset_params) 231 #define CHELSIO_GET_QSET_NUM _IOR('f', CH_GET_QSET_NUM, struct ch_reg) 232 #define CHELSIO_SET_PKTSCHED _IOW('f', CH_SET_PKTSCHED, struct ch_pktsched_params) 233 #define CHELSIO_SET_HW_SCHED _IOW('f', CH_SET_HW_SCHED, struct ch_hw_sched) 234 #define CHELSIO_LOAD_BOOT _IOW('f', CH_LOAD_BOOT, struct ch_mem_range) 235 #define CHELSIO_CLEAR_STATS _IO('f', CH_CLEAR_STATS) 236 #define CHELSIO_IFCONF_GETREGS _IOWR('f', CH_IFCONF_GETREGS, struct ch_ifconf_regs) 237 #define CHELSIO_GET_MIIREG _IOWR('f', CH_GET_MIIREG, struct ch_mii_data) 238 #define CHELSIO_SET_MIIREG _IOW('f', CH_SET_MIIREG, struct ch_mii_data) 239 #define CHELSIO_GET_EEPROM _IOWR('f', CH_GET_EEPROM, struct ch_eeprom) 240 #define CHELSIO_GET_UP_LA _IOWR('f', CH_GET_UP_LA, struct ch_up_la) 241 #define CHELSIO_GET_UP_IOQS _IOWR('f', CH_GET_UP_IOQS, struct ch_up_ioqs) 242 #endif 243