1 /************************************************************************** 2 3 Copyright (c) 2007, Chelsio Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Neither the name of the Chelsio Corporation nor the names of its 13 contributors may be used to endorse or promote products derived from 14 this software without specific prior written permission. 15 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 POSSIBILITY OF SUCH DAMAGE. 27 28 $FreeBSD$ 29 30 ***************************************************************************/ 31 #ifndef __CHIOCTL_H__ 32 #define __CHIOCTL_H__ 33 34 /* 35 * Ioctl commands specific to this driver. 36 */ 37 enum { 38 CH_SETREG = 0x40, 39 CH_GETREG, 40 CH_SETTPI, 41 CH_GETTPI, 42 CH_DEVUP, 43 CH_GETMTUTAB, 44 CH_SETMTUTAB, 45 CH_GETMTU, 46 CH_SET_PM, 47 CH_GET_PM, 48 CH_GET_TCAM, 49 CH_SET_TCAM, 50 CH_GET_TCB, 51 CH_READ_TCAM_WORD, 52 CH_GET_MEM, 53 CH_GET_SGE_CONTEXT, 54 CH_GET_SGE_DESC, 55 CH_LOAD_FW, 56 CH_GET_PROTO, 57 CH_SET_PROTO, 58 CH_SET_TRACE_FILTER, 59 CH_SET_QSET_PARAMS, 60 CH_GET_QSET_PARAMS, 61 CH_SET_QSET_NUM, 62 CH_GET_QSET_NUM, 63 CH_SET_PKTSCHED, 64 CH_IFCONF_GETREGS, 65 CH_GETMIIREGS, 66 CH_SETMIIREGS, 67 CH_SET_FILTER, 68 CH_SET_HW_SCHED, 69 CH_DEL_FILTER, 70 }; 71 72 struct ch_reg { 73 uint32_t addr; 74 uint32_t val; 75 }; 76 77 struct ch_cntxt { 78 uint32_t cntxt_type; 79 uint32_t cntxt_id; 80 uint32_t data[4]; 81 }; 82 83 /* context types */ 84 enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ }; 85 86 struct ch_desc { 87 uint32_t cmd; 88 uint32_t queue_num; 89 uint32_t idx; 90 uint32_t size; 91 uint8_t data[128]; 92 }; 93 94 struct ch_mem_range { 95 uint32_t cmd; 96 uint32_t mem_id; 97 uint32_t addr; 98 uint32_t len; 99 uint32_t version; 100 uint8_t *buf; 101 }; 102 103 struct ch_qset_params { 104 uint32_t qset_idx; 105 int32_t txq_size[3]; 106 int32_t rspq_size; 107 int32_t fl_size[2]; 108 int32_t intr_lat; 109 int32_t polling; 110 int32_t cong_thres; 111 int32_t vector; 112 int32_t qnum; 113 }; 114 115 struct ch_pktsched_params { 116 uint32_t cmd; 117 uint8_t sched; 118 uint8_t idx; 119 uint8_t min; 120 uint8_t max; 121 uint8_t binding; 122 }; 123 124 struct ch_hw_sched { 125 uint32_t cmd; 126 uint8_t sched; 127 int8_t mode; 128 int8_t channel; 129 int32_t kbps; /* rate in Kbps */ 130 int32_t class_ipg; /* tenths of nanoseconds */ 131 uint32_t flow_ipg; /* usec */ 132 }; 133 134 struct ch_filter_tuple { 135 uint32_t sip; 136 uint32_t dip; 137 uint16_t sport; 138 uint16_t dport; 139 uint16_t vlan:12; 140 uint16_t vlan_prio:3; 141 }; 142 143 struct ch_filter { 144 uint32_t cmd; 145 uint32_t filter_id; 146 struct ch_filter_tuple val; 147 struct ch_filter_tuple mask; 148 uint16_t mac_addr_idx; 149 uint8_t mac_hit:1; 150 uint8_t proto:2; 151 152 uint8_t want_filter_id:1; /* report filter TID instead of RSS hash */ 153 uint8_t pass:1; /* whether to pass or drop packets */ 154 uint8_t rss:1; /* use RSS or specified qset */ 155 uint8_t qset; 156 }; 157 158 #ifndef TCB_SIZE 159 # define TCB_SIZE 128 160 #endif 161 162 /* TCB size in 32-bit words */ 163 #define TCB_WORDS (TCB_SIZE / 4) 164 165 enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */ 166 167 struct ch_mtus { 168 uint32_t cmd; 169 uint32_t nmtus; 170 uint16_t mtus[NMTUS]; 171 }; 172 173 struct ch_pm { 174 uint32_t cmd; 175 uint32_t tx_pg_sz; 176 uint32_t tx_num_pg; 177 uint32_t rx_pg_sz; 178 uint32_t rx_num_pg; 179 uint32_t pm_total; 180 }; 181 182 struct ch_tcam { 183 uint32_t cmd; 184 uint32_t tcam_size; 185 uint32_t nservers; 186 uint32_t nroutes; 187 uint32_t nfilters; 188 }; 189 190 struct ch_tcb { 191 uint32_t cmd; 192 uint32_t tcb_index; 193 uint32_t tcb_data[TCB_WORDS]; 194 }; 195 196 struct ch_tcam_word { 197 uint32_t cmd; 198 uint32_t addr; 199 uint32_t buf[3]; 200 }; 201 202 struct ch_trace { 203 uint32_t cmd; 204 uint32_t sip; 205 uint32_t sip_mask; 206 uint32_t dip; 207 uint32_t dip_mask; 208 uint16_t sport; 209 uint16_t sport_mask; 210 uint16_t dport; 211 uint16_t dport_mask; 212 uint32_t vlan:12, 213 vlan_mask:12, 214 intf:4, 215 intf_mask:4; 216 uint8_t proto; 217 uint8_t proto_mask; 218 uint8_t invert_match:1, 219 config_tx:1, 220 config_rx:1, 221 trace_tx:1, 222 trace_rx:1; 223 }; 224 225 #define REGDUMP_SIZE (4 * 1024) 226 227 struct ifconf_regs { 228 uint32_t version; 229 uint32_t len; /* bytes */ 230 uint8_t *data; 231 }; 232 233 struct mii_data { 234 uint32_t phy_id; 235 uint32_t reg_num; 236 uint32_t val_in; 237 uint32_t val_out; 238 }; 239 240 #define CHELSIO_SETREG _IOW('f', CH_SETREG, struct ch_reg) 241 #define CHELSIO_GETREG _IOWR('f', CH_GETREG, struct ch_reg) 242 #define CHELSIO_READ_TCAM_WORD _IOR('f', CH_READ_TCAM_WORD, struct ch_tcam) 243 #define CHELSIO_GET_MEM _IOWR('f', CH_GET_MEM, struct ch_mem_range) 244 #define CHELSIO_GET_SGE_CONTEXT _IOWR('f', CH_GET_SGE_CONTEXT, struct ch_cntxt) 245 #define CHELSIO_GET_SGE_DESC _IOWR('f', CH_GET_SGE_DESC, struct ch_desc) 246 #define CHELSIO_GET_QSET_PARAMS _IOWR('f', CH_GET_QSET_PARAMS, struct ch_qset_params) 247 #define CHELSIO_SET_QSET_PARAMS _IOW('f', CH_SET_QSET_PARAMS, struct ch_qset_params) 248 #define CHELSIO_GET_QSET_NUM _IOWR('f', CH_GET_QSET_NUM, struct ch_reg) 249 #define CHELSIO_SET_QSET_NUM _IOW('f', CH_SET_QSET_NUM, struct ch_reg) 250 #define CHELSIO_GETMTUTAB _IOR('f', CH_GET_QSET_NUM, struct ch_mtus) 251 #define CHELSIO_SETMTUTAB _IOW('f', CH_SET_QSET_NUM, struct ch_mtus) 252 253 254 #define CHELSIO_SET_TRACE_FILTER _IOW('f', CH_SET_TRACE_FILTER, struct ch_trace) 255 #define CHELSIO_SET_PKTSCHED _IOW('f', CH_SET_PKTSCHED, struct ch_pktsched_params) 256 #define CHELSIO_IFCONF_GETREGS _IOWR('f', CH_IFCONF_GETREGS, struct ifconf_regs) 257 #define SIOCGMIIREG _IOWR('f', CH_GETMIIREGS, struct mii_data) 258 #define SIOCSMIIREG _IOWR('f', CH_SETMIIREGS, struct mii_data) 259 #define CHELSIO_SET_HW_SCHED _IOWR('f', CH_SET_HW_SCHED, struct ch_hw_sched) 260 #define CHELSIO_SET_FILTER _IOW('f', CH_SET_FILTER, struct ch_filter) 261 #define CHELSIO_DEL_FILTER _IOW('f', CH_DEL_FILTER, struct ch_filter) 262 #define CHELSIO_DEVUP _IO('f', CH_DEVUP) 263 #endif 264