1 /************************************************************************** 2 3 Copyright (c) 2007-2008, Chelsio Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Neither the name of the Chelsio Corporation nor the names of its 13 contributors may be used to endorse or promote products derived from 14 this software without specific prior written permission. 15 16 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 POSSIBILITY OF SUCH DAMAGE. 27 28 $FreeBSD$ 29 30 ***************************************************************************/ 31 #ifndef __CHIOCTL_H__ 32 #define __CHIOCTL_H__ 33 34 /* 35 * Ioctl commands specific to this driver. 36 */ 37 enum { 38 CH_SETREG = 0x40, 39 CH_GETREG, 40 CH_GETMTUTAB, 41 CH_SETMTUTAB, 42 CH_SET_PM, 43 CH_GET_PM, 44 CH_READ_TCAM_WORD, 45 CH_GET_MEM, 46 CH_GET_SGE_CONTEXT, 47 CH_GET_SGE_DESC, 48 CH_LOAD_FW, 49 CH_SET_TRACE_FILTER, 50 CH_GET_QSET_PARAMS, 51 CH_GET_QSET_NUM, 52 CH_SET_PKTSCHED, 53 CH_IFCONF_GETREGS, 54 CH_GET_MIIREG, 55 CH_SET_MIIREG, 56 CH_GET_EEPROM, 57 CH_SET_HW_SCHED, 58 CH_LOAD_BOOT, 59 CH_CLEAR_STATS, 60 CH_GET_UP_LA, 61 CH_GET_UP_IOQS, 62 CH_SET_FILTER, 63 CH_DEL_FILTER, 64 CH_GET_FILTER, 65 }; 66 67 /* statistics categories */ 68 enum { 69 STATS_PORT = 1 << 1, 70 STATS_QUEUE = 1 << 2, 71 }; 72 73 struct ch_reg { 74 uint32_t addr; 75 uint32_t val; 76 }; 77 78 struct ch_cntxt { 79 uint32_t cntxt_type; 80 uint32_t cntxt_id; 81 uint32_t data[4]; 82 }; 83 84 /* context types */ 85 enum { CNTXT_TYPE_EGRESS, CNTXT_TYPE_FL, CNTXT_TYPE_RSP, CNTXT_TYPE_CQ }; 86 87 struct ch_desc { 88 uint32_t queue_num; 89 uint32_t idx; 90 uint32_t size; 91 uint8_t data[128]; 92 }; 93 94 struct ch_mem_range { 95 uint32_t mem_id; 96 uint32_t addr; 97 uint32_t len; 98 uint32_t version; 99 uint8_t *buf; 100 }; 101 102 enum { MEM_CM, MEM_PMRX, MEM_PMTX }; /* ch_mem_range.mem_id values */ 103 104 struct ch_qset_params { 105 uint32_t qset_idx; 106 int32_t txq_size[3]; 107 int32_t rspq_size; 108 int32_t fl_size[2]; 109 int32_t intr_lat; 110 int32_t polling; 111 int32_t lro; 112 int32_t cong_thres; 113 int32_t vector; 114 int32_t qnum; 115 }; 116 117 struct ch_pktsched_params { 118 uint8_t sched; 119 uint8_t idx; 120 uint8_t min; 121 uint8_t max; 122 uint8_t binding; 123 }; 124 125 struct ch_hw_sched { 126 uint8_t sched; 127 int8_t mode; 128 int8_t channel; 129 int32_t kbps; /* rate in Kbps */ 130 int32_t class_ipg; /* tenths of nanoseconds */ 131 int32_t flow_ipg; /* usec */ 132 }; 133 134 struct ch_mtus { 135 uint32_t nmtus; 136 uint16_t mtus[NMTUS]; 137 }; 138 139 struct ch_pm { 140 uint32_t tx_pg_sz; 141 uint32_t tx_num_pg; 142 uint32_t rx_pg_sz; 143 uint32_t rx_num_pg; 144 uint32_t pm_total; 145 }; 146 147 struct ch_tcam_word { 148 uint32_t addr; 149 uint32_t buf[3]; 150 }; 151 152 struct ch_trace { 153 uint32_t sip; 154 uint32_t sip_mask; 155 uint32_t dip; 156 uint32_t dip_mask; 157 uint16_t sport; 158 uint16_t sport_mask; 159 uint16_t dport; 160 uint16_t dport_mask; 161 uint32_t vlan:12; 162 uint32_t vlan_mask:12; 163 uint32_t intf:4; 164 uint32_t intf_mask:4; 165 uint8_t proto; 166 uint8_t proto_mask; 167 uint8_t invert_match:1; 168 uint8_t config_tx:1; 169 uint8_t config_rx:1; 170 uint8_t trace_tx:1; 171 uint8_t trace_rx:1; 172 }; 173 174 #define REGDUMP_SIZE (4 * 1024) 175 176 struct ch_ifconf_regs { 177 uint32_t version; 178 uint32_t len; /* bytes */ 179 uint8_t *data; 180 }; 181 182 struct ch_mii_data { 183 uint32_t phy_id; 184 uint32_t reg_num; 185 uint32_t val_in; 186 uint32_t val_out; 187 }; 188 189 struct ch_eeprom { 190 uint32_t magic; 191 uint32_t offset; 192 uint32_t len; 193 uint8_t *data; 194 }; 195 196 #define LA_BUFSIZE (2 * 1024) 197 struct ch_up_la { 198 uint32_t stopped; 199 uint32_t idx; 200 uint32_t bufsize; 201 uint32_t *data; 202 }; 203 204 struct t3_ioq_entry { 205 uint32_t ioq_cp; 206 uint32_t ioq_pp; 207 uint32_t ioq_alen; 208 uint32_t ioq_stats; 209 }; 210 211 #define IOQS_BUFSIZE (1024) 212 struct ch_up_ioqs { 213 uint32_t ioq_rx_enable; 214 uint32_t ioq_tx_enable; 215 uint32_t ioq_rx_status; 216 uint32_t ioq_tx_status; 217 uint32_t bufsize; 218 struct t3_ioq_entry *data; 219 }; 220 221 struct ch_filter_tuple { 222 uint32_t sip; 223 uint32_t dip; 224 uint16_t sport; 225 uint16_t dport; 226 uint16_t vlan:12; 227 uint16_t vlan_prio:3; 228 }; 229 230 struct ch_filter { 231 uint32_t filter_id; 232 struct ch_filter_tuple val; 233 struct ch_filter_tuple mask; 234 uint16_t mac_addr_idx; 235 uint8_t mac_hit:1; 236 uint8_t proto:2; 237 238 uint8_t want_filter_id:1; 239 uint8_t pass:1; 240 uint8_t rss:1; 241 uint8_t qset; 242 }; 243 244 #define CHELSIO_SETREG _IOW('f', CH_SETREG, struct ch_reg) 245 #define CHELSIO_GETREG _IOWR('f', CH_GETREG, struct ch_reg) 246 #define CHELSIO_GETMTUTAB _IOR('f', CH_GETMTUTAB, struct ch_mtus) 247 #define CHELSIO_SETMTUTAB _IOW('f', CH_SETMTUTAB, struct ch_mtus) 248 #define CHELSIO_SET_PM _IOW('f', CH_SET_PM, struct ch_pm) 249 #define CHELSIO_GET_PM _IOR('f', CH_GET_PM, struct ch_pm) 250 #define CHELSIO_READ_TCAM_WORD _IOWR('f', CH_READ_TCAM_WORD, struct ch_tcam_word) 251 #define CHELSIO_GET_MEM _IOWR('f', CH_GET_MEM, struct ch_mem_range) 252 #define CHELSIO_GET_SGE_CONTEXT _IOWR('f', CH_GET_SGE_CONTEXT, struct ch_cntxt) 253 #define CHELSIO_GET_SGE_DESC _IOWR('f', CH_GET_SGE_DESC, struct ch_desc) 254 #define CHELSIO_LOAD_FW _IOWR('f', CH_LOAD_FW, struct ch_mem_range) 255 #define CHELSIO_SET_TRACE_FILTER _IOW('f', CH_SET_TRACE_FILTER, struct ch_trace) 256 #define CHELSIO_GET_QSET_PARAMS _IOWR('f', CH_GET_QSET_PARAMS, struct ch_qset_params) 257 #define CHELSIO_GET_QSET_NUM _IOR('f', CH_GET_QSET_NUM, struct ch_reg) 258 #define CHELSIO_SET_PKTSCHED _IOW('f', CH_SET_PKTSCHED, struct ch_pktsched_params) 259 #define CHELSIO_SET_HW_SCHED _IOW('f', CH_SET_HW_SCHED, struct ch_hw_sched) 260 #define CHELSIO_LOAD_BOOT _IOW('f', CH_LOAD_BOOT, struct ch_mem_range) 261 #define CHELSIO_CLEAR_STATS _IO('f', CH_CLEAR_STATS) 262 #define CHELSIO_IFCONF_GETREGS _IOWR('f', CH_IFCONF_GETREGS, struct ch_ifconf_regs) 263 #define CHELSIO_GET_MIIREG _IOWR('f', CH_GET_MIIREG, struct ch_mii_data) 264 #define CHELSIO_SET_MIIREG _IOW('f', CH_SET_MIIREG, struct ch_mii_data) 265 #define CHELSIO_GET_EEPROM _IOWR('f', CH_GET_EEPROM, struct ch_eeprom) 266 #define CHELSIO_GET_UP_LA _IOWR('f', CH_GET_UP_LA, struct ch_up_la) 267 #define CHELSIO_GET_UP_IOQS _IOWR('f', CH_GET_UP_IOQS, struct ch_up_ioqs) 268 #define CHELSIO_SET_FILTER _IOW('f', CH_SET_FILTER, struct ch_filter) 269 #define CHELSIO_DEL_FILTER _IOW('f', CH_DEL_FILTER, struct ch_filter) 270 #define CHELSIO_GET_FILTER _IOWR('f', CH_GET_FILTER, struct ch_filter) 271 #endif 272