1 /************************************************************************** 2 3 Copyright (c) 2007, Chelsio Inc. 4 All rights reserved. 5 6 Redistribution and use in source and binary forms, with or without 7 modification, are permitted provided that the following conditions are met: 8 9 1. Redistributions of source code must retain the above copyright notice, 10 this list of conditions and the following disclaimer. 11 12 2. Redistributions in binary form must reproduce the above copyright 13 notice, this list of conditions and the following disclaimer in the 14 documentation and/or other materials provided with the distribution. 15 16 3. Neither the name of the Chelsio Corporation nor the names of its 17 contributors may be used to endorse or promote products derived from 18 this software without specific prior written permission. 19 20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 POSSIBILITY OF SUCH DAMAGE. 31 32 33 $FreeBSD$ 34 35 ***************************************************************************/ 36 37 38 39 #ifndef _CXGB_ADAPTER_H_ 40 #define _CXGB_ADAPTER_H_ 41 42 #include <sys/cdefs.h> 43 __FBSDID("$FreeBSD$"); 44 45 #include <sys/lock.h> 46 #include <sys/mutex.h> 47 #include <sys/rman.h> 48 #include <sys/mbuf.h> 49 #include <sys/socket.h> 50 #include <sys/sockio.h> 51 52 #include <net/ethernet.h> 53 #include <net/if.h> 54 #include <net/if_media.h> 55 56 #include <machine/bus.h> 57 #include <machine/resource.h> 58 #include <sys/bus_dma.h> 59 #include <dev/pci/pcireg.h> 60 #include <dev/pci/pcivar.h> 61 62 struct adapter; 63 struct sge_qset; 64 extern int cxgb_debug; 65 66 struct port_info { 67 struct adapter *adapter; 68 struct ifnet *ifp; 69 int if_flags; 70 const struct port_type_info *port_type; 71 struct cphy phy; 72 struct cmac mac; 73 struct link_config link_config; 74 struct ifmedia media; 75 struct mtx lock; 76 77 int port; 78 uint8_t hw_addr[ETHER_ADDR_LEN]; 79 uint8_t nqsets; 80 uint8_t first_qset; 81 struct taskqueue *tq; 82 struct task start_task; 83 struct cdev *port_cdev; 84 }; 85 86 enum { /* adapter flags */ 87 FULL_INIT_DONE = (1 << 0), 88 USING_MSI = (1 << 1), 89 USING_MSIX = (1 << 2), 90 QUEUES_BOUND = (1 << 3), 91 FW_UPTODATE = (1 << 4), 92 }; 93 94 /* Max active LRO sessions per queue set */ 95 #define MAX_LRO_PER_QSET 8 96 97 98 #define FL_Q_SIZE 4096 99 #define JUMBO_Q_SIZE 512 100 #define RSPQ_Q_SIZE 1024 101 #define TX_ETH_Q_SIZE 1024 102 103 /* 104 * Types of Tx queues in each queue set. Order here matters, do not change. 105 * XXX TOE is not implemented yet, so the extra queues are just placeholders. 106 */ 107 enum { TXQ_ETH, TXQ_OFLD, TXQ_CTRL }; 108 109 110 /* careful, the following are set on priv_flags and must not collide with 111 * IFF_ flags! 112 */ 113 enum { 114 LRO_ACTIVE = (1 << 8), 115 }; 116 117 struct sge_lro_session { 118 struct t3_mbuf_hdr mh; 119 uint32_t seq; 120 uint16_t ip_len; 121 }; 122 123 struct sge_lro { 124 unsigned int enabled; 125 unsigned int num_active; 126 struct sge_lro_session *last_s; 127 struct sge_lro_session s[MAX_LRO_PER_QSET]; 128 }; 129 130 /* has its own header on linux XXX 131 * but I don't even know what it is :-/ 132 */ 133 134 struct t3cdev { 135 int foo; /* XXX fill in */ 136 }; 137 138 #define RX_BUNDLE_SIZE 8 139 140 struct rsp_desc; 141 142 struct sge_rspq { 143 uint32_t credits; 144 uint32_t size; 145 uint32_t cidx; 146 uint32_t gen; 147 uint32_t polling; 148 uint32_t holdoff_tmr; 149 uint32_t next_holdoff; 150 uint32_t imm_data; 151 uint32_t pure_rsps; 152 struct rsp_desc *desc; 153 bus_addr_t phys_addr; 154 uint32_t cntxt_id; 155 bus_dma_tag_t desc_tag; 156 bus_dmamap_t desc_map; 157 struct t3_mbuf_hdr mh; 158 struct mtx lock; 159 }; 160 161 struct rx_desc; 162 struct rx_sw_desc; 163 164 struct sge_fl { 165 uint32_t buf_size; 166 uint32_t credits; 167 uint32_t size; 168 uint32_t cidx; 169 uint32_t pidx; 170 uint32_t gen; 171 struct rx_desc *desc; 172 struct rx_sw_desc *sdesc; 173 bus_addr_t phys_addr; 174 uint32_t cntxt_id; 175 uint64_t empty; 176 bus_dma_tag_t desc_tag; 177 bus_dmamap_t desc_map; 178 bus_dma_tag_t entry_tag; 179 uma_zone_t zone; 180 int type; 181 }; 182 183 struct tx_desc; 184 struct tx_sw_desc; 185 186 struct sge_txq { 187 uint64_t flags; 188 uint32_t in_use; 189 uint32_t size; 190 uint32_t processed; 191 uint32_t cleaned; 192 uint32_t stop_thres; 193 uint32_t cidx; 194 uint32_t pidx; 195 uint32_t gen; 196 uint32_t unacked; 197 struct tx_desc *desc; 198 struct tx_sw_desc *sdesc; 199 uint32_t token; 200 bus_addr_t phys_addr; 201 uint32_t cntxt_id; 202 uint64_t stops; 203 uint64_t restarts; 204 bus_dma_tag_t desc_tag; 205 bus_dmamap_t desc_map; 206 bus_dma_tag_t entry_tag; 207 struct mtx lock; 208 }; 209 210 211 enum { 212 SGE_PSTAT_TSO, /* # of TSO requests */ 213 SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */ 214 SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */ 215 SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */ 216 SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */ 217 SGE_PSTATS_LRO_QUEUED, /* # of LRO appended packets */ 218 SGE_PSTATS_LRO_FLUSHED, /* # of LRO flushed packets */ 219 SGE_PSTATS_LRO_X_STREAMS, /* # of exceeded LRO contexts */ 220 }; 221 222 #define SGE_PSTAT_MAX (SGE_PSTATS_LRO_X_STREAMS+1) 223 224 struct sge_qset { 225 struct sge_rspq rspq; 226 struct sge_fl fl[SGE_RXQ_PER_SET]; 227 struct sge_lro lro; 228 struct sge_txq txq[SGE_TXQ_PER_SET]; 229 unsigned long txq_stopped; /* which Tx queues are stopped */ 230 uint64_t port_stats[SGE_PSTAT_MAX]; 231 struct port_info *port; 232 int idx; /* qset # */ 233 }; 234 235 struct sge { 236 struct sge_qset qs[SGE_QSETS]; 237 struct mtx reg_lock; 238 }; 239 240 struct adapter { 241 device_t dev; 242 int flags; 243 244 /* PCI register resources */ 245 uint32_t regs_rid; 246 struct resource *regs_res; 247 bus_space_handle_t bh; 248 bus_space_tag_t bt; 249 bus_size_t mmio_len; 250 uint32_t link_width; 251 252 /* DMA resources */ 253 bus_dma_tag_t parent_dmat; 254 bus_dma_tag_t rx_dmat; 255 bus_dma_tag_t rx_jumbo_dmat; 256 bus_dma_tag_t tx_dmat; 257 258 /* Interrupt resources */ 259 struct resource *irq_res; 260 int irq_rid; 261 void *intr_tag; 262 263 uint32_t msix_regs_rid; 264 struct resource *msix_regs_res; 265 266 struct resource *msix_irq_res[SGE_QSETS]; 267 int msix_irq_rid[SGE_QSETS]; 268 void *msix_intr_tag[SGE_QSETS]; 269 270 /* Tasks */ 271 struct task ext_intr_task; 272 struct task timer_reclaim_task; 273 struct task slow_intr_task; 274 struct task process_responses_task; 275 struct task mr_refresh_task; 276 struct taskqueue *tq; 277 struct callout cxgb_tick_ch; 278 struct callout sge_timer_ch; 279 280 /* Register lock for use by the hardware layer */ 281 struct mtx mdio_lock; 282 283 /* Bookkeeping for the hardware layer */ 284 struct adapter_params params; 285 unsigned int slow_intr_mask; 286 unsigned long irq_stats[IRQ_NUM_STATS]; 287 288 struct sge sge; 289 struct mc7 pmrx; 290 struct mc7 pmtx; 291 struct mc7 cm; 292 struct mc5 mc5; 293 294 struct port_info port[MAX_NPORTS]; 295 device_t portdev[MAX_NPORTS]; 296 struct t3cdev tdev; 297 char fw_version[64]; 298 uint32_t open_device_map; 299 struct mtx lock; 300 }; 301 302 struct t3_rx_mode { 303 304 uint32_t idx; 305 struct port_info *port; 306 }; 307 308 309 #define MDIO_LOCK(adapter) mtx_lock(&(adapter)->mdio_lock) 310 #define MDIO_UNLOCK(adapter) mtx_unlock(&(adapter)->mdio_lock) 311 312 #define PORT_LOCK(port) mtx_lock(&(port)->lock); 313 #define PORT_UNLOCK(port) mtx_unlock(&(port)->lock); 314 315 #define ADAPTER_LOCK(adap) mtx_lock(&(adap)->lock); 316 #define ADAPTER_UNLOCK(adap) mtx_unlock(&(adap)->lock); 317 318 319 320 static __inline uint32_t 321 t3_read_reg(adapter_t *adapter, uint32_t reg_addr) 322 { 323 return (bus_space_read_4(adapter->bt, adapter->bh, reg_addr)); 324 } 325 326 static __inline void 327 t3_write_reg(adapter_t *adapter, uint32_t reg_addr, uint32_t val) 328 { 329 bus_space_write_4(adapter->bt, adapter->bh, reg_addr, val); 330 } 331 332 static __inline void 333 t3_os_pci_read_config_4(adapter_t *adapter, int reg, uint32_t *val) 334 { 335 *val = pci_read_config(adapter->dev, reg, 4); 336 } 337 338 static __inline void 339 t3_os_pci_write_config_4(adapter_t *adapter, int reg, uint32_t val) 340 { 341 pci_write_config(adapter->dev, reg, val, 4); 342 } 343 344 static __inline void 345 t3_os_pci_read_config_2(adapter_t *adapter, int reg, uint16_t *val) 346 { 347 *val = pci_read_config(adapter->dev, reg, 2); 348 } 349 350 static __inline void 351 t3_os_pci_write_config_2(adapter_t *adapter, int reg, uint16_t val) 352 { 353 pci_write_config(adapter->dev, reg, val, 2); 354 } 355 356 static __inline uint8_t * 357 t3_get_next_mcaddr(struct t3_rx_mode *rm) 358 { 359 uint8_t *macaddr = NULL; 360 361 if (rm->idx == 0) 362 macaddr = rm->port->hw_addr; 363 364 rm->idx++; 365 return (macaddr); 366 } 367 368 static __inline void 369 t3_init_rx_mode(struct t3_rx_mode *rm, struct port_info *port) 370 { 371 rm->idx = 0; 372 rm->port = port; 373 } 374 375 static __inline struct port_info * 376 adap2pinfo(struct adapter *adap, int idx) 377 { 378 return &adap->port[idx]; 379 } 380 381 int t3_os_find_pci_capability(adapter_t *adapter, int cap); 382 int t3_os_pci_save_state(struct adapter *adapter); 383 int t3_os_pci_restore_state(struct adapter *adapter); 384 void t3_os_link_changed(adapter_t *adapter, int port_id, int link_status, 385 int speed, int duplex, int fc); 386 void t3_sge_err_intr_handler(adapter_t *adapter); 387 void t3_os_ext_intr_handler(adapter_t *adapter); 388 void t3_os_set_hw_addr(adapter_t *adapter, int port_idx, u8 hw_addr[]); 389 int t3_mgmt_tx(adapter_t *adap, struct mbuf *m); 390 391 392 int t3_sge_alloc(struct adapter *); 393 int t3_sge_free(struct adapter *); 394 int t3_sge_alloc_qset(adapter_t *, uint32_t, int, int, const struct qset_params *, 395 int, struct port_info *); 396 void t3_free_sge_resources(adapter_t *); 397 void t3_sge_start(adapter_t *); 398 void t3b_intr(void *data); 399 void t3_intr_msi(void *data); 400 void t3_intr_msix(void *data); 401 int t3_encap(struct port_info *, struct mbuf **); 402 403 int t3_sge_init_sw(adapter_t *); 404 void t3_sge_deinit_sw(adapter_t *); 405 406 void t3_rx_eth_lro(adapter_t *adap, struct sge_rspq *rq, struct t3_mbuf_hdr *mh, 407 int ethpad, uint32_t rss_hash, uint32_t rss_csum, int lro); 408 void t3_rx_eth(struct port_info *p, struct sge_rspq *rq, struct mbuf *m, int ethpad); 409 void t3_sge_lro_flush_all(adapter_t *adap, struct sge_qset *qs); 410 411 void t3_add_sysctls(adapter_t *sc); 412 int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx, 413 unsigned char *data); 414 void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p); 415 /* 416 * XXX figure out how we can return this to being private to sge 417 */ 418 #define desc_reclaimable(q) ((int)((q)->processed - (q)->cleaned - TX_MAX_DESC)) 419 420 #define container_of(p, stype, field) ((stype *)(((uint8_t *)(p)) - offsetof(stype, field))) 421 422 static __inline struct sge_qset * 423 fl_to_qset(struct sge_fl *q, int qidx) 424 { 425 return container_of(q, struct sge_qset, fl[qidx]); 426 } 427 428 static __inline struct sge_qset * 429 rspq_to_qset(struct sge_rspq *q) 430 { 431 return container_of(q, struct sge_qset, rspq); 432 } 433 434 static __inline struct sge_qset * 435 txq_to_qset(struct sge_txq *q, int qidx) 436 { 437 return container_of(q, struct sge_qset, txq[qidx]); 438 } 439 440 #undef container_of 441 442 #endif 443