1b6d90eb7SKip Macy /************************************************************************** 2b6d90eb7SKip Macy 3b6d90eb7SKip Macy Copyright (c) 2007, Chelsio Inc. 4b6d90eb7SKip Macy All rights reserved. 5b6d90eb7SKip Macy 6b6d90eb7SKip Macy Redistribution and use in source and binary forms, with or without 7b6d90eb7SKip Macy modification, are permitted provided that the following conditions are met: 8b6d90eb7SKip Macy 9b6d90eb7SKip Macy 1. Redistributions of source code must retain the above copyright notice, 10b6d90eb7SKip Macy this list of conditions and the following disclaimer. 11b6d90eb7SKip Macy 1210faa568SKip Macy 2. Neither the name of the Chelsio Corporation nor the names of its 13b6d90eb7SKip Macy contributors may be used to endorse or promote products derived from 14b6d90eb7SKip Macy this software without specific prior written permission. 15b6d90eb7SKip Macy 16b6d90eb7SKip Macy THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17b6d90eb7SKip Macy AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18b6d90eb7SKip Macy IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19b6d90eb7SKip Macy ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 20b6d90eb7SKip Macy LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21b6d90eb7SKip Macy CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22b6d90eb7SKip Macy SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23b6d90eb7SKip Macy INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24b6d90eb7SKip Macy CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25b6d90eb7SKip Macy ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26b6d90eb7SKip Macy POSSIBILITY OF SUCH DAMAGE. 27b6d90eb7SKip Macy 28b6d90eb7SKip Macy ***************************************************************************/ 29b6d90eb7SKip Macy 30b6d90eb7SKip Macy #include <sys/cdefs.h> 31b6d90eb7SKip Macy __FBSDID("$FreeBSD$"); 32b6d90eb7SKip Macy 3310faa568SKip Macy #ifdef CONFIG_DEFINED 3410faa568SKip Macy #include <cxgb_include.h> 3510faa568SKip Macy #else 3610faa568SKip Macy #include <dev/cxgb/cxgb_include.h> 3710faa568SKip Macy #endif 38b6d90eb7SKip Macy 398e10660fSKip Macy #undef msleep 408e10660fSKip Macy #define msleep t3_os_sleep 418e10660fSKip Macy 42b6d90eb7SKip Macy /* VSC8211 PHY specific registers. */ 43b6d90eb7SKip Macy enum { 448e10660fSKip Macy VSC8211_SIGDET_CTRL = 19, 458e10660fSKip Macy VSC8211_EXT_CTRL = 23, 46b6d90eb7SKip Macy VSC8211_INTR_ENABLE = 25, 47b6d90eb7SKip Macy VSC8211_INTR_STATUS = 26, 48b6d90eb7SKip Macy VSC8211_AUX_CTRL_STAT = 28, 498e10660fSKip Macy VSC8211_EXT_PAGE_AXS = 31, 50b6d90eb7SKip Macy }; 51b6d90eb7SKip Macy 52b6d90eb7SKip Macy enum { 53b6d90eb7SKip Macy VSC_INTR_RX_ERR = 1 << 0, 54b6d90eb7SKip Macy VSC_INTR_MS_ERR = 1 << 1, /* master/slave resolution error */ 55b6d90eb7SKip Macy VSC_INTR_CABLE = 1 << 2, /* cable impairment */ 56b6d90eb7SKip Macy VSC_INTR_FALSE_CARR = 1 << 3, /* false carrier */ 57b6d90eb7SKip Macy VSC_INTR_MEDIA_CHG = 1 << 4, /* AMS media change */ 58b6d90eb7SKip Macy VSC_INTR_RX_FIFO = 1 << 5, /* Rx FIFO over/underflow */ 59b6d90eb7SKip Macy VSC_INTR_TX_FIFO = 1 << 6, /* Tx FIFO over/underflow */ 60b6d90eb7SKip Macy VSC_INTR_DESCRAMBL = 1 << 7, /* descrambler lock-lost */ 61b6d90eb7SKip Macy VSC_INTR_SYMBOL_ERR = 1 << 8, /* symbol error */ 62b6d90eb7SKip Macy VSC_INTR_NEG_DONE = 1 << 10, /* autoneg done */ 63b6d90eb7SKip Macy VSC_INTR_NEG_ERR = 1 << 11, /* autoneg error */ 648e10660fSKip Macy VSC_INTR_DPLX_CHG = 1 << 12, /* duplex change */ 65b6d90eb7SKip Macy VSC_INTR_LINK_CHG = 1 << 13, /* link change */ 668e10660fSKip Macy VSC_INTR_SPD_CHG = 1 << 14, /* speed change */ 67b6d90eb7SKip Macy VSC_INTR_ENABLE = 1 << 15, /* interrupt enable */ 68b6d90eb7SKip Macy }; 69b6d90eb7SKip Macy 708e10660fSKip Macy enum { 718e10660fSKip Macy VSC_CTRL_CLAUSE37_VIEW = 1 << 4, /* Switch to Clause 37 view */ 728e10660fSKip Macy VSC_CTRL_MEDIA_MODE_HI = 0xf000 /* High part of media mode select */ 738e10660fSKip Macy }; 748e10660fSKip Macy 75b6d90eb7SKip Macy #define CFG_CHG_INTR_MASK (VSC_INTR_LINK_CHG | VSC_INTR_NEG_ERR | \ 768e10660fSKip Macy VSC_INTR_DPLX_CHG | VSC_INTR_SPD_CHG | \ 77b6d90eb7SKip Macy VSC_INTR_NEG_DONE) 78b6d90eb7SKip Macy #define INTR_MASK (CFG_CHG_INTR_MASK | VSC_INTR_TX_FIFO | VSC_INTR_RX_FIFO | \ 79b6d90eb7SKip Macy VSC_INTR_ENABLE) 80b6d90eb7SKip Macy 81b6d90eb7SKip Macy /* PHY specific auxiliary control & status register fields */ 82b6d90eb7SKip Macy #define S_ACSR_ACTIPHY_TMR 0 83b6d90eb7SKip Macy #define M_ACSR_ACTIPHY_TMR 0x3 84b6d90eb7SKip Macy #define V_ACSR_ACTIPHY_TMR(x) ((x) << S_ACSR_ACTIPHY_TMR) 85b6d90eb7SKip Macy 86b6d90eb7SKip Macy #define S_ACSR_SPEED 3 87b6d90eb7SKip Macy #define M_ACSR_SPEED 0x3 88b6d90eb7SKip Macy #define G_ACSR_SPEED(x) (((x) >> S_ACSR_SPEED) & M_ACSR_SPEED) 89b6d90eb7SKip Macy 90b6d90eb7SKip Macy #define S_ACSR_DUPLEX 5 91b6d90eb7SKip Macy #define F_ACSR_DUPLEX (1 << S_ACSR_DUPLEX) 92b6d90eb7SKip Macy 93b6d90eb7SKip Macy #define S_ACSR_ACTIPHY 6 94b6d90eb7SKip Macy #define F_ACSR_ACTIPHY (1 << S_ACSR_ACTIPHY) 95b6d90eb7SKip Macy 96b6d90eb7SKip Macy /* 97b6d90eb7SKip Macy * Reset the PHY. This PHY completes reset immediately so we never wait. 98b6d90eb7SKip Macy */ 99b6d90eb7SKip Macy static int vsc8211_reset(struct cphy *cphy, int wait) 100b6d90eb7SKip Macy { 101b6d90eb7SKip Macy return t3_phy_reset(cphy, 0, 0); 102b6d90eb7SKip Macy } 103b6d90eb7SKip Macy 104b6d90eb7SKip Macy static int vsc8211_intr_enable(struct cphy *cphy) 105b6d90eb7SKip Macy { 106b6d90eb7SKip Macy return mdio_write(cphy, 0, VSC8211_INTR_ENABLE, INTR_MASK); 107b6d90eb7SKip Macy } 108b6d90eb7SKip Macy 109b6d90eb7SKip Macy static int vsc8211_intr_disable(struct cphy *cphy) 110b6d90eb7SKip Macy { 111b6d90eb7SKip Macy return mdio_write(cphy, 0, VSC8211_INTR_ENABLE, 0); 112b6d90eb7SKip Macy } 113b6d90eb7SKip Macy 114b6d90eb7SKip Macy static int vsc8211_intr_clear(struct cphy *cphy) 115b6d90eb7SKip Macy { 116b6d90eb7SKip Macy u32 val; 117b6d90eb7SKip Macy 118b6d90eb7SKip Macy /* Clear PHY interrupts by reading the register. */ 119b6d90eb7SKip Macy return mdio_read(cphy, 0, VSC8211_INTR_STATUS, &val); 120b6d90eb7SKip Macy } 121b6d90eb7SKip Macy 122b6d90eb7SKip Macy static int vsc8211_autoneg_enable(struct cphy *cphy) 123b6d90eb7SKip Macy { 124b6d90eb7SKip Macy return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 125b6d90eb7SKip Macy BMCR_ANENABLE | BMCR_ANRESTART); 126b6d90eb7SKip Macy } 127b6d90eb7SKip Macy 128b6d90eb7SKip Macy static int vsc8211_autoneg_restart(struct cphy *cphy) 129b6d90eb7SKip Macy { 130b6d90eb7SKip Macy return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN | BMCR_ISOLATE, 131b6d90eb7SKip Macy BMCR_ANRESTART); 132b6d90eb7SKip Macy } 133b6d90eb7SKip Macy 134b6d90eb7SKip Macy static int vsc8211_get_link_status(struct cphy *cphy, int *link_ok, 135b6d90eb7SKip Macy int *speed, int *duplex, int *fc) 136b6d90eb7SKip Macy { 137b6d90eb7SKip Macy unsigned int bmcr, status, lpa, adv; 138b6d90eb7SKip Macy int err, sp = -1, dplx = -1, pause = 0; 139b6d90eb7SKip Macy 140b6d90eb7SKip Macy err = mdio_read(cphy, 0, MII_BMCR, &bmcr); 141b6d90eb7SKip Macy if (!err) 142b6d90eb7SKip Macy err = mdio_read(cphy, 0, MII_BMSR, &status); 143b6d90eb7SKip Macy if (err) 144b6d90eb7SKip Macy return err; 145b6d90eb7SKip Macy 146b6d90eb7SKip Macy if (link_ok) { 147b6d90eb7SKip Macy /* 148b6d90eb7SKip Macy * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it 149b6d90eb7SKip Macy * once more to get the current link state. 150b6d90eb7SKip Macy */ 151b6d90eb7SKip Macy if (!(status & BMSR_LSTATUS)) 152b6d90eb7SKip Macy err = mdio_read(cphy, 0, MII_BMSR, &status); 153b6d90eb7SKip Macy if (err) 154b6d90eb7SKip Macy return err; 155b6d90eb7SKip Macy *link_ok = (status & BMSR_LSTATUS) != 0; 156b6d90eb7SKip Macy } 157b6d90eb7SKip Macy if (!(bmcr & BMCR_ANENABLE)) { 158b6d90eb7SKip Macy dplx = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF; 159b6d90eb7SKip Macy if (bmcr & BMCR_SPEED1000) 160b6d90eb7SKip Macy sp = SPEED_1000; 161b6d90eb7SKip Macy else if (bmcr & BMCR_SPEED100) 162b6d90eb7SKip Macy sp = SPEED_100; 163b6d90eb7SKip Macy else 164b6d90eb7SKip Macy sp = SPEED_10; 165b6d90eb7SKip Macy } else if (status & BMSR_ANEGCOMPLETE) { 166b6d90eb7SKip Macy err = mdio_read(cphy, 0, VSC8211_AUX_CTRL_STAT, &status); 167b6d90eb7SKip Macy if (err) 168b6d90eb7SKip Macy return err; 169b6d90eb7SKip Macy 170b6d90eb7SKip Macy dplx = (status & F_ACSR_DUPLEX) ? DUPLEX_FULL : DUPLEX_HALF; 171b6d90eb7SKip Macy sp = G_ACSR_SPEED(status); 172b6d90eb7SKip Macy if (sp == 0) 173b6d90eb7SKip Macy sp = SPEED_10; 174b6d90eb7SKip Macy else if (sp == 1) 175b6d90eb7SKip Macy sp = SPEED_100; 176b6d90eb7SKip Macy else 177b6d90eb7SKip Macy sp = SPEED_1000; 178b6d90eb7SKip Macy 179b6d90eb7SKip Macy if (fc && dplx == DUPLEX_FULL) { 180b6d90eb7SKip Macy err = mdio_read(cphy, 0, MII_LPA, &lpa); 181b6d90eb7SKip Macy if (!err) 182b6d90eb7SKip Macy err = mdio_read(cphy, 0, MII_ADVERTISE, &adv); 183b6d90eb7SKip Macy if (err) 184b6d90eb7SKip Macy return err; 185b6d90eb7SKip Macy 186b6d90eb7SKip Macy if (lpa & adv & ADVERTISE_PAUSE_CAP) 187b6d90eb7SKip Macy pause = PAUSE_RX | PAUSE_TX; 188b6d90eb7SKip Macy else if ((lpa & ADVERTISE_PAUSE_CAP) && 189b6d90eb7SKip Macy (lpa & ADVERTISE_PAUSE_ASYM) && 190b6d90eb7SKip Macy (adv & ADVERTISE_PAUSE_ASYM)) 191b6d90eb7SKip Macy pause = PAUSE_TX; 192b6d90eb7SKip Macy else if ((lpa & ADVERTISE_PAUSE_ASYM) && 193b6d90eb7SKip Macy (adv & ADVERTISE_PAUSE_CAP)) 194b6d90eb7SKip Macy pause = PAUSE_RX; 195b6d90eb7SKip Macy } 196b6d90eb7SKip Macy } 197b6d90eb7SKip Macy if (speed) 198b6d90eb7SKip Macy *speed = sp; 199b6d90eb7SKip Macy if (duplex) 200b6d90eb7SKip Macy *duplex = dplx; 201b6d90eb7SKip Macy if (fc) 202b6d90eb7SKip Macy *fc = pause; 203b6d90eb7SKip Macy return 0; 204b6d90eb7SKip Macy } 205b6d90eb7SKip Macy 2068e10660fSKip Macy static int vsc8211_get_link_status_fiber(struct cphy *cphy, int *link_ok, 2078e10660fSKip Macy int *speed, int *duplex, int *fc) 2088e10660fSKip Macy { 2098e10660fSKip Macy unsigned int bmcr, status, lpa, adv; 2108e10660fSKip Macy int err, sp = -1, dplx = -1, pause = 0; 2118e10660fSKip Macy 2128e10660fSKip Macy err = mdio_read(cphy, 0, MII_BMCR, &bmcr); 2138e10660fSKip Macy if (!err) 2148e10660fSKip Macy err = mdio_read(cphy, 0, MII_BMSR, &status); 2158e10660fSKip Macy if (err) 2168e10660fSKip Macy return err; 2178e10660fSKip Macy 2188e10660fSKip Macy if (link_ok) { 2198e10660fSKip Macy /* 2208e10660fSKip Macy * BMSR_LSTATUS is latch-low, so if it is 0 we need to read it 2218e10660fSKip Macy * once more to get the current link state. 2228e10660fSKip Macy */ 2238e10660fSKip Macy if (!(status & BMSR_LSTATUS)) 2248e10660fSKip Macy err = mdio_read(cphy, 0, MII_BMSR, &status); 2258e10660fSKip Macy if (err) 2268e10660fSKip Macy return err; 2278e10660fSKip Macy *link_ok = (status & BMSR_LSTATUS) != 0; 2288e10660fSKip Macy } 2298e10660fSKip Macy if (!(bmcr & BMCR_ANENABLE)) { 2308e10660fSKip Macy dplx = (bmcr & BMCR_FULLDPLX) ? DUPLEX_FULL : DUPLEX_HALF; 2318e10660fSKip Macy if (bmcr & BMCR_SPEED1000) 2328e10660fSKip Macy sp = SPEED_1000; 2338e10660fSKip Macy else if (bmcr & BMCR_SPEED100) 2348e10660fSKip Macy sp = SPEED_100; 2358e10660fSKip Macy else 2368e10660fSKip Macy sp = SPEED_10; 2378e10660fSKip Macy } else if (status & BMSR_ANEGCOMPLETE) { 2388e10660fSKip Macy err = mdio_read(cphy, 0, MII_LPA, &lpa); 2398e10660fSKip Macy if (!err) 2408e10660fSKip Macy err = mdio_read(cphy, 0, MII_ADVERTISE, &adv); 2418e10660fSKip Macy if (err) 2428e10660fSKip Macy return err; 2438e10660fSKip Macy 2448e10660fSKip Macy if (adv & lpa & ADVERTISE_1000XFULL) { 2458e10660fSKip Macy dplx = DUPLEX_FULL; 2468e10660fSKip Macy sp = SPEED_1000; 2478e10660fSKip Macy } else if (adv & lpa & ADVERTISE_1000XHALF) { 2488e10660fSKip Macy dplx = DUPLEX_HALF; 2498e10660fSKip Macy sp = SPEED_1000; 2508e10660fSKip Macy } 2518e10660fSKip Macy 2528e10660fSKip Macy if (fc && dplx == DUPLEX_FULL) { 2538e10660fSKip Macy if (lpa & adv & ADVERTISE_1000XPAUSE) 2548e10660fSKip Macy pause = PAUSE_RX | PAUSE_TX; 2558e10660fSKip Macy else if ((lpa & ADVERTISE_1000XPAUSE) && 2568e10660fSKip Macy (adv & lpa & ADVERTISE_1000XPSE_ASYM)) 2578e10660fSKip Macy pause = PAUSE_TX; 2588e10660fSKip Macy else if ((lpa & ADVERTISE_1000XPSE_ASYM) && 2598e10660fSKip Macy (adv & ADVERTISE_1000XPAUSE)) 2608e10660fSKip Macy pause = PAUSE_RX; 2618e10660fSKip Macy } 2628e10660fSKip Macy } 2638e10660fSKip Macy if (speed) 2648e10660fSKip Macy *speed = sp; 2658e10660fSKip Macy if (duplex) 2668e10660fSKip Macy *duplex = dplx; 2678e10660fSKip Macy if (fc) 2688e10660fSKip Macy *fc = pause; 2698e10660fSKip Macy return 0; 2708e10660fSKip Macy } 2718e10660fSKip Macy 2728e10660fSKip Macy /* 2738e10660fSKip Macy * Enable/disable auto MDI/MDI-X in forced link speed mode. 2748e10660fSKip Macy */ 2758e10660fSKip Macy static int vsc8211_set_automdi(struct cphy *phy, int enable) 2768e10660fSKip Macy { 2778e10660fSKip Macy int err; 2788e10660fSKip Macy 2798e10660fSKip Macy if ((err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0x52b5)) != 0 || 2808e10660fSKip Macy (err = mdio_write(phy, 0, 18, 0x12)) != 0 || 2818e10660fSKip Macy (err = mdio_write(phy, 0, 17, enable ? 0x2803 : 0x3003)) != 0 || 2828e10660fSKip Macy (err = mdio_write(phy, 0, 16, 0x87fa)) != 0 || 2838e10660fSKip Macy (err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0)) != 0) 2848e10660fSKip Macy return err; 2858e10660fSKip Macy return 0; 2868e10660fSKip Macy } 2878e10660fSKip Macy 2888e10660fSKip Macy static int vsc8211_set_speed_duplex(struct cphy *phy, int speed, int duplex) 2898e10660fSKip Macy { 2908e10660fSKip Macy int err; 2918e10660fSKip Macy 2928e10660fSKip Macy err = t3_set_phy_speed_duplex(phy, speed, duplex); 2938e10660fSKip Macy if (!err) 2948e10660fSKip Macy err = vsc8211_set_automdi(phy, 1); 2958e10660fSKip Macy return err; 2968e10660fSKip Macy } 2978e10660fSKip Macy 298b6d90eb7SKip Macy static int vsc8211_power_down(struct cphy *cphy, int enable) 299b6d90eb7SKip Macy { 300b6d90eb7SKip Macy return t3_mdio_change_bits(cphy, 0, MII_BMCR, BMCR_PDOWN, 301b6d90eb7SKip Macy enable ? BMCR_PDOWN : 0); 302b6d90eb7SKip Macy } 303b6d90eb7SKip Macy 304b6d90eb7SKip Macy static int vsc8211_intr_handler(struct cphy *cphy) 305b6d90eb7SKip Macy { 306b6d90eb7SKip Macy unsigned int cause; 307b6d90eb7SKip Macy int err, cphy_cause = 0; 308b6d90eb7SKip Macy 309b6d90eb7SKip Macy err = mdio_read(cphy, 0, VSC8211_INTR_STATUS, &cause); 310b6d90eb7SKip Macy if (err) 311b6d90eb7SKip Macy return err; 312b6d90eb7SKip Macy 313b6d90eb7SKip Macy cause &= INTR_MASK; 314b6d90eb7SKip Macy if (cause & CFG_CHG_INTR_MASK) 315b6d90eb7SKip Macy cphy_cause |= cphy_cause_link_change; 316b6d90eb7SKip Macy if (cause & (VSC_INTR_RX_FIFO | VSC_INTR_TX_FIFO)) 317b6d90eb7SKip Macy cphy_cause |= cphy_cause_fifo_error; 318b6d90eb7SKip Macy return cphy_cause; 319b6d90eb7SKip Macy } 320b6d90eb7SKip Macy 321b6d90eb7SKip Macy #ifdef C99_NOT_SUPPORTED 322b6d90eb7SKip Macy static struct cphy_ops vsc8211_ops = { 323b6d90eb7SKip Macy vsc8211_reset, 324b6d90eb7SKip Macy vsc8211_intr_enable, 325b6d90eb7SKip Macy vsc8211_intr_disable, 326b6d90eb7SKip Macy vsc8211_intr_clear, 327b6d90eb7SKip Macy vsc8211_intr_handler, 328b6d90eb7SKip Macy vsc8211_autoneg_enable, 329b6d90eb7SKip Macy vsc8211_autoneg_restart, 330b6d90eb7SKip Macy t3_phy_advertise, 331b6d90eb7SKip Macy NULL, 3328e10660fSKip Macy vsc8211_set_speed_duplex, 333b6d90eb7SKip Macy vsc8211_get_link_status, 334b6d90eb7SKip Macy vsc8211_power_down, 335b6d90eb7SKip Macy }; 3368e10660fSKip Macy 3378e10660fSKip Macy static struct cphy_ops vsc8211_fiber_ops = { 3388e10660fSKip Macy vsc8211_reset, 3398e10660fSKip Macy vsc8211_intr_enable, 3408e10660fSKip Macy vsc8211_intr_disable, 3418e10660fSKip Macy vsc8211_intr_clear, 3428e10660fSKip Macy vsc8211_intr_handler, 3438e10660fSKip Macy vsc8211_autoneg_enable, 3448e10660fSKip Macy vsc8211_autoneg_restart, 3458e10660fSKip Macy t3_phy_advertise_fiber, 3468e10660fSKip Macy NULL, 3478e10660fSKip Macy t3_set_phy_speed_duplex, 3488e10660fSKip Macy vsc8211_get_link_status_fiber, 3498e10660fSKip Macy vsc8211_power_down, 3508e10660fSKip Macy }; 351b6d90eb7SKip Macy #else 352b6d90eb7SKip Macy static struct cphy_ops vsc8211_ops = { 353b6d90eb7SKip Macy .reset = vsc8211_reset, 354b6d90eb7SKip Macy .intr_enable = vsc8211_intr_enable, 355b6d90eb7SKip Macy .intr_disable = vsc8211_intr_disable, 356b6d90eb7SKip Macy .intr_clear = vsc8211_intr_clear, 357b6d90eb7SKip Macy .intr_handler = vsc8211_intr_handler, 358b6d90eb7SKip Macy .autoneg_enable = vsc8211_autoneg_enable, 359b6d90eb7SKip Macy .autoneg_restart = vsc8211_autoneg_restart, 360b6d90eb7SKip Macy .advertise = t3_phy_advertise, 3618e10660fSKip Macy .set_speed_duplex = vsc8211_set_speed_duplex, 362b6d90eb7SKip Macy .get_link_status = vsc8211_get_link_status, 363b6d90eb7SKip Macy .power_down = vsc8211_power_down, 364b6d90eb7SKip Macy }; 3658e10660fSKip Macy 3668e10660fSKip Macy static struct cphy_ops vsc8211_fiber_ops = { 3678e10660fSKip Macy .reset = vsc8211_reset, 3688e10660fSKip Macy .intr_enable = vsc8211_intr_enable, 3698e10660fSKip Macy .intr_disable = vsc8211_intr_disable, 3708e10660fSKip Macy .intr_clear = vsc8211_intr_clear, 3718e10660fSKip Macy .intr_handler = vsc8211_intr_handler, 3728e10660fSKip Macy .autoneg_enable = vsc8211_autoneg_enable, 3738e10660fSKip Macy .autoneg_restart = vsc8211_autoneg_restart, 3748e10660fSKip Macy .advertise = t3_phy_advertise_fiber, 3758e10660fSKip Macy .set_speed_duplex = t3_set_phy_speed_duplex, 3768e10660fSKip Macy .get_link_status = vsc8211_get_link_status_fiber, 3778e10660fSKip Macy .power_down = vsc8211_power_down, 3788e10660fSKip Macy }; 379b6d90eb7SKip Macy #endif 380b6d90eb7SKip Macy 3818e10660fSKip Macy int t3_vsc8211_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr, 382b6d90eb7SKip Macy const struct mdio_ops *mdio_ops) 383b6d90eb7SKip Macy { 3848e10660fSKip Macy int err; 3858e10660fSKip Macy unsigned int val; 3868e10660fSKip Macy 3878e10660fSKip Macy cphy_init(phy, adapter, phy_addr, &vsc8211_ops, mdio_ops, 3888e10660fSKip Macy SUPPORTED_10baseT_Full | SUPPORTED_100baseT_Full | 3898e10660fSKip Macy SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | SUPPORTED_MII | 3908e10660fSKip Macy SUPPORTED_TP | SUPPORTED_IRQ, "10/100/1000BASE-T"); 3918e10660fSKip Macy msleep(20); /* PHY needs ~10ms to start responding to MDIO */ 3928e10660fSKip Macy 3938e10660fSKip Macy err = mdio_read(phy, 0, VSC8211_EXT_CTRL, &val); 3948e10660fSKip Macy if (err) 3958e10660fSKip Macy return err; 3968e10660fSKip Macy if (val & VSC_CTRL_MEDIA_MODE_HI) 3978e10660fSKip Macy return 0; /* copper interface, done */ 3988e10660fSKip Macy 3998e10660fSKip Macy phy->caps = SUPPORTED_1000baseT_Full | SUPPORTED_Autoneg | 4008e10660fSKip Macy SUPPORTED_MII | SUPPORTED_FIBRE | SUPPORTED_IRQ; 4018e10660fSKip Macy phy->desc = "1000BASE-X"; 4028e10660fSKip Macy phy->ops = &vsc8211_fiber_ops; 4038e10660fSKip Macy 4048e10660fSKip Macy if ((err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 1)) != 0 || 4058e10660fSKip Macy (err = mdio_write(phy, 0, VSC8211_SIGDET_CTRL, 1)) != 0 || 4068e10660fSKip Macy (err = mdio_write(phy, 0, VSC8211_EXT_PAGE_AXS, 0)) != 0 || 4078e10660fSKip Macy (err = mdio_write(phy, 0, VSC8211_EXT_CTRL, 4088e10660fSKip Macy val | VSC_CTRL_CLAUSE37_VIEW)) != 0 || 4098e10660fSKip Macy (err = vsc8211_reset(phy, 0)) != 0) 4108e10660fSKip Macy return err; 4118e10660fSKip Macy 4128e10660fSKip Macy udelay(5); /* delay after reset before next SMI */ 4138e10660fSKip Macy return 0; 414b6d90eb7SKip Macy } 415