1 /************************************************************************** 2 SPDX-License-Identifier: BSD-2-Clause 3 4 Copyright (c) 2007, Chelsio Inc. 5 All rights reserved. 6 7 Redistribution and use in source and binary forms, with or without 8 modification, are permitted provided that the following conditions are met: 9 10 1. Redistributions of source code must retain the above copyright notice, 11 this list of conditions and the following disclaimer. 12 13 2. Neither the name of the Chelsio Corporation nor the names of its 14 contributors may be used to endorse or promote products derived from 15 this software without specific prior written permission. 16 17 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 18 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 19 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 20 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 21 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 POSSIBILITY OF SUCH DAMAGE. 28 29 $FreeBSD$ 30 31 ***************************************************************************/ 32 /* 33 * This file is automatically generated --- any changes will be lost. 34 */ 35 36 #ifndef _SGE_DEFS_H 37 #define _SGE_DEFS_H 38 39 #define S_EC_CREDITS 0 40 #define M_EC_CREDITS 0x7FFF 41 #define V_EC_CREDITS(x) ((x) << S_EC_CREDITS) 42 #define G_EC_CREDITS(x) (((x) >> S_EC_CREDITS) & M_EC_CREDITS) 43 44 #define S_EC_GTS 15 45 #define V_EC_GTS(x) ((x) << S_EC_GTS) 46 #define F_EC_GTS V_EC_GTS(1U) 47 48 #define S_EC_INDEX 16 49 #define M_EC_INDEX 0xFFFF 50 #define V_EC_INDEX(x) ((x) << S_EC_INDEX) 51 #define G_EC_INDEX(x) (((x) >> S_EC_INDEX) & M_EC_INDEX) 52 53 #define S_EC_SIZE 0 54 #define M_EC_SIZE 0xFFFF 55 #define V_EC_SIZE(x) ((x) << S_EC_SIZE) 56 #define G_EC_SIZE(x) (((x) >> S_EC_SIZE) & M_EC_SIZE) 57 58 #define S_EC_BASE_LO 16 59 #define M_EC_BASE_LO 0xFFFF 60 #define V_EC_BASE_LO(x) ((x) << S_EC_BASE_LO) 61 #define G_EC_BASE_LO(x) (((x) >> S_EC_BASE_LO) & M_EC_BASE_LO) 62 63 #define S_EC_BASE_HI 0 64 #define M_EC_BASE_HI 0xF 65 #define V_EC_BASE_HI(x) ((x) << S_EC_BASE_HI) 66 #define G_EC_BASE_HI(x) (((x) >> S_EC_BASE_HI) & M_EC_BASE_HI) 67 68 #define S_EC_RESPQ 4 69 #define M_EC_RESPQ 0x7 70 #define V_EC_RESPQ(x) ((x) << S_EC_RESPQ) 71 #define G_EC_RESPQ(x) (((x) >> S_EC_RESPQ) & M_EC_RESPQ) 72 73 #define S_EC_TYPE 7 74 #define M_EC_TYPE 0x7 75 #define V_EC_TYPE(x) ((x) << S_EC_TYPE) 76 #define G_EC_TYPE(x) (((x) >> S_EC_TYPE) & M_EC_TYPE) 77 78 #define S_EC_GEN 10 79 #define V_EC_GEN(x) ((x) << S_EC_GEN) 80 #define F_EC_GEN V_EC_GEN(1U) 81 82 #define S_EC_UP_TOKEN 11 83 #define M_EC_UP_TOKEN 0xFFFFF 84 #define V_EC_UP_TOKEN(x) ((x) << S_EC_UP_TOKEN) 85 #define G_EC_UP_TOKEN(x) (((x) >> S_EC_UP_TOKEN) & M_EC_UP_TOKEN) 86 87 #define S_EC_VALID 31 88 #define V_EC_VALID(x) ((x) << S_EC_VALID) 89 #define F_EC_VALID V_EC_VALID(1U) 90 91 #define S_RQ_MSI_VEC 20 92 #define M_RQ_MSI_VEC 0x3F 93 #define V_RQ_MSI_VEC(x) ((x) << S_RQ_MSI_VEC) 94 #define G_RQ_MSI_VEC(x) (((x) >> S_RQ_MSI_VEC) & M_RQ_MSI_VEC) 95 96 #define S_RQ_INTR_EN 26 97 #define V_RQ_INTR_EN(x) ((x) << S_RQ_INTR_EN) 98 #define F_RQ_INTR_EN V_RQ_INTR_EN(1U) 99 100 #define S_RQ_GEN 28 101 #define V_RQ_GEN(x) ((x) << S_RQ_GEN) 102 #define F_RQ_GEN V_RQ_GEN(1U) 103 104 #define S_CQ_INDEX 0 105 #define M_CQ_INDEX 0xFFFF 106 #define V_CQ_INDEX(x) ((x) << S_CQ_INDEX) 107 #define G_CQ_INDEX(x) (((x) >> S_CQ_INDEX) & M_CQ_INDEX) 108 109 #define S_CQ_SIZE 16 110 #define M_CQ_SIZE 0xFFFF 111 #define V_CQ_SIZE(x) ((x) << S_CQ_SIZE) 112 #define G_CQ_SIZE(x) (((x) >> S_CQ_SIZE) & M_CQ_SIZE) 113 114 #define S_CQ_BASE_HI 0 115 #define M_CQ_BASE_HI 0xFFFFF 116 #define V_CQ_BASE_HI(x) ((x) << S_CQ_BASE_HI) 117 #define G_CQ_BASE_HI(x) (((x) >> S_CQ_BASE_HI) & M_CQ_BASE_HI) 118 119 #define S_CQ_RSPQ 20 120 #define M_CQ_RSPQ 0x3F 121 #define V_CQ_RSPQ(x) ((x) << S_CQ_RSPQ) 122 #define G_CQ_RSPQ(x) (((x) >> S_CQ_RSPQ) & M_CQ_RSPQ) 123 124 #define S_CQ_ASYNC_NOTIF 26 125 #define V_CQ_ASYNC_NOTIF(x) ((x) << S_CQ_ASYNC_NOTIF) 126 #define F_CQ_ASYNC_NOTIF V_CQ_ASYNC_NOTIF(1U) 127 128 #define S_CQ_ARMED 27 129 #define V_CQ_ARMED(x) ((x) << S_CQ_ARMED) 130 #define F_CQ_ARMED V_CQ_ARMED(1U) 131 132 #define S_CQ_ASYNC_NOTIF_SOL 28 133 #define V_CQ_ASYNC_NOTIF_SOL(x) ((x) << S_CQ_ASYNC_NOTIF_SOL) 134 #define F_CQ_ASYNC_NOTIF_SOL V_CQ_ASYNC_NOTIF_SOL(1U) 135 136 #define S_CQ_GEN 29 137 #define V_CQ_GEN(x) ((x) << S_CQ_GEN) 138 #define F_CQ_GEN V_CQ_GEN(1U) 139 140 #define S_CQ_ERR 30 141 #define V_CQ_ERR(x) ((x) << S_CQ_ERR) 142 #define F_CQ_ERR V_CQ_ERR(1U) 143 144 #define S_CQ_OVERFLOW_MODE 31 145 #define V_CQ_OVERFLOW_MODE(x) ((x) << S_CQ_OVERFLOW_MODE) 146 #define F_CQ_OVERFLOW_MODE V_CQ_OVERFLOW_MODE(1U) 147 148 #define S_CQ_CREDITS 0 149 #define M_CQ_CREDITS 0xFFFF 150 #define V_CQ_CREDITS(x) ((x) << S_CQ_CREDITS) 151 #define G_CQ_CREDITS(x) (((x) >> S_CQ_CREDITS) & M_CQ_CREDITS) 152 153 #define S_CQ_CREDIT_THRES 16 154 #define M_CQ_CREDIT_THRES 0x1FFF 155 #define V_CQ_CREDIT_THRES(x) ((x) << S_CQ_CREDIT_THRES) 156 #define G_CQ_CREDIT_THRES(x) (((x) >> S_CQ_CREDIT_THRES) & M_CQ_CREDIT_THRES) 157 158 #define S_FL_BASE_HI 0 159 #define M_FL_BASE_HI 0xFFFFF 160 #define V_FL_BASE_HI(x) ((x) << S_FL_BASE_HI) 161 #define G_FL_BASE_HI(x) (((x) >> S_FL_BASE_HI) & M_FL_BASE_HI) 162 163 #define S_FL_INDEX_LO 20 164 #define M_FL_INDEX_LO 0xFFF 165 #define V_FL_INDEX_LO(x) ((x) << S_FL_INDEX_LO) 166 #define G_FL_INDEX_LO(x) (((x) >> S_FL_INDEX_LO) & M_FL_INDEX_LO) 167 168 #define S_FL_INDEX_HI 0 169 #define M_FL_INDEX_HI 0xF 170 #define V_FL_INDEX_HI(x) ((x) << S_FL_INDEX_HI) 171 #define G_FL_INDEX_HI(x) (((x) >> S_FL_INDEX_HI) & M_FL_INDEX_HI) 172 173 #define S_FL_SIZE 4 174 #define M_FL_SIZE 0xFFFF 175 #define V_FL_SIZE(x) ((x) << S_FL_SIZE) 176 #define G_FL_SIZE(x) (((x) >> S_FL_SIZE) & M_FL_SIZE) 177 178 #define S_FL_GEN 20 179 #define V_FL_GEN(x) ((x) << S_FL_GEN) 180 #define F_FL_GEN V_FL_GEN(1U) 181 182 #define S_FL_ENTRY_SIZE_LO 21 183 #define M_FL_ENTRY_SIZE_LO 0x7FF 184 #define V_FL_ENTRY_SIZE_LO(x) ((x) << S_FL_ENTRY_SIZE_LO) 185 #define G_FL_ENTRY_SIZE_LO(x) (((x) >> S_FL_ENTRY_SIZE_LO) & M_FL_ENTRY_SIZE_LO) 186 187 #define S_FL_ENTRY_SIZE_HI 0 188 #define M_FL_ENTRY_SIZE_HI 0x1FFFFF 189 #define V_FL_ENTRY_SIZE_HI(x) ((x) << S_FL_ENTRY_SIZE_HI) 190 #define G_FL_ENTRY_SIZE_HI(x) (((x) >> S_FL_ENTRY_SIZE_HI) & M_FL_ENTRY_SIZE_HI) 191 192 #define S_FL_CONG_THRES 21 193 #define M_FL_CONG_THRES 0x3FF 194 #define V_FL_CONG_THRES(x) ((x) << S_FL_CONG_THRES) 195 #define G_FL_CONG_THRES(x) (((x) >> S_FL_CONG_THRES) & M_FL_CONG_THRES) 196 197 #define S_FL_GTS 31 198 #define V_FL_GTS(x) ((x) << S_FL_GTS) 199 #define F_FL_GTS V_FL_GTS(1U) 200 201 #define S_FLD_GEN1 31 202 #define V_FLD_GEN1(x) ((x) << S_FLD_GEN1) 203 #define F_FLD_GEN1 V_FLD_GEN1(1U) 204 205 #define S_FLD_GEN2 0 206 #define V_FLD_GEN2(x) ((x) << S_FLD_GEN2) 207 #define F_FLD_GEN2 V_FLD_GEN2(1U) 208 209 #define S_RSPD_TXQ1_CR 0 210 #define M_RSPD_TXQ1_CR 0x7F 211 #define V_RSPD_TXQ1_CR(x) ((x) << S_RSPD_TXQ1_CR) 212 #define G_RSPD_TXQ1_CR(x) (((x) >> S_RSPD_TXQ1_CR) & M_RSPD_TXQ1_CR) 213 214 #define S_RSPD_TXQ1_GTS 7 215 #define V_RSPD_TXQ1_GTS(x) ((x) << S_RSPD_TXQ1_GTS) 216 #define F_RSPD_TXQ1_GTS V_RSPD_TXQ1_GTS(1U) 217 218 #define S_RSPD_TXQ2_CR 8 219 #define M_RSPD_TXQ2_CR 0x7F 220 #define V_RSPD_TXQ2_CR(x) ((x) << S_RSPD_TXQ2_CR) 221 #define G_RSPD_TXQ2_CR(x) (((x) >> S_RSPD_TXQ2_CR) & M_RSPD_TXQ2_CR) 222 223 #define S_RSPD_TXQ2_GTS 15 224 #define V_RSPD_TXQ2_GTS(x) ((x) << S_RSPD_TXQ2_GTS) 225 #define F_RSPD_TXQ2_GTS V_RSPD_TXQ2_GTS(1U) 226 227 #define S_RSPD_TXQ0_CR 16 228 #define M_RSPD_TXQ0_CR 0x7F 229 #define V_RSPD_TXQ0_CR(x) ((x) << S_RSPD_TXQ0_CR) 230 #define G_RSPD_TXQ0_CR(x) (((x) >> S_RSPD_TXQ0_CR) & M_RSPD_TXQ0_CR) 231 232 #define S_RSPD_TXQ0_GTS 23 233 #define V_RSPD_TXQ0_GTS(x) ((x) << S_RSPD_TXQ0_GTS) 234 #define F_RSPD_TXQ0_GTS V_RSPD_TXQ0_GTS(1U) 235 236 #define S_RSPD_EOP 24 237 #define V_RSPD_EOP(x) ((x) << S_RSPD_EOP) 238 #define F_RSPD_EOP V_RSPD_EOP(1U) 239 #define G_RSPD_EOP(x) ((x) & F_RSPD_EOP) 240 241 #define S_RSPD_SOP 25 242 #define V_RSPD_SOP(x) ((x) << S_RSPD_SOP) 243 #define F_RSPD_SOP V_RSPD_SOP(1U) 244 #define G_RSPD_SOP(x) ((x) & F_RSPD_SOP) 245 246 #define G_RSPD_SOP_EOP(x) ((G_RSPD_SOP(x) | G_RSPD_EOP(x)) >> S_RSPD_EOP) 247 248 #define S_RSPD_ASYNC_NOTIF 26 249 #define V_RSPD_ASYNC_NOTIF(x) ((x) << S_RSPD_ASYNC_NOTIF) 250 #define F_RSPD_ASYNC_NOTIF V_RSPD_ASYNC_NOTIF(1U) 251 252 #define S_RSPD_FL0_GTS 27 253 #define V_RSPD_FL0_GTS(x) ((x) << S_RSPD_FL0_GTS) 254 #define F_RSPD_FL0_GTS V_RSPD_FL0_GTS(1U) 255 256 #define S_RSPD_FL1_GTS 28 257 #define V_RSPD_FL1_GTS(x) ((x) << S_RSPD_FL1_GTS) 258 #define F_RSPD_FL1_GTS V_RSPD_FL1_GTS(1U) 259 260 #define S_RSPD_IMM_DATA_VALID 29 261 #define V_RSPD_IMM_DATA_VALID(x) ((x) << S_RSPD_IMM_DATA_VALID) 262 #define F_RSPD_IMM_DATA_VALID V_RSPD_IMM_DATA_VALID(1U) 263 264 #define S_RSPD_OFFLOAD 30 265 #define V_RSPD_OFFLOAD(x) ((x) << S_RSPD_OFFLOAD) 266 #define F_RSPD_OFFLOAD V_RSPD_OFFLOAD(1U) 267 268 #define S_RSPD_GEN1 31 269 #define V_RSPD_GEN1(x) ((x) << S_RSPD_GEN1) 270 #define F_RSPD_GEN1 V_RSPD_GEN1(1U) 271 272 #define S_RSPD_LEN 0 273 #define M_RSPD_LEN 0x7FFFFFFF 274 #define V_RSPD_LEN(x) ((x) << S_RSPD_LEN) 275 #define G_RSPD_LEN(x) (((x) >> S_RSPD_LEN) & M_RSPD_LEN) 276 277 #define S_RSPD_FLQ 31 278 #define V_RSPD_FLQ(x) ((x) << S_RSPD_FLQ) 279 #define F_RSPD_FLQ V_RSPD_FLQ(1U) 280 281 #define S_RSPD_GEN2 0 282 #define V_RSPD_GEN2(x) ((x) << S_RSPD_GEN2) 283 #define F_RSPD_GEN2 V_RSPD_GEN2(1U) 284 285 #define S_RSPD_INR_VEC 1 286 #define M_RSPD_INR_VEC 0x7F 287 #define V_RSPD_INR_VEC(x) ((x) << S_RSPD_INR_VEC) 288 #define G_RSPD_INR_VEC(x) (((x) >> S_RSPD_INR_VEC) & M_RSPD_INR_VEC) 289 290 #endif /* _SGE_DEFS_H */ 291