xref: /freebsd/sys/dev/cxgb/common/cxgb_firmware_exports.h (revision f0a75d274af375d15b97b830966b99a02b7db911)
1 /**************************************************************************
2 
3 Copyright (c) 2007, Chelsio Inc.
4 All rights reserved.
5 
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8 
9  1. Redistributions of source code must retain the above copyright notice,
10     this list of conditions and the following disclaimer.
11 
12  2. Redistributions in binary form must reproduce the above copyright
13     notice, this list of conditions and the following disclaimer in the
14     documentation and/or other materials provided with the distribution.
15 
16  3. Neither the name of the Chelsio Corporation nor the names of its
17     contributors may be used to endorse or promote products derived from
18     this software without specific prior written permission.
19 
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31 
32 $FreeBSD$
33 
34 ***************************************************************************/
35 #ifndef _FIRMWARE_EXPORTS_H_
36 #define _FIRMWARE_EXPORTS_H_
37 
38 /* WR OPCODES supported by the firmware.
39  */
40 #define	FW_WROPCODE_FORWARD			0x01
41 #define FW_WROPCODE_BYPASS			0x05
42 
43 #define FW_WROPCODE_TUNNEL_TX_PKT		0x03
44 
45 #define FW_WROPOCDE_ULPTX_DATA_SGL		0x00
46 #define FW_WROPCODE_ULPTX_MEM_READ		0x02
47 #define FW_WROPCODE_ULPTX_PKT			0x04
48 #define FW_WROPCODE_ULPTX_INVALIDATE		0x06
49 
50 #define FW_WROPCODE_TUNNEL_RX_PKT		0x07
51 
52 #define FW_WROPCODE_OFLD_GETTCB_RPL		0x08
53 #define FW_WROPCODE_OFLD_CLOSE_CON		0x09
54 #define FW_WROPCODE_OFLD_TP_ABORT_CON_REQ	0x0A
55 #define FW_WROPCODE_OFLD_HOST_ABORT_CON_RPL	0x0F
56 #define FW_WROPCODE_OFLD_HOST_ABORT_CON_REQ	0x0B
57 #define FW_WROPCODE_OFLD_TP_ABORT_CON_RPL	0x0C
58 #define FW_WROPCODE_OFLD_TX_DATA		0x0D
59 #define FW_WROPCODE_OFLD_TX_DATA_ACK		0x0E
60 
61 #define FW_WROPCODE_RI_RDMA_INIT		0x10
62 #define FW_WROPCODE_RI_RDMA_WRITE		0x11
63 #define FW_WROPCODE_RI_RDMA_READ_REQ		0x12
64 #define FW_WROPCODE_RI_RDMA_READ_RESP		0x13
65 #define FW_WROPCODE_RI_SEND			0x14
66 #define FW_WROPCODE_RI_TERMINATE		0x15
67 #define FW_WROPCODE_RI_RDMA_READ		0x16
68 #define FW_WROPCODE_RI_RECEIVE			0x17
69 #define FW_WROPCODE_RI_BIND_MW			0x18
70 #define FW_WROPCODE_RI_FASTREGISTER_MR		0x19
71 #define FW_WROPCODE_RI_LOCAL_INV		0x1A
72 #define FW_WROPCODE_RI_MODIFY_QP		0x1B
73 #define FW_WROPCODE_RI_BYPASS			0x1C
74 
75 #define FW_WROPOCDE_RSVD			0x1E
76 
77 #define FW_WROPCODE_SGE_EGRESSCONTEXT_RR	0x1F
78 
79 #define FW_WROPCODE_MNGT			0x1D
80 #define FW_MNGTOPCODE_PKTSCHED_SET		0x00
81 
82 /* Maximum size of a WR sent from the host, limited by the SGE.
83  *
84  * Note: WR coming from ULP or TP are only limited by CIM.
85  */
86 #define FW_WR_SIZE			128
87 
88 /* Maximum number of outstanding WRs sent from the host. Value must be
89  * programmed in the CTRL/TUNNEL/QP SGE Egress Context and used by
90  * offload modules to limit the number of WRs per connection.
91  */
92 #define FW_T3_WR_NUM			16
93 #define FW_N3_WR_NUM			7
94 
95 #ifndef N3
96 # define FW_WR_NUM			FW_T3_WR_NUM
97 #else
98 # define FW_WR_NUM			FW_N3_WR_NUM
99 #endif
100 
101 /* FW_TUNNEL_NUM corresponds to the number of supported TUNNEL Queues. These
102  * queues must start at SGE Egress Context FW_TUNNEL_SGEEC_START and must
103  * start at 'TID' (or 'uP Token') FW_TUNNEL_TID_START.
104  *
105  * Ingress Traffic (e.g. DMA completion credit)  for TUNNEL Queue[i] is sent
106  * to RESP Queue[i].
107  */
108 #define FW_TUNNEL_NUM			8
109 #define FW_TUNNEL_SGEEC_START		8
110 #define FW_TUNNEL_TID_START		65544
111 
112 
113 /* FW_CTRL_NUM corresponds to the number of supported CTRL Queues. These queues
114  * must start at SGE Egress Context FW_CTRL_SGEEC_START and must start at 'TID'
115  * (or 'uP Token') FW_CTRL_TID_START.
116  *
117  * Ingress Traffic for CTRL Queue[i] is sent to RESP Queue[i].
118  */
119 #define FW_CTRL_NUM			8
120 #define FW_CTRL_SGEEC_START		65528
121 #define FW_CTRL_TID_START		65536
122 
123 /* FW_OFLD_NUM corresponds to the number of supported OFFLOAD Queues. These
124  * queues must start at SGE Egress Context FW_OFLD_SGEEC_START.
125  *
126  * Note: the 'uP Token' in the SGE Egress Context fields is irrelevant for
127  * OFFLOAD Queues, as the host is responsible for providing the correct TID in
128  * every WR.
129  *
130  * Ingress Trafffic for OFFLOAD Queue[i] is sent to RESP Queue[i].
131  */
132 #define FW_OFLD_NUM			8
133 #define FW_OFLD_SGEEC_START		0
134 
135 /*
136  *
137  */
138 #define FW_RI_NUM			1
139 #define FW_RI_SGEEC_START		65527
140 #define FW_RI_TID_START			65552
141 
142 /*
143  * The RX_PKT_TID
144  */
145 #define FW_RX_PKT_NUM			1
146 #define FW_RX_PKT_TID_START		65553
147 
148 /* FW_WRC_NUM corresponds to the number of Work Request Context that supported
149  * by the firmware.
150  */
151 #define FW_WRC_NUM			\
152     (65536 + FW_TUNNEL_NUM + FW_CTRL_NUM + FW_RI_NUM + FW_RX_PKT_NUM)
153 
154 /*
155  * FW type and version.
156  */
157 #define S_FW_VERSION_TYPE		28
158 #define M_FW_VERSION_TYPE		0xF
159 #define V_FW_VERSION_TYPE(x)		((x) << S_FW_VERSION_TYPE)
160 #define G_FW_VERSION_TYPE(x)		\
161     (((x) >> S_FW_VERSION_TYPE) & M_FW_VERSION_TYPE)
162 
163 #define S_FW_VERSION_MAJOR		16
164 #define M_FW_VERSION_MAJOR		0xFFF
165 #define V_FW_VERSION_MAJOR(x)		((x) << S_FW_VERSION_MAJOR)
166 #define G_FW_VERSION_MAJOR(x)		\
167     (((x) >> S_FW_VERSION_MAJOR) & M_FW_VERSION_MAJOR)
168 
169 #define S_FW_VERSION_MINOR		8
170 #define M_FW_VERSION_MINOR		0xFF
171 #define V_FW_VERSION_MINOR(x)		((x) << S_FW_VERSION_MINOR)
172 #define G_FW_VERSION_MINOR(x)		\
173     (((x) >> S_FW_VERSION_MINOR) & M_FW_VERSION_MINOR)
174 
175 #define S_FW_VERSION_MICRO		0
176 #define M_FW_VERSION_MICRO		0xFF
177 #define V_FW_VERSION_MICRO(x)		((x) << S_FW_VERSION_MICRO)
178 #define G_FW_VERSION_MICRO(x)		\
179     (((x) >> S_FW_VERSION_MICRO) & M_FW_VERSION_MICRO)
180 
181 #endif /* _FIRMWARE_EXPORTS_H_ */
182