1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.Org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * Generic DT based cpufreq driver 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/bus.h> 37 #include <sys/rman.h> 38 #include <sys/kernel.h> 39 #include <sys/module.h> 40 #include <sys/cpu.h> 41 #include <sys/cpuset.h> 42 #include <sys/smp.h> 43 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/ofw_bus_subr.h> 46 47 #include <dev/extres/clk/clk.h> 48 #include <dev/extres/regulator/regulator.h> 49 50 #include "cpufreq_if.h" 51 52 #if 0 53 #define DPRINTF(dev, msg...) device_printf(dev, "cpufreq_dt: " msg); 54 #else 55 #define DPRINTF(dev, msg...) 56 #endif 57 58 enum opp_version { 59 OPP_V1 = 1, 60 OPP_V2, 61 }; 62 63 struct cpufreq_dt_opp { 64 uint64_t freq; 65 uint32_t uvolt_target; 66 uint32_t uvolt_min; 67 uint32_t uvolt_max; 68 uint32_t uamps; 69 uint32_t clk_latency; 70 bool turbo_mode; 71 bool opp_suspend; 72 }; 73 74 #define CPUFREQ_DT_HAVE_REGULATOR(sc) ((sc)->reg != NULL) 75 76 struct cpufreq_dt_softc { 77 device_t dev; 78 clk_t clk; 79 regulator_t reg; 80 81 struct cpufreq_dt_opp *opp; 82 ssize_t nopp; 83 84 int cpu; 85 cpuset_t cpus; 86 }; 87 88 static void 89 cpufreq_dt_notify(device_t dev, uint64_t freq) 90 { 91 struct cpufreq_dt_softc *sc; 92 struct pcpu *pc; 93 int cpu; 94 95 sc = device_get_softc(dev); 96 97 CPU_FOREACH(cpu) { 98 if (CPU_ISSET(cpu, &sc->cpus)) { 99 pc = pcpu_find(cpu); 100 pc->pc_clock = freq; 101 } 102 } 103 } 104 105 static const struct cpufreq_dt_opp * 106 cpufreq_dt_find_opp(device_t dev, uint64_t freq) 107 { 108 struct cpufreq_dt_softc *sc; 109 ssize_t n; 110 111 sc = device_get_softc(dev); 112 113 DPRINTF(dev, "Looking for freq %ju\n", freq); 114 for (n = 0; n < sc->nopp; n++) 115 if (CPUFREQ_CMP(sc->opp[n].freq, freq)) 116 return (&sc->opp[n]); 117 118 DPRINTF(dev, "Couldn't find one\n"); 119 return (NULL); 120 } 121 122 static void 123 cpufreq_dt_opp_to_setting(device_t dev, const struct cpufreq_dt_opp *opp, 124 struct cf_setting *set) 125 { 126 127 memset(set, 0, sizeof(*set)); 128 set->freq = opp->freq / 1000000; 129 set->volts = opp->uvolt_target / 1000; 130 set->power = CPUFREQ_VAL_UNKNOWN; 131 set->lat = opp->clk_latency; 132 set->dev = dev; 133 } 134 135 static int 136 cpufreq_dt_get(device_t dev, struct cf_setting *set) 137 { 138 struct cpufreq_dt_softc *sc; 139 const struct cpufreq_dt_opp *opp; 140 uint64_t freq; 141 142 sc = device_get_softc(dev); 143 144 DPRINTF(dev, "cpufreq_dt_get\n"); 145 if (clk_get_freq(sc->clk, &freq) != 0) 146 return (ENXIO); 147 148 opp = cpufreq_dt_find_opp(dev, freq); 149 if (opp == NULL) { 150 device_printf(dev, "Can't find the current freq in opp\n"); 151 return (ENOENT); 152 } 153 154 cpufreq_dt_opp_to_setting(dev, opp, set); 155 156 DPRINTF(dev, "Current freq %dMhz\n", set->freq); 157 return (0); 158 } 159 160 static int 161 cpufreq_dt_set(device_t dev, const struct cf_setting *set) 162 { 163 struct cpufreq_dt_softc *sc; 164 const struct cpufreq_dt_opp *opp, *copp; 165 uint64_t freq; 166 int uvolt, error; 167 168 sc = device_get_softc(dev); 169 170 DPRINTF(dev, "Working on cpu %d\n", sc->cpu); 171 DPRINTF(dev, "We have %d cpu on this dev\n", CPU_COUNT(&sc->cpus)); 172 if (!CPU_ISSET(sc->cpu, &sc->cpus)) { 173 DPRINTF(dev, "Not for this CPU\n"); 174 return (0); 175 } 176 177 if (clk_get_freq(sc->clk, &freq) != 0) { 178 device_printf(dev, "Can't get current clk freq\n"); 179 return (ENXIO); 180 } 181 182 /* 183 * Only do the regulator work if it's required. 184 */ 185 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) { 186 /* Try to get current valtage by using regulator first. */ 187 error = regulator_get_voltage(sc->reg, &uvolt); 188 if (error != 0) { 189 /* 190 * Try oppoints table as backup way. However, 191 * this is insufficient because the actual processor 192 * frequency may not be in the table. PLL frequency 193 * granularity can be different that granularity of 194 * oppoint table. 195 */ 196 copp = cpufreq_dt_find_opp(sc->dev, freq); 197 if (copp == NULL) { 198 device_printf(dev, 199 "Can't find the current freq in opp\n"); 200 return (ENOENT); 201 } 202 uvolt = copp->uvolt_target; 203 } 204 } else 205 uvolt = 0; 206 207 opp = cpufreq_dt_find_opp(sc->dev, set->freq * 1000000); 208 if (opp == NULL) { 209 device_printf(dev, "Couldn't find an opp for this freq\n"); 210 return (EINVAL); 211 } 212 DPRINTF(sc->dev, "Current freq %ju, uvolt: %d\n", freq, uvolt); 213 DPRINTF(sc->dev, "Target freq %ju, , uvolt: %d\n", 214 opp->freq, opp->uvolt_target); 215 216 if (CPUFREQ_DT_HAVE_REGULATOR(sc) && (uvolt < opp->uvolt_target)) { 217 DPRINTF(dev, "Changing regulator from %u to %u\n", 218 uvolt, opp->uvolt_target); 219 error = regulator_set_voltage(sc->reg, 220 opp->uvolt_min, 221 opp->uvolt_max); 222 if (error != 0) { 223 DPRINTF(dev, "Failed, backout\n"); 224 return (ENXIO); 225 } 226 } 227 228 DPRINTF(dev, "Setting clk to %ju\n", opp->freq); 229 error = clk_set_freq(sc->clk, opp->freq, CLK_SET_ROUND_DOWN); 230 if (error != 0) { 231 DPRINTF(dev, "Failed, backout\n"); 232 /* Restore previous voltage (best effort) */ 233 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) 234 error = regulator_set_voltage(sc->reg, 235 copp->uvolt_min, 236 copp->uvolt_max); 237 return (ENXIO); 238 } 239 240 if (CPUFREQ_DT_HAVE_REGULATOR(sc) && (uvolt > opp->uvolt_target)) { 241 DPRINTF(dev, "Changing regulator from %u to %u\n", 242 uvolt, opp->uvolt_target); 243 error = regulator_set_voltage(sc->reg, 244 opp->uvolt_min, 245 opp->uvolt_max); 246 if (error != 0) { 247 DPRINTF(dev, "Failed to switch regulator to %d\n", 248 opp->uvolt_target); 249 /* Restore previous CPU frequency (best effort) */ 250 (void)clk_set_freq(sc->clk, copp->freq, 0); 251 return (ENXIO); 252 } 253 } 254 255 if (clk_get_freq(sc->clk, &freq) == 0) 256 cpufreq_dt_notify(dev, freq); 257 258 return (0); 259 } 260 261 static int 262 cpufreq_dt_type(device_t dev, int *type) 263 { 264 if (type == NULL) 265 return (EINVAL); 266 267 *type = CPUFREQ_TYPE_ABSOLUTE; 268 return (0); 269 } 270 271 static int 272 cpufreq_dt_settings(device_t dev, struct cf_setting *sets, int *count) 273 { 274 struct cpufreq_dt_softc *sc; 275 ssize_t n; 276 277 DPRINTF(dev, "cpufreq_dt_settings\n"); 278 if (sets == NULL || count == NULL) 279 return (EINVAL); 280 281 sc = device_get_softc(dev); 282 283 if (*count < sc->nopp) { 284 *count = (int)sc->nopp; 285 return (E2BIG); 286 } 287 288 for (n = 0; n < sc->nopp; n++) 289 cpufreq_dt_opp_to_setting(dev, &sc->opp[n], &sets[n]); 290 291 *count = (int)sc->nopp; 292 293 return (0); 294 } 295 296 static void 297 cpufreq_dt_identify(driver_t *driver, device_t parent) 298 { 299 phandle_t node; 300 301 /* Properties must be listed under node /cpus/cpu@0 */ 302 node = ofw_bus_get_node(parent); 303 304 /* The cpu@0 node must have the following properties */ 305 if (!OF_hasprop(node, "clocks")) 306 return; 307 308 if (!OF_hasprop(node, "operating-points") && 309 !OF_hasprop(node, "operating-points-v2")) 310 return; 311 312 if (device_find_child(parent, "cpufreq_dt", -1) != NULL) 313 return; 314 315 if (BUS_ADD_CHILD(parent, 0, "cpufreq_dt", device_get_unit(parent)) 316 == NULL) 317 device_printf(parent, "add cpufreq_dt child failed\n"); 318 } 319 320 static int 321 cpufreq_dt_probe(device_t dev) 322 { 323 phandle_t node; 324 325 node = ofw_bus_get_node(device_get_parent(dev)); 326 327 /* 328 * Note - supply isn't required here for probe; we'll check 329 * it out in more detail during attach. 330 */ 331 if (!OF_hasprop(node, "clocks")) 332 return (ENXIO); 333 334 if (!OF_hasprop(node, "operating-points") && 335 !OF_hasprop(node, "operating-points-v2")) 336 return (ENXIO); 337 338 device_set_desc(dev, "Generic cpufreq driver"); 339 return (BUS_PROBE_GENERIC); 340 } 341 342 static int 343 cpufreq_dt_oppv1_parse(struct cpufreq_dt_softc *sc, phandle_t node) 344 { 345 uint32_t *opp, lat; 346 ssize_t n; 347 348 sc->nopp = OF_getencprop_alloc_multi(node, "operating-points", 349 sizeof(uint32_t) * 2, (void **)&opp); 350 if (sc->nopp == -1) 351 return (ENXIO); 352 353 if (OF_getencprop(node, "clock-latency", &lat, sizeof(lat)) == -1) 354 lat = CPUFREQ_VAL_UNKNOWN; 355 356 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 357 358 for (n = 0; n < sc->nopp; n++) { 359 sc->opp[n].freq = opp[n * 2 + 0] * 1000; 360 sc->opp[n].uvolt_min = opp[n * 2 + 1]; 361 sc->opp[n].uvolt_max = sc->opp[n].uvolt_min; 362 sc->opp[n].uvolt_target = sc->opp[n].uvolt_min; 363 sc->opp[n].clk_latency = lat; 364 365 if (bootverbose) 366 device_printf(sc->dev, "%ju.%03ju MHz, %u uV\n", 367 sc->opp[n].freq / 1000000, 368 sc->opp[n].freq % 1000000, 369 sc->opp[n].uvolt_target); 370 } 371 free(opp, M_OFWPROP); 372 373 return (0); 374 } 375 376 static int 377 cpufreq_dt_oppv2_parse(struct cpufreq_dt_softc *sc, phandle_t node) 378 { 379 phandle_t opp, opp_table, opp_xref; 380 pcell_t cell[2]; 381 uint32_t *volts, lat; 382 int nvolt, i; 383 384 /* 385 * operating-points-v2 does not require the voltage entries 386 * and a regulator. So, it's OK if they're not there. 387 */ 388 if (OF_getencprop(node, "operating-points-v2", &opp_xref, 389 sizeof(opp_xref)) == -1) { 390 device_printf(sc->dev, "Cannot get xref to oppv2 table\n"); 391 return (ENXIO); 392 } 393 394 opp_table = OF_node_from_xref(opp_xref); 395 if (opp_table == opp_xref) 396 return (ENXIO); 397 398 if (!OF_hasprop(opp_table, "opp-shared")) { 399 device_printf(sc->dev, "Only opp-shared is supported\n"); 400 return (ENXIO); 401 } 402 403 for (opp = OF_child(opp_table); opp > 0; opp = OF_peer(opp)) 404 sc->nopp += 1; 405 406 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 407 408 for (i = 0, opp_table = OF_child(opp_table); opp_table > 0; 409 opp_table = OF_peer(opp_table), i++) { 410 /* opp-hz is a required property */ 411 if (OF_getencprop(opp_table, "opp-hz", cell, 412 sizeof(cell)) == -1) 413 continue; 414 415 sc->opp[i].freq = cell[0]; 416 sc->opp[i].freq <<= 32; 417 sc->opp[i].freq |= cell[1]; 418 419 if (OF_getencprop(opp_table, "clock-latency", &lat, 420 sizeof(lat)) == -1) 421 sc->opp[i].clk_latency = CPUFREQ_VAL_UNKNOWN; 422 else 423 sc->opp[i].clk_latency = (int)lat; 424 425 if (OF_hasprop(opp_table, "turbo-mode")) 426 sc->opp[i].turbo_mode = true; 427 if (OF_hasprop(opp_table, "opp-suspend")) 428 sc->opp[i].opp_suspend = true; 429 430 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) { 431 nvolt = OF_getencprop_alloc_multi(opp_table, 432 "opp-microvolt", sizeof(*volts), (void **)&volts); 433 if (nvolt == 1) { 434 sc->opp[i].uvolt_target = volts[0]; 435 sc->opp[i].uvolt_min = volts[0]; 436 sc->opp[i].uvolt_max = volts[0]; 437 } else if (nvolt == 3) { 438 sc->opp[i].uvolt_target = volts[0]; 439 sc->opp[i].uvolt_min = volts[1]; 440 sc->opp[i].uvolt_max = volts[2]; 441 } else { 442 device_printf(sc->dev, 443 "Wrong count of opp-microvolt property\n"); 444 OF_prop_free(volts); 445 free(sc->opp, M_DEVBUF); 446 return (ENXIO); 447 } 448 OF_prop_free(volts); 449 } else { 450 /* No regulator required; don't add anything */ 451 sc->opp[i].uvolt_target = 0; 452 sc->opp[i].uvolt_min = 0; 453 sc->opp[i].uvolt_max = 0; 454 } 455 456 if (bootverbose) 457 device_printf(sc->dev, "%ju.%03ju Mhz (%u uV)\n", 458 sc->opp[i].freq / 1000000, 459 sc->opp[i].freq % 1000000, 460 sc->opp[i].uvolt_target); 461 } 462 return (0); 463 } 464 465 static int 466 cpufreq_dt_attach(device_t dev) 467 { 468 struct cpufreq_dt_softc *sc; 469 phandle_t node; 470 phandle_t cnode, opp, copp; 471 int cpu; 472 uint64_t freq; 473 int rv = 0; 474 char device_type[16]; 475 enum opp_version version; 476 477 sc = device_get_softc(dev); 478 sc->dev = dev; 479 node = ofw_bus_get_node(device_get_parent(dev)); 480 sc->cpu = device_get_unit(device_get_parent(dev)); 481 sc->reg = NULL; 482 483 DPRINTF(dev, "cpu=%d\n", sc->cpu); 484 if (sc->cpu >= mp_ncpus) { 485 device_printf(dev, "Not attaching as cpu is not present\n"); 486 rv = ENXIO; 487 goto error; 488 } 489 490 /* 491 * Cache if we have the regulator supply but don't error out 492 * quite yet. If it's operating-points-v2 then regulator 493 * and voltage entries are optional. 494 */ 495 if (regulator_get_by_ofw_property(dev, node, "cpu-supply", 496 &sc->reg) == 0) 497 device_printf(dev, "Found cpu-supply\n"); 498 else if (regulator_get_by_ofw_property(dev, node, "cpu0-supply", 499 &sc->reg) == 0) 500 device_printf(dev, "Found cpu0-supply\n"); 501 502 /* 503 * Determine which operating mode we're in. Error out if we expect 504 * a regulator but we're not getting it. 505 */ 506 if (OF_hasprop(node, "operating-points")) 507 version = OPP_V1; 508 else if (OF_hasprop(node, "operating-points-v2")) 509 version = OPP_V2; 510 else { 511 device_printf(dev, 512 "didn't find a valid operating-points or v2 node\n"); 513 rv = ENXIO; 514 goto error; 515 } 516 517 /* 518 * Now, we only enforce needing a regulator for v1. 519 */ 520 if ((version == OPP_V1) && !CPUFREQ_DT_HAVE_REGULATOR(sc)) { 521 device_printf(dev, "no regulator for %s\n", 522 ofw_bus_get_name(device_get_parent(dev))); 523 rv = ENXIO; 524 goto error; 525 } 526 527 if (clk_get_by_ofw_index(dev, node, 0, &sc->clk) != 0) { 528 device_printf(dev, "no clock for %s\n", 529 ofw_bus_get_name(device_get_parent(dev))); 530 rv = ENXIO; 531 goto error; 532 } 533 534 if (version == OPP_V1) { 535 rv = cpufreq_dt_oppv1_parse(sc, node); 536 if (rv != 0) { 537 device_printf(dev, "Failed to parse opp-v1 table\n"); 538 goto error; 539 } 540 OF_getencprop(node, "operating-points", &opp, 541 sizeof(opp)); 542 } else if (version == OPP_V2) { 543 rv = cpufreq_dt_oppv2_parse(sc, node); 544 if (rv != 0) { 545 device_printf(dev, "Failed to parse opp-v2 table\n"); 546 goto error; 547 } 548 OF_getencprop(node, "operating-points-v2", &opp, 549 sizeof(opp)); 550 } else { 551 device_printf(dev, "operating points version is incorrect\n"); 552 goto error; 553 } 554 555 /* 556 * Find all CPUs that share the same opp table 557 */ 558 CPU_ZERO(&sc->cpus); 559 cnode = OF_parent(node); 560 for (cpu = 0, cnode = OF_child(cnode); cnode > 0; cnode = OF_peer(cnode)) { 561 if (OF_getprop(cnode, "device_type", device_type, sizeof(device_type)) <= 0) 562 continue; 563 if (strcmp(device_type, "cpu") != 0) 564 continue; 565 if (cpu == sc->cpu) { 566 DPRINTF(dev, "Skipping our cpu\n"); 567 CPU_SET(cpu, &sc->cpus); 568 cpu++; 569 continue; 570 } 571 DPRINTF(dev, "Testing CPU %d\n", cpu); 572 copp = -1; 573 if (version == OPP_V1) 574 OF_getencprop(cnode, "operating-points", &copp, 575 sizeof(copp)); 576 else if (version == OPP_V2) 577 OF_getencprop(cnode, "operating-points-v2", 578 &copp, sizeof(copp)); 579 if (opp == copp) { 580 DPRINTF(dev, "CPU %d is using the same opp as this one (%d)\n", 581 cpu, sc->cpu); 582 CPU_SET(cpu, &sc->cpus); 583 } 584 cpu++; 585 } 586 587 if (clk_get_freq(sc->clk, &freq) == 0) 588 cpufreq_dt_notify(dev, freq); 589 590 cpufreq_register(dev); 591 592 return (0); 593 error: 594 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) 595 regulator_release(sc->reg); 596 return (rv); 597 } 598 599 static device_method_t cpufreq_dt_methods[] = { 600 /* Device interface */ 601 DEVMETHOD(device_identify, cpufreq_dt_identify), 602 DEVMETHOD(device_probe, cpufreq_dt_probe), 603 DEVMETHOD(device_attach, cpufreq_dt_attach), 604 605 /* cpufreq interface */ 606 DEVMETHOD(cpufreq_drv_get, cpufreq_dt_get), 607 DEVMETHOD(cpufreq_drv_set, cpufreq_dt_set), 608 DEVMETHOD(cpufreq_drv_type, cpufreq_dt_type), 609 DEVMETHOD(cpufreq_drv_settings, cpufreq_dt_settings), 610 611 DEVMETHOD_END 612 }; 613 614 static driver_t cpufreq_dt_driver = { 615 "cpufreq_dt", 616 cpufreq_dt_methods, 617 sizeof(struct cpufreq_dt_softc), 618 }; 619 620 DRIVER_MODULE(cpufreq_dt, cpu, cpufreq_dt_driver, 0, 0); 621 MODULE_VERSION(cpufreq_dt, 1); 622