xref: /freebsd/sys/dev/cpufreq/cpufreq_dt.c (revision 5ab1c5846ff41be24b1f6beb0317bf8258cd4409) 
1 /*-
2  * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.Org>
3  * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca>
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
18  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
19  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
20  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
21  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
22  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  * $FreeBSD$
27  */
28 
29 /*
30  * Generic DT based cpufreq driver
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/bus.h>
39 #include <sys/rman.h>
40 #include <sys/kernel.h>
41 #include <sys/module.h>
42 #include <sys/cpu.h>
43 #include <sys/cpuset.h>
44 #include <sys/smp.h>
45 
46 #include <dev/ofw/ofw_bus.h>
47 #include <dev/ofw/ofw_bus_subr.h>
48 
49 #include <dev/extres/clk/clk.h>
50 #include <dev/extres/regulator/regulator.h>
51 
52 #include "cpufreq_if.h"
53 
54 #if 0
55 #define DEBUG(dev, msg...) device_printf(dev, "cpufreq_dt: " msg);
56 #else
57 #define DEBUG(dev, msg...)
58 #endif
59 
60 enum opp_version {
61 	OPP_V1 = 1,
62 	OPP_V2,
63 };
64 
65 struct cpufreq_dt_opp {
66 	uint64_t	freq;
67 	uint32_t	uvolt_target;
68 	uint32_t	uvolt_min;
69 	uint32_t	uvolt_max;
70 	uint32_t	uamps;
71 	uint32_t	clk_latency;
72 	bool		turbo_mode;
73 	bool		opp_suspend;
74 };
75 
76 struct cpufreq_dt_softc {
77 	device_t dev;
78 	clk_t clk;
79 	regulator_t reg;
80 
81 	struct cpufreq_dt_opp *opp;
82 	ssize_t nopp;
83 
84 	cpuset_t cpus;
85 };
86 
87 static void
88 cpufreq_dt_notify(device_t dev, uint64_t freq)
89 {
90 	struct cpufreq_dt_softc *sc;
91 	struct pcpu *pc;
92 	int cpu;
93 
94 	sc = device_get_softc(dev);
95 
96 	CPU_FOREACH(cpu) {
97 		if (CPU_ISSET(cpu, &sc->cpus)) {
98 			pc = pcpu_find(cpu);
99 			pc->pc_clock = freq;
100 		}
101 	}
102 }
103 
104 static const struct cpufreq_dt_opp *
105 cpufreq_dt_find_opp(device_t dev, uint64_t freq)
106 {
107 	struct cpufreq_dt_softc *sc;
108 	ssize_t n;
109 
110 	sc = device_get_softc(dev);
111 
112 	DEBUG(dev, "Looking for freq %ju\n", freq);
113 	for (n = 0; n < sc->nopp; n++)
114 		if (CPUFREQ_CMP(sc->opp[n].freq, freq))
115 			return (&sc->opp[n]);
116 
117 	DEBUG(dev, "Couldn't find one\n");
118 	return (NULL);
119 }
120 
121 static void
122 cpufreq_dt_opp_to_setting(device_t dev, const struct cpufreq_dt_opp *opp,
123     struct cf_setting *set)
124 {
125 	struct cpufreq_dt_softc *sc;
126 
127 	sc = device_get_softc(dev);
128 
129 	memset(set, 0, sizeof(*set));
130 	set->freq = opp->freq / 1000000;
131 	set->volts = opp->uvolt_target / 1000;
132 	set->power = CPUFREQ_VAL_UNKNOWN;
133 	set->lat = opp->clk_latency;
134 	set->dev = dev;
135 }
136 
137 static int
138 cpufreq_dt_get(device_t dev, struct cf_setting *set)
139 {
140 	struct cpufreq_dt_softc *sc;
141 	const struct cpufreq_dt_opp *opp;
142 	uint64_t freq;
143 
144 	sc = device_get_softc(dev);
145 
146 	DEBUG(dev, "cpufreq_dt_get\n");
147 	if (clk_get_freq(sc->clk, &freq) != 0)
148 		return (ENXIO);
149 
150 	opp = cpufreq_dt_find_opp(dev, freq);
151 	if (opp == NULL) {
152 		device_printf(dev, "Can't find the current freq in opp\n");
153 		return (ENOENT);
154 	}
155 
156 	cpufreq_dt_opp_to_setting(dev, opp, set);
157 
158 	DEBUG(dev, "Current freq %dMhz\n", set->freq);
159 	return (0);
160 }
161 
162 static int
163 cpufreq_dt_set(device_t dev, const struct cf_setting *set)
164 {
165 	struct cpufreq_dt_softc *sc;
166 	const struct cpufreq_dt_opp *opp, *copp;
167 	uint64_t freq;
168 	int uvolt, error;
169 
170 	sc = device_get_softc(dev);
171 
172 	if (clk_get_freq(sc->clk, &freq) != 0) {
173 		device_printf(dev, "Can't get current clk freq\n");
174 		return (ENXIO);
175 	}
176 	/* Try to get current valtage by using regulator first. */
177 	error = regulator_get_voltage(sc->reg, &uvolt);
178 	if (error != 0) {
179 		/*
180 		 * Try oppoints table as backup way. However,
181 		 * this is insufficient because the actual processor
182 		 * frequency may not be in the table. PLL frequency
183 		 * granularity can be different that granularity of
184 		 * oppoint table.
185 		 */
186 		copp = cpufreq_dt_find_opp(sc->dev, freq);
187 		if (copp == NULL) {
188 			device_printf(dev,
189 			    "Can't find the current freq in opp\n");
190 			return (ENOENT);
191 		}
192 		uvolt = copp->uvolt_target;
193 
194 	}
195 
196 	opp = cpufreq_dt_find_opp(sc->dev, set->freq * 1000000);
197 	if (opp == NULL) {
198 		device_printf(dev, "Couldn't find an opp for this freq\n");
199 		return (EINVAL);
200 	}
201 	DEBUG(sc->dev, "Current freq %ju, uvolt: %d\n", freq, uvolt);
202 	DEBUG(sc->dev, "Target freq %ju, , uvolt: %d\n",
203 	    opp->freq, opp->uvolt_target);
204 
205 	if (uvolt < opp->uvolt_target) {
206 		DEBUG(dev, "Changing regulator from %u to %u\n",
207 		    uvolt, opp->uvolt_target);
208 		error = regulator_set_voltage(sc->reg,
209 		    opp->uvolt_min,
210 		    opp->uvolt_max);
211 		if (error != 0) {
212 			DEBUG(dev, "Failed, backout\n");
213 			return (ENXIO);
214 		}
215 	}
216 
217 	DEBUG(dev, "Setting clk to %ju\n", opp->freq);
218 	error = clk_set_freq(sc->clk, opp->freq, CLK_SET_ROUND_DOWN);
219 	if (error != 0) {
220 		DEBUG(dev, "Failed, backout\n");
221 		/* Restore previous voltage (best effort) */
222 		error = regulator_set_voltage(sc->reg,
223 		    copp->uvolt_min,
224 		    copp->uvolt_max);
225 		return (ENXIO);
226 	}
227 
228 	if (uvolt > opp->uvolt_target) {
229 		DEBUG(dev, "Changing regulator from %u to %u\n",
230 		    uvolt, opp->uvolt_target);
231 		error = regulator_set_voltage(sc->reg,
232 		    opp->uvolt_min,
233 		    opp->uvolt_max);
234 		if (error != 0) {
235 			DEBUG(dev, "Failed to switch regulator to %d\n",
236 			    opp->uvolt_target);
237 			/* Restore previous CPU frequency (best effort) */
238 			(void)clk_set_freq(sc->clk, copp->freq, 0);
239 			return (ENXIO);
240 		}
241 	}
242 
243 	if (clk_get_freq(sc->clk, &freq) == 0)
244 		cpufreq_dt_notify(dev, freq);
245 
246 	return (0);
247 }
248 
249 
250 static int
251 cpufreq_dt_type(device_t dev, int *type)
252 {
253 	if (type == NULL)
254 		return (EINVAL);
255 
256 	*type = CPUFREQ_TYPE_ABSOLUTE;
257 	return (0);
258 }
259 
260 static int
261 cpufreq_dt_settings(device_t dev, struct cf_setting *sets, int *count)
262 {
263 	struct cpufreq_dt_softc *sc;
264 	ssize_t n;
265 
266 	DEBUG(dev, "cpufreq_dt_settings\n");
267 	if (sets == NULL || count == NULL)
268 		return (EINVAL);
269 
270 	sc = device_get_softc(dev);
271 
272 	if (*count < sc->nopp) {
273 		*count = (int)sc->nopp;
274 		return (E2BIG);
275 	}
276 
277 	for (n = 0; n < sc->nopp; n++)
278 		cpufreq_dt_opp_to_setting(dev, &sc->opp[n], &sets[n]);
279 
280 	*count = (int)sc->nopp;
281 
282 	return (0);
283 }
284 
285 static void
286 cpufreq_dt_identify(driver_t *driver, device_t parent)
287 {
288 	phandle_t node;
289 
290 	/* Properties must be listed under node /cpus/cpu@0 */
291 	node = ofw_bus_get_node(parent);
292 
293 	/* The cpu@0 node must have the following properties */
294 	if (!OF_hasprop(node, "clocks") ||
295 	    (!OF_hasprop(node, "cpu-supply") &&
296 	    !OF_hasprop(node, "cpu0-supply")))
297 		return;
298 
299 	if (!OF_hasprop(node, "operating-points") &&
300 	    !OF_hasprop(node, "operating-points-v2"))
301 		return;
302 
303 	if (device_find_child(parent, "cpufreq_dt", -1) != NULL)
304 		return;
305 
306 	if (BUS_ADD_CHILD(parent, 0, "cpufreq_dt", -1) == NULL)
307 		device_printf(parent, "add cpufreq_dt child failed\n");
308 }
309 
310 static int
311 cpufreq_dt_probe(device_t dev)
312 {
313 	phandle_t node;
314 
315 	node = ofw_bus_get_node(device_get_parent(dev));
316 
317 	if (!OF_hasprop(node, "clocks") ||
318 	    (!OF_hasprop(node, "cpu-supply") &&
319 	    !OF_hasprop(node, "cpu0-supply")))
320 
321 		return (ENXIO);
322 
323 	if (!OF_hasprop(node, "operating-points") &&
324 	  !OF_hasprop(node, "operating-points-v2"))
325 		return (ENXIO);
326 
327 	device_set_desc(dev, "Generic cpufreq driver");
328 	return (BUS_PROBE_GENERIC);
329 }
330 
331 static int
332 cpufreq_dt_oppv1_parse(struct cpufreq_dt_softc *sc, phandle_t node)
333 {
334 	uint32_t *opp, lat;
335 	ssize_t n;
336 
337 	sc->nopp = OF_getencprop_alloc_multi(node, "operating-points",
338 	    sizeof(uint32_t) * 2, (void **)&opp);
339 	if (sc->nopp == -1)
340 		return (ENXIO);
341 
342 	if (OF_getencprop(node, "clock-latency", &lat, sizeof(lat)) == -1)
343 		lat = CPUFREQ_VAL_UNKNOWN;
344 
345 	sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK);
346 
347 	for (n = 0; n < sc->nopp; n++) {
348 		sc->opp[n].freq = opp[n * 2 + 0] * 1000;
349 		sc->opp[n].uvolt_min = opp[n * 2 + 1];
350 		sc->opp[n].uvolt_max = sc->opp[n].uvolt_min;
351 		sc->opp[n].uvolt_target = sc->opp[n].uvolt_min;
352 		sc->opp[n].clk_latency = lat;
353 
354 		if (bootverbose)
355 			device_printf(sc->dev, "%ju.%03ju MHz, %u uV\n",
356 			    sc->opp[n].freq / 1000000,
357 			    sc->opp[n].freq % 1000000,
358 			    sc->opp[n].uvolt_target);
359 	}
360 	free(opp, M_OFWPROP);
361 
362 	return (0);
363 }
364 
365 static int
366 cpufreq_dt_oppv2_parse(struct cpufreq_dt_softc *sc, phandle_t node)
367 {
368 	phandle_t opp, opp_table, opp_xref;
369 	pcell_t cell[2];
370 	uint32_t *volts, lat;
371 	int nvolt, i;
372 
373 	if (OF_getencprop(node, "operating-points-v2", &opp_xref,
374 	    sizeof(opp_xref)) == -1) {
375 		device_printf(sc->dev, "Cannot get xref to oppv2 table\n");
376 		return (ENXIO);
377 	}
378 
379 	opp_table = OF_node_from_xref(opp_xref);
380 	if (opp_table == opp_xref)
381 		return (ENXIO);
382 
383 	if (!OF_hasprop(opp_table, "opp-shared")) {
384 		device_printf(sc->dev, "Only opp-shared is supported\n");
385 		return (ENXIO);
386 	}
387 
388 	for (opp = OF_child(opp_table); opp > 0; opp = OF_peer(opp))
389 		sc->nopp += 1;
390 
391 	sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK);
392 
393 	for (i = 0, opp_table = OF_child(opp_table); opp_table > 0;
394 	     opp_table = OF_peer(opp_table), i++) {
395 		/* opp-hz is a required property */
396 		if (OF_getencprop(opp_table, "opp-hz", cell,
397 		    sizeof(cell)) == -1)
398 			continue;
399 
400 		sc->opp[i].freq = cell[0];
401 		sc->opp[i].freq <<= 32;
402 		sc->opp[i].freq |= cell[1];
403 
404 		if (OF_getencprop(opp_table, "clock-latency", &lat,
405 		    sizeof(lat)) == -1)
406 			sc->opp[i].clk_latency = CPUFREQ_VAL_UNKNOWN;
407 		else
408 			sc->opp[i].clk_latency = (int)lat;
409 
410 		if (OF_hasprop(opp_table, "turbo-mode"))
411 			sc->opp[i].turbo_mode = true;
412 		if (OF_hasprop(opp_table, "opp-suspend"))
413 			sc->opp[i].opp_suspend = true;
414 
415 		nvolt = OF_getencprop_alloc_multi(opp_table, "opp-microvolt",
416 		  sizeof(*volts), (void **)&volts);
417 		if (nvolt == 1) {
418 			sc->opp[i].uvolt_target = volts[0];
419 			sc->opp[i].uvolt_min = volts[0];
420 			sc->opp[i].uvolt_max = volts[0];
421 		} else if (nvolt == 3) {
422 			sc->opp[i].uvolt_target = volts[0];
423 			sc->opp[i].uvolt_min = volts[1];
424 			sc->opp[i].uvolt_max = volts[2];
425 		} else {
426 			device_printf(sc->dev,
427 			    "Wrong count of opp-microvolt property\n");
428 			OF_prop_free(volts);
429 			free(sc->opp, M_DEVBUF);
430 			return (ENXIO);
431 		}
432 		OF_prop_free(volts);
433 
434 		if (bootverbose)
435 			device_printf(sc->dev, "%ju.%03ju Mhz (%u uV)\n",
436 			    sc->opp[i].freq / 1000000,
437 			    sc->opp[i].freq % 1000000,
438 			    sc->opp[i].uvolt_target);
439 	}
440 	return (0);
441 }
442 
443 static int
444 cpufreq_dt_attach(device_t dev)
445 {
446 	struct cpufreq_dt_softc *sc;
447 	phandle_t node;
448 	phandle_t cnode, opp, copp;
449 	int cpu;
450 	uint64_t freq;
451 	int rv = 0;
452 	enum opp_version version;
453 
454 	sc = device_get_softc(dev);
455 	sc->dev = dev;
456 	node = ofw_bus_get_node(device_get_parent(dev));
457 	cpu = device_get_unit(device_get_parent(dev));
458 
459 	if (cpu >= mp_ncpus) {
460 		device_printf(dev, "Not attaching as cpu is not present\n");
461 		return (ENXIO);
462 	}
463 
464 	if (regulator_get_by_ofw_property(dev, node,
465 	    "cpu-supply", &sc->reg) != 0) {
466 		if (regulator_get_by_ofw_property(dev, node,
467 		    "cpu0-supply", &sc->reg) != 0) {
468 			device_printf(dev, "no regulator for %s\n",
469 			    ofw_bus_get_name(device_get_parent(dev)));
470 			return (ENXIO);
471 		}
472 	}
473 
474 	if (clk_get_by_ofw_index(dev, node, 0, &sc->clk) != 0) {
475 		device_printf(dev, "no clock for %s\n",
476 		    ofw_bus_get_name(device_get_parent(dev)));
477 		regulator_release(sc->reg);
478 		return (ENXIO);
479 	}
480 
481 	if (OF_hasprop(node, "operating-points")) {
482 		version = OPP_V1;
483 		rv = cpufreq_dt_oppv1_parse(sc, node);
484 		if (rv != 0) {
485 			device_printf(dev, "Failed to parse opp-v1 table\n");
486 			return (rv);
487 		}
488 		OF_getencprop(node, "operating-points", &opp,
489 		    sizeof(opp));
490 	} else {
491 		version = OPP_V2;
492 		rv = cpufreq_dt_oppv2_parse(sc, node);
493 		if (rv != 0) {
494 			device_printf(dev, "Failed to parse opp-v2 table\n");
495 			return (rv);
496 		}
497 		OF_getencprop(node, "operating-points-v2", &opp,
498 		    sizeof(opp));
499 	}
500 
501 	/*
502 	 * Find all CPUs that share the same opp table
503 	 */
504 	CPU_ZERO(&sc->cpus);
505 	for (cnode = node; cnode > 0; cnode = OF_peer(cnode), cpu++) {
506 		copp = -1;
507 		if (version == OPP_V1)
508 			OF_getencprop(cnode, "operating-points", &copp,
509 			    sizeof(copp));
510 		else if (version == OPP_V2)
511 			OF_getencprop(cnode, "operating-points-v2",
512 			    &copp, sizeof(copp));
513 		if (opp == copp)
514 			CPU_SET(cpu, &sc->cpus);
515 	}
516 
517 	if (clk_get_freq(sc->clk, &freq) == 0)
518 		cpufreq_dt_notify(dev, freq);
519 
520 	cpufreq_register(dev);
521 
522 	return (0);
523 }
524 
525 
526 static device_method_t cpufreq_dt_methods[] = {
527 	/* Device interface */
528 	DEVMETHOD(device_identify,	cpufreq_dt_identify),
529 	DEVMETHOD(device_probe,		cpufreq_dt_probe),
530 	DEVMETHOD(device_attach,	cpufreq_dt_attach),
531 
532 	/* cpufreq interface */
533 	DEVMETHOD(cpufreq_drv_get,	cpufreq_dt_get),
534 	DEVMETHOD(cpufreq_drv_set,	cpufreq_dt_set),
535 	DEVMETHOD(cpufreq_drv_type,	cpufreq_dt_type),
536 	DEVMETHOD(cpufreq_drv_settings,	cpufreq_dt_settings),
537 
538 	DEVMETHOD_END
539 };
540 
541 static driver_t cpufreq_dt_driver = {
542 	"cpufreq_dt",
543 	cpufreq_dt_methods,
544 	sizeof(struct cpufreq_dt_softc),
545 };
546 
547 static devclass_t cpufreq_dt_devclass;
548 
549 DRIVER_MODULE(cpufreq_dt, cpu, cpufreq_dt_driver, cpufreq_dt_devclass, 0, 0);
550 MODULE_VERSION(cpufreq_dt, 1);
551