1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.Org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD$ 27 */ 28 29 /* 30 * Generic DT based cpufreq driver 31 */ 32 33 #include <sys/cdefs.h> 34 __FBSDID("$FreeBSD$"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/bus.h> 39 #include <sys/rman.h> 40 #include <sys/kernel.h> 41 #include <sys/module.h> 42 #include <sys/cpu.h> 43 #include <sys/cpuset.h> 44 #include <sys/smp.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include <dev/extres/clk/clk.h> 50 #include <dev/extres/regulator/regulator.h> 51 52 #include "cpufreq_if.h" 53 54 #if 0 55 #define DPRINTF(dev, msg...) device_printf(dev, "cpufreq_dt: " msg); 56 #else 57 #define DPRINTF(dev, msg...) 58 #endif 59 60 enum opp_version { 61 OPP_V1 = 1, 62 OPP_V2, 63 }; 64 65 struct cpufreq_dt_opp { 66 uint64_t freq; 67 uint32_t uvolt_target; 68 uint32_t uvolt_min; 69 uint32_t uvolt_max; 70 uint32_t uamps; 71 uint32_t clk_latency; 72 bool turbo_mode; 73 bool opp_suspend; 74 }; 75 76 #define CPUFREQ_DT_HAVE_REGULATOR(sc) ((sc)->reg != NULL) 77 78 struct cpufreq_dt_softc { 79 device_t dev; 80 clk_t clk; 81 regulator_t reg; 82 83 struct cpufreq_dt_opp *opp; 84 ssize_t nopp; 85 86 int cpu; 87 cpuset_t cpus; 88 }; 89 90 static void 91 cpufreq_dt_notify(device_t dev, uint64_t freq) 92 { 93 struct cpufreq_dt_softc *sc; 94 struct pcpu *pc; 95 int cpu; 96 97 sc = device_get_softc(dev); 98 99 CPU_FOREACH(cpu) { 100 if (CPU_ISSET(cpu, &sc->cpus)) { 101 pc = pcpu_find(cpu); 102 pc->pc_clock = freq; 103 } 104 } 105 } 106 107 static const struct cpufreq_dt_opp * 108 cpufreq_dt_find_opp(device_t dev, uint64_t freq) 109 { 110 struct cpufreq_dt_softc *sc; 111 ssize_t n; 112 113 sc = device_get_softc(dev); 114 115 DPRINTF(dev, "Looking for freq %ju\n", freq); 116 for (n = 0; n < sc->nopp; n++) 117 if (CPUFREQ_CMP(sc->opp[n].freq, freq)) 118 return (&sc->opp[n]); 119 120 DPRINTF(dev, "Couldn't find one\n"); 121 return (NULL); 122 } 123 124 static void 125 cpufreq_dt_opp_to_setting(device_t dev, const struct cpufreq_dt_opp *opp, 126 struct cf_setting *set) 127 { 128 struct cpufreq_dt_softc *sc; 129 130 sc = device_get_softc(dev); 131 132 memset(set, 0, sizeof(*set)); 133 set->freq = opp->freq / 1000000; 134 set->volts = opp->uvolt_target / 1000; 135 set->power = CPUFREQ_VAL_UNKNOWN; 136 set->lat = opp->clk_latency; 137 set->dev = dev; 138 } 139 140 static int 141 cpufreq_dt_get(device_t dev, struct cf_setting *set) 142 { 143 struct cpufreq_dt_softc *sc; 144 const struct cpufreq_dt_opp *opp; 145 uint64_t freq; 146 147 sc = device_get_softc(dev); 148 149 DPRINTF(dev, "cpufreq_dt_get\n"); 150 if (clk_get_freq(sc->clk, &freq) != 0) 151 return (ENXIO); 152 153 opp = cpufreq_dt_find_opp(dev, freq); 154 if (opp == NULL) { 155 device_printf(dev, "Can't find the current freq in opp\n"); 156 return (ENOENT); 157 } 158 159 cpufreq_dt_opp_to_setting(dev, opp, set); 160 161 DPRINTF(dev, "Current freq %dMhz\n", set->freq); 162 return (0); 163 } 164 165 static int 166 cpufreq_dt_set(device_t dev, const struct cf_setting *set) 167 { 168 struct cpufreq_dt_softc *sc; 169 const struct cpufreq_dt_opp *opp, *copp; 170 uint64_t freq; 171 int uvolt, error; 172 173 sc = device_get_softc(dev); 174 175 DPRINTF(dev, "Working on cpu %d\n", sc->cpu); 176 DPRINTF(dev, "We have %d cpu on this dev\n", CPU_COUNT(&sc->cpus)); 177 if (!CPU_ISSET(sc->cpu, &sc->cpus)) { 178 DPRINTF(dev, "Not for this CPU\n"); 179 return (0); 180 } 181 182 if (clk_get_freq(sc->clk, &freq) != 0) { 183 device_printf(dev, "Can't get current clk freq\n"); 184 return (ENXIO); 185 } 186 187 /* 188 * Only do the regulator work if it's required. 189 */ 190 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) { 191 /* Try to get current valtage by using regulator first. */ 192 error = regulator_get_voltage(sc->reg, &uvolt); 193 if (error != 0) { 194 /* 195 * Try oppoints table as backup way. However, 196 * this is insufficient because the actual processor 197 * frequency may not be in the table. PLL frequency 198 * granularity can be different that granularity of 199 * oppoint table. 200 */ 201 copp = cpufreq_dt_find_opp(sc->dev, freq); 202 if (copp == NULL) { 203 device_printf(dev, 204 "Can't find the current freq in opp\n"); 205 return (ENOENT); 206 } 207 uvolt = copp->uvolt_target; 208 } 209 } else 210 uvolt = 0; 211 212 opp = cpufreq_dt_find_opp(sc->dev, set->freq * 1000000); 213 if (opp == NULL) { 214 device_printf(dev, "Couldn't find an opp for this freq\n"); 215 return (EINVAL); 216 } 217 DPRINTF(sc->dev, "Current freq %ju, uvolt: %d\n", freq, uvolt); 218 DPRINTF(sc->dev, "Target freq %ju, , uvolt: %d\n", 219 opp->freq, opp->uvolt_target); 220 221 if (CPUFREQ_DT_HAVE_REGULATOR(sc) && (uvolt < opp->uvolt_target)) { 222 DPRINTF(dev, "Changing regulator from %u to %u\n", 223 uvolt, opp->uvolt_target); 224 error = regulator_set_voltage(sc->reg, 225 opp->uvolt_min, 226 opp->uvolt_max); 227 if (error != 0) { 228 DPRINTF(dev, "Failed, backout\n"); 229 return (ENXIO); 230 } 231 } 232 233 DPRINTF(dev, "Setting clk to %ju\n", opp->freq); 234 error = clk_set_freq(sc->clk, opp->freq, CLK_SET_ROUND_DOWN); 235 if (error != 0) { 236 DPRINTF(dev, "Failed, backout\n"); 237 /* Restore previous voltage (best effort) */ 238 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) 239 error = regulator_set_voltage(sc->reg, 240 copp->uvolt_min, 241 copp->uvolt_max); 242 return (ENXIO); 243 } 244 245 if (CPUFREQ_DT_HAVE_REGULATOR(sc) && (uvolt > opp->uvolt_target)) { 246 DPRINTF(dev, "Changing regulator from %u to %u\n", 247 uvolt, opp->uvolt_target); 248 error = regulator_set_voltage(sc->reg, 249 opp->uvolt_min, 250 opp->uvolt_max); 251 if (error != 0) { 252 DPRINTF(dev, "Failed to switch regulator to %d\n", 253 opp->uvolt_target); 254 /* Restore previous CPU frequency (best effort) */ 255 (void)clk_set_freq(sc->clk, copp->freq, 0); 256 return (ENXIO); 257 } 258 } 259 260 if (clk_get_freq(sc->clk, &freq) == 0) 261 cpufreq_dt_notify(dev, freq); 262 263 return (0); 264 } 265 266 static int 267 cpufreq_dt_type(device_t dev, int *type) 268 { 269 if (type == NULL) 270 return (EINVAL); 271 272 *type = CPUFREQ_TYPE_ABSOLUTE; 273 return (0); 274 } 275 276 static int 277 cpufreq_dt_settings(device_t dev, struct cf_setting *sets, int *count) 278 { 279 struct cpufreq_dt_softc *sc; 280 ssize_t n; 281 282 DPRINTF(dev, "cpufreq_dt_settings\n"); 283 if (sets == NULL || count == NULL) 284 return (EINVAL); 285 286 sc = device_get_softc(dev); 287 288 if (*count < sc->nopp) { 289 *count = (int)sc->nopp; 290 return (E2BIG); 291 } 292 293 for (n = 0; n < sc->nopp; n++) 294 cpufreq_dt_opp_to_setting(dev, &sc->opp[n], &sets[n]); 295 296 *count = (int)sc->nopp; 297 298 return (0); 299 } 300 301 static void 302 cpufreq_dt_identify(driver_t *driver, device_t parent) 303 { 304 phandle_t node; 305 306 /* Properties must be listed under node /cpus/cpu@0 */ 307 node = ofw_bus_get_node(parent); 308 309 /* The cpu@0 node must have the following properties */ 310 if (!OF_hasprop(node, "clocks")) 311 return; 312 313 if (!OF_hasprop(node, "operating-points") && 314 !OF_hasprop(node, "operating-points-v2")) 315 return; 316 317 if (device_find_child(parent, "cpufreq_dt", -1) != NULL) 318 return; 319 320 if (BUS_ADD_CHILD(parent, 0, "cpufreq_dt", device_get_unit(parent)) 321 == NULL) 322 device_printf(parent, "add cpufreq_dt child failed\n"); 323 } 324 325 static int 326 cpufreq_dt_probe(device_t dev) 327 { 328 phandle_t node; 329 330 node = ofw_bus_get_node(device_get_parent(dev)); 331 332 /* 333 * Note - supply isn't required here for probe; we'll check 334 * it out in more detail during attach. 335 */ 336 if (!OF_hasprop(node, "clocks")) 337 return (ENXIO); 338 339 if (!OF_hasprop(node, "operating-points") && 340 !OF_hasprop(node, "operating-points-v2")) 341 return (ENXIO); 342 343 device_set_desc(dev, "Generic cpufreq driver"); 344 return (BUS_PROBE_GENERIC); 345 } 346 347 static int 348 cpufreq_dt_oppv1_parse(struct cpufreq_dt_softc *sc, phandle_t node) 349 { 350 uint32_t *opp, lat; 351 ssize_t n; 352 353 sc->nopp = OF_getencprop_alloc_multi(node, "operating-points", 354 sizeof(uint32_t) * 2, (void **)&opp); 355 if (sc->nopp == -1) 356 return (ENXIO); 357 358 if (OF_getencprop(node, "clock-latency", &lat, sizeof(lat)) == -1) 359 lat = CPUFREQ_VAL_UNKNOWN; 360 361 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 362 363 for (n = 0; n < sc->nopp; n++) { 364 sc->opp[n].freq = opp[n * 2 + 0] * 1000; 365 sc->opp[n].uvolt_min = opp[n * 2 + 1]; 366 sc->opp[n].uvolt_max = sc->opp[n].uvolt_min; 367 sc->opp[n].uvolt_target = sc->opp[n].uvolt_min; 368 sc->opp[n].clk_latency = lat; 369 370 if (bootverbose) 371 device_printf(sc->dev, "%ju.%03ju MHz, %u uV\n", 372 sc->opp[n].freq / 1000000, 373 sc->opp[n].freq % 1000000, 374 sc->opp[n].uvolt_target); 375 } 376 free(opp, M_OFWPROP); 377 378 return (0); 379 } 380 381 static int 382 cpufreq_dt_oppv2_parse(struct cpufreq_dt_softc *sc, phandle_t node) 383 { 384 phandle_t opp, opp_table, opp_xref; 385 pcell_t cell[2]; 386 uint32_t *volts, lat; 387 int nvolt, i; 388 389 /* 390 * operating-points-v2 does not require the voltage entries 391 * and a regulator. So, it's OK if they're not there. 392 */ 393 if (OF_getencprop(node, "operating-points-v2", &opp_xref, 394 sizeof(opp_xref)) == -1) { 395 device_printf(sc->dev, "Cannot get xref to oppv2 table\n"); 396 return (ENXIO); 397 } 398 399 opp_table = OF_node_from_xref(opp_xref); 400 if (opp_table == opp_xref) 401 return (ENXIO); 402 403 if (!OF_hasprop(opp_table, "opp-shared")) { 404 device_printf(sc->dev, "Only opp-shared is supported\n"); 405 return (ENXIO); 406 } 407 408 for (opp = OF_child(opp_table); opp > 0; opp = OF_peer(opp)) 409 sc->nopp += 1; 410 411 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 412 413 for (i = 0, opp_table = OF_child(opp_table); opp_table > 0; 414 opp_table = OF_peer(opp_table), i++) { 415 /* opp-hz is a required property */ 416 if (OF_getencprop(opp_table, "opp-hz", cell, 417 sizeof(cell)) == -1) 418 continue; 419 420 sc->opp[i].freq = cell[0]; 421 sc->opp[i].freq <<= 32; 422 sc->opp[i].freq |= cell[1]; 423 424 if (OF_getencprop(opp_table, "clock-latency", &lat, 425 sizeof(lat)) == -1) 426 sc->opp[i].clk_latency = CPUFREQ_VAL_UNKNOWN; 427 else 428 sc->opp[i].clk_latency = (int)lat; 429 430 if (OF_hasprop(opp_table, "turbo-mode")) 431 sc->opp[i].turbo_mode = true; 432 if (OF_hasprop(opp_table, "opp-suspend")) 433 sc->opp[i].opp_suspend = true; 434 435 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) { 436 nvolt = OF_getencprop_alloc_multi(opp_table, 437 "opp-microvolt", sizeof(*volts), (void **)&volts); 438 if (nvolt == 1) { 439 sc->opp[i].uvolt_target = volts[0]; 440 sc->opp[i].uvolt_min = volts[0]; 441 sc->opp[i].uvolt_max = volts[0]; 442 } else if (nvolt == 3) { 443 sc->opp[i].uvolt_target = volts[0]; 444 sc->opp[i].uvolt_min = volts[1]; 445 sc->opp[i].uvolt_max = volts[2]; 446 } else { 447 device_printf(sc->dev, 448 "Wrong count of opp-microvolt property\n"); 449 OF_prop_free(volts); 450 free(sc->opp, M_DEVBUF); 451 return (ENXIO); 452 } 453 OF_prop_free(volts); 454 } else { 455 /* No regulator required; don't add anything */ 456 sc->opp[i].uvolt_target = 0; 457 sc->opp[i].uvolt_min = 0; 458 sc->opp[i].uvolt_max = 0; 459 } 460 461 if (bootverbose) 462 device_printf(sc->dev, "%ju.%03ju Mhz (%u uV)\n", 463 sc->opp[i].freq / 1000000, 464 sc->opp[i].freq % 1000000, 465 sc->opp[i].uvolt_target); 466 } 467 return (0); 468 } 469 470 static int 471 cpufreq_dt_attach(device_t dev) 472 { 473 struct cpufreq_dt_softc *sc; 474 phandle_t node; 475 phandle_t cnode, opp, copp; 476 int cpu; 477 uint64_t freq; 478 int rv = 0; 479 char device_type[16]; 480 enum opp_version version; 481 482 sc = device_get_softc(dev); 483 sc->dev = dev; 484 node = ofw_bus_get_node(device_get_parent(dev)); 485 sc->cpu = device_get_unit(device_get_parent(dev)); 486 sc->reg = NULL; 487 488 DPRINTF(dev, "cpu=%d\n", sc->cpu); 489 if (sc->cpu >= mp_ncpus) { 490 device_printf(dev, "Not attaching as cpu is not present\n"); 491 rv = ENXIO; 492 goto error; 493 } 494 495 /* 496 * Cache if we have the regulator supply but don't error out 497 * quite yet. If it's operating-points-v2 then regulator 498 * and voltage entries are optional. 499 */ 500 if (regulator_get_by_ofw_property(dev, node, "cpu-supply", 501 &sc->reg) == 0) 502 device_printf(dev, "Found cpu-supply\n"); 503 else if (regulator_get_by_ofw_property(dev, node, "cpu0-supply", 504 &sc->reg) == 0) 505 device_printf(dev, "Found cpu0-supply\n"); 506 507 /* 508 * Determine which operating mode we're in. Error out if we expect 509 * a regulator but we're not getting it. 510 */ 511 if (OF_hasprop(node, "operating-points")) 512 version = OPP_V1; 513 else if (OF_hasprop(node, "operating-points-v2")) 514 version = OPP_V2; 515 else { 516 device_printf(dev, 517 "didn't find a valid operating-points or v2 node\n"); 518 rv = ENXIO; 519 goto error; 520 } 521 522 /* 523 * Now, we only enforce needing a regulator for v1. 524 */ 525 if ((version == OPP_V1) && !CPUFREQ_DT_HAVE_REGULATOR(sc)) { 526 device_printf(dev, "no regulator for %s\n", 527 ofw_bus_get_name(device_get_parent(dev))); 528 rv = ENXIO; 529 goto error; 530 } 531 532 if (clk_get_by_ofw_index(dev, node, 0, &sc->clk) != 0) { 533 device_printf(dev, "no clock for %s\n", 534 ofw_bus_get_name(device_get_parent(dev))); 535 rv = ENXIO; 536 goto error; 537 } 538 539 if (version == OPP_V1) { 540 rv = cpufreq_dt_oppv1_parse(sc, node); 541 if (rv != 0) { 542 device_printf(dev, "Failed to parse opp-v1 table\n"); 543 goto error; 544 } 545 OF_getencprop(node, "operating-points", &opp, 546 sizeof(opp)); 547 } else if (version == OPP_V2) { 548 rv = cpufreq_dt_oppv2_parse(sc, node); 549 if (rv != 0) { 550 device_printf(dev, "Failed to parse opp-v2 table\n"); 551 goto error; 552 } 553 OF_getencprop(node, "operating-points-v2", &opp, 554 sizeof(opp)); 555 } else { 556 device_printf(dev, "operating points version is incorrect\n"); 557 goto error; 558 } 559 560 /* 561 * Find all CPUs that share the same opp table 562 */ 563 CPU_ZERO(&sc->cpus); 564 cnode = OF_parent(node); 565 for (cpu = 0, cnode = OF_child(cnode); cnode > 0; cnode = OF_peer(cnode)) { 566 if (OF_getprop(cnode, "device_type", device_type, sizeof(device_type)) <= 0) 567 continue; 568 if (strcmp(device_type, "cpu") != 0) 569 continue; 570 if (cpu == sc->cpu) { 571 DPRINTF(dev, "Skipping our cpu\n"); 572 CPU_SET(cpu, &sc->cpus); 573 cpu++; 574 continue; 575 } 576 DPRINTF(dev, "Testing CPU %d\n", cpu); 577 copp = -1; 578 if (version == OPP_V1) 579 OF_getencprop(cnode, "operating-points", &copp, 580 sizeof(copp)); 581 else if (version == OPP_V2) 582 OF_getencprop(cnode, "operating-points-v2", 583 &copp, sizeof(copp)); 584 if (opp == copp) { 585 DPRINTF(dev, "CPU %d is using the same opp as this one (%d)\n", 586 cpu, sc->cpu); 587 CPU_SET(cpu, &sc->cpus); 588 } 589 cpu++; 590 } 591 592 if (clk_get_freq(sc->clk, &freq) == 0) 593 cpufreq_dt_notify(dev, freq); 594 595 cpufreq_register(dev); 596 597 return (0); 598 error: 599 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) 600 regulator_release(sc->reg); 601 return (rv); 602 } 603 604 static device_method_t cpufreq_dt_methods[] = { 605 /* Device interface */ 606 DEVMETHOD(device_identify, cpufreq_dt_identify), 607 DEVMETHOD(device_probe, cpufreq_dt_probe), 608 DEVMETHOD(device_attach, cpufreq_dt_attach), 609 610 /* cpufreq interface */ 611 DEVMETHOD(cpufreq_drv_get, cpufreq_dt_get), 612 DEVMETHOD(cpufreq_drv_set, cpufreq_dt_set), 613 DEVMETHOD(cpufreq_drv_type, cpufreq_dt_type), 614 DEVMETHOD(cpufreq_drv_settings, cpufreq_dt_settings), 615 616 DEVMETHOD_END 617 }; 618 619 static driver_t cpufreq_dt_driver = { 620 "cpufreq_dt", 621 cpufreq_dt_methods, 622 sizeof(struct cpufreq_dt_softc), 623 }; 624 625 static devclass_t cpufreq_dt_devclass; 626 627 DRIVER_MODULE(cpufreq_dt, cpu, cpufreq_dt_driver, cpufreq_dt_devclass, 0, 0); 628 MODULE_VERSION(cpufreq_dt, 1); 629