1 /*- 2 * Copyright (c) 2018 Emmanuel Vadot <manu@FreeBSD.Org> 3 * Copyright (c) 2016 Jared McNeill <jmcneill@invisible.ca> 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 19 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 20 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 21 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * Generic DT based cpufreq driver 29 */ 30 31 #include <sys/cdefs.h> 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/bus.h> 35 #include <sys/rman.h> 36 #include <sys/kernel.h> 37 #include <sys/module.h> 38 #include <sys/cpu.h> 39 #include <sys/cpuset.h> 40 #include <sys/smp.h> 41 42 #include <dev/ofw/ofw_bus.h> 43 #include <dev/ofw/ofw_bus_subr.h> 44 45 #include <dev/extres/clk/clk.h> 46 #include <dev/extres/regulator/regulator.h> 47 48 #include "cpufreq_if.h" 49 50 #if 0 51 #define DPRINTF(dev, msg...) device_printf(dev, "cpufreq_dt: " msg); 52 #else 53 #define DPRINTF(dev, msg...) 54 #endif 55 56 enum opp_version { 57 OPP_V1 = 1, 58 OPP_V2, 59 }; 60 61 struct cpufreq_dt_opp { 62 uint64_t freq; 63 uint32_t uvolt_target; 64 uint32_t uvolt_min; 65 uint32_t uvolt_max; 66 uint32_t uamps; 67 uint32_t clk_latency; 68 bool turbo_mode; 69 bool opp_suspend; 70 }; 71 72 #define CPUFREQ_DT_HAVE_REGULATOR(sc) ((sc)->reg != NULL) 73 74 struct cpufreq_dt_softc { 75 device_t dev; 76 clk_t clk; 77 regulator_t reg; 78 79 struct cpufreq_dt_opp *opp; 80 ssize_t nopp; 81 82 int cpu; 83 cpuset_t cpus; 84 }; 85 86 static void 87 cpufreq_dt_notify(device_t dev, uint64_t freq) 88 { 89 struct cpufreq_dt_softc *sc; 90 struct pcpu *pc; 91 int cpu; 92 93 sc = device_get_softc(dev); 94 95 CPU_FOREACH(cpu) { 96 if (CPU_ISSET(cpu, &sc->cpus)) { 97 pc = pcpu_find(cpu); 98 pc->pc_clock = freq; 99 } 100 } 101 } 102 103 static const struct cpufreq_dt_opp * 104 cpufreq_dt_find_opp(device_t dev, uint64_t freq) 105 { 106 struct cpufreq_dt_softc *sc; 107 ssize_t n; 108 109 sc = device_get_softc(dev); 110 111 DPRINTF(dev, "Looking for freq %ju\n", freq); 112 for (n = 0; n < sc->nopp; n++) 113 if (CPUFREQ_CMP(sc->opp[n].freq, freq)) 114 return (&sc->opp[n]); 115 116 DPRINTF(dev, "Couldn't find one\n"); 117 return (NULL); 118 } 119 120 static void 121 cpufreq_dt_opp_to_setting(device_t dev, const struct cpufreq_dt_opp *opp, 122 struct cf_setting *set) 123 { 124 125 memset(set, 0, sizeof(*set)); 126 set->freq = opp->freq / 1000000; 127 set->volts = opp->uvolt_target / 1000; 128 set->power = CPUFREQ_VAL_UNKNOWN; 129 set->lat = opp->clk_latency; 130 set->dev = dev; 131 } 132 133 static int 134 cpufreq_dt_get(device_t dev, struct cf_setting *set) 135 { 136 struct cpufreq_dt_softc *sc; 137 const struct cpufreq_dt_opp *opp; 138 uint64_t freq; 139 140 sc = device_get_softc(dev); 141 142 DPRINTF(dev, "cpufreq_dt_get\n"); 143 if (clk_get_freq(sc->clk, &freq) != 0) 144 return (ENXIO); 145 146 opp = cpufreq_dt_find_opp(dev, freq); 147 if (opp == NULL) { 148 device_printf(dev, "Can't find the current freq in opp\n"); 149 return (ENOENT); 150 } 151 152 cpufreq_dt_opp_to_setting(dev, opp, set); 153 154 DPRINTF(dev, "Current freq %dMhz\n", set->freq); 155 return (0); 156 } 157 158 static int 159 cpufreq_dt_set(device_t dev, const struct cf_setting *set) 160 { 161 struct cpufreq_dt_softc *sc; 162 const struct cpufreq_dt_opp *opp, *copp; 163 uint64_t freq; 164 int uvolt, error; 165 166 sc = device_get_softc(dev); 167 168 DPRINTF(dev, "Working on cpu %d\n", sc->cpu); 169 DPRINTF(dev, "We have %d cpu on this dev\n", CPU_COUNT(&sc->cpus)); 170 if (!CPU_ISSET(sc->cpu, &sc->cpus)) { 171 DPRINTF(dev, "Not for this CPU\n"); 172 return (0); 173 } 174 175 if (clk_get_freq(sc->clk, &freq) != 0) { 176 device_printf(dev, "Can't get current clk freq\n"); 177 return (ENXIO); 178 } 179 180 /* 181 * Only do the regulator work if it's required. 182 */ 183 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) { 184 /* Try to get current valtage by using regulator first. */ 185 error = regulator_get_voltage(sc->reg, &uvolt); 186 if (error != 0) { 187 /* 188 * Try oppoints table as backup way. However, 189 * this is insufficient because the actual processor 190 * frequency may not be in the table. PLL frequency 191 * granularity can be different that granularity of 192 * oppoint table. 193 */ 194 copp = cpufreq_dt_find_opp(sc->dev, freq); 195 if (copp == NULL) { 196 device_printf(dev, 197 "Can't find the current freq in opp\n"); 198 return (ENOENT); 199 } 200 uvolt = copp->uvolt_target; 201 } 202 } else 203 uvolt = 0; 204 205 opp = cpufreq_dt_find_opp(sc->dev, set->freq * 1000000); 206 if (opp == NULL) { 207 device_printf(dev, "Couldn't find an opp for this freq\n"); 208 return (EINVAL); 209 } 210 DPRINTF(sc->dev, "Current freq %ju, uvolt: %d\n", freq, uvolt); 211 DPRINTF(sc->dev, "Target freq %ju, , uvolt: %d\n", 212 opp->freq, opp->uvolt_target); 213 214 if (CPUFREQ_DT_HAVE_REGULATOR(sc) && (uvolt < opp->uvolt_target)) { 215 DPRINTF(dev, "Changing regulator from %u to %u\n", 216 uvolt, opp->uvolt_target); 217 error = regulator_set_voltage(sc->reg, 218 opp->uvolt_min, 219 opp->uvolt_max); 220 if (error != 0) { 221 DPRINTF(dev, "Failed, backout\n"); 222 return (ENXIO); 223 } 224 } 225 226 DPRINTF(dev, "Setting clk to %ju\n", opp->freq); 227 error = clk_set_freq(sc->clk, opp->freq, CLK_SET_ROUND_DOWN); 228 if (error != 0) { 229 DPRINTF(dev, "Failed, backout\n"); 230 /* Restore previous voltage (best effort) */ 231 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) 232 error = regulator_set_voltage(sc->reg, 233 copp->uvolt_min, 234 copp->uvolt_max); 235 return (ENXIO); 236 } 237 238 if (CPUFREQ_DT_HAVE_REGULATOR(sc) && (uvolt > opp->uvolt_target)) { 239 DPRINTF(dev, "Changing regulator from %u to %u\n", 240 uvolt, opp->uvolt_target); 241 error = regulator_set_voltage(sc->reg, 242 opp->uvolt_min, 243 opp->uvolt_max); 244 if (error != 0) { 245 DPRINTF(dev, "Failed to switch regulator to %d\n", 246 opp->uvolt_target); 247 /* Restore previous CPU frequency (best effort) */ 248 (void)clk_set_freq(sc->clk, copp->freq, 0); 249 return (ENXIO); 250 } 251 } 252 253 if (clk_get_freq(sc->clk, &freq) == 0) 254 cpufreq_dt_notify(dev, freq); 255 256 return (0); 257 } 258 259 static int 260 cpufreq_dt_type(device_t dev, int *type) 261 { 262 if (type == NULL) 263 return (EINVAL); 264 265 *type = CPUFREQ_TYPE_ABSOLUTE; 266 return (0); 267 } 268 269 static int 270 cpufreq_dt_settings(device_t dev, struct cf_setting *sets, int *count) 271 { 272 struct cpufreq_dt_softc *sc; 273 ssize_t n; 274 275 DPRINTF(dev, "cpufreq_dt_settings\n"); 276 if (sets == NULL || count == NULL) 277 return (EINVAL); 278 279 sc = device_get_softc(dev); 280 281 if (*count < sc->nopp) { 282 *count = (int)sc->nopp; 283 return (E2BIG); 284 } 285 286 for (n = 0; n < sc->nopp; n++) 287 cpufreq_dt_opp_to_setting(dev, &sc->opp[n], &sets[n]); 288 289 *count = (int)sc->nopp; 290 291 return (0); 292 } 293 294 static void 295 cpufreq_dt_identify(driver_t *driver, device_t parent) 296 { 297 phandle_t node; 298 299 /* Properties must be listed under node /cpus/cpu@0 */ 300 node = ofw_bus_get_node(parent); 301 302 /* The cpu@0 node must have the following properties */ 303 if (!OF_hasprop(node, "clocks")) 304 return; 305 306 if (!OF_hasprop(node, "operating-points") && 307 !OF_hasprop(node, "operating-points-v2")) 308 return; 309 310 if (device_find_child(parent, "cpufreq_dt", -1) != NULL) 311 return; 312 313 if (BUS_ADD_CHILD(parent, 0, "cpufreq_dt", device_get_unit(parent)) 314 == NULL) 315 device_printf(parent, "add cpufreq_dt child failed\n"); 316 } 317 318 static int 319 cpufreq_dt_probe(device_t dev) 320 { 321 phandle_t node; 322 323 node = ofw_bus_get_node(device_get_parent(dev)); 324 325 /* 326 * Note - supply isn't required here for probe; we'll check 327 * it out in more detail during attach. 328 */ 329 if (!OF_hasprop(node, "clocks")) 330 return (ENXIO); 331 332 if (!OF_hasprop(node, "operating-points") && 333 !OF_hasprop(node, "operating-points-v2")) 334 return (ENXIO); 335 336 device_set_desc(dev, "Generic cpufreq driver"); 337 return (BUS_PROBE_GENERIC); 338 } 339 340 static int 341 cpufreq_dt_oppv1_parse(struct cpufreq_dt_softc *sc, phandle_t node) 342 { 343 uint32_t *opp, lat; 344 ssize_t n; 345 346 sc->nopp = OF_getencprop_alloc_multi(node, "operating-points", 347 sizeof(uint32_t) * 2, (void **)&opp); 348 if (sc->nopp == -1) 349 return (ENXIO); 350 351 if (OF_getencprop(node, "clock-latency", &lat, sizeof(lat)) == -1) 352 lat = CPUFREQ_VAL_UNKNOWN; 353 354 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 355 356 for (n = 0; n < sc->nopp; n++) { 357 sc->opp[n].freq = opp[n * 2 + 0] * 1000; 358 sc->opp[n].uvolt_min = opp[n * 2 + 1]; 359 sc->opp[n].uvolt_max = sc->opp[n].uvolt_min; 360 sc->opp[n].uvolt_target = sc->opp[n].uvolt_min; 361 sc->opp[n].clk_latency = lat; 362 363 if (bootverbose) 364 device_printf(sc->dev, "%ju.%03ju MHz, %u uV\n", 365 sc->opp[n].freq / 1000000, 366 sc->opp[n].freq % 1000000, 367 sc->opp[n].uvolt_target); 368 } 369 free(opp, M_OFWPROP); 370 371 return (0); 372 } 373 374 static int 375 cpufreq_dt_oppv2_parse(struct cpufreq_dt_softc *sc, phandle_t node) 376 { 377 phandle_t opp, opp_table, opp_xref; 378 pcell_t cell[2]; 379 uint32_t *volts, lat; 380 int nvolt, i; 381 382 /* 383 * operating-points-v2 does not require the voltage entries 384 * and a regulator. So, it's OK if they're not there. 385 */ 386 if (OF_getencprop(node, "operating-points-v2", &opp_xref, 387 sizeof(opp_xref)) == -1) { 388 device_printf(sc->dev, "Cannot get xref to oppv2 table\n"); 389 return (ENXIO); 390 } 391 392 opp_table = OF_node_from_xref(opp_xref); 393 if (opp_table == opp_xref) 394 return (ENXIO); 395 396 if (!OF_hasprop(opp_table, "opp-shared")) { 397 device_printf(sc->dev, "Only opp-shared is supported\n"); 398 return (ENXIO); 399 } 400 401 for (opp = OF_child(opp_table); opp > 0; opp = OF_peer(opp)) 402 sc->nopp += 1; 403 404 sc->opp = malloc(sizeof(*sc->opp) * sc->nopp, M_DEVBUF, M_WAITOK); 405 406 for (i = 0, opp_table = OF_child(opp_table); opp_table > 0; 407 opp_table = OF_peer(opp_table), i++) { 408 /* opp-hz is a required property */ 409 if (OF_getencprop(opp_table, "opp-hz", cell, 410 sizeof(cell)) == -1) 411 continue; 412 413 sc->opp[i].freq = cell[0]; 414 sc->opp[i].freq <<= 32; 415 sc->opp[i].freq |= cell[1]; 416 417 if (OF_getencprop(opp_table, "clock-latency", &lat, 418 sizeof(lat)) == -1) 419 sc->opp[i].clk_latency = CPUFREQ_VAL_UNKNOWN; 420 else 421 sc->opp[i].clk_latency = (int)lat; 422 423 if (OF_hasprop(opp_table, "turbo-mode")) 424 sc->opp[i].turbo_mode = true; 425 if (OF_hasprop(opp_table, "opp-suspend")) 426 sc->opp[i].opp_suspend = true; 427 428 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) { 429 nvolt = OF_getencprop_alloc_multi(opp_table, 430 "opp-microvolt", sizeof(*volts), (void **)&volts); 431 if (nvolt == 1) { 432 sc->opp[i].uvolt_target = volts[0]; 433 sc->opp[i].uvolt_min = volts[0]; 434 sc->opp[i].uvolt_max = volts[0]; 435 } else if (nvolt == 3) { 436 sc->opp[i].uvolt_target = volts[0]; 437 sc->opp[i].uvolt_min = volts[1]; 438 sc->opp[i].uvolt_max = volts[2]; 439 } else { 440 device_printf(sc->dev, 441 "Wrong count of opp-microvolt property\n"); 442 OF_prop_free(volts); 443 free(sc->opp, M_DEVBUF); 444 return (ENXIO); 445 } 446 OF_prop_free(volts); 447 } else { 448 /* No regulator required; don't add anything */ 449 sc->opp[i].uvolt_target = 0; 450 sc->opp[i].uvolt_min = 0; 451 sc->opp[i].uvolt_max = 0; 452 } 453 454 if (bootverbose) 455 device_printf(sc->dev, "%ju.%03ju Mhz (%u uV)\n", 456 sc->opp[i].freq / 1000000, 457 sc->opp[i].freq % 1000000, 458 sc->opp[i].uvolt_target); 459 } 460 return (0); 461 } 462 463 static int 464 cpufreq_dt_attach(device_t dev) 465 { 466 struct cpufreq_dt_softc *sc; 467 phandle_t node; 468 phandle_t cnode, opp, copp; 469 int cpu; 470 uint64_t freq; 471 int rv = 0; 472 char device_type[16]; 473 enum opp_version version; 474 475 sc = device_get_softc(dev); 476 sc->dev = dev; 477 node = ofw_bus_get_node(device_get_parent(dev)); 478 sc->cpu = device_get_unit(device_get_parent(dev)); 479 sc->reg = NULL; 480 481 DPRINTF(dev, "cpu=%d\n", sc->cpu); 482 if (sc->cpu >= mp_ncpus) { 483 device_printf(dev, "Not attaching as cpu is not present\n"); 484 rv = ENXIO; 485 goto error; 486 } 487 488 /* 489 * Cache if we have the regulator supply but don't error out 490 * quite yet. If it's operating-points-v2 then regulator 491 * and voltage entries are optional. 492 */ 493 if (regulator_get_by_ofw_property(dev, node, "cpu-supply", 494 &sc->reg) == 0) 495 device_printf(dev, "Found cpu-supply\n"); 496 else if (regulator_get_by_ofw_property(dev, node, "cpu0-supply", 497 &sc->reg) == 0) 498 device_printf(dev, "Found cpu0-supply\n"); 499 500 /* 501 * Determine which operating mode we're in. Error out if we expect 502 * a regulator but we're not getting it. 503 */ 504 if (OF_hasprop(node, "operating-points")) 505 version = OPP_V1; 506 else if (OF_hasprop(node, "operating-points-v2")) 507 version = OPP_V2; 508 else { 509 device_printf(dev, 510 "didn't find a valid operating-points or v2 node\n"); 511 rv = ENXIO; 512 goto error; 513 } 514 515 /* 516 * Now, we only enforce needing a regulator for v1. 517 */ 518 if ((version == OPP_V1) && !CPUFREQ_DT_HAVE_REGULATOR(sc)) { 519 device_printf(dev, "no regulator for %s\n", 520 ofw_bus_get_name(device_get_parent(dev))); 521 rv = ENXIO; 522 goto error; 523 } 524 525 if (clk_get_by_ofw_index(dev, node, 0, &sc->clk) != 0) { 526 device_printf(dev, "no clock for %s\n", 527 ofw_bus_get_name(device_get_parent(dev))); 528 rv = ENXIO; 529 goto error; 530 } 531 532 if (version == OPP_V1) { 533 rv = cpufreq_dt_oppv1_parse(sc, node); 534 if (rv != 0) { 535 device_printf(dev, "Failed to parse opp-v1 table\n"); 536 goto error; 537 } 538 OF_getencprop(node, "operating-points", &opp, 539 sizeof(opp)); 540 } else if (version == OPP_V2) { 541 rv = cpufreq_dt_oppv2_parse(sc, node); 542 if (rv != 0) { 543 device_printf(dev, "Failed to parse opp-v2 table\n"); 544 goto error; 545 } 546 OF_getencprop(node, "operating-points-v2", &opp, 547 sizeof(opp)); 548 } else { 549 device_printf(dev, "operating points version is incorrect\n"); 550 goto error; 551 } 552 553 /* 554 * Find all CPUs that share the same opp table 555 */ 556 CPU_ZERO(&sc->cpus); 557 cnode = OF_parent(node); 558 for (cpu = 0, cnode = OF_child(cnode); cnode > 0; cnode = OF_peer(cnode)) { 559 if (OF_getprop(cnode, "device_type", device_type, sizeof(device_type)) <= 0) 560 continue; 561 if (strcmp(device_type, "cpu") != 0) 562 continue; 563 if (cpu == sc->cpu) { 564 DPRINTF(dev, "Skipping our cpu\n"); 565 CPU_SET(cpu, &sc->cpus); 566 cpu++; 567 continue; 568 } 569 DPRINTF(dev, "Testing CPU %d\n", cpu); 570 copp = -1; 571 if (version == OPP_V1) 572 OF_getencprop(cnode, "operating-points", &copp, 573 sizeof(copp)); 574 else if (version == OPP_V2) 575 OF_getencprop(cnode, "operating-points-v2", 576 &copp, sizeof(copp)); 577 if (opp == copp) { 578 DPRINTF(dev, "CPU %d is using the same opp as this one (%d)\n", 579 cpu, sc->cpu); 580 CPU_SET(cpu, &sc->cpus); 581 } 582 cpu++; 583 } 584 585 if (clk_get_freq(sc->clk, &freq) == 0) 586 cpufreq_dt_notify(dev, freq); 587 588 cpufreq_register(dev); 589 590 return (0); 591 error: 592 if (CPUFREQ_DT_HAVE_REGULATOR(sc)) 593 regulator_release(sc->reg); 594 return (rv); 595 } 596 597 static device_method_t cpufreq_dt_methods[] = { 598 /* Device interface */ 599 DEVMETHOD(device_identify, cpufreq_dt_identify), 600 DEVMETHOD(device_probe, cpufreq_dt_probe), 601 DEVMETHOD(device_attach, cpufreq_dt_attach), 602 603 /* cpufreq interface */ 604 DEVMETHOD(cpufreq_drv_get, cpufreq_dt_get), 605 DEVMETHOD(cpufreq_drv_set, cpufreq_dt_set), 606 DEVMETHOD(cpufreq_drv_type, cpufreq_dt_type), 607 DEVMETHOD(cpufreq_drv_settings, cpufreq_dt_settings), 608 609 DEVMETHOD_END 610 }; 611 612 static driver_t cpufreq_dt_driver = { 613 "cpufreq_dt", 614 cpufreq_dt_methods, 615 sizeof(struct cpufreq_dt_softc), 616 }; 617 618 DRIVER_MODULE(cpufreq_dt, cpu, cpufreq_dt_driver, 0, 0); 619 MODULE_VERSION(cpufreq_dt, 1); 620