1 /*- 2 * Copyright (c) 2006-2008 Stanislav Sedov <stas@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/conf.h> 34 #include <sys/fcntl.h> 35 #include <sys/ioccom.h> 36 #include <sys/malloc.h> 37 #include <sys/module.h> 38 #include <sys/mutex.h> 39 #include <sys/priv.h> 40 #include <sys/proc.h> 41 #include <sys/queue.h> 42 #include <sys/sched.h> 43 #include <sys/kernel.h> 44 #include <sys/sysctl.h> 45 #include <sys/uio.h> 46 #include <sys/pcpu.h> 47 #include <sys/smp.h> 48 #include <sys/pmckern.h> 49 #include <sys/cpuctl.h> 50 51 #include <machine/cpufunc.h> 52 #include <machine/md_var.h> 53 #include <machine/specialreg.h> 54 55 static d_open_t cpuctl_open; 56 static d_ioctl_t cpuctl_ioctl; 57 58 #define CPUCTL_VERSION 1 59 60 #ifdef DEBUG 61 # define DPRINTF(format,...) printf(format, __VA_ARGS__); 62 #else 63 # define DPRINTF(...) 64 #endif 65 66 #define UCODE_SIZE_MAX (32 * 1024) 67 68 static int cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, 69 struct thread *td); 70 static void cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, 71 struct thread *td); 72 static void cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data, 73 struct thread *td); 74 static int cpuctl_do_update(int cpu, cpuctl_update_args_t *data, 75 struct thread *td); 76 static int update_intel(int cpu, cpuctl_update_args_t *args, 77 struct thread *td); 78 static int update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td); 79 static int update_via(int cpu, cpuctl_update_args_t *args, 80 struct thread *td); 81 82 static struct cdev **cpuctl_devs; 83 static MALLOC_DEFINE(M_CPUCTL, "cpuctl", "CPUCTL buffer"); 84 85 static struct cdevsw cpuctl_cdevsw = { 86 .d_version = D_VERSION, 87 .d_open = cpuctl_open, 88 .d_ioctl = cpuctl_ioctl, 89 .d_name = "cpuctl", 90 }; 91 92 /* 93 * This function checks if specified cpu enabled or not. 94 */ 95 static int 96 cpu_enabled(int cpu) 97 { 98 99 return (pmc_cpu_is_disabled(cpu) == 0); 100 } 101 102 /* 103 * Check if the current thread is bound to a specific cpu. 104 */ 105 static int 106 cpu_sched_is_bound(struct thread *td) 107 { 108 int ret; 109 110 thread_lock(td); 111 ret = sched_is_bound(td); 112 thread_unlock(td); 113 return (ret); 114 } 115 116 /* 117 * Switch to target cpu to run. 118 */ 119 static void 120 set_cpu(int cpu, struct thread *td) 121 { 122 123 KASSERT(cpu >= 0 && cpu < mp_ncpus && cpu_enabled(cpu), 124 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 125 thread_lock(td); 126 sched_bind(td, cpu); 127 thread_unlock(td); 128 KASSERT(td->td_oncpu == cpu, 129 ("[cpuctl,%d]: cannot bind to target cpu %d", __LINE__, cpu)); 130 } 131 132 static void 133 restore_cpu(int oldcpu, int is_bound, struct thread *td) 134 { 135 136 KASSERT(oldcpu >= 0 && oldcpu < mp_ncpus && cpu_enabled(oldcpu), 137 ("[cpuctl,%d]: bad cpu number %d", __LINE__, oldcpu)); 138 thread_lock(td); 139 if (is_bound == 0) 140 sched_unbind(td); 141 else 142 sched_bind(td, oldcpu); 143 thread_unlock(td); 144 } 145 146 int 147 cpuctl_ioctl(struct cdev *dev, u_long cmd, caddr_t data, 148 int flags, struct thread *td) 149 { 150 int ret; 151 int cpu = dev2unit(dev); 152 153 if (cpu >= mp_ncpus || !cpu_enabled(cpu)) { 154 DPRINTF("[cpuctl,%d]: bad cpu number %d\n", __LINE__, cpu); 155 return (ENXIO); 156 } 157 /* Require write flag for "write" requests. */ 158 if ((cmd == CPUCTL_WRMSR || cmd == CPUCTL_UPDATE) && 159 ((flags & FWRITE) == 0)) 160 return (EPERM); 161 switch (cmd) { 162 case CPUCTL_RDMSR: 163 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td); 164 break; 165 case CPUCTL_MSRSBIT: 166 case CPUCTL_MSRCBIT: 167 case CPUCTL_WRMSR: 168 ret = priv_check(td, PRIV_CPUCTL_WRMSR); 169 if (ret != 0) 170 goto fail; 171 ret = cpuctl_do_msr(cpu, (cpuctl_msr_args_t *)data, cmd, td); 172 break; 173 case CPUCTL_CPUID: 174 cpuctl_do_cpuid(cpu, (cpuctl_cpuid_args_t *)data, td); 175 ret = 0; 176 break; 177 case CPUCTL_UPDATE: 178 ret = priv_check(td, PRIV_CPUCTL_UPDATE); 179 if (ret != 0) 180 goto fail; 181 ret = cpuctl_do_update(cpu, (cpuctl_update_args_t *)data, td); 182 break; 183 case CPUCTL_CPUID_COUNT: 184 cpuctl_do_cpuid_count(cpu, (cpuctl_cpuid_count_args_t *)data, 185 td); 186 ret = 0; 187 break; 188 default: 189 ret = EINVAL; 190 break; 191 } 192 fail: 193 return (ret); 194 } 195 196 /* 197 * Actually perform cpuid operation. 198 */ 199 static void 200 cpuctl_do_cpuid_count(int cpu, cpuctl_cpuid_count_args_t *data, 201 struct thread *td) 202 { 203 int is_bound = 0; 204 int oldcpu; 205 206 KASSERT(cpu >= 0 && cpu < mp_ncpus, 207 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 208 209 /* Explicitly clear cpuid data to avoid returning stale info. */ 210 bzero(data->data, sizeof(data->data)); 211 DPRINTF("[cpuctl,%d]: retrieving cpuid lev %#0x type %#0x for %d cpu\n", 212 __LINE__, data->level, data->level_type, cpu); 213 oldcpu = td->td_oncpu; 214 is_bound = cpu_sched_is_bound(td); 215 set_cpu(cpu, td); 216 cpuid_count(data->level, data->level_type, data->data); 217 restore_cpu(oldcpu, is_bound, td); 218 } 219 220 static void 221 cpuctl_do_cpuid(int cpu, cpuctl_cpuid_args_t *data, struct thread *td) 222 { 223 cpuctl_cpuid_count_args_t cdata; 224 225 cdata.level = data->level; 226 /* Override the level type. */ 227 cdata.level_type = 0; 228 cpuctl_do_cpuid_count(cpu, &cdata, td); 229 bcopy(cdata.data, data->data, sizeof(data->data)); /* Ignore error */ 230 } 231 232 /* 233 * Actually perform MSR operations. 234 */ 235 static int 236 cpuctl_do_msr(int cpu, cpuctl_msr_args_t *data, u_long cmd, struct thread *td) 237 { 238 uint64_t reg; 239 int is_bound = 0; 240 int oldcpu; 241 int ret; 242 243 KASSERT(cpu >= 0 && cpu < mp_ncpus, 244 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 245 246 /* 247 * Explicitly clear cpuid data to avoid returning stale 248 * info 249 */ 250 DPRINTF("[cpuctl,%d]: operating on MSR %#0x for %d cpu\n", __LINE__, 251 data->msr, cpu); 252 oldcpu = td->td_oncpu; 253 is_bound = cpu_sched_is_bound(td); 254 set_cpu(cpu, td); 255 if (cmd == CPUCTL_RDMSR) { 256 data->data = 0; 257 ret = rdmsr_safe(data->msr, &data->data); 258 } else if (cmd == CPUCTL_WRMSR) { 259 ret = wrmsr_safe(data->msr, data->data); 260 } else if (cmd == CPUCTL_MSRSBIT) { 261 critical_enter(); 262 ret = rdmsr_safe(data->msr, ®); 263 if (ret == 0) 264 ret = wrmsr_safe(data->msr, reg | data->data); 265 critical_exit(); 266 } else if (cmd == CPUCTL_MSRCBIT) { 267 critical_enter(); 268 ret = rdmsr_safe(data->msr, ®); 269 if (ret == 0) 270 ret = wrmsr_safe(data->msr, reg & ~data->data); 271 critical_exit(); 272 } else 273 panic("[cpuctl,%d]: unknown operation requested: %lu", __LINE__, cmd); 274 restore_cpu(oldcpu, is_bound, td); 275 return (ret); 276 } 277 278 /* 279 * Actually perform microcode update. 280 */ 281 static int 282 cpuctl_do_update(int cpu, cpuctl_update_args_t *data, struct thread *td) 283 { 284 cpuctl_cpuid_args_t args = { 285 .level = 0, 286 }; 287 char vendor[13]; 288 int ret; 289 290 KASSERT(cpu >= 0 && cpu < mp_ncpus, 291 ("[cpuctl,%d]: bad cpu number %d", __LINE__, cpu)); 292 DPRINTF("[cpuctl,%d]: XXX %d", __LINE__, cpu); 293 294 cpuctl_do_cpuid(cpu, &args, td); 295 ((uint32_t *)vendor)[0] = args.data[1]; 296 ((uint32_t *)vendor)[1] = args.data[3]; 297 ((uint32_t *)vendor)[2] = args.data[2]; 298 vendor[12] = '\0'; 299 if (strncmp(vendor, INTEL_VENDOR_ID, sizeof(INTEL_VENDOR_ID)) == 0) 300 ret = update_intel(cpu, data, td); 301 else if(strncmp(vendor, AMD_VENDOR_ID, sizeof(AMD_VENDOR_ID)) == 0) 302 ret = update_amd(cpu, data, td); 303 else if(strncmp(vendor, CENTAUR_VENDOR_ID, sizeof(CENTAUR_VENDOR_ID)) == 0) 304 ret = update_via(cpu, data, td); 305 else 306 ret = ENXIO; 307 return (ret); 308 } 309 310 static int 311 update_intel(int cpu, cpuctl_update_args_t *args, struct thread *td) 312 { 313 void *ptr; 314 uint64_t rev0, rev1; 315 uint32_t tmp[4]; 316 int is_bound; 317 int oldcpu; 318 int ret; 319 320 if (args->size == 0 || args->data == NULL) { 321 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 322 return (EINVAL); 323 } 324 if (args->size > UCODE_SIZE_MAX) { 325 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 326 return (EINVAL); 327 } 328 329 /* 330 * 16 byte alignment required. Rely on the fact that 331 * malloc(9) always returns the pointer aligned at least on 332 * the size of the allocation. 333 */ 334 ptr = malloc(args->size + 16, M_CPUCTL, M_WAITOK); 335 if (copyin(args->data, ptr, args->size) != 0) { 336 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 337 __LINE__, args->data, ptr, args->size); 338 ret = EFAULT; 339 goto fail; 340 } 341 oldcpu = td->td_oncpu; 342 is_bound = cpu_sched_is_bound(td); 343 set_cpu(cpu, td); 344 critical_enter(); 345 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 346 347 /* 348 * Perform update. 349 */ 350 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 351 wrmsr_safe(MSR_BIOS_SIGN, 0); 352 353 /* 354 * Serialize instruction flow. 355 */ 356 do_cpuid(0, tmp); 357 critical_exit(); 358 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 359 restore_cpu(oldcpu, is_bound, td); 360 if (rev1 > rev0) 361 ret = 0; 362 else 363 ret = EEXIST; 364 fail: 365 free(ptr, M_CPUCTL); 366 return (ret); 367 } 368 369 static int 370 update_amd(int cpu, cpuctl_update_args_t *args, struct thread *td) 371 { 372 void *ptr = NULL; 373 uint32_t tmp[4]; 374 int is_bound = 0; 375 int oldcpu; 376 int ret; 377 378 if (args->size == 0 || args->data == NULL) { 379 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 380 return (EINVAL); 381 } 382 if (args->size > UCODE_SIZE_MAX) { 383 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 384 return (EINVAL); 385 } 386 /* 387 * XXX Might not require contignous address space - needs check 388 */ 389 ptr = contigmalloc(args->size, M_CPUCTL, 0, 0, 0xffffffff, 16, 0); 390 if (ptr == NULL) { 391 DPRINTF("[cpuctl,%d]: cannot allocate %zd bytes of memory", 392 __LINE__, args->size); 393 return (ENOMEM); 394 } 395 if (copyin(args->data, ptr, args->size) != 0) { 396 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 397 __LINE__, args->data, ptr, args->size); 398 ret = EFAULT; 399 goto fail; 400 } 401 oldcpu = td->td_oncpu; 402 is_bound = cpu_sched_is_bound(td); 403 set_cpu(cpu, td); 404 critical_enter(); 405 406 /* 407 * Perform update. 408 */ 409 wrmsr_safe(MSR_K8_UCODE_UPDATE, (uintptr_t)ptr); 410 411 /* 412 * Serialize instruction flow. 413 */ 414 do_cpuid(0, tmp); 415 critical_exit(); 416 restore_cpu(oldcpu, is_bound, td); 417 ret = 0; 418 fail: 419 if (ptr != NULL) 420 contigfree(ptr, args->size, M_CPUCTL); 421 return (ret); 422 } 423 424 static int 425 update_via(int cpu, cpuctl_update_args_t *args, struct thread *td) 426 { 427 void *ptr; 428 uint64_t rev0, rev1, res; 429 uint32_t tmp[4]; 430 int is_bound; 431 int oldcpu; 432 int ret; 433 434 if (args->size == 0 || args->data == NULL) { 435 DPRINTF("[cpuctl,%d]: zero-sized firmware image", __LINE__); 436 return (EINVAL); 437 } 438 if (args->size > UCODE_SIZE_MAX) { 439 DPRINTF("[cpuctl,%d]: firmware image too large", __LINE__); 440 return (EINVAL); 441 } 442 443 /* 444 * 4 byte alignment required. 445 */ 446 ptr = malloc(args->size, M_CPUCTL, M_WAITOK); 447 if (copyin(args->data, ptr, args->size) != 0) { 448 DPRINTF("[cpuctl,%d]: copyin %p->%p of %zd bytes failed", 449 __LINE__, args->data, ptr, args->size); 450 ret = EFAULT; 451 goto fail; 452 } 453 oldcpu = td->td_oncpu; 454 is_bound = cpu_sched_is_bound(td); 455 set_cpu(cpu, td); 456 critical_enter(); 457 rdmsr_safe(MSR_BIOS_SIGN, &rev0); /* Get current microcode revision. */ 458 459 /* 460 * Perform update. 461 */ 462 wrmsr_safe(MSR_BIOS_UPDT_TRIG, (uintptr_t)(ptr)); 463 do_cpuid(1, tmp); 464 465 /* 466 * Result are in low byte of MSR FCR5: 467 * 0x00: No update has been attempted since RESET. 468 * 0x01: The last attempted update was successful. 469 * 0x02: The last attempted update was unsuccessful due to a bad 470 * environment. No update was loaded and any preexisting 471 * patches are still active. 472 * 0x03: The last attempted update was not applicable to this processor. 473 * No update was loaded and any preexisting patches are still 474 * active. 475 * 0x04: The last attempted update was not successful due to an invalid 476 * update data block. No update was loaded and any preexisting 477 * patches are still active 478 */ 479 rdmsr_safe(0x1205, &res); 480 res &= 0xff; 481 critical_exit(); 482 rdmsr_safe(MSR_BIOS_SIGN, &rev1); /* Get new microcode revision. */ 483 restore_cpu(oldcpu, is_bound, td); 484 485 DPRINTF("[cpu,%d]: rev0=%x rev1=%x res=%x\n", __LINE__, 486 (unsigned)(rev0 >> 32), (unsigned)(rev1 >> 32), (unsigned)res); 487 488 if (res != 0x01) 489 ret = EINVAL; 490 else 491 ret = 0; 492 fail: 493 free(ptr, M_CPUCTL); 494 return (ret); 495 } 496 497 int 498 cpuctl_open(struct cdev *dev, int flags, int fmt __unused, struct thread *td) 499 { 500 int ret = 0; 501 int cpu; 502 503 cpu = dev2unit(dev); 504 if (cpu >= mp_ncpus || !cpu_enabled(cpu)) { 505 DPRINTF("[cpuctl,%d]: incorrect cpu number %d\n", __LINE__, 506 cpu); 507 return (ENXIO); 508 } 509 if (flags & FWRITE) 510 ret = securelevel_gt(td->td_ucred, 0); 511 return (ret); 512 } 513 514 static int 515 cpuctl_modevent(module_t mod __unused, int type, void *data __unused) 516 { 517 int cpu; 518 519 switch(type) { 520 case MOD_LOAD: 521 if ((cpu_feature & CPUID_MSR) == 0) { 522 if (bootverbose) 523 printf("cpuctl: not available.\n"); 524 return (ENODEV); 525 } 526 if (bootverbose) 527 printf("cpuctl: access to MSR registers/cpuid info.\n"); 528 cpuctl_devs = malloc(sizeof(*cpuctl_devs) * mp_ncpus, M_CPUCTL, 529 M_WAITOK | M_ZERO); 530 for (cpu = 0; cpu < mp_ncpus; cpu++) 531 if (cpu_enabled(cpu)) 532 cpuctl_devs[cpu] = make_dev(&cpuctl_cdevsw, cpu, 533 UID_ROOT, GID_KMEM, 0640, "cpuctl%d", cpu); 534 break; 535 case MOD_UNLOAD: 536 for (cpu = 0; cpu < mp_ncpus; cpu++) { 537 if (cpuctl_devs[cpu] != NULL) 538 destroy_dev(cpuctl_devs[cpu]); 539 } 540 free(cpuctl_devs, M_CPUCTL); 541 break; 542 case MOD_SHUTDOWN: 543 break; 544 default: 545 return (EOPNOTSUPP); 546 } 547 return (0); 548 } 549 550 DEV_MODULE(cpuctl, cpuctl_modevent, NULL); 551 MODULE_VERSION(cpuctl, CPUCTL_VERSION); 552