1 /* 2 * Copyright (c) 2000,2001 Jonathan Chen. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions, and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in 13 * the documentation and/or other materials provided with the 14 * distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 20 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 * 28 * $FreeBSD$ 29 */ 30 31 /* 32 * Cardbus Bus Driver 33 * 34 * much of the bus code was stolen directly from sys/pci/pci.c 35 * (Copyright (c) 1997, Stefan Esser <se@freebsd.org>) 36 * 37 * Written by Jonathan Chen <jon@freebsd.org> 38 */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/malloc.h> 43 #include <sys/kernel.h> 44 #include <sys/sysctl.h> 45 46 #include <sys/bus.h> 47 #include <machine/bus.h> 48 #include <sys/rman.h> 49 #include <machine/resource.h> 50 51 #include <sys/pciio.h> 52 #include <dev/pci/pcivar.h> 53 #include <dev/pci/pcireg.h> 54 55 #include <dev/cardbus/cardbusreg.h> 56 #include <dev/cardbus/cardbusvar.h> 57 #include <dev/cardbus/cardbus_cis.h> 58 #include <dev/pccard/pccardvar.h> 59 60 #include "power_if.h" 61 #include "pcib_if.h" 62 63 /* sysctl vars */ 64 SYSCTL_NODE(_hw, OID_AUTO, cardbus, CTLFLAG_RD, 0, "CardBus parameters"); 65 66 int cardbus_debug = 0; 67 TUNABLE_INT("hw.cardbus.debug", &cardbus_debug); 68 SYSCTL_INT(_hw_cardbus, OID_AUTO, debug, CTLFLAG_RW, 69 &cardbus_debug, 0, 70 "CardBus debug"); 71 72 int cardbus_cis_debug = 0; 73 TUNABLE_INT("hw.cardbus.cis_debug", &cardbus_cis_debug); 74 SYSCTL_INT(_hw_cardbus, OID_AUTO, cis_debug, CTLFLAG_RW, 75 &cardbus_cis_debug, 0, 76 "CardBus CIS debug"); 77 78 #define DPRINTF(a) if (cardbus_debug) printf a 79 #define DEVPRINTF(x) if (cardbus_debug) device_printf x 80 81 82 static struct resource *cardbus_alloc_resource(device_t cbdev, device_t child, 83 int type, int *rid, u_long start, u_long end, u_long count, 84 u_int flags); 85 static int cardbus_attach(device_t cbdev); 86 static int cardbus_attach_card(device_t cbdev); 87 static int cardbus_child_location_str(device_t cbdev, device_t child, 88 char *, size_t len); 89 static int cardbus_child_pnpinfo_str(device_t cbdev, device_t child, 90 char *, size_t len); 91 static __inline void cardbus_clear_command_bit(device_t cbdev, device_t child, 92 u_int16_t bit); 93 static void cardbus_delete_resource(device_t cbdev, device_t child, 94 int type, int rid); 95 static void cardbus_delete_resource_method(device_t cbdev, device_t child, 96 int type, int rid); 97 static int cardbus_detach(device_t cbdev); 98 static int cardbus_detach_card(device_t cbdev, int flags); 99 static void cardbus_device_setup_regs(device_t brdev, int b, int s, int f, 100 pcicfgregs *cfg); 101 static void cardbus_disable_busmaster_method(device_t cbdev, device_t child); 102 static void cardbus_disable_io_method(device_t cbdev, device_t child, 103 int space); 104 static void cardbus_driver_added(device_t cbdev, driver_t *driver); 105 static void cardbus_enable_busmaster_method(device_t cbdev, device_t child); 106 static void cardbus_enable_io_method(device_t cbdev, device_t child, 107 int space); 108 static int cardbus_freecfg(struct cardbus_devinfo *dinfo); 109 static int cardbus_get_powerstate_method(device_t cbdev, device_t child); 110 static int cardbus_get_resource(device_t cbdev, device_t child, int type, 111 int rid, u_long *startp, u_long *countp); 112 static int cardbus_get_resource_method(device_t cbdev, device_t child, 113 int type, int rid, u_long *startp, u_long *countp); 114 static void cardbus_hdrtypedata(device_t brdev, int b, int s, int f, 115 pcicfgregs *cfg); 116 static int cardbus_print_child(device_t cbdev, device_t child); 117 static int cardbus_print_resources(struct resource_list *rl, 118 const char *name, int type, const char *format); 119 static void cardbus_print_verbose(struct cardbus_devinfo *dinfo); 120 static int cardbus_probe(device_t cbdev); 121 static void cardbus_probe_nomatch(device_t cbdev, device_t child); 122 static struct cardbus_devinfo *cardbus_read_device(device_t brdev, int b, 123 int s, int f); 124 static void cardbus_read_extcap(device_t cbdev, pcicfgregs *cfg); 125 static u_int32_t cardbus_read_config_method(device_t cbdev, 126 device_t child, int reg, int width); 127 static int cardbus_read_ivar(device_t cbdev, device_t child, int which, 128 u_long *result); 129 static void cardbus_release_all_resources(device_t cbdev, 130 struct cardbus_devinfo *dinfo); 131 static int cardbus_release_resource(device_t cbdev, device_t child, 132 int type, int rid, struct resource *r); 133 static __inline void cardbus_set_command_bit(device_t cbdev, device_t child, 134 u_int16_t bit); 135 static int cardbus_set_powerstate_method(device_t cbdev, device_t child, 136 int state); 137 static int cardbus_set_resource(device_t cbdev, device_t child, int type, 138 int rid, u_long start, u_long count, struct resource *res); 139 static int cardbus_set_resource_method(device_t cbdev, device_t child, 140 int type, int rid, u_long start, u_long count); 141 static int cardbus_setup_intr(device_t cbdev, device_t child, 142 struct resource *irq, int flags, driver_intr_t *intr, 143 void *arg, void **cookiep); 144 static int cardbus_teardown_intr(device_t cbdev, device_t child, 145 struct resource *irq, void *cookie); 146 static void cardbus_write_config_method(device_t cbdev, device_t child, 147 int reg, u_int32_t val, int width); 148 static int cardbus_write_ivar(device_t cbdev, device_t child, int which, 149 uintptr_t value); 150 151 /************************************************************************/ 152 /* Probe/Attach */ 153 /************************************************************************/ 154 155 static int 156 cardbus_probe(device_t cbdev) 157 { 158 device_set_desc(cbdev, "CardBus bus"); 159 return 0; 160 } 161 162 static int 163 cardbus_attach(device_t cbdev) 164 { 165 return 0; 166 } 167 168 static int 169 cardbus_detach(device_t cbdev) 170 { 171 cardbus_detach_card(cbdev, DETACH_FORCE); 172 return 0; 173 } 174 175 static int 176 cardbus_suspend(device_t self) 177 { 178 cardbus_detach_card(self, DETACH_FORCE); 179 return (0); 180 } 181 182 static int 183 cardbus_resume(device_t self) 184 { 185 return (0); 186 } 187 188 /************************************************************************/ 189 /* Attach/Detach card */ 190 /************************************************************************/ 191 192 static void 193 cardbus_device_setup_regs(device_t brdev, int b, int s, int f, pcicfgregs *cfg) 194 { 195 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_INTLINE, 196 pci_get_irq(device_get_parent(brdev)), 1); 197 cfg->intline = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_INTLINE, 1); 198 199 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_CACHELNSZ, 0x08, 1); 200 cfg->cachelnsz = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_CACHELNSZ, 1); 201 202 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_LATTIMER, 0xa8, 1); 203 cfg->lattimer = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_LATTIMER, 1); 204 205 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_MINGNT, 0x14, 1); 206 cfg->mingnt = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_MINGNT, 1); 207 208 PCIB_WRITE_CONFIG(brdev, b, s, f, PCIR_MAXLAT, 0x14, 1); 209 cfg->maxlat = PCIB_READ_CONFIG(brdev, b, s, f, PCIR_MAXLAT, 1); 210 } 211 212 #define DETACH_NOWARN 0x800 213 214 static int 215 cardbus_attach_card(device_t cbdev) 216 { 217 device_t brdev = device_get_parent(cbdev); 218 int cardattached = 0; 219 static int curr_bus_number = 2; /* XXX EVILE BAD (see below) */ 220 int bus, slot, func; 221 222 cardbus_detach_card(cbdev, DETACH_NOWARN); /* detach existing cards */ 223 224 POWER_ENABLE_SOCKET(brdev, cbdev); 225 bus = pcib_get_bus(cbdev); 226 if (bus == 0) { 227 /* 228 * XXX EVILE BAD XXX 229 * Not all BIOSes initialize the secondary bus number properly, 230 * so if the default is bad, we just put one in and hope it 231 * works. 232 */ 233 bus = curr_bus_number; 234 pci_write_config(brdev, PCIR_SECBUS_2, curr_bus_number, 1); 235 pci_write_config(brdev, PCIR_SUBBUS_2, curr_bus_number + 2, 1); 236 curr_bus_number += 3; 237 } 238 /* For each function, set it up and try to attach a driver to it */ 239 for (slot = 0; slot <= CARDBUS_SLOTMAX; slot++) { 240 int cardbusfunchigh = 0; 241 for (func = 0; func <= cardbusfunchigh; func++) { 242 struct cardbus_devinfo *dinfo = 243 cardbus_read_device(brdev, bus, slot, func); 244 245 if (dinfo == NULL) 246 continue; 247 if (dinfo->pci.cfg.mfdev) 248 cardbusfunchigh = CARDBUS_FUNCMAX; 249 cardbus_device_setup_regs(brdev, bus, slot, func, 250 &dinfo->pci.cfg); 251 cardbus_print_verbose(dinfo); 252 dinfo->pci.cfg.dev = device_add_child(cbdev, NULL, -1); 253 if (!dinfo->pci.cfg.dev) { 254 DEVPRINTF((cbdev, "Cannot add child!\n")); 255 cardbus_freecfg(dinfo); 256 continue; 257 } 258 resource_list_init(&dinfo->pci.resources); 259 device_set_ivars(dinfo->pci.cfg.dev, dinfo); 260 cardbus_do_cis(cbdev, dinfo->pci.cfg.dev); 261 if (device_probe_and_attach(dinfo->pci.cfg.dev) != 0) { 262 /* when fail, release all resources */ 263 cardbus_release_all_resources(cbdev, dinfo); 264 } else 265 cardattached++; 266 } 267 } 268 269 if (cardattached > 0) 270 return 0; 271 POWER_DISABLE_SOCKET(brdev, cbdev); 272 return ENOENT; 273 } 274 275 static int 276 cardbus_detach_card(device_t cbdev, int flags) 277 { 278 int numdevs; 279 device_t *devlist; 280 int tmp; 281 int err = 0; 282 283 device_get_children(cbdev, &devlist, &numdevs); 284 285 if (numdevs == 0) { 286 if (!(flags & DETACH_NOWARN)) { 287 DEVPRINTF((cbdev, "detach_card: no card to detach!\n")); 288 POWER_DISABLE_SOCKET(device_get_parent(cbdev), cbdev); 289 } 290 free(devlist, M_TEMP); 291 return ENOENT; 292 } 293 294 for (tmp = 0; tmp < numdevs; tmp++) { 295 struct cardbus_devinfo *dinfo = device_get_ivars(devlist[tmp]); 296 int status = device_get_state(devlist[tmp]); 297 298 if (status == DS_ATTACHED || status == DS_BUSY) { 299 if (device_detach(dinfo->pci.cfg.dev) == 0 || 300 flags & DETACH_FORCE) { 301 cardbus_release_all_resources(cbdev, dinfo); 302 device_delete_child(cbdev, devlist[tmp]); 303 } else { 304 err++; 305 } 306 cardbus_freecfg(dinfo); 307 } else { 308 cardbus_release_all_resources(cbdev, dinfo); 309 device_delete_child(cbdev, devlist[tmp]); 310 cardbus_freecfg(dinfo); 311 } 312 } 313 if (err == 0) 314 POWER_DISABLE_SOCKET(device_get_parent(cbdev), cbdev); 315 free(devlist, M_TEMP); 316 return err; 317 } 318 319 static void 320 cardbus_driver_added(device_t cbdev, driver_t *driver) 321 { 322 /* XXX check if 16-bit or cardbus! */ 323 int numdevs; 324 device_t *devlist; 325 int tmp; 326 327 device_get_children(cbdev, &devlist, &numdevs); 328 329 DEVICE_IDENTIFY(driver, cbdev); 330 for (tmp = 0; tmp < numdevs; tmp++) { 331 if (device_get_state(devlist[tmp]) == DS_NOTPRESENT) { 332 struct cardbus_devinfo *dinfo; 333 dinfo = device_get_ivars(devlist[tmp]); 334 cardbus_release_all_resources(cbdev, dinfo); 335 resource_list_init(&dinfo->pci.resources); 336 cardbus_do_cis(cbdev, dinfo->pci.cfg.dev); 337 if (device_probe_and_attach(dinfo->pci.cfg.dev) != 0) { 338 cardbus_release_all_resources(cbdev, dinfo); 339 } 340 } 341 } 342 343 free(devlist, M_TEMP); 344 } 345 346 /************************************************************************/ 347 /* PCI-Like config reading (copied from pci.c */ 348 /************************************************************************/ 349 350 /* read configuration header into pcicfgrect structure */ 351 352 static void 353 cardbus_read_extcap(device_t cbdev, pcicfgregs *cfg) 354 { 355 #define REG(n, w) PCIB_READ_CONFIG(cbdev, cfg->bus, cfg->slot, cfg->func, n, w) 356 int ptr, nextptr, ptrptr; 357 358 switch (cfg->hdrtype) { 359 case 0: 360 ptrptr = 0x34; 361 break; 362 case 2: 363 ptrptr = 0x14; 364 break; 365 default: 366 return; /* no extended capabilities support */ 367 } 368 nextptr = REG(ptrptr, 1); /* sanity check? */ 369 370 /* 371 * Read capability entries. 372 */ 373 while (nextptr != 0) { 374 /* Sanity check */ 375 if (nextptr > 255) { 376 printf("illegal PCI extended capability offset %d\n", 377 nextptr); 378 return; 379 } 380 /* Find the next entry */ 381 ptr = nextptr; 382 nextptr = REG(ptr + 1, 1); 383 384 /* Process this entry */ 385 switch (REG(ptr, 1)) { 386 case 0x01: /* PCI power management */ 387 if (cfg->pp_cap == 0) { 388 cfg->pp_cap = REG(ptr + PCIR_POWER_CAP, 2); 389 cfg->pp_status = ptr + PCIR_POWER_STATUS; 390 cfg->pp_pmcsr = ptr + PCIR_POWER_PMCSR; 391 if ((nextptr - ptr) > PCIR_POWER_DATA) 392 cfg->pp_data = ptr + PCIR_POWER_DATA; 393 } 394 break; 395 default: 396 break; 397 } 398 } 399 #undef REG 400 } 401 402 /* extract header type specific config data */ 403 404 static void 405 cardbus_hdrtypedata(device_t brdev, int b, int s, int f, pcicfgregs *cfg) 406 { 407 #define REG(n, w) PCIB_READ_CONFIG(brdev, b, s, f, n, w) 408 switch (cfg->hdrtype) { 409 case 0: 410 cfg->subvendor = REG(PCIR_SUBVEND_0, 2); 411 cfg->subdevice = REG(PCIR_SUBDEV_0, 2); 412 cfg->nummaps = PCI_MAXMAPS_0; 413 break; 414 case 1: 415 cfg->subvendor = REG(PCIR_SUBVEND_1, 2); 416 cfg->subdevice = REG(PCIR_SUBDEV_1, 2); 417 cfg->nummaps = PCI_MAXMAPS_1; 418 break; 419 case 2: 420 cfg->subvendor = REG(PCIR_SUBVEND_2, 2); 421 cfg->subdevice = REG(PCIR_SUBDEV_2, 2); 422 cfg->nummaps = PCI_MAXMAPS_2; 423 break; 424 } 425 #undef REG 426 } 427 428 static struct cardbus_devinfo * 429 cardbus_read_device(device_t brdev, int b, int s, int f) 430 { 431 #define REG(n, w) PCIB_READ_CONFIG(brdev, b, s, f, n, w) 432 pcicfgregs *cfg = NULL; 433 struct cardbus_devinfo *devlist_entry = NULL; 434 435 if (REG(PCIR_DEVVENDOR, 4) != -1) { 436 devlist_entry = malloc(sizeof(struct cardbus_devinfo), 437 M_DEVBUF, M_WAITOK | M_ZERO); 438 if (devlist_entry == NULL) 439 return (NULL); 440 441 cfg = &devlist_entry->pci.cfg; 442 443 cfg->bus = b; 444 cfg->slot = s; 445 cfg->func = f; 446 cfg->vendor = REG(PCIR_VENDOR, 2); 447 cfg->device = REG(PCIR_DEVICE, 2); 448 cfg->cmdreg = REG(PCIR_COMMAND, 2); 449 cfg->statreg = REG(PCIR_STATUS, 2); 450 cfg->baseclass = REG(PCIR_CLASS, 1); 451 cfg->subclass = REG(PCIR_SUBCLASS, 1); 452 cfg->progif = REG(PCIR_PROGIF, 1); 453 cfg->revid = REG(PCIR_REVID, 1); 454 cfg->hdrtype = REG(PCIR_HEADERTYPE, 1); 455 cfg->cachelnsz = REG(PCIR_CACHELNSZ, 1); 456 cfg->lattimer = REG(PCIR_LATTIMER, 1); 457 cfg->intpin = REG(PCIR_INTPIN, 1); 458 cfg->intline = REG(PCIR_INTLINE, 1); 459 460 cfg->mingnt = REG(PCIR_MINGNT, 1); 461 cfg->maxlat = REG(PCIR_MAXLAT, 1); 462 463 cfg->mfdev = (cfg->hdrtype & PCIM_MFDEV) != 0; 464 cfg->hdrtype &= ~PCIM_MFDEV; 465 466 cardbus_hdrtypedata(brdev, b, s, f, cfg); 467 468 if (REG(PCIR_STATUS, 2) & PCIM_STATUS_CAPPRESENT) 469 cardbus_read_extcap(brdev, cfg); 470 471 devlist_entry->pci.conf.pc_sel.pc_bus = cfg->bus; 472 devlist_entry->pci.conf.pc_sel.pc_dev = cfg->slot; 473 devlist_entry->pci.conf.pc_sel.pc_func = cfg->func; 474 devlist_entry->pci.conf.pc_hdr = cfg->hdrtype; 475 476 devlist_entry->pci.conf.pc_subvendor = cfg->subvendor; 477 devlist_entry->pci.conf.pc_subdevice = cfg->subdevice; 478 devlist_entry->pci.conf.pc_vendor = cfg->vendor; 479 devlist_entry->pci.conf.pc_device = cfg->device; 480 481 devlist_entry->pci.conf.pc_class = cfg->baseclass; 482 devlist_entry->pci.conf.pc_subclass = cfg->subclass; 483 devlist_entry->pci.conf.pc_progif = cfg->progif; 484 devlist_entry->pci.conf.pc_revid = cfg->revid; 485 } 486 return (devlist_entry); 487 #undef REG 488 } 489 490 /* free pcicfgregs structure and all depending data structures */ 491 492 static int 493 cardbus_freecfg(struct cardbus_devinfo *dinfo) 494 { 495 free(dinfo, M_DEVBUF); 496 497 return (0); 498 } 499 500 static void 501 cardbus_print_verbose(struct cardbus_devinfo *dinfo) 502 { 503 #ifndef CARDBUS_DEBUG 504 if (bootverbose) 505 #endif /* CARDBUS_DEBUG */ 506 { 507 pcicfgregs *cfg = &dinfo->pci.cfg; 508 509 printf("found->\tvendor=0x%04x, dev=0x%04x, revid=0x%02x\n", 510 cfg->vendor, cfg->device, cfg->revid); 511 printf("\tclass=%02x-%02x-%02x, hdrtype=0x%02x, mfdev=%d\n", 512 cfg->baseclass, cfg->subclass, cfg->progif, 513 cfg->hdrtype, cfg->mfdev); 514 #ifdef CARDBUS_DEBUG 515 printf("\tcmdreg=0x%04x, statreg=0x%04x, " 516 "cachelnsz=%d (dwords)\n", 517 cfg->cmdreg, cfg->statreg, cfg->cachelnsz); 518 printf("\tlattimer=0x%02x (%d ns), mingnt=0x%02x (%d ns), " 519 "maxlat=0x%02x (%d ns)\n", 520 cfg->lattimer, cfg->lattimer * 30, 521 cfg->mingnt, cfg->mingnt * 250, cfg->maxlat, 522 cfg->maxlat * 250); 523 #endif /* CARDBUS_DEBUG */ 524 if (cfg->intpin > 0) 525 printf("\tintpin=%c, irq=%d\n", 526 cfg->intpin + 'a' - 1, cfg->intline); 527 } 528 } 529 530 /************************************************************************/ 531 /* Resources */ 532 /************************************************************************/ 533 534 static int 535 cardbus_set_resource(device_t cbdev, device_t child, int type, int rid, 536 u_long start, u_long count, struct resource *res) 537 { 538 struct cardbus_devinfo *dinfo; 539 struct resource_list *rl; 540 struct resource_list_entry *rle; 541 542 if (device_get_parent(child) != cbdev) 543 return ENOENT; 544 545 dinfo = device_get_ivars(child); 546 rl = &dinfo->pci.resources; 547 rle = resource_list_find(rl, type, rid); 548 if (rle == NULL) { 549 resource_list_add(rl, type, rid, start, start + count - 1, 550 count); 551 if (res != NULL) { 552 rle = resource_list_find(rl, type, rid); 553 rle->res = res; 554 } 555 } else { 556 if (rle->res == NULL) { 557 } else if (rle->res->r_dev == cbdev && 558 (!(rman_get_flags(rle->res) & RF_ACTIVE))) { 559 int f; 560 f = rman_get_flags(rle->res); 561 bus_release_resource(cbdev, type, rid, res); 562 rle->res = bus_alloc_resource(cbdev, type, &rid, 563 start, start + count - 1, 564 count, f); 565 } else { 566 device_printf(cbdev, "set_resource: resource busy\n"); 567 return EBUSY; 568 } 569 rle->start = start; 570 rle->end = start + count - 1; 571 rle->count = count; 572 if (res != NULL) 573 rle->res = res; 574 } 575 if (device_get_parent(child) == cbdev) 576 pci_write_config(child, rid, start, 4); 577 return 0; 578 } 579 580 static int 581 cardbus_get_resource(device_t cbdev, device_t child, int type, int rid, 582 u_long *startp, u_long *countp) 583 { 584 struct cardbus_devinfo *dinfo; 585 struct resource_list *rl; 586 struct resource_list_entry *rle; 587 588 if (device_get_parent(child) != cbdev) 589 return ENOENT; 590 591 dinfo = device_get_ivars(child); 592 rl = &dinfo->pci.resources; 593 rle = resource_list_find(rl, type, rid); 594 if (!rle) 595 return ENOENT; 596 if (startp) 597 *startp = rle->start; 598 if (countp) 599 *countp = rle->count; 600 return 0; 601 } 602 603 static void 604 cardbus_delete_resource(device_t cbdev, device_t child, int type, int rid) 605 { 606 struct cardbus_devinfo *dinfo; 607 struct resource_list *rl; 608 struct resource_list_entry *rle; 609 610 if (device_get_parent(child) != cbdev) 611 return; 612 613 dinfo = device_get_ivars(child); 614 rl = &dinfo->pci.resources; 615 rle = resource_list_find(rl, type, rid); 616 if (rle) { 617 if (rle->res) { 618 if (rle->res->r_dev != cbdev || 619 rman_get_flags(rle->res) & RF_ACTIVE) { 620 device_printf(cbdev, "delete_resource: " 621 "Resource still owned by child, oops. " 622 "(type=%d, rid=%d, addr=%lx)\n", 623 rle->type, rle->rid, 624 rman_get_start(rle->res)); 625 return; 626 } 627 bus_release_resource(cbdev, type, rid, rle->res); 628 } 629 resource_list_delete(rl, type, rid); 630 } 631 if (device_get_parent(child) == cbdev) 632 pci_write_config(child, rid, 0, 4); 633 } 634 635 static int 636 cardbus_set_resource_method(device_t cbdev, device_t child, int type, int rid, 637 u_long start, u_long count) 638 { 639 int ret; 640 ret = cardbus_set_resource(cbdev, child, type, rid, start, count, NULL); 641 if (ret != 0) 642 return ret; 643 return BUS_SET_RESOURCE(device_get_parent(cbdev), child, type, rid, 644 start, count); 645 } 646 647 static int 648 cardbus_get_resource_method(device_t cbdev, device_t child, int type, int rid, 649 u_long *startp, u_long *countp) 650 { 651 int ret; 652 ret = cardbus_get_resource(cbdev, child, type, rid, startp, countp); 653 if (ret != 0) 654 return ret; 655 return BUS_GET_RESOURCE(device_get_parent(cbdev), child, type, rid, 656 startp, countp); 657 } 658 659 static void 660 cardbus_delete_resource_method(device_t cbdev, device_t child, 661 int type, int rid) 662 { 663 cardbus_delete_resource(cbdev, child, type, rid); 664 BUS_DELETE_RESOURCE(device_get_parent(cbdev), child, type, rid); 665 } 666 667 static void 668 cardbus_release_all_resources(device_t cbdev, struct cardbus_devinfo *dinfo) 669 { 670 struct resource_list_entry *rle; 671 672 /* Free all allocated resources */ 673 SLIST_FOREACH(rle, &dinfo->pci.resources, link) { 674 if (rle->res) { 675 if (rle->res->r_dev != cbdev) 676 device_printf(cbdev, "release_all_resource: " 677 "Resource still owned by child, oops. " 678 "(type=%d, rid=%d, addr=%lx)\n", 679 rle->type, rle->rid, 680 rman_get_start(rle->res)); 681 BUS_RELEASE_RESOURCE(device_get_parent(cbdev), 682 rle->res->r_dev, 683 rle->type, rle->rid, 684 rle->res); 685 rle->res = NULL; 686 /* 687 * zero out config so the card won't acknowledge 688 * access to the space anymore 689 */ 690 pci_write_config(dinfo->pci.cfg.dev, rle->rid, 0, 4); 691 } 692 } 693 resource_list_free(&dinfo->pci.resources); 694 } 695 696 static struct resource * 697 cardbus_alloc_resource(device_t cbdev, device_t child, int type, 698 int *rid, u_long start, u_long end, u_long count, u_int flags) 699 { 700 struct cardbus_devinfo *dinfo; 701 struct resource_list_entry *rle = 0; 702 int passthrough = (device_get_parent(child) != cbdev); 703 704 if (passthrough) { 705 return (BUS_ALLOC_RESOURCE(device_get_parent(cbdev), child, 706 type, rid, start, end, count, flags)); 707 } 708 709 dinfo = device_get_ivars(child); 710 rle = resource_list_find(&dinfo->pci.resources, type, *rid); 711 712 if (!rle) 713 return NULL; /* no resource of that type/rid */ 714 715 if (!rle->res) { 716 device_printf(cbdev, "WARNING: Resource not reserved by bus\n"); 717 return NULL; 718 } else { 719 /* Release the cardbus hold on the resource */ 720 if (rle->res->r_dev != cbdev) 721 return NULL; 722 bus_release_resource(cbdev, type, *rid, rle->res); 723 rle->res = NULL; 724 switch (type) { 725 case SYS_RES_IOPORT: 726 case SYS_RES_MEMORY: 727 if (!(flags & RF_ALIGNMENT_MASK)) 728 flags |= rman_make_alignment_flags(rle->count); 729 break; 730 case SYS_RES_IRQ: 731 flags |= RF_SHAREABLE; 732 break; 733 } 734 /* Allocate the resource to the child */ 735 return resource_list_alloc(&dinfo->pci.resources, cbdev, child, 736 type, rid, rle->start, rle->end, rle->count, flags); 737 } 738 } 739 740 static int 741 cardbus_release_resource(device_t cbdev, device_t child, int type, int rid, 742 struct resource *r) 743 { 744 struct cardbus_devinfo *dinfo; 745 int passthrough = (device_get_parent(child) != cbdev); 746 struct resource_list_entry *rle = 0; 747 int flags; 748 int ret; 749 750 if (passthrough) { 751 return BUS_RELEASE_RESOURCE(device_get_parent(cbdev), child, 752 type, rid, r); 753 } 754 755 dinfo = device_get_ivars(child); 756 /* 757 * According to the PCI 2.2 spec, devices may share an address 758 * decoder between memory mapped ROM access and memory 759 * mapped register access. To be safe, disable ROM access 760 * whenever it is released. 761 */ 762 if (rid == CARDBUS_ROM_REG) { 763 uint32_t rom_reg; 764 765 rom_reg = pci_read_config(child, rid, 4); 766 rom_reg &= ~CARDBUS_ROM_ENABLE; 767 pci_write_config(child, rid, rom_reg, 4); 768 } 769 770 rle = resource_list_find(&dinfo->pci.resources, type, rid); 771 772 if (!rle) { 773 device_printf(cbdev, "Allocated resource not found\n"); 774 return ENOENT; 775 } 776 if (!rle->res) { 777 device_printf(cbdev, "Allocated resource not recorded\n"); 778 return ENOENT; 779 } 780 781 ret = BUS_RELEASE_RESOURCE(device_get_parent(cbdev), child, 782 type, rid, r); 783 switch (type) { 784 case SYS_RES_IOPORT: 785 case SYS_RES_MEMORY: 786 flags = rman_make_alignment_flags(rle->count); 787 break; 788 case SYS_RES_IRQ: 789 flags = RF_SHAREABLE; 790 break; 791 default: 792 flags = 0; 793 } 794 /* Restore cardbus hold on the resource */ 795 rle->res = bus_alloc_resource(cbdev, type, &rid, 796 rle->start, rle->end, rle->count, flags); 797 if (rle->res == NULL) 798 device_printf(cbdev, "release_resource: " 799 "unable to reacquire resource\n"); 800 return ret; 801 } 802 803 static int 804 cardbus_setup_intr(device_t cbdev, device_t child, struct resource *irq, 805 int flags, driver_intr_t *intr, void *arg, void **cookiep) 806 { 807 int ret; 808 device_t cdev; 809 struct cardbus_devinfo *dinfo; 810 811 ret = bus_generic_setup_intr(cbdev, child, irq, flags, intr, arg, 812 cookiep); 813 if (ret != 0) 814 return ret; 815 816 for (cdev = child; cbdev != device_get_parent(cdev); 817 cdev = device_get_parent(cdev)) 818 /* NOTHING */; 819 dinfo = device_get_ivars(cdev); 820 821 return 0; 822 } 823 824 static int 825 cardbus_teardown_intr(device_t cbdev, device_t child, struct resource *irq, 826 void *cookie) 827 { 828 int ret; 829 device_t cdev; 830 struct cardbus_devinfo *dinfo; 831 832 ret = bus_generic_teardown_intr(cbdev, child, irq, cookie); 833 if (ret != 0) 834 return ret; 835 836 for (cdev = child; cbdev != device_get_parent(cdev); 837 cdev = device_get_parent(cdev)) 838 /* NOTHING */; 839 dinfo = device_get_ivars(cdev); 840 841 return (0); 842 } 843 844 845 /************************************************************************/ 846 /* Other Bus Methods */ 847 /************************************************************************/ 848 849 static int 850 cardbus_print_resources(struct resource_list *rl, const char *name, 851 int type, const char *format) 852 { 853 struct resource_list_entry *rle; 854 int printed, retval; 855 856 printed = 0; 857 retval = 0; 858 /* Yes, this is kinda cheating */ 859 SLIST_FOREACH(rle, rl, link) { 860 if (rle->type == type) { 861 if (printed == 0) 862 retval += printf(" %s ", name); 863 else if (printed > 0) 864 retval += printf(","); 865 printed++; 866 retval += printf(format, rle->start); 867 if (rle->count > 1) { 868 retval += printf("-"); 869 retval += printf(format, rle->start + 870 rle->count - 1); 871 } 872 } 873 } 874 return retval; 875 } 876 877 static int 878 cardbus_print_child(device_t cbdev, device_t child) 879 { 880 struct cardbus_devinfo *dinfo; 881 struct resource_list *rl; 882 pcicfgregs *cfg; 883 int retval = 0; 884 885 dinfo = device_get_ivars(child); 886 cfg = &dinfo->pci.cfg; 887 rl = &dinfo->pci.resources; 888 889 retval += bus_print_child_header(cbdev, child); 890 891 retval += cardbus_print_resources(rl, "port", SYS_RES_IOPORT, "%#lx"); 892 retval += cardbus_print_resources(rl, "mem", SYS_RES_MEMORY, "%#lx"); 893 retval += cardbus_print_resources(rl, "irq", SYS_RES_IRQ, "%ld"); 894 if (device_get_flags(cbdev)) 895 retval += printf(" flags %#x", device_get_flags(cbdev)); 896 897 retval += printf(" at device %d.%d", pci_get_slot(child), 898 pci_get_function(child)); 899 900 retval += bus_print_child_footer(cbdev, child); 901 902 return (retval); 903 } 904 905 static void 906 cardbus_probe_nomatch(device_t cbdev, device_t child) 907 { 908 struct cardbus_devinfo *dinfo; 909 pcicfgregs *cfg; 910 911 dinfo = device_get_ivars(child); 912 cfg = &dinfo->pci.cfg; 913 device_printf(cbdev, "<unknown card>"); 914 printf(" (vendor=0x%04x, dev=0x%04x)", cfg->vendor, cfg->device); 915 printf(" at %d.%d", pci_get_slot(child), pci_get_function(child)); 916 if (cfg->intpin > 0 && cfg->intline != 255) { 917 printf(" irq %d", cfg->intline); 918 } 919 printf("\n"); 920 921 return; 922 } 923 924 static int 925 cardbus_child_location_str(device_t cbdev, device_t child, char *buf, 926 size_t buflen) 927 { 928 struct cardbus_devinfo *dinfo; 929 pcicfgregs *cfg; 930 931 dinfo = device_get_ivars(child); 932 cfg = &dinfo->pci.cfg; 933 snprintf(buf, buflen, "slot=%d function=%d", pci_get_slot(child), 934 pci_get_function(child)); 935 return (0); 936 } 937 938 static int 939 cardbus_child_pnpinfo_str(device_t cbdev, device_t child, char *buf, 940 size_t buflen) 941 { 942 struct cardbus_devinfo *dinfo; 943 pcicfgregs *cfg; 944 945 dinfo = device_get_ivars(child); 946 cfg = &dinfo->pci.cfg; 947 snprintf(buf, buflen, "vendor=0x%04x device=0x%04x subvendor=0x%04x " 948 "subdevice=0x%04x", cfg->vendor, cfg->device, cfg->subvendor, 949 cfg->subdevice); 950 return (0); 951 } 952 953 static int 954 cardbus_read_ivar(device_t cbdev, device_t child, int which, u_long *result) 955 { 956 struct cardbus_devinfo *dinfo; 957 pcicfgregs *cfg; 958 959 dinfo = device_get_ivars(child); 960 cfg = &dinfo->pci.cfg; 961 962 switch (which) { 963 case PCI_IVAR_SUBVENDOR: 964 *result = cfg->subvendor; 965 break; 966 case PCI_IVAR_SUBDEVICE: 967 *result = cfg->subdevice; 968 break; 969 case PCI_IVAR_VENDOR: 970 *result = cfg->vendor; 971 break; 972 case PCI_IVAR_DEVICE: 973 *result = cfg->device; 974 break; 975 case PCI_IVAR_DEVID: 976 *result = (cfg->device << 16) | cfg->vendor; 977 break; 978 case PCI_IVAR_CLASS: 979 *result = cfg->baseclass; 980 break; 981 case PCI_IVAR_SUBCLASS: 982 *result = cfg->subclass; 983 break; 984 case PCI_IVAR_PROGIF: 985 *result = cfg->progif; 986 break; 987 case PCI_IVAR_REVID: 988 *result = cfg->revid; 989 break; 990 case PCI_IVAR_INTPIN: 991 *result = cfg->intpin; 992 break; 993 case PCI_IVAR_IRQ: 994 *result = cfg->intline; 995 break; 996 case PCI_IVAR_BUS: 997 *result = cfg->bus; 998 break; 999 case PCI_IVAR_SLOT: 1000 *result = cfg->slot; 1001 break; 1002 case PCI_IVAR_FUNCTION: 1003 *result = cfg->func; 1004 break; 1005 default: 1006 return ENOENT; 1007 } 1008 return 0; 1009 } 1010 1011 static int 1012 cardbus_write_ivar(device_t cbdev, device_t child, int which, uintptr_t value) 1013 { 1014 struct cardbus_devinfo *dinfo; 1015 pcicfgregs *cfg; 1016 1017 dinfo = device_get_ivars(child); 1018 cfg = &dinfo->pci.cfg; 1019 1020 switch (which) { 1021 case PCI_IVAR_SUBVENDOR: 1022 case PCI_IVAR_SUBDEVICE: 1023 case PCI_IVAR_VENDOR: 1024 case PCI_IVAR_DEVICE: 1025 case PCI_IVAR_DEVID: 1026 case PCI_IVAR_CLASS: 1027 case PCI_IVAR_SUBCLASS: 1028 case PCI_IVAR_PROGIF: 1029 case PCI_IVAR_REVID: 1030 case PCI_IVAR_INTPIN: 1031 case PCI_IVAR_IRQ: 1032 case PCI_IVAR_BUS: 1033 case PCI_IVAR_SLOT: 1034 case PCI_IVAR_FUNCTION: 1035 return EINVAL; /* disallow for now */ 1036 default: 1037 return ENOENT; 1038 } 1039 return 0; 1040 } 1041 1042 /************************************************************************/ 1043 /* Compatibility with PCI bus (XXX: Do we need this?) */ 1044 /************************************************************************/ 1045 1046 /* 1047 * PCI power manangement 1048 */ 1049 static int 1050 cardbus_set_powerstate_method(device_t cbdev, device_t child, int state) 1051 { 1052 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1053 pcicfgregs *cfg = &dinfo->pci.cfg; 1054 u_int16_t status; 1055 int result; 1056 1057 if (cfg->pp_cap != 0) { 1058 status = PCI_READ_CONFIG(cbdev, child, cfg->pp_status, 2) 1059 & ~PCIM_PSTAT_DMASK; 1060 result = 0; 1061 switch (state) { 1062 case PCI_POWERSTATE_D0: 1063 status |= PCIM_PSTAT_D0; 1064 break; 1065 case PCI_POWERSTATE_D1: 1066 if (cfg->pp_cap & PCIM_PCAP_D1SUPP) { 1067 status |= PCIM_PSTAT_D1; 1068 } else { 1069 result = EOPNOTSUPP; 1070 } 1071 break; 1072 case PCI_POWERSTATE_D2: 1073 if (cfg->pp_cap & PCIM_PCAP_D2SUPP) { 1074 status |= PCIM_PSTAT_D2; 1075 } else { 1076 result = EOPNOTSUPP; 1077 } 1078 break; 1079 case PCI_POWERSTATE_D3: 1080 status |= PCIM_PSTAT_D3; 1081 break; 1082 default: 1083 result = EINVAL; 1084 } 1085 if (result == 0) 1086 PCI_WRITE_CONFIG(cbdev, child, cfg->pp_status, 1087 status, 2); 1088 } else { 1089 result = ENXIO; 1090 } 1091 return (result); 1092 } 1093 1094 static int 1095 cardbus_get_powerstate_method(device_t cbdev, device_t child) 1096 { 1097 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1098 pcicfgregs *cfg = &dinfo->pci.cfg; 1099 u_int16_t status; 1100 int result; 1101 1102 if (cfg->pp_cap != 0) { 1103 status = PCI_READ_CONFIG(cbdev, child, cfg->pp_status, 2); 1104 switch (status & PCIM_PSTAT_DMASK) { 1105 case PCIM_PSTAT_D0: 1106 result = PCI_POWERSTATE_D0; 1107 break; 1108 case PCIM_PSTAT_D1: 1109 result = PCI_POWERSTATE_D1; 1110 break; 1111 case PCIM_PSTAT_D2: 1112 result = PCI_POWERSTATE_D2; 1113 break; 1114 case PCIM_PSTAT_D3: 1115 result = PCI_POWERSTATE_D3; 1116 break; 1117 default: 1118 result = PCI_POWERSTATE_UNKNOWN; 1119 break; 1120 } 1121 } else { 1122 /* No support, device is always at D0 */ 1123 result = PCI_POWERSTATE_D0; 1124 } 1125 return (result); 1126 } 1127 1128 static u_int32_t 1129 cardbus_read_config_method(device_t cbdev, device_t child, int reg, int width) 1130 { 1131 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1132 pcicfgregs *cfg = &dinfo->pci.cfg; 1133 1134 return PCIB_READ_CONFIG(device_get_parent(cbdev), 1135 cfg->bus, cfg->slot, cfg->func, reg, width); 1136 } 1137 1138 static void 1139 cardbus_write_config_method(device_t cbdev, device_t child, int reg, 1140 u_int32_t val, int width) 1141 { 1142 struct cardbus_devinfo *dinfo = device_get_ivars(child); 1143 pcicfgregs *cfg = &dinfo->pci.cfg; 1144 1145 PCIB_WRITE_CONFIG(device_get_parent(cbdev), 1146 cfg->bus, cfg->slot, cfg->func, reg, val, width); 1147 } 1148 1149 static __inline void 1150 cardbus_set_command_bit(device_t cbdev, device_t child, u_int16_t bit) 1151 { 1152 u_int16_t command; 1153 1154 command = PCI_READ_CONFIG(cbdev, child, PCIR_COMMAND, 2); 1155 command |= bit; 1156 PCI_WRITE_CONFIG(cbdev, child, PCIR_COMMAND, command, 2); 1157 } 1158 1159 static __inline void 1160 cardbus_clear_command_bit(device_t cbdev, device_t child, u_int16_t bit) 1161 { 1162 u_int16_t command; 1163 1164 command = PCI_READ_CONFIG(cbdev, child, PCIR_COMMAND, 2); 1165 command &= ~bit; 1166 PCI_WRITE_CONFIG(cbdev, child, PCIR_COMMAND, command, 2); 1167 } 1168 1169 static void 1170 cardbus_enable_busmaster_method(device_t cbdev, device_t child) 1171 { 1172 cardbus_set_command_bit(cbdev, child, PCIM_CMD_BUSMASTEREN); 1173 } 1174 1175 static void 1176 cardbus_disable_busmaster_method(device_t cbdev, device_t child) 1177 { 1178 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_BUSMASTEREN); 1179 } 1180 1181 static void 1182 cardbus_enable_io_method(device_t cbdev, device_t child, int space) 1183 { 1184 switch (space) { 1185 case SYS_RES_IOPORT: 1186 cardbus_set_command_bit(cbdev, child, PCIM_CMD_PORTEN); 1187 break; 1188 case SYS_RES_MEMORY: 1189 cardbus_set_command_bit(cbdev, child, PCIM_CMD_MEMEN); 1190 break; 1191 } 1192 } 1193 1194 static void 1195 cardbus_disable_io_method(device_t cbdev, device_t child, int space) 1196 { 1197 switch (space) { 1198 case SYS_RES_IOPORT: 1199 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_PORTEN); 1200 break; 1201 case SYS_RES_MEMORY: 1202 cardbus_clear_command_bit(cbdev, child, PCIM_CMD_MEMEN); 1203 break; 1204 } 1205 } 1206 1207 static device_method_t cardbus_methods[] = { 1208 /* Device interface */ 1209 DEVMETHOD(device_probe, cardbus_probe), 1210 DEVMETHOD(device_attach, cardbus_attach), 1211 DEVMETHOD(device_detach, cardbus_detach), 1212 DEVMETHOD(device_shutdown, bus_generic_shutdown), 1213 DEVMETHOD(device_suspend, cardbus_suspend), 1214 DEVMETHOD(device_resume, cardbus_resume), 1215 1216 /* Bus interface */ 1217 DEVMETHOD(bus_print_child, cardbus_print_child), 1218 DEVMETHOD(bus_probe_nomatch, cardbus_probe_nomatch), 1219 DEVMETHOD(bus_read_ivar, cardbus_read_ivar), 1220 DEVMETHOD(bus_write_ivar, cardbus_write_ivar), 1221 DEVMETHOD(bus_driver_added, cardbus_driver_added), 1222 DEVMETHOD(bus_alloc_resource, cardbus_alloc_resource), 1223 DEVMETHOD(bus_release_resource, cardbus_release_resource), 1224 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 1225 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 1226 DEVMETHOD(bus_setup_intr, cardbus_setup_intr), 1227 DEVMETHOD(bus_teardown_intr, cardbus_teardown_intr), 1228 1229 DEVMETHOD(bus_set_resource, cardbus_set_resource_method), 1230 DEVMETHOD(bus_get_resource, cardbus_get_resource_method), 1231 DEVMETHOD(bus_delete_resource, cardbus_delete_resource_method), 1232 DEVMETHOD(bus_child_pnpinfo_str, cardbus_child_pnpinfo_str), 1233 DEVMETHOD(bus_child_location_str, cardbus_child_location_str), 1234 1235 /* Card Interface */ 1236 DEVMETHOD(card_attach_card, cardbus_attach_card), 1237 DEVMETHOD(card_detach_card, cardbus_detach_card), 1238 DEVMETHOD(card_cis_read, cardbus_cis_read), 1239 DEVMETHOD(card_cis_free, cardbus_cis_free), 1240 1241 /* Cardbus/PCI interface */ 1242 DEVMETHOD(pci_read_config, cardbus_read_config_method), 1243 DEVMETHOD(pci_write_config, cardbus_write_config_method), 1244 DEVMETHOD(pci_enable_busmaster, cardbus_enable_busmaster_method), 1245 DEVMETHOD(pci_disable_busmaster, cardbus_disable_busmaster_method), 1246 DEVMETHOD(pci_enable_io, cardbus_enable_io_method), 1247 DEVMETHOD(pci_disable_io, cardbus_disable_io_method), 1248 DEVMETHOD(pci_get_powerstate, cardbus_get_powerstate_method), 1249 DEVMETHOD(pci_set_powerstate, cardbus_set_powerstate_method), 1250 1251 {0,0} 1252 }; 1253 1254 static driver_t cardbus_driver = { 1255 "cardbus", 1256 cardbus_methods, 1257 0 /* no softc */ 1258 }; 1259 1260 static devclass_t cardbus_devclass; 1261 1262 DRIVER_MODULE(cardbus, cbb, cardbus_driver, cardbus_devclass, 0, 0); 1263 MODULE_VERSION(cardbus, 1); 1264 MODULE_DEPEND(cardbus, exca, 1, 1, 1); 1265 /* 1266 MODULE_DEPEND(cardbus, pccbb, 1, 1, 1); 1267 */ 1268