1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2007-2014 QLogic Corporation. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS' 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 26 * THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <sys/cdefs.h> 30 __FBSDID("$FreeBSD$"); 31 32 #include "bxe.h" 33 #include "bxe_stats.h" 34 35 #ifdef __i386__ 36 #define BITS_PER_LONG 32 37 #else 38 #define BITS_PER_LONG 64 39 #endif 40 41 extern int bxe_grc_dump(struct bxe_softc *sc); 42 43 static inline long 44 bxe_hilo(uint32_t *hiref) 45 { 46 uint32_t lo = *(hiref + 1); 47 #if (BITS_PER_LONG == 64) 48 uint32_t hi = *hiref; 49 return (HILO_U64(hi, lo)); 50 #else 51 return (lo); 52 #endif 53 } 54 55 static inline uint16_t 56 bxe_get_port_stats_dma_len(struct bxe_softc *sc) 57 { 58 uint16_t res = 0; 59 uint32_t size; 60 61 /* 'newest' convention - shmem2 contains the size of the port stats */ 62 if (SHMEM2_HAS(sc, sizeof_port_stats)) { 63 size = SHMEM2_RD(sc, sizeof_port_stats); 64 if (size) { 65 res = size; 66 } 67 68 /* prevent newer BC from causing buffer overflow */ 69 if (res > sizeof(struct host_port_stats)) { 70 res = sizeof(struct host_port_stats); 71 } 72 } 73 74 /* 75 * Older convention - all BCs support the port stats fields up until 76 * the 'not_used' field 77 */ 78 if (!res) { 79 res = (offsetof(struct host_port_stats, not_used) + 4); 80 81 /* if PFC stats are supported by the MFW, DMA them as well */ 82 if (sc->devinfo.bc_ver >= REQ_BC_VER_4_PFC_STATS_SUPPORTED) { 83 res += (offsetof(struct host_port_stats, pfc_frames_rx_lo) - 84 offsetof(struct host_port_stats, pfc_frames_tx_hi) + 4); 85 } 86 } 87 88 res >>= 2; 89 90 DBASSERT(sc, !(res > 2 * DMAE_LEN32_RD_MAX), ("big stats dmae length\n")); 91 return (res); 92 } 93 94 /* 95 * Init service functions 96 */ 97 98 static void 99 bxe_dp_stats(struct bxe_softc *sc) 100 { 101 int i; 102 103 BLOGD(sc, DBG_STATS, 104 "dumping stats:\n" 105 " fw_stats_req\n" 106 " hdr\n" 107 " cmd_num %d\n" 108 " reserved0 %d\n" 109 " drv_stats_counter %d\n" 110 " reserved1 %d\n" 111 " stats_counters_addrs %x %x\n", 112 sc->fw_stats_req->hdr.cmd_num, 113 sc->fw_stats_req->hdr.reserved0, 114 sc->fw_stats_req->hdr.drv_stats_counter, 115 sc->fw_stats_req->hdr.reserved1, 116 sc->fw_stats_req->hdr.stats_counters_addrs.hi, 117 sc->fw_stats_req->hdr.stats_counters_addrs.lo); 118 119 for (i = 0; i < sc->fw_stats_req->hdr.cmd_num; i++) { 120 BLOGD(sc, DBG_STATS, 121 "query[%d]\n" 122 " kind %d\n" 123 " index %d\n" 124 " funcID %d\n" 125 " reserved %d\n" 126 " address %x %x\n", 127 i, 128 sc->fw_stats_req->query[i].kind, 129 sc->fw_stats_req->query[i].index, 130 sc->fw_stats_req->query[i].funcID, 131 sc->fw_stats_req->query[i].reserved, 132 sc->fw_stats_req->query[i].address.hi, 133 sc->fw_stats_req->query[i].address.lo); 134 } 135 } 136 137 /* 138 * Post the next statistics ramrod. Protect it with the lock in 139 * order to ensure the strict order between statistics ramrods 140 * (each ramrod has a sequence number passed in a 141 * sc->fw_stats_req->hdr.drv_stats_counter and ramrods must be 142 * sent in order). 143 */ 144 static void 145 bxe_storm_stats_post(struct bxe_softc *sc) 146 { 147 int rc; 148 149 if (!sc->stats_pending) { 150 BXE_STATS_LOCK(sc); 151 152 if (sc->stats_pending) { 153 BXE_STATS_UNLOCK(sc); 154 return; 155 } 156 157 sc->fw_stats_req->hdr.drv_stats_counter = 158 htole16(sc->stats_counter++); 159 160 BLOGD(sc, DBG_STATS, 161 "sending statistics ramrod %d\n", 162 le16toh(sc->fw_stats_req->hdr.drv_stats_counter)); 163 164 /* adjust the ramrod to include VF queues statistics */ 165 // XXX bxe_iov_adjust_stats_req(sc); 166 167 bxe_dp_stats(sc); 168 169 /* send FW stats ramrod */ 170 rc = bxe_sp_post(sc, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0, 171 U64_HI(sc->fw_stats_req_mapping), 172 U64_LO(sc->fw_stats_req_mapping), 173 NONE_CONNECTION_TYPE); 174 if (rc == 0) { 175 sc->stats_pending = 1; 176 } 177 178 BXE_STATS_UNLOCK(sc); 179 } 180 } 181 182 static void 183 bxe_hw_stats_post(struct bxe_softc *sc) 184 { 185 struct dmae_cmd *dmae = &sc->stats_dmae; 186 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 187 int loader_idx; 188 uint32_t opcode; 189 190 *stats_comp = DMAE_COMP_VAL; 191 if (CHIP_REV_IS_SLOW(sc)) { 192 return; 193 } 194 195 /* Update MCP's statistics if possible */ 196 if (sc->func_stx) { 197 memcpy(BXE_SP(sc, func_stats), &sc->func_stats, 198 sizeof(sc->func_stats)); 199 } 200 201 /* loader */ 202 if (sc->executer_idx) { 203 loader_idx = PMF_DMAE_C(sc); 204 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, 205 TRUE, DMAE_COMP_GRC); 206 opcode = bxe_dmae_opcode_clr_src_reset(opcode); 207 208 memset(dmae, 0, sizeof(struct dmae_cmd)); 209 dmae->opcode = opcode; 210 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, dmae[0])); 211 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, dmae[0])); 212 dmae->dst_addr_lo = ((DMAE_REG_CMD_MEM + 213 sizeof(struct dmae_cmd) * 214 (loader_idx + 1)) >> 2); 215 dmae->dst_addr_hi = 0; 216 dmae->len = sizeof(struct dmae_cmd) >> 2; 217 if (CHIP_IS_E1(sc)) { 218 dmae->len--; 219 } 220 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx + 1] >> 2); 221 dmae->comp_addr_hi = 0; 222 dmae->comp_val = 1; 223 224 *stats_comp = 0; 225 bxe_post_dmae(sc, dmae, loader_idx); 226 } else if (sc->func_stx) { 227 *stats_comp = 0; 228 bxe_post_dmae(sc, dmae, INIT_DMAE_C(sc)); 229 } 230 } 231 232 static int 233 bxe_stats_comp(struct bxe_softc *sc) 234 { 235 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 236 int cnt = 10; 237 238 while (*stats_comp != DMAE_COMP_VAL) { 239 if (!cnt) { 240 BLOGE(sc, "Timeout waiting for stats finished\n"); 241 if(sc->trigger_grcdump) { 242 /* taking grcdump */ 243 bxe_grc_dump(sc); 244 } 245 break; 246 } 247 248 cnt--; 249 DELAY(1000); 250 } 251 252 return (1); 253 } 254 255 /* 256 * Statistics service functions 257 */ 258 259 static void 260 bxe_stats_pmf_update(struct bxe_softc *sc) 261 { 262 struct dmae_cmd *dmae; 263 uint32_t opcode; 264 int loader_idx = PMF_DMAE_C(sc); 265 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 266 267 if (sc->devinfo.bc_ver <= 0x06001400) { 268 /* 269 * Bootcode v6.0.21 fixed a GRC timeout that occurs when accessing 270 * BRB registers while the BRB block is in reset. The DMA transfer 271 * below triggers this issue resulting in the DMAE to stop 272 * functioning. Skip this initial stats transfer for old bootcode 273 * versions <= 6.0.20. 274 */ 275 return; 276 } 277 278 /* sanity */ 279 if (!sc->port.pmf || !sc->port.port_stx) { 280 BLOGE(sc, "BUG!\n"); 281 return; 282 } 283 284 sc->executer_idx = 0; 285 286 opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, FALSE, 0); 287 288 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 289 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); 290 dmae->src_addr_lo = (sc->port.port_stx >> 2); 291 dmae->src_addr_hi = 0; 292 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats)); 293 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats)); 294 dmae->len = DMAE_LEN32_RD_MAX; 295 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 296 dmae->comp_addr_hi = 0; 297 dmae->comp_val = 1; 298 299 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 300 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); 301 dmae->src_addr_lo = ((sc->port.port_stx >> 2) + DMAE_LEN32_RD_MAX); 302 dmae->src_addr_hi = 0; 303 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats) + 304 DMAE_LEN32_RD_MAX * 4); 305 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats) + 306 DMAE_LEN32_RD_MAX * 4); 307 dmae->len = (bxe_get_port_stats_dma_len(sc) - DMAE_LEN32_RD_MAX); 308 309 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 310 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 311 dmae->comp_val = DMAE_COMP_VAL; 312 313 *stats_comp = 0; 314 bxe_hw_stats_post(sc); 315 bxe_stats_comp(sc); 316 } 317 318 static void 319 bxe_port_stats_init(struct bxe_softc *sc) 320 { 321 struct dmae_cmd *dmae; 322 int port = SC_PORT(sc); 323 uint32_t opcode; 324 int loader_idx = PMF_DMAE_C(sc); 325 uint32_t mac_addr; 326 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 327 328 /* sanity */ 329 if (!sc->link_vars.link_up || !sc->port.pmf) { 330 BLOGE(sc, "BUG!\n"); 331 return; 332 } 333 334 sc->executer_idx = 0; 335 336 /* MCP */ 337 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, 338 TRUE, DMAE_COMP_GRC); 339 340 if (sc->port.port_stx) { 341 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 342 dmae->opcode = opcode; 343 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats)); 344 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats)); 345 dmae->dst_addr_lo = sc->port.port_stx >> 2; 346 dmae->dst_addr_hi = 0; 347 dmae->len = bxe_get_port_stats_dma_len(sc); 348 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 349 dmae->comp_addr_hi = 0; 350 dmae->comp_val = 1; 351 } 352 353 if (sc->func_stx) { 354 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 355 dmae->opcode = opcode; 356 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats)); 357 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats)); 358 dmae->dst_addr_lo = (sc->func_stx >> 2); 359 dmae->dst_addr_hi = 0; 360 dmae->len = (sizeof(struct host_func_stats) >> 2); 361 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 362 dmae->comp_addr_hi = 0; 363 dmae->comp_val = 1; 364 } 365 366 /* MAC */ 367 opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, 368 TRUE, DMAE_COMP_GRC); 369 370 /* EMAC is special */ 371 if (sc->link_vars.mac_type == ELINK_MAC_TYPE_EMAC) { 372 mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0); 373 374 /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/ 375 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 376 dmae->opcode = opcode; 377 dmae->src_addr_lo = (mac_addr + EMAC_REG_EMAC_RX_STAT_AC) >> 2; 378 dmae->src_addr_hi = 0; 379 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats)); 380 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats)); 381 dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT; 382 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 383 dmae->comp_addr_hi = 0; 384 dmae->comp_val = 1; 385 386 /* EMAC_REG_EMAC_RX_STAT_AC_28 */ 387 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 388 dmae->opcode = opcode; 389 dmae->src_addr_lo = ((mac_addr + EMAC_REG_EMAC_RX_STAT_AC_28) >> 2); 390 dmae->src_addr_hi = 0; 391 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats) + 392 offsetof(struct emac_stats, 393 rx_stat_falsecarriererrors)); 394 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats) + 395 offsetof(struct emac_stats, 396 rx_stat_falsecarriererrors)); 397 dmae->len = 1; 398 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 399 dmae->comp_addr_hi = 0; 400 dmae->comp_val = 1; 401 402 /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/ 403 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 404 dmae->opcode = opcode; 405 dmae->src_addr_lo = ((mac_addr + EMAC_REG_EMAC_TX_STAT_AC) >> 2); 406 dmae->src_addr_hi = 0; 407 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats) + 408 offsetof(struct emac_stats, 409 tx_stat_ifhcoutoctets)); 410 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats) + 411 offsetof(struct emac_stats, 412 tx_stat_ifhcoutoctets)); 413 dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT; 414 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 415 dmae->comp_addr_hi = 0; 416 dmae->comp_val = 1; 417 } else { 418 uint32_t tx_src_addr_lo, rx_src_addr_lo; 419 uint16_t rx_len, tx_len; 420 421 /* configure the params according to MAC type */ 422 switch (sc->link_vars.mac_type) { 423 case ELINK_MAC_TYPE_BMAC: 424 mac_addr = (port) ? NIG_REG_INGRESS_BMAC1_MEM : 425 NIG_REG_INGRESS_BMAC0_MEM; 426 427 /* BIGMAC_REGISTER_TX_STAT_GTPKT .. 428 BIGMAC_REGISTER_TX_STAT_GTBYT */ 429 if (CHIP_IS_E1x(sc)) { 430 tx_src_addr_lo = 431 ((mac_addr + BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2); 432 tx_len = ((8 + BIGMAC_REGISTER_TX_STAT_GTBYT - 433 BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2); 434 rx_src_addr_lo = 435 ((mac_addr + BIGMAC_REGISTER_RX_STAT_GR64) >> 2); 436 rx_len = ((8 + BIGMAC_REGISTER_RX_STAT_GRIPJ - 437 BIGMAC_REGISTER_RX_STAT_GR64) >> 2); 438 } else { 439 tx_src_addr_lo = 440 ((mac_addr + BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2); 441 tx_len = ((8 + BIGMAC2_REGISTER_TX_STAT_GTBYT - 442 BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2); 443 rx_src_addr_lo = 444 ((mac_addr + BIGMAC2_REGISTER_RX_STAT_GR64) >> 2); 445 rx_len = ((8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ - 446 BIGMAC2_REGISTER_RX_STAT_GR64) >> 2); 447 } 448 449 break; 450 451 case ELINK_MAC_TYPE_UMAC: /* handled by MSTAT */ 452 case ELINK_MAC_TYPE_XMAC: /* handled by MSTAT */ 453 default: 454 mac_addr = (port) ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0; 455 tx_src_addr_lo = ((mac_addr + MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2); 456 rx_src_addr_lo = ((mac_addr + MSTAT_REG_RX_STAT_GR64_LO) >> 2); 457 tx_len = 458 (sizeof(sc->sp->mac_stats.mstat_stats.stats_tx) >> 2); 459 rx_len = 460 (sizeof(sc->sp->mac_stats.mstat_stats.stats_rx) >> 2); 461 break; 462 } 463 464 /* TX stats */ 465 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 466 dmae->opcode = opcode; 467 dmae->src_addr_lo = tx_src_addr_lo; 468 dmae->src_addr_hi = 0; 469 dmae->len = tx_len; 470 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, mac_stats)); 471 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, mac_stats)); 472 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 473 dmae->comp_addr_hi = 0; 474 dmae->comp_val = 1; 475 476 /* RX stats */ 477 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 478 dmae->opcode = opcode; 479 dmae->src_addr_hi = 0; 480 dmae->src_addr_lo = rx_src_addr_lo; 481 dmae->dst_addr_lo = 482 U64_LO(BXE_SP_MAPPING(sc, mac_stats) + (tx_len << 2)); 483 dmae->dst_addr_hi = 484 U64_HI(BXE_SP_MAPPING(sc, mac_stats) + (tx_len << 2)); 485 dmae->len = rx_len; 486 dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2; 487 dmae->comp_addr_hi = 0; 488 dmae->comp_val = 1; 489 } 490 491 /* NIG */ 492 if (!CHIP_IS_E3(sc)) { 493 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 494 dmae->opcode = opcode; 495 dmae->src_addr_lo = 496 (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 : 497 NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2; 498 dmae->src_addr_hi = 0; 499 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats) + 500 offsetof(struct nig_stats, 501 egress_mac_pkt0_lo)); 502 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats) + 503 offsetof(struct nig_stats, 504 egress_mac_pkt0_lo)); 505 dmae->len = ((2 * sizeof(uint32_t)) >> 2); 506 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 507 dmae->comp_addr_hi = 0; 508 dmae->comp_val = 1; 509 510 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 511 dmae->opcode = opcode; 512 dmae->src_addr_lo = 513 (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 : 514 NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2; 515 dmae->src_addr_hi = 0; 516 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats) + 517 offsetof(struct nig_stats, 518 egress_mac_pkt1_lo)); 519 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats) + 520 offsetof(struct nig_stats, 521 egress_mac_pkt1_lo)); 522 dmae->len = ((2 * sizeof(uint32_t)) >> 2); 523 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 524 dmae->comp_addr_hi = 0; 525 dmae->comp_val = 1; 526 } 527 528 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 529 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_GRC, DMAE_DST_PCI, 530 TRUE, DMAE_COMP_PCI); 531 dmae->src_addr_lo = 532 (port ? NIG_REG_STAT1_BRB_DISCARD : 533 NIG_REG_STAT0_BRB_DISCARD) >> 2; 534 dmae->src_addr_hi = 0; 535 dmae->dst_addr_lo = U64_LO(BXE_SP_MAPPING(sc, nig_stats)); 536 dmae->dst_addr_hi = U64_HI(BXE_SP_MAPPING(sc, nig_stats)); 537 dmae->len = (sizeof(struct nig_stats) - 4*sizeof(uint32_t)) >> 2; 538 539 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 540 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 541 dmae->comp_val = DMAE_COMP_VAL; 542 543 *stats_comp = 0; 544 } 545 546 static void 547 bxe_func_stats_init(struct bxe_softc *sc) 548 { 549 struct dmae_cmd *dmae = &sc->stats_dmae; 550 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 551 552 /* sanity */ 553 if (!sc->func_stx) { 554 BLOGE(sc, "BUG!\n"); 555 return; 556 } 557 558 sc->executer_idx = 0; 559 memset(dmae, 0, sizeof(struct dmae_cmd)); 560 561 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, 562 TRUE, DMAE_COMP_PCI); 563 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats)); 564 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats)); 565 dmae->dst_addr_lo = (sc->func_stx >> 2); 566 dmae->dst_addr_hi = 0; 567 dmae->len = (sizeof(struct host_func_stats) >> 2); 568 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 569 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 570 dmae->comp_val = DMAE_COMP_VAL; 571 572 *stats_comp = 0; 573 } 574 575 static void 576 bxe_stats_start(struct bxe_softc *sc) 577 { 578 /* 579 * VFs travel through here as part of the statistics FSM, but no action 580 * is required 581 */ 582 if (IS_VF(sc)) { 583 return; 584 } 585 586 if (sc->port.pmf) { 587 bxe_port_stats_init(sc); 588 } 589 590 else if (sc->func_stx) { 591 bxe_func_stats_init(sc); 592 } 593 594 bxe_hw_stats_post(sc); 595 bxe_storm_stats_post(sc); 596 } 597 598 static void 599 bxe_stats_pmf_start(struct bxe_softc *sc) 600 { 601 bxe_stats_comp(sc); 602 bxe_stats_pmf_update(sc); 603 bxe_stats_start(sc); 604 } 605 606 static void 607 bxe_stats_restart(struct bxe_softc *sc) 608 { 609 /* 610 * VFs travel through here as part of the statistics FSM, but no action 611 * is required 612 */ 613 if (IS_VF(sc)) { 614 return; 615 } 616 617 bxe_stats_comp(sc); 618 bxe_stats_start(sc); 619 } 620 621 static void 622 bxe_bmac_stats_update(struct bxe_softc *sc) 623 { 624 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 625 struct bxe_eth_stats *estats = &sc->eth_stats; 626 struct { 627 uint32_t lo; 628 uint32_t hi; 629 } diff; 630 631 if (CHIP_IS_E1x(sc)) { 632 struct bmac1_stats *new = BXE_SP(sc, mac_stats.bmac1_stats); 633 634 /* the macros below will use "bmac1_stats" type */ 635 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); 636 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); 637 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); 638 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); 639 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); 640 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); 641 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); 642 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); 643 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); 644 645 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); 646 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); 647 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); 648 UPDATE_STAT64(tx_stat_gt127, 649 tx_stat_etherstatspkts65octetsto127octets); 650 UPDATE_STAT64(tx_stat_gt255, 651 tx_stat_etherstatspkts128octetsto255octets); 652 UPDATE_STAT64(tx_stat_gt511, 653 tx_stat_etherstatspkts256octetsto511octets); 654 UPDATE_STAT64(tx_stat_gt1023, 655 tx_stat_etherstatspkts512octetsto1023octets); 656 UPDATE_STAT64(tx_stat_gt1518, 657 tx_stat_etherstatspkts1024octetsto1522octets); 658 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); 659 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); 660 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); 661 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); 662 UPDATE_STAT64(tx_stat_gterr, 663 tx_stat_dot3statsinternalmactransmiterrors); 664 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); 665 } else { 666 struct bmac2_stats *new = BXE_SP(sc, mac_stats.bmac2_stats); 667 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old; 668 669 /* the macros below will use "bmac2_stats" type */ 670 UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets); 671 UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors); 672 UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts); 673 UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong); 674 UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments); 675 UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers); 676 UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived); 677 UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered); 678 UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf); 679 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent); 680 UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone); 681 UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets); 682 UPDATE_STAT64(tx_stat_gt127, 683 tx_stat_etherstatspkts65octetsto127octets); 684 UPDATE_STAT64(tx_stat_gt255, 685 tx_stat_etherstatspkts128octetsto255octets); 686 UPDATE_STAT64(tx_stat_gt511, 687 tx_stat_etherstatspkts256octetsto511octets); 688 UPDATE_STAT64(tx_stat_gt1023, 689 tx_stat_etherstatspkts512octetsto1023octets); 690 UPDATE_STAT64(tx_stat_gt1518, 691 tx_stat_etherstatspkts1024octetsto1522octets); 692 UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047); 693 UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095); 694 UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216); 695 UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383); 696 UPDATE_STAT64(tx_stat_gterr, 697 tx_stat_dot3statsinternalmactransmiterrors); 698 UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl); 699 700 /* collect PFC stats */ 701 pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi; 702 pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo; 703 ADD_64(pstats->pfc_frames_tx_hi, fwstats->pfc_frames_tx_hi, 704 pstats->pfc_frames_tx_lo, fwstats->pfc_frames_tx_lo); 705 706 pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi; 707 pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo; 708 ADD_64(pstats->pfc_frames_rx_hi, fwstats->pfc_frames_rx_hi, 709 pstats->pfc_frames_rx_lo, fwstats->pfc_frames_rx_lo); 710 } 711 712 estats->pause_frames_received_hi = pstats->mac_stx[1].rx_stat_mac_xpf_hi; 713 estats->pause_frames_received_lo = pstats->mac_stx[1].rx_stat_mac_xpf_lo; 714 715 estats->pause_frames_sent_hi = pstats->mac_stx[1].tx_stat_outxoffsent_hi; 716 estats->pause_frames_sent_lo = pstats->mac_stx[1].tx_stat_outxoffsent_lo; 717 718 estats->pfc_frames_received_hi = pstats->pfc_frames_rx_hi; 719 estats->pfc_frames_received_lo = pstats->pfc_frames_rx_lo; 720 estats->pfc_frames_sent_hi = pstats->pfc_frames_tx_hi; 721 estats->pfc_frames_sent_lo = pstats->pfc_frames_tx_lo; 722 } 723 724 static void 725 bxe_mstat_stats_update(struct bxe_softc *sc) 726 { 727 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 728 struct bxe_eth_stats *estats = &sc->eth_stats; 729 struct mstat_stats *new = BXE_SP(sc, mac_stats.mstat_stats); 730 731 ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets); 732 ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors); 733 ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts); 734 ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong); 735 ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments); 736 ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived); 737 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered); 738 ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf); 739 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent); 740 ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone); 741 742 /* collect pfc stats */ 743 ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi, 744 pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo); 745 ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi, 746 pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo); 747 748 ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets); 749 ADD_STAT64(stats_tx.tx_gt127, tx_stat_etherstatspkts65octetsto127octets); 750 ADD_STAT64(stats_tx.tx_gt255, tx_stat_etherstatspkts128octetsto255octets); 751 ADD_STAT64(stats_tx.tx_gt511, tx_stat_etherstatspkts256octetsto511octets); 752 ADD_STAT64(stats_tx.tx_gt1023, 753 tx_stat_etherstatspkts512octetsto1023octets); 754 ADD_STAT64(stats_tx.tx_gt1518, 755 tx_stat_etherstatspkts1024octetsto1522octets); 756 ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047); 757 758 ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095); 759 ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216); 760 ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383); 761 762 ADD_STAT64(stats_tx.tx_gterr, tx_stat_dot3statsinternalmactransmiterrors); 763 ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl); 764 765 estats->etherstatspkts1024octetsto1522octets_hi = 766 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi; 767 estats->etherstatspkts1024octetsto1522octets_lo = 768 pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo; 769 770 estats->etherstatspktsover1522octets_hi = 771 pstats->mac_stx[1].tx_stat_mac_2047_hi; 772 estats->etherstatspktsover1522octets_lo = 773 pstats->mac_stx[1].tx_stat_mac_2047_lo; 774 775 ADD_64(estats->etherstatspktsover1522octets_hi, 776 pstats->mac_stx[1].tx_stat_mac_4095_hi, 777 estats->etherstatspktsover1522octets_lo, 778 pstats->mac_stx[1].tx_stat_mac_4095_lo); 779 780 ADD_64(estats->etherstatspktsover1522octets_hi, 781 pstats->mac_stx[1].tx_stat_mac_9216_hi, 782 estats->etherstatspktsover1522octets_lo, 783 pstats->mac_stx[1].tx_stat_mac_9216_lo); 784 785 ADD_64(estats->etherstatspktsover1522octets_hi, 786 pstats->mac_stx[1].tx_stat_mac_16383_hi, 787 estats->etherstatspktsover1522octets_lo, 788 pstats->mac_stx[1].tx_stat_mac_16383_lo); 789 790 estats->pause_frames_received_hi = pstats->mac_stx[1].rx_stat_mac_xpf_hi; 791 estats->pause_frames_received_lo = pstats->mac_stx[1].rx_stat_mac_xpf_lo; 792 793 estats->pause_frames_sent_hi = pstats->mac_stx[1].tx_stat_outxoffsent_hi; 794 estats->pause_frames_sent_lo = pstats->mac_stx[1].tx_stat_outxoffsent_lo; 795 796 estats->pfc_frames_received_hi = pstats->pfc_frames_rx_hi; 797 estats->pfc_frames_received_lo = pstats->pfc_frames_rx_lo; 798 estats->pfc_frames_sent_hi = pstats->pfc_frames_tx_hi; 799 estats->pfc_frames_sent_lo = pstats->pfc_frames_tx_lo; 800 } 801 802 static void 803 bxe_emac_stats_update(struct bxe_softc *sc) 804 { 805 struct emac_stats *new = BXE_SP(sc, mac_stats.emac_stats); 806 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 807 struct bxe_eth_stats *estats = &sc->eth_stats; 808 809 UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets); 810 UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets); 811 UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors); 812 UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors); 813 UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors); 814 UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors); 815 UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts); 816 UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong); 817 UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments); 818 UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers); 819 UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived); 820 UPDATE_EXTEND_STAT(rx_stat_xoffstateentered); 821 UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived); 822 UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived); 823 UPDATE_EXTEND_STAT(tx_stat_outxonsent); 824 UPDATE_EXTEND_STAT(tx_stat_outxoffsent); 825 UPDATE_EXTEND_STAT(tx_stat_flowcontroldone); 826 UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions); 827 UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes); 828 UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes); 829 UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions); 830 UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions); 831 UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions); 832 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets); 833 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets); 834 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets); 835 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets); 836 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets); 837 UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets); 838 UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets); 839 UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors); 840 841 estats->pause_frames_received_hi = 842 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi; 843 estats->pause_frames_received_lo = 844 pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo; 845 ADD_64(estats->pause_frames_received_hi, 846 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi, 847 estats->pause_frames_received_lo, 848 pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo); 849 850 estats->pause_frames_sent_hi = 851 pstats->mac_stx[1].tx_stat_outxonsent_hi; 852 estats->pause_frames_sent_lo = 853 pstats->mac_stx[1].tx_stat_outxonsent_lo; 854 ADD_64(estats->pause_frames_sent_hi, 855 pstats->mac_stx[1].tx_stat_outxoffsent_hi, 856 estats->pause_frames_sent_lo, 857 pstats->mac_stx[1].tx_stat_outxoffsent_lo); 858 } 859 860 static int 861 bxe_hw_stats_update(struct bxe_softc *sc) 862 { 863 struct nig_stats *new = BXE_SP(sc, nig_stats); 864 struct nig_stats *old = &(sc->port.old_nig_stats); 865 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 866 struct bxe_eth_stats *estats = &sc->eth_stats; 867 uint32_t lpi_reg, nig_timer_max; 868 struct { 869 uint32_t lo; 870 uint32_t hi; 871 } diff; 872 873 switch (sc->link_vars.mac_type) { 874 case ELINK_MAC_TYPE_BMAC: 875 bxe_bmac_stats_update(sc); 876 break; 877 878 case ELINK_MAC_TYPE_EMAC: 879 bxe_emac_stats_update(sc); 880 break; 881 882 case ELINK_MAC_TYPE_UMAC: 883 case ELINK_MAC_TYPE_XMAC: 884 bxe_mstat_stats_update(sc); 885 break; 886 887 case ELINK_MAC_TYPE_NONE: /* unreached */ 888 BLOGD(sc, DBG_STATS, 889 "stats updated by DMAE but no MAC active\n"); 890 return (-1); 891 892 default: /* unreached */ 893 BLOGE(sc, "stats update failed, unknown MAC type\n"); 894 } 895 896 ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo, 897 new->brb_discard - old->brb_discard); 898 ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo, 899 new->brb_truncate - old->brb_truncate); 900 901 if (!CHIP_IS_E3(sc)) { 902 UPDATE_STAT64_NIG(egress_mac_pkt0, 903 etherstatspkts1024octetsto1522octets); 904 UPDATE_STAT64_NIG(egress_mac_pkt1, 905 etherstatspktsover1522octets); 906 } 907 908 memcpy(old, new, sizeof(struct nig_stats)); 909 910 memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]), 911 sizeof(struct mac_stx)); 912 estats->brb_drop_hi = pstats->brb_drop_hi; 913 estats->brb_drop_lo = pstats->brb_drop_lo; 914 915 pstats->host_port_stats_counter++; 916 917 if (CHIP_IS_E3(sc)) { 918 lpi_reg = (SC_PORT(sc)) ? 919 MISC_REG_CPMU_LP_SM_ENT_CNT_P1 : 920 MISC_REG_CPMU_LP_SM_ENT_CNT_P0; 921 estats->eee_tx_lpi += REG_RD(sc, lpi_reg); 922 } 923 924 if (!BXE_NOMCP(sc)) { 925 nig_timer_max = SHMEM_RD(sc, port_mb[SC_PORT(sc)].stat_nig_timer); 926 if (nig_timer_max != estats->nig_timer_max) { 927 estats->nig_timer_max = nig_timer_max; 928 BLOGE(sc, "invalid NIG timer max (%u)\n", 929 estats->nig_timer_max); 930 } 931 } 932 933 return (0); 934 } 935 936 static int 937 bxe_storm_stats_validate_counters(struct bxe_softc *sc) 938 { 939 struct stats_counter *counters = &sc->fw_stats_data->storm_counters; 940 uint16_t cur_stats_counter; 941 942 /* 943 * Make sure we use the value of the counter 944 * used for sending the last stats ramrod. 945 */ 946 BXE_STATS_LOCK(sc); 947 cur_stats_counter = (sc->stats_counter - 1); 948 BXE_STATS_UNLOCK(sc); 949 950 /* are storm stats valid? */ 951 if (le16toh(counters->xstats_counter) != cur_stats_counter) { 952 BLOGD(sc, DBG_STATS, 953 "stats not updated by xstorm, " 954 "counter 0x%x != stats_counter 0x%x\n", 955 le16toh(counters->xstats_counter), sc->stats_counter); 956 return (-EAGAIN); 957 } 958 959 if (le16toh(counters->ustats_counter) != cur_stats_counter) { 960 BLOGD(sc, DBG_STATS, 961 "stats not updated by ustorm, " 962 "counter 0x%x != stats_counter 0x%x\n", 963 le16toh(counters->ustats_counter), sc->stats_counter); 964 return (-EAGAIN); 965 } 966 967 if (le16toh(counters->cstats_counter) != cur_stats_counter) { 968 BLOGD(sc, DBG_STATS, 969 "stats not updated by cstorm, " 970 "counter 0x%x != stats_counter 0x%x\n", 971 le16toh(counters->cstats_counter), sc->stats_counter); 972 return (-EAGAIN); 973 } 974 975 if (le16toh(counters->tstats_counter) != cur_stats_counter) { 976 BLOGD(sc, DBG_STATS, 977 "stats not updated by tstorm, " 978 "counter 0x%x != stats_counter 0x%x\n", 979 le16toh(counters->tstats_counter), sc->stats_counter); 980 return (-EAGAIN); 981 } 982 983 return (0); 984 } 985 986 static int 987 bxe_storm_stats_update(struct bxe_softc *sc) 988 { 989 struct tstorm_per_port_stats *tport = 990 &sc->fw_stats_data->port.tstorm_port_statistics; 991 struct tstorm_per_pf_stats *tfunc = 992 &sc->fw_stats_data->pf.tstorm_pf_statistics; 993 struct host_func_stats *fstats = &sc->func_stats; 994 struct bxe_eth_stats *estats = &sc->eth_stats; 995 struct bxe_eth_stats_old *estats_old = &sc->eth_stats_old; 996 int i; 997 998 /* vfs stat counter is managed by pf */ 999 if (IS_PF(sc) && bxe_storm_stats_validate_counters(sc)) { 1000 return (-EAGAIN); 1001 } 1002 1003 estats->error_bytes_received_hi = 0; 1004 estats->error_bytes_received_lo = 0; 1005 1006 for (i = 0; i < sc->num_queues; i++) { 1007 struct bxe_fastpath *fp = &sc->fp[i]; 1008 struct tstorm_per_queue_stats *tclient = 1009 &sc->fw_stats_data->queue_stats[i].tstorm_queue_statistics; 1010 struct tstorm_per_queue_stats *old_tclient = &fp->old_tclient; 1011 struct ustorm_per_queue_stats *uclient = 1012 &sc->fw_stats_data->queue_stats[i].ustorm_queue_statistics; 1013 struct ustorm_per_queue_stats *old_uclient = &fp->old_uclient; 1014 struct xstorm_per_queue_stats *xclient = 1015 &sc->fw_stats_data->queue_stats[i].xstorm_queue_statistics; 1016 struct xstorm_per_queue_stats *old_xclient = &fp->old_xclient; 1017 struct bxe_eth_q_stats *qstats = &fp->eth_q_stats; 1018 struct bxe_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old; 1019 1020 uint32_t diff; 1021 1022 BLOGD(sc, DBG_STATS, 1023 "queue[%d]: ucast_sent 0x%x bcast_sent 0x%x mcast_sent 0x%x\n", 1024 i, xclient->ucast_pkts_sent, xclient->bcast_pkts_sent, 1025 xclient->mcast_pkts_sent); 1026 1027 BLOGD(sc, DBG_STATS, "---------------\n"); 1028 1029 UPDATE_QSTAT(tclient->rcv_bcast_bytes, 1030 total_broadcast_bytes_received); 1031 UPDATE_QSTAT(tclient->rcv_mcast_bytes, 1032 total_multicast_bytes_received); 1033 UPDATE_QSTAT(tclient->rcv_ucast_bytes, 1034 total_unicast_bytes_received); 1035 1036 /* 1037 * sum to total_bytes_received all 1038 * unicast/multicast/broadcast 1039 */ 1040 qstats->total_bytes_received_hi = 1041 qstats->total_broadcast_bytes_received_hi; 1042 qstats->total_bytes_received_lo = 1043 qstats->total_broadcast_bytes_received_lo; 1044 1045 ADD_64(qstats->total_bytes_received_hi, 1046 qstats->total_multicast_bytes_received_hi, 1047 qstats->total_bytes_received_lo, 1048 qstats->total_multicast_bytes_received_lo); 1049 1050 ADD_64(qstats->total_bytes_received_hi, 1051 qstats->total_unicast_bytes_received_hi, 1052 qstats->total_bytes_received_lo, 1053 qstats->total_unicast_bytes_received_lo); 1054 1055 qstats->valid_bytes_received_hi = qstats->total_bytes_received_hi; 1056 qstats->valid_bytes_received_lo = qstats->total_bytes_received_lo; 1057 1058 UPDATE_EXTEND_TSTAT(rcv_ucast_pkts, total_unicast_packets_received); 1059 UPDATE_EXTEND_TSTAT(rcv_mcast_pkts, total_multicast_packets_received); 1060 UPDATE_EXTEND_TSTAT(rcv_bcast_pkts, total_broadcast_packets_received); 1061 UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard, 1062 etherstatsoverrsizepkts, 32); 1063 UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard, 16); 1064 1065 SUB_EXTEND_USTAT(ucast_no_buff_pkts, total_unicast_packets_received); 1066 SUB_EXTEND_USTAT(mcast_no_buff_pkts, 1067 total_multicast_packets_received); 1068 SUB_EXTEND_USTAT(bcast_no_buff_pkts, 1069 total_broadcast_packets_received); 1070 UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard); 1071 UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard); 1072 UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard); 1073 1074 UPDATE_QSTAT(xclient->bcast_bytes_sent, 1075 total_broadcast_bytes_transmitted); 1076 UPDATE_QSTAT(xclient->mcast_bytes_sent, 1077 total_multicast_bytes_transmitted); 1078 UPDATE_QSTAT(xclient->ucast_bytes_sent, 1079 total_unicast_bytes_transmitted); 1080 1081 /* 1082 * sum to total_bytes_transmitted all 1083 * unicast/multicast/broadcast 1084 */ 1085 qstats->total_bytes_transmitted_hi = 1086 qstats->total_unicast_bytes_transmitted_hi; 1087 qstats->total_bytes_transmitted_lo = 1088 qstats->total_unicast_bytes_transmitted_lo; 1089 1090 ADD_64(qstats->total_bytes_transmitted_hi, 1091 qstats->total_broadcast_bytes_transmitted_hi, 1092 qstats->total_bytes_transmitted_lo, 1093 qstats->total_broadcast_bytes_transmitted_lo); 1094 1095 ADD_64(qstats->total_bytes_transmitted_hi, 1096 qstats->total_multicast_bytes_transmitted_hi, 1097 qstats->total_bytes_transmitted_lo, 1098 qstats->total_multicast_bytes_transmitted_lo); 1099 1100 UPDATE_EXTEND_XSTAT(ucast_pkts_sent, 1101 total_unicast_packets_transmitted); 1102 UPDATE_EXTEND_XSTAT(mcast_pkts_sent, 1103 total_multicast_packets_transmitted); 1104 UPDATE_EXTEND_XSTAT(bcast_pkts_sent, 1105 total_broadcast_packets_transmitted); 1106 1107 UPDATE_EXTEND_TSTAT(checksum_discard, 1108 total_packets_received_checksum_discarded); 1109 UPDATE_EXTEND_TSTAT(ttl0_discard, 1110 total_packets_received_ttl0_discarded); 1111 1112 UPDATE_EXTEND_XSTAT(error_drop_pkts, 1113 total_transmitted_dropped_packets_error); 1114 1115 /* TPA aggregations completed */ 1116 UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations); 1117 /* Number of network frames aggregated by TPA */ 1118 UPDATE_EXTEND_E_USTAT(coalesced_pkts, total_tpa_aggregated_frames); 1119 /* Total number of bytes in completed TPA aggregations */ 1120 UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes); 1121 1122 UPDATE_ESTAT_QSTAT_64(total_tpa_bytes); 1123 1124 UPDATE_FSTAT_QSTAT(total_bytes_received); 1125 UPDATE_FSTAT_QSTAT(total_bytes_transmitted); 1126 UPDATE_FSTAT_QSTAT(total_unicast_packets_received); 1127 UPDATE_FSTAT_QSTAT(total_multicast_packets_received); 1128 UPDATE_FSTAT_QSTAT(total_broadcast_packets_received); 1129 UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted); 1130 UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted); 1131 UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted); 1132 UPDATE_FSTAT_QSTAT(valid_bytes_received); 1133 } 1134 1135 ADD_64(estats->total_bytes_received_hi, 1136 estats->rx_stat_ifhcinbadoctets_hi, 1137 estats->total_bytes_received_lo, 1138 estats->rx_stat_ifhcinbadoctets_lo); 1139 1140 ADD_64_LE(estats->total_bytes_received_hi, 1141 tfunc->rcv_error_bytes.hi, 1142 estats->total_bytes_received_lo, 1143 tfunc->rcv_error_bytes.lo); 1144 1145 ADD_64_LE(estats->error_bytes_received_hi, 1146 tfunc->rcv_error_bytes.hi, 1147 estats->error_bytes_received_lo, 1148 tfunc->rcv_error_bytes.lo); 1149 1150 UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong); 1151 1152 ADD_64(estats->error_bytes_received_hi, 1153 estats->rx_stat_ifhcinbadoctets_hi, 1154 estats->error_bytes_received_lo, 1155 estats->rx_stat_ifhcinbadoctets_lo); 1156 1157 if (sc->port.pmf) { 1158 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old; 1159 UPDATE_FW_STAT(mac_filter_discard); 1160 UPDATE_FW_STAT(mf_tag_discard); 1161 UPDATE_FW_STAT(brb_truncate_discard); 1162 UPDATE_FW_STAT(mac_discard); 1163 } 1164 1165 fstats->host_func_stats_start = ++fstats->host_func_stats_end; 1166 1167 sc->stats_pending = 0; 1168 1169 return (0); 1170 } 1171 1172 static void 1173 bxe_net_stats_update(struct bxe_softc *sc) 1174 { 1175 1176 for (int i = 0; i < sc->num_queues; i++) 1177 if_inc_counter(sc->ifp, IFCOUNTER_IQDROPS, 1178 le32toh(sc->fp[i].old_tclient.checksum_discard)); 1179 } 1180 1181 uint64_t 1182 bxe_get_counter(if_t ifp, ift_counter cnt) 1183 { 1184 struct bxe_softc *sc; 1185 struct bxe_eth_stats *estats; 1186 1187 sc = if_getsoftc(ifp); 1188 estats = &sc->eth_stats; 1189 1190 switch (cnt) { 1191 case IFCOUNTER_IPACKETS: 1192 return (bxe_hilo(&estats->total_unicast_packets_received_hi) + 1193 bxe_hilo(&estats->total_multicast_packets_received_hi) + 1194 bxe_hilo(&estats->total_broadcast_packets_received_hi)); 1195 case IFCOUNTER_OPACKETS: 1196 return (bxe_hilo(&estats->total_unicast_packets_transmitted_hi) + 1197 bxe_hilo(&estats->total_multicast_packets_transmitted_hi) + 1198 bxe_hilo(&estats->total_broadcast_packets_transmitted_hi)); 1199 case IFCOUNTER_IBYTES: 1200 return (bxe_hilo(&estats->total_bytes_received_hi)); 1201 case IFCOUNTER_OBYTES: 1202 return (bxe_hilo(&estats->total_bytes_transmitted_hi)); 1203 case IFCOUNTER_IERRORS: 1204 return (bxe_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) + 1205 bxe_hilo(&estats->etherstatsoverrsizepkts_hi) + 1206 bxe_hilo(&estats->brb_drop_hi) + 1207 bxe_hilo(&estats->brb_truncate_hi) + 1208 bxe_hilo(&estats->rx_stat_dot3statsfcserrors_hi) + 1209 bxe_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi) + 1210 bxe_hilo(&estats->no_buff_discard_hi)); 1211 case IFCOUNTER_OERRORS: 1212 return (bxe_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi) + 1213 bxe_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi)); 1214 case IFCOUNTER_IMCASTS: 1215 return (bxe_hilo(&estats->total_multicast_packets_received_hi)); 1216 case IFCOUNTER_COLLISIONS: 1217 return (bxe_hilo(&estats->tx_stat_etherstatscollisions_hi) + 1218 bxe_hilo(&estats->tx_stat_dot3statslatecollisions_hi) + 1219 bxe_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi)); 1220 default: 1221 return (if_get_counter_default(ifp, cnt)); 1222 } 1223 } 1224 1225 static void 1226 bxe_drv_stats_update(struct bxe_softc *sc) 1227 { 1228 struct bxe_eth_stats *estats = &sc->eth_stats; 1229 int i; 1230 1231 for (i = 0; i < sc->num_queues; i++) { 1232 struct bxe_eth_q_stats *qstats = &sc->fp[i].eth_q_stats; 1233 struct bxe_eth_q_stats_old *qstats_old = &sc->fp[i].eth_q_stats_old; 1234 1235 UPDATE_ESTAT_QSTAT(rx_calls); 1236 UPDATE_ESTAT_QSTAT(rx_pkts); 1237 UPDATE_ESTAT_QSTAT(rx_tpa_pkts); 1238 UPDATE_ESTAT_QSTAT(rx_erroneous_jumbo_sge_pkts); 1239 UPDATE_ESTAT_QSTAT(rx_bxe_service_rxsgl); 1240 UPDATE_ESTAT_QSTAT(rx_jumbo_sge_pkts); 1241 UPDATE_ESTAT_QSTAT(rx_soft_errors); 1242 UPDATE_ESTAT_QSTAT(rx_hw_csum_errors); 1243 UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_ip); 1244 UPDATE_ESTAT_QSTAT(rx_ofld_frames_csum_tcp_udp); 1245 UPDATE_ESTAT_QSTAT(rx_budget_reached); 1246 UPDATE_ESTAT_QSTAT(tx_pkts); 1247 UPDATE_ESTAT_QSTAT(tx_soft_errors); 1248 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_ip); 1249 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_tcp); 1250 UPDATE_ESTAT_QSTAT(tx_ofld_frames_csum_udp); 1251 UPDATE_ESTAT_QSTAT(tx_ofld_frames_lso); 1252 UPDATE_ESTAT_QSTAT(tx_ofld_frames_lso_hdr_splits); 1253 UPDATE_ESTAT_QSTAT(tx_encap_failures); 1254 UPDATE_ESTAT_QSTAT(tx_hw_queue_full); 1255 UPDATE_ESTAT_QSTAT(tx_hw_max_queue_depth); 1256 UPDATE_ESTAT_QSTAT(tx_dma_mapping_failure); 1257 UPDATE_ESTAT_QSTAT(tx_max_drbr_queue_depth); 1258 UPDATE_ESTAT_QSTAT(tx_window_violation_std); 1259 UPDATE_ESTAT_QSTAT(tx_window_violation_tso); 1260 //UPDATE_ESTAT_QSTAT(tx_unsupported_tso_request_ipv6); 1261 //UPDATE_ESTAT_QSTAT(tx_unsupported_tso_request_not_tcp); 1262 UPDATE_ESTAT_QSTAT(tx_chain_lost_mbuf); 1263 UPDATE_ESTAT_QSTAT(tx_frames_deferred); 1264 UPDATE_ESTAT_QSTAT(tx_queue_xoff); 1265 1266 /* mbuf driver statistics */ 1267 UPDATE_ESTAT_QSTAT(mbuf_defrag_attempts); 1268 UPDATE_ESTAT_QSTAT(mbuf_defrag_failures); 1269 UPDATE_ESTAT_QSTAT(mbuf_rx_bd_alloc_failed); 1270 UPDATE_ESTAT_QSTAT(mbuf_rx_bd_mapping_failed); 1271 UPDATE_ESTAT_QSTAT(mbuf_rx_tpa_alloc_failed); 1272 UPDATE_ESTAT_QSTAT(mbuf_rx_tpa_mapping_failed); 1273 UPDATE_ESTAT_QSTAT(mbuf_rx_sge_alloc_failed); 1274 UPDATE_ESTAT_QSTAT(mbuf_rx_sge_mapping_failed); 1275 1276 /* track the number of allocated mbufs */ 1277 UPDATE_ESTAT_QSTAT(mbuf_alloc_tx); 1278 UPDATE_ESTAT_QSTAT(mbuf_alloc_rx); 1279 UPDATE_ESTAT_QSTAT(mbuf_alloc_sge); 1280 UPDATE_ESTAT_QSTAT(mbuf_alloc_tpa); 1281 } 1282 } 1283 1284 static uint8_t 1285 bxe_edebug_stats_stopped(struct bxe_softc *sc) 1286 { 1287 uint32_t val; 1288 1289 if (SHMEM2_HAS(sc, edebug_driver_if[1])) { 1290 val = SHMEM2_RD(sc, edebug_driver_if[1]); 1291 1292 if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT) { 1293 return (TRUE); 1294 } 1295 } 1296 1297 return (FALSE); 1298 } 1299 1300 static void 1301 bxe_stats_update(struct bxe_softc *sc) 1302 { 1303 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 1304 1305 if (bxe_edebug_stats_stopped(sc)) { 1306 return; 1307 } 1308 1309 if (IS_PF(sc)) { 1310 if (*stats_comp != DMAE_COMP_VAL) { 1311 return; 1312 } 1313 1314 if (sc->port.pmf) { 1315 bxe_hw_stats_update(sc); 1316 } 1317 1318 if (bxe_storm_stats_update(sc)) { 1319 if (sc->stats_pending++ == 3) { 1320 if (if_getdrvflags(sc->ifp) & IFF_DRV_RUNNING) { 1321 if(sc->trigger_grcdump) { 1322 /* taking grcdump */ 1323 bxe_grc_dump(sc); 1324 } 1325 atomic_store_rel_long(&sc->chip_tq_flags, CHIP_TQ_REINIT); 1326 taskqueue_enqueue(sc->chip_tq, &sc->chip_tq_task); 1327 } 1328 } 1329 return; 1330 } 1331 } else { 1332 /* 1333 * VF doesn't collect HW statistics, and doesn't get completions, 1334 * performs only update. 1335 */ 1336 bxe_storm_stats_update(sc); 1337 } 1338 1339 bxe_net_stats_update(sc); 1340 bxe_drv_stats_update(sc); 1341 1342 /* vf is done */ 1343 if (IS_VF(sc)) { 1344 return; 1345 } 1346 1347 bxe_hw_stats_post(sc); 1348 bxe_storm_stats_post(sc); 1349 } 1350 1351 static void 1352 bxe_port_stats_stop(struct bxe_softc *sc) 1353 { 1354 struct dmae_cmd *dmae; 1355 uint32_t opcode; 1356 int loader_idx = PMF_DMAE_C(sc); 1357 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 1358 1359 sc->executer_idx = 0; 1360 1361 opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, FALSE, 0); 1362 1363 if (sc->port.port_stx) { 1364 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 1365 1366 if (sc->func_stx) { 1367 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC); 1368 } else { 1369 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); 1370 } 1371 1372 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats)); 1373 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats)); 1374 dmae->dst_addr_lo = sc->port.port_stx >> 2; 1375 dmae->dst_addr_hi = 0; 1376 dmae->len = bxe_get_port_stats_dma_len(sc); 1377 if (sc->func_stx) { 1378 dmae->comp_addr_lo = (dmae_reg_go_c[loader_idx] >> 2); 1379 dmae->comp_addr_hi = 0; 1380 dmae->comp_val = 1; 1381 } else { 1382 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 1383 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 1384 dmae->comp_val = DMAE_COMP_VAL; 1385 1386 *stats_comp = 0; 1387 } 1388 } 1389 1390 if (sc->func_stx) { 1391 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 1392 dmae->opcode = bxe_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI); 1393 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, func_stats)); 1394 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, func_stats)); 1395 dmae->dst_addr_lo = (sc->func_stx >> 2); 1396 dmae->dst_addr_hi = 0; 1397 dmae->len = (sizeof(struct host_func_stats) >> 2); 1398 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 1399 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 1400 dmae->comp_val = DMAE_COMP_VAL; 1401 1402 *stats_comp = 0; 1403 } 1404 } 1405 1406 static void 1407 bxe_stats_stop(struct bxe_softc *sc) 1408 { 1409 uint8_t update = FALSE; 1410 1411 bxe_stats_comp(sc); 1412 1413 if (sc->port.pmf) { 1414 update = bxe_hw_stats_update(sc) == 0; 1415 } 1416 1417 update |= bxe_storm_stats_update(sc) == 0; 1418 1419 if (update) { 1420 bxe_net_stats_update(sc); 1421 1422 if (sc->port.pmf) { 1423 bxe_port_stats_stop(sc); 1424 } 1425 1426 bxe_hw_stats_post(sc); 1427 bxe_stats_comp(sc); 1428 } 1429 } 1430 1431 static void 1432 bxe_stats_do_nothing(struct bxe_softc *sc) 1433 { 1434 return; 1435 } 1436 1437 static const struct { 1438 void (*action)(struct bxe_softc *sc); 1439 enum bxe_stats_state next_state; 1440 } bxe_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = { 1441 { 1442 /* DISABLED PMF */ { bxe_stats_pmf_update, STATS_STATE_DISABLED }, 1443 /* LINK_UP */ { bxe_stats_start, STATS_STATE_ENABLED }, 1444 /* UPDATE */ { bxe_stats_do_nothing, STATS_STATE_DISABLED }, 1445 /* STOP */ { bxe_stats_do_nothing, STATS_STATE_DISABLED } 1446 }, 1447 { 1448 /* ENABLED PMF */ { bxe_stats_pmf_start, STATS_STATE_ENABLED }, 1449 /* LINK_UP */ { bxe_stats_restart, STATS_STATE_ENABLED }, 1450 /* UPDATE */ { bxe_stats_update, STATS_STATE_ENABLED }, 1451 /* STOP */ { bxe_stats_stop, STATS_STATE_DISABLED } 1452 } 1453 }; 1454 1455 void bxe_stats_handle(struct bxe_softc *sc, 1456 enum bxe_stats_event event) 1457 { 1458 enum bxe_stats_state state; 1459 1460 if (__predict_false(sc->panic)) { 1461 return; 1462 } 1463 1464 BXE_STATS_LOCK(sc); 1465 state = sc->stats_state; 1466 sc->stats_state = bxe_stats_stm[state][event].next_state; 1467 BXE_STATS_UNLOCK(sc); 1468 1469 bxe_stats_stm[state][event].action(sc); 1470 1471 if (event != STATS_EVENT_UPDATE) { 1472 BLOGD(sc, DBG_STATS, 1473 "state %d -> event %d -> state %d\n", 1474 state, event, sc->stats_state); 1475 } 1476 } 1477 1478 static void 1479 bxe_port_stats_base_init(struct bxe_softc *sc) 1480 { 1481 struct dmae_cmd *dmae; 1482 uint32_t *stats_comp = BXE_SP(sc, stats_comp); 1483 1484 /* sanity */ 1485 if (!sc->port.pmf || !sc->port.port_stx) { 1486 BLOGE(sc, "BUG!\n"); 1487 return; 1488 } 1489 1490 sc->executer_idx = 0; 1491 1492 dmae = BXE_SP(sc, dmae[sc->executer_idx++]); 1493 dmae->opcode = bxe_dmae_opcode(sc, DMAE_SRC_PCI, DMAE_DST_GRC, 1494 TRUE, DMAE_COMP_PCI); 1495 dmae->src_addr_lo = U64_LO(BXE_SP_MAPPING(sc, port_stats)); 1496 dmae->src_addr_hi = U64_HI(BXE_SP_MAPPING(sc, port_stats)); 1497 dmae->dst_addr_lo = (sc->port.port_stx >> 2); 1498 dmae->dst_addr_hi = 0; 1499 dmae->len = bxe_get_port_stats_dma_len(sc); 1500 dmae->comp_addr_lo = U64_LO(BXE_SP_MAPPING(sc, stats_comp)); 1501 dmae->comp_addr_hi = U64_HI(BXE_SP_MAPPING(sc, stats_comp)); 1502 dmae->comp_val = DMAE_COMP_VAL; 1503 1504 *stats_comp = 0; 1505 bxe_hw_stats_post(sc); 1506 bxe_stats_comp(sc); 1507 } 1508 1509 /* 1510 * This function will prepare the statistics ramrod data the way 1511 * we will only have to increment the statistics counter and 1512 * send the ramrod each time we have to. 1513 */ 1514 static void 1515 bxe_prep_fw_stats_req(struct bxe_softc *sc) 1516 { 1517 int i; 1518 int first_queue_query_index; 1519 struct stats_query_header *stats_hdr = &sc->fw_stats_req->hdr; 1520 bus_addr_t cur_data_offset; 1521 struct stats_query_entry *cur_query_entry; 1522 1523 stats_hdr->cmd_num = sc->fw_stats_num; 1524 stats_hdr->drv_stats_counter = 0; 1525 1526 /* 1527 * The storm_counters struct contains the counters of completed 1528 * statistics requests per storm which are incremented by FW 1529 * each time it completes hadning a statistics ramrod. We will 1530 * check these counters in the timer handler and discard a 1531 * (statistics) ramrod completion. 1532 */ 1533 cur_data_offset = (sc->fw_stats_data_mapping + 1534 offsetof(struct bxe_fw_stats_data, storm_counters)); 1535 1536 stats_hdr->stats_counters_addrs.hi = htole32(U64_HI(cur_data_offset)); 1537 stats_hdr->stats_counters_addrs.lo = htole32(U64_LO(cur_data_offset)); 1538 1539 /* 1540 * Prepare the first stats ramrod (will be completed with 1541 * the counters equal to zero) - init counters to somethig different. 1542 */ 1543 memset(&sc->fw_stats_data->storm_counters, 0xff, 1544 sizeof(struct stats_counter)); 1545 1546 /**** Port FW statistics data ****/ 1547 cur_data_offset = (sc->fw_stats_data_mapping + 1548 offsetof(struct bxe_fw_stats_data, port)); 1549 1550 cur_query_entry = &sc->fw_stats_req->query[BXE_PORT_QUERY_IDX]; 1551 1552 cur_query_entry->kind = STATS_TYPE_PORT; 1553 /* For port query index is a DONT CARE */ 1554 cur_query_entry->index = SC_PORT(sc); 1555 /* For port query funcID is a DONT CARE */ 1556 cur_query_entry->funcID = htole16(SC_FUNC(sc)); 1557 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset)); 1558 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); 1559 1560 /**** PF FW statistics data ****/ 1561 cur_data_offset = (sc->fw_stats_data_mapping + 1562 offsetof(struct bxe_fw_stats_data, pf)); 1563 1564 cur_query_entry = &sc->fw_stats_req->query[BXE_PF_QUERY_IDX]; 1565 1566 cur_query_entry->kind = STATS_TYPE_PF; 1567 /* For PF query index is a DONT CARE */ 1568 cur_query_entry->index = SC_PORT(sc); 1569 cur_query_entry->funcID = htole16(SC_FUNC(sc)); 1570 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset)); 1571 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); 1572 1573 /**** Clients' queries ****/ 1574 cur_data_offset = (sc->fw_stats_data_mapping + 1575 offsetof(struct bxe_fw_stats_data, queue_stats)); 1576 1577 /* 1578 * First queue query index depends whether FCoE offloaded request will 1579 * be included in the ramrod 1580 */ 1581 first_queue_query_index = (BXE_FIRST_QUEUE_QUERY_IDX - 1); 1582 1583 for (i = 0; i < sc->num_queues; i++) { 1584 cur_query_entry = 1585 &sc->fw_stats_req->query[first_queue_query_index + i]; 1586 1587 cur_query_entry->kind = STATS_TYPE_QUEUE; 1588 cur_query_entry->index = bxe_stats_id(&sc->fp[i]); 1589 cur_query_entry->funcID = htole16(SC_FUNC(sc)); 1590 cur_query_entry->address.hi = htole32(U64_HI(cur_data_offset)); 1591 cur_query_entry->address.lo = htole32(U64_LO(cur_data_offset)); 1592 1593 cur_data_offset += sizeof(struct per_queue_stats); 1594 } 1595 } 1596 1597 void 1598 bxe_stats_init(struct bxe_softc *sc) 1599 { 1600 int /*abs*/port = SC_PORT(sc); 1601 int mb_idx = SC_FW_MB_IDX(sc); 1602 int i; 1603 1604 sc->stats_pending = 0; 1605 sc->executer_idx = 0; 1606 sc->stats_counter = 0; 1607 1608 /* port and func stats for management */ 1609 if (!BXE_NOMCP(sc)) { 1610 sc->port.port_stx = SHMEM_RD(sc, port_mb[port].port_stx); 1611 sc->func_stx = SHMEM_RD(sc, func_mb[mb_idx].fw_mb_param); 1612 } else { 1613 sc->port.port_stx = 0; 1614 sc->func_stx = 0; 1615 } 1616 1617 BLOGD(sc, DBG_STATS, "port_stx 0x%x func_stx 0x%x\n", 1618 sc->port.port_stx, sc->func_stx); 1619 1620 /* pmf should retrieve port statistics from SP on a non-init*/ 1621 if (!sc->stats_init && sc->port.pmf && sc->port.port_stx) { 1622 bxe_stats_handle(sc, STATS_EVENT_PMF); 1623 } 1624 1625 port = SC_PORT(sc); 1626 /* port stats */ 1627 memset(&(sc->port.old_nig_stats), 0, sizeof(struct nig_stats)); 1628 sc->port.old_nig_stats.brb_discard = 1629 REG_RD(sc, NIG_REG_STAT0_BRB_DISCARD + port*0x38); 1630 sc->port.old_nig_stats.brb_truncate = 1631 REG_RD(sc, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38); 1632 if (!CHIP_IS_E3(sc)) { 1633 REG_RD_DMAE(sc, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50, 1634 &(sc->port.old_nig_stats.egress_mac_pkt0_lo), 2); 1635 REG_RD_DMAE(sc, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50, 1636 &(sc->port.old_nig_stats.egress_mac_pkt1_lo), 2); 1637 } 1638 1639 /* function stats */ 1640 for (i = 0; i < sc->num_queues; i++) { 1641 memset(&sc->fp[i].old_tclient, 0, sizeof(sc->fp[i].old_tclient)); 1642 memset(&sc->fp[i].old_uclient, 0, sizeof(sc->fp[i].old_uclient)); 1643 memset(&sc->fp[i].old_xclient, 0, sizeof(sc->fp[i].old_xclient)); 1644 if (sc->stats_init) { 1645 memset(&sc->fp[i].eth_q_stats, 0, 1646 sizeof(sc->fp[i].eth_q_stats)); 1647 memset(&sc->fp[i].eth_q_stats_old, 0, 1648 sizeof(sc->fp[i].eth_q_stats_old)); 1649 } 1650 } 1651 1652 /* prepare statistics ramrod data */ 1653 bxe_prep_fw_stats_req(sc); 1654 1655 if (sc->stats_init) { 1656 memset(&sc->net_stats_old, 0, sizeof(sc->net_stats_old)); 1657 memset(&sc->fw_stats_old, 0, sizeof(sc->fw_stats_old)); 1658 memset(&sc->eth_stats_old, 0, sizeof(sc->eth_stats_old)); 1659 memset(&sc->eth_stats, 0, sizeof(sc->eth_stats)); 1660 memset(&sc->func_stats, 0, sizeof(sc->func_stats)); 1661 1662 /* Clean SP from previous statistics */ 1663 if (sc->func_stx) { 1664 memset(BXE_SP(sc, func_stats), 0, sizeof(struct host_func_stats)); 1665 bxe_func_stats_init(sc); 1666 bxe_hw_stats_post(sc); 1667 bxe_stats_comp(sc); 1668 } 1669 } 1670 1671 sc->stats_state = STATS_STATE_DISABLED; 1672 1673 if (sc->port.pmf && sc->port.port_stx) { 1674 bxe_port_stats_base_init(sc); 1675 } 1676 1677 /* mark the end of statistics initialization */ 1678 sc->stats_init = FALSE; 1679 } 1680 1681 void 1682 bxe_save_statistics(struct bxe_softc *sc) 1683 { 1684 int i; 1685 1686 /* save queue statistics */ 1687 for (i = 0; i < sc->num_queues; i++) { 1688 struct bxe_fastpath *fp = &sc->fp[i]; 1689 struct bxe_eth_q_stats *qstats = &fp->eth_q_stats; 1690 struct bxe_eth_q_stats_old *qstats_old = &fp->eth_q_stats_old; 1691 1692 UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi); 1693 UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo); 1694 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi); 1695 UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo); 1696 UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi); 1697 UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo); 1698 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi); 1699 UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo); 1700 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi); 1701 UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo); 1702 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi); 1703 UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo); 1704 UPDATE_QSTAT_OLD(total_tpa_bytes_hi); 1705 UPDATE_QSTAT_OLD(total_tpa_bytes_lo); 1706 } 1707 1708 /* store port firmware statistics */ 1709 if (sc->port.pmf) { 1710 struct bxe_eth_stats *estats = &sc->eth_stats; 1711 struct bxe_fw_port_stats_old *fwstats = &sc->fw_stats_old; 1712 struct host_port_stats *pstats = BXE_SP(sc, port_stats); 1713 1714 fwstats->pfc_frames_rx_hi = pstats->pfc_frames_rx_hi; 1715 fwstats->pfc_frames_rx_lo = pstats->pfc_frames_rx_lo; 1716 fwstats->pfc_frames_tx_hi = pstats->pfc_frames_tx_hi; 1717 fwstats->pfc_frames_tx_lo = pstats->pfc_frames_tx_lo; 1718 1719 if (IS_MF(sc)) { 1720 UPDATE_FW_STAT_OLD(mac_filter_discard); 1721 UPDATE_FW_STAT_OLD(mf_tag_discard); 1722 UPDATE_FW_STAT_OLD(brb_truncate_discard); 1723 UPDATE_FW_STAT_OLD(mac_discard); 1724 } 1725 } 1726 } 1727 1728 void 1729 bxe_afex_collect_stats(struct bxe_softc *sc, 1730 void *void_afex_stats, 1731 uint32_t stats_type) 1732 { 1733 int i; 1734 struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats; 1735 struct bxe_eth_stats *estats = &sc->eth_stats; 1736 1737 memset(afex_stats, 0, sizeof(struct afex_stats)); 1738 1739 for (i = 0; i < sc->num_queues; i++) { 1740 struct bxe_eth_q_stats *qstats = &sc->fp[i].eth_q_stats; 1741 1742 ADD_64(afex_stats->rx_unicast_bytes_hi, 1743 qstats->total_unicast_bytes_received_hi, 1744 afex_stats->rx_unicast_bytes_lo, 1745 qstats->total_unicast_bytes_received_lo); 1746 1747 ADD_64(afex_stats->rx_broadcast_bytes_hi, 1748 qstats->total_broadcast_bytes_received_hi, 1749 afex_stats->rx_broadcast_bytes_lo, 1750 qstats->total_broadcast_bytes_received_lo); 1751 1752 ADD_64(afex_stats->rx_multicast_bytes_hi, 1753 qstats->total_multicast_bytes_received_hi, 1754 afex_stats->rx_multicast_bytes_lo, 1755 qstats->total_multicast_bytes_received_lo); 1756 1757 ADD_64(afex_stats->rx_unicast_frames_hi, 1758 qstats->total_unicast_packets_received_hi, 1759 afex_stats->rx_unicast_frames_lo, 1760 qstats->total_unicast_packets_received_lo); 1761 1762 ADD_64(afex_stats->rx_broadcast_frames_hi, 1763 qstats->total_broadcast_packets_received_hi, 1764 afex_stats->rx_broadcast_frames_lo, 1765 qstats->total_broadcast_packets_received_lo); 1766 1767 ADD_64(afex_stats->rx_multicast_frames_hi, 1768 qstats->total_multicast_packets_received_hi, 1769 afex_stats->rx_multicast_frames_lo, 1770 qstats->total_multicast_packets_received_lo); 1771 1772 /* 1773 * sum to rx_frames_discarded all discarded 1774 * packets due to size, ttl0 and checksum 1775 */ 1776 ADD_64(afex_stats->rx_frames_discarded_hi, 1777 qstats->total_packets_received_checksum_discarded_hi, 1778 afex_stats->rx_frames_discarded_lo, 1779 qstats->total_packets_received_checksum_discarded_lo); 1780 1781 ADD_64(afex_stats->rx_frames_discarded_hi, 1782 qstats->total_packets_received_ttl0_discarded_hi, 1783 afex_stats->rx_frames_discarded_lo, 1784 qstats->total_packets_received_ttl0_discarded_lo); 1785 1786 ADD_64(afex_stats->rx_frames_discarded_hi, 1787 qstats->etherstatsoverrsizepkts_hi, 1788 afex_stats->rx_frames_discarded_lo, 1789 qstats->etherstatsoverrsizepkts_lo); 1790 1791 ADD_64(afex_stats->rx_frames_dropped_hi, 1792 qstats->no_buff_discard_hi, 1793 afex_stats->rx_frames_dropped_lo, 1794 qstats->no_buff_discard_lo); 1795 1796 ADD_64(afex_stats->tx_unicast_bytes_hi, 1797 qstats->total_unicast_bytes_transmitted_hi, 1798 afex_stats->tx_unicast_bytes_lo, 1799 qstats->total_unicast_bytes_transmitted_lo); 1800 1801 ADD_64(afex_stats->tx_broadcast_bytes_hi, 1802 qstats->total_broadcast_bytes_transmitted_hi, 1803 afex_stats->tx_broadcast_bytes_lo, 1804 qstats->total_broadcast_bytes_transmitted_lo); 1805 1806 ADD_64(afex_stats->tx_multicast_bytes_hi, 1807 qstats->total_multicast_bytes_transmitted_hi, 1808 afex_stats->tx_multicast_bytes_lo, 1809 qstats->total_multicast_bytes_transmitted_lo); 1810 1811 ADD_64(afex_stats->tx_unicast_frames_hi, 1812 qstats->total_unicast_packets_transmitted_hi, 1813 afex_stats->tx_unicast_frames_lo, 1814 qstats->total_unicast_packets_transmitted_lo); 1815 1816 ADD_64(afex_stats->tx_broadcast_frames_hi, 1817 qstats->total_broadcast_packets_transmitted_hi, 1818 afex_stats->tx_broadcast_frames_lo, 1819 qstats->total_broadcast_packets_transmitted_lo); 1820 1821 ADD_64(afex_stats->tx_multicast_frames_hi, 1822 qstats->total_multicast_packets_transmitted_hi, 1823 afex_stats->tx_multicast_frames_lo, 1824 qstats->total_multicast_packets_transmitted_lo); 1825 1826 ADD_64(afex_stats->tx_frames_dropped_hi, 1827 qstats->total_transmitted_dropped_packets_error_hi, 1828 afex_stats->tx_frames_dropped_lo, 1829 qstats->total_transmitted_dropped_packets_error_lo); 1830 } 1831 1832 /* 1833 * If port stats are requested, add them to the PMF 1834 * stats, as anyway they will be accumulated by the 1835 * MCP before sent to the switch 1836 */ 1837 if ((sc->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) { 1838 ADD_64(afex_stats->rx_frames_dropped_hi, 1839 0, 1840 afex_stats->rx_frames_dropped_lo, 1841 estats->mac_filter_discard); 1842 ADD_64(afex_stats->rx_frames_dropped_hi, 1843 0, 1844 afex_stats->rx_frames_dropped_lo, 1845 estats->brb_truncate_discard); 1846 ADD_64(afex_stats->rx_frames_discarded_hi, 1847 0, 1848 afex_stats->rx_frames_discarded_lo, 1849 estats->mac_discard); 1850 } 1851 } 1852 1853