xref: /freebsd/sys/dev/bnxt/bnxt_en/bnxt_mgmt.h (revision 35b53f8c989f62286aad075ef2e97bba358144f8)
1*35b53f8cSChandrakanth patil /*
2*35b53f8cSChandrakanth patil  * Broadcom NetXtreme-C/E network driver.
3*35b53f8cSChandrakanth patil  *
4*35b53f8cSChandrakanth patil  * Copyright (c) 2022 Broadcom, All Rights Reserved.
5*35b53f8cSChandrakanth patil  * The term Broadcom refers to Broadcom Limited and/or its subsidiaries
6*35b53f8cSChandrakanth patil  *
7*35b53f8cSChandrakanth patil  * Redistribution and use in source and binary forms, with or without
8*35b53f8cSChandrakanth patil  * modification, are permitted provided that the following conditions
9*35b53f8cSChandrakanth patil  * are met:
10*35b53f8cSChandrakanth patil  * 1. Redistributions of source code must retain the above copyright
11*35b53f8cSChandrakanth patil  *    notice, this list of conditions and the following disclaimer.
12*35b53f8cSChandrakanth patil  * 2. Redistributions in binary form must reproduce the above copyright
13*35b53f8cSChandrakanth patil  *    notice, this list of conditions and the following disclaimer in the
14*35b53f8cSChandrakanth patil  *    documentation and/or other materials provided with the distribution.
15*35b53f8cSChandrakanth patil  *
16*35b53f8cSChandrakanth patil  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS'
17*35b53f8cSChandrakanth patil  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18*35b53f8cSChandrakanth patil  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19*35b53f8cSChandrakanth patil  * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
20*35b53f8cSChandrakanth patil  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21*35b53f8cSChandrakanth patil  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22*35b53f8cSChandrakanth patil  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23*35b53f8cSChandrakanth patil  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24*35b53f8cSChandrakanth patil  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25*35b53f8cSChandrakanth patil  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
26*35b53f8cSChandrakanth patil  * THE POSSIBILITY OF SUCH DAMAGE.
27*35b53f8cSChandrakanth patil  */
28*35b53f8cSChandrakanth patil 
29*35b53f8cSChandrakanth patil #include "bnxt.h"
30*35b53f8cSChandrakanth patil #include <sys/types.h>
31*35b53f8cSChandrakanth patil #include <sys/systm.h>
32*35b53f8cSChandrakanth patil #include <sys/param.h>
33*35b53f8cSChandrakanth patil #include <sys/module.h>
34*35b53f8cSChandrakanth patil #include <sys/kernel.h>
35*35b53f8cSChandrakanth patil #include <sys/conf.h>
36*35b53f8cSChandrakanth patil #include <sys/uio.h>
37*35b53f8cSChandrakanth patil #include <sys/malloc.h>
38*35b53f8cSChandrakanth patil 
39*35b53f8cSChandrakanth patil 
40*35b53f8cSChandrakanth patil #define	DRIVER_NAME				"if_bnxt"
41*35b53f8cSChandrakanth patil 
42*35b53f8cSChandrakanth patil #define	BNXT_MGMT_OPCODE_GET_DEV_INFO		0x80000000
43*35b53f8cSChandrakanth patil #define	BNXT_MGMT_OPCODE_PASSTHROUGH_HWRM	0x80000001
44*35b53f8cSChandrakanth patil #define	BNXT_MGMT_OPCODE_DCB_OPS		0x80000002
45*35b53f8cSChandrakanth patil 
46*35b53f8cSChandrakanth patil #define BNXT_MGMT_MAX_HWRM_REQ_LENGTH		HWRM_MAX_REQ_LEN
47*35b53f8cSChandrakanth patil #define BNXT_MGMT_MAX_HWRM_RESP_LENGTH		(512)
48*35b53f8cSChandrakanth patil 
49*35b53f8cSChandrakanth patil struct bnxt_nic_info {
50*35b53f8cSChandrakanth patil #define BNXT_MAX_STR 64
51*35b53f8cSChandrakanth patil 	char dev_name[BNXT_MAX_STR];
52*35b53f8cSChandrakanth patil 	char driver_version[BNXT_MAX_STR];
53*35b53f8cSChandrakanth patil 	char driver_name[BNXT_MAX_STR];
54*35b53f8cSChandrakanth patil 	char device_serial_number[64];
55*35b53f8cSChandrakanth patil 	uint32_t mtu;
56*35b53f8cSChandrakanth patil 	uint8_t mac[ETHER_ADDR_LEN];
57*35b53f8cSChandrakanth patil 	uint32_t pci_link_speed;
58*35b53f8cSChandrakanth patil 	uint32_t pci_link_width;
59*35b53f8cSChandrakanth patil 	uint32_t rsvd[4];
60*35b53f8cSChandrakanth patil } __packed;
61*35b53f8cSChandrakanth patil 
62*35b53f8cSChandrakanth patil struct bnxt_pci_info {
63*35b53f8cSChandrakanth patil         uint16_t domain_no;
64*35b53f8cSChandrakanth patil         uint16_t bus_no;
65*35b53f8cSChandrakanth patil         uint16_t device_no;
66*35b53f8cSChandrakanth patil         uint16_t function_no;
67*35b53f8cSChandrakanth patil         uint16_t vendor_id;
68*35b53f8cSChandrakanth patil         uint16_t device_id;
69*35b53f8cSChandrakanth patil         uint16_t sub_system_vendor_id;
70*35b53f8cSChandrakanth patil         uint16_t sub_system_device_id;
71*35b53f8cSChandrakanth patil         uint16_t revision;
72*35b53f8cSChandrakanth patil         uint32_t chip_rev_id;
73*35b53f8cSChandrakanth patil 	uint32_t rsvd[2];
74*35b53f8cSChandrakanth patil } __packed;
75*35b53f8cSChandrakanth patil 
76*35b53f8cSChandrakanth patil struct bnxt_dev_info {
77*35b53f8cSChandrakanth patil         struct bnxt_nic_info nic_info;
78*35b53f8cSChandrakanth patil         struct bnxt_pci_info pci_info;
79*35b53f8cSChandrakanth patil } __packed;
80*35b53f8cSChandrakanth patil 
81*35b53f8cSChandrakanth patil struct dma_info {
82*35b53f8cSChandrakanth patil         uint64_t data;
83*35b53f8cSChandrakanth patil         uint32_t length;
84*35b53f8cSChandrakanth patil         uint16_t offset;
85*35b53f8cSChandrakanth patil         uint8_t read_or_write;
86*35b53f8cSChandrakanth patil         uint8_t unused;
87*35b53f8cSChandrakanth patil };
88*35b53f8cSChandrakanth patil 
89*35b53f8cSChandrakanth patil struct bnxt_mgmt_fw_msg {
90*35b53f8cSChandrakanth patil         uint64_t usr_req;
91*35b53f8cSChandrakanth patil         uint64_t usr_resp;
92*35b53f8cSChandrakanth patil         uint32_t len_req;
93*35b53f8cSChandrakanth patil         uint32_t len_resp;
94*35b53f8cSChandrakanth patil         uint32_t timeout;
95*35b53f8cSChandrakanth patil         uint32_t num_dma_indications;
96*35b53f8cSChandrakanth patil         struct dma_info dma[0];
97*35b53f8cSChandrakanth patil };
98*35b53f8cSChandrakanth patil 
99*35b53f8cSChandrakanth patil struct bnxt_mgmt_generic_msg {
100*35b53f8cSChandrakanth patil         uint8_t key;
101*35b53f8cSChandrakanth patil #define BNXT_LFC_KEY_DOMAIN_NO  1
102*35b53f8cSChandrakanth patil         uint8_t reserved[3];
103*35b53f8cSChandrakanth patil         uint32_t value;
104*35b53f8cSChandrakanth patil };
105*35b53f8cSChandrakanth patil 
106*35b53f8cSChandrakanth patil enum bnxt_mgmt_req_type {
107*35b53f8cSChandrakanth patil         BNXT_MGMT_NVM_GET_VAR_REQ = 1,
108*35b53f8cSChandrakanth patil         BNXT_MGMT_NVM_SET_VAR_REQ,
109*35b53f8cSChandrakanth patil         BNXT_MGMT_NVM_FLUSH_REQ,
110*35b53f8cSChandrakanth patil         BNXT_MGMT_GENERIC_HWRM_REQ,
111*35b53f8cSChandrakanth patil };
112*35b53f8cSChandrakanth patil 
113*35b53f8cSChandrakanth patil struct bnxt_mgmt_req_hdr {
114*35b53f8cSChandrakanth patil         uint32_t ver;
115*35b53f8cSChandrakanth patil 	uint32_t domain;
116*35b53f8cSChandrakanth patil         uint32_t bus;
117*35b53f8cSChandrakanth patil         uint32_t devfn;
118*35b53f8cSChandrakanth patil         enum bnxt_mgmt_req_type req_type;
119*35b53f8cSChandrakanth patil };
120*35b53f8cSChandrakanth patil 
121*35b53f8cSChandrakanth patil struct bnxt_mgmt_req {
122*35b53f8cSChandrakanth patil 	struct bnxt_mgmt_req_hdr hdr;
123*35b53f8cSChandrakanth patil 	union {
124*35b53f8cSChandrakanth patil 		uint64_t hreq;
125*35b53f8cSChandrakanth patil 	} req;
126*35b53f8cSChandrakanth patil };
127*35b53f8cSChandrakanth patil 
128*35b53f8cSChandrakanth patil struct bnxt_mgmt_app_tlv {
129*35b53f8cSChandrakanth patil 	uint32_t num_app;
130*35b53f8cSChandrakanth patil 	struct bnxt_dcb_app app[128];
131*35b53f8cSChandrakanth patil } __attribute__ ((__packed__));
132*35b53f8cSChandrakanth patil 
133*35b53f8cSChandrakanth patil struct bnxt_mgmt_dcb {
134*35b53f8cSChandrakanth patil 	struct bnxt_mgmt_req_hdr hdr;
135*35b53f8cSChandrakanth patil #define BNXT_MGMT_DCB_GET_ETS	0x1
136*35b53f8cSChandrakanth patil #define BNXT_MGMT_DCB_SET_ETS	0x2
137*35b53f8cSChandrakanth patil #define BNXT_MGMT_DCB_GET_PFC	0x3
138*35b53f8cSChandrakanth patil #define BNXT_MGMT_DCB_SET_PFC	0x4
139*35b53f8cSChandrakanth patil #define BNXT_MGMT_DCB_SET_APP	0x5
140*35b53f8cSChandrakanth patil #define BNXT_MGMT_DCB_DEL_APP	0x6
141*35b53f8cSChandrakanth patil #define BNXT_MGMT_DCB_LIST_APP	0x7
142*35b53f8cSChandrakanth patil #define BNXT_MGMT_DCB_MAX	BNXT_MGMT_DCB_LIST_APP
143*35b53f8cSChandrakanth patil 	uint32_t op;
144*35b53f8cSChandrakanth patil 	union {
145*35b53f8cSChandrakanth patil 		struct bnxt_ieee_ets ets;
146*35b53f8cSChandrakanth patil 		struct bnxt_ieee_pfc pfc;
147*35b53f8cSChandrakanth patil 		struct bnxt_mgmt_app_tlv app_tlv;
148*35b53f8cSChandrakanth patil 	} req;
149*35b53f8cSChandrakanth patil } __attribute__ ((__packed__));
150