1 /*- 2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 32 #ifndef _SIBA_SIBAVAR_H_ 33 #define _SIBA_SIBAVAR_H_ 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/limits.h> 38 39 #include <machine/bus.h> 40 #include <sys/rman.h> 41 42 #include "siba.h" 43 44 /* 45 * Internal definitions shared by siba(4) driver implementations. 46 */ 47 48 struct siba_addrspace; 49 struct siba_devinfo; 50 struct siba_port; 51 struct siba_core_id; 52 53 int siba_probe(device_t dev); 54 int siba_attach(device_t dev); 55 int siba_detach(device_t dev); 56 int siba_resume(device_t dev); 57 int siba_suspend(device_t dev); 58 59 uint16_t siba_get_bhnd_mfgid(uint16_t ocp_vendor); 60 61 struct siba_core_id siba_parse_core_id(uint32_t idhigh, uint32_t idlow, 62 u_int core_idx, int unit); 63 64 int siba_add_children(device_t bus, 65 const struct bhnd_chipid *chipid); 66 67 struct siba_devinfo *siba_alloc_dinfo(device_t dev, 68 const struct siba_core_id *core_id); 69 void siba_free_dinfo(device_t dev, 70 struct siba_devinfo *dinfo); 71 72 struct siba_port *siba_dinfo_get_port(struct siba_devinfo *dinfo, 73 bhnd_port_type port_type, u_int port_num); 74 75 struct siba_addrspace *siba_find_port_addrspace(struct siba_port *port, 76 uint8_t sid); 77 78 int siba_append_dinfo_region(struct siba_devinfo *dinfo, 79 bhnd_port_type port_type, u_int port_num, 80 u_int region_num, uint8_t sid, uint32_t base, 81 uint32_t size, uint32_t bus_reserved); 82 83 u_int siba_admatch_offset(uint8_t addrspace); 84 int siba_parse_admatch(uint32_t am, uint32_t *addr, 85 uint32_t *size); 86 87 /* Sonics configuration register blocks */ 88 #define SIBA_CFG_NUM_2_2 1 /**< sonics <= 2.2 maps SIBA_CFG0. */ 89 #define SIBA_CFG_NUM_2_3 2 /**< sonics <= 2.3 maps SIBA_CFG0 and SIBA_CFG1 */ 90 #define SIBA_CFG_NUM_MAX SIBA_CFG_NUM_2_3 /**< maximum number of supported config 91 register blocks */ 92 93 /** siba(4) address space descriptor */ 94 struct siba_addrspace { 95 uint32_t sa_base; /**< base address */ 96 uint32_t sa_size; /**< size */ 97 u_int sa_region_num; /**< bhnd region id */ 98 uint8_t sa_sid; /**< siba-assigned address space ID */ 99 int sa_rid; /**< bus resource id */ 100 uint32_t sa_bus_reserved;/**< number of bytes at high end of 101 * address space reserved for the bus */ 102 103 STAILQ_ENTRY(siba_addrspace) sa_link; 104 }; 105 106 /** siba(4) port descriptor */ 107 struct siba_port { 108 bhnd_port_type sp_type; /**< port type */ 109 u_int sp_num; /**< port number */ 110 u_int sp_num_addrs; /**< number of address space mappings */ 111 112 STAILQ_HEAD(, siba_addrspace) sp_addrs; /**< address spaces mapped to this port */ 113 }; 114 115 /** 116 * siba(4) per-core identification info. 117 */ 118 struct siba_core_id { 119 struct bhnd_core_info core_info; /**< standard bhnd(4) core info */ 120 uint16_t sonics_vendor; /**< OCP vendor identifier used to generate 121 * the JEDEC-106 bhnd(4) vendor identifier. */ 122 uint8_t sonics_rev; /**< sonics backplane revision code */ 123 uint8_t num_addrspace; /**< number of address ranges mapped to 124 this core. */ 125 uint8_t num_cfg_blocks; /**< number of Sonics configuration register 126 blocks mapped to the core's enumeration 127 space */ 128 }; 129 130 /** 131 * siba(4) per-device info 132 */ 133 struct siba_devinfo { 134 struct resource_list resources; /**< per-core memory regions. */ 135 struct siba_core_id core_id; /**< core identification info */ 136 137 struct siba_port device_port; /**< device port holding ownership 138 * of all siba address space 139 * entries for this core. */ 140 141 /** SIBA_CFG* register blocks */ 142 struct bhnd_resource *cfg[SIBA_CFG_NUM_MAX]; 143 144 /** SIBA_CFG* resource IDs */ 145 int cfg_rid[SIBA_CFG_NUM_MAX]; 146 }; 147 148 149 /** siba(4) per-instance state */ 150 struct siba_softc { 151 struct bhnd_softc bhnd_sc; /**< bhnd state */ 152 device_t dev; /**< siba device */ 153 device_t hostb_dev; /**< host bridge core, or NULL */ 154 }; 155 156 #endif /* _SIBA_SIBAVAR_H_ */ 157