1 /*- 2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 * 29 * $FreeBSD$ 30 */ 31 32 #ifndef _SIBA_SIBAVAR_H_ 33 #define _SIBA_SIBAVAR_H_ 34 35 #include <sys/param.h> 36 #include <sys/bus.h> 37 #include <sys/limits.h> 38 39 #include <machine/bus.h> 40 #include <sys/rman.h> 41 42 #include "siba.h" 43 44 /* 45 * Internal definitions shared by siba(4) driver implementations. 46 */ 47 48 struct siba_addrspace; 49 struct siba_devinfo; 50 struct siba_core_id; 51 52 int siba_probe(device_t dev); 53 int siba_attach(device_t dev); 54 int siba_detach(device_t dev); 55 int siba_resume(device_t dev); 56 int siba_suspend(device_t dev); 57 int siba_get_intr_count(device_t dev, device_t child); 58 int siba_get_core_ivec(device_t dev, device_t child, 59 u_int intr, uint32_t *ivec); 60 61 uint16_t siba_get_bhnd_mfgid(uint16_t ocp_vendor); 62 63 struct siba_core_id siba_parse_core_id(uint32_t idhigh, uint32_t idlow, 64 u_int core_idx, int unit); 65 66 int siba_add_children(device_t bus); 67 68 struct siba_devinfo *siba_alloc_dinfo(device_t dev); 69 int siba_init_dinfo(device_t dev, 70 struct siba_devinfo *dinfo, 71 const struct siba_core_id *core_id); 72 void siba_free_dinfo(device_t dev, 73 struct siba_devinfo *dinfo); 74 75 u_int siba_addrspace_port_count(u_int num_addrspace); 76 u_int siba_addrspace_region_count(u_int num_addrspace, 77 u_int port); 78 79 u_int siba_addrspace_port(u_int addrspace); 80 u_int siba_addrspace_region(u_int addrspace); 81 int siba_addrspace_index(u_int num_addrspace, 82 bhnd_port_type type, u_int port, u_int region, 83 u_int *addridx); 84 bool siba_is_port_valid(u_int num_addrspace, 85 bhnd_port_type type, u_int port); 86 87 struct siba_addrspace *siba_find_addrspace(struct siba_devinfo *dinfo, 88 bhnd_port_type type, u_int port, u_int region); 89 90 int siba_append_dinfo_region(struct siba_devinfo *dinfo, 91 uint8_t sid, uint32_t base, uint32_t size, 92 uint32_t bus_reserved); 93 94 u_int siba_admatch_offset(uint8_t addrspace); 95 int siba_parse_admatch(uint32_t am, uint32_t *addr, 96 uint32_t *size); 97 98 int siba_write_target_state(device_t dev, 99 struct siba_devinfo *dinfo, bus_size_t reg, 100 uint32_t value, uint32_t mask); 101 int siba_wait_target_busy(device_t child, 102 struct siba_devinfo *dinfo, int usec); 103 104 105 /* Sonics configuration register blocks */ 106 #define SIBA_CFG_NUM_2_2 1 /**< sonics <= 2.2 maps SIBA_CFG0. */ 107 #define SIBA_CFG_NUM_2_3 2 /**< sonics <= 2.3 maps SIBA_CFG0 and SIBA_CFG1 */ 108 #define SIBA_MAX_CFG SIBA_CFG_NUM_2_3 /**< maximum number of supported config 109 register blocks */ 110 111 #define SIBA_CFG_RID_BASE 100 /**< base resource ID for SIBA_CFG* register allocations */ 112 #define SIBA_CFG_RID(_dinfo, _cfg) \ 113 (SIBA_CFG_RID_BASE + (_cfg) + \ 114 (_dinfo->core_id.core_info.core_idx * SIBA_MAX_CFG)) 115 116 /* Sonics/OCP address space mappings */ 117 #define SIBA_CORE_ADDRSPACE 0 /**< Address space mapping the primary 118 device registers */ 119 120 #define SIBA_MAX_ADDRSPACE 4 /**< Maximum number of Sonics/OCP 121 * address space mappings for a 122 * single core. */ 123 124 /* bhnd(4) (port,region) representation of siba address space mappings */ 125 #define SIBA_MAX_PORT 2 /**< maximum number of advertised 126 * bhnd(4) ports */ 127 128 /** siba(4) address space descriptor */ 129 struct siba_addrspace { 130 uint32_t sa_base; /**< base address */ 131 uint32_t sa_size; /**< size */ 132 int sa_rid; /**< bus resource id */ 133 uint32_t sa_bus_reserved;/**< number of bytes at high end of 134 * address space reserved for the bus */ 135 }; 136 137 /** 138 * siba(4) per-core identification info. 139 */ 140 struct siba_core_id { 141 struct bhnd_core_info core_info; /**< standard bhnd(4) core info */ 142 uint16_t sonics_vendor; /**< OCP vendor identifier used to generate 143 * the JEDEC-106 bhnd(4) vendor identifier. */ 144 uint8_t sonics_rev; /**< sonics backplane revision code */ 145 uint8_t num_addrspace; /**< number of address ranges mapped to 146 this core. */ 147 uint8_t num_cfg_blocks; /**< number of Sonics configuration register 148 blocks mapped to the core's enumeration 149 space */ 150 }; 151 152 /** 153 * siba(4) per-device info 154 */ 155 struct siba_devinfo { 156 struct resource_list resources; /**< per-core memory regions. */ 157 struct siba_core_id core_id; /**< core identification info */ 158 struct siba_addrspace addrspace[SIBA_MAX_ADDRSPACE]; /**< memory map descriptors */ 159 160 struct bhnd_resource *cfg[SIBA_MAX_CFG]; /**< SIBA_CFG_* registers */ 161 int cfg_rid[SIBA_MAX_CFG]; /**< SIBA_CFG_* resource IDs */ 162 struct bhnd_core_pmu_info *pmu_info; /**< Bus-managed PMU state, or NULL */ 163 }; 164 165 166 /** siba(4) per-instance state */ 167 struct siba_softc { 168 struct bhnd_softc bhnd_sc; /**< bhnd state */ 169 device_t dev; /**< siba device */ 170 }; 171 172 #endif /* _SIBA_SIBAVAR_H_ */ 173