1 /*- 2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/bus.h> 35 #include <sys/kernel.h> 36 #include <sys/limits.h> 37 #include <sys/systm.h> 38 39 #include <machine/bus.h> 40 #include <machine/resource.h> 41 42 #include <dev/bhnd/bhndvar.h> 43 44 #include "sibareg.h" 45 #include "sibavar.h" 46 47 /** 48 * Map a siba(4) OCP vendor code to its corresponding JEDEC JEP-106 vendor 49 * code. 50 * 51 * @param ocp_vendor An OCP vendor code. 52 * @return The BHND_MFGID constant corresponding to @p ocp_vendor, or 53 * BHND_MFGID_INVALID if the OCP vendor is unknown. 54 */ 55 uint16_t 56 siba_get_bhnd_mfgid(uint16_t ocp_vendor) 57 { 58 switch (ocp_vendor) { 59 case OCP_VENDOR_BCM: 60 return (BHND_MFGID_BCM); 61 default: 62 return (BHND_MFGID_INVALID); 63 } 64 } 65 66 /** 67 * Parse the SIBA_IDH_* fields from the per-core identification 68 * registers, returning a siba_core_id representation. 69 * 70 * @param idhigh The SIBA_R0_IDHIGH register. 71 * @param idlow The SIBA_R0_IDLOW register. 72 * @param core_id The core id (index) to include in the result. 73 * @param unit The unit number to include in the result. 74 */ 75 struct siba_core_id 76 siba_parse_core_id(uint32_t idhigh, uint32_t idlow, u_int core_idx, int unit) 77 { 78 79 uint16_t ocp_vendor; 80 uint8_t sonics_rev; 81 uint8_t num_addrspace; 82 uint8_t num_cfg; 83 84 ocp_vendor = SIBA_REG_GET(idhigh, IDH_VENDOR); 85 sonics_rev = SIBA_REG_GET(idlow, IDL_SBREV); 86 num_addrspace = SIBA_REG_GET(idlow, IDL_NRADDR) + 1 /* + enum block */; 87 88 /* Determine the number of sonics config register blocks */ 89 num_cfg = SIBA_CFG_NUM_2_2; 90 if (sonics_rev >= SIBA_IDL_SBREV_2_3) 91 num_cfg = SIBA_CFG_NUM_2_3; 92 93 return (struct siba_core_id) { 94 .core_info = { 95 .vendor = siba_get_bhnd_mfgid(ocp_vendor), 96 .device = SIBA_REG_GET(idhigh, IDH_DEVICE), 97 .hwrev = SIBA_IDH_CORE_REV(idhigh), 98 .core_idx = core_idx, 99 .unit = unit 100 }, 101 .sonics_vendor = ocp_vendor, 102 .sonics_rev = sonics_rev, 103 .num_addrspace = num_addrspace, 104 .num_cfg_blocks = num_cfg 105 }; 106 } 107 108 /** 109 * Allocate and return a new empty device info structure. 110 * 111 * @param bus The requesting bus device. 112 * 113 * @retval NULL if allocation failed. 114 */ 115 struct siba_devinfo * 116 siba_alloc_dinfo(device_t bus) 117 { 118 struct siba_devinfo *dinfo; 119 120 dinfo = malloc(sizeof(struct siba_devinfo), M_BHND, M_NOWAIT|M_ZERO); 121 if (dinfo == NULL) 122 return NULL; 123 124 for (u_int i = 0; i < nitems(dinfo->cfg); i++) { 125 dinfo->cfg[i] = NULL; 126 dinfo->cfg_rid[i] = -1; 127 } 128 129 resource_list_init(&dinfo->resources); 130 131 return dinfo; 132 } 133 134 /** 135 * Initialize a device info structure previously allocated via 136 * siba_alloc_dinfo, copying the provided core id. 137 * 138 * @param dev The requesting bus device. 139 * @param dinfo The device info instance. 140 * @param core Device core info. 141 * 142 * @retval 0 success 143 * @retval non-zero initialization failed. 144 */ 145 int 146 siba_init_dinfo(device_t dev, struct siba_devinfo *dinfo, 147 const struct siba_core_id *core_id) 148 { 149 dinfo->core_id = *core_id; 150 return (0); 151 } 152 153 /** 154 * Map an addrspace index to its corresponding bhnd(4) port number. 155 * 156 * @param addrspace Address space index. 157 */ 158 u_int 159 siba_addrspace_port(u_int addrspace) 160 { 161 /* The first addrspace is always mapped to device0; the remainder 162 * are mapped to device1 */ 163 if (addrspace == 0) 164 return (0); 165 else 166 return (1); 167 } 168 169 /** 170 * Map an addrspace index to its corresponding bhnd(4) region number. 171 * 172 * @param addrspace Address space index. 173 */ 174 u_int 175 siba_addrspace_region(u_int addrspace) 176 { 177 /* The first addrspace is always mapped to device0.0; the remainder 178 * are mapped to device1.0 + (n - 1) */ 179 if (addrspace == 0) 180 return (0); 181 else 182 return (addrspace - 1); 183 } 184 185 /** 186 * Return the number of bhnd(4) ports to advertise for the given 187 * @p num_addrspace. 188 * 189 * @param num_addrspace The number of siba address spaces. 190 */ 191 u_int 192 siba_addrspace_port_count(u_int num_addrspace) 193 { 194 /* 0, 1, or 2 ports */ 195 return min(num_addrspace, 2); 196 } 197 198 /** 199 * Return the number of bhnd(4) regions to advertise on @p port 200 * given the provided @p num_addrspace address space count. 201 * 202 * @param num_addrspace The number of core-mapped siba(4) Sonics/OCP address 203 * spaces. 204 */ 205 u_int 206 siba_addrspace_region_count(u_int num_addrspace, u_int port) 207 { 208 /* The first address space, if any, is mapped to device0.0 */ 209 if (port == 0) 210 return (min(num_addrspace, 1)); 211 212 /* All remaining address spaces are mapped to device0.(n - 1) */ 213 if (port == 1 && num_addrspace >= 2) 214 return (num_addrspace - 1); 215 216 /* No region mapping */ 217 return (0); 218 } 219 220 /** 221 * Return true if @p port is defined given an address space count 222 * of @p num_addrspace, false otherwise. 223 * 224 * Refer to the siba_find_addrspace() function for information on siba's 225 * mapping of bhnd(4) port and region identifiers. 226 * 227 * @param num_addrspace The number of address spaces to verify the port against. 228 * @param type The bhnd(4) port type. 229 * @param port The bhnd(4) port number. 230 */ 231 bool 232 siba_is_port_valid(u_int num_addrspace, bhnd_port_type type, u_int port) 233 { 234 /* Only device ports are supported */ 235 if (type != BHND_PORT_DEVICE) 236 return (false); 237 238 /* Verify the index against the port count */ 239 if (siba_addrspace_port_count(num_addrspace) <= port) 240 return (false); 241 242 return (true); 243 } 244 245 /** 246 * Map a bhnd(4) type/port/region triplet to its associated address space 247 * index, if any. 248 * 249 * For compatibility with bcma(4), we map address spaces to port/region 250 * identifiers as follows: 251 * 252 * [port] [addrspace] 253 * device0.0 0 254 * device1.0 1 255 * device1.1 2 256 * device1.2 3 257 * 258 * The only supported port type is BHND_PORT_DEVICE. 259 * 260 * @param num_addrspace The number of available siba address spaces. 261 * @param type The bhnd(4) port type. 262 * @param port The bhnd(4) port number. 263 * @param region The bhnd(4) port region. 264 * @param addridx On success, the corresponding addrspace index. 265 * 266 * @retval 0 success 267 * @retval ENOENT if the given type/port/region cannot be mapped to a 268 * siba address space. 269 */ 270 int 271 siba_addrspace_index(u_int num_addrspace, bhnd_port_type type, u_int port, 272 u_int region, u_int *addridx) 273 { 274 u_int idx; 275 276 if (!siba_is_port_valid(num_addrspace, type, port)) 277 return (ENOENT); 278 279 if (port == 0) 280 idx = region; 281 else if (port == 1) 282 idx = region + 1; 283 else 284 return (ENOENT); 285 286 if (idx >= num_addrspace) 287 return (ENOENT); 288 289 /* Found */ 290 *addridx = idx; 291 return (0); 292 } 293 294 /** 295 * Map an bhnd(4) type/port/region triplet to its associated address space 296 * entry, if any. 297 * 298 * The only supported port type is BHND_PORT_DEVICE. 299 * 300 * @param dinfo The device info to search for a matching address space. 301 * @param type The bhnd(4) port type. 302 * @param port The bhnd(4) port number. 303 * @param region The bhnd(4) port region. 304 */ 305 struct siba_addrspace * 306 siba_find_addrspace(struct siba_devinfo *dinfo, bhnd_port_type type, u_int port, 307 u_int region) 308 { 309 u_int addridx; 310 int error; 311 312 /* Map to addrspace index */ 313 error = siba_addrspace_index(dinfo->core_id.num_addrspace, type, port, 314 region, &addridx); 315 if (error) 316 return (NULL); 317 318 /* Found */ 319 if (addridx >= SIBA_MAX_ADDRSPACE) 320 return (NULL); 321 322 return (&dinfo->addrspace[addridx]); 323 } 324 325 /** 326 * Append an address space entry to @p dinfo. 327 * 328 * @param dinfo The device info entry to update. 329 * @param addridx The address space index. 330 * @param base The mapping's base address. 331 * @param size The mapping size. 332 * @param bus_reserved Number of bytes to reserve in @p size for bus use 333 * when registering the resource list entry. This is used to reserve bus 334 * access to the core's SIBA_CFG* register blocks. 335 * 336 * @retval 0 success 337 * @retval non-zero An error occurred appending the entry. 338 */ 339 int 340 siba_append_dinfo_region(struct siba_devinfo *dinfo, uint8_t addridx, 341 uint32_t base, uint32_t size, uint32_t bus_reserved) 342 { 343 struct siba_addrspace *sa; 344 rman_res_t r_size; 345 346 /* Verify that base + size will not overflow */ 347 if (size > 0 && UINT32_MAX - (size - 1) < base) 348 return (ERANGE); 349 350 /* Verify that size - bus_reserved will not underflow */ 351 if (size < bus_reserved) 352 return (ERANGE); 353 354 /* Must not be 0-length */ 355 if (size == 0) 356 return (EINVAL); 357 358 /* Must not exceed addrspace array size */ 359 if (addridx >= nitems(dinfo->addrspace)) 360 return (EINVAL); 361 362 /* Initialize new addrspace entry */ 363 sa = &dinfo->addrspace[addridx]; 364 sa->sa_base = base; 365 sa->sa_size = size; 366 sa->sa_bus_reserved = bus_reserved; 367 368 /* Populate the resource list */ 369 r_size = size - bus_reserved; 370 sa->sa_rid = resource_list_add_next(&dinfo->resources, SYS_RES_MEMORY, 371 base, base + (r_size - 1), r_size); 372 373 return (0); 374 } 375 376 /** 377 * Deallocate the given device info structure and any associated resources. 378 * 379 * @param dev The requesting bus device. 380 * @param dinfo Device info to be deallocated. 381 */ 382 void 383 siba_free_dinfo(device_t dev, struct siba_devinfo *dinfo) 384 { 385 resource_list_free(&dinfo->resources); 386 387 /* Free all mapped configuration blocks */ 388 for (u_int i = 0; i < nitems(dinfo->cfg); i++) { 389 if (dinfo->cfg[i] == NULL) 390 continue; 391 392 bhnd_release_resource(dev, SYS_RES_MEMORY, dinfo->cfg_rid[i], 393 dinfo->cfg[i]); 394 395 dinfo->cfg[i] = NULL; 396 dinfo->cfg_rid[i] = -1; 397 } 398 399 free(dinfo, M_BHND); 400 } 401 402 /** 403 * Return the core-enumeration-relative offset for the @p addrspace 404 * SIBA_R0_ADMATCH* register. 405 * 406 * @param addrspace The address space index. 407 * 408 * @retval non-zero success 409 * @retval 0 the given @p addrspace index is not supported. 410 */ 411 u_int 412 siba_admatch_offset(uint8_t addrspace) 413 { 414 switch (addrspace) { 415 case 0: 416 return SB0_REG_ABS(SIBA_CFG0_ADMATCH0); 417 case 1: 418 return SB0_REG_ABS(SIBA_CFG0_ADMATCH1); 419 case 2: 420 return SB0_REG_ABS(SIBA_CFG0_ADMATCH2); 421 case 3: 422 return SB0_REG_ABS(SIBA_CFG0_ADMATCH3); 423 default: 424 return (0); 425 } 426 } 427 428 /** 429 * Parse a SIBA_R0_ADMATCH* register. 430 * 431 * @param addrspace The address space index. 432 * @param am The address match register value to be parsed. 433 * @param[out] addr The parsed address. 434 * @param[out] size The parsed size. 435 * 436 * @retval 0 success 437 * @retval non-zero a parse error occurred. 438 */ 439 int 440 siba_parse_admatch(uint32_t am, uint32_t *addr, uint32_t *size) 441 { 442 u_int am_type; 443 444 /* Negative encoding is not supported. This is not used on any 445 * currently known devices*/ 446 if (am & SIBA_AM_ADNEG) 447 return (EINVAL); 448 449 /* Extract the base address and size */ 450 am_type = SIBA_REG_GET(am, AM_TYPE); 451 switch (am_type) { 452 case 0: 453 *addr = am & SIBA_AM_BASE0_MASK; 454 *size = 1 << (SIBA_REG_GET(am, AM_ADINT0) + 1); 455 break; 456 case 1: 457 *addr = am & SIBA_AM_BASE1_MASK; 458 *size = 1 << (SIBA_REG_GET(am, AM_ADINT1) + 1); 459 break; 460 case 2: 461 *addr = am & SIBA_AM_BASE2_MASK; 462 *size = 1 << (SIBA_REG_GET(am, AM_ADINT2) + 1); 463 break; 464 default: 465 return (EINVAL); 466 } 467 468 return (0); 469 } 470 471 /** 472 * Write @p value to @p dev's CFG0 target/initiator state register and 473 * wait for completion. 474 * 475 * @param dev The siba(4) child device. 476 * @param reg The state register to write (e.g. SIBA_CFG0_TMSTATELOW, 477 * SIBA_CFG0_IMSTATE) 478 * @param value The value to write to @p reg. 479 * @param mask The mask of bits to be included from @p value. 480 * 481 * @retval 0 success. 482 * @retval ENODEV if SIBA_CFG0 is not mapped by @p dinfo. 483 * @retval ETIMEDOUT if a timeout occurs prior to SIBA_TMH_BUSY clearing. 484 */ 485 int 486 siba_write_target_state(device_t dev, struct siba_devinfo *dinfo, 487 bus_size_t reg, uint32_t value, uint32_t mask) 488 { 489 struct bhnd_resource *r; 490 uint32_t rval; 491 492 /* Must have a CFG0 block */ 493 if ((r = dinfo->cfg[0]) == NULL) 494 return (ENODEV); 495 496 /* Verify the register offset falls within CFG register block */ 497 if (reg > SIBA_CFG_SIZE-4) 498 return (EFAULT); 499 500 for (int i = 0; i < 300; i += 10) { 501 rval = bhnd_bus_read_4(r, reg); 502 rval &= ~mask; 503 rval |= (value & mask); 504 505 bhnd_bus_write_4(r, reg, rval); 506 bhnd_bus_read_4(r, reg); /* read-back */ 507 DELAY(1); 508 509 /* If the write has completed, wait for target busy state 510 * to clear */ 511 rval = bhnd_bus_read_4(r, reg); 512 if ((rval & mask) == (value & mask)) 513 return (siba_wait_target_busy(dev, dinfo, 100000)); 514 515 DELAY(10); 516 } 517 518 return (ETIMEDOUT); 519 } 520 521 /** 522 * Spin for up to @p usec waiting for SIBA_TMH_BUSY to clear in 523 * @p dev's SIBA_CFG0_TMSTATEHIGH register. 524 * 525 * @param dev The siba(4) child device to wait on. 526 * @param dinfo The @p dev's device info 527 * 528 * @retval 0 if SIBA_TMH_BUSY is cleared prior to the @p usec timeout. 529 * @retval ENODEV if SIBA_CFG0 is not mapped by @p dinfo. 530 * @retval ETIMEDOUT if a timeout occurs prior to SIBA_TMH_BUSY clearing. 531 */ 532 int 533 siba_wait_target_busy(device_t dev, struct siba_devinfo *dinfo, int usec) 534 { 535 struct bhnd_resource *r; 536 uint32_t ts_high; 537 538 if ((r = dinfo->cfg[0]) == NULL) 539 return (ENODEV); 540 541 for (int i = 0; i < usec; i += 10) { 542 ts_high = bhnd_bus_read_4(r, SIBA_CFG0_TMSTATEHIGH); 543 if (!(ts_high & SIBA_TMH_BUSY)) 544 return (0); 545 546 DELAY(10); 547 } 548 549 device_printf(dev, "SIBA_TMH_BUSY wait timeout\n"); 550 return (ETIMEDOUT); 551 } 552