1 /*- 2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 #include <sys/kernel.h> 35 #include <sys/bus.h> 36 #include <sys/module.h> 37 #include <sys/systm.h> 38 39 #include <dev/bhnd/bhnd_ids.h> 40 #include <dev/bhnd/bhndb/bhndbvar.h> 41 #include <dev/bhnd/bhndb/bhndb_hwdata.h> 42 43 #include "sibareg.h" 44 #include "sibavar.h" 45 46 /* 47 * Supports attachment of siba(4) bus devices via a bhndb bridge. 48 */ 49 50 // 51 // TODO: PCI rev < 6 interrupt handling 52 // 53 // On early PCI cores (rev < 6) interrupt masking is handled via interconnect 54 // configuration registers (SBINTVEC), rather than the PCI_INT_MASK 55 // config register. 56 // 57 // On those devices, we should handle interrupts locally using SBINTVEC, rather 58 // than delegating to our parent bhndb device. 59 // 60 61 static int siba_bhndb_wars_hwup(struct siba_softc *sc); 62 63 enum { 64 /** When PCIe-bridged, the D11 core's initiator request 65 * timeout must be disabled to prevent D11 from entering a 66 * RESP_TIMEOUT error state. */ 67 SIBA_QUIRK_PCIE_D11_SB_TIMEOUT = (1<<0) 68 }; 69 70 static struct bhnd_chip_quirk chip_quirks[] = { 71 {{ BHND_CHIP_IR(4311, HWREV_EQ(2)) }, SIBA_QUIRK_PCIE_D11_SB_TIMEOUT }, 72 {{ BHND_CHIP_IR(4312, HWREV_EQ(0)) }, SIBA_QUIRK_PCIE_D11_SB_TIMEOUT }, 73 }; 74 75 static int 76 siba_bhndb_probe(device_t dev) 77 { 78 const struct bhnd_chipid *cid; 79 80 /* Check bus type */ 81 cid = BHNDB_GET_CHIPID(device_get_parent(dev), dev); 82 if (cid->chip_type != BHND_CHIPTYPE_SIBA) 83 return (ENXIO); 84 85 /* Delegate to default probe implementation */ 86 return (siba_probe(dev)); 87 } 88 89 static int 90 siba_bhndb_attach(device_t dev) 91 { 92 struct siba_softc *sc; 93 const struct bhnd_chipid *chipid; 94 int error; 95 96 sc = device_get_softc(dev); 97 98 /* Enumerate our children. */ 99 chipid = BHNDB_GET_CHIPID(device_get_parent(dev), dev); 100 if ((error = siba_add_children(dev, chipid))) 101 return (error); 102 103 /* Initialize full bridge configuration */ 104 error = BHNDB_INIT_FULL_CONFIG(device_get_parent(dev), dev, 105 bhndb_siba_priority_table); 106 if (error) 107 return (error); 108 109 /* Ask our parent bridge to find the corresponding bridge core */ 110 sc->hostb_dev = BHNDB_FIND_HOSTB_DEVICE(device_get_parent(dev), dev); 111 112 /* Call our superclass' implementation */ 113 if ((error = siba_attach(dev))) 114 return (error); 115 116 /* Apply attach/resume work-arounds */ 117 if ((error = siba_bhndb_wars_hwup(sc))) 118 return (error); 119 120 return (0); 121 } 122 123 static int 124 siba_bhndb_resume(device_t dev) 125 { 126 struct siba_softc *sc; 127 int error; 128 129 sc = device_get_softc(dev); 130 131 /* Apply attach/resume work-arounds */ 132 if ((error = siba_bhndb_wars_hwup(sc))) 133 return (error); 134 135 /* Call our superclass' implementation */ 136 return (siba_resume(dev)); 137 } 138 139 /* Suspend all references to the device's cfg register blocks */ 140 static void 141 siba_bhndb_suspend_cfgblocks(device_t dev, struct siba_devinfo *dinfo) { 142 for (u_int i = 0; i < dinfo->core_id.num_cfg_blocks; i++) { 143 if (dinfo->cfg[i] == NULL) 144 continue; 145 146 BHNDB_SUSPEND_RESOURCE(device_get_parent(dev), dev, 147 SYS_RES_MEMORY, dinfo->cfg[i]->res); 148 } 149 } 150 151 static int 152 siba_bhndb_suspend_child(device_t dev, device_t child) 153 { 154 struct siba_devinfo *dinfo; 155 int error; 156 157 if (device_get_parent(child) != dev) 158 BUS_SUSPEND_CHILD(device_get_parent(dev), child); 159 160 dinfo = device_get_ivars(child); 161 162 /* Suspend the child */ 163 if ((error = bhnd_generic_br_suspend_child(dev, child))) 164 return (error); 165 166 /* Suspend resource references to the child's config registers */ 167 siba_bhndb_suspend_cfgblocks(dev, dinfo); 168 169 return (0); 170 } 171 172 static int 173 siba_bhndb_resume_child(device_t dev, device_t child) 174 { 175 struct siba_devinfo *dinfo; 176 int error; 177 178 if (device_get_parent(child) != dev) 179 BUS_SUSPEND_CHILD(device_get_parent(dev), child); 180 181 if (!device_is_suspended(child)) 182 return (EBUSY); 183 184 dinfo = device_get_ivars(child); 185 186 /* Resume all resource references to the child's config registers */ 187 for (u_int i = 0; i < dinfo->core_id.num_cfg_blocks; i++) { 188 if (dinfo->cfg[i] == NULL) 189 continue; 190 191 error = BHNDB_RESUME_RESOURCE(device_get_parent(dev), dev, 192 SYS_RES_MEMORY, dinfo->cfg[i]->res); 193 if (error) { 194 siba_bhndb_suspend_cfgblocks(dev, dinfo); 195 return (error); 196 } 197 } 198 199 /* Resume the child */ 200 if ((error = bhnd_generic_br_resume_child(dev, child))) { 201 siba_bhndb_suspend_cfgblocks(dev, dinfo); 202 return (error); 203 } 204 205 return (0); 206 } 207 208 static int 209 siba_bhndb_read_board_info(device_t dev, device_t child, 210 struct bhnd_board_info *info) 211 { 212 int error; 213 214 /* Initialize with NVRAM-derived values */ 215 if ((error = bhnd_bus_generic_read_board_info(dev, child, info))) 216 return (error); 217 218 /* Let the bridge fill in any additional data */ 219 return (BHNDB_POPULATE_BOARD_INFO(device_get_parent(dev), dev, info)); 220 } 221 222 /* Work-around implementation for SIBA_QUIRK_PCIE_D11_SB_TIMEOUT */ 223 static int 224 siba_bhndb_wars_pcie_clear_d11_timeout(struct siba_softc *sc) 225 { 226 struct siba_devinfo *dinfo; 227 device_t d11; 228 uint32_t imcfg; 229 230 /* Only applies when bridged by PCIe */ 231 if (bhnd_get_class(sc->hostb_dev) != BHND_DEVCLASS_PCIE) 232 return (0); 233 234 /* Only applies if there's a D11 core */ 235 d11 = bhnd_match_child(sc->dev, &(struct bhnd_core_match){ 236 .vendor = BHND_MFGID_BCM, 237 .device = BHND_COREID_D11, 238 .hwrev = BHND_HWREV_ANY, 239 .class = BHND_DEVCLASS_INVALID, 240 .unit = 0 241 }); 242 if (d11 == NULL) 243 return (0); 244 245 /* Clear initiator timeout in D11's CFG0 block */ 246 dinfo = device_get_ivars(d11); 247 KASSERT(dinfo->cfg[0] != NULL, ("missing core config mapping")); 248 249 imcfg = bhnd_bus_read_4(dinfo->cfg[0], SIBA_CFG0_IMCONFIGLOW); 250 imcfg &= ~SIBA_IMCL_RTO_MASK; 251 252 bhnd_bus_write_4(dinfo->cfg[0], SIBA_CFG0_IMCONFIGLOW, imcfg); 253 254 return (0); 255 } 256 257 /** 258 * Apply any hardware workarounds that are required upon attach or resume 259 * of the bus. 260 */ 261 static int 262 siba_bhndb_wars_hwup(struct siba_softc *sc) 263 { 264 uint32_t quirks; 265 int error; 266 267 quirks = bhnd_chip_quirks(sc->hostb_dev, chip_quirks); 268 269 if (quirks & SIBA_QUIRK_PCIE_D11_SB_TIMEOUT) { 270 if ((error = siba_bhndb_wars_pcie_clear_d11_timeout(sc))) 271 return (error); 272 } 273 274 return (0); 275 } 276 277 278 static device_method_t siba_bhndb_methods[] = { 279 /* Device interface */ 280 DEVMETHOD(device_probe, siba_bhndb_probe), 281 DEVMETHOD(device_attach, siba_bhndb_attach), 282 DEVMETHOD(device_resume, siba_bhndb_resume), 283 284 /* Bus interface */ 285 DEVMETHOD(bus_suspend_child, siba_bhndb_suspend_child), 286 DEVMETHOD(bus_resume_child, siba_bhndb_resume_child), 287 288 /* BHND interface */ 289 DEVMETHOD(bhnd_bus_read_board_info, siba_bhndb_read_board_info), 290 291 DEVMETHOD_END 292 }; 293 294 DEFINE_CLASS_1(bhnd, siba_bhndb_driver, siba_bhndb_methods, 295 sizeof(struct siba_softc), siba_driver); 296 297 DRIVER_MODULE(siba_bhndb, bhndb, siba_bhndb_driver, bhnd_devclass, NULL, NULL); 298 299 MODULE_VERSION(siba_bhndb, 1); 300 MODULE_DEPEND(siba_bhndb, siba, 1, 1, 1); 301 MODULE_DEPEND(siba_bhndb, bhnd, 1, 1, 1); 302 MODULE_DEPEND(siba_bhndb, bhndb, 1, 1, 1); 303