xref: /freebsd/sys/dev/bhnd/nvram/bhnd_nvram.h (revision 20f8619da05e2775ef7b381c5df080d621fa8332)
1 /*-
2  * Copyright (c) 2015-2016 Landon Fuller <landon@landonf.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification.
11  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
12  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
13  *    redistribution must be conditioned upon including a substantially
14  *    similar Disclaimer requirement for further binary redistribution.
15  *
16  * NO WARRANTY
17  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
20  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
21  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
22  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
25  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
27  * THE POSSIBILITY OF SUCH DAMAGES.
28  *
29  * $FreeBSD$
30  */
31 
32 #ifndef _BHND_NVRAM_BHND_NVRAM_H_
33 #define _BHND_NVRAM_BHND_NVRAM_H_
34 
35 /**
36  * NVRAM data sources supported by bhnd(4) devices.
37  */
38 typedef enum {
39 
40 	BHND_NVRAM_SRC_OTP,	/**< On-chip one-time-programmable
41 				  *  memory. */
42 
43 	BHND_NVRAM_SRC_NFLASH,	/**< External flash device accessible
44 				  *  via on-chip flash core, such
45 				  *  as the NAND/QSPI controller cores
46 				  *  used on Northstar devices to access
47 				  *  NVRAM. */
48 	BHND_NVRAM_SRC_SPROM,	/**< External serial EEPROM. */
49 
50 	BHND_NVRAM_SRC_UNKNOWN	/**< No NVRAM source is directly
51 				  *  attached.
52 				  *
53 				  *  This will be returned by ChipCommon
54 				  *  revisions (rev <= 31) used in early
55 				  *  chipsets that vend SPROM/OTP via the
56 				  *  native host bridge interface.
57 				  *
58 				  *  For example, PCMCIA cards may vend
59 				  *  Broadcom NVRAM data via their standard CIS
60 				  *  table, and earlier PCI(e) devices map
61 				  *  SPROM statically into PCI BARs, and the
62 				  *  control registers into PCI config space.
63 
64 				  *  This will also be returned on later
65 				  *  devices that are attached via PCI(e) to
66 				  *  BHND SoCs, but do not include an attached
67 				  *  SPROM, or programmed OTP. On such SoCs,
68 				  *  NVRAM configuration for individual devices
69 				  *  is provided by a common platform NVRAM
70 				  *  device.
71 				  */
72 } bhnd_nvram_src_t;
73 
74 /**
75  * Evaluates to true if the given NVRAM data source is accessible via
76  * ChipCommon.
77  */
78 #define	BHND_NVRAM_SRC_CC(_src)	\
79 	((_src) == BHND_NVRAM_SRC_OTP || (_src) == BHND_NVRAM_SRC_SPROM)
80 
81 
82 #endif /* _BHND_NVRAM_BHND_NVRAM_H_ */