1 /*- 2 * Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include <sys/param.h> 34 35 #include <dev/bhnd/bhnd_ids.h> 36 #include <dev/bhnd/bhndreg.h> 37 #include <dev/bhnd/bhnd.h> 38 39 #include "bhndb_hwdata.h" 40 41 /* 42 * Resource priority specifications shared by all bhndb(4) bridge 43 * implementations. 44 */ 45 46 /* 47 * Define a bhndb_port_priority table. 48 */ 49 #define BHNDB_PORTS(...) \ 50 .ports = _BHNDB_PORT_ARRAY(__VA_ARGS__), \ 51 .num_ports = nitems(_BHNDB_PORT_ARRAY(__VA_ARGS__)) 52 53 #define _BHNDB_PORT_ARRAY(...) (const struct bhndb_port_priority[]) { \ 54 __VA_ARGS__ \ 55 } 56 57 /* 58 * Define a core priority record for all cores matching @p devclass and 59 * @p unit. 60 * 61 * If a devclass of BHNDB_DEVCLASS_INVALID is specified, this will match 62 * on all device classes. 63 * 64 * If a unit number of -1 is specified, this will match on all units. 65 */ 66 #define BHNDB_CLASS_PRIO(_devclass, _unit, _priority, ...) { \ 67 .match = { \ 68 .vendor = BHND_MFGID_INVALID, \ 69 .device = BHND_COREID_INVALID, \ 70 .hwrev = { BHND_HWREV_INVALID, BHND_HWREV_INVALID }, \ 71 .class = (BHND_DEVCLASS_ ## _devclass), \ 72 .unit = (_unit) \ 73 }, \ 74 .priority = (BHNDB_PRIORITY_ ## _priority), \ 75 BHNDB_PORTS(__VA_ARGS__) \ 76 } 77 78 /* Define a port priority record for the type/port/region 79 * triplet. */ 80 #define BHNDB_PORT_PRIO(_type, _port, _region, _priority) { \ 81 .type = (BHND_PORT_ ## _type), \ 82 .port = _port, \ 83 .region = _region, \ 84 .priority = (BHNDB_PRIORITY_ ## _priority) \ 85 } 86 87 /* Define a port priority record for the default (_type, 0, 0) type/port/region 88 * triplet. */ 89 #define BHNDB_PORT0_PRIO(_type, _priority) \ 90 BHNDB_PORT_PRIO(_type, 0, 0, _priority) 91 92 /** 93 * Generic resource priority configuration usable with all currently supported 94 * bcma(4)-based PCI devices. 95 */ 96 const struct bhndb_hw_priority bhndb_bcma_priority_table[] = { 97 /* 98 * Ignorable device classes. 99 * 100 * Runtime access to these cores is not required, and no register 101 * windows should be reserved for these device types. 102 */ 103 BHNDB_CLASS_PRIO(SOC_ROUTER, -1, NONE), 104 BHNDB_CLASS_PRIO(SOC_BRIDGE, -1, NONE), 105 BHNDB_CLASS_PRIO(EROM, -1, NONE), 106 BHNDB_CLASS_PRIO(OTHER, -1, NONE), 107 108 /* 109 * Low priority device classes. 110 * 111 * These devices do not sit in a performance-critical path and can be 112 * treated as a low allocation priority. 113 */ 114 BHNDB_CLASS_PRIO(CC, -1, LOW, 115 /* Device Block */ 116 BHNDB_PORT0_PRIO(DEVICE, LOW), 117 118 /* CC agent registers are not accessed via the bridge. */ 119 BHNDB_PORT0_PRIO(AGENT, NONE) 120 ), 121 122 BHNDB_CLASS_PRIO(PMU, -1, LOW, 123 /* Device Block */ 124 BHNDB_PORT0_PRIO(DEVICE, LOW), 125 126 /* PMU agent registers are not accessed via the bridge. */ 127 BHNDB_PORT0_PRIO(AGENT, NONE) 128 ), 129 130 /* 131 * Default Core Behavior 132 * 133 * All other cores are assumed to require effecient runtime access to 134 * the default device port, and if supported by the bus, an agent port. 135 */ 136 BHNDB_CLASS_PRIO(INVALID, -1, DEFAULT, 137 /* Device Block */ 138 BHNDB_PORT0_PRIO(DEVICE, HIGH), 139 140 /* Agent Block */ 141 BHNDB_PORT0_PRIO(AGENT, DEFAULT) 142 ), 143 144 BHNDB_HW_PRIORITY_TABLE_END 145 }; 146 147 /** 148 * Generic resource priority configuration usable with all currently supported 149 * siba(4)-based PCI devices. 150 */ 151 const struct bhndb_hw_priority bhndb_siba_priority_table[] = { 152 /* 153 * Ignorable device classes. 154 * 155 * Runtime access to these cores is not required, and no register 156 * windows should be reserved for these device types. 157 */ 158 BHNDB_CLASS_PRIO(SOC_ROUTER, -1, NONE), 159 BHNDB_CLASS_PRIO(SOC_BRIDGE, -1, NONE), 160 BHNDB_CLASS_PRIO(EROM, -1, NONE), 161 BHNDB_CLASS_PRIO(OTHER, -1, NONE), 162 163 /* 164 * Low priority device classes. 165 * 166 * These devices do not sit in a performance-critical path and can be 167 * treated as a low allocation priority. 168 * 169 * Agent ports are marked as 'NONE' on siba(4) devices, as they 170 * will be fully mappable via register windows shared with the 171 * device0.0 port. 172 */ 173 BHNDB_CLASS_PRIO(CC, -1, LOW, 174 /* Device Block */ 175 BHNDB_PORT_PRIO(DEVICE, 0, 0, LOW) 176 ), 177 178 BHNDB_CLASS_PRIO(PMU, -1, LOW, 179 /* Device Block */ 180 BHNDB_PORT_PRIO(DEVICE, 0, 0, LOW) 181 ), 182 183 /* 184 * Default Core Behavior 185 * 186 * All other cores are assumed to require effecient runtime access to 187 * the device port. 188 */ 189 BHNDB_CLASS_PRIO(INVALID, -1, DEFAULT, 190 /* Device Block */ 191 BHNDB_PORT_PRIO(DEVICE, 0, 0, HIGH) 192 ), 193 194 BHNDB_HW_PRIORITY_TABLE_END 195 };