1#- 2# Copyright (c) 2015 Landon Fuller <landon@landonf.org> 3# All rights reserved. 4# 5# Redistribution and use in source and binary forms, with or without 6# modification, are permitted provided that the following conditions 7# are met: 8# 1. Redistributions of source code must retain the above copyright 9# notice, this list of conditions and the following disclaimer. 10# 2. Redistributions in binary form must reproduce the above copyright 11# notice, this list of conditions and the following disclaimer in the 12# documentation and/or other materials provided with the distribution. 13# 14# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17# IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, 18# INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 19# (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 20# SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 21# CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 22# OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 23# USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24# 25# $FreeBSD$ 26 27#include <sys/types.h> 28#include <sys/bus.h> 29#include <sys/rman.h> 30 31#include <dev/bhnd/bhnd_types.h> 32 33INTERFACE bhnd_bus; 34 35# 36# bhnd(4) bus interface 37# 38 39HEADER { 40 /* forward declarations */ 41 struct bhnd_board_info; 42 struct bhnd_core_info; 43 struct bhnd_chipid; 44 struct bhnd_devinfo; 45 struct bhnd_resource; 46} 47 48CODE { 49 #include <sys/systm.h> 50 51 #include <dev/bhnd/bhndvar.h> 52 53 static struct bhnd_chipid * 54 bhnd_bus_null_get_chipid(device_t dev, device_t child) 55 { 56 panic("bhnd_bus_get_chipid unimplemented"); 57 } 58 59 static int 60 bhnd_bus_null_get_core_table(device_t dev, device_t child, 61 struct bhnd_core_info **cores, u_int *num_cores) 62 { 63 panic("bhnd_bus_get_core_table unimplemented"); 64 } 65 66 static bhnd_attach_type 67 bhnd_bus_null_get_attach_type(device_t dev, device_t child) 68 { 69 panic("bhnd_bus_get_attach_type unimplemented"); 70 } 71 72 static bhnd_clksrc 73 bhnd_bus_null_pwrctl_get_clksrc(device_t dev, device_t child, 74 bhnd_clock clock) 75 { 76 return (BHND_CLKSRC_UNKNOWN); 77 } 78 79 static int 80 bhnd_bus_null_pwrctl_gate_clock(device_t dev, device_t child, 81 bhnd_clock clock) 82 { 83 return (ENODEV); 84 } 85 86 static int 87 bhnd_bus_null_pwrctl_ungate_clock(device_t dev, device_t child, 88 bhnd_clock clock) 89 { 90 return (ENODEV); 91 } 92 93 static int 94 bhnd_bus_null_read_board_info(device_t dev, device_t child, 95 struct bhnd_board_info *info) 96 { 97 panic("bhnd_bus_read_boardinfo unimplemented"); 98 } 99 100 static void 101 bhnd_bus_null_child_added(device_t dev, device_t child) 102 { 103 } 104 105 static int 106 bhnd_bus_null_alloc_pmu(device_t dev, device_t child) 107 { 108 panic("bhnd_bus_alloc_pmu unimplemented"); 109 } 110 111 static int 112 bhnd_bus_null_release_pmu(device_t dev, device_t child) 113 { 114 panic("bhnd_bus_release_pmu unimplemented"); 115 } 116 117 static int 118 bhnd_bus_null_request_clock(device_t dev, device_t child, 119 bhnd_clock clock) 120 { 121 panic("bhnd_bus_request_clock unimplemented"); 122 } 123 124 static int 125 bhnd_bus_null_enable_clocks(device_t dev, device_t child, 126 uint32_t clocks) 127 { 128 panic("bhnd_bus_enable_clocks unimplemented"); 129 } 130 131 static int 132 bhnd_bus_null_request_ext_rsrc(device_t dev, device_t child, 133 u_int rsrc) 134 { 135 panic("bhnd_bus_request_ext_rsrc unimplemented"); 136 } 137 138 static int 139 bhnd_bus_null_release_ext_rsrc(device_t dev, device_t child, 140 u_int rsrc) 141 { 142 panic("bhnd_bus_release_ext_rsrc unimplemented"); 143 } 144 145 static uint32_t 146 bhnd_bus_null_read_config(device_t dev, device_t child, 147 bus_size_t offset, u_int width) 148 { 149 panic("bhnd_bus_null_read_config unimplemented"); 150 } 151 152 static void 153 bhnd_bus_null_write_config(device_t dev, device_t child, 154 bus_size_t offset, uint32_t val, u_int width) 155 { 156 panic("bhnd_bus_null_write_config unimplemented"); 157 } 158 159 static device_t 160 bhnd_bus_null_find_hostb_device(device_t dev) 161 { 162 panic("bhnd_bus_find_hostb_device unimplemented"); 163 } 164 165 static bool 166 bhnd_bus_null_is_hw_disabled(device_t dev, device_t child) 167 { 168 panic("bhnd_bus_is_hw_disabled unimplemented"); 169 } 170 171 static int 172 bhnd_bus_null_get_probe_order(device_t dev, device_t child) 173 { 174 panic("bhnd_bus_get_probe_order unimplemented"); 175 } 176 177 static int 178 bhnd_bus_null_get_port_rid(device_t dev, device_t child, 179 bhnd_port_type port_type, u_int port, u_int region) 180 { 181 return (-1); 182 } 183 184 static int 185 bhnd_bus_null_decode_port_rid(device_t dev, device_t child, int type, 186 int rid, bhnd_port_type *port_type, u_int *port, u_int *region) 187 { 188 return (ENOENT); 189 } 190 191 static int 192 bhnd_bus_null_get_region_addr(device_t dev, device_t child, 193 bhnd_port_type type, u_int port, u_int region, bhnd_addr_t *addr, 194 bhnd_size_t *size) 195 { 196 return (ENOENT); 197 } 198 199 static int 200 bhnd_bus_null_get_nvram_var(device_t dev, device_t child, 201 const char *name, void *buf, size_t *size, bhnd_nvram_type type) 202 { 203 return (ENODEV); 204 } 205 206} 207 208/** 209 * Return the active host bridge core for the bhnd bus, if any. 210 * 211 * @param dev The bhnd bus device. 212 * 213 * @retval device_t if a hostb device exists 214 * @retval NULL if no hostb device is found. 215 */ 216METHOD device_t find_hostb_device { 217 device_t dev; 218} DEFAULT bhnd_bus_null_find_hostb_device; 219 220/** 221 * Return true if the hardware components required by @p child are unpopulated 222 * or otherwise unusable. 223 * 224 * In some cases, enumerated devices may have pins that are left floating, or 225 * the hardware may otherwise be non-functional; this method allows a parent 226 * device to explicitly specify if a successfully enumerated @p child should 227 * be disabled. 228 * 229 * @param dev The device whose child is being examined. 230 * @param child The child device. 231 */ 232METHOD bool is_hw_disabled { 233 device_t dev; 234 device_t child; 235} DEFAULT bhnd_bus_null_is_hw_disabled; 236 237/** 238 * Return the probe (and attach) order for @p child. 239 * 240 * All devices on the bhnd(4) bus will be probed, attached, or resumed in 241 * ascending order; they will be suspended, shutdown, and detached in 242 * descending order. 243 * 244 * The following device methods will be dispatched in ascending probe order 245 * by the bus: 246 * 247 * - DEVICE_PROBE() 248 * - DEVICE_ATTACH() 249 * - DEVICE_RESUME() 250 * 251 * The following device methods will be dispatched in descending probe order 252 * by the bus: 253 * 254 * - DEVICE_SHUTDOWN() 255 * - DEVICE_DETACH() 256 * - DEVICE_SUSPEND() 257 * 258 * @param dev The device whose child is being examined. 259 * @param child The child device. 260 * 261 * Refer to BHND_PROBE_* and BHND_PROBE_ORDER_* for the standard set of 262 * priorities. 263 */ 264METHOD int get_probe_order { 265 device_t dev; 266 device_t child; 267} DEFAULT bhnd_bus_null_get_probe_order; 268 269/** 270 * Return the BHND chip identification for the parent bus. 271 * 272 * @param dev The device whose child is being examined. 273 * @param child The child device. 274 */ 275METHOD const struct bhnd_chipid * get_chipid { 276 device_t dev; 277 device_t child; 278} DEFAULT bhnd_bus_null_get_chipid; 279 280/** 281 * Get a list of all cores discoverable on @p dev. 282 * 283 * Enumerates all cores discoverable on @p dev, returning the list in 284 * @p cores and the count in @p num_cores. 285 * 286 * The memory allocated for the list should be freed using 287 * `free(*cores, M_BHND)`. @p cores and @p num_cores are not changed 288 * when an error is returned. 289 * 290 * @param dev The bhnd bus device. 291 * @param child The requesting bhnd bus child. 292 * @param[out] cores The table of core descriptors. 293 * @param[out] num_cores The number of core descriptors in @p cores. 294 * 295 * @retval 0 success 296 * @retval non-zero if an error occurs enumerating @p dev, a regular UNIX 297 * error code should be returned. 298 */ 299METHOD int get_core_table { 300 device_t dev; 301 device_t child; 302 struct bhnd_core_info **cores; 303 u_int *num_cores; 304} DEFAULT bhnd_bus_null_get_core_table; 305 306/** 307 * Return the BHND attachment type of the parent bus. 308 * 309 * @param dev The device whose child is being examined. 310 * @param child The child device. 311 * 312 * @retval BHND_ATTACH_ADAPTER if the bus is resident on a bridged adapter, 313 * such as a WiFi chipset. 314 * @retval BHND_ATTACH_NATIVE if the bus provides hardware services (clock, 315 * CPU, etc) to a directly attached native host. 316 */ 317METHOD bhnd_attach_type get_attach_type { 318 device_t dev; 319 device_t child; 320} DEFAULT bhnd_bus_null_get_attach_type; 321 322/** 323 * Attempt to read the BHND board identification from the parent bus. 324 * 325 * This relies on NVRAM access, and will fail if a valid NVRAM device cannot 326 * be found, or is not yet attached. 327 * 328 * @param dev The parent of @p child. 329 * @param child The bhnd device requesting board info. 330 * @param[out] info On success, will be populated with the bhnd(4) device's 331 * board information. 332 * 333 * @retval 0 success 334 * @retval ENODEV No valid NVRAM source could be found. 335 * @retval non-zero If reading @p name otherwise fails, a regular unix 336 * error code will be returned. 337 */ 338METHOD int read_board_info { 339 device_t dev; 340 device_t child; 341 struct bhnd_board_info *info; 342} DEFAULT bhnd_bus_null_read_board_info; 343 344/** 345 * Allocate and zero-initialize a buffer suitably sized and aligned for a 346 * bhnd_devinfo structure. 347 * 348 * @param dev The bhnd bus device. 349 * 350 * @retval non-NULL success 351 * @retval NULL allocation failed 352 */ 353METHOD struct bhnd_devinfo * alloc_devinfo { 354 device_t dev; 355}; 356 357/** 358 * Release memory previously allocated for @p devinfo. 359 * 360 * @param dev The bhnd bus device. 361 * @param dinfo A devinfo buffer previously allocated via 362 * BHND_BUS_ALLOC_DEVINFO(). 363 */ 364METHOD void free_devinfo { 365 device_t dev; 366 struct bhnd_devinfo *dinfo; 367}; 368 369/** 370 * Notify a bhnd bus that a child was added. 371 * 372 * This method must be called by concrete bhnd(4) driver impementations 373 * after @p child's bus state is fully initialized. 374 * 375 * @param dev The bhnd bus whose child is being added. 376 * @param child The child added to @p dev. 377 */ 378METHOD void child_added { 379 device_t dev; 380 device_t child; 381} DEFAULT bhnd_bus_null_child_added; 382 383/** 384 * Reset the device's hardware core. 385 * 386 * @param dev The parent of @p child. 387 * @param child The device to be reset. 388 * @param flags Device-specific core flags to be supplied on reset. 389 * 390 * @retval 0 success 391 * @retval non-zero error 392 */ 393METHOD int reset_core { 394 device_t dev; 395 device_t child; 396 uint16_t flags; 397} 398 399/** 400 * Suspend a device hardware core. 401 * 402 * @param dev The parent of @p child. 403 * @param child The device to be reset. 404 * 405 * @retval 0 success 406 * @retval non-zero error 407 */ 408METHOD int suspend_core { 409 device_t dev; 410 device_t child; 411} 412 413/** 414 * If supported by the chipset, return the clock source for the given clock. 415 * 416 * This function is only supported on early PWRCTL-equipped chipsets 417 * that expose clock management via their host bridge interface. Currently, 418 * this includes PCI (not PCIe) devices, with ChipCommon core revisions 0-9. 419 * 420 * @param dev The parent of @p child. 421 * @param child The bhnd device requesting a clock source. 422 * @param clock The clock for which a clock source will be returned. 423 * 424 * @retval bhnd_clksrc The clock source for @p clock. 425 * @retval BHND_CLKSRC_UNKNOWN If @p clock is unsupported, or its 426 * clock source is not known to the bus. 427 */ 428METHOD bhnd_clksrc pwrctl_get_clksrc { 429 device_t dev; 430 device_t child; 431 bhnd_clock clock; 432} DEFAULT bhnd_bus_null_pwrctl_get_clksrc; 433 434/** 435 * If supported by the chipset, gate the clock source for @p clock 436 * 437 * This function is only supported on early PWRCTL-equipped chipsets 438 * that expose clock management via their host bridge interface. Currently, 439 * this includes PCI (not PCIe) devices, with ChipCommon core revisions 0-9. 440 * 441 * @param dev The parent of @p child. 442 * @param child The bhnd device requesting clock gating. 443 * @param clock The clock to be disabled. 444 * 445 * @retval 0 success 446 * @retval ENODEV If bus-level clock source management is not supported. 447 * @retval ENXIO If bus-level management of @p clock is not supported. 448 */ 449METHOD int pwrctl_gate_clock { 450 device_t dev; 451 device_t child; 452 bhnd_clock clock; 453} DEFAULT bhnd_bus_null_pwrctl_gate_clock; 454 455/** 456 * If supported by the chipset, ungate the clock source for @p clock 457 * 458 * This function is only supported on early PWRCTL-equipped chipsets 459 * that expose clock management via their host bridge interface. Currently, 460 * this includes PCI (not PCIe) devices, with ChipCommon core revisions 0-9. 461 * 462 * @param dev The parent of @p child. 463 * @param child The bhnd device requesting clock gating. 464 * @param clock The clock to be enabled. 465 * 466 * @retval 0 success 467 * @retval ENODEV If bus-level clock source management is not supported. 468 * @retval ENXIO If bus-level management of @p clock is not supported. 469 */ 470METHOD int pwrctl_ungate_clock { 471 device_t dev; 472 device_t child; 473 bhnd_clock clock; 474} DEFAULT bhnd_bus_null_pwrctl_ungate_clock; 475 476/** 477 * Allocate and enable per-core PMU request handling for @p child. 478 * 479 * The region containing the core's PMU register block (if any) must be 480 * allocated via bus_alloc_resource(9) (or bhnd_alloc_resource) before 481 * calling BHND_BUS_ALLOC_PMU(), and must not be released until after 482 * calling BHND_BUS_RELEASE_PMU(). 483 * 484 * @param dev The parent of @p child. 485 * @param child The requesting bhnd device. 486 */ 487METHOD int alloc_pmu { 488 device_t dev; 489 device_t child; 490} DEFAULT bhnd_bus_null_alloc_pmu; 491 492/** 493 * Release per-core PMU resources allocated for @p child. Any 494 * outstanding PMU requests are discarded. 495 * 496 * @param dev The parent of @p child. 497 * @param child The requesting bhnd device. 498 */ 499METHOD int release_pmu { 500 device_t dev; 501 device_t child; 502} DEFAULT bhnd_bus_null_release_pmu; 503 504/** 505 * Request that @p clock (or faster) be routed to @p child. 506 * 507 * A driver must ask the bhnd bus to allocate PMU request state 508 * via BHND_BUS_ALLOC_PMU() before it can request clock resources. 509 * 510 * Request multiplexing is managed by the bus. 511 * 512 * @param dev The parent of @p child. 513 * @param child The bhnd device requesting @p clock. 514 * @param clock The requested clock source. 515 * 516 * @retval 0 success 517 * @retval ENODEV If an unsupported clock was requested. 518 * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. 519 */ 520METHOD int request_clock { 521 device_t dev; 522 device_t child; 523 bhnd_clock clock; 524} DEFAULT bhnd_bus_null_request_clock; 525 526/** 527 * Request that @p clocks be powered on behalf of @p child. 528 * 529 * This will power on clock sources (e.g. XTAL, PLL, etc) required for 530 * @p clocks and wait until they are ready, discarding any previous 531 * requests by @p child. 532 * 533 * Request multiplexing is managed by the bus. 534 * 535 * A driver must ask the bhnd bus to allocate PMU request state 536 * via BHND_BUS_ALLOC_PMU() before it can request clock resources. 537 * 538 * @param dev The parent of @p child. 539 * @param child The bhnd device requesting @p clock. 540 * @param clock The requested clock source. 541 * 542 * @retval 0 success 543 * @retval ENODEV If an unsupported clock was requested. 544 * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. 545 */ 546METHOD int enable_clocks { 547 device_t dev; 548 device_t child; 549 uint32_t clocks; 550} DEFAULT bhnd_bus_null_enable_clocks; 551 552/** 553 * Power up an external PMU-managed resource assigned to @p child. 554 * 555 * A driver must ask the bhnd bus to allocate PMU request state 556 * via BHND_BUS_ALLOC_PMU() before it can request PMU resources. 557 * 558 * @param dev The parent of @p child. 559 * @param child The bhnd device requesting @p rsrc. 560 * @param rsrc The core-specific external resource identifier. 561 * 562 * @retval 0 success 563 * @retval ENODEV If the PMU does not support @p rsrc. 564 * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. 565 */ 566METHOD int request_ext_rsrc { 567 device_t dev; 568 device_t child; 569 u_int rsrc; 570} DEFAULT bhnd_bus_null_request_ext_rsrc; 571 572/** 573 * Power down an external PMU-managed resource assigned to @p child. 574 * 575 * A driver must ask the bhnd bus to allocate PMU request state 576 * via BHND_BUS_ALLOC_PMU() before it can request PMU resources. 577 * 578 * @param dev The parent of @p child. 579 * @param child The bhnd device requesting @p rsrc. 580 * @param rsrc The core-specific external resource number. 581 * 582 * @retval 0 success 583 * @retval ENODEV If the PMU does not support @p rsrc. 584 * @retval ENXIO If the PMU has not been initialized or is otherwise unvailable. 585 */ 586METHOD int release_ext_rsrc { 587 device_t dev; 588 device_t child; 589 u_int rsrc; 590} DEFAULT bhnd_bus_null_release_ext_rsrc; 591 592/** 593 * Read @p width bytes at @p offset from the bus-specific agent/config 594 * space of @p child. 595 * 596 * @param dev The parent of @p child. 597 * @param child The bhnd device for which @p offset should be read. 598 * @param offset The offset to be read. 599 * @param width The size of the access. Must be 1, 2 or 4 bytes. 600 * 601 * The exact behavior of this method is bus-specific. On a bcma(4) bus, this 602 * method provides access to the first agent port of @p child; on a siba(4) bus, 603 * this method provides access to the core's CFG0 register block. 604 * 605 * @note Device drivers should only use this API for functionality 606 * that is not available via another bhnd(4) function. 607 */ 608METHOD uint32_t read_config { 609 device_t dev; 610 device_t child; 611 bus_size_t offset; 612 u_int width; 613} DEFAULT bhnd_bus_null_read_config; 614 615/** 616 * Read @p width bytes at @p offset from the bus-specific agent/config 617 * space of @p child. 618 * 619 * @param dev The parent of @p child. 620 * @param child The bhnd device for which @p offset should be read. 621 * @param offset The offset to be written. 622 * @param width The size of the access. Must be 1, 2 or 4 bytes. 623 * 624 * The exact behavior of this method is bus-specific. In the case of 625 * bcma(4), this method provides access to the first agent port of @p child. 626 * 627 * @note Device drivers should only use this API for functionality 628 * that is not available via another bhnd(4) function. 629 */ 630METHOD void write_config { 631 device_t dev; 632 device_t child; 633 bus_size_t offset; 634 uint32_t val; 635 u_int width; 636} DEFAULT bhnd_bus_null_write_config; 637 638/** 639 * Allocate a bhnd resource. 640 * 641 * This method's semantics are functionally identical to the bus API of the same 642 * name; refer to BUS_ALLOC_RESOURCE for complete documentation. 643 */ 644METHOD struct bhnd_resource * alloc_resource { 645 device_t dev; 646 device_t child; 647 int type; 648 int *rid; 649 rman_res_t start; 650 rman_res_t end; 651 rman_res_t count; 652 u_int flags; 653} DEFAULT bhnd_bus_generic_alloc_resource; 654 655/** 656 * Release a bhnd resource. 657 * 658 * This method's semantics are functionally identical to the bus API of the same 659 * name; refer to BUS_RELEASE_RESOURCE for complete documentation. 660 */ 661METHOD int release_resource { 662 device_t dev; 663 device_t child; 664 int type; 665 int rid; 666 struct bhnd_resource *res; 667} DEFAULT bhnd_bus_generic_release_resource; 668 669/** 670 * Activate a bhnd resource. 671 * 672 * This method's semantics are functionally identical to the bus API of the same 673 * name; refer to BUS_ACTIVATE_RESOURCE for complete documentation. 674 */ 675METHOD int activate_resource { 676 device_t dev; 677 device_t child; 678 int type; 679 int rid; 680 struct bhnd_resource *r; 681} DEFAULT bhnd_bus_generic_activate_resource; 682 683/** 684 * Deactivate a bhnd resource. 685 * 686 * This method's semantics are functionally identical to the bus API of the same 687 * name; refer to BUS_DEACTIVATE_RESOURCE for complete documentation. 688 */ 689METHOD int deactivate_resource { 690 device_t dev; 691 device_t child; 692 int type; 693 int rid; 694 struct bhnd_resource *r; 695} DEFAULT bhnd_bus_generic_deactivate_resource; 696 697/** 698 * Return true if @p region_num is a valid region on @p port_num of 699 * @p type attached to @p child. 700 * 701 * @param dev The device whose child is being examined. 702 * @param child The child device. 703 * @param type The port type being queried. 704 * @param port_num The port number being queried. 705 * @param region_num The region number being queried. 706 */ 707METHOD bool is_region_valid { 708 device_t dev; 709 device_t child; 710 bhnd_port_type type; 711 u_int port_num; 712 u_int region_num; 713}; 714 715/** 716 * Return the number of ports of type @p type attached to @p child. 717 * 718 * @param dev The device whose child is being examined. 719 * @param child The child device. 720 * @param type The port type being queried. 721 */ 722METHOD u_int get_port_count { 723 device_t dev; 724 device_t child; 725 bhnd_port_type type; 726}; 727 728/** 729 * Return the number of memory regions mapped to @p child @p port of 730 * type @p type. 731 * 732 * @param dev The device whose child is being examined. 733 * @param child The child device. 734 * @param port The port number being queried. 735 * @param type The port type being queried. 736 */ 737METHOD u_int get_region_count { 738 device_t dev; 739 device_t child; 740 bhnd_port_type type; 741 u_int port; 742}; 743 744/** 745 * Return the SYS_RES_MEMORY resource-ID for a port/region pair attached to 746 * @p child. 747 * 748 * @param dev The bus device. 749 * @param child The bhnd child. 750 * @param port_type The port type. 751 * @param port_num The index of the child interconnect port. 752 * @param region_num The index of the port-mapped address region. 753 * 754 * @retval -1 No such port/region found. 755 */ 756METHOD int get_port_rid { 757 device_t dev; 758 device_t child; 759 bhnd_port_type port_type; 760 u_int port_num; 761 u_int region_num; 762} DEFAULT bhnd_bus_null_get_port_rid; 763 764 765/** 766 * Decode a port / region pair on @p child defined by @p type and @p rid. 767 * 768 * @param dev The bus device. 769 * @param child The bhnd child. 770 * @param type The resource type. 771 * @param rid The resource ID. 772 * @param[out] port_type The port's type. 773 * @param[out] port The port identifier. 774 * @param[out] region The identifier of the memory region on @p port. 775 * 776 * @retval 0 success 777 * @retval non-zero No matching type/rid found. 778 */ 779METHOD int decode_port_rid { 780 device_t dev; 781 device_t child; 782 int type; 783 int rid; 784 bhnd_port_type *port_type; 785 u_int *port; 786 u_int *region; 787} DEFAULT bhnd_bus_null_decode_port_rid; 788 789/** 790 * Get the address and size of @p region on @p port. 791 * 792 * @param dev The bus device. 793 * @param child The bhnd child. 794 * @param port_type The port type. 795 * @param port The port identifier. 796 * @param region The identifier of the memory region on @p port. 797 * @param[out] region_addr The region's base address. 798 * @param[out] region_size The region's size. 799 * 800 * @retval 0 success 801 * @retval non-zero No matching port/region found. 802 */ 803METHOD int get_region_addr { 804 device_t dev; 805 device_t child; 806 bhnd_port_type port_type; 807 u_int port; 808 u_int region; 809 bhnd_addr_t *region_addr; 810 bhnd_size_t *region_size; 811} DEFAULT bhnd_bus_null_get_region_addr; 812 813/** 814 * Read an NVRAM variable. 815 * 816 * It is the responsibility of the bus to delegate this request to 817 * the appropriate NVRAM child device, or to a parent bus implementation. 818 * 819 * @param dev The bus device. 820 * @param child The requesting device. 821 * @param name The NVRAM variable name. 822 * @param[out] buf On success, the requested value will be written 823 * to this buffer. This argment may be NULL if 824 * the value is not desired. 825 * @param[in,out] size The capacity of @p buf. On success, will be set 826 * to the actual size of the requested value. 827 * @param type The data type to be written to @p buf. 828 * 829 * @retval 0 success 830 * @retval ENOENT The requested variable was not found. 831 * @retval ENOMEM If @p buf is non-NULL and a buffer of @p size is too 832 * small to hold the requested value. 833 * @retval ENODEV No valid NVRAM source could be found. 834 * @retval EFTYPE If the @p name's data type cannot be coerced to @p type. 835 * @retval ERANGE If value coercion would overflow @p type. 836 * @retval non-zero If reading @p name otherwise fails, a regular unix 837 * error code will be returned. 838 */ 839METHOD int get_nvram_var { 840 device_t dev; 841 device_t child; 842 const char *name; 843 void *buf; 844 size_t *size; 845 bhnd_nvram_type type; 846} DEFAULT bhnd_bus_null_get_nvram_var; 847 848 849/** An implementation of bus_read_1() compatible with bhnd_resource */ 850METHOD uint8_t read_1 { 851 device_t dev; 852 device_t child; 853 struct bhnd_resource *r; 854 bus_size_t offset; 855} 856 857/** An implementation of bus_read_2() compatible with bhnd_resource */ 858METHOD uint16_t read_2 { 859 device_t dev; 860 device_t child; 861 struct bhnd_resource *r; 862 bus_size_t offset; 863} 864 865/** An implementation of bus_read_4() compatible with bhnd_resource */ 866METHOD uint32_t read_4 { 867 device_t dev; 868 device_t child; 869 struct bhnd_resource *r; 870 bus_size_t offset; 871} 872 873/** An implementation of bus_write_1() compatible with bhnd_resource */ 874METHOD void write_1 { 875 device_t dev; 876 device_t child; 877 struct bhnd_resource *r; 878 bus_size_t offset; 879 uint8_t value; 880} 881 882/** An implementation of bus_write_2() compatible with bhnd_resource */ 883METHOD void write_2 { 884 device_t dev; 885 device_t child; 886 struct bhnd_resource *r; 887 bus_size_t offset; 888 uint16_t value; 889} 890 891/** An implementation of bus_write_4() compatible with bhnd_resource */ 892METHOD void write_4 { 893 device_t dev; 894 device_t child; 895 struct bhnd_resource *r; 896 bus_size_t offset; 897 uint32_t value; 898} 899 900/** An implementation of bus_read_stream_1() compatible with bhnd_resource */ 901METHOD uint8_t read_stream_1 { 902 device_t dev; 903 device_t child; 904 struct bhnd_resource *r; 905 bus_size_t offset; 906} 907 908/** An implementation of bus_read_stream_2() compatible with bhnd_resource */ 909METHOD uint16_t read_stream_2 { 910 device_t dev; 911 device_t child; 912 struct bhnd_resource *r; 913 bus_size_t offset; 914} 915 916/** An implementation of bus_read_stream_4() compatible with bhnd_resource */ 917METHOD uint32_t read_stream_4 { 918 device_t dev; 919 device_t child; 920 struct bhnd_resource *r; 921 bus_size_t offset; 922} 923 924/** An implementation of bus_write_stream_1() compatible with bhnd_resource */ 925METHOD void write_stream_1 { 926 device_t dev; 927 device_t child; 928 struct bhnd_resource *r; 929 bus_size_t offset; 930 uint8_t value; 931} 932 933/** An implementation of bus_write_stream_2() compatible with bhnd_resource */ 934METHOD void write_stream_2 { 935 device_t dev; 936 device_t child; 937 struct bhnd_resource *r; 938 bus_size_t offset; 939 uint16_t value; 940} 941 942/** An implementation of bus_write_stream_4() compatible with bhnd_resource */ 943METHOD void write_stream_4 { 944 device_t dev; 945 device_t child; 946 struct bhnd_resource *r; 947 bus_size_t offset; 948 uint32_t value; 949} 950 951/** An implementation of bus_read_multi_1() compatible with bhnd_resource */ 952METHOD void read_multi_1 { 953 device_t dev; 954 device_t child; 955 struct bhnd_resource *r; 956 bus_size_t offset; 957 uint8_t *datap; 958 bus_size_t count; 959} 960 961/** An implementation of bus_read_multi_2() compatible with bhnd_resource */ 962METHOD void read_multi_2 { 963 device_t dev; 964 device_t child; 965 struct bhnd_resource *r; 966 bus_size_t offset; 967 uint16_t *datap; 968 bus_size_t count; 969} 970 971/** An implementation of bus_read_multi_4() compatible with bhnd_resource */ 972METHOD void read_multi_4 { 973 device_t dev; 974 device_t child; 975 struct bhnd_resource *r; 976 bus_size_t offset; 977 uint32_t *datap; 978 bus_size_t count; 979} 980 981/** An implementation of bus_write_multi_1() compatible with bhnd_resource */ 982METHOD void write_multi_1 { 983 device_t dev; 984 device_t child; 985 struct bhnd_resource *r; 986 bus_size_t offset; 987 uint8_t *datap; 988 bus_size_t count; 989} 990 991/** An implementation of bus_write_multi_2() compatible with bhnd_resource */ 992METHOD void write_multi_2 { 993 device_t dev; 994 device_t child; 995 struct bhnd_resource *r; 996 bus_size_t offset; 997 uint16_t *datap; 998 bus_size_t count; 999} 1000 1001/** An implementation of bus_write_multi_4() compatible with bhnd_resource */ 1002METHOD void write_multi_4 { 1003 device_t dev; 1004 device_t child; 1005 struct bhnd_resource *r; 1006 bus_size_t offset; 1007 uint32_t *datap; 1008 bus_size_t count; 1009} 1010 1011/** An implementation of bus_read_multi_stream_1() compatible 1012 * bhnd_resource */ 1013METHOD void read_multi_stream_1 { 1014 device_t dev; 1015 device_t child; 1016 struct bhnd_resource *r; 1017 bus_size_t offset; 1018 uint8_t *datap; 1019 bus_size_t count; 1020} 1021 1022/** An implementation of bus_read_multi_stream_2() compatible 1023 * bhnd_resource */ 1024METHOD void read_multi_stream_2 { 1025 device_t dev; 1026 device_t child; 1027 struct bhnd_resource *r; 1028 bus_size_t offset; 1029 uint16_t *datap; 1030 bus_size_t count; 1031} 1032 1033/** An implementation of bus_read_multi_stream_4() compatible 1034 * bhnd_resource */ 1035METHOD void read_multi_stream_4 { 1036 device_t dev; 1037 device_t child; 1038 struct bhnd_resource *r; 1039 bus_size_t offset; 1040 uint32_t *datap; 1041 bus_size_t count; 1042} 1043 1044/** An implementation of bus_write_multi_stream_1() compatible 1045 * bhnd_resource */ 1046METHOD void write_multi_stream_1 { 1047 device_t dev; 1048 device_t child; 1049 struct bhnd_resource *r; 1050 bus_size_t offset; 1051 uint8_t *datap; 1052 bus_size_t count; 1053} 1054 1055/** An implementation of bus_write_multi_stream_2() compatible with 1056 * bhnd_resource */ 1057METHOD void write_multi_stream_2 { 1058 device_t dev; 1059 device_t child; 1060 struct bhnd_resource *r; 1061 bus_size_t offset; 1062 uint16_t *datap; 1063 bus_size_t count; 1064} 1065 1066/** An implementation of bus_write_multi_stream_4() compatible with 1067 * bhnd_resource */ 1068METHOD void write_multi_stream_4 { 1069 device_t dev; 1070 device_t child; 1071 struct bhnd_resource *r; 1072 bus_size_t offset; 1073 uint32_t *datap; 1074 bus_size_t count; 1075} 1076 1077/** An implementation of bus_set_multi_1() compatible with bhnd_resource */ 1078METHOD void set_multi_1 { 1079 device_t dev; 1080 device_t child; 1081 struct bhnd_resource *r; 1082 bus_size_t offset; 1083 uint8_t value; 1084 bus_size_t count; 1085} 1086 1087/** An implementation of bus_set_multi_2() compatible with bhnd_resource */ 1088METHOD void set_multi_2 { 1089 device_t dev; 1090 device_t child; 1091 struct bhnd_resource *r; 1092 bus_size_t offset; 1093 uint16_t value; 1094 bus_size_t count; 1095} 1096 1097/** An implementation of bus_set_multi_4() compatible with bhnd_resource */ 1098METHOD void set_multi_4 { 1099 device_t dev; 1100 device_t child; 1101 struct bhnd_resource *r; 1102 bus_size_t offset; 1103 uint32_t value; 1104 bus_size_t count; 1105} 1106 1107/** An implementation of bus_set_region_1() compatible with bhnd_resource */ 1108METHOD void set_region_1 { 1109 device_t dev; 1110 device_t child; 1111 struct bhnd_resource *r; 1112 bus_size_t offset; 1113 uint8_t value; 1114 bus_size_t count; 1115} 1116 1117/** An implementation of bus_set_region_2() compatible with bhnd_resource */ 1118METHOD void set_region_2 { 1119 device_t dev; 1120 device_t child; 1121 struct bhnd_resource *r; 1122 bus_size_t offset; 1123 uint16_t value; 1124 bus_size_t count; 1125} 1126 1127/** An implementation of bus_set_region_4() compatible with bhnd_resource */ 1128METHOD void set_region_4 { 1129 device_t dev; 1130 device_t child; 1131 struct bhnd_resource *r; 1132 bus_size_t offset; 1133 uint32_t value; 1134 bus_size_t count; 1135} 1136 1137/** An implementation of bus_read_region_1() compatible with bhnd_resource */ 1138METHOD void read_region_1 { 1139 device_t dev; 1140 device_t child; 1141 struct bhnd_resource *r; 1142 bus_size_t offset; 1143 uint8_t *datap; 1144 bus_size_t count; 1145} 1146 1147/** An implementation of bus_read_region_2() compatible with bhnd_resource */ 1148METHOD void read_region_2 { 1149 device_t dev; 1150 device_t child; 1151 struct bhnd_resource *r; 1152 bus_size_t offset; 1153 uint16_t *datap; 1154 bus_size_t count; 1155} 1156 1157/** An implementation of bus_read_region_4() compatible with bhnd_resource */ 1158METHOD void read_region_4 { 1159 device_t dev; 1160 device_t child; 1161 struct bhnd_resource *r; 1162 bus_size_t offset; 1163 uint32_t *datap; 1164 bus_size_t count; 1165} 1166 1167/** An implementation of bus_read_region_stream_1() compatible with 1168 * bhnd_resource */ 1169METHOD void read_region_stream_1 { 1170 device_t dev; 1171 device_t child; 1172 struct bhnd_resource *r; 1173 bus_size_t offset; 1174 uint8_t *datap; 1175 bus_size_t count; 1176} 1177 1178/** An implementation of bus_read_region_stream_2() compatible with 1179 * bhnd_resource */ 1180METHOD void read_region_stream_2 { 1181 device_t dev; 1182 device_t child; 1183 struct bhnd_resource *r; 1184 bus_size_t offset; 1185 uint16_t *datap; 1186 bus_size_t count; 1187} 1188 1189/** An implementation of bus_read_region_stream_4() compatible with 1190 * bhnd_resource */ 1191METHOD void read_region_stream_4 { 1192 device_t dev; 1193 device_t child; 1194 struct bhnd_resource *r; 1195 bus_size_t offset; 1196 uint32_t *datap; 1197 bus_size_t count; 1198} 1199 1200/** An implementation of bus_write_region_1() compatible with bhnd_resource */ 1201METHOD void write_region_1 { 1202 device_t dev; 1203 device_t child; 1204 struct bhnd_resource *r; 1205 bus_size_t offset; 1206 uint8_t *datap; 1207 bus_size_t count; 1208} 1209 1210/** An implementation of bus_write_region_2() compatible with bhnd_resource */ 1211METHOD void write_region_2 { 1212 device_t dev; 1213 device_t child; 1214 struct bhnd_resource *r; 1215 bus_size_t offset; 1216 uint16_t *datap; 1217 bus_size_t count; 1218} 1219 1220/** An implementation of bus_write_region_4() compatible with bhnd_resource */ 1221METHOD void write_region_4 { 1222 device_t dev; 1223 device_t child; 1224 struct bhnd_resource *r; 1225 bus_size_t offset; 1226 uint32_t *datap; 1227 bus_size_t count; 1228} 1229 1230/** An implementation of bus_write_region_stream_1() compatible with 1231 * bhnd_resource */ 1232METHOD void write_region_stream_1 { 1233 device_t dev; 1234 device_t child; 1235 struct bhnd_resource *r; 1236 bus_size_t offset; 1237 uint8_t *datap; 1238 bus_size_t count; 1239} 1240 1241/** An implementation of bus_write_region_stream_2() compatible with 1242 * bhnd_resource */ 1243METHOD void write_region_stream_2 { 1244 device_t dev; 1245 device_t child; 1246 struct bhnd_resource *r; 1247 bus_size_t offset; 1248 uint16_t *datap; 1249 bus_size_t count; 1250} 1251 1252/** An implementation of bus_write_region_stream_4() compatible with 1253 * bhnd_resource */ 1254METHOD void write_region_stream_4 { 1255 device_t dev; 1256 device_t child; 1257 struct bhnd_resource *r; 1258 bus_size_t offset; 1259 uint32_t *datap; 1260 bus_size_t count; 1261} 1262 1263/** An implementation of bus_barrier() compatible with bhnd_resource */ 1264METHOD void barrier { 1265 device_t dev; 1266 device_t child; 1267 struct bhnd_resource *r; 1268 bus_size_t offset; 1269 bus_size_t length; 1270 int flags; 1271} 1272