xref: /freebsd/sys/dev/bge/if_bge.c (revision ff50922b1600641d0ce16c132393f9123a681e04)
1098ca2bdSWarner Losh /*-
295d67482SBill Paul  * Copyright (c) 2001 Wind River Systems
395d67482SBill Paul  * Copyright (c) 1997, 1998, 1999, 2001
495d67482SBill Paul  *	Bill Paul <wpaul@windriver.com>.  All rights reserved.
595d67482SBill Paul  *
695d67482SBill Paul  * Redistribution and use in source and binary forms, with or without
795d67482SBill Paul  * modification, are permitted provided that the following conditions
895d67482SBill Paul  * are met:
995d67482SBill Paul  * 1. Redistributions of source code must retain the above copyright
1095d67482SBill Paul  *    notice, this list of conditions and the following disclaimer.
1195d67482SBill Paul  * 2. Redistributions in binary form must reproduce the above copyright
1295d67482SBill Paul  *    notice, this list of conditions and the following disclaimer in the
1395d67482SBill Paul  *    documentation and/or other materials provided with the distribution.
1495d67482SBill Paul  * 3. All advertising materials mentioning features or use of this software
1595d67482SBill Paul  *    must display the following acknowledgement:
1695d67482SBill Paul  *	This product includes software developed by Bill Paul.
1795d67482SBill Paul  * 4. Neither the name of the author nor the names of any co-contributors
1895d67482SBill Paul  *    may be used to endorse or promote products derived from this software
1995d67482SBill Paul  *    without specific prior written permission.
2095d67482SBill Paul  *
2195d67482SBill Paul  * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
2295d67482SBill Paul  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
2395d67482SBill Paul  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
2495d67482SBill Paul  * ARE DISCLAIMED.  IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
2595d67482SBill Paul  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
2695d67482SBill Paul  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2795d67482SBill Paul  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2895d67482SBill Paul  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
2995d67482SBill Paul  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
3095d67482SBill Paul  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
3195d67482SBill Paul  * THE POSSIBILITY OF SUCH DAMAGE.
3295d67482SBill Paul  */
3395d67482SBill Paul 
34aad970f1SDavid E. O'Brien #include <sys/cdefs.h>
35aad970f1SDavid E. O'Brien __FBSDID("$FreeBSD$");
36aad970f1SDavid E. O'Brien 
3795d67482SBill Paul /*
3895d67482SBill Paul  * Broadcom BCM570x family gigabit ethernet driver for FreeBSD.
3995d67482SBill Paul  *
4095d67482SBill Paul  * The Broadcom BCM5700 is based on technology originally developed by
4195d67482SBill Paul  * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet
4295d67482SBill Paul  * MAC chips. The BCM5700, sometimes refered to as the Tigon III, has
4395d67482SBill Paul  * two on-board MIPS R4000 CPUs and can have as much as 16MB of external
4495d67482SBill Paul  * SSRAM. The BCM5700 supports TCP, UDP and IP checksum offload, jumbo
4595d67482SBill Paul  * frames, highly configurable RX filtering, and 16 RX and TX queues
4695d67482SBill Paul  * (which, along with RX filter rules, can be used for QOS applications).
4795d67482SBill Paul  * Other features, such as TCP segmentation, may be available as part
4895d67482SBill Paul  * of value-added firmware updates. Unlike the Tigon I and Tigon II,
4995d67482SBill Paul  * firmware images can be stored in hardware and need not be compiled
5095d67482SBill Paul  * into the driver.
5195d67482SBill Paul  *
5295d67482SBill Paul  * The BCM5700 supports the PCI v2.2 and PCI-X v1.0 standards, and will
5395d67482SBill Paul  * function in a 32-bit/64-bit 33/66Mhz bus, or a 64-bit/133Mhz bus.
5495d67482SBill Paul  *
5595d67482SBill Paul  * The BCM5701 is a single-chip solution incorporating both the BCM5700
5698b28ee5SBill Paul  * MAC and a BCM5401 10/100/1000 PHY. Unlike the BCM5700, the BCM5701
5795d67482SBill Paul  * does not support external SSRAM.
5895d67482SBill Paul  *
5995d67482SBill Paul  * Broadcom also produces a variation of the BCM5700 under the "Altima"
6095d67482SBill Paul  * brand name, which is functionally similar but lacks PCI-X support.
6195d67482SBill Paul  *
6295d67482SBill Paul  * Without external SSRAM, you can only have at most 4 TX rings,
6395d67482SBill Paul  * and the use of the mini RX ring is disabled. This seems to imply
6495d67482SBill Paul  * that these features are simply not available on the BCM5701. As a
6595d67482SBill Paul  * result, this driver does not implement any support for the mini RX
6695d67482SBill Paul  * ring.
6795d67482SBill Paul  */
6895d67482SBill Paul 
6995d67482SBill Paul #include <sys/param.h>
70f41ac2beSBill Paul #include <sys/endian.h>
7195d67482SBill Paul #include <sys/systm.h>
7295d67482SBill Paul #include <sys/sockio.h>
7395d67482SBill Paul #include <sys/mbuf.h>
7495d67482SBill Paul #include <sys/malloc.h>
7595d67482SBill Paul #include <sys/kernel.h>
76fe12f24bSPoul-Henning Kamp #include <sys/module.h>
7795d67482SBill Paul #include <sys/socket.h>
7895d67482SBill Paul #include <sys/queue.h>
7995d67482SBill Paul 
8095d67482SBill Paul #include <net/if.h>
8195d67482SBill Paul #include <net/if_arp.h>
8295d67482SBill Paul #include <net/ethernet.h>
8395d67482SBill Paul #include <net/if_dl.h>
8495d67482SBill Paul #include <net/if_media.h>
8595d67482SBill Paul 
8695d67482SBill Paul #include <net/bpf.h>
8795d67482SBill Paul 
8895d67482SBill Paul #include <net/if_types.h>
8995d67482SBill Paul #include <net/if_vlan_var.h>
9095d67482SBill Paul 
9195d67482SBill Paul #include <netinet/in_systm.h>
9295d67482SBill Paul #include <netinet/in.h>
9395d67482SBill Paul #include <netinet/ip.h>
9495d67482SBill Paul 
9595d67482SBill Paul #include <machine/clock.h>      /* for DELAY */
9695d67482SBill Paul #include <machine/bus.h>
9795d67482SBill Paul #include <machine/resource.h>
9895d67482SBill Paul #include <sys/bus.h>
9995d67482SBill Paul #include <sys/rman.h>
10095d67482SBill Paul 
10195d67482SBill Paul #include <dev/mii/mii.h>
10295d67482SBill Paul #include <dev/mii/miivar.h>
1032d3ce713SDavid E. O'Brien #include "miidevs.h"
10495d67482SBill Paul #include <dev/mii/brgphyreg.h>
10595d67482SBill Paul 
1064fbd232cSWarner Losh #include <dev/pci/pcireg.h>
1074fbd232cSWarner Losh #include <dev/pci/pcivar.h>
10895d67482SBill Paul 
10995d67482SBill Paul #include <dev/bge/if_bgereg.h>
11095d67482SBill Paul 
111ff50922bSDoug White #include "opt_bge.h"
112ff50922bSDoug White 
1135ddc5794SJohn Polstra #define BGE_CSUM_FEATURES	(CSUM_IP | CSUM_TCP | CSUM_UDP)
11495d67482SBill Paul 
115f246e4a1SMatthew N. Dodd MODULE_DEPEND(bge, pci, 1, 1, 1);
116f246e4a1SMatthew N. Dodd MODULE_DEPEND(bge, ether, 1, 1, 1);
11795d67482SBill Paul MODULE_DEPEND(bge, miibus, 1, 1, 1);
11895d67482SBill Paul 
11995d67482SBill Paul /* "controller miibus0" required.  See GENERIC if you get errors here. */
12095d67482SBill Paul #include "miibus_if.h"
12195d67482SBill Paul 
12295d67482SBill Paul /*
12395d67482SBill Paul  * Various supported device vendors/types and their names. Note: the
12495d67482SBill Paul  * spec seems to indicate that the hardware still has Alteon's vendor
12595d67482SBill Paul  * ID burned into it, though it will always be overriden by the vendor
12695d67482SBill Paul  * ID in the EEPROM. Just to be safe, we cover all possibilities.
12795d67482SBill Paul  */
128029e2ee3SJohn Polstra #define BGE_DEVDESC_MAX		64	/* Maximum device description length */
12995d67482SBill Paul 
13095d67482SBill Paul static struct bge_type bge_devs[] = {
13195d67482SBill Paul 	{ ALT_VENDORID,	ALT_DEVICEID_BCM5700,
13295d67482SBill Paul 		"Broadcom BCM5700 Gigabit Ethernet" },
13395d67482SBill Paul 	{ ALT_VENDORID,	ALT_DEVICEID_BCM5701,
13495d67482SBill Paul 		"Broadcom BCM5701 Gigabit Ethernet" },
13595d67482SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5700,
13695d67482SBill Paul 		"Broadcom BCM5700 Gigabit Ethernet" },
13795d67482SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5701,
13895d67482SBill Paul 		"Broadcom BCM5701 Gigabit Ethernet" },
1390434d1b8SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5702,
1400434d1b8SBill Paul 		"Broadcom BCM5702 Gigabit Ethernet" },
14101598b8dSMitsuru IWASAKI 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5702X,
14201598b8dSMitsuru IWASAKI 		"Broadcom BCM5702X Gigabit Ethernet" },
1430434d1b8SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5703,
1440434d1b8SBill Paul 		"Broadcom BCM5703 Gigabit Ethernet" },
145b1265c1aSJohn Polstra 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5703X,
146b1265c1aSJohn Polstra 		"Broadcom BCM5703X Gigabit Ethernet" },
1476ac6d2c8SPaul Saab 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5704C,
1486ac6d2c8SPaul Saab 		"Broadcom BCM5704C Dual Gigabit Ethernet" },
1496ac6d2c8SPaul Saab 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5704S,
1506ac6d2c8SPaul Saab 		"Broadcom BCM5704S Dual Gigabit Ethernet" },
1510434d1b8SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705,
1520434d1b8SBill Paul 		"Broadcom BCM5705 Gigabit Ethernet" },
153c001ccf2SPaul Saab 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705K,
154c001ccf2SPaul Saab 		"Broadcom BCM5705K Gigabit Ethernet" },
1550434d1b8SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705M,
1560434d1b8SBill Paul 		"Broadcom BCM5705M Gigabit Ethernet" },
1570434d1b8SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5705M_ALT,
1580434d1b8SBill Paul 		"Broadcom BCM5705M Gigabit Ethernet" },
159419c028bSPaul Saab 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5714C,
160419c028bSPaul Saab 		"Broadcom BCM5714C Gigabit Ethernet" },
16135ca8069SPaul Saab 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5721,
16235ca8069SPaul Saab 		"Broadcom BCM5721 Gigabit Ethernet" },
163e53d81eeSPaul Saab 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5750,
164e53d81eeSPaul Saab 		"Broadcom BCM5750 Gigabit Ethernet" },
165e53d81eeSPaul Saab 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5750M,
166e53d81eeSPaul Saab 		"Broadcom BCM5750M Gigabit Ethernet" },
167e53d81eeSPaul Saab 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5751,
168e53d81eeSPaul Saab 		"Broadcom BCM5751 Gigabit Ethernet" },
169d2014b30STai-hwa Liang 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5751M,
170d2014b30STai-hwa Liang 		"Broadcom BCM5751M Gigabit Ethernet" },
1710434d1b8SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5782,
1720434d1b8SBill Paul 		"Broadcom BCM5782 Gigabit Ethernet" },
1739f71a4c2SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5788,
1749f71a4c2SBill Paul 		"Broadcom BCM5788 Gigabit Ethernet" },
175c3615d48SMike Silbersack 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5789,
176c3615d48SMike Silbersack 		"Broadcom BCM5789 Gigabit Ethernet" },
1775d99c641SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5901,
1785d99c641SBill Paul 		"Broadcom BCM5901 Fast Ethernet" },
1795d99c641SBill Paul 	{ BCOM_VENDORID, BCOM_DEVICEID_BCM5901A2,
1805d99c641SBill Paul 		"Broadcom BCM5901A2 Fast Ethernet" },
18195d67482SBill Paul 	{ SK_VENDORID, SK_DEVICEID_ALTIMA,
18295d67482SBill Paul 		"SysKonnect Gigabit Ethernet" },
183586d7c2eSJohn Polstra 	{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC1000,
184586d7c2eSJohn Polstra 		"Altima AC1000 Gigabit Ethernet" },
1852aae6624SBill Paul 	{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC1002,
1862aae6624SBill Paul 		"Altima AC1002 Gigabit Ethernet" },
187470bd96aSJohn Polstra 	{ ALTIMA_VENDORID, ALTIMA_DEVICE_AC9100,
188470bd96aSJohn Polstra 		"Altima AC9100 Gigabit Ethernet" },
18995d67482SBill Paul 	{ 0, 0, NULL }
19095d67482SBill Paul };
19195d67482SBill Paul 
192e51a25f8SAlfred Perlstein static int bge_probe		(device_t);
193e51a25f8SAlfred Perlstein static int bge_attach		(device_t);
194e51a25f8SAlfred Perlstein static int bge_detach		(device_t);
19595d67482SBill Paul static void bge_release_resources
196e51a25f8SAlfred Perlstein 				(struct bge_softc *);
197f41ac2beSBill Paul static void bge_dma_map_addr	(void *, bus_dma_segment_t *, int, int);
198f41ac2beSBill Paul static void bge_dma_map_tx_desc	(void *, bus_dma_segment_t *, int,
199f41ac2beSBill Paul 				    bus_size_t, int);
200f41ac2beSBill Paul static int bge_dma_alloc	(device_t);
201f41ac2beSBill Paul static void bge_dma_free	(struct bge_softc *);
202f41ac2beSBill Paul 
203e51a25f8SAlfred Perlstein static void bge_txeof		(struct bge_softc *);
204e51a25f8SAlfred Perlstein static void bge_rxeof		(struct bge_softc *);
20595d67482SBill Paul 
2060f9bd73bSSam Leffler static void bge_tick_locked	(struct bge_softc *);
207e51a25f8SAlfred Perlstein static void bge_tick		(void *);
208e51a25f8SAlfred Perlstein static void bge_stats_update	(struct bge_softc *);
2090434d1b8SBill Paul static void bge_stats_update_regs
2100434d1b8SBill Paul 				(struct bge_softc *);
211e51a25f8SAlfred Perlstein static int bge_encap		(struct bge_softc *, struct mbuf *,
212e51a25f8SAlfred Perlstein 					u_int32_t *);
21395d67482SBill Paul 
214e51a25f8SAlfred Perlstein static void bge_intr		(void *);
2150f9bd73bSSam Leffler static void bge_start_locked	(struct ifnet *);
216e51a25f8SAlfred Perlstein static void bge_start		(struct ifnet *);
217e51a25f8SAlfred Perlstein static int bge_ioctl		(struct ifnet *, u_long, caddr_t);
2180f9bd73bSSam Leffler static void bge_init_locked	(struct bge_softc *);
219e51a25f8SAlfred Perlstein static void bge_init		(void *);
220e51a25f8SAlfred Perlstein static void bge_stop		(struct bge_softc *);
221e51a25f8SAlfred Perlstein static void bge_watchdog		(struct ifnet *);
222e51a25f8SAlfred Perlstein static void bge_shutdown		(device_t);
223e51a25f8SAlfred Perlstein static int bge_ifmedia_upd	(struct ifnet *);
224e51a25f8SAlfred Perlstein static void bge_ifmedia_sts	(struct ifnet *, struct ifmediareq *);
22595d67482SBill Paul 
226e51a25f8SAlfred Perlstein static u_int8_t	bge_eeprom_getbyte	(struct bge_softc *, int, u_int8_t *);
227e51a25f8SAlfred Perlstein static int bge_read_eeprom	(struct bge_softc *, caddr_t, int, int);
22895d67482SBill Paul 
229e51a25f8SAlfred Perlstein static void bge_setmulti	(struct bge_softc *);
23095d67482SBill Paul 
231e51a25f8SAlfred Perlstein static void bge_handle_events	(struct bge_softc *);
232e51a25f8SAlfred Perlstein static int bge_alloc_jumbo_mem	(struct bge_softc *);
233e51a25f8SAlfred Perlstein static void bge_free_jumbo_mem	(struct bge_softc *);
234e51a25f8SAlfred Perlstein static void *bge_jalloc		(struct bge_softc *);
235914596abSAlfred Perlstein static void bge_jfree		(void *, void *);
236e51a25f8SAlfred Perlstein static int bge_newbuf_std	(struct bge_softc *, int, struct mbuf *);
237e51a25f8SAlfred Perlstein static int bge_newbuf_jumbo	(struct bge_softc *, int, struct mbuf *);
238e51a25f8SAlfred Perlstein static int bge_init_rx_ring_std	(struct bge_softc *);
239e51a25f8SAlfred Perlstein static void bge_free_rx_ring_std	(struct bge_softc *);
240e51a25f8SAlfred Perlstein static int bge_init_rx_ring_jumbo	(struct bge_softc *);
241e51a25f8SAlfred Perlstein static void bge_free_rx_ring_jumbo	(struct bge_softc *);
242e51a25f8SAlfred Perlstein static void bge_free_tx_ring	(struct bge_softc *);
243e51a25f8SAlfred Perlstein static int bge_init_tx_ring	(struct bge_softc *);
24495d67482SBill Paul 
245e51a25f8SAlfred Perlstein static int bge_chipinit		(struct bge_softc *);
246e51a25f8SAlfred Perlstein static int bge_blockinit	(struct bge_softc *);
24795d67482SBill Paul 
2481b4a3b2fSPeter Wemm #ifdef notdef
249e51a25f8SAlfred Perlstein static u_int8_t bge_vpd_readbyte(struct bge_softc *, int);
250e51a25f8SAlfred Perlstein static void bge_vpd_read_res	(struct bge_softc *, struct vpd_res *, int);
251e51a25f8SAlfred Perlstein static void bge_vpd_read	(struct bge_softc *);
2521b4a3b2fSPeter Wemm #endif
25395d67482SBill Paul 
25495d67482SBill Paul static u_int32_t bge_readmem_ind
255e51a25f8SAlfred Perlstein 				(struct bge_softc *, int);
256e51a25f8SAlfred Perlstein static void bge_writemem_ind	(struct bge_softc *, int, int);
25795d67482SBill Paul #ifdef notdef
25895d67482SBill Paul static u_int32_t bge_readreg_ind
259e51a25f8SAlfred Perlstein 				(struct bge_softc *, int);
26095d67482SBill Paul #endif
261e51a25f8SAlfred Perlstein static void bge_writereg_ind	(struct bge_softc *, int, int);
26295d67482SBill Paul 
263e51a25f8SAlfred Perlstein static int bge_miibus_readreg	(device_t, int, int);
264e51a25f8SAlfred Perlstein static int bge_miibus_writereg	(device_t, int, int, int);
265e51a25f8SAlfred Perlstein static void bge_miibus_statchg	(device_t);
26695d67482SBill Paul 
267e51a25f8SAlfred Perlstein static void bge_reset		(struct bge_softc *);
26895d67482SBill Paul 
26995d67482SBill Paul static device_method_t bge_methods[] = {
27095d67482SBill Paul 	/* Device interface */
27195d67482SBill Paul 	DEVMETHOD(device_probe,		bge_probe),
27295d67482SBill Paul 	DEVMETHOD(device_attach,	bge_attach),
27395d67482SBill Paul 	DEVMETHOD(device_detach,	bge_detach),
27495d67482SBill Paul 	DEVMETHOD(device_shutdown,	bge_shutdown),
27595d67482SBill Paul 
27695d67482SBill Paul 	/* bus interface */
27795d67482SBill Paul 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
27895d67482SBill Paul 	DEVMETHOD(bus_driver_added,	bus_generic_driver_added),
27995d67482SBill Paul 
28095d67482SBill Paul 	/* MII interface */
28195d67482SBill Paul 	DEVMETHOD(miibus_readreg,	bge_miibus_readreg),
28295d67482SBill Paul 	DEVMETHOD(miibus_writereg,	bge_miibus_writereg),
28395d67482SBill Paul 	DEVMETHOD(miibus_statchg,	bge_miibus_statchg),
28495d67482SBill Paul 
28595d67482SBill Paul 	{ 0, 0 }
28695d67482SBill Paul };
28795d67482SBill Paul 
28895d67482SBill Paul static driver_t bge_driver = {
28995d67482SBill Paul 	"bge",
29095d67482SBill Paul 	bge_methods,
29195d67482SBill Paul 	sizeof(struct bge_softc)
29295d67482SBill Paul };
29395d67482SBill Paul 
29495d67482SBill Paul static devclass_t bge_devclass;
29595d67482SBill Paul 
296f246e4a1SMatthew N. Dodd DRIVER_MODULE(bge, pci, bge_driver, bge_devclass, 0, 0);
29795d67482SBill Paul DRIVER_MODULE(miibus, bge, miibus_driver, miibus_devclass, 0, 0);
29895d67482SBill Paul 
29995d67482SBill Paul static u_int32_t
30095d67482SBill Paul bge_readmem_ind(sc, off)
30195d67482SBill Paul 	struct bge_softc *sc;
30295d67482SBill Paul 	int off;
30395d67482SBill Paul {
30495d67482SBill Paul 	device_t dev;
30595d67482SBill Paul 
30695d67482SBill Paul 	dev = sc->bge_dev;
30795d67482SBill Paul 
30895d67482SBill Paul 	pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, off, 4);
30995d67482SBill Paul 	return(pci_read_config(dev, BGE_PCI_MEMWIN_DATA, 4));
31095d67482SBill Paul }
31195d67482SBill Paul 
31295d67482SBill Paul static void
31395d67482SBill Paul bge_writemem_ind(sc, off, val)
31495d67482SBill Paul 	struct bge_softc *sc;
31595d67482SBill Paul 	int off, val;
31695d67482SBill Paul {
31795d67482SBill Paul 	device_t dev;
31895d67482SBill Paul 
31995d67482SBill Paul 	dev = sc->bge_dev;
32095d67482SBill Paul 
32195d67482SBill Paul 	pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, off, 4);
32295d67482SBill Paul 	pci_write_config(dev, BGE_PCI_MEMWIN_DATA, val, 4);
32395d67482SBill Paul 
32495d67482SBill Paul 	return;
32595d67482SBill Paul }
32695d67482SBill Paul 
32795d67482SBill Paul #ifdef notdef
32895d67482SBill Paul static u_int32_t
32995d67482SBill Paul bge_readreg_ind(sc, off)
33095d67482SBill Paul 	struct bge_softc *sc;
33195d67482SBill Paul 	int off;
33295d67482SBill Paul {
33395d67482SBill Paul 	device_t dev;
33495d67482SBill Paul 
33595d67482SBill Paul 	dev = sc->bge_dev;
33695d67482SBill Paul 
33795d67482SBill Paul 	pci_write_config(dev, BGE_PCI_REG_BASEADDR, off, 4);
33895d67482SBill Paul 	return(pci_read_config(dev, BGE_PCI_REG_DATA, 4));
33995d67482SBill Paul }
34095d67482SBill Paul #endif
34195d67482SBill Paul 
34295d67482SBill Paul static void
34395d67482SBill Paul bge_writereg_ind(sc, off, val)
34495d67482SBill Paul 	struct bge_softc *sc;
34595d67482SBill Paul 	int off, val;
34695d67482SBill Paul {
34795d67482SBill Paul 	device_t dev;
34895d67482SBill Paul 
34995d67482SBill Paul 	dev = sc->bge_dev;
35095d67482SBill Paul 
35195d67482SBill Paul 	pci_write_config(dev, BGE_PCI_REG_BASEADDR, off, 4);
35295d67482SBill Paul 	pci_write_config(dev, BGE_PCI_REG_DATA, val, 4);
35395d67482SBill Paul 
35495d67482SBill Paul 	return;
35595d67482SBill Paul }
35695d67482SBill Paul 
357f41ac2beSBill Paul /*
358f41ac2beSBill Paul  * Map a single buffer address.
359f41ac2beSBill Paul  */
360f41ac2beSBill Paul 
361f41ac2beSBill Paul static void
362f41ac2beSBill Paul bge_dma_map_addr(arg, segs, nseg, error)
363f41ac2beSBill Paul 	void *arg;
364f41ac2beSBill Paul 	bus_dma_segment_t *segs;
365f41ac2beSBill Paul 	int nseg;
366f41ac2beSBill Paul 	int error;
367f41ac2beSBill Paul {
368f41ac2beSBill Paul 	struct bge_dmamap_arg *ctx;
369f41ac2beSBill Paul 
370f41ac2beSBill Paul 	if (error)
371f41ac2beSBill Paul 		return;
372f41ac2beSBill Paul 
373f41ac2beSBill Paul 	ctx = arg;
374f41ac2beSBill Paul 
375f41ac2beSBill Paul 	if (nseg > ctx->bge_maxsegs) {
376f41ac2beSBill Paul 		ctx->bge_maxsegs = 0;
377f41ac2beSBill Paul 		return;
378f41ac2beSBill Paul 	}
379f41ac2beSBill Paul 
380f41ac2beSBill Paul 	ctx->bge_busaddr = segs->ds_addr;
381f41ac2beSBill Paul 
382f41ac2beSBill Paul 	return;
383f41ac2beSBill Paul }
384f41ac2beSBill Paul 
385f41ac2beSBill Paul /*
386f41ac2beSBill Paul  * Map an mbuf chain into an TX ring.
387f41ac2beSBill Paul  */
388f41ac2beSBill Paul 
389f41ac2beSBill Paul static void
390f41ac2beSBill Paul bge_dma_map_tx_desc(arg, segs, nseg, mapsize, error)
391f41ac2beSBill Paul 	void *arg;
392f41ac2beSBill Paul 	bus_dma_segment_t *segs;
393f41ac2beSBill Paul 	int nseg;
394f41ac2beSBill Paul 	bus_size_t mapsize;
395f41ac2beSBill Paul 	int error;
396f41ac2beSBill Paul {
397f41ac2beSBill Paul 	struct bge_dmamap_arg *ctx;
398f41ac2beSBill Paul 	struct bge_tx_bd *d = NULL;
399f41ac2beSBill Paul 	int i = 0, idx;
400f41ac2beSBill Paul 
401f41ac2beSBill Paul 	if (error)
402f41ac2beSBill Paul 		return;
403f41ac2beSBill Paul 
404f41ac2beSBill Paul 	ctx = arg;
405f41ac2beSBill Paul 
406f41ac2beSBill Paul 	/* Signal error to caller if there's too many segments */
407f41ac2beSBill Paul 	if (nseg > ctx->bge_maxsegs) {
408f41ac2beSBill Paul 		ctx->bge_maxsegs = 0;
409f41ac2beSBill Paul 		return;
410f41ac2beSBill Paul 	}
411f41ac2beSBill Paul 
412f41ac2beSBill Paul 	idx = ctx->bge_idx;
413f41ac2beSBill Paul 	while(1) {
414f41ac2beSBill Paul 		d = &ctx->bge_ring[idx];
415f41ac2beSBill Paul 		d->bge_addr.bge_addr_lo =
416f41ac2beSBill Paul 		    htole32(BGE_ADDR_LO(segs[i].ds_addr));
417f41ac2beSBill Paul 		d->bge_addr.bge_addr_hi =
418f41ac2beSBill Paul 		    htole32(BGE_ADDR_HI(segs[i].ds_addr));
419f41ac2beSBill Paul 		d->bge_len = htole16(segs[i].ds_len);
420f41ac2beSBill Paul 		d->bge_flags = htole16(ctx->bge_flags);
421f41ac2beSBill Paul 		i++;
422f41ac2beSBill Paul 		if (i == nseg)
423f41ac2beSBill Paul 			break;
424f41ac2beSBill Paul 		BGE_INC(idx, BGE_TX_RING_CNT);
425f41ac2beSBill Paul 	}
426f41ac2beSBill Paul 
427f41ac2beSBill Paul 	d->bge_flags |= htole16(BGE_TXBDFLAG_END);
428f41ac2beSBill Paul 	ctx->bge_maxsegs = nseg;
429f41ac2beSBill Paul 	ctx->bge_idx = idx;
430f41ac2beSBill Paul 
431f41ac2beSBill Paul 	return;
432f41ac2beSBill Paul }
433f41ac2beSBill Paul 
434f41ac2beSBill Paul 
4351b4a3b2fSPeter Wemm #ifdef notdef
43695d67482SBill Paul static u_int8_t
43795d67482SBill Paul bge_vpd_readbyte(sc, addr)
43895d67482SBill Paul 	struct bge_softc *sc;
43995d67482SBill Paul 	int addr;
44095d67482SBill Paul {
44195d67482SBill Paul 	int i;
44295d67482SBill Paul 	device_t dev;
44395d67482SBill Paul 	u_int32_t val;
44495d67482SBill Paul 
44595d67482SBill Paul 	dev = sc->bge_dev;
44695d67482SBill Paul 	pci_write_config(dev, BGE_PCI_VPD_ADDR, addr, 2);
44795d67482SBill Paul 	for (i = 0; i < BGE_TIMEOUT * 10; i++) {
44895d67482SBill Paul 		DELAY(10);
44995d67482SBill Paul 		if (pci_read_config(dev, BGE_PCI_VPD_ADDR, 2) & BGE_VPD_FLAG)
45095d67482SBill Paul 			break;
45195d67482SBill Paul 	}
45295d67482SBill Paul 
45395d67482SBill Paul 	if (i == BGE_TIMEOUT) {
45495d67482SBill Paul 		printf("bge%d: VPD read timed out\n", sc->bge_unit);
45595d67482SBill Paul 		return(0);
45695d67482SBill Paul 	}
45795d67482SBill Paul 
45895d67482SBill Paul 	val = pci_read_config(dev, BGE_PCI_VPD_DATA, 4);
45995d67482SBill Paul 
46095d67482SBill Paul 	return((val >> ((addr % 4) * 8)) & 0xFF);
46195d67482SBill Paul }
46295d67482SBill Paul 
46395d67482SBill Paul static void
46495d67482SBill Paul bge_vpd_read_res(sc, res, addr)
46595d67482SBill Paul 	struct bge_softc *sc;
46695d67482SBill Paul 	struct vpd_res *res;
46795d67482SBill Paul 	int addr;
46895d67482SBill Paul {
46995d67482SBill Paul 	int i;
47095d67482SBill Paul 	u_int8_t *ptr;
47195d67482SBill Paul 
47295d67482SBill Paul 	ptr = (u_int8_t *)res;
47395d67482SBill Paul 	for (i = 0; i < sizeof(struct vpd_res); i++)
47495d67482SBill Paul 		ptr[i] = bge_vpd_readbyte(sc, i + addr);
47595d67482SBill Paul 
47695d67482SBill Paul 	return;
47795d67482SBill Paul }
47895d67482SBill Paul 
47995d67482SBill Paul static void
48095d67482SBill Paul bge_vpd_read(sc)
48195d67482SBill Paul 	struct bge_softc *sc;
48295d67482SBill Paul {
48395d67482SBill Paul 	int pos = 0, i;
48495d67482SBill Paul 	struct vpd_res res;
48595d67482SBill Paul 
48695d67482SBill Paul 	if (sc->bge_vpd_prodname != NULL)
48795d67482SBill Paul 		free(sc->bge_vpd_prodname, M_DEVBUF);
48895d67482SBill Paul 	if (sc->bge_vpd_readonly != NULL)
48995d67482SBill Paul 		free(sc->bge_vpd_readonly, M_DEVBUF);
49095d67482SBill Paul 	sc->bge_vpd_prodname = NULL;
49195d67482SBill Paul 	sc->bge_vpd_readonly = NULL;
49295d67482SBill Paul 
49395d67482SBill Paul 	bge_vpd_read_res(sc, &res, pos);
49495d67482SBill Paul 
49595d67482SBill Paul 	if (res.vr_id != VPD_RES_ID) {
49695d67482SBill Paul 		printf("bge%d: bad VPD resource id: expected %x got %x\n",
49795d67482SBill Paul 			sc->bge_unit, VPD_RES_ID, res.vr_id);
49895d67482SBill Paul 		return;
49995d67482SBill Paul 	}
50095d67482SBill Paul 
50195d67482SBill Paul 	pos += sizeof(res);
50295d67482SBill Paul 	sc->bge_vpd_prodname = malloc(res.vr_len + 1, M_DEVBUF, M_NOWAIT);
50395d67482SBill Paul 	for (i = 0; i < res.vr_len; i++)
50495d67482SBill Paul 		sc->bge_vpd_prodname[i] = bge_vpd_readbyte(sc, i + pos);
50595d67482SBill Paul 	sc->bge_vpd_prodname[i] = '\0';
50695d67482SBill Paul 	pos += i;
50795d67482SBill Paul 
50895d67482SBill Paul 	bge_vpd_read_res(sc, &res, pos);
50995d67482SBill Paul 
51095d67482SBill Paul 	if (res.vr_id != VPD_RES_READ) {
51195d67482SBill Paul 		printf("bge%d: bad VPD resource id: expected %x got %x\n",
51295d67482SBill Paul 		    sc->bge_unit, VPD_RES_READ, res.vr_id);
51395d67482SBill Paul 		return;
51495d67482SBill Paul 	}
51595d67482SBill Paul 
51695d67482SBill Paul 	pos += sizeof(res);
51795d67482SBill Paul 	sc->bge_vpd_readonly = malloc(res.vr_len, M_DEVBUF, M_NOWAIT);
51895d67482SBill Paul 	for (i = 0; i < res.vr_len + 1; i++)
51995d67482SBill Paul 		sc->bge_vpd_readonly[i] = bge_vpd_readbyte(sc, i + pos);
52095d67482SBill Paul 
52195d67482SBill Paul 	return;
52295d67482SBill Paul }
5231b4a3b2fSPeter Wemm #endif
52495d67482SBill Paul 
52595d67482SBill Paul /*
52695d67482SBill Paul  * Read a byte of data stored in the EEPROM at address 'addr.' The
52795d67482SBill Paul  * BCM570x supports both the traditional bitbang interface and an
52895d67482SBill Paul  * auto access interface for reading the EEPROM. We use the auto
52995d67482SBill Paul  * access method.
53095d67482SBill Paul  */
53195d67482SBill Paul static u_int8_t
53295d67482SBill Paul bge_eeprom_getbyte(sc, addr, dest)
53395d67482SBill Paul 	struct bge_softc *sc;
53495d67482SBill Paul 	int addr;
53595d67482SBill Paul 	u_int8_t *dest;
53695d67482SBill Paul {
53795d67482SBill Paul 	int i;
53895d67482SBill Paul 	u_int32_t byte = 0;
53995d67482SBill Paul 
54095d67482SBill Paul 	/*
54195d67482SBill Paul 	 * Enable use of auto EEPROM access so we can avoid
54295d67482SBill Paul 	 * having to use the bitbang method.
54395d67482SBill Paul 	 */
54495d67482SBill Paul 	BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM);
54595d67482SBill Paul 
54695d67482SBill Paul 	/* Reset the EEPROM, load the clock period. */
54795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_EE_ADDR,
54895d67482SBill Paul 	    BGE_EEADDR_RESET|BGE_EEHALFCLK(BGE_HALFCLK_384SCL));
54995d67482SBill Paul 	DELAY(20);
55095d67482SBill Paul 
55195d67482SBill Paul 	/* Issue the read EEPROM command. */
55295d67482SBill Paul 	CSR_WRITE_4(sc, BGE_EE_ADDR, BGE_EE_READCMD | addr);
55395d67482SBill Paul 
55495d67482SBill Paul 	/* Wait for completion */
55595d67482SBill Paul 	for(i = 0; i < BGE_TIMEOUT * 10; i++) {
55695d67482SBill Paul 		DELAY(10);
55795d67482SBill Paul 		if (CSR_READ_4(sc, BGE_EE_ADDR) & BGE_EEADDR_DONE)
55895d67482SBill Paul 			break;
55995d67482SBill Paul 	}
56095d67482SBill Paul 
56195d67482SBill Paul 	if (i == BGE_TIMEOUT) {
56295d67482SBill Paul 		printf("bge%d: eeprom read timed out\n", sc->bge_unit);
56395d67482SBill Paul 		return(0);
56495d67482SBill Paul 	}
56595d67482SBill Paul 
56695d67482SBill Paul 	/* Get result. */
56795d67482SBill Paul 	byte = CSR_READ_4(sc, BGE_EE_DATA);
56895d67482SBill Paul 
56995d67482SBill Paul 	*dest = (byte >> ((addr % 4) * 8)) & 0xFF;
57095d67482SBill Paul 
57195d67482SBill Paul 	return(0);
57295d67482SBill Paul }
57395d67482SBill Paul 
57495d67482SBill Paul /*
57595d67482SBill Paul  * Read a sequence of bytes from the EEPROM.
57695d67482SBill Paul  */
57795d67482SBill Paul static int
57895d67482SBill Paul bge_read_eeprom(sc, dest, off, cnt)
57995d67482SBill Paul 	struct bge_softc *sc;
58095d67482SBill Paul 	caddr_t dest;
58195d67482SBill Paul 	int off;
58295d67482SBill Paul 	int cnt;
58395d67482SBill Paul {
58495d67482SBill Paul 	int err = 0, i;
58595d67482SBill Paul 	u_int8_t byte = 0;
58695d67482SBill Paul 
58795d67482SBill Paul 	for (i = 0; i < cnt; i++) {
58895d67482SBill Paul 		err = bge_eeprom_getbyte(sc, off + i, &byte);
58995d67482SBill Paul 		if (err)
59095d67482SBill Paul 			break;
59195d67482SBill Paul 		*(dest + i) = byte;
59295d67482SBill Paul 	}
59395d67482SBill Paul 
59495d67482SBill Paul 	return(err ? 1 : 0);
59595d67482SBill Paul }
59695d67482SBill Paul 
59795d67482SBill Paul static int
59895d67482SBill Paul bge_miibus_readreg(dev, phy, reg)
59995d67482SBill Paul 	device_t dev;
60095d67482SBill Paul 	int phy, reg;
60195d67482SBill Paul {
60295d67482SBill Paul 	struct bge_softc *sc;
60337ceeb4dSPaul Saab 	u_int32_t val, autopoll;
60495d67482SBill Paul 	int i;
60595d67482SBill Paul 
60695d67482SBill Paul 	sc = device_get_softc(dev);
60795d67482SBill Paul 
6080434d1b8SBill Paul 	/*
6090434d1b8SBill Paul 	 * Broadcom's own driver always assumes the internal
6100434d1b8SBill Paul 	 * PHY is at GMII address 1. On some chips, the PHY responds
6110434d1b8SBill Paul 	 * to accesses at all addresses, which could cause us to
6120434d1b8SBill Paul 	 * bogusly attach the PHY 32 times at probe type. Always
6130434d1b8SBill Paul 	 * restricting the lookup to address 1 is simpler than
6140434d1b8SBill Paul 	 * trying to figure out which chips revisions should be
6150434d1b8SBill Paul 	 * special-cased.
6160434d1b8SBill Paul 	 */
617b1265c1aSJohn Polstra 	if (phy != 1)
61898b28ee5SBill Paul 		return(0);
61998b28ee5SBill Paul 
62037ceeb4dSPaul Saab 	/* Reading with autopolling on may trigger PCI errors */
62137ceeb4dSPaul Saab 	autopoll = CSR_READ_4(sc, BGE_MI_MODE);
62237ceeb4dSPaul Saab 	if (autopoll & BGE_MIMODE_AUTOPOLL) {
62337ceeb4dSPaul Saab 		BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
62437ceeb4dSPaul Saab 		DELAY(40);
62537ceeb4dSPaul Saab 	}
62637ceeb4dSPaul Saab 
62795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_READ|BGE_MICOMM_BUSY|
62895d67482SBill Paul 	    BGE_MIPHY(phy)|BGE_MIREG(reg));
62995d67482SBill Paul 
63095d67482SBill Paul 	for (i = 0; i < BGE_TIMEOUT; i++) {
63195d67482SBill Paul 		val = CSR_READ_4(sc, BGE_MI_COMM);
63295d67482SBill Paul 		if (!(val & BGE_MICOMM_BUSY))
63395d67482SBill Paul 			break;
63495d67482SBill Paul 	}
63595d67482SBill Paul 
63695d67482SBill Paul 	if (i == BGE_TIMEOUT) {
63795d67482SBill Paul 		printf("bge%d: PHY read timed out\n", sc->bge_unit);
63837ceeb4dSPaul Saab 		val = 0;
63937ceeb4dSPaul Saab 		goto done;
64095d67482SBill Paul 	}
64195d67482SBill Paul 
64295d67482SBill Paul 	val = CSR_READ_4(sc, BGE_MI_COMM);
64395d67482SBill Paul 
64437ceeb4dSPaul Saab done:
64537ceeb4dSPaul Saab 	if (autopoll & BGE_MIMODE_AUTOPOLL) {
64637ceeb4dSPaul Saab 		BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
64737ceeb4dSPaul Saab 		DELAY(40);
64837ceeb4dSPaul Saab 	}
64937ceeb4dSPaul Saab 
65095d67482SBill Paul 	if (val & BGE_MICOMM_READFAIL)
65195d67482SBill Paul 		return(0);
65295d67482SBill Paul 
65395d67482SBill Paul 	return(val & 0xFFFF);
65495d67482SBill Paul }
65595d67482SBill Paul 
65695d67482SBill Paul static int
65795d67482SBill Paul bge_miibus_writereg(dev, phy, reg, val)
65895d67482SBill Paul 	device_t dev;
65995d67482SBill Paul 	int phy, reg, val;
66095d67482SBill Paul {
66195d67482SBill Paul 	struct bge_softc *sc;
66237ceeb4dSPaul Saab 	u_int32_t autopoll;
66395d67482SBill Paul 	int i;
66495d67482SBill Paul 
66595d67482SBill Paul 	sc = device_get_softc(dev);
66695d67482SBill Paul 
66737ceeb4dSPaul Saab 	/* Reading with autopolling on may trigger PCI errors */
66837ceeb4dSPaul Saab 	autopoll = CSR_READ_4(sc, BGE_MI_MODE);
66937ceeb4dSPaul Saab 	if (autopoll & BGE_MIMODE_AUTOPOLL) {
67037ceeb4dSPaul Saab 		BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
67137ceeb4dSPaul Saab 		DELAY(40);
67237ceeb4dSPaul Saab 	}
67337ceeb4dSPaul Saab 
67495d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_WRITE|BGE_MICOMM_BUSY|
67595d67482SBill Paul 	    BGE_MIPHY(phy)|BGE_MIREG(reg)|val);
67695d67482SBill Paul 
67795d67482SBill Paul 	for (i = 0; i < BGE_TIMEOUT; i++) {
67895d67482SBill Paul 		if (!(CSR_READ_4(sc, BGE_MI_COMM) & BGE_MICOMM_BUSY))
67995d67482SBill Paul 			break;
68095d67482SBill Paul 	}
68195d67482SBill Paul 
68237ceeb4dSPaul Saab 	if (autopoll & BGE_MIMODE_AUTOPOLL) {
68337ceeb4dSPaul Saab 		BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL);
68437ceeb4dSPaul Saab 		DELAY(40);
68537ceeb4dSPaul Saab 	}
68637ceeb4dSPaul Saab 
68795d67482SBill Paul 	if (i == BGE_TIMEOUT) {
68895d67482SBill Paul 		printf("bge%d: PHY read timed out\n", sc->bge_unit);
68995d67482SBill Paul 		return(0);
69095d67482SBill Paul 	}
69195d67482SBill Paul 
69295d67482SBill Paul 	return(0);
69395d67482SBill Paul }
69495d67482SBill Paul 
69595d67482SBill Paul static void
69695d67482SBill Paul bge_miibus_statchg(dev)
69795d67482SBill Paul 	device_t dev;
69895d67482SBill Paul {
69995d67482SBill Paul 	struct bge_softc *sc;
70095d67482SBill Paul 	struct mii_data *mii;
70195d67482SBill Paul 
70295d67482SBill Paul 	sc = device_get_softc(dev);
70395d67482SBill Paul 	mii = device_get_softc(sc->bge_miibus);
70495d67482SBill Paul 
70595d67482SBill Paul 	BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_PORTMODE);
706b418ad5cSPoul-Henning Kamp 	if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) {
70795d67482SBill Paul 		BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_GMII);
70895d67482SBill Paul 	} else {
70995d67482SBill Paul 		BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_MII);
71095d67482SBill Paul 	}
71195d67482SBill Paul 
71295d67482SBill Paul 	if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) {
71395d67482SBill Paul 		BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_HALF_DUPLEX);
71495d67482SBill Paul 	} else {
71595d67482SBill Paul 		BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_HALF_DUPLEX);
71695d67482SBill Paul 	}
71795d67482SBill Paul 
71895d67482SBill Paul 	return;
71995d67482SBill Paul }
72095d67482SBill Paul 
72195d67482SBill Paul /*
72295d67482SBill Paul  * Handle events that have triggered interrupts.
72395d67482SBill Paul  */
72495d67482SBill Paul static void
72595d67482SBill Paul bge_handle_events(sc)
72695d67482SBill Paul 	struct bge_softc		*sc;
72795d67482SBill Paul {
72895d67482SBill Paul 
72995d67482SBill Paul 	return;
73095d67482SBill Paul }
73195d67482SBill Paul 
73295d67482SBill Paul /*
73395d67482SBill Paul  * Memory management for jumbo frames.
73495d67482SBill Paul  */
73595d67482SBill Paul 
73695d67482SBill Paul static int
73795d67482SBill Paul bge_alloc_jumbo_mem(sc)
73895d67482SBill Paul 	struct bge_softc		*sc;
73995d67482SBill Paul {
74095d67482SBill Paul 	caddr_t			ptr;
741f41ac2beSBill Paul 	register int		i, error;
74295d67482SBill Paul 	struct bge_jpool_entry   *entry;
74395d67482SBill Paul 
744f41ac2beSBill Paul 	/* Create tag for jumbo buffer block */
74595d67482SBill Paul 
746f41ac2beSBill Paul 	error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
747f41ac2beSBill Paul 	    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
748f41ac2beSBill Paul 	    NULL, BGE_JMEM, 1, BGE_JMEM, 0, NULL, NULL,
749f41ac2beSBill Paul 	    &sc->bge_cdata.bge_jumbo_tag);
750f41ac2beSBill Paul 
751f41ac2beSBill Paul 	if (error) {
752f41ac2beSBill Paul 		printf("bge%d: could not allocate jumbo dma tag\n",
753f41ac2beSBill Paul 		    sc->bge_unit);
754f41ac2beSBill Paul 		return (ENOMEM);
75595d67482SBill Paul 	}
75695d67482SBill Paul 
757f41ac2beSBill Paul 	/* Allocate DMA'able memory for jumbo buffer block */
758f41ac2beSBill Paul 
759f41ac2beSBill Paul 	error = bus_dmamem_alloc(sc->bge_cdata.bge_jumbo_tag,
760f41ac2beSBill Paul 	    (void **)&sc->bge_ldata.bge_jumbo_buf, BUS_DMA_NOWAIT,
761f41ac2beSBill Paul 	    &sc->bge_cdata.bge_jumbo_map);
762f41ac2beSBill Paul 
763f41ac2beSBill Paul 	if (error)
764f41ac2beSBill Paul 		return (ENOMEM);
765f41ac2beSBill Paul 
76695d67482SBill Paul 	SLIST_INIT(&sc->bge_jfree_listhead);
76795d67482SBill Paul 	SLIST_INIT(&sc->bge_jinuse_listhead);
76895d67482SBill Paul 
76995d67482SBill Paul 	/*
77095d67482SBill Paul 	 * Now divide it up into 9K pieces and save the addresses
77195d67482SBill Paul 	 * in an array.
77295d67482SBill Paul 	 */
773f41ac2beSBill Paul 	ptr = sc->bge_ldata.bge_jumbo_buf;
77495d67482SBill Paul 	for (i = 0; i < BGE_JSLOTS; i++) {
77595d67482SBill Paul 		sc->bge_cdata.bge_jslots[i] = ptr;
77695d67482SBill Paul 		ptr += BGE_JLEN;
77795d67482SBill Paul 		entry = malloc(sizeof(struct bge_jpool_entry),
77895d67482SBill Paul 		    M_DEVBUF, M_NOWAIT);
77995d67482SBill Paul 		if (entry == NULL) {
780f41ac2beSBill Paul 			bge_free_jumbo_mem(sc);
781f41ac2beSBill Paul 			sc->bge_ldata.bge_jumbo_buf = NULL;
78295d67482SBill Paul 			printf("bge%d: no memory for jumbo "
78395d67482SBill Paul 			    "buffer queue!\n", sc->bge_unit);
78495d67482SBill Paul 			return(ENOBUFS);
78595d67482SBill Paul 		}
78695d67482SBill Paul 		entry->slot = i;
78795d67482SBill Paul 		SLIST_INSERT_HEAD(&sc->bge_jfree_listhead,
78895d67482SBill Paul 		    entry, jpool_entries);
78995d67482SBill Paul 	}
79095d67482SBill Paul 
79195d67482SBill Paul 	return(0);
79295d67482SBill Paul }
79395d67482SBill Paul 
79495d67482SBill Paul static void
79595d67482SBill Paul bge_free_jumbo_mem(sc)
79695d67482SBill Paul 	struct bge_softc *sc;
79795d67482SBill Paul {
79895d67482SBill Paul 	int i;
79995d67482SBill Paul 	struct bge_jpool_entry *entry;
80095d67482SBill Paul 
80195d67482SBill Paul 	for (i = 0; i < BGE_JSLOTS; i++) {
80295d67482SBill Paul 		entry = SLIST_FIRST(&sc->bge_jfree_listhead);
80395d67482SBill Paul 		SLIST_REMOVE_HEAD(&sc->bge_jfree_listhead, jpool_entries);
80495d67482SBill Paul 		free(entry, M_DEVBUF);
80595d67482SBill Paul 	}
80695d67482SBill Paul 
807f41ac2beSBill Paul 	/* Destroy jumbo buffer block */
808f41ac2beSBill Paul 
809f41ac2beSBill Paul 	if (sc->bge_ldata.bge_rx_jumbo_ring)
810f41ac2beSBill Paul 		bus_dmamem_free(sc->bge_cdata.bge_jumbo_tag,
811f41ac2beSBill Paul 		    sc->bge_ldata.bge_jumbo_buf,
812f41ac2beSBill Paul 		    sc->bge_cdata.bge_jumbo_map);
813f41ac2beSBill Paul 
814f41ac2beSBill Paul 	if (sc->bge_cdata.bge_rx_jumbo_ring_map)
815f41ac2beSBill Paul 		bus_dmamap_destroy(sc->bge_cdata.bge_jumbo_tag,
816f41ac2beSBill Paul 		    sc->bge_cdata.bge_jumbo_map);
817f41ac2beSBill Paul 
818f41ac2beSBill Paul 	if (sc->bge_cdata.bge_jumbo_tag)
819f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_jumbo_tag);
82095d67482SBill Paul 
82195d67482SBill Paul 	return;
82295d67482SBill Paul }
82395d67482SBill Paul 
82495d67482SBill Paul /*
82595d67482SBill Paul  * Allocate a jumbo buffer.
82695d67482SBill Paul  */
82795d67482SBill Paul static void *
82895d67482SBill Paul bge_jalloc(sc)
82995d67482SBill Paul 	struct bge_softc		*sc;
83095d67482SBill Paul {
83195d67482SBill Paul 	struct bge_jpool_entry   *entry;
83295d67482SBill Paul 
83395d67482SBill Paul 	entry = SLIST_FIRST(&sc->bge_jfree_listhead);
83495d67482SBill Paul 
83595d67482SBill Paul 	if (entry == NULL) {
83695d67482SBill Paul 		printf("bge%d: no free jumbo buffers\n", sc->bge_unit);
83795d67482SBill Paul 		return(NULL);
83895d67482SBill Paul 	}
83995d67482SBill Paul 
84095d67482SBill Paul 	SLIST_REMOVE_HEAD(&sc->bge_jfree_listhead, jpool_entries);
84195d67482SBill Paul 	SLIST_INSERT_HEAD(&sc->bge_jinuse_listhead, entry, jpool_entries);
84295d67482SBill Paul 	return(sc->bge_cdata.bge_jslots[entry->slot]);
84395d67482SBill Paul }
84495d67482SBill Paul 
84595d67482SBill Paul /*
84695d67482SBill Paul  * Release a jumbo buffer.
84795d67482SBill Paul  */
84895d67482SBill Paul static void
84995d67482SBill Paul bge_jfree(buf, args)
850914596abSAlfred Perlstein 	void *buf;
85195d67482SBill Paul 	void *args;
85295d67482SBill Paul {
85395d67482SBill Paul 	struct bge_jpool_entry *entry;
85495d67482SBill Paul 	struct bge_softc *sc;
85595d67482SBill Paul 	int i;
85695d67482SBill Paul 
85795d67482SBill Paul 	/* Extract the softc struct pointer. */
85895d67482SBill Paul 	sc = (struct bge_softc *)args;
85995d67482SBill Paul 
86095d67482SBill Paul 	if (sc == NULL)
86195d67482SBill Paul 		panic("bge_jfree: can't find softc pointer!");
86295d67482SBill Paul 
86395d67482SBill Paul 	/* calculate the slot this buffer belongs to */
86495d67482SBill Paul 
86595d67482SBill Paul 	i = ((vm_offset_t)buf
866f41ac2beSBill Paul 	     - (vm_offset_t)sc->bge_ldata.bge_jumbo_buf) / BGE_JLEN;
86795d67482SBill Paul 
86895d67482SBill Paul 	if ((i < 0) || (i >= BGE_JSLOTS))
86995d67482SBill Paul 		panic("bge_jfree: asked to free buffer that we don't manage!");
87095d67482SBill Paul 
87195d67482SBill Paul 	entry = SLIST_FIRST(&sc->bge_jinuse_listhead);
87295d67482SBill Paul 	if (entry == NULL)
87395d67482SBill Paul 		panic("bge_jfree: buffer not in use!");
87495d67482SBill Paul 	entry->slot = i;
87595d67482SBill Paul 	SLIST_REMOVE_HEAD(&sc->bge_jinuse_listhead, jpool_entries);
87695d67482SBill Paul 	SLIST_INSERT_HEAD(&sc->bge_jfree_listhead, entry, jpool_entries);
87795d67482SBill Paul 
87895d67482SBill Paul 	return;
87995d67482SBill Paul }
88095d67482SBill Paul 
88195d67482SBill Paul 
88295d67482SBill Paul /*
88395d67482SBill Paul  * Intialize a standard receive ring descriptor.
88495d67482SBill Paul  */
88595d67482SBill Paul static int
88695d67482SBill Paul bge_newbuf_std(sc, i, m)
88795d67482SBill Paul 	struct bge_softc	*sc;
88895d67482SBill Paul 	int			i;
88995d67482SBill Paul 	struct mbuf		*m;
89095d67482SBill Paul {
89195d67482SBill Paul 	struct mbuf		*m_new = NULL;
89295d67482SBill Paul 	struct bge_rx_bd	*r;
893f41ac2beSBill Paul 	struct bge_dmamap_arg	ctx;
894f41ac2beSBill Paul 	int			error;
89595d67482SBill Paul 
89695d67482SBill Paul 	if (m == NULL) {
897a163d034SWarner Losh 		MGETHDR(m_new, M_DONTWAIT, MT_DATA);
89895d67482SBill Paul 		if (m_new == NULL) {
89995d67482SBill Paul 			return(ENOBUFS);
90095d67482SBill Paul 		}
90195d67482SBill Paul 
902a163d034SWarner Losh 		MCLGET(m_new, M_DONTWAIT);
90395d67482SBill Paul 		if (!(m_new->m_flags & M_EXT)) {
90495d67482SBill Paul 			m_freem(m_new);
90595d67482SBill Paul 			return(ENOBUFS);
90695d67482SBill Paul 		}
90795d67482SBill Paul 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
90895d67482SBill Paul 	} else {
90995d67482SBill Paul 		m_new = m;
91095d67482SBill Paul 		m_new->m_len = m_new->m_pkthdr.len = MCLBYTES;
91195d67482SBill Paul 		m_new->m_data = m_new->m_ext.ext_buf;
91295d67482SBill Paul 	}
91395d67482SBill Paul 
914e255b776SJohn Polstra 	if (!sc->bge_rx_alignment_bug)
91595d67482SBill Paul 		m_adj(m_new, ETHER_ALIGN);
91695d67482SBill Paul 	sc->bge_cdata.bge_rx_std_chain[i] = m_new;
917f41ac2beSBill Paul 	r = &sc->bge_ldata.bge_rx_std_ring[i];
918f41ac2beSBill Paul 	ctx.bge_maxsegs = 1;
919f41ac2beSBill Paul 	ctx.sc = sc;
920f41ac2beSBill Paul 	error = bus_dmamap_load(sc->bge_cdata.bge_mtag,
921f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_std_dmamap[i], mtod(m_new, void *),
922f41ac2beSBill Paul 	    m_new->m_len, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
923f41ac2beSBill Paul 	if (error || ctx.bge_maxsegs == 0) {
924f41ac2beSBill Paul 		if (m == NULL)
925f41ac2beSBill Paul 			m_freem(m_new);
926f41ac2beSBill Paul 		return(ENOMEM);
927f41ac2beSBill Paul 	}
928f41ac2beSBill Paul 	r->bge_addr.bge_addr_lo = htole32(BGE_ADDR_LO(ctx.bge_busaddr));
929f41ac2beSBill Paul 	r->bge_addr.bge_addr_hi = htole32(BGE_ADDR_HI(ctx.bge_busaddr));
930f41ac2beSBill Paul 	r->bge_flags = htole16(BGE_RXBDFLAG_END);
931f41ac2beSBill Paul 	r->bge_len = htole16(m_new->m_len);
932f41ac2beSBill Paul 	r->bge_idx = htole16(i);
933f41ac2beSBill Paul 
934f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_mtag,
935f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_std_dmamap[i],
936f41ac2beSBill Paul 	    BUS_DMASYNC_PREREAD);
93795d67482SBill Paul 
93895d67482SBill Paul 	return(0);
93995d67482SBill Paul }
94095d67482SBill Paul 
94195d67482SBill Paul /*
94295d67482SBill Paul  * Initialize a jumbo receive ring descriptor. This allocates
94395d67482SBill Paul  * a jumbo buffer from the pool managed internally by the driver.
94495d67482SBill Paul  */
94595d67482SBill Paul static int
94695d67482SBill Paul bge_newbuf_jumbo(sc, i, m)
94795d67482SBill Paul 	struct bge_softc *sc;
94895d67482SBill Paul 	int i;
94995d67482SBill Paul 	struct mbuf *m;
95095d67482SBill Paul {
95195d67482SBill Paul 	struct mbuf *m_new = NULL;
95295d67482SBill Paul 	struct bge_rx_bd *r;
953f41ac2beSBill Paul 	struct bge_dmamap_arg ctx;
954f41ac2beSBill Paul 	int error;
95595d67482SBill Paul 
95695d67482SBill Paul 	if (m == NULL) {
95795d67482SBill Paul 		caddr_t			*buf = NULL;
95895d67482SBill Paul 
95995d67482SBill Paul 		/* Allocate the mbuf. */
960a163d034SWarner Losh 		MGETHDR(m_new, M_DONTWAIT, MT_DATA);
96195d67482SBill Paul 		if (m_new == NULL) {
96295d67482SBill Paul 			return(ENOBUFS);
96395d67482SBill Paul 		}
96495d67482SBill Paul 
96595d67482SBill Paul 		/* Allocate the jumbo buffer */
96695d67482SBill Paul 		buf = bge_jalloc(sc);
96795d67482SBill Paul 		if (buf == NULL) {
96895d67482SBill Paul 			m_freem(m_new);
96995d67482SBill Paul 			printf("bge%d: jumbo allocation failed "
97095d67482SBill Paul 			    "-- packet dropped!\n", sc->bge_unit);
97195d67482SBill Paul 			return(ENOBUFS);
97295d67482SBill Paul 		}
97395d67482SBill Paul 
97495d67482SBill Paul 		/* Attach the buffer to the mbuf. */
97595d67482SBill Paul 		m_new->m_data = (void *) buf;
97695d67482SBill Paul 		m_new->m_len = m_new->m_pkthdr.len = BGE_JUMBO_FRAMELEN;
97795d67482SBill Paul 		MEXTADD(m_new, buf, BGE_JUMBO_FRAMELEN, bge_jfree,
97895d67482SBill Paul 		    (struct bge_softc *)sc, 0, EXT_NET_DRV);
97995d67482SBill Paul 	} else {
98095d67482SBill Paul 		m_new = m;
98195d67482SBill Paul 		m_new->m_data = m_new->m_ext.ext_buf;
98295d67482SBill Paul 		m_new->m_ext.ext_size = BGE_JUMBO_FRAMELEN;
98395d67482SBill Paul 	}
98495d67482SBill Paul 
985e255b776SJohn Polstra 	if (!sc->bge_rx_alignment_bug)
98695d67482SBill Paul 		m_adj(m_new, ETHER_ALIGN);
98795d67482SBill Paul 	/* Set up the descriptor. */
98895d67482SBill Paul 	sc->bge_cdata.bge_rx_jumbo_chain[i] = m_new;
989f41ac2beSBill Paul 	r = &sc->bge_ldata.bge_rx_jumbo_ring[i];
990f41ac2beSBill Paul 	ctx.bge_maxsegs = 1;
991f41ac2beSBill Paul 	ctx.sc = sc;
992f41ac2beSBill Paul 	error = bus_dmamap_load(sc->bge_cdata.bge_mtag_jumbo,
993f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_jumbo_dmamap[i], mtod(m_new, void *),
994f41ac2beSBill Paul 	    m_new->m_len, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
995f41ac2beSBill Paul 	if (error || ctx.bge_maxsegs == 0) {
996f41ac2beSBill Paul 		if (m == NULL)
997f41ac2beSBill Paul 			m_freem(m_new);
998f41ac2beSBill Paul 		return(ENOMEM);
999f41ac2beSBill Paul 	}
1000f41ac2beSBill Paul 	r->bge_addr.bge_addr_lo = htole32(BGE_ADDR_LO(ctx.bge_busaddr));
1001f41ac2beSBill Paul 	r->bge_addr.bge_addr_hi = htole32(BGE_ADDR_HI(ctx.bge_busaddr));
1002f41ac2beSBill Paul 	r->bge_flags = htole16(BGE_RXBDFLAG_END|BGE_RXBDFLAG_JUMBO_RING);
1003f41ac2beSBill Paul 	r->bge_len = htole16(m_new->m_len);
1004f41ac2beSBill Paul 	r->bge_idx = htole16(i);
1005f41ac2beSBill Paul 
1006f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_mtag,
1007f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_jumbo_dmamap[i],
1008f41ac2beSBill Paul 	    BUS_DMASYNC_PREREAD);
100995d67482SBill Paul 
101095d67482SBill Paul 	return(0);
101195d67482SBill Paul }
101295d67482SBill Paul 
101395d67482SBill Paul /*
101495d67482SBill Paul  * The standard receive ring has 512 entries in it. At 2K per mbuf cluster,
101595d67482SBill Paul  * that's 1MB or memory, which is a lot. For now, we fill only the first
101695d67482SBill Paul  * 256 ring entries and hope that our CPU is fast enough to keep up with
101795d67482SBill Paul  * the NIC.
101895d67482SBill Paul  */
101995d67482SBill Paul static int
102095d67482SBill Paul bge_init_rx_ring_std(sc)
102195d67482SBill Paul 	struct bge_softc *sc;
102295d67482SBill Paul {
102395d67482SBill Paul 	int i;
102495d67482SBill Paul 
102595d67482SBill Paul 	for (i = 0; i < BGE_SSLOTS; i++) {
102695d67482SBill Paul 		if (bge_newbuf_std(sc, i, NULL) == ENOBUFS)
102795d67482SBill Paul 			return(ENOBUFS);
102895d67482SBill Paul 	};
102995d67482SBill Paul 
1030f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
1031f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_std_ring_map,
1032f41ac2beSBill Paul 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1033f41ac2beSBill Paul 
103495d67482SBill Paul 	sc->bge_std = i - 1;
103595d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std);
103695d67482SBill Paul 
103795d67482SBill Paul 	return(0);
103895d67482SBill Paul }
103995d67482SBill Paul 
104095d67482SBill Paul static void
104195d67482SBill Paul bge_free_rx_ring_std(sc)
104295d67482SBill Paul 	struct bge_softc *sc;
104395d67482SBill Paul {
104495d67482SBill Paul 	int i;
104595d67482SBill Paul 
104695d67482SBill Paul 	for (i = 0; i < BGE_STD_RX_RING_CNT; i++) {
104795d67482SBill Paul 		if (sc->bge_cdata.bge_rx_std_chain[i] != NULL) {
104895d67482SBill Paul 			m_freem(sc->bge_cdata.bge_rx_std_chain[i]);
104995d67482SBill Paul 			sc->bge_cdata.bge_rx_std_chain[i] = NULL;
1050f41ac2beSBill Paul 			bus_dmamap_unload(sc->bge_cdata.bge_mtag,
1051f41ac2beSBill Paul 			    sc->bge_cdata.bge_rx_std_dmamap[i]);
105295d67482SBill Paul 		}
1053f41ac2beSBill Paul 		bzero((char *)&sc->bge_ldata.bge_rx_std_ring[i],
105495d67482SBill Paul 		    sizeof(struct bge_rx_bd));
105595d67482SBill Paul 	}
105695d67482SBill Paul 
105795d67482SBill Paul 	return;
105895d67482SBill Paul }
105995d67482SBill Paul 
106095d67482SBill Paul static int
106195d67482SBill Paul bge_init_rx_ring_jumbo(sc)
106295d67482SBill Paul 	struct bge_softc *sc;
106395d67482SBill Paul {
106495d67482SBill Paul 	int i;
106595d67482SBill Paul 	struct bge_rcb *rcb;
106695d67482SBill Paul 
106795d67482SBill Paul 	for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) {
106895d67482SBill Paul 		if (bge_newbuf_jumbo(sc, i, NULL) == ENOBUFS)
106995d67482SBill Paul 			return(ENOBUFS);
107095d67482SBill Paul 	};
107195d67482SBill Paul 
1072f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1073f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_jumbo_ring_map,
1074f41ac2beSBill Paul 	    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
1075f41ac2beSBill Paul 
107695d67482SBill Paul 	sc->bge_jumbo = i - 1;
107795d67482SBill Paul 
1078f41ac2beSBill Paul 	rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb;
107967111612SJohn Polstra 	rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0, 0);
108067111612SJohn Polstra 	CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
108195d67482SBill Paul 
108295d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo);
108395d67482SBill Paul 
108495d67482SBill Paul 	return(0);
108595d67482SBill Paul }
108695d67482SBill Paul 
108795d67482SBill Paul static void
108895d67482SBill Paul bge_free_rx_ring_jumbo(sc)
108995d67482SBill Paul 	struct bge_softc *sc;
109095d67482SBill Paul {
109195d67482SBill Paul 	int i;
109295d67482SBill Paul 
109395d67482SBill Paul 	for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) {
109495d67482SBill Paul 		if (sc->bge_cdata.bge_rx_jumbo_chain[i] != NULL) {
109595d67482SBill Paul 			m_freem(sc->bge_cdata.bge_rx_jumbo_chain[i]);
109695d67482SBill Paul 			sc->bge_cdata.bge_rx_jumbo_chain[i] = NULL;
1097f41ac2beSBill Paul 			bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo,
1098f41ac2beSBill Paul 			    sc->bge_cdata.bge_rx_jumbo_dmamap[i]);
109995d67482SBill Paul 		}
1100f41ac2beSBill Paul 		bzero((char *)&sc->bge_ldata.bge_rx_jumbo_ring[i],
110195d67482SBill Paul 		    sizeof(struct bge_rx_bd));
110295d67482SBill Paul 	}
110395d67482SBill Paul 
110495d67482SBill Paul 	return;
110595d67482SBill Paul }
110695d67482SBill Paul 
110795d67482SBill Paul static void
110895d67482SBill Paul bge_free_tx_ring(sc)
110995d67482SBill Paul 	struct bge_softc *sc;
111095d67482SBill Paul {
111195d67482SBill Paul 	int i;
111295d67482SBill Paul 
1113f41ac2beSBill Paul 	if (sc->bge_ldata.bge_tx_ring == NULL)
111495d67482SBill Paul 		return;
111595d67482SBill Paul 
111695d67482SBill Paul 	for (i = 0; i < BGE_TX_RING_CNT; i++) {
111795d67482SBill Paul 		if (sc->bge_cdata.bge_tx_chain[i] != NULL) {
111895d67482SBill Paul 			m_freem(sc->bge_cdata.bge_tx_chain[i]);
111995d67482SBill Paul 			sc->bge_cdata.bge_tx_chain[i] = NULL;
1120f41ac2beSBill Paul 			bus_dmamap_unload(sc->bge_cdata.bge_mtag,
1121f41ac2beSBill Paul 			    sc->bge_cdata.bge_tx_dmamap[i]);
112295d67482SBill Paul 		}
1123f41ac2beSBill Paul 		bzero((char *)&sc->bge_ldata.bge_tx_ring[i],
112495d67482SBill Paul 		    sizeof(struct bge_tx_bd));
112595d67482SBill Paul 	}
112695d67482SBill Paul 
112795d67482SBill Paul 	return;
112895d67482SBill Paul }
112995d67482SBill Paul 
113095d67482SBill Paul static int
113195d67482SBill Paul bge_init_tx_ring(sc)
113295d67482SBill Paul 	struct bge_softc *sc;
113395d67482SBill Paul {
113495d67482SBill Paul 	sc->bge_txcnt = 0;
113595d67482SBill Paul 	sc->bge_tx_saved_considx = 0;
11363927098fSPaul Saab 
113795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, 0);
11383927098fSPaul Saab 	/* 5700 b2 errata */
1139e0ced696SPaul Saab 	if (sc->bge_chiprev == BGE_CHIPREV_5700_BX)
11403927098fSPaul Saab 		CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, 0);
11413927098fSPaul Saab 
11423927098fSPaul Saab 	CSR_WRITE_4(sc, BGE_MBX_TX_NIC_PROD0_LO, 0);
11433927098fSPaul Saab 	/* 5700 b2 errata */
1144e0ced696SPaul Saab 	if (sc->bge_chiprev == BGE_CHIPREV_5700_BX)
114595d67482SBill Paul 		CSR_WRITE_4(sc, BGE_MBX_TX_NIC_PROD0_LO, 0);
114695d67482SBill Paul 
114795d67482SBill Paul 	return(0);
114895d67482SBill Paul }
114995d67482SBill Paul 
115095d67482SBill Paul static void
115195d67482SBill Paul bge_setmulti(sc)
115295d67482SBill Paul 	struct bge_softc *sc;
115395d67482SBill Paul {
115495d67482SBill Paul 	struct ifnet *ifp;
115595d67482SBill Paul 	struct ifmultiaddr *ifma;
115695d67482SBill Paul 	u_int32_t hashes[4] = { 0, 0, 0, 0 };
115795d67482SBill Paul 	int h, i;
115895d67482SBill Paul 
11590f9bd73bSSam Leffler 	BGE_LOCK_ASSERT(sc);
11600f9bd73bSSam Leffler 
1161fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
116295d67482SBill Paul 
116395d67482SBill Paul 	if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) {
116495d67482SBill Paul 		for (i = 0; i < 4; i++)
116595d67482SBill Paul 			CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), 0xFFFFFFFF);
116695d67482SBill Paul 		return;
116795d67482SBill Paul 	}
116895d67482SBill Paul 
116995d67482SBill Paul 	/* First, zot all the existing filters. */
117095d67482SBill Paul 	for (i = 0; i < 4; i++)
117195d67482SBill Paul 		CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), 0);
117295d67482SBill Paul 
117395d67482SBill Paul 	/* Now program new ones. */
117495d67482SBill Paul 	TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) {
117595d67482SBill Paul 		if (ifma->ifma_addr->sa_family != AF_LINK)
117695d67482SBill Paul 			continue;
11770e939c0cSChristian Weisgerber 		h = ether_crc32_le(LLADDR((struct sockaddr_dl *)
11780e939c0cSChristian Weisgerber 		    ifma->ifma_addr), ETHER_ADDR_LEN) & 0x7F;
117995d67482SBill Paul 		hashes[(h & 0x60) >> 5] |= 1 << (h & 0x1F);
118095d67482SBill Paul 	}
118195d67482SBill Paul 
118295d67482SBill Paul 	for (i = 0; i < 4; i++)
118395d67482SBill Paul 		CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), hashes[i]);
118495d67482SBill Paul 
118595d67482SBill Paul 	return;
118695d67482SBill Paul }
118795d67482SBill Paul 
118895d67482SBill Paul /*
118995d67482SBill Paul  * Do endian, PCI and DMA initialization. Also check the on-board ROM
119095d67482SBill Paul  * self-test results.
119195d67482SBill Paul  */
119295d67482SBill Paul static int
119395d67482SBill Paul bge_chipinit(sc)
119495d67482SBill Paul 	struct bge_softc *sc;
119595d67482SBill Paul {
119695d67482SBill Paul 	int			i;
11975cba12d3SPaul Saab 	u_int32_t		dma_rw_ctl;
119895d67482SBill Paul 
119995d67482SBill Paul 	/* Set endianness before we access any non-PCI registers. */
120095d67482SBill Paul #if BYTE_ORDER == BIG_ENDIAN
120195d67482SBill Paul 	pci_write_config(sc->bge_dev, BGE_PCI_MISC_CTL,
120295d67482SBill Paul 	    BGE_BIGENDIAN_INIT, 4);
120395d67482SBill Paul #else
120495d67482SBill Paul 	pci_write_config(sc->bge_dev, BGE_PCI_MISC_CTL,
120595d67482SBill Paul 	    BGE_LITTLEENDIAN_INIT, 4);
120695d67482SBill Paul #endif
120795d67482SBill Paul 
120895d67482SBill Paul 	/*
120995d67482SBill Paul 	 * Check the 'ROM failed' bit on the RX CPU to see if
121095d67482SBill Paul 	 * self-tests passed.
121195d67482SBill Paul 	 */
121295d67482SBill Paul 	if (CSR_READ_4(sc, BGE_RXCPU_MODE) & BGE_RXCPUMODE_ROMFAIL) {
121395d67482SBill Paul 		printf("bge%d: RX CPU self-diagnostics failed!\n",
121495d67482SBill Paul 		    sc->bge_unit);
121595d67482SBill Paul 		return(ENODEV);
121695d67482SBill Paul 	}
121795d67482SBill Paul 
121895d67482SBill Paul 	/* Clear the MAC control register */
121995d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MAC_MODE, 0);
122095d67482SBill Paul 
122195d67482SBill Paul 	/*
122295d67482SBill Paul 	 * Clear the MAC statistics block in the NIC's
122395d67482SBill Paul 	 * internal memory.
122495d67482SBill Paul 	 */
122595d67482SBill Paul 	for (i = BGE_STATS_BLOCK;
122695d67482SBill Paul 	    i < BGE_STATS_BLOCK_END + 1; i += sizeof(u_int32_t))
122795d67482SBill Paul 		BGE_MEMWIN_WRITE(sc, i, 0);
122895d67482SBill Paul 
122995d67482SBill Paul 	for (i = BGE_STATUS_BLOCK;
123095d67482SBill Paul 	    i < BGE_STATUS_BLOCK_END + 1; i += sizeof(u_int32_t))
123195d67482SBill Paul 		BGE_MEMWIN_WRITE(sc, i, 0);
123295d67482SBill Paul 
123395d67482SBill Paul 	/* Set up the PCI DMA control register. */
1234e53d81eeSPaul Saab 	if (sc->bge_pcie) {
1235e53d81eeSPaul Saab 		dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
1236e53d81eeSPaul Saab 		    (0xf << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
1237e53d81eeSPaul Saab 		    (0x2 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
1238e53d81eeSPaul Saab 	} else if (pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) &
12398287860eSJohn Polstra 	    BGE_PCISTATE_PCI_BUSMODE) {
12408287860eSJohn Polstra 		/* Conventional PCI bus */
12415cba12d3SPaul Saab 		dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
12425cba12d3SPaul Saab 		    (0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
12435cba12d3SPaul Saab 		    (0x7 << BGE_PCIDMARWCTL_WR_WAT_SHIFT) |
12445cba12d3SPaul Saab 		    (0x0F);
12458287860eSJohn Polstra 	} else {
12468287860eSJohn Polstra 		/* PCI-X bus */
12475cba12d3SPaul Saab 		/*
12485cba12d3SPaul Saab 		 * The 5704 uses a different encoding of read/write
12495cba12d3SPaul Saab 		 * watermarks.
12505cba12d3SPaul Saab 		 */
1251e0ced696SPaul Saab 		if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
12525cba12d3SPaul Saab 			dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
12535cba12d3SPaul Saab 			    (0x7 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
12545cba12d3SPaul Saab 			    (0x3 << BGE_PCIDMARWCTL_WR_WAT_SHIFT);
12555cba12d3SPaul Saab 		else
12565cba12d3SPaul Saab 			dma_rw_ctl = BGE_PCI_READ_CMD|BGE_PCI_WRITE_CMD |
12575cba12d3SPaul Saab 			    (0x3 << BGE_PCIDMARWCTL_RD_WAT_SHIFT) |
12585cba12d3SPaul Saab 			    (0x3 << BGE_PCIDMARWCTL_WR_WAT_SHIFT) |
12595cba12d3SPaul Saab 			    (0x0F);
12605cba12d3SPaul Saab 
12615cba12d3SPaul Saab 		/*
12625cba12d3SPaul Saab 		 * 5703 and 5704 need ONEDMA_AT_ONCE as a workaround
12635cba12d3SPaul Saab 		 * for hardware bugs.
12645cba12d3SPaul Saab 		 */
1265e0ced696SPaul Saab 		if (sc->bge_asicrev == BGE_ASICREV_BCM5703 ||
1266e0ced696SPaul Saab 		    sc->bge_asicrev == BGE_ASICREV_BCM5704) {
12675cba12d3SPaul Saab 			u_int32_t tmp;
12685cba12d3SPaul Saab 
12695cba12d3SPaul Saab 			tmp = CSR_READ_4(sc, BGE_PCI_CLKCTL) & 0x1f;
12705cba12d3SPaul Saab 			if (tmp == 0x6 || tmp == 0x7)
12715cba12d3SPaul Saab 				dma_rw_ctl |= BGE_PCIDMARWCTL_ONEDMA_ATONCE;
12728287860eSJohn Polstra 		}
12735cba12d3SPaul Saab 	}
12745cba12d3SPaul Saab 
1275e0ced696SPaul Saab 	if (sc->bge_asicrev == BGE_ASICREV_BCM5703 ||
12760434d1b8SBill Paul 	    sc->bge_asicrev == BGE_ASICREV_BCM5704 ||
1277e53d81eeSPaul Saab 	    sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
1278e53d81eeSPaul Saab 	    sc->bge_asicrev == BGE_ASICREV_BCM5750)
12795cba12d3SPaul Saab 		dma_rw_ctl &= ~BGE_PCIDMARWCTL_MINDMA;
12805cba12d3SPaul Saab 	pci_write_config(sc->bge_dev, BGE_PCI_DMA_RW_CTL, dma_rw_ctl, 4);
128195d67482SBill Paul 
128295d67482SBill Paul 	/*
128395d67482SBill Paul 	 * Set up general mode register.
128495d67482SBill Paul 	 */
128595d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_MODECTL_WORDSWAP_NONFRAME|
128695d67482SBill Paul 	    BGE_MODECTL_BYTESWAP_DATA|BGE_MODECTL_WORDSWAP_DATA|
128795d67482SBill Paul 	    BGE_MODECTL_MAC_ATTN_INTR|BGE_MODECTL_HOST_SEND_BDS|
1288e446dc86SPaul Saab 	    BGE_MODECTL_TX_NO_PHDR_CSUM|BGE_MODECTL_RX_NO_PHDR_CSUM);
128995d67482SBill Paul 
129095d67482SBill Paul 	/*
1291ea13bdd5SJohn Polstra 	 * Disable memory write invalidate.  Apparently it is not supported
1292ea13bdd5SJohn Polstra 	 * properly by these devices.
129395d67482SBill Paul 	 */
1294ea13bdd5SJohn Polstra 	PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, PCIM_CMD_MWIEN, 4);
129595d67482SBill Paul 
129695d67482SBill Paul #ifdef __brokenalpha__
129795d67482SBill Paul 	/*
129895d67482SBill Paul 	 * Must insure that we do not cross an 8K (bytes) boundary
129995d67482SBill Paul 	 * for DMA reads.  Our highest limit is 1K bytes.  This is a
130095d67482SBill Paul 	 * restriction on some ALPHA platforms with early revision
130195d67482SBill Paul 	 * 21174 PCI chipsets, such as the AlphaPC 164lx
130295d67482SBill Paul 	 */
130362f1ea9cSJohn Polstra 	PCI_SETBIT(sc->bge_dev, BGE_PCI_DMA_RW_CTL,
130462f1ea9cSJohn Polstra 	    BGE_PCI_READ_BNDRY_1024BYTES, 4);
130595d67482SBill Paul #endif
130695d67482SBill Paul 
130795d67482SBill Paul 	/* Set the timer prescaler (always 66Mhz) */
130895d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MISC_CFG, 65 << 1/*BGE_32BITTIME_66MHZ*/);
130995d67482SBill Paul 
131095d67482SBill Paul 	return(0);
131195d67482SBill Paul }
131295d67482SBill Paul 
131395d67482SBill Paul static int
131495d67482SBill Paul bge_blockinit(sc)
131595d67482SBill Paul 	struct bge_softc *sc;
131695d67482SBill Paul {
131795d67482SBill Paul 	struct bge_rcb *rcb;
131867111612SJohn Polstra 	volatile struct bge_rcb *vrcb;
131995d67482SBill Paul 	int i;
132095d67482SBill Paul 
132195d67482SBill Paul 	/*
132295d67482SBill Paul 	 * Initialize the memory window pointer register so that
132395d67482SBill Paul 	 * we can access the first 32K of internal NIC RAM. This will
132495d67482SBill Paul 	 * allow us to set up the TX send ring RCBs and the RX return
132595d67482SBill Paul 	 * ring RCBs, plus other things which live in NIC memory.
132695d67482SBill Paul 	 */
132795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_PCI_MEMWIN_BASEADDR, 0);
132895d67482SBill Paul 
1329822f63fcSBill Paul 	/* Note: the BCM5704 has a smaller mbuf space than other chips. */
1330822f63fcSBill Paul 
13315dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1332e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
133395d67482SBill Paul 		/* Configure mbuf memory pool */
133495d67482SBill Paul 		if (sc->bge_extram) {
13350434d1b8SBill Paul 			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR,
13360434d1b8SBill Paul 			    BGE_EXT_SSRAM);
1337822f63fcSBill Paul 			if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
1338822f63fcSBill Paul 				CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x10000);
1339822f63fcSBill Paul 			else
134095d67482SBill Paul 				CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x18000);
134195d67482SBill Paul 		} else {
13420434d1b8SBill Paul 			CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR,
13430434d1b8SBill Paul 			    BGE_BUFFPOOL_1);
1344822f63fcSBill Paul 			if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
1345822f63fcSBill Paul 				CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x10000);
1346822f63fcSBill Paul 			else
134795d67482SBill Paul 				CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x18000);
134895d67482SBill Paul 		}
134995d67482SBill Paul 
135095d67482SBill Paul 		/* Configure DMA resource pool */
13510434d1b8SBill Paul 		CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_BASEADDR,
13520434d1b8SBill Paul 		    BGE_DMA_DESCRIPTORS);
135395d67482SBill Paul 		CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LEN, 0x2000);
13540434d1b8SBill Paul 	}
135595d67482SBill Paul 
135695d67482SBill Paul 	/* Configure mbuf pool watermarks */
1357e53d81eeSPaul Saab 	if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
1358e53d81eeSPaul Saab 	    sc->bge_asicrev == BGE_ASICREV_BCM5750) {
13590434d1b8SBill Paul 		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0);
13600434d1b8SBill Paul 		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10);
13610434d1b8SBill Paul 	} else {
1362fa228020SPaul Saab 		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x50);
1363fa228020SPaul Saab 		CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x20);
13640434d1b8SBill Paul 	}
1365fa228020SPaul Saab 	CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60);
136695d67482SBill Paul 
136795d67482SBill Paul 	/* Configure DMA resource watermarks */
136895d67482SBill Paul 	CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LOWAT, 5);
136995d67482SBill Paul 	CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_HIWAT, 10);
137095d67482SBill Paul 
137195d67482SBill Paul 	/* Enable buffer manager */
13725dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1373e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
137495d67482SBill Paul 		CSR_WRITE_4(sc, BGE_BMAN_MODE,
137595d67482SBill Paul 		    BGE_BMANMODE_ENABLE|BGE_BMANMODE_LOMBUF_ATTN);
137695d67482SBill Paul 
137795d67482SBill Paul 		/* Poll for buffer manager start indication */
137895d67482SBill Paul 		for (i = 0; i < BGE_TIMEOUT; i++) {
137995d67482SBill Paul 			if (CSR_READ_4(sc, BGE_BMAN_MODE) & BGE_BMANMODE_ENABLE)
138095d67482SBill Paul 				break;
138195d67482SBill Paul 			DELAY(10);
138295d67482SBill Paul 		}
138395d67482SBill Paul 
138495d67482SBill Paul 		if (i == BGE_TIMEOUT) {
138595d67482SBill Paul 			printf("bge%d: buffer manager failed to start\n",
138695d67482SBill Paul 			    sc->bge_unit);
138795d67482SBill Paul 			return(ENXIO);
138895d67482SBill Paul 		}
13890434d1b8SBill Paul 	}
139095d67482SBill Paul 
139195d67482SBill Paul 	/* Enable flow-through queues */
139295d67482SBill Paul 	CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
139395d67482SBill Paul 	CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
139495d67482SBill Paul 
139595d67482SBill Paul 	/* Wait until queue initialization is complete */
139695d67482SBill Paul 	for (i = 0; i < BGE_TIMEOUT; i++) {
139795d67482SBill Paul 		if (CSR_READ_4(sc, BGE_FTQ_RESET) == 0)
139895d67482SBill Paul 			break;
139995d67482SBill Paul 		DELAY(10);
140095d67482SBill Paul 	}
140195d67482SBill Paul 
140295d67482SBill Paul 	if (i == BGE_TIMEOUT) {
140395d67482SBill Paul 		printf("bge%d: flow-through queue init failed\n",
140495d67482SBill Paul 		    sc->bge_unit);
140595d67482SBill Paul 		return(ENXIO);
140695d67482SBill Paul 	}
140795d67482SBill Paul 
140895d67482SBill Paul 	/* Initialize the standard RX ring control block */
1409f41ac2beSBill Paul 	rcb = &sc->bge_ldata.bge_info.bge_std_rx_rcb;
1410f41ac2beSBill Paul 	rcb->bge_hostaddr.bge_addr_lo =
1411f41ac2beSBill Paul 	    BGE_ADDR_LO(sc->bge_ldata.bge_rx_std_ring_paddr);
1412f41ac2beSBill Paul 	rcb->bge_hostaddr.bge_addr_hi =
1413f41ac2beSBill Paul 	    BGE_ADDR_HI(sc->bge_ldata.bge_rx_std_ring_paddr);
1414f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
1415f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREREAD);
1416e53d81eeSPaul Saab 	if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
1417e53d81eeSPaul Saab 	    sc->bge_asicrev == BGE_ASICREV_BCM5750)
14180434d1b8SBill Paul 		rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0);
14190434d1b8SBill Paul 	else
14200434d1b8SBill Paul 		rcb->bge_maxlen_flags =
14210434d1b8SBill Paul 		    BGE_RCB_MAXLEN_FLAGS(BGE_MAX_FRAMELEN, 0);
142295d67482SBill Paul 	if (sc->bge_extram)
142395d67482SBill Paul 		rcb->bge_nicaddr = BGE_EXT_STD_RX_RINGS;
142495d67482SBill Paul 	else
142595d67482SBill Paul 		rcb->bge_nicaddr = BGE_STD_RX_RINGS;
142667111612SJohn Polstra 	CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi);
142767111612SJohn Polstra 	CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo);
1428f41ac2beSBill Paul 
142967111612SJohn Polstra 	CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags);
143067111612SJohn Polstra 	CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr);
143195d67482SBill Paul 
143295d67482SBill Paul 	/*
143395d67482SBill Paul 	 * Initialize the jumbo RX ring control block
143495d67482SBill Paul 	 * We set the 'ring disabled' bit in the flags
143595d67482SBill Paul 	 * field until we're actually ready to start
143695d67482SBill Paul 	 * using this ring (i.e. once we set the MTU
143795d67482SBill Paul 	 * high enough to require it).
143895d67482SBill Paul 	 */
14395dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1440e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
1441f41ac2beSBill Paul 		rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb;
1442f41ac2beSBill Paul 
1443f41ac2beSBill Paul 		rcb->bge_hostaddr.bge_addr_lo =
1444f41ac2beSBill Paul 		    BGE_ADDR_LO(sc->bge_ldata.bge_rx_jumbo_ring_paddr);
1445f41ac2beSBill Paul 		rcb->bge_hostaddr.bge_addr_hi =
1446f41ac2beSBill Paul 		    BGE_ADDR_HI(sc->bge_ldata.bge_rx_jumbo_ring_paddr);
1447f41ac2beSBill Paul 		bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1448f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_jumbo_ring_map,
1449f41ac2beSBill Paul 		    BUS_DMASYNC_PREREAD);
145067111612SJohn Polstra 		rcb->bge_maxlen_flags =
14510434d1b8SBill Paul 		    BGE_RCB_MAXLEN_FLAGS(BGE_MAX_FRAMELEN,
14520434d1b8SBill Paul 		    BGE_RCB_FLAG_RING_DISABLED);
145395d67482SBill Paul 		if (sc->bge_extram)
145495d67482SBill Paul 			rcb->bge_nicaddr = BGE_EXT_JUMBO_RX_RINGS;
145595d67482SBill Paul 		else
145695d67482SBill Paul 			rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS;
145767111612SJohn Polstra 		CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI,
145867111612SJohn Polstra 		    rcb->bge_hostaddr.bge_addr_hi);
145967111612SJohn Polstra 		CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO,
146067111612SJohn Polstra 		    rcb->bge_hostaddr.bge_addr_lo);
1461f41ac2beSBill Paul 
14620434d1b8SBill Paul 		CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS,
14630434d1b8SBill Paul 		    rcb->bge_maxlen_flags);
146467111612SJohn Polstra 		CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR, rcb->bge_nicaddr);
146595d67482SBill Paul 
146695d67482SBill Paul 		/* Set up dummy disabled mini ring RCB */
1467f41ac2beSBill Paul 		rcb = &sc->bge_ldata.bge_info.bge_mini_rx_rcb;
146867111612SJohn Polstra 		rcb->bge_maxlen_flags =
146967111612SJohn Polstra 		    BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED);
14700434d1b8SBill Paul 		CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS,
14710434d1b8SBill Paul 		    rcb->bge_maxlen_flags);
14720434d1b8SBill Paul 	}
147395d67482SBill Paul 
147495d67482SBill Paul 	/*
147595d67482SBill Paul 	 * Set the BD ring replentish thresholds. The recommended
147695d67482SBill Paul 	 * values are 1/8th the number of descriptors allocated to
147795d67482SBill Paul 	 * each ring.
147895d67482SBill Paul 	 */
147995d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, BGE_STD_RX_RING_CNT/8);
148095d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, BGE_JUMBO_RX_RING_CNT/8);
148195d67482SBill Paul 
148295d67482SBill Paul 	/*
148395d67482SBill Paul 	 * Disable all unused send rings by setting the 'ring disabled'
148495d67482SBill Paul 	 * bit in the flags field of all the TX send ring control blocks.
148595d67482SBill Paul 	 * These are located in NIC memory.
148695d67482SBill Paul 	 */
148767111612SJohn Polstra 	vrcb = (volatile struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START +
148895d67482SBill Paul 	    BGE_SEND_RING_RCB);
148995d67482SBill Paul 	for (i = 0; i < BGE_TX_RINGS_EXTSSRAM_MAX; i++) {
149067111612SJohn Polstra 		vrcb->bge_maxlen_flags =
149167111612SJohn Polstra 		    BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED);
149267111612SJohn Polstra 		vrcb->bge_nicaddr = 0;
149367111612SJohn Polstra 		vrcb++;
149495d67482SBill Paul 	}
149595d67482SBill Paul 
149695d67482SBill Paul 	/* Configure TX RCB 0 (we use only the first ring) */
149767111612SJohn Polstra 	vrcb = (volatile struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START +
149895d67482SBill Paul 	    BGE_SEND_RING_RCB);
1499f41ac2beSBill Paul 	vrcb->bge_hostaddr.bge_addr_lo =
1500f41ac2beSBill Paul 	    htole32(BGE_ADDR_LO(sc->bge_ldata.bge_tx_ring_paddr));
1501f41ac2beSBill Paul 	vrcb->bge_hostaddr.bge_addr_hi =
1502f41ac2beSBill Paul 	    htole32(BGE_ADDR_HI(sc->bge_ldata.bge_tx_ring_paddr));
150367111612SJohn Polstra 	vrcb->bge_nicaddr = BGE_NIC_TXRING_ADDR(0, BGE_TX_RING_CNT);
15045dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1505e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
15060434d1b8SBill Paul 		vrcb->bge_maxlen_flags =
15070434d1b8SBill Paul 		    BGE_RCB_MAXLEN_FLAGS(BGE_TX_RING_CNT, 0);
150895d67482SBill Paul 
150995d67482SBill Paul 	/* Disable all unused RX return rings */
151067111612SJohn Polstra 	vrcb = (volatile struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START +
151195d67482SBill Paul 	    BGE_RX_RETURN_RING_RCB);
151295d67482SBill Paul 	for (i = 0; i < BGE_RX_RINGS_MAX; i++) {
151367111612SJohn Polstra 		vrcb->bge_hostaddr.bge_addr_hi = 0;
151467111612SJohn Polstra 		vrcb->bge_hostaddr.bge_addr_lo = 0;
151567111612SJohn Polstra 		vrcb->bge_maxlen_flags =
15160434d1b8SBill Paul 		    BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt,
151767111612SJohn Polstra 		    BGE_RCB_FLAG_RING_DISABLED);
151867111612SJohn Polstra 		vrcb->bge_nicaddr = 0;
151995d67482SBill Paul 		CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO +
152095d67482SBill Paul 		    (i * (sizeof(u_int64_t))), 0);
152167111612SJohn Polstra 		vrcb++;
152295d67482SBill Paul 	}
152395d67482SBill Paul 
152495d67482SBill Paul 	/* Initialize RX ring indexes */
152595d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, 0);
152695d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, 0);
152795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_RX_MINI_PROD_LO, 0);
152895d67482SBill Paul 
152995d67482SBill Paul 	/*
153095d67482SBill Paul 	 * Set up RX return ring 0
153195d67482SBill Paul 	 * Note that the NIC address for RX return rings is 0x00000000.
153295d67482SBill Paul 	 * The return rings live entirely within the host, so the
153395d67482SBill Paul 	 * nicaddr field in the RCB isn't used.
153495d67482SBill Paul 	 */
153567111612SJohn Polstra 	vrcb = (volatile struct bge_rcb *)(sc->bge_vhandle + BGE_MEMWIN_START +
153695d67482SBill Paul 	    BGE_RX_RETURN_RING_RCB);
1537f41ac2beSBill Paul 	vrcb->bge_hostaddr.bge_addr_lo =
1538f41ac2beSBill Paul 	    BGE_ADDR_LO(sc->bge_ldata.bge_rx_return_ring_paddr);
1539f41ac2beSBill Paul 	vrcb->bge_hostaddr.bge_addr_hi =
1540f41ac2beSBill Paul 	    BGE_ADDR_HI(sc->bge_ldata.bge_rx_return_ring_paddr);
1541f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_rx_return_ring_tag,
1542f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_return_ring_map, BUS_DMASYNC_PREWRITE);
154367111612SJohn Polstra 	vrcb->bge_nicaddr = 0x00000000;
15440434d1b8SBill Paul 	vrcb->bge_maxlen_flags =
15450434d1b8SBill Paul 	    BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt, 0);
154695d67482SBill Paul 
154795d67482SBill Paul 	/* Set random backoff seed for TX */
154895d67482SBill Paul 	CSR_WRITE_4(sc, BGE_TX_RANDOM_BACKOFF,
1549fc74a9f9SBrooks Davis 	    IFP2ENADDR(sc->bge_ifp)[0] + IFP2ENADDR(sc->bge_ifp)[1] +
1550fc74a9f9SBrooks Davis 	    IFP2ENADDR(sc->bge_ifp)[2] + IFP2ENADDR(sc->bge_ifp)[3] +
1551fc74a9f9SBrooks Davis 	    IFP2ENADDR(sc->bge_ifp)[4] + IFP2ENADDR(sc->bge_ifp)[5] +
155295d67482SBill Paul 	    BGE_TX_BACKOFF_SEED_MASK);
155395d67482SBill Paul 
155495d67482SBill Paul 	/* Set inter-packet gap */
155595d67482SBill Paul 	CSR_WRITE_4(sc, BGE_TX_LENGTHS, 0x2620);
155695d67482SBill Paul 
155795d67482SBill Paul 	/*
155895d67482SBill Paul 	 * Specify which ring to use for packets that don't match
155995d67482SBill Paul 	 * any RX rules.
156095d67482SBill Paul 	 */
156195d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RX_RULES_CFG, 0x08);
156295d67482SBill Paul 
156395d67482SBill Paul 	/*
156495d67482SBill Paul 	 * Configure number of RX lists. One interrupt distribution
156595d67482SBill Paul 	 * list, sixteen active lists, one bad frames class.
156695d67482SBill Paul 	 */
156795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RXLP_CFG, 0x181);
156895d67482SBill Paul 
156995d67482SBill Paul 	/* Inialize RX list placement stats mask. */
157095d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, 0x007FFFFF);
157195d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RXLP_STATS_CTL, 0x1);
157295d67482SBill Paul 
157395d67482SBill Paul 	/* Disable host coalescing until we get it set up */
157495d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_MODE, 0x00000000);
157595d67482SBill Paul 
157695d67482SBill Paul 	/* Poll to make sure it's shut down. */
157795d67482SBill Paul 	for (i = 0; i < BGE_TIMEOUT; i++) {
157895d67482SBill Paul 		if (!(CSR_READ_4(sc, BGE_HCC_MODE) & BGE_HCCMODE_ENABLE))
157995d67482SBill Paul 			break;
158095d67482SBill Paul 		DELAY(10);
158195d67482SBill Paul 	}
158295d67482SBill Paul 
158395d67482SBill Paul 	if (i == BGE_TIMEOUT) {
158495d67482SBill Paul 		printf("bge%d: host coalescing engine failed to idle\n",
158595d67482SBill Paul 		    sc->bge_unit);
158695d67482SBill Paul 		return(ENXIO);
158795d67482SBill Paul 	}
158895d67482SBill Paul 
158995d67482SBill Paul 	/* Set up host coalescing defaults */
159095d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS, sc->bge_rx_coal_ticks);
159195d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, sc->bge_tx_coal_ticks);
159295d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, sc->bge_rx_max_coal_bds);
159395d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, sc->bge_tx_max_coal_bds);
15945dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1595e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
159695d67482SBill Paul 		CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS_INT, 0);
159795d67482SBill Paul 		CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS_INT, 0);
15980434d1b8SBill Paul 	}
159995d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS_INT, 0);
160095d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS_INT, 0);
160195d67482SBill Paul 
160295d67482SBill Paul 	/* Set up address of statistics block */
16035dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1604e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
1605f41ac2beSBill Paul 		CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_HI,
1606f41ac2beSBill Paul 		    BGE_ADDR_HI(sc->bge_ldata.bge_stats_paddr));
160795d67482SBill Paul 		CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_LO,
1608f41ac2beSBill Paul 		    BGE_ADDR_LO(sc->bge_ldata.bge_stats_paddr));
16090434d1b8SBill Paul 		CSR_WRITE_4(sc, BGE_HCC_STATS_BASEADDR, BGE_STATS_BLOCK);
161095d67482SBill Paul 		CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_BASEADDR, BGE_STATUS_BLOCK);
16110434d1b8SBill Paul 		CSR_WRITE_4(sc, BGE_HCC_STATS_TICKS, sc->bge_stat_ticks);
16120434d1b8SBill Paul 	}
16130434d1b8SBill Paul 
16140434d1b8SBill Paul 	/* Set up address of status block */
1615f41ac2beSBill Paul 	CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_HI,
1616f41ac2beSBill Paul 	    BGE_ADDR_HI(sc->bge_ldata.bge_status_block_paddr));
161795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_LO,
1618f41ac2beSBill Paul 	    BGE_ADDR_LO(sc->bge_ldata.bge_status_block_paddr));
1619f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
1620f41ac2beSBill Paul 	    sc->bge_cdata.bge_status_map, BUS_DMASYNC_PREWRITE);
1621f41ac2beSBill Paul 	sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx = 0;
1622f41ac2beSBill Paul 	sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx = 0;
162395d67482SBill Paul 
162495d67482SBill Paul 	/* Turn on host coalescing state machine */
162595d67482SBill Paul 	CSR_WRITE_4(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE);
162695d67482SBill Paul 
162795d67482SBill Paul 	/* Turn on RX BD completion state machine and enable attentions */
162895d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RBDC_MODE,
162995d67482SBill Paul 	    BGE_RBDCMODE_ENABLE|BGE_RBDCMODE_ATTN);
163095d67482SBill Paul 
163195d67482SBill Paul 	/* Turn on RX list placement state machine */
163295d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE);
163395d67482SBill Paul 
163495d67482SBill Paul 	/* Turn on RX list selector state machine. */
16355dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1636e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
163795d67482SBill Paul 		CSR_WRITE_4(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE);
163895d67482SBill Paul 
163995d67482SBill Paul 	/* Turn on DMA, clear stats */
164095d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MAC_MODE, BGE_MACMODE_TXDMA_ENB|
164195d67482SBill Paul 	    BGE_MACMODE_RXDMA_ENB|BGE_MACMODE_RX_STATS_CLEAR|
164295d67482SBill Paul 	    BGE_MACMODE_TX_STATS_CLEAR|BGE_MACMODE_RX_STATS_ENB|
164395d67482SBill Paul 	    BGE_MACMODE_TX_STATS_ENB|BGE_MACMODE_FRMHDR_DMA_ENB|
164495d67482SBill Paul 	    (sc->bge_tbi ? BGE_PORTMODE_TBI : BGE_PORTMODE_MII));
164595d67482SBill Paul 
164695d67482SBill Paul 	/* Set misc. local control, enable interrupts on attentions */
164795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_ONATTN);
164895d67482SBill Paul 
164995d67482SBill Paul #ifdef notdef
165095d67482SBill Paul 	/* Assert GPIO pins for PHY reset */
165195d67482SBill Paul 	BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_MISCIO_OUT0|
165295d67482SBill Paul 	    BGE_MLC_MISCIO_OUT1|BGE_MLC_MISCIO_OUT2);
165395d67482SBill Paul 	BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_MISCIO_OUTEN0|
165495d67482SBill Paul 	    BGE_MLC_MISCIO_OUTEN1|BGE_MLC_MISCIO_OUTEN2);
165595d67482SBill Paul #endif
165695d67482SBill Paul 
165795d67482SBill Paul 	/* Turn on DMA completion state machine */
16585dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1659e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
166095d67482SBill Paul 		CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
166195d67482SBill Paul 
166295d67482SBill Paul 	/* Turn on write DMA state machine */
166395d67482SBill Paul 	CSR_WRITE_4(sc, BGE_WDMA_MODE,
166495d67482SBill Paul 	    BGE_WDMAMODE_ENABLE|BGE_WDMAMODE_ALL_ATTNS);
166595d67482SBill Paul 
166695d67482SBill Paul 	/* Turn on read DMA state machine */
166795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RDMA_MODE,
166895d67482SBill Paul 	    BGE_RDMAMODE_ENABLE|BGE_RDMAMODE_ALL_ATTNS);
166995d67482SBill Paul 
167095d67482SBill Paul 	/* Turn on RX data completion state machine */
167195d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE);
167295d67482SBill Paul 
167395d67482SBill Paul 	/* Turn on RX BD initiator state machine */
167495d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE);
167595d67482SBill Paul 
167695d67482SBill Paul 	/* Turn on RX data and RX BD initiator state machine */
167795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RDBDI_MODE, BGE_RDBDIMODE_ENABLE);
167895d67482SBill Paul 
167995d67482SBill Paul 	/* Turn on Mbuf cluster free state machine */
16805dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
1681e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
168295d67482SBill Paul 		CSR_WRITE_4(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE);
168395d67482SBill Paul 
168495d67482SBill Paul 	/* Turn on send BD completion state machine */
168595d67482SBill Paul 	CSR_WRITE_4(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE);
168695d67482SBill Paul 
168795d67482SBill Paul 	/* Turn on send data completion state machine */
168895d67482SBill Paul 	CSR_WRITE_4(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE);
168995d67482SBill Paul 
169095d67482SBill Paul 	/* Turn on send data initiator state machine */
169195d67482SBill Paul 	CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE);
169295d67482SBill Paul 
169395d67482SBill Paul 	/* Turn on send BD initiator state machine */
169495d67482SBill Paul 	CSR_WRITE_4(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE);
169595d67482SBill Paul 
169695d67482SBill Paul 	/* Turn on send BD selector state machine */
169795d67482SBill Paul 	CSR_WRITE_4(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE);
169895d67482SBill Paul 
169995d67482SBill Paul 	CSR_WRITE_4(sc, BGE_SDI_STATS_ENABLE_MASK, 0x007FFFFF);
170095d67482SBill Paul 	CSR_WRITE_4(sc, BGE_SDI_STATS_CTL,
170195d67482SBill Paul 	    BGE_SDISTATSCTL_ENABLE|BGE_SDISTATSCTL_FASTER);
170295d67482SBill Paul 
170395d67482SBill Paul 	/* ack/clear link change events */
170495d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
17050434d1b8SBill Paul 	    BGE_MACSTAT_CFG_CHANGED|BGE_MACSTAT_MI_COMPLETE|
17060434d1b8SBill Paul 	    BGE_MACSTAT_LINK_CHANGED);
1707f41ac2beSBill Paul 	CSR_WRITE_4(sc, BGE_MI_STS, 0);
170895d67482SBill Paul 
170995d67482SBill Paul 	/* Enable PHY auto polling (for MII/GMII only) */
171095d67482SBill Paul 	if (sc->bge_tbi) {
171195d67482SBill Paul 		CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK);
1712a1d52896SBill Paul 	} else {
171395d67482SBill Paul 		BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL|10<<16);
1714e0ced696SPaul Saab 		if (sc->bge_asicrev == BGE_ASICREV_BCM5700)
1715a1d52896SBill Paul 			CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
1716a1d52896SBill Paul 			    BGE_EVTENB_MI_INTERRUPT);
1717a1d52896SBill Paul 	}
171895d67482SBill Paul 
171995d67482SBill Paul 	/* Enable link state change attentions. */
172095d67482SBill Paul 	BGE_SETBIT(sc, BGE_MAC_EVT_ENB, BGE_EVTENB_LINK_CHANGED);
172195d67482SBill Paul 
172295d67482SBill Paul 	return(0);
172395d67482SBill Paul }
172495d67482SBill Paul 
172595d67482SBill Paul /*
172695d67482SBill Paul  * Probe for a Broadcom chip. Check the PCI vendor and device IDs
172795d67482SBill Paul  * against our list and return its name if we find a match. Note
172895d67482SBill Paul  * that since the Broadcom controller contains VPD support, we
172995d67482SBill Paul  * can get the device name string from the controller itself instead
173095d67482SBill Paul  * of the compiled-in string. This is a little slow, but it guarantees
173195d67482SBill Paul  * we'll always announce the right product name.
173295d67482SBill Paul  */
173395d67482SBill Paul static int
173495d67482SBill Paul bge_probe(dev)
173595d67482SBill Paul 	device_t dev;
173695d67482SBill Paul {
173795d67482SBill Paul 	struct bge_type *t;
173895d67482SBill Paul 	struct bge_softc *sc;
1739029e2ee3SJohn Polstra 	char *descbuf;
174095d67482SBill Paul 
174195d67482SBill Paul 	t = bge_devs;
174295d67482SBill Paul 
174395d67482SBill Paul 	sc = device_get_softc(dev);
174495d67482SBill Paul 	bzero(sc, sizeof(struct bge_softc));
174595d67482SBill Paul 	sc->bge_unit = device_get_unit(dev);
174695d67482SBill Paul 	sc->bge_dev = dev;
174795d67482SBill Paul 
174895d67482SBill Paul 	while(t->bge_name != NULL) {
174995d67482SBill Paul 		if ((pci_get_vendor(dev) == t->bge_vid) &&
175095d67482SBill Paul 		    (pci_get_device(dev) == t->bge_did)) {
175195d67482SBill Paul #ifdef notdef
175295d67482SBill Paul 			bge_vpd_read(sc);
175395d67482SBill Paul 			device_set_desc(dev, sc->bge_vpd_prodname);
175495d67482SBill Paul #endif
1755029e2ee3SJohn Polstra 			descbuf = malloc(BGE_DEVDESC_MAX, M_TEMP, M_NOWAIT);
1756029e2ee3SJohn Polstra 			if (descbuf == NULL)
1757029e2ee3SJohn Polstra 				return(ENOMEM);
1758029e2ee3SJohn Polstra 			snprintf(descbuf, BGE_DEVDESC_MAX,
1759029e2ee3SJohn Polstra 			    "%s, ASIC rev. %#04x", t->bge_name,
1760029e2ee3SJohn Polstra 			    pci_read_config(dev, BGE_PCI_MISC_CTL, 4) >> 16);
1761029e2ee3SJohn Polstra 			device_set_desc_copy(dev, descbuf);
17626d2a9bd6SDoug Ambrisko 			if (pci_get_subvendor(dev) == DELL_VENDORID)
17636d2a9bd6SDoug Ambrisko 				sc->bge_no_3_led = 1;
1764029e2ee3SJohn Polstra 			free(descbuf, M_TEMP);
176595d67482SBill Paul 			return(0);
176695d67482SBill Paul 		}
176795d67482SBill Paul 		t++;
176895d67482SBill Paul 	}
176995d67482SBill Paul 
177095d67482SBill Paul 	return(ENXIO);
177195d67482SBill Paul }
177295d67482SBill Paul 
1773f41ac2beSBill Paul static void
1774f41ac2beSBill Paul bge_dma_free(sc)
1775f41ac2beSBill Paul 	struct bge_softc *sc;
1776f41ac2beSBill Paul {
1777f41ac2beSBill Paul 	int i;
1778f41ac2beSBill Paul 
1779f41ac2beSBill Paul 
1780f41ac2beSBill Paul 	/* Destroy DMA maps for RX buffers */
1781f41ac2beSBill Paul 
1782f41ac2beSBill Paul 	for (i = 0; i < BGE_STD_RX_RING_CNT; i++) {
1783f41ac2beSBill Paul 		if (sc->bge_cdata.bge_rx_std_dmamap[i])
1784f41ac2beSBill Paul 			bus_dmamap_destroy(sc->bge_cdata.bge_mtag,
1785f41ac2beSBill Paul 			    sc->bge_cdata.bge_rx_std_dmamap[i]);
1786f41ac2beSBill Paul 	}
1787f41ac2beSBill Paul 
1788f41ac2beSBill Paul 	/* Destroy DMA maps for jumbo RX buffers */
1789f41ac2beSBill Paul 
1790f41ac2beSBill Paul 	for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) {
1791f41ac2beSBill Paul 		if (sc->bge_cdata.bge_rx_jumbo_dmamap[i])
1792f41ac2beSBill Paul 			bus_dmamap_destroy(sc->bge_cdata.bge_mtag_jumbo,
1793f41ac2beSBill Paul 			    sc->bge_cdata.bge_rx_jumbo_dmamap[i]);
1794f41ac2beSBill Paul 	}
1795f41ac2beSBill Paul 
1796f41ac2beSBill Paul 	/* Destroy DMA maps for TX buffers */
1797f41ac2beSBill Paul 
1798f41ac2beSBill Paul 	for (i = 0; i < BGE_TX_RING_CNT; i++) {
1799f41ac2beSBill Paul 		if (sc->bge_cdata.bge_tx_dmamap[i])
1800f41ac2beSBill Paul 			bus_dmamap_destroy(sc->bge_cdata.bge_mtag,
1801f41ac2beSBill Paul 			    sc->bge_cdata.bge_tx_dmamap[i]);
1802f41ac2beSBill Paul 	}
1803f41ac2beSBill Paul 
1804f41ac2beSBill Paul 	if (sc->bge_cdata.bge_mtag)
1805f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_mtag);
1806f41ac2beSBill Paul 
1807f41ac2beSBill Paul 
1808f41ac2beSBill Paul 	/* Destroy standard RX ring */
1809f41ac2beSBill Paul 
1810f41ac2beSBill Paul 	if (sc->bge_ldata.bge_rx_std_ring)
1811f41ac2beSBill Paul 		bus_dmamem_free(sc->bge_cdata.bge_rx_std_ring_tag,
1812f41ac2beSBill Paul 		    sc->bge_ldata.bge_rx_std_ring,
1813f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_std_ring_map);
1814f41ac2beSBill Paul 
1815f41ac2beSBill Paul 	if (sc->bge_cdata.bge_rx_std_ring_map) {
1816f41ac2beSBill Paul 		bus_dmamap_unload(sc->bge_cdata.bge_rx_std_ring_tag,
1817f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_std_ring_map);
1818f41ac2beSBill Paul 		bus_dmamap_destroy(sc->bge_cdata.bge_rx_std_ring_tag,
1819f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_std_ring_map);
1820f41ac2beSBill Paul 	}
1821f41ac2beSBill Paul 
1822f41ac2beSBill Paul 	if (sc->bge_cdata.bge_rx_std_ring_tag)
1823f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_rx_std_ring_tag);
1824f41ac2beSBill Paul 
1825f41ac2beSBill Paul 	/* Destroy jumbo RX ring */
1826f41ac2beSBill Paul 
1827f41ac2beSBill Paul 	if (sc->bge_ldata.bge_rx_jumbo_ring)
1828f41ac2beSBill Paul 		bus_dmamem_free(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1829f41ac2beSBill Paul 		    sc->bge_ldata.bge_rx_jumbo_ring,
1830f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_jumbo_ring_map);
1831f41ac2beSBill Paul 
1832f41ac2beSBill Paul 	if (sc->bge_cdata.bge_rx_jumbo_ring_map) {
1833f41ac2beSBill Paul 		bus_dmamap_unload(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1834f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_jumbo_ring_map);
1835f41ac2beSBill Paul 		bus_dmamap_destroy(sc->bge_cdata.bge_rx_jumbo_ring_tag,
1836f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_jumbo_ring_map);
1837f41ac2beSBill Paul 	}
1838f41ac2beSBill Paul 
1839f41ac2beSBill Paul 	if (sc->bge_cdata.bge_rx_jumbo_ring_tag)
1840f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_rx_jumbo_ring_tag);
1841f41ac2beSBill Paul 
1842f41ac2beSBill Paul 	/* Destroy RX return ring */
1843f41ac2beSBill Paul 
1844f41ac2beSBill Paul 	if (sc->bge_ldata.bge_rx_return_ring)
1845f41ac2beSBill Paul 		bus_dmamem_free(sc->bge_cdata.bge_rx_return_ring_tag,
1846f41ac2beSBill Paul 		    sc->bge_ldata.bge_rx_return_ring,
1847f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_return_ring_map);
1848f41ac2beSBill Paul 
1849f41ac2beSBill Paul 	if (sc->bge_cdata.bge_rx_return_ring_map) {
1850f41ac2beSBill Paul 		bus_dmamap_unload(sc->bge_cdata.bge_rx_return_ring_tag,
1851f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_return_ring_map);
1852f41ac2beSBill Paul 		bus_dmamap_destroy(sc->bge_cdata.bge_rx_return_ring_tag,
1853f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_return_ring_map);
1854f41ac2beSBill Paul 	}
1855f41ac2beSBill Paul 
1856f41ac2beSBill Paul 	if (sc->bge_cdata.bge_rx_return_ring_tag)
1857f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_rx_return_ring_tag);
1858f41ac2beSBill Paul 
1859f41ac2beSBill Paul 	/* Destroy TX ring */
1860f41ac2beSBill Paul 
1861f41ac2beSBill Paul 	if (sc->bge_ldata.bge_tx_ring)
1862f41ac2beSBill Paul 		bus_dmamem_free(sc->bge_cdata.bge_tx_ring_tag,
1863f41ac2beSBill Paul 		    sc->bge_ldata.bge_tx_ring,
1864f41ac2beSBill Paul 		    sc->bge_cdata.bge_tx_ring_map);
1865f41ac2beSBill Paul 
1866f41ac2beSBill Paul 	if (sc->bge_cdata.bge_tx_ring_map) {
1867f41ac2beSBill Paul 		bus_dmamap_unload(sc->bge_cdata.bge_tx_ring_tag,
1868f41ac2beSBill Paul 		    sc->bge_cdata.bge_tx_ring_map);
1869f41ac2beSBill Paul 		bus_dmamap_destroy(sc->bge_cdata.bge_tx_ring_tag,
1870f41ac2beSBill Paul 		    sc->bge_cdata.bge_tx_ring_map);
1871f41ac2beSBill Paul 	}
1872f41ac2beSBill Paul 
1873f41ac2beSBill Paul 	if (sc->bge_cdata.bge_tx_ring_tag)
1874f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_tx_ring_tag);
1875f41ac2beSBill Paul 
1876f41ac2beSBill Paul 	/* Destroy status block */
1877f41ac2beSBill Paul 
1878f41ac2beSBill Paul 	if (sc->bge_ldata.bge_status_block)
1879f41ac2beSBill Paul 		bus_dmamem_free(sc->bge_cdata.bge_status_tag,
1880f41ac2beSBill Paul 		    sc->bge_ldata.bge_status_block,
1881f41ac2beSBill Paul 		    sc->bge_cdata.bge_status_map);
1882f41ac2beSBill Paul 
1883f41ac2beSBill Paul 	if (sc->bge_cdata.bge_status_map) {
1884f41ac2beSBill Paul 		bus_dmamap_unload(sc->bge_cdata.bge_status_tag,
1885f41ac2beSBill Paul 		    sc->bge_cdata.bge_status_map);
1886f41ac2beSBill Paul 		bus_dmamap_destroy(sc->bge_cdata.bge_status_tag,
1887f41ac2beSBill Paul 		    sc->bge_cdata.bge_status_map);
1888f41ac2beSBill Paul 	}
1889f41ac2beSBill Paul 
1890f41ac2beSBill Paul 	if (sc->bge_cdata.bge_status_tag)
1891f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_status_tag);
1892f41ac2beSBill Paul 
1893f41ac2beSBill Paul 	/* Destroy statistics block */
1894f41ac2beSBill Paul 
1895f41ac2beSBill Paul 	if (sc->bge_ldata.bge_stats)
1896f41ac2beSBill Paul 		bus_dmamem_free(sc->bge_cdata.bge_stats_tag,
1897f41ac2beSBill Paul 		    sc->bge_ldata.bge_stats,
1898f41ac2beSBill Paul 		    sc->bge_cdata.bge_stats_map);
1899f41ac2beSBill Paul 
1900f41ac2beSBill Paul 	if (sc->bge_cdata.bge_stats_map) {
1901f41ac2beSBill Paul 		bus_dmamap_unload(sc->bge_cdata.bge_stats_tag,
1902f41ac2beSBill Paul 		    sc->bge_cdata.bge_stats_map);
1903f41ac2beSBill Paul 		bus_dmamap_destroy(sc->bge_cdata.bge_stats_tag,
1904f41ac2beSBill Paul 		    sc->bge_cdata.bge_stats_map);
1905f41ac2beSBill Paul 	}
1906f41ac2beSBill Paul 
1907f41ac2beSBill Paul 	if (sc->bge_cdata.bge_stats_tag)
1908f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_stats_tag);
1909f41ac2beSBill Paul 
1910f41ac2beSBill Paul 	/* Destroy the parent tag */
1911f41ac2beSBill Paul 
1912f41ac2beSBill Paul 	if (sc->bge_cdata.bge_parent_tag)
1913f41ac2beSBill Paul 		bus_dma_tag_destroy(sc->bge_cdata.bge_parent_tag);
1914f41ac2beSBill Paul 
1915f41ac2beSBill Paul 	return;
1916f41ac2beSBill Paul }
1917f41ac2beSBill Paul 
1918f41ac2beSBill Paul static int
1919f41ac2beSBill Paul bge_dma_alloc(dev)
1920f41ac2beSBill Paul 	device_t dev;
1921f41ac2beSBill Paul {
1922f41ac2beSBill Paul 	struct bge_softc *sc;
1923f41ac2beSBill Paul 	int nseg, i, error;
1924f41ac2beSBill Paul 	struct bge_dmamap_arg ctx;
1925f41ac2beSBill Paul 
1926f41ac2beSBill Paul 	sc = device_get_softc(dev);
1927f41ac2beSBill Paul 
1928f41ac2beSBill Paul 	/*
1929f41ac2beSBill Paul 	 * Allocate the parent bus DMA tag appropriate for PCI.
1930f41ac2beSBill Paul 	 */
1931f41ac2beSBill Paul #define BGE_NSEG_NEW 32
1932f41ac2beSBill Paul 	error = bus_dma_tag_create(NULL,	/* parent */
1933f41ac2beSBill Paul 			PAGE_SIZE, 0,		/* alignment, boundary */
1934f41ac2beSBill Paul 			BUS_SPACE_MAXADDR,	/* lowaddr */
19352f28b973SScott Long 			BUS_SPACE_MAXADDR,	/* highaddr */
1936f41ac2beSBill Paul 			NULL, NULL,		/* filter, filterarg */
1937f41ac2beSBill Paul 			MAXBSIZE, BGE_NSEG_NEW,	/* maxsize, nsegments */
1938f41ac2beSBill Paul 			BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
19398a40c10eSScott Long 			0,			/* flags */
1940f41ac2beSBill Paul 			NULL, NULL,		/* lockfunc, lockarg */
1941f41ac2beSBill Paul 			&sc->bge_cdata.bge_parent_tag);
1942f41ac2beSBill Paul 
1943f41ac2beSBill Paul 	/*
1944f41ac2beSBill Paul 	 * Create tag for RX mbufs.
1945f41ac2beSBill Paul 	 */
1946f41ac2beSBill Paul 	nseg = 32;
19478a2e22deSScott Long 	error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 1,
1948f41ac2beSBill Paul 	    0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
19498a40c10eSScott Long 	    NULL, MCLBYTES * nseg, nseg, MCLBYTES, BUS_DMA_ALLOCNOW, NULL, NULL,
1950f41ac2beSBill Paul 	    &sc->bge_cdata.bge_mtag);
1951f41ac2beSBill Paul 
1952f41ac2beSBill Paul 	if (error) {
1953f41ac2beSBill Paul 		device_printf(dev, "could not allocate dma tag\n");
1954f41ac2beSBill Paul 		return (ENOMEM);
1955f41ac2beSBill Paul 	}
1956f41ac2beSBill Paul 
1957f41ac2beSBill Paul 	/* Create DMA maps for RX buffers */
1958f41ac2beSBill Paul 
1959f41ac2beSBill Paul 	for (i = 0; i < BGE_STD_RX_RING_CNT; i++) {
1960f41ac2beSBill Paul 		error = bus_dmamap_create(sc->bge_cdata.bge_mtag, 0,
1961f41ac2beSBill Paul 			    &sc->bge_cdata.bge_rx_std_dmamap[i]);
1962f41ac2beSBill Paul 		if (error) {
1963f41ac2beSBill Paul 			device_printf(dev, "can't create DMA map for RX\n");
1964f41ac2beSBill Paul 			return(ENOMEM);
1965f41ac2beSBill Paul 		}
1966f41ac2beSBill Paul 	}
1967f41ac2beSBill Paul 
1968f41ac2beSBill Paul 	/* Create DMA maps for TX buffers */
1969f41ac2beSBill Paul 
1970f41ac2beSBill Paul 	for (i = 0; i < BGE_TX_RING_CNT; i++) {
1971f41ac2beSBill Paul 		error = bus_dmamap_create(sc->bge_cdata.bge_mtag, 0,
1972f41ac2beSBill Paul 			    &sc->bge_cdata.bge_tx_dmamap[i]);
1973f41ac2beSBill Paul 		if (error) {
1974f41ac2beSBill Paul 			device_printf(dev, "can't create DMA map for RX\n");
1975f41ac2beSBill Paul 			return(ENOMEM);
1976f41ac2beSBill Paul 		}
1977f41ac2beSBill Paul 	}
1978f41ac2beSBill Paul 
1979f41ac2beSBill Paul 	/* Create tag for standard RX ring */
1980f41ac2beSBill Paul 
1981f41ac2beSBill Paul 	error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
1982f41ac2beSBill Paul 	    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
1983f41ac2beSBill Paul 	    NULL, BGE_STD_RX_RING_SZ, 1, BGE_STD_RX_RING_SZ, 0,
1984f41ac2beSBill Paul 	    NULL, NULL, &sc->bge_cdata.bge_rx_std_ring_tag);
1985f41ac2beSBill Paul 
1986f41ac2beSBill Paul 	if (error) {
1987f41ac2beSBill Paul 		device_printf(dev, "could not allocate dma tag\n");
1988f41ac2beSBill Paul 		return (ENOMEM);
1989f41ac2beSBill Paul 	}
1990f41ac2beSBill Paul 
1991f41ac2beSBill Paul 	/* Allocate DMA'able memory for standard RX ring */
1992f41ac2beSBill Paul 
1993f41ac2beSBill Paul 	error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_std_ring_tag,
1994f41ac2beSBill Paul 	    (void **)&sc->bge_ldata.bge_rx_std_ring, BUS_DMA_NOWAIT,
1995f41ac2beSBill Paul 	    &sc->bge_cdata.bge_rx_std_ring_map);
1996f41ac2beSBill Paul 	if (error)
1997f41ac2beSBill Paul 		return (ENOMEM);
1998f41ac2beSBill Paul 
1999f41ac2beSBill Paul 	bzero((char *)sc->bge_ldata.bge_rx_std_ring, BGE_STD_RX_RING_SZ);
2000f41ac2beSBill Paul 
2001f41ac2beSBill Paul 	/* Load the address of the standard RX ring */
2002f41ac2beSBill Paul 
2003f41ac2beSBill Paul 	ctx.bge_maxsegs = 1;
2004f41ac2beSBill Paul 	ctx.sc = sc;
2005f41ac2beSBill Paul 
2006f41ac2beSBill Paul 	error = bus_dmamap_load(sc->bge_cdata.bge_rx_std_ring_tag,
2007f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_std_ring_map, sc->bge_ldata.bge_rx_std_ring,
2008f41ac2beSBill Paul 	    BGE_STD_RX_RING_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
2009f41ac2beSBill Paul 
2010f41ac2beSBill Paul 	if (error)
2011f41ac2beSBill Paul 		return (ENOMEM);
2012f41ac2beSBill Paul 
2013f41ac2beSBill Paul 	sc->bge_ldata.bge_rx_std_ring_paddr = ctx.bge_busaddr;
2014f41ac2beSBill Paul 
20155dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
2016e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
2017f41ac2beSBill Paul 
2018f41ac2beSBill Paul 		/*
2019f41ac2beSBill Paul 		 * Create tag for jumbo mbufs.
2020f41ac2beSBill Paul 		 * This is really a bit of a kludge. We allocate a special
2021f41ac2beSBill Paul 		 * jumbo buffer pool which (thanks to the way our DMA
2022f41ac2beSBill Paul 		 * memory allocation works) will consist of contiguous
2023f41ac2beSBill Paul 		 * pages. This means that even though a jumbo buffer might
2024f41ac2beSBill Paul 		 * be larger than a page size, we don't really need to
2025f41ac2beSBill Paul 		 * map it into more than one DMA segment. However, the
2026f41ac2beSBill Paul 		 * default mbuf tag will result in multi-segment mappings,
2027f41ac2beSBill Paul 		 * so we have to create a special jumbo mbuf tag that
2028f41ac2beSBill Paul 		 * lets us get away with mapping the jumbo buffers as
2029f41ac2beSBill Paul 		 * a single segment. I think eventually the driver should
2030f41ac2beSBill Paul 		 * be changed so that it uses ordinary mbufs and cluster
2031f41ac2beSBill Paul 		 * buffers, i.e. jumbo frames can span multiple DMA
2032f41ac2beSBill Paul 		 * descriptors. But that's a project for another day.
2033f41ac2beSBill Paul 		 */
2034f41ac2beSBill Paul 
2035f41ac2beSBill Paul 		error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
20368a2e22deSScott Long 		    1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
2037f41ac2beSBill Paul 		    NULL, MCLBYTES * nseg, nseg, BGE_JLEN, 0, NULL, NULL,
2038f41ac2beSBill Paul 		    &sc->bge_cdata.bge_mtag_jumbo);
2039f41ac2beSBill Paul 
2040f41ac2beSBill Paul 		if (error) {
2041f41ac2beSBill Paul 			device_printf(dev, "could not allocate dma tag\n");
2042f41ac2beSBill Paul 			return (ENOMEM);
2043f41ac2beSBill Paul 		}
2044f41ac2beSBill Paul 
2045f41ac2beSBill Paul 		/* Create tag for jumbo RX ring */
2046f41ac2beSBill Paul 
2047f41ac2beSBill Paul 		error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
2048f41ac2beSBill Paul 		    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
2049f41ac2beSBill Paul 		    NULL, BGE_JUMBO_RX_RING_SZ, 1, BGE_JUMBO_RX_RING_SZ, 0,
2050f41ac2beSBill Paul 		    NULL, NULL, &sc->bge_cdata.bge_rx_jumbo_ring_tag);
2051f41ac2beSBill Paul 
2052f41ac2beSBill Paul 		if (error) {
2053f41ac2beSBill Paul 			device_printf(dev, "could not allocate dma tag\n");
2054f41ac2beSBill Paul 			return (ENOMEM);
2055f41ac2beSBill Paul 		}
2056f41ac2beSBill Paul 
2057f41ac2beSBill Paul 		/* Allocate DMA'able memory for jumbo RX ring */
2058f41ac2beSBill Paul 
2059f41ac2beSBill Paul 		error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_jumbo_ring_tag,
2060f41ac2beSBill Paul 		    (void **)&sc->bge_ldata.bge_rx_jumbo_ring, BUS_DMA_NOWAIT,
2061f41ac2beSBill Paul 		    &sc->bge_cdata.bge_rx_jumbo_ring_map);
2062f41ac2beSBill Paul 		if (error)
2063f41ac2beSBill Paul 			return (ENOMEM);
2064f41ac2beSBill Paul 
2065f41ac2beSBill Paul 		bzero((char *)sc->bge_ldata.bge_rx_jumbo_ring,
2066f41ac2beSBill Paul 		    BGE_JUMBO_RX_RING_SZ);
2067f41ac2beSBill Paul 
2068f41ac2beSBill Paul 		/* Load the address of the jumbo RX ring */
2069f41ac2beSBill Paul 
2070f41ac2beSBill Paul 		ctx.bge_maxsegs = 1;
2071f41ac2beSBill Paul 		ctx.sc = sc;
2072f41ac2beSBill Paul 
2073f41ac2beSBill Paul 		error = bus_dmamap_load(sc->bge_cdata.bge_rx_jumbo_ring_tag,
2074f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_jumbo_ring_map,
2075f41ac2beSBill Paul 		    sc->bge_ldata.bge_rx_jumbo_ring, BGE_JUMBO_RX_RING_SZ,
2076f41ac2beSBill Paul 		    bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
2077f41ac2beSBill Paul 
2078f41ac2beSBill Paul 		if (error)
2079f41ac2beSBill Paul 			return (ENOMEM);
2080f41ac2beSBill Paul 
2081f41ac2beSBill Paul 		sc->bge_ldata.bge_rx_jumbo_ring_paddr = ctx.bge_busaddr;
2082f41ac2beSBill Paul 
2083f41ac2beSBill Paul 		/* Create DMA maps for jumbo RX buffers */
2084f41ac2beSBill Paul 
2085f41ac2beSBill Paul 		for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) {
2086f41ac2beSBill Paul 			error = bus_dmamap_create(sc->bge_cdata.bge_mtag_jumbo,
2087f41ac2beSBill Paul 				    0, &sc->bge_cdata.bge_rx_jumbo_dmamap[i]);
2088f41ac2beSBill Paul 			if (error) {
2089f41ac2beSBill Paul 				device_printf(dev,
2090f41ac2beSBill Paul 				    "can't create DMA map for RX\n");
2091f41ac2beSBill Paul 				return(ENOMEM);
2092f41ac2beSBill Paul 			}
2093f41ac2beSBill Paul 		}
2094f41ac2beSBill Paul 
2095f41ac2beSBill Paul 	}
2096f41ac2beSBill Paul 
2097f41ac2beSBill Paul 	/* Create tag for RX return ring */
2098f41ac2beSBill Paul 
2099f41ac2beSBill Paul 	error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
2100f41ac2beSBill Paul 	    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
2101f41ac2beSBill Paul 	    NULL, BGE_RX_RTN_RING_SZ(sc), 1, BGE_RX_RTN_RING_SZ(sc), 0,
2102f41ac2beSBill Paul 	    NULL, NULL, &sc->bge_cdata.bge_rx_return_ring_tag);
2103f41ac2beSBill Paul 
2104f41ac2beSBill Paul 	if (error) {
2105f41ac2beSBill Paul 		device_printf(dev, "could not allocate dma tag\n");
2106f41ac2beSBill Paul 		return (ENOMEM);
2107f41ac2beSBill Paul 	}
2108f41ac2beSBill Paul 
2109f41ac2beSBill Paul 	/* Allocate DMA'able memory for RX return ring */
2110f41ac2beSBill Paul 
2111f41ac2beSBill Paul 	error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_return_ring_tag,
2112f41ac2beSBill Paul 	    (void **)&sc->bge_ldata.bge_rx_return_ring, BUS_DMA_NOWAIT,
2113f41ac2beSBill Paul 	    &sc->bge_cdata.bge_rx_return_ring_map);
2114f41ac2beSBill Paul 	if (error)
2115f41ac2beSBill Paul 		return (ENOMEM);
2116f41ac2beSBill Paul 
2117f41ac2beSBill Paul 	bzero((char *)sc->bge_ldata.bge_rx_return_ring,
2118f41ac2beSBill Paul 	    BGE_RX_RTN_RING_SZ(sc));
2119f41ac2beSBill Paul 
2120f41ac2beSBill Paul 	/* Load the address of the RX return ring */
2121f41ac2beSBill Paul 
2122f41ac2beSBill Paul 	ctx.bge_maxsegs = 1;
2123f41ac2beSBill Paul 	ctx.sc = sc;
2124f41ac2beSBill Paul 
2125f41ac2beSBill Paul 	error = bus_dmamap_load(sc->bge_cdata.bge_rx_return_ring_tag,
2126f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_return_ring_map,
2127f41ac2beSBill Paul 	    sc->bge_ldata.bge_rx_return_ring, BGE_RX_RTN_RING_SZ(sc),
2128f41ac2beSBill Paul 	    bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
2129f41ac2beSBill Paul 
2130f41ac2beSBill Paul 	if (error)
2131f41ac2beSBill Paul 		return (ENOMEM);
2132f41ac2beSBill Paul 
2133f41ac2beSBill Paul 	sc->bge_ldata.bge_rx_return_ring_paddr = ctx.bge_busaddr;
2134f41ac2beSBill Paul 
2135f41ac2beSBill Paul 	/* Create tag for TX ring */
2136f41ac2beSBill Paul 
2137f41ac2beSBill Paul 	error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
2138f41ac2beSBill Paul 	    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
2139f41ac2beSBill Paul 	    NULL, BGE_TX_RING_SZ, 1, BGE_TX_RING_SZ, 0, NULL, NULL,
2140f41ac2beSBill Paul 	    &sc->bge_cdata.bge_tx_ring_tag);
2141f41ac2beSBill Paul 
2142f41ac2beSBill Paul 	if (error) {
2143f41ac2beSBill Paul 		device_printf(dev, "could not allocate dma tag\n");
2144f41ac2beSBill Paul 		return (ENOMEM);
2145f41ac2beSBill Paul 	}
2146f41ac2beSBill Paul 
2147f41ac2beSBill Paul 	/* Allocate DMA'able memory for TX ring */
2148f41ac2beSBill Paul 
2149f41ac2beSBill Paul 	error = bus_dmamem_alloc(sc->bge_cdata.bge_tx_ring_tag,
2150f41ac2beSBill Paul 	    (void **)&sc->bge_ldata.bge_tx_ring, BUS_DMA_NOWAIT,
2151f41ac2beSBill Paul 	    &sc->bge_cdata.bge_tx_ring_map);
2152f41ac2beSBill Paul 	if (error)
2153f41ac2beSBill Paul 		return (ENOMEM);
2154f41ac2beSBill Paul 
2155f41ac2beSBill Paul 	bzero((char *)sc->bge_ldata.bge_tx_ring, BGE_TX_RING_SZ);
2156f41ac2beSBill Paul 
2157f41ac2beSBill Paul 	/* Load the address of the TX ring */
2158f41ac2beSBill Paul 
2159f41ac2beSBill Paul 	ctx.bge_maxsegs = 1;
2160f41ac2beSBill Paul 	ctx.sc = sc;
2161f41ac2beSBill Paul 
2162f41ac2beSBill Paul 	error = bus_dmamap_load(sc->bge_cdata.bge_tx_ring_tag,
2163f41ac2beSBill Paul 	    sc->bge_cdata.bge_tx_ring_map, sc->bge_ldata.bge_tx_ring,
2164f41ac2beSBill Paul 	    BGE_TX_RING_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
2165f41ac2beSBill Paul 
2166f41ac2beSBill Paul 	if (error)
2167f41ac2beSBill Paul 		return (ENOMEM);
2168f41ac2beSBill Paul 
2169f41ac2beSBill Paul 	sc->bge_ldata.bge_tx_ring_paddr = ctx.bge_busaddr;
2170f41ac2beSBill Paul 
2171f41ac2beSBill Paul 	/* Create tag for status block */
2172f41ac2beSBill Paul 
2173f41ac2beSBill Paul 	error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
2174f41ac2beSBill Paul 	    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
2175f41ac2beSBill Paul 	    NULL, BGE_STATUS_BLK_SZ, 1, BGE_STATUS_BLK_SZ, 0,
2176f41ac2beSBill Paul 	    NULL, NULL, &sc->bge_cdata.bge_status_tag);
2177f41ac2beSBill Paul 
2178f41ac2beSBill Paul 	if (error) {
2179f41ac2beSBill Paul 		device_printf(dev, "could not allocate dma tag\n");
2180f41ac2beSBill Paul 		return (ENOMEM);
2181f41ac2beSBill Paul 	}
2182f41ac2beSBill Paul 
2183f41ac2beSBill Paul 	/* Allocate DMA'able memory for status block */
2184f41ac2beSBill Paul 
2185f41ac2beSBill Paul 	error = bus_dmamem_alloc(sc->bge_cdata.bge_status_tag,
2186f41ac2beSBill Paul 	    (void **)&sc->bge_ldata.bge_status_block, BUS_DMA_NOWAIT,
2187f41ac2beSBill Paul 	    &sc->bge_cdata.bge_status_map);
2188f41ac2beSBill Paul 	if (error)
2189f41ac2beSBill Paul 		return (ENOMEM);
2190f41ac2beSBill Paul 
2191f41ac2beSBill Paul 	bzero((char *)sc->bge_ldata.bge_status_block, BGE_STATUS_BLK_SZ);
2192f41ac2beSBill Paul 
2193f41ac2beSBill Paul 	/* Load the address of the status block */
2194f41ac2beSBill Paul 
2195f41ac2beSBill Paul 	ctx.sc = sc;
2196f41ac2beSBill Paul 	ctx.bge_maxsegs = 1;
2197f41ac2beSBill Paul 
2198f41ac2beSBill Paul 	error = bus_dmamap_load(sc->bge_cdata.bge_status_tag,
2199f41ac2beSBill Paul 	    sc->bge_cdata.bge_status_map, sc->bge_ldata.bge_status_block,
2200f41ac2beSBill Paul 	    BGE_STATUS_BLK_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
2201f41ac2beSBill Paul 
2202f41ac2beSBill Paul 	if (error)
2203f41ac2beSBill Paul 		return (ENOMEM);
2204f41ac2beSBill Paul 
2205f41ac2beSBill Paul 	sc->bge_ldata.bge_status_block_paddr = ctx.bge_busaddr;
2206f41ac2beSBill Paul 
2207f41ac2beSBill Paul 	/* Create tag for statistics block */
2208f41ac2beSBill Paul 
2209f41ac2beSBill Paul 	error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag,
2210f41ac2beSBill Paul 	    PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL,
2211f41ac2beSBill Paul 	    NULL, BGE_STATS_SZ, 1, BGE_STATS_SZ, 0, NULL, NULL,
2212f41ac2beSBill Paul 	    &sc->bge_cdata.bge_stats_tag);
2213f41ac2beSBill Paul 
2214f41ac2beSBill Paul 	if (error) {
2215f41ac2beSBill Paul 		device_printf(dev, "could not allocate dma tag\n");
2216f41ac2beSBill Paul 		return (ENOMEM);
2217f41ac2beSBill Paul 	}
2218f41ac2beSBill Paul 
2219f41ac2beSBill Paul 	/* Allocate DMA'able memory for statistics block */
2220f41ac2beSBill Paul 
2221f41ac2beSBill Paul 	error = bus_dmamem_alloc(sc->bge_cdata.bge_stats_tag,
2222f41ac2beSBill Paul 	    (void **)&sc->bge_ldata.bge_stats, BUS_DMA_NOWAIT,
2223f41ac2beSBill Paul 	    &sc->bge_cdata.bge_stats_map);
2224f41ac2beSBill Paul 	if (error)
2225f41ac2beSBill Paul 		return (ENOMEM);
2226f41ac2beSBill Paul 
2227f41ac2beSBill Paul 	bzero((char *)sc->bge_ldata.bge_stats, BGE_STATS_SZ);
2228f41ac2beSBill Paul 
2229f41ac2beSBill Paul 	/* Load the address of the statstics block */
2230f41ac2beSBill Paul 
2231f41ac2beSBill Paul 	ctx.sc = sc;
2232f41ac2beSBill Paul 	ctx.bge_maxsegs = 1;
2233f41ac2beSBill Paul 
2234f41ac2beSBill Paul 	error = bus_dmamap_load(sc->bge_cdata.bge_stats_tag,
2235f41ac2beSBill Paul 	    sc->bge_cdata.bge_stats_map, sc->bge_ldata.bge_stats,
2236f41ac2beSBill Paul 	    BGE_STATS_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT);
2237f41ac2beSBill Paul 
2238f41ac2beSBill Paul 	if (error)
2239f41ac2beSBill Paul 		return (ENOMEM);
2240f41ac2beSBill Paul 
2241f41ac2beSBill Paul 	sc->bge_ldata.bge_stats_paddr = ctx.bge_busaddr;
2242f41ac2beSBill Paul 
2243f41ac2beSBill Paul 	return(0);
2244f41ac2beSBill Paul }
2245f41ac2beSBill Paul 
224695d67482SBill Paul static int
224795d67482SBill Paul bge_attach(dev)
224895d67482SBill Paul 	device_t dev;
224995d67482SBill Paul {
225095d67482SBill Paul 	struct ifnet *ifp;
225195d67482SBill Paul 	struct bge_softc *sc;
2252a1d52896SBill Paul 	u_int32_t hwcfg = 0;
2253fc74a9f9SBrooks Davis 	u_int32_t mac_tmp = 0;
2254fc74a9f9SBrooks Davis 	u_char eaddr[6];
225595d67482SBill Paul 	int unit, error = 0, rid;
225695d67482SBill Paul 
225795d67482SBill Paul 	sc = device_get_softc(dev);
225895d67482SBill Paul 	unit = device_get_unit(dev);
225995d67482SBill Paul 	sc->bge_dev = dev;
226095d67482SBill Paul 	sc->bge_unit = unit;
226195d67482SBill Paul 
226295d67482SBill Paul 	/*
226395d67482SBill Paul 	 * Map control/status registers.
226495d67482SBill Paul 	 */
226595d67482SBill Paul 	pci_enable_busmaster(dev);
226695d67482SBill Paul 
226795d67482SBill Paul 	rid = BGE_PCI_BAR0;
22685f96beb9SNate Lawson 	sc->bge_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
22695f96beb9SNate Lawson 	    RF_ACTIVE|PCI_RF_DENSE);
227095d67482SBill Paul 
227195d67482SBill Paul 	if (sc->bge_res == NULL) {
227295d67482SBill Paul 		printf ("bge%d: couldn't map memory\n", unit);
227395d67482SBill Paul 		error = ENXIO;
227495d67482SBill Paul 		goto fail;
227595d67482SBill Paul 	}
227695d67482SBill Paul 
227795d67482SBill Paul 	sc->bge_btag = rman_get_bustag(sc->bge_res);
227895d67482SBill Paul 	sc->bge_bhandle = rman_get_bushandle(sc->bge_res);
227995d67482SBill Paul 	sc->bge_vhandle = (vm_offset_t)rman_get_virtual(sc->bge_res);
228095d67482SBill Paul 
228195d67482SBill Paul 	/* Allocate interrupt */
228295d67482SBill Paul 	rid = 0;
228395d67482SBill Paul 
22845f96beb9SNate Lawson 	sc->bge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
228595d67482SBill Paul 	    RF_SHAREABLE | RF_ACTIVE);
228695d67482SBill Paul 
228795d67482SBill Paul 	if (sc->bge_irq == NULL) {
228895d67482SBill Paul 		printf("bge%d: couldn't map interrupt\n", unit);
228995d67482SBill Paul 		error = ENXIO;
229095d67482SBill Paul 		goto fail;
229195d67482SBill Paul 	}
229295d67482SBill Paul 
229395d67482SBill Paul 	sc->bge_unit = unit;
229495d67482SBill Paul 
22950f9bd73bSSam Leffler 	BGE_LOCK_INIT(sc, device_get_nameunit(dev));
22960f9bd73bSSam Leffler 
2297e53d81eeSPaul Saab 	/* Save ASIC rev. */
2298e53d81eeSPaul Saab 
2299e53d81eeSPaul Saab 	sc->bge_chipid =
2300e53d81eeSPaul Saab 	    pci_read_config(dev, BGE_PCI_MISC_CTL, 4) &
2301e53d81eeSPaul Saab 	    BGE_PCIMISCCTL_ASICREV;
2302e53d81eeSPaul Saab 	sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid);
2303e53d81eeSPaul Saab 	sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid);
2304e53d81eeSPaul Saab 
2305e53d81eeSPaul Saab 	/*
2306419c028bSPaul Saab 	 * Treat the 5714 like the 5750 until we have more info
2307419c028bSPaul Saab 	 * on this chip.
2308419c028bSPaul Saab 	 */
2309419c028bSPaul Saab 	if (sc->bge_asicrev == BGE_ASICREV_BCM5714)
2310419c028bSPaul Saab 		sc->bge_asicrev = BGE_ASICREV_BCM5750;
2311419c028bSPaul Saab 
2312419c028bSPaul Saab 	/*
2313e53d81eeSPaul Saab 	 * XXX: Broadcom Linux driver.  Not in specs or eratta.
2314e53d81eeSPaul Saab 	 * PCI-Express?
2315e53d81eeSPaul Saab 	 */
2316e53d81eeSPaul Saab 	if (sc->bge_asicrev == BGE_ASICREV_BCM5750) {
2317e53d81eeSPaul Saab 		u_int32_t v;
2318e53d81eeSPaul Saab 
2319e53d81eeSPaul Saab 		v = pci_read_config(dev, BGE_PCI_MSI_CAPID, 4);
2320e53d81eeSPaul Saab 		if (((v >> 8) & 0xff) == BGE_PCIE_CAPID_REG) {
2321e53d81eeSPaul Saab 			v = pci_read_config(dev, BGE_PCIE_CAPID_REG, 4);
2322e53d81eeSPaul Saab 			if ((v & 0xff) == BGE_PCIE_CAPID)
2323e53d81eeSPaul Saab 				sc->bge_pcie = 1;
2324e53d81eeSPaul Saab 		}
2325e53d81eeSPaul Saab 	}
2326e53d81eeSPaul Saab 
232795d67482SBill Paul 	/* Try to reset the chip. */
232895d67482SBill Paul 	bge_reset(sc);
232995d67482SBill Paul 
233095d67482SBill Paul 	if (bge_chipinit(sc)) {
233195d67482SBill Paul 		printf("bge%d: chip initialization failed\n", sc->bge_unit);
233295d67482SBill Paul 		bge_release_resources(sc);
233395d67482SBill Paul 		error = ENXIO;
233495d67482SBill Paul 		goto fail;
233595d67482SBill Paul 	}
233695d67482SBill Paul 
233795d67482SBill Paul 	/*
233895d67482SBill Paul 	 * Get station address from the EEPROM.
233995d67482SBill Paul 	 */
2340fc74a9f9SBrooks Davis 	mac_tmp = bge_readmem_ind(sc, 0x0c14);
2341fc74a9f9SBrooks Davis 	if ((mac_tmp >> 16) == 0x484b) {
2342fc74a9f9SBrooks Davis 		eaddr[0] = (u_char)(mac_tmp >> 8);
2343fc74a9f9SBrooks Davis 		eaddr[1] = (u_char)mac_tmp;
2344fc74a9f9SBrooks Davis 		mac_tmp = bge_readmem_ind(sc, 0x0c18);
2345fc74a9f9SBrooks Davis 		eaddr[2] = (u_char)(mac_tmp >> 24);
2346fc74a9f9SBrooks Davis 		eaddr[3] = (u_char)(mac_tmp >> 16);
2347fc74a9f9SBrooks Davis 		eaddr[4] = (u_char)(mac_tmp >> 8);
2348fc74a9f9SBrooks Davis 		eaddr[5] = (u_char)mac_tmp;
2349fc74a9f9SBrooks Davis 	} else if (bge_read_eeprom(sc, eaddr,
235095d67482SBill Paul 	    BGE_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) {
235195d67482SBill Paul 		printf("bge%d: failed to read station address\n", unit);
235295d67482SBill Paul 		bge_release_resources(sc);
235395d67482SBill Paul 		error = ENXIO;
235495d67482SBill Paul 		goto fail;
235595d67482SBill Paul 	}
235695d67482SBill Paul 
2357f41ac2beSBill Paul 	/* 5705 limits RX return ring to 512 entries. */
2358e53d81eeSPaul Saab 	if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
2359e53d81eeSPaul Saab 	    sc->bge_asicrev == BGE_ASICREV_BCM5750)
2360f41ac2beSBill Paul 		sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705;
2361f41ac2beSBill Paul 	else
2362f41ac2beSBill Paul 		sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT;
2363f41ac2beSBill Paul 
2364f41ac2beSBill Paul 	if (bge_dma_alloc(dev)) {
2365f41ac2beSBill Paul 		printf ("bge%d: failed to allocate DMA resources\n",
2366f41ac2beSBill Paul 		    sc->bge_unit);
2367f41ac2beSBill Paul 		bge_release_resources(sc);
2368f41ac2beSBill Paul 		error = ENXIO;
2369f41ac2beSBill Paul 		goto fail;
2370f41ac2beSBill Paul 	}
2371f41ac2beSBill Paul 
23720434d1b8SBill Paul 	/*
23730434d1b8SBill Paul 	 * Try to allocate memory for jumbo buffers.
23740434d1b8SBill Paul 	 * The 5705 does not appear to support jumbo frames.
23750434d1b8SBill Paul 	 */
23765dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
2377e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
237895d67482SBill Paul 		if (bge_alloc_jumbo_mem(sc)) {
237995d67482SBill Paul 			printf("bge%d: jumbo buffer allocation "
238095d67482SBill Paul 			    "failed\n", sc->bge_unit);
238195d67482SBill Paul 			bge_release_resources(sc);
238295d67482SBill Paul 			error = ENXIO;
238395d67482SBill Paul 			goto fail;
238495d67482SBill Paul 		}
23850434d1b8SBill Paul 	}
238695d67482SBill Paul 
238795d67482SBill Paul 	/* Set default tuneable values. */
238895d67482SBill Paul 	sc->bge_stat_ticks = BGE_TICKS_PER_SEC;
238995d67482SBill Paul 	sc->bge_rx_coal_ticks = 150;
239095d67482SBill Paul 	sc->bge_tx_coal_ticks = 150;
239195d67482SBill Paul 	sc->bge_rx_max_coal_bds = 64;
239295d67482SBill Paul 	sc->bge_tx_max_coal_bds = 128;
239395d67482SBill Paul 
239495d67482SBill Paul 	/* Set up ifnet structure */
2395fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp = if_alloc(IFT_ETHER);
2396fc74a9f9SBrooks Davis 	if (ifp == NULL) {
2397fc74a9f9SBrooks Davis 		printf("bge%d: failed to if_alloc()\n", sc->bge_unit);
2398fc74a9f9SBrooks Davis 		bge_release_resources(sc);
2399fc74a9f9SBrooks Davis 		error = ENXIO;
2400fc74a9f9SBrooks Davis 		goto fail;
2401fc74a9f9SBrooks Davis 	}
240295d67482SBill Paul 	ifp->if_softc = sc;
24039bf40edeSBrooks Davis 	if_initname(ifp, device_get_name(dev), device_get_unit(dev));
240495d67482SBill Paul 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
240595d67482SBill Paul 	ifp->if_ioctl = bge_ioctl;
240695d67482SBill Paul 	ifp->if_start = bge_start;
240795d67482SBill Paul 	ifp->if_watchdog = bge_watchdog;
240895d67482SBill Paul 	ifp->if_init = bge_init;
240995d67482SBill Paul 	ifp->if_mtu = ETHERMTU;
24104d665c4dSDag-Erling Smørgrav 	ifp->if_snd.ifq_drv_maxlen = BGE_TX_RING_CNT - 1;
24114d665c4dSDag-Erling Smørgrav 	IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen);
24124d665c4dSDag-Erling Smørgrav 	IFQ_SET_READY(&ifp->if_snd);
241395d67482SBill Paul 	ifp->if_hwassist = BGE_CSUM_FEATURES;
2414b874fdd4SYaroslav Tykhiy 	/* NB: the code for RX csum offload is disabled for now */
2415b874fdd4SYaroslav Tykhiy 	ifp->if_capabilities = IFCAP_TXCSUM | IFCAP_VLAN_HWTAGGING |
24160434d1b8SBill Paul 	    IFCAP_VLAN_MTU;
241795d67482SBill Paul 	ifp->if_capenable = ifp->if_capabilities;
241895d67482SBill Paul 
2419a1d52896SBill Paul 	/*
2420a1d52896SBill Paul 	 * Figure out what sort of media we have by checking the
242141abcc1bSPaul Saab 	 * hardware config word in the first 32k of NIC internal memory,
242241abcc1bSPaul Saab 	 * or fall back to examining the EEPROM if necessary.
242341abcc1bSPaul Saab 	 * Note: on some BCM5700 cards, this value appears to be unset.
242441abcc1bSPaul Saab 	 * If that's the case, we have to rely on identifying the NIC
242541abcc1bSPaul Saab 	 * by its PCI subsystem ID, as we do below for the SysKonnect
242641abcc1bSPaul Saab 	 * SK-9D41.
2427a1d52896SBill Paul 	 */
242841abcc1bSPaul Saab 	if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) == BGE_MAGIC_NUMBER)
242941abcc1bSPaul Saab 		hwcfg = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG);
243041abcc1bSPaul Saab 	else {
2431a1d52896SBill Paul 		bge_read_eeprom(sc, (caddr_t)&hwcfg,
2432a1d52896SBill Paul 				BGE_EE_HWCFG_OFFSET, sizeof(hwcfg));
243341abcc1bSPaul Saab 		hwcfg = ntohl(hwcfg);
243441abcc1bSPaul Saab 	}
243541abcc1bSPaul Saab 
243641abcc1bSPaul Saab 	if ((hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER)
2437a1d52896SBill Paul 		sc->bge_tbi = 1;
2438a1d52896SBill Paul 
243995d67482SBill Paul 	/* The SysKonnect SK-9D41 is a 1000baseSX card. */
244095d67482SBill Paul 	if ((pci_read_config(dev, BGE_PCI_SUBSYS, 4) >> 16) == SK_SUBSYSID_9D41)
244195d67482SBill Paul 		sc->bge_tbi = 1;
244295d67482SBill Paul 
244395d67482SBill Paul 	if (sc->bge_tbi) {
244495d67482SBill Paul 		ifmedia_init(&sc->bge_ifmedia, IFM_IMASK,
244595d67482SBill Paul 		    bge_ifmedia_upd, bge_ifmedia_sts);
244695d67482SBill Paul 		ifmedia_add(&sc->bge_ifmedia, IFM_ETHER|IFM_1000_SX, 0, NULL);
244795d67482SBill Paul 		ifmedia_add(&sc->bge_ifmedia,
244895d67482SBill Paul 		    IFM_ETHER|IFM_1000_SX|IFM_FDX, 0, NULL);
244995d67482SBill Paul 		ifmedia_add(&sc->bge_ifmedia, IFM_ETHER|IFM_AUTO, 0, NULL);
245095d67482SBill Paul 		ifmedia_set(&sc->bge_ifmedia, IFM_ETHER|IFM_AUTO);
2451da3003f0SBill Paul 		sc->bge_ifmedia.ifm_media = sc->bge_ifmedia.ifm_cur->ifm_media;
245295d67482SBill Paul 	} else {
245395d67482SBill Paul 		/*
245495d67482SBill Paul 		 * Do transceiver setup.
245595d67482SBill Paul 		 */
245695d67482SBill Paul 		if (mii_phy_probe(dev, &sc->bge_miibus,
245795d67482SBill Paul 		    bge_ifmedia_upd, bge_ifmedia_sts)) {
245895d67482SBill Paul 			printf("bge%d: MII without any PHY!\n", sc->bge_unit);
245995d67482SBill Paul 			bge_release_resources(sc);
246095d67482SBill Paul 			bge_free_jumbo_mem(sc);
2461fc74a9f9SBrooks Davis 			if_free(ifp);
246295d67482SBill Paul 			error = ENXIO;
246395d67482SBill Paul 			goto fail;
246495d67482SBill Paul 		}
246595d67482SBill Paul 	}
246695d67482SBill Paul 
246795d67482SBill Paul 	/*
2468e255b776SJohn Polstra 	 * When using the BCM5701 in PCI-X mode, data corruption has
2469e255b776SJohn Polstra 	 * been observed in the first few bytes of some received packets.
2470e255b776SJohn Polstra 	 * Aligning the packet buffer in memory eliminates the corruption.
2471e255b776SJohn Polstra 	 * Unfortunately, this misaligns the packet payloads.  On platforms
2472e255b776SJohn Polstra 	 * which do not support unaligned accesses, we will realign the
2473e255b776SJohn Polstra 	 * payloads by copying the received packets.
2474e255b776SJohn Polstra 	 */
2475e0ced696SPaul Saab 	switch (sc->bge_chipid) {
2476e0ced696SPaul Saab 	case BGE_CHIPID_BCM5701_A0:
2477e0ced696SPaul Saab 	case BGE_CHIPID_BCM5701_B0:
2478e0ced696SPaul Saab 	case BGE_CHIPID_BCM5701_B2:
2479e0ced696SPaul Saab 	case BGE_CHIPID_BCM5701_B5:
2480e255b776SJohn Polstra 		/* If in PCI-X mode, work around the alignment bug. */
2481e255b776SJohn Polstra 		if ((pci_read_config(dev, BGE_PCI_PCISTATE, 4) &
2482e255b776SJohn Polstra 		    (BGE_PCISTATE_PCI_BUSMODE | BGE_PCISTATE_PCI_BUSSPEED)) ==
2483e255b776SJohn Polstra 		    BGE_PCISTATE_PCI_BUSSPEED)
2484e255b776SJohn Polstra 			sc->bge_rx_alignment_bug = 1;
2485e255b776SJohn Polstra 		break;
2486e255b776SJohn Polstra 	}
2487e255b776SJohn Polstra 
2488e255b776SJohn Polstra 	/*
248995d67482SBill Paul 	 * Call MI attach routine.
249095d67482SBill Paul 	 */
2491fc74a9f9SBrooks Davis 	ether_ifattach(ifp, eaddr);
24920f9bd73bSSam Leffler 	callout_init(&sc->bge_stat_ch, CALLOUT_MPSAFE);
24930f9bd73bSSam Leffler 
24940f9bd73bSSam Leffler 	/*
24950f9bd73bSSam Leffler 	 * Hookup IRQ last.
24960f9bd73bSSam Leffler 	 */
24970f9bd73bSSam Leffler 	error = bus_setup_intr(dev, sc->bge_irq, INTR_TYPE_NET | INTR_MPSAFE,
24980f9bd73bSSam Leffler 	   bge_intr, sc, &sc->bge_intrhand);
24990f9bd73bSSam Leffler 
25000f9bd73bSSam Leffler 	if (error) {
2501fc74a9f9SBrooks Davis 		bge_detach(dev);
25020f9bd73bSSam Leffler 		printf("bge%d: couldn't set up irq\n", unit);
25030f9bd73bSSam Leffler 	}
250495d67482SBill Paul 
250595d67482SBill Paul fail:
250695d67482SBill Paul 	return(error);
250795d67482SBill Paul }
250895d67482SBill Paul 
250995d67482SBill Paul static int
251095d67482SBill Paul bge_detach(dev)
251195d67482SBill Paul 	device_t dev;
251295d67482SBill Paul {
251395d67482SBill Paul 	struct bge_softc *sc;
251495d67482SBill Paul 	struct ifnet *ifp;
251595d67482SBill Paul 
251695d67482SBill Paul 	sc = device_get_softc(dev);
2517fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
251895d67482SBill Paul 
25190f9bd73bSSam Leffler 	BGE_LOCK(sc);
252095d67482SBill Paul 	bge_stop(sc);
252195d67482SBill Paul 	bge_reset(sc);
25220f9bd73bSSam Leffler 	BGE_UNLOCK(sc);
25230f9bd73bSSam Leffler 
25240f9bd73bSSam Leffler 	ether_ifdetach(ifp);
2525fc74a9f9SBrooks Davis 	if_free(ifp);
252695d67482SBill Paul 
252795d67482SBill Paul 	if (sc->bge_tbi) {
252895d67482SBill Paul 		ifmedia_removeall(&sc->bge_ifmedia);
252995d67482SBill Paul 	} else {
253095d67482SBill Paul 		bus_generic_detach(dev);
253195d67482SBill Paul 		device_delete_child(dev, sc->bge_miibus);
253295d67482SBill Paul 	}
253395d67482SBill Paul 
253495d67482SBill Paul 	bge_release_resources(sc);
25355dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
2536e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
253795d67482SBill Paul 		bge_free_jumbo_mem(sc);
253895d67482SBill Paul 
253995d67482SBill Paul 	return(0);
254095d67482SBill Paul }
254195d67482SBill Paul 
254295d67482SBill Paul static void
254395d67482SBill Paul bge_release_resources(sc)
254495d67482SBill Paul 	struct bge_softc *sc;
254595d67482SBill Paul {
254695d67482SBill Paul 	device_t dev;
254795d67482SBill Paul 
254895d67482SBill Paul 	dev = sc->bge_dev;
254995d67482SBill Paul 
255095d67482SBill Paul 	if (sc->bge_vpd_prodname != NULL)
255195d67482SBill Paul 		free(sc->bge_vpd_prodname, M_DEVBUF);
255295d67482SBill Paul 
255395d67482SBill Paul 	if (sc->bge_vpd_readonly != NULL)
255495d67482SBill Paul 		free(sc->bge_vpd_readonly, M_DEVBUF);
255595d67482SBill Paul 
255695d67482SBill Paul 	if (sc->bge_intrhand != NULL)
255795d67482SBill Paul 		bus_teardown_intr(dev, sc->bge_irq, sc->bge_intrhand);
255895d67482SBill Paul 
255995d67482SBill Paul 	if (sc->bge_irq != NULL)
256095d67482SBill Paul 		bus_release_resource(dev, SYS_RES_IRQ, 0, sc->bge_irq);
256195d67482SBill Paul 
256295d67482SBill Paul 	if (sc->bge_res != NULL)
256395d67482SBill Paul 		bus_release_resource(dev, SYS_RES_MEMORY,
256495d67482SBill Paul 		    BGE_PCI_BAR0, sc->bge_res);
256595d67482SBill Paul 
2566f41ac2beSBill Paul 	bge_dma_free(sc);
256795d67482SBill Paul 
25680f9bd73bSSam Leffler 	if (mtx_initialized(&sc->bge_mtx))	/* XXX */
25690f9bd73bSSam Leffler 		BGE_LOCK_DESTROY(sc);
25700f9bd73bSSam Leffler 
257195d67482SBill Paul 	return;
257295d67482SBill Paul }
257395d67482SBill Paul 
257495d67482SBill Paul static void
257595d67482SBill Paul bge_reset(sc)
257695d67482SBill Paul 	struct bge_softc *sc;
257795d67482SBill Paul {
257895d67482SBill Paul 	device_t dev;
2579e53d81eeSPaul Saab 	u_int32_t cachesize, command, pcistate, reset;
258095d67482SBill Paul 	int i, val = 0;
258195d67482SBill Paul 
258295d67482SBill Paul 	dev = sc->bge_dev;
258395d67482SBill Paul 
258495d67482SBill Paul 	/* Save some important PCI state. */
258595d67482SBill Paul 	cachesize = pci_read_config(dev, BGE_PCI_CACHESZ, 4);
258695d67482SBill Paul 	command = pci_read_config(dev, BGE_PCI_CMD, 4);
258795d67482SBill Paul 	pcistate = pci_read_config(dev, BGE_PCI_PCISTATE, 4);
258895d67482SBill Paul 
258995d67482SBill Paul 	pci_write_config(dev, BGE_PCI_MISC_CTL,
259095d67482SBill Paul 	    BGE_PCIMISCCTL_INDIRECT_ACCESS|BGE_PCIMISCCTL_MASK_PCI_INTR|
259195d67482SBill Paul 	    BGE_PCIMISCCTL_ENDIAN_WORDSWAP|BGE_PCIMISCCTL_PCISTATE_RW, 4);
259295d67482SBill Paul 
2593e53d81eeSPaul Saab 	reset = BGE_MISCCFG_RESET_CORE_CLOCKS|(65<<1);
2594e53d81eeSPaul Saab 
2595e53d81eeSPaul Saab 	/* XXX: Broadcom Linux driver. */
2596e53d81eeSPaul Saab 	if (sc->bge_pcie) {
2597e53d81eeSPaul Saab 		if (CSR_READ_4(sc, 0x7e2c) == 0x60)	/* PCIE 1.0 */
2598e53d81eeSPaul Saab 			CSR_WRITE_4(sc, 0x7e2c, 0x20);
2599e53d81eeSPaul Saab 		if (sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
2600e53d81eeSPaul Saab 			/* Prevent PCIE link training during global reset */
2601e53d81eeSPaul Saab 			CSR_WRITE_4(sc, BGE_MISC_CFG, (1<<29));
2602e53d81eeSPaul Saab 			reset |= (1<<29);
2603e53d81eeSPaul Saab 		}
2604e53d81eeSPaul Saab 	}
2605e53d81eeSPaul Saab 
260695d67482SBill Paul 	/* Issue global reset */
2607e53d81eeSPaul Saab 	bge_writereg_ind(sc, BGE_MISC_CFG, reset);
260895d67482SBill Paul 
260995d67482SBill Paul 	DELAY(1000);
261095d67482SBill Paul 
2611e53d81eeSPaul Saab 	/* XXX: Broadcom Linux driver. */
2612e53d81eeSPaul Saab 	if (sc->bge_pcie) {
2613e53d81eeSPaul Saab 		if (sc->bge_chipid == BGE_CHIPID_BCM5750_A0) {
2614e53d81eeSPaul Saab 			uint32_t v;
2615e53d81eeSPaul Saab 
2616e53d81eeSPaul Saab 			DELAY(500000); /* wait for link training to complete */
2617e53d81eeSPaul Saab 			v = pci_read_config(dev, 0xc4, 4);
2618e53d81eeSPaul Saab 			pci_write_config(dev, 0xc4, v | (1<<15), 4);
2619e53d81eeSPaul Saab 		}
2620e53d81eeSPaul Saab 		/* Set PCIE max payload size and clear error status. */
2621e53d81eeSPaul Saab 		pci_write_config(dev, 0xd8, 0xf5000, 4);
2622e53d81eeSPaul Saab 	}
2623e53d81eeSPaul Saab 
262495d67482SBill Paul 	/* Reset some of the PCI state that got zapped by reset */
262595d67482SBill Paul 	pci_write_config(dev, BGE_PCI_MISC_CTL,
262695d67482SBill Paul 	    BGE_PCIMISCCTL_INDIRECT_ACCESS|BGE_PCIMISCCTL_MASK_PCI_INTR|
262795d67482SBill Paul 	    BGE_PCIMISCCTL_ENDIAN_WORDSWAP|BGE_PCIMISCCTL_PCISTATE_RW, 4);
262895d67482SBill Paul 	pci_write_config(dev, BGE_PCI_CACHESZ, cachesize, 4);
262995d67482SBill Paul 	pci_write_config(dev, BGE_PCI_CMD, command, 4);
263095d67482SBill Paul 	bge_writereg_ind(sc, BGE_MISC_CFG, (65 << 1));
263195d67482SBill Paul 
2632a7b0c314SPaul Saab 	/* Enable memory arbiter. */
26335dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
2634e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
2635a7b0c314SPaul Saab 		CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
2636a7b0c314SPaul Saab 
263795d67482SBill Paul 	/*
263895d67482SBill Paul 	 * Prevent PXE restart: write a magic number to the
263995d67482SBill Paul 	 * general communications memory at 0xB50.
264095d67482SBill Paul 	 */
264195d67482SBill Paul 	bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER);
264295d67482SBill Paul 	/*
264395d67482SBill Paul 	 * Poll the value location we just wrote until
264495d67482SBill Paul 	 * we see the 1's complement of the magic number.
264595d67482SBill Paul 	 * This indicates that the firmware initialization
264695d67482SBill Paul 	 * is complete.
264795d67482SBill Paul 	 */
264895d67482SBill Paul 	for (i = 0; i < BGE_TIMEOUT; i++) {
264995d67482SBill Paul 		val = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM);
265095d67482SBill Paul 		if (val == ~BGE_MAGIC_NUMBER)
265195d67482SBill Paul 			break;
265295d67482SBill Paul 		DELAY(10);
265395d67482SBill Paul 	}
265495d67482SBill Paul 
265595d67482SBill Paul 	if (i == BGE_TIMEOUT) {
265695d67482SBill Paul 		printf("bge%d: firmware handshake timed out\n", sc->bge_unit);
265795d67482SBill Paul 		return;
265895d67482SBill Paul 	}
265995d67482SBill Paul 
266095d67482SBill Paul 	/*
266195d67482SBill Paul 	 * XXX Wait for the value of the PCISTATE register to
266295d67482SBill Paul 	 * return to its original pre-reset state. This is a
266395d67482SBill Paul 	 * fairly good indicator of reset completion. If we don't
266495d67482SBill Paul 	 * wait for the reset to fully complete, trying to read
266595d67482SBill Paul 	 * from the device's non-PCI registers may yield garbage
266695d67482SBill Paul 	 * results.
266795d67482SBill Paul 	 */
266895d67482SBill Paul 	for (i = 0; i < BGE_TIMEOUT; i++) {
266995d67482SBill Paul 		if (pci_read_config(dev, BGE_PCI_PCISTATE, 4) == pcistate)
267095d67482SBill Paul 			break;
267195d67482SBill Paul 		DELAY(10);
267295d67482SBill Paul 	}
267395d67482SBill Paul 
267495d67482SBill Paul 	/* Fix up byte swapping */
267595d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_MODECTL_BYTESWAP_NONFRAME|
267695d67482SBill Paul 	    BGE_MODECTL_BYTESWAP_DATA);
267795d67482SBill Paul 
267895d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MAC_MODE, 0);
267995d67482SBill Paul 
2680da3003f0SBill Paul 	/*
2681da3003f0SBill Paul 	 * The 5704 in TBI mode apparently needs some special
2682da3003f0SBill Paul 	 * adjustment to insure the SERDES drive level is set
2683da3003f0SBill Paul 	 * to 1.2V.
2684da3003f0SBill Paul 	 */
2685da3003f0SBill Paul 	if (sc->bge_asicrev == BGE_ASICREV_BCM5704 && sc->bge_tbi) {
2686da3003f0SBill Paul 		uint32_t serdescfg;
2687da3003f0SBill Paul 		serdescfg = CSR_READ_4(sc, BGE_SERDES_CFG);
2688da3003f0SBill Paul 		serdescfg = (serdescfg & ~0xFFF) | 0x880;
2689da3003f0SBill Paul 		CSR_WRITE_4(sc, BGE_SERDES_CFG, serdescfg);
2690da3003f0SBill Paul 	}
2691da3003f0SBill Paul 
2692e53d81eeSPaul Saab 	/* XXX: Broadcom Linux driver. */
2693e53d81eeSPaul Saab 	if (sc->bge_pcie && sc->bge_chipid != BGE_CHIPID_BCM5750_A0) {
2694e53d81eeSPaul Saab 		uint32_t v;
2695e53d81eeSPaul Saab 
2696e53d81eeSPaul Saab 		v = CSR_READ_4(sc, 0x7c00);
2697e53d81eeSPaul Saab 		CSR_WRITE_4(sc, 0x7c00, v | (1<<25));
2698e53d81eeSPaul Saab 	}
269995d67482SBill Paul 	DELAY(10000);
270095d67482SBill Paul 
270195d67482SBill Paul 	return;
270295d67482SBill Paul }
270395d67482SBill Paul 
270495d67482SBill Paul /*
270595d67482SBill Paul  * Frame reception handling. This is called if there's a frame
270695d67482SBill Paul  * on the receive return list.
270795d67482SBill Paul  *
270895d67482SBill Paul  * Note: we have to be able to handle two possibilities here:
270995d67482SBill Paul  * 1) the frame is from the jumbo recieve ring
271095d67482SBill Paul  * 2) the frame is from the standard receive ring
271195d67482SBill Paul  */
271295d67482SBill Paul 
271395d67482SBill Paul static void
271495d67482SBill Paul bge_rxeof(sc)
271595d67482SBill Paul 	struct bge_softc *sc;
271695d67482SBill Paul {
271795d67482SBill Paul 	struct ifnet *ifp;
271895d67482SBill Paul 	int stdcnt = 0, jumbocnt = 0;
271995d67482SBill Paul 
27200f9bd73bSSam Leffler 	BGE_LOCK_ASSERT(sc);
27210f9bd73bSSam Leffler 
2722fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
272395d67482SBill Paul 
2724f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_rx_return_ring_tag,
2725f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_return_ring_map, BUS_DMASYNC_POSTWRITE);
2726f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
2727f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_POSTREAD);
27285dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
2729e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
2730f41ac2beSBill Paul 		bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
2731f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_jumbo_ring_map,
2732f41ac2beSBill Paul 		    BUS_DMASYNC_POSTREAD);
2733f41ac2beSBill Paul 	}
2734f41ac2beSBill Paul 
273595d67482SBill Paul 	while(sc->bge_rx_saved_considx !=
2736f41ac2beSBill Paul 	    sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx) {
273795d67482SBill Paul 		struct bge_rx_bd	*cur_rx;
273895d67482SBill Paul 		u_int32_t		rxidx;
273995d67482SBill Paul 		struct ether_header	*eh;
274095d67482SBill Paul 		struct mbuf		*m = NULL;
274195d67482SBill Paul 		u_int16_t		vlan_tag = 0;
274295d67482SBill Paul 		int			have_tag = 0;
274395d67482SBill Paul 
274495d67482SBill Paul 		cur_rx =
2745f41ac2beSBill Paul 	    &sc->bge_ldata.bge_rx_return_ring[sc->bge_rx_saved_considx];
274695d67482SBill Paul 
274795d67482SBill Paul 		rxidx = cur_rx->bge_idx;
27480434d1b8SBill Paul 		BGE_INC(sc->bge_rx_saved_considx, sc->bge_return_ring_cnt);
274995d67482SBill Paul 
275095d67482SBill Paul 		if (cur_rx->bge_flags & BGE_RXBDFLAG_VLAN_TAG) {
275195d67482SBill Paul 			have_tag = 1;
275295d67482SBill Paul 			vlan_tag = cur_rx->bge_vlan_tag;
275395d67482SBill Paul 		}
275495d67482SBill Paul 
275595d67482SBill Paul 		if (cur_rx->bge_flags & BGE_RXBDFLAG_JUMBO_RING) {
275695d67482SBill Paul 			BGE_INC(sc->bge_jumbo, BGE_JUMBO_RX_RING_CNT);
2757f41ac2beSBill Paul 			bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo,
2758f41ac2beSBill Paul 			    sc->bge_cdata.bge_rx_jumbo_dmamap[rxidx],
2759f41ac2beSBill Paul 			    BUS_DMASYNC_POSTREAD);
2760f41ac2beSBill Paul 			bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo,
2761f41ac2beSBill Paul 			    sc->bge_cdata.bge_rx_jumbo_dmamap[rxidx]);
276295d67482SBill Paul 			m = sc->bge_cdata.bge_rx_jumbo_chain[rxidx];
276395d67482SBill Paul 			sc->bge_cdata.bge_rx_jumbo_chain[rxidx] = NULL;
276495d67482SBill Paul 			jumbocnt++;
276595d67482SBill Paul 			if (cur_rx->bge_flags & BGE_RXBDFLAG_ERROR) {
276695d67482SBill Paul 				ifp->if_ierrors++;
276795d67482SBill Paul 				bge_newbuf_jumbo(sc, sc->bge_jumbo, m);
276895d67482SBill Paul 				continue;
276995d67482SBill Paul 			}
277095d67482SBill Paul 			if (bge_newbuf_jumbo(sc,
277195d67482SBill Paul 			    sc->bge_jumbo, NULL) == ENOBUFS) {
277295d67482SBill Paul 				ifp->if_ierrors++;
277395d67482SBill Paul 				bge_newbuf_jumbo(sc, sc->bge_jumbo, m);
277495d67482SBill Paul 				continue;
277595d67482SBill Paul 			}
277695d67482SBill Paul 		} else {
277795d67482SBill Paul 			BGE_INC(sc->bge_std, BGE_STD_RX_RING_CNT);
2778f41ac2beSBill Paul 			bus_dmamap_sync(sc->bge_cdata.bge_mtag,
2779f41ac2beSBill Paul 			    sc->bge_cdata.bge_rx_std_dmamap[rxidx],
2780f41ac2beSBill Paul 			    BUS_DMASYNC_POSTREAD);
2781f41ac2beSBill Paul 			bus_dmamap_unload(sc->bge_cdata.bge_mtag,
2782f41ac2beSBill Paul 			    sc->bge_cdata.bge_rx_std_dmamap[rxidx]);
278395d67482SBill Paul 			m = sc->bge_cdata.bge_rx_std_chain[rxidx];
278495d67482SBill Paul 			sc->bge_cdata.bge_rx_std_chain[rxidx] = NULL;
278595d67482SBill Paul 			stdcnt++;
278695d67482SBill Paul 			if (cur_rx->bge_flags & BGE_RXBDFLAG_ERROR) {
278795d67482SBill Paul 				ifp->if_ierrors++;
278895d67482SBill Paul 				bge_newbuf_std(sc, sc->bge_std, m);
278995d67482SBill Paul 				continue;
279095d67482SBill Paul 			}
279195d67482SBill Paul 			if (bge_newbuf_std(sc, sc->bge_std,
279295d67482SBill Paul 			    NULL) == ENOBUFS) {
279395d67482SBill Paul 				ifp->if_ierrors++;
279495d67482SBill Paul 				bge_newbuf_std(sc, sc->bge_std, m);
279595d67482SBill Paul 				continue;
279695d67482SBill Paul 			}
279795d67482SBill Paul 		}
279895d67482SBill Paul 
279995d67482SBill Paul 		ifp->if_ipackets++;
2800e255b776SJohn Polstra #ifndef __i386__
2801e255b776SJohn Polstra 		/*
2802e255b776SJohn Polstra 		 * The i386 allows unaligned accesses, but for other
2803e255b776SJohn Polstra 		 * platforms we must make sure the payload is aligned.
2804e255b776SJohn Polstra 		 */
2805e255b776SJohn Polstra 		if (sc->bge_rx_alignment_bug) {
2806e255b776SJohn Polstra 			bcopy(m->m_data, m->m_data + ETHER_ALIGN,
2807e255b776SJohn Polstra 			    cur_rx->bge_len);
2808e255b776SJohn Polstra 			m->m_data += ETHER_ALIGN;
2809e255b776SJohn Polstra 		}
2810e255b776SJohn Polstra #endif
281195d67482SBill Paul 		eh = mtod(m, struct ether_header *);
2812473851baSPaul Saab 		m->m_pkthdr.len = m->m_len = cur_rx->bge_len - ETHER_CRC_LEN;
281395d67482SBill Paul 		m->m_pkthdr.rcvif = ifp;
281495d67482SBill Paul 
2815eb48892eSDavid Greenman #if 0 /* currently broken for some packets, possibly related to TCP options */
2816b874fdd4SYaroslav Tykhiy 		if (ifp->if_capenable & IFCAP_RXCSUM) {
281795d67482SBill Paul 			m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED;
281895d67482SBill Paul 			if ((cur_rx->bge_ip_csum ^ 0xffff) == 0)
281995d67482SBill Paul 				m->m_pkthdr.csum_flags |= CSUM_IP_VALID;
282095d67482SBill Paul 			if (cur_rx->bge_flags & BGE_RXBDFLAG_TCP_UDP_CSUM) {
282195d67482SBill Paul 				m->m_pkthdr.csum_data =
282295d67482SBill Paul 				    cur_rx->bge_tcp_udp_csum;
28230189c944SBill Paul 				m->m_pkthdr.csum_flags |= CSUM_DATA_VALID;
282495d67482SBill Paul 			}
282595d67482SBill Paul 		}
2826eb48892eSDavid Greenman #endif
282795d67482SBill Paul 
282895d67482SBill Paul 		/*
2829673d9191SSam Leffler 		 * If we received a packet with a vlan tag,
2830673d9191SSam Leffler 		 * attach that information to the packet.
283195d67482SBill Paul 		 */
2832673d9191SSam Leffler 		if (have_tag)
2833673d9191SSam Leffler 			VLAN_INPUT_TAG(ifp, m, vlan_tag, continue);
283495d67482SBill Paul 
28350f9bd73bSSam Leffler 		BGE_UNLOCK(sc);
2836673d9191SSam Leffler 		(*ifp->if_input)(ifp, m);
28370f9bd73bSSam Leffler 		BGE_LOCK(sc);
283895d67482SBill Paul 	}
283995d67482SBill Paul 
2840f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_rx_return_ring_tag,
2841f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_return_ring_map, BUS_DMASYNC_PREWRITE);
2842f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag,
2843f41ac2beSBill Paul 	    sc->bge_cdata.bge_rx_std_ring_map,
2844f41ac2beSBill Paul 	    BUS_DMASYNC_POSTREAD|BUS_DMASYNC_PREWRITE);
28455dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
2846e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
2847f41ac2beSBill Paul 		bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag,
2848f41ac2beSBill Paul 		    sc->bge_cdata.bge_rx_jumbo_ring_map,
2849f41ac2beSBill Paul 		    BUS_DMASYNC_PREREAD|BUS_DMASYNC_PREWRITE);
2850f41ac2beSBill Paul 	}
2851f41ac2beSBill Paul 
285295d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO, sc->bge_rx_saved_considx);
285395d67482SBill Paul 	if (stdcnt)
285495d67482SBill Paul 		CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std);
285595d67482SBill Paul 	if (jumbocnt)
285695d67482SBill Paul 		CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo);
285795d67482SBill Paul 
285895d67482SBill Paul 	return;
285995d67482SBill Paul }
286095d67482SBill Paul 
286195d67482SBill Paul static void
286295d67482SBill Paul bge_txeof(sc)
286395d67482SBill Paul 	struct bge_softc *sc;
286495d67482SBill Paul {
286595d67482SBill Paul 	struct bge_tx_bd *cur_tx = NULL;
286695d67482SBill Paul 	struct ifnet *ifp;
286795d67482SBill Paul 
28680f9bd73bSSam Leffler 	BGE_LOCK_ASSERT(sc);
28690f9bd73bSSam Leffler 
2870fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
287195d67482SBill Paul 
287295d67482SBill Paul 	/*
287395d67482SBill Paul 	 * Go through our tx ring and free mbufs for those
287495d67482SBill Paul 	 * frames that have been sent.
287595d67482SBill Paul 	 */
287695d67482SBill Paul 	while (sc->bge_tx_saved_considx !=
2877f41ac2beSBill Paul 	    sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx) {
287895d67482SBill Paul 		u_int32_t		idx = 0;
287995d67482SBill Paul 
288095d67482SBill Paul 		idx = sc->bge_tx_saved_considx;
2881f41ac2beSBill Paul 		cur_tx = &sc->bge_ldata.bge_tx_ring[idx];
288295d67482SBill Paul 		if (cur_tx->bge_flags & BGE_TXBDFLAG_END)
288395d67482SBill Paul 			ifp->if_opackets++;
288495d67482SBill Paul 		if (sc->bge_cdata.bge_tx_chain[idx] != NULL) {
288595d67482SBill Paul 			m_freem(sc->bge_cdata.bge_tx_chain[idx]);
288695d67482SBill Paul 			sc->bge_cdata.bge_tx_chain[idx] = NULL;
2887f41ac2beSBill Paul 			bus_dmamap_unload(sc->bge_cdata.bge_mtag,
2888f41ac2beSBill Paul 			    sc->bge_cdata.bge_tx_dmamap[idx]);
288995d67482SBill Paul 		}
289095d67482SBill Paul 		sc->bge_txcnt--;
289195d67482SBill Paul 		BGE_INC(sc->bge_tx_saved_considx, BGE_TX_RING_CNT);
289295d67482SBill Paul 		ifp->if_timer = 0;
289395d67482SBill Paul 	}
289495d67482SBill Paul 
289595d67482SBill Paul 	if (cur_tx != NULL)
289695d67482SBill Paul 		ifp->if_flags &= ~IFF_OACTIVE;
289795d67482SBill Paul 
289895d67482SBill Paul 	return;
289995d67482SBill Paul }
290095d67482SBill Paul 
290195d67482SBill Paul static void
290295d67482SBill Paul bge_intr(xsc)
290395d67482SBill Paul 	void *xsc;
290495d67482SBill Paul {
290595d67482SBill Paul 	struct bge_softc *sc;
290695d67482SBill Paul 	struct ifnet *ifp;
2907487a8c7eSPaul Saab 	u_int32_t statusword;
2908dc961de0SBill Paul 	u_int32_t status, mimode;
290995d67482SBill Paul 
291095d67482SBill Paul 	sc = xsc;
2911fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
2912f41ac2beSBill Paul 
29130f9bd73bSSam Leffler 	BGE_LOCK(sc);
29140f9bd73bSSam Leffler 
2915f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
2916f41ac2beSBill Paul 	    sc->bge_cdata.bge_status_map, BUS_DMASYNC_POSTWRITE);
2917f41ac2beSBill Paul 
2918487a8c7eSPaul Saab 	statusword =
2919f41ac2beSBill Paul 	    atomic_readandclear_32(&sc->bge_ldata.bge_status_block->bge_status);
292095d67482SBill Paul 
292195d67482SBill Paul #ifdef notdef
292295d67482SBill Paul 	/* Avoid this for now -- checking this register is expensive. */
292395d67482SBill Paul 	/* Make sure this is really our interrupt. */
292495d67482SBill Paul 	if (!(CSR_READ_4(sc, BGE_MISC_LOCAL_CTL) & BGE_MLC_INTR_STATE))
292595d67482SBill Paul 		return;
292695d67482SBill Paul #endif
292795d67482SBill Paul 	/* Ack interrupt and stop others from occuring. */
292895d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1);
292995d67482SBill Paul 
2930a1d52896SBill Paul 	/*
2931a1d52896SBill Paul 	 * Process link state changes.
2932a1d52896SBill Paul 	 * Grrr. The link status word in the status block does
2933a1d52896SBill Paul 	 * not work correctly on the BCM5700 rev AX and BX chips,
29346034c701SChristian Brueffer 	 * according to all available information. Hence, we have
2935a1d52896SBill Paul 	 * to enable MII interrupts in order to properly obtain
2936a1d52896SBill Paul 	 * async link changes. Unfortunately, this also means that
2937a1d52896SBill Paul 	 * we have to read the MAC status register to detect link
2938a1d52896SBill Paul 	 * changes, thereby adding an additional register access to
2939a1d52896SBill Paul 	 * the interrupt handler.
2940a1d52896SBill Paul 	 */
2941a1d52896SBill Paul 
2942e0ced696SPaul Saab 	if (sc->bge_asicrev == BGE_ASICREV_BCM5700) {
2943a1d52896SBill Paul 
2944a1d52896SBill Paul 		status = CSR_READ_4(sc, BGE_MAC_STS);
2945a1d52896SBill Paul 		if (status & BGE_MACSTAT_MI_INTERRUPT) {
294695d67482SBill Paul 			sc->bge_link = 0;
29470f9bd73bSSam Leffler 			callout_stop(&sc->bge_stat_ch);
29480f9bd73bSSam Leffler 			bge_tick_locked(sc);
2949a1d52896SBill Paul 			/* Clear the interrupt */
2950a1d52896SBill Paul 			CSR_WRITE_4(sc, BGE_MAC_EVT_ENB,
2951a1d52896SBill Paul 			    BGE_EVTENB_MI_INTERRUPT);
2952a1d52896SBill Paul 			bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR);
2953a1d52896SBill Paul 			bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR,
2954a1d52896SBill Paul 			    BRGPHY_INTRS);
295598b28ee5SBill Paul 		}
2956a1d52896SBill Paul 	} else {
2957487a8c7eSPaul Saab 		if (statusword & BGE_STATFLAG_LINKSTATE_CHANGED) {
295822606b20SBill Paul 			/*
295922606b20SBill Paul 			 * Sometimes PCS encoding errors are detected in
296022606b20SBill Paul 			 * TBI mode (on fiber NICs), and for some reason
296122606b20SBill Paul 			 * the chip will signal them as link changes.
296222606b20SBill Paul 			 * If we get a link change event, but the 'PCS
296322606b20SBill Paul 			 * encoding error' bit in the MAC status register
296422606b20SBill Paul 			 * is set, don't bother doing a link check.
296522606b20SBill Paul 			 * This avoids spurious "gigabit link up" messages
296622606b20SBill Paul 			 * that sometimes appear on fiber NICs during
296722606b20SBill Paul 			 * periods of heavy traffic. (There should be no
296822606b20SBill Paul 			 * effect on copper NICs.)
2969dc961de0SBill Paul 			 *
2970dc961de0SBill Paul 			 * If we do have a copper NIC (bge_tbi == 0) then
2971dc961de0SBill Paul 			 * check that the AUTOPOLL bit is set before
2972dc961de0SBill Paul 			 * processing the event as a real link change.
2973dc961de0SBill Paul 			 * Turning AUTOPOLL on and off in the MII read/write
2974dc961de0SBill Paul 			 * functions will often trigger a link status
2975dc961de0SBill Paul 			 * interrupt for no reason.
297622606b20SBill Paul 			 */
297722606b20SBill Paul 			status = CSR_READ_4(sc, BGE_MAC_STS);
2978dc961de0SBill Paul 			mimode = CSR_READ_4(sc, BGE_MI_MODE);
2979ca3f4fd0SBill Paul 			if (!(status & (BGE_MACSTAT_PORT_DECODE_ERROR|
2980dc961de0SBill Paul 			    BGE_MACSTAT_MI_COMPLETE)) && (!sc->bge_tbi &&
2981dc961de0SBill Paul 			    (mimode & BGE_MIMODE_AUTOPOLL))) {
2982a1d52896SBill Paul 				sc->bge_link = 0;
29830f9bd73bSSam Leffler 				callout_stop(&sc->bge_stat_ch);
29840f9bd73bSSam Leffler 				bge_tick_locked(sc);
298522606b20SBill Paul 			}
2986a1d52896SBill Paul 			/* Clear the interrupt */
298795d67482SBill Paul 			CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED|
29880434d1b8SBill Paul 			    BGE_MACSTAT_CFG_CHANGED|BGE_MACSTAT_MI_COMPLETE|
29890434d1b8SBill Paul 			    BGE_MACSTAT_LINK_CHANGED);
299037ceeb4dSPaul Saab 
299137ceeb4dSPaul Saab 			/* Force flush the status block cached by PCI bridge */
299237ceeb4dSPaul Saab 			CSR_READ_4(sc, BGE_MBX_IRQ0_LO);
2993a1d52896SBill Paul 		}
299495d67482SBill Paul 	}
299595d67482SBill Paul 
299695d67482SBill Paul 	if (ifp->if_flags & IFF_RUNNING) {
299795d67482SBill Paul 		/* Check RX return ring producer/consumer */
299895d67482SBill Paul 		bge_rxeof(sc);
299995d67482SBill Paul 
300095d67482SBill Paul 		/* Check TX ring producer/consumer */
300195d67482SBill Paul 		bge_txeof(sc);
300295d67482SBill Paul 	}
300395d67482SBill Paul 
3004f41ac2beSBill Paul 	bus_dmamap_sync(sc->bge_cdata.bge_status_tag,
3005f41ac2beSBill Paul 	    sc->bge_cdata.bge_status_map, BUS_DMASYNC_PREWRITE);
3006f41ac2beSBill Paul 
300795d67482SBill Paul 	bge_handle_events(sc);
300895d67482SBill Paul 
300995d67482SBill Paul 	/* Re-enable interrupts. */
301095d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 0);
301195d67482SBill Paul 
30124d665c4dSDag-Erling Smørgrav 	if (ifp->if_flags & IFF_RUNNING && !IFQ_DRV_IS_EMPTY(&ifp->if_snd))
30130f9bd73bSSam Leffler 		bge_start_locked(ifp);
30140f9bd73bSSam Leffler 
30150f9bd73bSSam Leffler 	BGE_UNLOCK(sc);
301695d67482SBill Paul 
301795d67482SBill Paul 	return;
301895d67482SBill Paul }
301995d67482SBill Paul 
302095d67482SBill Paul static void
30210f9bd73bSSam Leffler bge_tick_locked(sc)
302295d67482SBill Paul 	struct bge_softc *sc;
30230f9bd73bSSam Leffler {
302495d67482SBill Paul 	struct mii_data *mii = NULL;
302595d67482SBill Paul 	struct ifmedia *ifm = NULL;
302695d67482SBill Paul 	struct ifnet *ifp;
302795d67482SBill Paul 
3028fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
302995d67482SBill Paul 
30300f9bd73bSSam Leffler 	BGE_LOCK_ASSERT(sc);
303195d67482SBill Paul 
3032e53d81eeSPaul Saab 	if (sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
3033e53d81eeSPaul Saab 	    sc->bge_asicrev == BGE_ASICREV_BCM5750)
30340434d1b8SBill Paul 		bge_stats_update_regs(sc);
30350434d1b8SBill Paul 	else
303695d67482SBill Paul 		bge_stats_update(sc);
30370f9bd73bSSam Leffler 	callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc);
30380f9bd73bSSam Leffler 	if (sc->bge_link)
303995d67482SBill Paul 		return;
304095d67482SBill Paul 
304195d67482SBill Paul 	if (sc->bge_tbi) {
304295d67482SBill Paul 		ifm = &sc->bge_ifmedia;
304395d67482SBill Paul 		if (CSR_READ_4(sc, BGE_MAC_STS) &
304495d67482SBill Paul 		    BGE_MACSTAT_TBI_PCS_SYNCHED) {
304595d67482SBill Paul 			sc->bge_link++;
3046da3003f0SBill Paul 			if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
3047da3003f0SBill Paul 				BGE_CLRBIT(sc, BGE_MAC_MODE,
3048da3003f0SBill Paul 				    BGE_MACMODE_TBI_SEND_CFGS);
304995d67482SBill Paul 			CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF);
3050649ce479SPoul-Henning Kamp 			if (bootverbose)
3051649ce479SPoul-Henning Kamp 				printf("bge%d: gigabit link up\n",
3052649ce479SPoul-Henning Kamp 				    sc->bge_unit);
30534d665c4dSDag-Erling Smørgrav 			if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
30540f9bd73bSSam Leffler 				bge_start_locked(ifp);
305595d67482SBill Paul 		}
305695d67482SBill Paul 		return;
305795d67482SBill Paul 	}
305895d67482SBill Paul 
305995d67482SBill Paul 	mii = device_get_softc(sc->bge_miibus);
306095d67482SBill Paul 	mii_tick(mii);
306195d67482SBill Paul 
3062b2561871SJonathan Lemon 	if (!sc->bge_link && mii->mii_media_status & IFM_ACTIVE &&
306395d67482SBill Paul 	    IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) {
306495d67482SBill Paul 		sc->bge_link++;
3065649ce479SPoul-Henning Kamp 		if ((IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T ||
3066649ce479SPoul-Henning Kamp 		    IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_SX) &&
3067649ce479SPoul-Henning Kamp 		    bootverbose)
3068649ce479SPoul-Henning Kamp 			printf("bge%d: gigabit link up\n", sc->bge_unit);
30694d665c4dSDag-Erling Smørgrav 		if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
30700f9bd73bSSam Leffler 			bge_start_locked(ifp);
307195d67482SBill Paul 	}
307295d67482SBill Paul 
307395d67482SBill Paul 	return;
307495d67482SBill Paul }
307595d67482SBill Paul 
307695d67482SBill Paul static void
30770f9bd73bSSam Leffler bge_tick(xsc)
30780f9bd73bSSam Leffler 	void *xsc;
30790f9bd73bSSam Leffler {
30800f9bd73bSSam Leffler 	struct bge_softc *sc;
30810f9bd73bSSam Leffler 
30820f9bd73bSSam Leffler 	sc = xsc;
30830f9bd73bSSam Leffler 
30840f9bd73bSSam Leffler 	BGE_LOCK(sc);
30850f9bd73bSSam Leffler 	bge_tick_locked(sc);
30860f9bd73bSSam Leffler 	BGE_UNLOCK(sc);
30870f9bd73bSSam Leffler }
30880f9bd73bSSam Leffler 
30890f9bd73bSSam Leffler static void
30900434d1b8SBill Paul bge_stats_update_regs(sc)
30910434d1b8SBill Paul 	struct bge_softc *sc;
30920434d1b8SBill Paul {
30930434d1b8SBill Paul 	struct ifnet *ifp;
30940434d1b8SBill Paul 	struct bge_mac_stats_regs stats;
30950434d1b8SBill Paul 	u_int32_t *s;
30960434d1b8SBill Paul 	int i;
30970434d1b8SBill Paul 
3098fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
30990434d1b8SBill Paul 
31000434d1b8SBill Paul 	s = (u_int32_t *)&stats;
31010434d1b8SBill Paul 	for (i = 0; i < sizeof(struct bge_mac_stats_regs); i += 4) {
31020434d1b8SBill Paul 		*s = CSR_READ_4(sc, BGE_RX_STATS + i);
31030434d1b8SBill Paul 		s++;
31040434d1b8SBill Paul 	}
31050434d1b8SBill Paul 
31060434d1b8SBill Paul 	ifp->if_collisions +=
31070434d1b8SBill Paul 	   (stats.dot3StatsSingleCollisionFrames +
31080434d1b8SBill Paul 	   stats.dot3StatsMultipleCollisionFrames +
31090434d1b8SBill Paul 	   stats.dot3StatsExcessiveCollisions +
31100434d1b8SBill Paul 	   stats.dot3StatsLateCollisions) -
31110434d1b8SBill Paul 	   ifp->if_collisions;
31120434d1b8SBill Paul 
31130434d1b8SBill Paul 	return;
31140434d1b8SBill Paul }
31150434d1b8SBill Paul 
31160434d1b8SBill Paul static void
311795d67482SBill Paul bge_stats_update(sc)
311895d67482SBill Paul 	struct bge_softc *sc;
311995d67482SBill Paul {
312095d67482SBill Paul 	struct ifnet *ifp;
312195d67482SBill Paul 	struct bge_stats *stats;
312295d67482SBill Paul 
3123fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
312495d67482SBill Paul 
312595d67482SBill Paul 	stats = (struct bge_stats *)(sc->bge_vhandle +
312695d67482SBill Paul 	    BGE_MEMWIN_START + BGE_STATS_BLOCK);
312795d67482SBill Paul 
312895d67482SBill Paul 	ifp->if_collisions +=
31290434d1b8SBill Paul 	   (stats->txstats.dot3StatsSingleCollisionFrames.bge_addr_lo +
31300434d1b8SBill Paul 	   stats->txstats.dot3StatsMultipleCollisionFrames.bge_addr_lo +
31310434d1b8SBill Paul 	   stats->txstats.dot3StatsExcessiveCollisions.bge_addr_lo +
31320434d1b8SBill Paul 	   stats->txstats.dot3StatsLateCollisions.bge_addr_lo) -
313395d67482SBill Paul 	   ifp->if_collisions;
313495d67482SBill Paul 
313595d67482SBill Paul #ifdef notdef
313695d67482SBill Paul 	ifp->if_collisions +=
313795d67482SBill Paul 	   (sc->bge_rdata->bge_info.bge_stats.dot3StatsSingleCollisionFrames +
313895d67482SBill Paul 	   sc->bge_rdata->bge_info.bge_stats.dot3StatsMultipleCollisionFrames +
313995d67482SBill Paul 	   sc->bge_rdata->bge_info.bge_stats.dot3StatsExcessiveCollisions +
314095d67482SBill Paul 	   sc->bge_rdata->bge_info.bge_stats.dot3StatsLateCollisions) -
314195d67482SBill Paul 	   ifp->if_collisions;
314295d67482SBill Paul #endif
314395d67482SBill Paul 
314495d67482SBill Paul 	return;
314595d67482SBill Paul }
314695d67482SBill Paul 
314795d67482SBill Paul /*
314895d67482SBill Paul  * Encapsulate an mbuf chain in the tx ring  by coupling the mbuf data
314995d67482SBill Paul  * pointers to descriptors.
315095d67482SBill Paul  */
315195d67482SBill Paul static int
315295d67482SBill Paul bge_encap(sc, m_head, txidx)
315395d67482SBill Paul 	struct bge_softc *sc;
315495d67482SBill Paul 	struct mbuf *m_head;
315595d67482SBill Paul 	u_int32_t *txidx;
315695d67482SBill Paul {
315795d67482SBill Paul 	struct bge_tx_bd	*f = NULL;
315895d67482SBill Paul 	u_int16_t		csum_flags = 0;
3159673d9191SSam Leffler 	struct m_tag		*mtag;
3160f41ac2beSBill Paul 	struct bge_dmamap_arg	ctx;
3161f41ac2beSBill Paul 	bus_dmamap_t		map;
3162f41ac2beSBill Paul 	int			error;
316395d67482SBill Paul 
316495d67482SBill Paul 
316595d67482SBill Paul 	if (m_head->m_pkthdr.csum_flags) {
316695d67482SBill Paul 		if (m_head->m_pkthdr.csum_flags & CSUM_IP)
316795d67482SBill Paul 			csum_flags |= BGE_TXBDFLAG_IP_CSUM;
316895d67482SBill Paul 		if (m_head->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP))
316995d67482SBill Paul 			csum_flags |= BGE_TXBDFLAG_TCP_UDP_CSUM;
317095d67482SBill Paul 		if (m_head->m_flags & M_LASTFRAG)
317195d67482SBill Paul 			csum_flags |= BGE_TXBDFLAG_IP_FRAG_END;
317295d67482SBill Paul 		else if (m_head->m_flags & M_FRAG)
317395d67482SBill Paul 			csum_flags |= BGE_TXBDFLAG_IP_FRAG;
317495d67482SBill Paul 	}
317595d67482SBill Paul 
3176fc74a9f9SBrooks Davis 	mtag = VLAN_OUTPUT_TAG(sc->bge_ifp, m_head);
3177673d9191SSam Leffler 
3178f41ac2beSBill Paul 	ctx.sc = sc;
3179f41ac2beSBill Paul 	ctx.bge_idx = *txidx;
3180f41ac2beSBill Paul 	ctx.bge_ring = sc->bge_ldata.bge_tx_ring;
3181f41ac2beSBill Paul 	ctx.bge_flags = csum_flags;
318295d67482SBill Paul 	/*
318395d67482SBill Paul 	 * Sanity check: avoid coming within 16 descriptors
318495d67482SBill Paul 	 * of the end of the ring.
318595d67482SBill Paul 	 */
3186f41ac2beSBill Paul 	ctx.bge_maxsegs = (BGE_TX_RING_CNT - sc->bge_txcnt) - 16;
3187f41ac2beSBill Paul 
3188f41ac2beSBill Paul 	map = sc->bge_cdata.bge_tx_dmamap[*txidx];
3189f41ac2beSBill Paul 	error = bus_dmamap_load_mbuf(sc->bge_cdata.bge_mtag, map,
3190f41ac2beSBill Paul 	    m_head, bge_dma_map_tx_desc, &ctx, BUS_DMA_NOWAIT);
3191f41ac2beSBill Paul 
3192f41ac2beSBill Paul 	if (error || ctx.bge_maxsegs == 0 /*||
3193f41ac2beSBill Paul 	    ctx.bge_idx == sc->bge_tx_saved_considx*/)
319495d67482SBill Paul 		return (ENOBUFS);
3195f41ac2beSBill Paul 
3196f41ac2beSBill Paul 	/*
3197f41ac2beSBill Paul 	 * Insure that the map for this transmission
3198f41ac2beSBill Paul 	 * is placed at the array index of the last descriptor
3199f41ac2beSBill Paul 	 * in this chain.
3200f41ac2beSBill Paul 	 */
3201f41ac2beSBill Paul 	sc->bge_cdata.bge_tx_dmamap[*txidx] =
3202f41ac2beSBill Paul 	    sc->bge_cdata.bge_tx_dmamap[ctx.bge_idx];
3203f41ac2beSBill Paul 	sc->bge_cdata.bge_tx_dmamap[ctx.bge_idx] = map;
3204f41ac2beSBill Paul 	sc->bge_cdata.bge_tx_chain[ctx.bge_idx] = m_head;
3205f41ac2beSBill Paul 	sc->bge_txcnt += ctx.bge_maxsegs;
3206f41ac2beSBill Paul 	f = &sc->bge_ldata.bge_tx_ring[*txidx];
3207f41ac2beSBill Paul 	if (mtag != NULL) {
3208f41ac2beSBill Paul 		f->bge_flags |= htole16(BGE_TXBDFLAG_VLAN_TAG);
3209f41ac2beSBill Paul 		f->bge_vlan_tag = htole16(VLAN_TAG_VALUE(mtag));
3210f41ac2beSBill Paul 	} else {
3211f41ac2beSBill Paul 		f->bge_vlan_tag = 0;
321295d67482SBill Paul 	}
321395d67482SBill Paul 
3214f41ac2beSBill Paul 	BGE_INC(ctx.bge_idx, BGE_TX_RING_CNT);
3215f41ac2beSBill Paul 	*txidx = ctx.bge_idx;
321695d67482SBill Paul 
321795d67482SBill Paul 	return(0);
321895d67482SBill Paul }
321995d67482SBill Paul 
322095d67482SBill Paul /*
322195d67482SBill Paul  * Main transmit routine. To avoid having to do mbuf copies, we put pointers
322295d67482SBill Paul  * to the mbuf data regions directly in the transmit descriptors.
322395d67482SBill Paul  */
322495d67482SBill Paul static void
32250f9bd73bSSam Leffler bge_start_locked(ifp)
322695d67482SBill Paul 	struct ifnet *ifp;
322795d67482SBill Paul {
322895d67482SBill Paul 	struct bge_softc *sc;
322995d67482SBill Paul 	struct mbuf *m_head = NULL;
323095d67482SBill Paul 	u_int32_t prodidx = 0;
3231303a718cSDag-Erling Smørgrav 	int count = 0;
323295d67482SBill Paul 
323395d67482SBill Paul 	sc = ifp->if_softc;
323495d67482SBill Paul 
32354d665c4dSDag-Erling Smørgrav 	if (!sc->bge_link && IFQ_DRV_IS_EMPTY(&ifp->if_snd))
323695d67482SBill Paul 		return;
323795d67482SBill Paul 
323895d67482SBill Paul 	prodidx = CSR_READ_4(sc, BGE_MBX_TX_HOST_PROD0_LO);
323995d67482SBill Paul 
324095d67482SBill Paul 	while(sc->bge_cdata.bge_tx_chain[prodidx] == NULL) {
32414d665c4dSDag-Erling Smørgrav 		IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head);
324295d67482SBill Paul 		if (m_head == NULL)
324395d67482SBill Paul 			break;
324495d67482SBill Paul 
324595d67482SBill Paul 		/*
324695d67482SBill Paul 		 * XXX
3247b874fdd4SYaroslav Tykhiy 		 * The code inside the if() block is never reached since we
3248b874fdd4SYaroslav Tykhiy 		 * must mark CSUM_IP_FRAGS in our if_hwassist to start getting
3249b874fdd4SYaroslav Tykhiy 		 * requests to checksum TCP/UDP in a fragmented packet.
3250b874fdd4SYaroslav Tykhiy 		 *
3251b874fdd4SYaroslav Tykhiy 		 * XXX
325295d67482SBill Paul 		 * safety overkill.  If this is a fragmented packet chain
325395d67482SBill Paul 		 * with delayed TCP/UDP checksums, then only encapsulate
325495d67482SBill Paul 		 * it if we have enough descriptors to handle the entire
325595d67482SBill Paul 		 * chain at once.
325695d67482SBill Paul 		 * (paranoia -- may not actually be needed)
325795d67482SBill Paul 		 */
325895d67482SBill Paul 		if (m_head->m_flags & M_FIRSTFRAG &&
325995d67482SBill Paul 		    m_head->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) {
326095d67482SBill Paul 			if ((BGE_TX_RING_CNT - sc->bge_txcnt) <
326195d67482SBill Paul 			    m_head->m_pkthdr.csum_data + 16) {
32624d665c4dSDag-Erling Smørgrav 				IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
326395d67482SBill Paul 				ifp->if_flags |= IFF_OACTIVE;
326495d67482SBill Paul 				break;
326595d67482SBill Paul 			}
326695d67482SBill Paul 		}
326795d67482SBill Paul 
326895d67482SBill Paul 		/*
326995d67482SBill Paul 		 * Pack the data into the transmit ring. If we
327095d67482SBill Paul 		 * don't have room, set the OACTIVE flag and wait
327195d67482SBill Paul 		 * for the NIC to drain the ring.
327295d67482SBill Paul 		 */
327395d67482SBill Paul 		if (bge_encap(sc, m_head, &prodidx)) {
32744d665c4dSDag-Erling Smørgrav 			IFQ_DRV_PREPEND(&ifp->if_snd, m_head);
327595d67482SBill Paul 			ifp->if_flags |= IFF_OACTIVE;
327695d67482SBill Paul 			break;
327795d67482SBill Paul 		}
3278303a718cSDag-Erling Smørgrav 		++count;
327995d67482SBill Paul 
328095d67482SBill Paul 		/*
328195d67482SBill Paul 		 * If there's a BPF listener, bounce a copy of this frame
328295d67482SBill Paul 		 * to him.
328395d67482SBill Paul 		 */
3284673d9191SSam Leffler 		BPF_MTAP(ifp, m_head);
328595d67482SBill Paul 	}
328695d67482SBill Paul 
3287303a718cSDag-Erling Smørgrav 	if (count == 0) {
3288303a718cSDag-Erling Smørgrav 		/* no packets were dequeued */
3289303a718cSDag-Erling Smørgrav 		return;
3290303a718cSDag-Erling Smørgrav 	}
3291303a718cSDag-Erling Smørgrav 
329295d67482SBill Paul 	/* Transmit */
329395d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, prodidx);
32943927098fSPaul Saab 	/* 5700 b2 errata */
3295e0ced696SPaul Saab 	if (sc->bge_chiprev == BGE_CHIPREV_5700_BX)
32963927098fSPaul Saab 		CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, prodidx);
329795d67482SBill Paul 
329895d67482SBill Paul 	/*
329995d67482SBill Paul 	 * Set a timeout in case the chip goes out to lunch.
330095d67482SBill Paul 	 */
330195d67482SBill Paul 	ifp->if_timer = 5;
330295d67482SBill Paul 
330395d67482SBill Paul 	return;
330495d67482SBill Paul }
330595d67482SBill Paul 
33060f9bd73bSSam Leffler /*
33070f9bd73bSSam Leffler  * Main transmit routine. To avoid having to do mbuf copies, we put pointers
33080f9bd73bSSam Leffler  * to the mbuf data regions directly in the transmit descriptors.
33090f9bd73bSSam Leffler  */
331095d67482SBill Paul static void
33110f9bd73bSSam Leffler bge_start(ifp)
33120f9bd73bSSam Leffler 	struct ifnet *ifp;
331395d67482SBill Paul {
33140f9bd73bSSam Leffler 	struct bge_softc *sc;
33150f9bd73bSSam Leffler 
33160f9bd73bSSam Leffler 	sc = ifp->if_softc;
33170f9bd73bSSam Leffler 	BGE_LOCK(sc);
33180f9bd73bSSam Leffler 	bge_start_locked(ifp);
33190f9bd73bSSam Leffler 	BGE_UNLOCK(sc);
33200f9bd73bSSam Leffler }
33210f9bd73bSSam Leffler 
33220f9bd73bSSam Leffler static void
33230f9bd73bSSam Leffler bge_init_locked(sc)
33240f9bd73bSSam Leffler 	struct bge_softc *sc;
33250f9bd73bSSam Leffler {
332695d67482SBill Paul 	struct ifnet *ifp;
332795d67482SBill Paul 	u_int16_t *m;
332895d67482SBill Paul 
33290f9bd73bSSam Leffler 	BGE_LOCK_ASSERT(sc);
333095d67482SBill Paul 
3331fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
333295d67482SBill Paul 
33330f9bd73bSSam Leffler 	if (ifp->if_flags & IFF_RUNNING)
333495d67482SBill Paul 		return;
333595d67482SBill Paul 
333695d67482SBill Paul 	/* Cancel pending I/O and flush buffers. */
333795d67482SBill Paul 	bge_stop(sc);
333895d67482SBill Paul 	bge_reset(sc);
333995d67482SBill Paul 	bge_chipinit(sc);
334095d67482SBill Paul 
334195d67482SBill Paul 	/*
334295d67482SBill Paul 	 * Init the various state machines, ring
334395d67482SBill Paul 	 * control blocks and firmware.
334495d67482SBill Paul 	 */
334595d67482SBill Paul 	if (bge_blockinit(sc)) {
334695d67482SBill Paul 		printf("bge%d: initialization failure\n", sc->bge_unit);
334795d67482SBill Paul 		return;
334895d67482SBill Paul 	}
334995d67482SBill Paul 
3350fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
335195d67482SBill Paul 
335295d67482SBill Paul 	/* Specify MTU. */
335395d67482SBill Paul 	CSR_WRITE_4(sc, BGE_RX_MTU, ifp->if_mtu +
3354859c6c7dSBill Paul 	    ETHER_HDR_LEN + ETHER_CRC_LEN + ETHER_VLAN_ENCAP_LEN);
335595d67482SBill Paul 
335695d67482SBill Paul 	/* Load our MAC address. */
3357fc74a9f9SBrooks Davis 	m = (u_int16_t *)&IFP2ENADDR(sc->bge_ifp)[0];
335895d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MAC_ADDR1_LO, htons(m[0]));
335995d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI, (htons(m[1]) << 16) | htons(m[2]));
336095d67482SBill Paul 
336195d67482SBill Paul 	/* Enable or disable promiscuous mode as needed. */
336295d67482SBill Paul 	if (ifp->if_flags & IFF_PROMISC) {
336395d67482SBill Paul 		BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_PROMISC);
336495d67482SBill Paul 	} else {
336595d67482SBill Paul 		BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_PROMISC);
336695d67482SBill Paul 	}
336795d67482SBill Paul 
336895d67482SBill Paul 	/* Program multicast filter. */
336995d67482SBill Paul 	bge_setmulti(sc);
337095d67482SBill Paul 
337195d67482SBill Paul 	/* Init RX ring. */
337295d67482SBill Paul 	bge_init_rx_ring_std(sc);
337395d67482SBill Paul 
33740434d1b8SBill Paul 	/*
33750434d1b8SBill Paul 	 * Workaround for a bug in 5705 ASIC rev A0. Poll the NIC's
33760434d1b8SBill Paul 	 * memory to insure that the chip has in fact read the first
33770434d1b8SBill Paul 	 * entry of the ring.
33780434d1b8SBill Paul 	 */
33790434d1b8SBill Paul 	if (sc->bge_chipid == BGE_CHIPID_BCM5705_A0) {
33800434d1b8SBill Paul 		u_int32_t		v, i;
33810434d1b8SBill Paul 		for (i = 0; i < 10; i++) {
33820434d1b8SBill Paul 			DELAY(20);
33830434d1b8SBill Paul 			v = bge_readmem_ind(sc, BGE_STD_RX_RINGS + 8);
33840434d1b8SBill Paul 			if (v == (MCLBYTES - ETHER_ALIGN))
33850434d1b8SBill Paul 				break;
33860434d1b8SBill Paul 		}
33870434d1b8SBill Paul 		if (i == 10)
33880434d1b8SBill Paul 			printf ("bge%d: 5705 A0 chip failed to load RX ring\n",
33890434d1b8SBill Paul 			    sc->bge_unit);
33900434d1b8SBill Paul 	}
33910434d1b8SBill Paul 
339295d67482SBill Paul 	/* Init jumbo RX ring. */
339395d67482SBill Paul 	if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN))
339495d67482SBill Paul 		bge_init_rx_ring_jumbo(sc);
339595d67482SBill Paul 
339695d67482SBill Paul 	/* Init our RX return ring index */
339795d67482SBill Paul 	sc->bge_rx_saved_considx = 0;
339895d67482SBill Paul 
339995d67482SBill Paul 	/* Init TX ring. */
340095d67482SBill Paul 	bge_init_tx_ring(sc);
340195d67482SBill Paul 
340295d67482SBill Paul 	/* Turn on transmitter */
340395d67482SBill Paul 	BGE_SETBIT(sc, BGE_TX_MODE, BGE_TXMODE_ENABLE);
340495d67482SBill Paul 
340595d67482SBill Paul 	/* Turn on receiver */
340695d67482SBill Paul 	BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE);
340795d67482SBill Paul 
340895d67482SBill Paul 	/* Tell firmware we're alive. */
340995d67482SBill Paul 	BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
341095d67482SBill Paul 
341195d67482SBill Paul 	/* Enable host interrupts. */
341295d67482SBill Paul 	BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_CLEAR_INTA);
341395d67482SBill Paul 	BGE_CLRBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR);
341495d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 0);
341595d67482SBill Paul 
341695d67482SBill Paul 	bge_ifmedia_upd(ifp);
341795d67482SBill Paul 
341895d67482SBill Paul 	ifp->if_flags |= IFF_RUNNING;
341995d67482SBill Paul 	ifp->if_flags &= ~IFF_OACTIVE;
342095d67482SBill Paul 
34210f9bd73bSSam Leffler 	callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc);
342295d67482SBill Paul 
34230f9bd73bSSam Leffler 	return;
34240f9bd73bSSam Leffler }
34250f9bd73bSSam Leffler 
34260f9bd73bSSam Leffler static void
34270f9bd73bSSam Leffler bge_init(xsc)
34280f9bd73bSSam Leffler 	void *xsc;
34290f9bd73bSSam Leffler {
34300f9bd73bSSam Leffler 	struct bge_softc *sc = xsc;
34310f9bd73bSSam Leffler 
34320f9bd73bSSam Leffler 	BGE_LOCK(sc);
34330f9bd73bSSam Leffler 	bge_init_locked(sc);
34340f9bd73bSSam Leffler 	BGE_UNLOCK(sc);
343595d67482SBill Paul 
343695d67482SBill Paul 	return;
343795d67482SBill Paul }
343895d67482SBill Paul 
343995d67482SBill Paul /*
344095d67482SBill Paul  * Set media options.
344195d67482SBill Paul  */
344295d67482SBill Paul static int
344395d67482SBill Paul bge_ifmedia_upd(ifp)
344495d67482SBill Paul 	struct ifnet *ifp;
344595d67482SBill Paul {
344695d67482SBill Paul 	struct bge_softc *sc;
344795d67482SBill Paul 	struct mii_data *mii;
344895d67482SBill Paul 	struct ifmedia *ifm;
344995d67482SBill Paul 
345095d67482SBill Paul 	sc = ifp->if_softc;
345195d67482SBill Paul 	ifm = &sc->bge_ifmedia;
345295d67482SBill Paul 
345395d67482SBill Paul 	/* If this is a 1000baseX NIC, enable the TBI port. */
345495d67482SBill Paul 	if (sc->bge_tbi) {
345595d67482SBill Paul 		if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER)
345695d67482SBill Paul 			return(EINVAL);
345795d67482SBill Paul 		switch(IFM_SUBTYPE(ifm->ifm_media)) {
345895d67482SBill Paul 		case IFM_AUTO:
3459ff50922bSDoug White #ifndef BGE_FAKE_AUTONEG
3460ff50922bSDoug White 			/*
3461ff50922bSDoug White 			 * The BCM5704 ASIC appears to have a special
3462ff50922bSDoug White 			 * mechanism for programming the autoneg
3463ff50922bSDoug White 			 * advertisement registers in TBI mode.
3464ff50922bSDoug White 			 */
3465ff50922bSDoug White 			if (sc->bge_asicrev == BGE_ASICREV_BCM5704) {
3466ff50922bSDoug White 				uint32_t sgdig;
3467ff50922bSDoug White 				CSR_WRITE_4(sc, BGE_TX_TBI_AUTONEG, 0);
3468ff50922bSDoug White 				sgdig = CSR_READ_4(sc, BGE_SGDIG_CFG);
3469ff50922bSDoug White 				sgdig |= BGE_SGDIGCFG_AUTO|
3470ff50922bSDoug White 				    BGE_SGDIGCFG_PAUSE_CAP|
3471ff50922bSDoug White 				    BGE_SGDIGCFG_ASYM_PAUSE;
3472ff50922bSDoug White 				CSR_WRITE_4(sc, BGE_SGDIG_CFG,
3473ff50922bSDoug White 				    sgdig|BGE_SGDIGCFG_SEND);
3474ff50922bSDoug White 				DELAY(5);
3475ff50922bSDoug White 				CSR_WRITE_4(sc, BGE_SGDIG_CFG, sgdig);
3476ff50922bSDoug White 			}
3477ff50922bSDoug White #endif
347895d67482SBill Paul 			break;
347995d67482SBill Paul 		case IFM_1000_SX:
348095d67482SBill Paul 			if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) {
348195d67482SBill Paul 				BGE_CLRBIT(sc, BGE_MAC_MODE,
348295d67482SBill Paul 				    BGE_MACMODE_HALF_DUPLEX);
348395d67482SBill Paul 			} else {
348495d67482SBill Paul 				BGE_SETBIT(sc, BGE_MAC_MODE,
348595d67482SBill Paul 				    BGE_MACMODE_HALF_DUPLEX);
348695d67482SBill Paul 			}
348795d67482SBill Paul 			break;
348895d67482SBill Paul 		default:
348995d67482SBill Paul 			return(EINVAL);
349095d67482SBill Paul 		}
349195d67482SBill Paul 		return(0);
349295d67482SBill Paul 	}
349395d67482SBill Paul 
349495d67482SBill Paul 	mii = device_get_softc(sc->bge_miibus);
349595d67482SBill Paul 	sc->bge_link = 0;
349695d67482SBill Paul 	if (mii->mii_instance) {
349795d67482SBill Paul 		struct mii_softc *miisc;
349895d67482SBill Paul 		for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL;
349995d67482SBill Paul 		    miisc = LIST_NEXT(miisc, mii_list))
350095d67482SBill Paul 			mii_phy_reset(miisc);
350195d67482SBill Paul 	}
350295d67482SBill Paul 	mii_mediachg(mii);
350395d67482SBill Paul 
350495d67482SBill Paul 	return(0);
350595d67482SBill Paul }
350695d67482SBill Paul 
350795d67482SBill Paul /*
350895d67482SBill Paul  * Report current media status.
350995d67482SBill Paul  */
351095d67482SBill Paul static void
351195d67482SBill Paul bge_ifmedia_sts(ifp, ifmr)
351295d67482SBill Paul 	struct ifnet *ifp;
351395d67482SBill Paul 	struct ifmediareq *ifmr;
351495d67482SBill Paul {
351595d67482SBill Paul 	struct bge_softc *sc;
351695d67482SBill Paul 	struct mii_data *mii;
351795d67482SBill Paul 
351895d67482SBill Paul 	sc = ifp->if_softc;
351995d67482SBill Paul 
352095d67482SBill Paul 	if (sc->bge_tbi) {
352195d67482SBill Paul 		ifmr->ifm_status = IFM_AVALID;
352295d67482SBill Paul 		ifmr->ifm_active = IFM_ETHER;
352395d67482SBill Paul 		if (CSR_READ_4(sc, BGE_MAC_STS) &
352495d67482SBill Paul 		    BGE_MACSTAT_TBI_PCS_SYNCHED)
352595d67482SBill Paul 			ifmr->ifm_status |= IFM_ACTIVE;
352695d67482SBill Paul 		ifmr->ifm_active |= IFM_1000_SX;
352795d67482SBill Paul 		if (CSR_READ_4(sc, BGE_MAC_MODE) & BGE_MACMODE_HALF_DUPLEX)
352895d67482SBill Paul 			ifmr->ifm_active |= IFM_HDX;
352995d67482SBill Paul 		else
353095d67482SBill Paul 			ifmr->ifm_active |= IFM_FDX;
353195d67482SBill Paul 		return;
353295d67482SBill Paul 	}
353395d67482SBill Paul 
353495d67482SBill Paul 	mii = device_get_softc(sc->bge_miibus);
353595d67482SBill Paul 	mii_pollstat(mii);
353695d67482SBill Paul 	ifmr->ifm_active = mii->mii_media_active;
353795d67482SBill Paul 	ifmr->ifm_status = mii->mii_media_status;
353895d67482SBill Paul 
353995d67482SBill Paul 	return;
354095d67482SBill Paul }
354195d67482SBill Paul 
354295d67482SBill Paul static int
354395d67482SBill Paul bge_ioctl(ifp, command, data)
354495d67482SBill Paul 	struct ifnet *ifp;
354595d67482SBill Paul 	u_long command;
354695d67482SBill Paul 	caddr_t data;
354795d67482SBill Paul {
354895d67482SBill Paul 	struct bge_softc *sc = ifp->if_softc;
354995d67482SBill Paul 	struct ifreq *ifr = (struct ifreq *) data;
35500f9bd73bSSam Leffler 	int mask, error = 0;
355195d67482SBill Paul 	struct mii_data *mii;
355295d67482SBill Paul 
355395d67482SBill Paul 	switch(command) {
355495d67482SBill Paul 	case SIOCSIFMTU:
35550434d1b8SBill Paul 		/* Disallow jumbo frames on 5705. */
3556e53d81eeSPaul Saab 		if (((sc->bge_asicrev == BGE_ASICREV_BCM5705 ||
3557e53d81eeSPaul Saab 		      sc->bge_asicrev == BGE_ASICREV_BCM5750) &&
35580434d1b8SBill Paul 		    ifr->ifr_mtu > ETHERMTU) || ifr->ifr_mtu > BGE_JUMBO_MTU)
355995d67482SBill Paul 			error = EINVAL;
356095d67482SBill Paul 		else {
356195d67482SBill Paul 			ifp->if_mtu = ifr->ifr_mtu;
356295d67482SBill Paul 			ifp->if_flags &= ~IFF_RUNNING;
356395d67482SBill Paul 			bge_init(sc);
356495d67482SBill Paul 		}
356595d67482SBill Paul 		break;
356695d67482SBill Paul 	case SIOCSIFFLAGS:
35670f9bd73bSSam Leffler 		BGE_LOCK(sc);
356895d67482SBill Paul 		if (ifp->if_flags & IFF_UP) {
356995d67482SBill Paul 			/*
357095d67482SBill Paul 			 * If only the state of the PROMISC flag changed,
357195d67482SBill Paul 			 * then just use the 'set promisc mode' command
357295d67482SBill Paul 			 * instead of reinitializing the entire NIC. Doing
357395d67482SBill Paul 			 * a full re-init means reloading the firmware and
357495d67482SBill Paul 			 * waiting for it to start up, which may take a
357595d67482SBill Paul 			 * second or two.
357695d67482SBill Paul 			 */
357795d67482SBill Paul 			if (ifp->if_flags & IFF_RUNNING &&
357895d67482SBill Paul 			    ifp->if_flags & IFF_PROMISC &&
357995d67482SBill Paul 			    !(sc->bge_if_flags & IFF_PROMISC)) {
358095d67482SBill Paul 				BGE_SETBIT(sc, BGE_RX_MODE,
358195d67482SBill Paul 				    BGE_RXMODE_RX_PROMISC);
358295d67482SBill Paul 			} else if (ifp->if_flags & IFF_RUNNING &&
358395d67482SBill Paul 			    !(ifp->if_flags & IFF_PROMISC) &&
358495d67482SBill Paul 			    sc->bge_if_flags & IFF_PROMISC) {
358595d67482SBill Paul 				BGE_CLRBIT(sc, BGE_RX_MODE,
358695d67482SBill Paul 				    BGE_RXMODE_RX_PROMISC);
358795d67482SBill Paul 			} else
35880f9bd73bSSam Leffler 				bge_init_locked(sc);
358995d67482SBill Paul 		} else {
359095d67482SBill Paul 			if (ifp->if_flags & IFF_RUNNING) {
359195d67482SBill Paul 				bge_stop(sc);
359295d67482SBill Paul 			}
359395d67482SBill Paul 		}
359495d67482SBill Paul 		sc->bge_if_flags = ifp->if_flags;
35950f9bd73bSSam Leffler 		BGE_UNLOCK(sc);
359695d67482SBill Paul 		error = 0;
359795d67482SBill Paul 		break;
359895d67482SBill Paul 	case SIOCADDMULTI:
359995d67482SBill Paul 	case SIOCDELMULTI:
360095d67482SBill Paul 		if (ifp->if_flags & IFF_RUNNING) {
36010f9bd73bSSam Leffler 			BGE_LOCK(sc);
360295d67482SBill Paul 			bge_setmulti(sc);
36030f9bd73bSSam Leffler 			BGE_UNLOCK(sc);
360495d67482SBill Paul 			error = 0;
360595d67482SBill Paul 		}
360695d67482SBill Paul 		break;
360795d67482SBill Paul 	case SIOCSIFMEDIA:
360895d67482SBill Paul 	case SIOCGIFMEDIA:
360995d67482SBill Paul 		if (sc->bge_tbi) {
361095d67482SBill Paul 			error = ifmedia_ioctl(ifp, ifr,
361195d67482SBill Paul 			    &sc->bge_ifmedia, command);
361295d67482SBill Paul 		} else {
361395d67482SBill Paul 			mii = device_get_softc(sc->bge_miibus);
361495d67482SBill Paul 			error = ifmedia_ioctl(ifp, ifr,
361595d67482SBill Paul 			    &mii->mii_media, command);
361695d67482SBill Paul 		}
361795d67482SBill Paul 		break;
361895d67482SBill Paul 	case SIOCSIFCAP:
361995d67482SBill Paul 		mask = ifr->ifr_reqcap ^ ifp->if_capenable;
3620b874fdd4SYaroslav Tykhiy 		/* NB: the code for RX csum offload is disabled for now */
3621b874fdd4SYaroslav Tykhiy 		if (mask & IFCAP_TXCSUM) {
3622b874fdd4SYaroslav Tykhiy 			ifp->if_capenable ^= IFCAP_TXCSUM;
3623b874fdd4SYaroslav Tykhiy 			if (IFCAP_TXCSUM & ifp->if_capenable)
3624b874fdd4SYaroslav Tykhiy 				ifp->if_hwassist = BGE_CSUM_FEATURES;
362595d67482SBill Paul 			else
3626b874fdd4SYaroslav Tykhiy 				ifp->if_hwassist = 0;
362795d67482SBill Paul 		}
362895d67482SBill Paul 		error = 0;
362995d67482SBill Paul 		break;
363095d67482SBill Paul 	default:
3631673d9191SSam Leffler 		error = ether_ioctl(ifp, command, data);
363295d67482SBill Paul 		break;
363395d67482SBill Paul 	}
363495d67482SBill Paul 
363595d67482SBill Paul 	return(error);
363695d67482SBill Paul }
363795d67482SBill Paul 
363895d67482SBill Paul static void
363995d67482SBill Paul bge_watchdog(ifp)
364095d67482SBill Paul 	struct ifnet *ifp;
364195d67482SBill Paul {
364295d67482SBill Paul 	struct bge_softc *sc;
364395d67482SBill Paul 
364495d67482SBill Paul 	sc = ifp->if_softc;
364595d67482SBill Paul 
364695d67482SBill Paul 	printf("bge%d: watchdog timeout -- resetting\n", sc->bge_unit);
364795d67482SBill Paul 
364895d67482SBill Paul 	ifp->if_flags &= ~IFF_RUNNING;
364995d67482SBill Paul 	bge_init(sc);
365095d67482SBill Paul 
365195d67482SBill Paul 	ifp->if_oerrors++;
365295d67482SBill Paul 
365395d67482SBill Paul 	return;
365495d67482SBill Paul }
365595d67482SBill Paul 
365695d67482SBill Paul /*
365795d67482SBill Paul  * Stop the adapter and free any mbufs allocated to the
365895d67482SBill Paul  * RX and TX lists.
365995d67482SBill Paul  */
366095d67482SBill Paul static void
366195d67482SBill Paul bge_stop(sc)
366295d67482SBill Paul 	struct bge_softc *sc;
366395d67482SBill Paul {
366495d67482SBill Paul 	struct ifnet *ifp;
366595d67482SBill Paul 	struct ifmedia_entry *ifm;
366695d67482SBill Paul 	struct mii_data *mii = NULL;
366795d67482SBill Paul 	int mtmp, itmp;
366895d67482SBill Paul 
36690f9bd73bSSam Leffler 	BGE_LOCK_ASSERT(sc);
36700f9bd73bSSam Leffler 
3671fc74a9f9SBrooks Davis 	ifp = sc->bge_ifp;
367295d67482SBill Paul 
367395d67482SBill Paul 	if (!sc->bge_tbi)
367495d67482SBill Paul 		mii = device_get_softc(sc->bge_miibus);
367595d67482SBill Paul 
36760f9bd73bSSam Leffler 	callout_stop(&sc->bge_stat_ch);
367795d67482SBill Paul 
367895d67482SBill Paul 	/*
367995d67482SBill Paul 	 * Disable all of the receiver blocks
368095d67482SBill Paul 	 */
368195d67482SBill Paul 	BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE);
368295d67482SBill Paul 	BGE_CLRBIT(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE);
368395d67482SBill Paul 	BGE_CLRBIT(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE);
36845dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
3685e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
368695d67482SBill Paul 		BGE_CLRBIT(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE);
368795d67482SBill Paul 	BGE_CLRBIT(sc, BGE_RDBDI_MODE, BGE_RBDIMODE_ENABLE);
368895d67482SBill Paul 	BGE_CLRBIT(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE);
368995d67482SBill Paul 	BGE_CLRBIT(sc, BGE_RBDC_MODE, BGE_RBDCMODE_ENABLE);
369095d67482SBill Paul 
369195d67482SBill Paul 	/*
369295d67482SBill Paul 	 * Disable all of the transmit blocks
369395d67482SBill Paul 	 */
369495d67482SBill Paul 	BGE_CLRBIT(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE);
369595d67482SBill Paul 	BGE_CLRBIT(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE);
369695d67482SBill Paul 	BGE_CLRBIT(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE);
369795d67482SBill Paul 	BGE_CLRBIT(sc, BGE_RDMA_MODE, BGE_RDMAMODE_ENABLE);
369895d67482SBill Paul 	BGE_CLRBIT(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE);
36995dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
3700e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
370195d67482SBill Paul 		BGE_CLRBIT(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE);
370295d67482SBill Paul 	BGE_CLRBIT(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE);
370395d67482SBill Paul 
370495d67482SBill Paul 	/*
370595d67482SBill Paul 	 * Shut down all of the memory managers and related
370695d67482SBill Paul 	 * state machines.
370795d67482SBill Paul 	 */
370895d67482SBill Paul 	BGE_CLRBIT(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE);
370995d67482SBill Paul 	BGE_CLRBIT(sc, BGE_WDMA_MODE, BGE_WDMAMODE_ENABLE);
37105dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
3711e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
371295d67482SBill Paul 		BGE_CLRBIT(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE);
371395d67482SBill Paul 	CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF);
371495d67482SBill Paul 	CSR_WRITE_4(sc, BGE_FTQ_RESET, 0);
37155dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
3716e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750) {
371795d67482SBill Paul 		BGE_CLRBIT(sc, BGE_BMAN_MODE, BGE_BMANMODE_ENABLE);
371895d67482SBill Paul 		BGE_CLRBIT(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE);
37190434d1b8SBill Paul 	}
372095d67482SBill Paul 
372195d67482SBill Paul 	/* Disable host interrupts. */
372295d67482SBill Paul 	BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR);
372395d67482SBill Paul 	CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1);
372495d67482SBill Paul 
372595d67482SBill Paul 	/*
372695d67482SBill Paul 	 * Tell firmware we're shutting down.
372795d67482SBill Paul 	 */
372895d67482SBill Paul 	BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
372995d67482SBill Paul 
373095d67482SBill Paul 	/* Free the RX lists. */
373195d67482SBill Paul 	bge_free_rx_ring_std(sc);
373295d67482SBill Paul 
373395d67482SBill Paul 	/* Free jumbo RX list. */
37345dc9afc5SPaul Saab 	if (sc->bge_asicrev != BGE_ASICREV_BCM5705 &&
3735e53d81eeSPaul Saab 	    sc->bge_asicrev != BGE_ASICREV_BCM5750)
373695d67482SBill Paul 		bge_free_rx_ring_jumbo(sc);
373795d67482SBill Paul 
373895d67482SBill Paul 	/* Free TX buffers. */
373995d67482SBill Paul 	bge_free_tx_ring(sc);
374095d67482SBill Paul 
374195d67482SBill Paul 	/*
374295d67482SBill Paul 	 * Isolate/power down the PHY, but leave the media selection
374395d67482SBill Paul 	 * unchanged so that things will be put back to normal when
374495d67482SBill Paul 	 * we bring the interface back up.
374595d67482SBill Paul 	 */
374695d67482SBill Paul 	if (!sc->bge_tbi) {
374795d67482SBill Paul 		itmp = ifp->if_flags;
374895d67482SBill Paul 		ifp->if_flags |= IFF_UP;
374995d67482SBill Paul 		ifm = mii->mii_media.ifm_cur;
375095d67482SBill Paul 		mtmp = ifm->ifm_media;
375195d67482SBill Paul 		ifm->ifm_media = IFM_ETHER|IFM_NONE;
375295d67482SBill Paul 		mii_mediachg(mii);
375395d67482SBill Paul 		ifm->ifm_media = mtmp;
375495d67482SBill Paul 		ifp->if_flags = itmp;
375595d67482SBill Paul 	}
375695d67482SBill Paul 
375795d67482SBill Paul 	sc->bge_link = 0;
375895d67482SBill Paul 
375995d67482SBill Paul 	sc->bge_tx_saved_considx = BGE_TXCONS_UNSET;
376095d67482SBill Paul 
376195d67482SBill Paul 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
376295d67482SBill Paul 
376395d67482SBill Paul 	return;
376495d67482SBill Paul }
376595d67482SBill Paul 
376695d67482SBill Paul /*
376795d67482SBill Paul  * Stop all chip I/O so that the kernel's probe routines don't
376895d67482SBill Paul  * get confused by errant DMAs when rebooting.
376995d67482SBill Paul  */
377095d67482SBill Paul static void
377195d67482SBill Paul bge_shutdown(dev)
377295d67482SBill Paul 	device_t dev;
377395d67482SBill Paul {
377495d67482SBill Paul 	struct bge_softc *sc;
377595d67482SBill Paul 
377695d67482SBill Paul 	sc = device_get_softc(dev);
377795d67482SBill Paul 
37780f9bd73bSSam Leffler 	BGE_LOCK(sc);
377995d67482SBill Paul 	bge_stop(sc);
378095d67482SBill Paul 	bge_reset(sc);
37810f9bd73bSSam Leffler 	BGE_UNLOCK(sc);
378295d67482SBill Paul 
378395d67482SBill Paul 	return;
378495d67482SBill Paul }
3785