1098ca2bdSWarner Losh /*- 295d67482SBill Paul * Copyright (c) 2001 Wind River Systems 395d67482SBill Paul * Copyright (c) 1997, 1998, 1999, 2001 495d67482SBill Paul * Bill Paul <wpaul@windriver.com>. All rights reserved. 595d67482SBill Paul * 695d67482SBill Paul * Redistribution and use in source and binary forms, with or without 795d67482SBill Paul * modification, are permitted provided that the following conditions 895d67482SBill Paul * are met: 995d67482SBill Paul * 1. Redistributions of source code must retain the above copyright 1095d67482SBill Paul * notice, this list of conditions and the following disclaimer. 1195d67482SBill Paul * 2. Redistributions in binary form must reproduce the above copyright 1295d67482SBill Paul * notice, this list of conditions and the following disclaimer in the 1395d67482SBill Paul * documentation and/or other materials provided with the distribution. 1495d67482SBill Paul * 3. All advertising materials mentioning features or use of this software 1595d67482SBill Paul * must display the following acknowledgement: 1695d67482SBill Paul * This product includes software developed by Bill Paul. 1795d67482SBill Paul * 4. Neither the name of the author nor the names of any co-contributors 1895d67482SBill Paul * may be used to endorse or promote products derived from this software 1995d67482SBill Paul * without specific prior written permission. 2095d67482SBill Paul * 2195d67482SBill Paul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 2295d67482SBill Paul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2395d67482SBill Paul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2495d67482SBill Paul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 2595d67482SBill Paul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2695d67482SBill Paul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2795d67482SBill Paul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2895d67482SBill Paul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2995d67482SBill Paul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3095d67482SBill Paul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 3195d67482SBill Paul * THE POSSIBILITY OF SUCH DAMAGE. 3295d67482SBill Paul */ 3395d67482SBill Paul 34aad970f1SDavid E. O'Brien #include <sys/cdefs.h> 35aad970f1SDavid E. O'Brien __FBSDID("$FreeBSD$"); 36aad970f1SDavid E. O'Brien 3795d67482SBill Paul /* 3895d67482SBill Paul * Broadcom BCM570x family gigabit ethernet driver for FreeBSD. 3995d67482SBill Paul * 4095d67482SBill Paul * The Broadcom BCM5700 is based on technology originally developed by 4195d67482SBill Paul * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet 4295d67482SBill Paul * MAC chips. The BCM5700, sometimes refered to as the Tigon III, has 4395d67482SBill Paul * two on-board MIPS R4000 CPUs and can have as much as 16MB of external 4495d67482SBill Paul * SSRAM. The BCM5700 supports TCP, UDP and IP checksum offload, jumbo 4595d67482SBill Paul * frames, highly configurable RX filtering, and 16 RX and TX queues 4695d67482SBill Paul * (which, along with RX filter rules, can be used for QOS applications). 4795d67482SBill Paul * Other features, such as TCP segmentation, may be available as part 4895d67482SBill Paul * of value-added firmware updates. Unlike the Tigon I and Tigon II, 4995d67482SBill Paul * firmware images can be stored in hardware and need not be compiled 5095d67482SBill Paul * into the driver. 5195d67482SBill Paul * 5295d67482SBill Paul * The BCM5700 supports the PCI v2.2 and PCI-X v1.0 standards, and will 5395d67482SBill Paul * function in a 32-bit/64-bit 33/66Mhz bus, or a 64-bit/133Mhz bus. 5495d67482SBill Paul * 5595d67482SBill Paul * The BCM5701 is a single-chip solution incorporating both the BCM5700 5698b28ee5SBill Paul * MAC and a BCM5401 10/100/1000 PHY. Unlike the BCM5700, the BCM5701 5795d67482SBill Paul * does not support external SSRAM. 5895d67482SBill Paul * 5995d67482SBill Paul * Broadcom also produces a variation of the BCM5700 under the "Altima" 6095d67482SBill Paul * brand name, which is functionally similar but lacks PCI-X support. 6195d67482SBill Paul * 6295d67482SBill Paul * Without external SSRAM, you can only have at most 4 TX rings, 6395d67482SBill Paul * and the use of the mini RX ring is disabled. This seems to imply 6495d67482SBill Paul * that these features are simply not available on the BCM5701. As a 6595d67482SBill Paul * result, this driver does not implement any support for the mini RX 6695d67482SBill Paul * ring. 6795d67482SBill Paul */ 6895d67482SBill Paul 6975719184SGleb Smirnoff #ifdef HAVE_KERNEL_OPTION_HEADERS 7075719184SGleb Smirnoff #include "opt_device_polling.h" 7175719184SGleb Smirnoff #endif 7275719184SGleb Smirnoff 7395d67482SBill Paul #include <sys/param.h> 74f41ac2beSBill Paul #include <sys/endian.h> 7595d67482SBill Paul #include <sys/systm.h> 7695d67482SBill Paul #include <sys/sockio.h> 7795d67482SBill Paul #include <sys/mbuf.h> 7895d67482SBill Paul #include <sys/malloc.h> 7995d67482SBill Paul #include <sys/kernel.h> 80fe12f24bSPoul-Henning Kamp #include <sys/module.h> 8195d67482SBill Paul #include <sys/socket.h> 82f1a7e6d5SScott Long #include <sys/sysctl.h> 8395d67482SBill Paul 8495d67482SBill Paul #include <net/if.h> 8595d67482SBill Paul #include <net/if_arp.h> 8695d67482SBill Paul #include <net/ethernet.h> 8795d67482SBill Paul #include <net/if_dl.h> 8895d67482SBill Paul #include <net/if_media.h> 8995d67482SBill Paul 9095d67482SBill Paul #include <net/bpf.h> 9195d67482SBill Paul 9295d67482SBill Paul #include <net/if_types.h> 9395d67482SBill Paul #include <net/if_vlan_var.h> 9495d67482SBill Paul 9595d67482SBill Paul #include <netinet/in_systm.h> 9695d67482SBill Paul #include <netinet/in.h> 9795d67482SBill Paul #include <netinet/ip.h> 9895d67482SBill Paul 9995d67482SBill Paul #include <machine/bus.h> 10095d67482SBill Paul #include <machine/resource.h> 10195d67482SBill Paul #include <sys/bus.h> 10295d67482SBill Paul #include <sys/rman.h> 10395d67482SBill Paul 10495d67482SBill Paul #include <dev/mii/mii.h> 10595d67482SBill Paul #include <dev/mii/miivar.h> 1062d3ce713SDavid E. O'Brien #include "miidevs.h" 10795d67482SBill Paul #include <dev/mii/brgphyreg.h> 10895d67482SBill Paul 10908013fd3SMarius Strobl #ifdef __sparc64__ 11008013fd3SMarius Strobl #include <dev/ofw/ofw_bus.h> 11108013fd3SMarius Strobl #include <dev/ofw/openfirm.h> 11208013fd3SMarius Strobl #include <machine/ofw_machdep.h> 11308013fd3SMarius Strobl #include <machine/ver.h> 11408013fd3SMarius Strobl #endif 11508013fd3SMarius Strobl 1164fbd232cSWarner Losh #include <dev/pci/pcireg.h> 1174fbd232cSWarner Losh #include <dev/pci/pcivar.h> 11895d67482SBill Paul 11995d67482SBill Paul #include <dev/bge/if_bgereg.h> 12095d67482SBill Paul 1215ddc5794SJohn Polstra #define BGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 122d375e524SGleb Smirnoff #define ETHER_MIN_NOPAD (ETHER_MIN_LEN - ETHER_CRC_LEN) /* i.e., 60 */ 12395d67482SBill Paul 124f246e4a1SMatthew N. Dodd MODULE_DEPEND(bge, pci, 1, 1, 1); 125f246e4a1SMatthew N. Dodd MODULE_DEPEND(bge, ether, 1, 1, 1); 12695d67482SBill Paul MODULE_DEPEND(bge, miibus, 1, 1, 1); 12795d67482SBill Paul 1287b279558SWarner Losh /* "device miibus" required. See GENERIC if you get errors here. */ 12995d67482SBill Paul #include "miibus_if.h" 13095d67482SBill Paul 13195d67482SBill Paul /* 13295d67482SBill Paul * Various supported device vendors/types and their names. Note: the 13395d67482SBill Paul * spec seems to indicate that the hardware still has Alteon's vendor 13495d67482SBill Paul * ID burned into it, though it will always be overriden by the vendor 13595d67482SBill Paul * ID in the EEPROM. Just to be safe, we cover all possibilities. 13695d67482SBill Paul */ 137852c67f9SMarius Strobl static const struct bge_type { 1384c0da0ffSGleb Smirnoff uint16_t bge_vid; 1394c0da0ffSGleb Smirnoff uint16_t bge_did; 1404c0da0ffSGleb Smirnoff } bge_devs[] = { 1414c0da0ffSGleb Smirnoff { ALTEON_VENDORID, ALTEON_DEVICEID_BCM5700 }, 1424c0da0ffSGleb Smirnoff { ALTEON_VENDORID, ALTEON_DEVICEID_BCM5701 }, 14395d67482SBill Paul 1444c0da0ffSGleb Smirnoff { ALTIMA_VENDORID, ALTIMA_DEVICE_AC1000 }, 1454c0da0ffSGleb Smirnoff { ALTIMA_VENDORID, ALTIMA_DEVICE_AC1002 }, 1464c0da0ffSGleb Smirnoff { ALTIMA_VENDORID, ALTIMA_DEVICE_AC9100 }, 1474c0da0ffSGleb Smirnoff 1484c0da0ffSGleb Smirnoff { APPLE_VENDORID, APPLE_DEVICE_BCM5701 }, 1494c0da0ffSGleb Smirnoff 1504c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5700 }, 1514c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5701 }, 1524c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5702 }, 1534c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5702_ALT }, 1544c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5702X }, 1554c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5703 }, 1564c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5703_ALT }, 1574c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5703X }, 1584c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5704C }, 1594c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5704S }, 1604c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5704S_ALT }, 1614c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705 }, 1624c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705F }, 1634c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705K }, 1644c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705M }, 1654c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705M_ALT }, 1664c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5714C }, 1674c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5714S }, 1684c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5715 }, 1694c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5715S }, 1704c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5720 }, 1714c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5721 }, 172effef978SRemko Lodder { BCOM_VENDORID, BCOM_DEVICEID_BCM5722 }, 1734c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5750 }, 1744c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5750M }, 1754c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5751 }, 1764c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5751F }, 1774c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5751M }, 1784c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5752 }, 1794c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5752M }, 1804c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5753 }, 1814c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5753F }, 1824c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5753M }, 1839e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5754 }, 1849e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5754M }, 1859e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5755 }, 1869e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5755M }, 1874c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5780 }, 1884c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5780S }, 1894c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5781 }, 1904c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5782 }, 1919e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5786 }, 1929e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5787 }, 1939e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5787M }, 1944c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5788 }, 1954c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5789 }, 1964c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5901 }, 1974c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5901A2 }, 1984c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5903M }, 19938cc658fSJohn Baldwin { BCOM_VENDORID, BCOM_DEVICEID_BCM5906 }, 20038cc658fSJohn Baldwin { BCOM_VENDORID, BCOM_DEVICEID_BCM5906M }, 2014c0da0ffSGleb Smirnoff 2024c0da0ffSGleb Smirnoff { SK_VENDORID, SK_DEVICEID_ALTIMA }, 2034c0da0ffSGleb Smirnoff 2044c0da0ffSGleb Smirnoff { TC_VENDORID, TC_DEVICEID_3C996 }, 2054c0da0ffSGleb Smirnoff 2064c0da0ffSGleb Smirnoff { 0, 0 } 20795d67482SBill Paul }; 20895d67482SBill Paul 2094c0da0ffSGleb Smirnoff static const struct bge_vendor { 2104c0da0ffSGleb Smirnoff uint16_t v_id; 2114c0da0ffSGleb Smirnoff const char *v_name; 2124c0da0ffSGleb Smirnoff } bge_vendors[] = { 2134c0da0ffSGleb Smirnoff { ALTEON_VENDORID, "Alteon" }, 2144c0da0ffSGleb Smirnoff { ALTIMA_VENDORID, "Altima" }, 2154c0da0ffSGleb Smirnoff { APPLE_VENDORID, "Apple" }, 2164c0da0ffSGleb Smirnoff { BCOM_VENDORID, "Broadcom" }, 2174c0da0ffSGleb Smirnoff { SK_VENDORID, "SysKonnect" }, 2184c0da0ffSGleb Smirnoff { TC_VENDORID, "3Com" }, 2194c0da0ffSGleb Smirnoff 2204c0da0ffSGleb Smirnoff { 0, NULL } 2214c0da0ffSGleb Smirnoff }; 2224c0da0ffSGleb Smirnoff 2234c0da0ffSGleb Smirnoff static const struct bge_revision { 2244c0da0ffSGleb Smirnoff uint32_t br_chipid; 2254c0da0ffSGleb Smirnoff const char *br_name; 2264c0da0ffSGleb Smirnoff } bge_revisions[] = { 2274c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_A0, "BCM5700 A0" }, 2284c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_A1, "BCM5700 A1" }, 2294c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_B0, "BCM5700 B0" }, 2304c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_B1, "BCM5700 B1" }, 2314c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_B2, "BCM5700 B2" }, 2324c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_B3, "BCM5700 B3" }, 2334c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_ALTIMA, "BCM5700 Altima" }, 2344c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_C0, "BCM5700 C0" }, 2354c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5701_A0, "BCM5701 A0" }, 2364c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5701_B0, "BCM5701 B0" }, 2374c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5701_B2, "BCM5701 B2" }, 2384c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5701_B5, "BCM5701 B5" }, 2394c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5703_A0, "BCM5703 A0" }, 2404c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5703_A1, "BCM5703 A1" }, 2414c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5703_A2, "BCM5703 A2" }, 2424c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5703_A3, "BCM5703 A3" }, 2439e86676bSGleb Smirnoff { BGE_CHIPID_BCM5703_B0, "BCM5703 B0" }, 2444c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_A0, "BCM5704 A0" }, 2454c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_A1, "BCM5704 A1" }, 2464c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_A2, "BCM5704 A2" }, 2474c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_A3, "BCM5704 A3" }, 2484c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_B0, "BCM5704 B0" }, 2494c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5705_A0, "BCM5705 A0" }, 2504c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5705_A1, "BCM5705 A1" }, 2514c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5705_A2, "BCM5705 A2" }, 2524c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5705_A3, "BCM5705 A3" }, 2534c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_A0, "BCM5750 A0" }, 2544c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_A1, "BCM5750 A1" }, 2554c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_A3, "BCM5750 A3" }, 2564c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_B0, "BCM5750 B0" }, 2574c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_B1, "BCM5750 B1" }, 2584c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_C0, "BCM5750 C0" }, 2594c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_C1, "BCM5750 C1" }, 26042787b76SGleb Smirnoff { BGE_CHIPID_BCM5750_C2, "BCM5750 C2" }, 2614c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5714_A0, "BCM5714 A0" }, 2624c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5752_A0, "BCM5752 A0" }, 2634c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5752_A1, "BCM5752 A1" }, 2644c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5752_A2, "BCM5752 A2" }, 2654c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5714_B0, "BCM5714 B0" }, 2664c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5714_B3, "BCM5714 B3" }, 2674c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5715_A0, "BCM5715 A0" }, 2684c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5715_A1, "BCM5715 A1" }, 2690c4a1ef8SJung-uk Kim { BGE_CHIPID_BCM5715_A3, "BCM5715 A3" }, 2700c4a1ef8SJung-uk Kim { BGE_CHIPID_BCM5755_A0, "BCM5755 A0" }, 2710c4a1ef8SJung-uk Kim { BGE_CHIPID_BCM5755_A1, "BCM5755 A1" }, 2720c4a1ef8SJung-uk Kim { BGE_CHIPID_BCM5755_A2, "BCM5755 A2" }, 273bcc20328SJohn Baldwin { BGE_CHIPID_BCM5722_A0, "BCM5722 A0" }, 27481179070SJung-uk Kim /* 5754 and 5787 share the same ASIC ID */ 2756f8718a3SScott Long { BGE_CHIPID_BCM5787_A0, "BCM5754/5787 A0" }, 2766f8718a3SScott Long { BGE_CHIPID_BCM5787_A1, "BCM5754/5787 A1" }, 2776f8718a3SScott Long { BGE_CHIPID_BCM5787_A2, "BCM5754/5787 A2" }, 27838cc658fSJohn Baldwin { BGE_CHIPID_BCM5906_A1, "BCM5906 A1" }, 27938cc658fSJohn Baldwin { BGE_CHIPID_BCM5906_A2, "BCM5906 A2" }, 2804c0da0ffSGleb Smirnoff 2814c0da0ffSGleb Smirnoff { 0, NULL } 2824c0da0ffSGleb Smirnoff }; 2834c0da0ffSGleb Smirnoff 2844c0da0ffSGleb Smirnoff /* 2854c0da0ffSGleb Smirnoff * Some defaults for major revisions, so that newer steppings 2864c0da0ffSGleb Smirnoff * that we don't know about have a shot at working. 2874c0da0ffSGleb Smirnoff */ 2884c0da0ffSGleb Smirnoff static const struct bge_revision bge_majorrevs[] = { 2899e86676bSGleb Smirnoff { BGE_ASICREV_BCM5700, "unknown BCM5700" }, 2909e86676bSGleb Smirnoff { BGE_ASICREV_BCM5701, "unknown BCM5701" }, 2919e86676bSGleb Smirnoff { BGE_ASICREV_BCM5703, "unknown BCM5703" }, 2929e86676bSGleb Smirnoff { BGE_ASICREV_BCM5704, "unknown BCM5704" }, 2939e86676bSGleb Smirnoff { BGE_ASICREV_BCM5705, "unknown BCM5705" }, 2949e86676bSGleb Smirnoff { BGE_ASICREV_BCM5750, "unknown BCM5750" }, 2959e86676bSGleb Smirnoff { BGE_ASICREV_BCM5714_A0, "unknown BCM5714" }, 2969e86676bSGleb Smirnoff { BGE_ASICREV_BCM5752, "unknown BCM5752" }, 2979e86676bSGleb Smirnoff { BGE_ASICREV_BCM5780, "unknown BCM5780" }, 2989e86676bSGleb Smirnoff { BGE_ASICREV_BCM5714, "unknown BCM5714" }, 2999e86676bSGleb Smirnoff { BGE_ASICREV_BCM5755, "unknown BCM5755" }, 30081179070SJung-uk Kim /* 5754 and 5787 share the same ASIC ID */ 3016f8718a3SScott Long { BGE_ASICREV_BCM5787, "unknown BCM5754/5787" }, 30238cc658fSJohn Baldwin { BGE_ASICREV_BCM5906, "unknown BCM5906" }, 3034c0da0ffSGleb Smirnoff 3044c0da0ffSGleb Smirnoff { 0, NULL } 3054c0da0ffSGleb Smirnoff }; 3064c0da0ffSGleb Smirnoff 3070c8aa4eaSJung-uk Kim #define BGE_IS_JUMBO_CAPABLE(sc) ((sc)->bge_flags & BGE_FLAG_JUMBO) 3080c8aa4eaSJung-uk Kim #define BGE_IS_5700_FAMILY(sc) ((sc)->bge_flags & BGE_FLAG_5700_FAMILY) 3090c8aa4eaSJung-uk Kim #define BGE_IS_5705_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_5705_PLUS) 3100c8aa4eaSJung-uk Kim #define BGE_IS_5714_FAMILY(sc) ((sc)->bge_flags & BGE_FLAG_5714_FAMILY) 3110c8aa4eaSJung-uk Kim #define BGE_IS_575X_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_575X_PLUS) 3124c0da0ffSGleb Smirnoff 3134c0da0ffSGleb Smirnoff const struct bge_revision * bge_lookup_rev(uint32_t); 3144c0da0ffSGleb Smirnoff const struct bge_vendor * bge_lookup_vendor(uint16_t); 31538cc658fSJohn Baldwin 31638cc658fSJohn Baldwin typedef int (*bge_eaddr_fcn_t)(struct bge_softc *, uint8_t[]); 31738cc658fSJohn Baldwin 318e51a25f8SAlfred Perlstein static int bge_probe(device_t); 319e51a25f8SAlfred Perlstein static int bge_attach(device_t); 320e51a25f8SAlfred Perlstein static int bge_detach(device_t); 32114afefa3SPawel Jakub Dawidek static int bge_suspend(device_t); 32214afefa3SPawel Jakub Dawidek static int bge_resume(device_t); 3233f74909aSGleb Smirnoff static void bge_release_resources(struct bge_softc *); 324f41ac2beSBill Paul static void bge_dma_map_addr(void *, bus_dma_segment_t *, int, int); 325f41ac2beSBill Paul static int bge_dma_alloc(device_t); 326f41ac2beSBill Paul static void bge_dma_free(struct bge_softc *); 327f41ac2beSBill Paul 3285fea260fSMarius Strobl static int bge_get_eaddr_fw(struct bge_softc *sc, uint8_t ether_addr[]); 32938cc658fSJohn Baldwin static int bge_get_eaddr_mem(struct bge_softc *, uint8_t[]); 33038cc658fSJohn Baldwin static int bge_get_eaddr_nvram(struct bge_softc *, uint8_t[]); 33138cc658fSJohn Baldwin static int bge_get_eaddr_eeprom(struct bge_softc *, uint8_t[]); 33238cc658fSJohn Baldwin static int bge_get_eaddr(struct bge_softc *, uint8_t[]); 33338cc658fSJohn Baldwin 334e51a25f8SAlfred Perlstein static void bge_txeof(struct bge_softc *); 335e51a25f8SAlfred Perlstein static void bge_rxeof(struct bge_softc *); 33695d67482SBill Paul 3378cb1383cSDoug Ambrisko static void bge_asf_driver_up (struct bge_softc *); 338e51a25f8SAlfred Perlstein static void bge_tick(void *); 339e51a25f8SAlfred Perlstein static void bge_stats_update(struct bge_softc *); 3403f74909aSGleb Smirnoff static void bge_stats_update_regs(struct bge_softc *); 341676ad2c9SGleb Smirnoff static int bge_encap(struct bge_softc *, struct mbuf **, uint32_t *); 34295d67482SBill Paul 343e51a25f8SAlfred Perlstein static void bge_intr(void *); 3440f9bd73bSSam Leffler static void bge_start_locked(struct ifnet *); 345e51a25f8SAlfred Perlstein static void bge_start(struct ifnet *); 346e51a25f8SAlfred Perlstein static int bge_ioctl(struct ifnet *, u_long, caddr_t); 3470f9bd73bSSam Leffler static void bge_init_locked(struct bge_softc *); 348e51a25f8SAlfred Perlstein static void bge_init(void *); 349e51a25f8SAlfred Perlstein static void bge_stop(struct bge_softc *); 350b74e67fbSGleb Smirnoff static void bge_watchdog(struct bge_softc *); 351b6c974e8SWarner Losh static int bge_shutdown(device_t); 35267d5e043SOleg Bulyzhin static int bge_ifmedia_upd_locked(struct ifnet *); 353e51a25f8SAlfred Perlstein static int bge_ifmedia_upd(struct ifnet *); 354e51a25f8SAlfred Perlstein static void bge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 35595d67482SBill Paul 35638cc658fSJohn Baldwin static uint8_t bge_nvram_getbyte(struct bge_softc *, int, uint8_t *); 35738cc658fSJohn Baldwin static int bge_read_nvram(struct bge_softc *, caddr_t, int, int); 35838cc658fSJohn Baldwin 3593f74909aSGleb Smirnoff static uint8_t bge_eeprom_getbyte(struct bge_softc *, int, uint8_t *); 360e51a25f8SAlfred Perlstein static int bge_read_eeprom(struct bge_softc *, caddr_t, int, int); 36195d67482SBill Paul 3623e9b1bcaSJung-uk Kim static void bge_setpromisc(struct bge_softc *); 363e51a25f8SAlfred Perlstein static void bge_setmulti(struct bge_softc *); 364cb2eacc7SYaroslav Tykhiy static void bge_setvlan(struct bge_softc *); 36595d67482SBill Paul 366e51a25f8SAlfred Perlstein static int bge_newbuf_std(struct bge_softc *, int, struct mbuf *); 367e51a25f8SAlfred Perlstein static int bge_newbuf_jumbo(struct bge_softc *, int, struct mbuf *); 368e51a25f8SAlfred Perlstein static int bge_init_rx_ring_std(struct bge_softc *); 369e51a25f8SAlfred Perlstein static void bge_free_rx_ring_std(struct bge_softc *); 370e51a25f8SAlfred Perlstein static int bge_init_rx_ring_jumbo(struct bge_softc *); 371e51a25f8SAlfred Perlstein static void bge_free_rx_ring_jumbo(struct bge_softc *); 372e51a25f8SAlfred Perlstein static void bge_free_tx_ring(struct bge_softc *); 373e51a25f8SAlfred Perlstein static int bge_init_tx_ring(struct bge_softc *); 37495d67482SBill Paul 375e51a25f8SAlfred Perlstein static int bge_chipinit(struct bge_softc *); 376e51a25f8SAlfred Perlstein static int bge_blockinit(struct bge_softc *); 37795d67482SBill Paul 3785fea260fSMarius Strobl static int bge_has_eaddr(struct bge_softc *); 3793f74909aSGleb Smirnoff static uint32_t bge_readmem_ind(struct bge_softc *, int); 380e51a25f8SAlfred Perlstein static void bge_writemem_ind(struct bge_softc *, int, int); 38138cc658fSJohn Baldwin static void bge_writembx(struct bge_softc *, int, int); 38295d67482SBill Paul #ifdef notdef 3833f74909aSGleb Smirnoff static uint32_t bge_readreg_ind(struct bge_softc *, int); 38495d67482SBill Paul #endif 3859ba784dbSScott Long static void bge_writemem_direct(struct bge_softc *, int, int); 386e51a25f8SAlfred Perlstein static void bge_writereg_ind(struct bge_softc *, int, int); 38795d67482SBill Paul 388e51a25f8SAlfred Perlstein static int bge_miibus_readreg(device_t, int, int); 389e51a25f8SAlfred Perlstein static int bge_miibus_writereg(device_t, int, int, int); 390e51a25f8SAlfred Perlstein static void bge_miibus_statchg(device_t); 39175719184SGleb Smirnoff #ifdef DEVICE_POLLING 3923f74909aSGleb Smirnoff static void bge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count); 39375719184SGleb Smirnoff #endif 39495d67482SBill Paul 3958cb1383cSDoug Ambrisko #define BGE_RESET_START 1 3968cb1383cSDoug Ambrisko #define BGE_RESET_STOP 2 3978cb1383cSDoug Ambrisko static void bge_sig_post_reset(struct bge_softc *, int); 3988cb1383cSDoug Ambrisko static void bge_sig_legacy(struct bge_softc *, int); 3998cb1383cSDoug Ambrisko static void bge_sig_pre_reset(struct bge_softc *, int); 4008cb1383cSDoug Ambrisko static int bge_reset(struct bge_softc *); 401dab5cd05SOleg Bulyzhin static void bge_link_upd(struct bge_softc *); 40295d67482SBill Paul 4036f8718a3SScott Long /* 4046f8718a3SScott Long * The BGE_REGISTER_DEBUG option is only for low-level debugging. It may 4056f8718a3SScott Long * leak information to untrusted users. It is also known to cause alignment 4066f8718a3SScott Long * traps on certain architectures. 4076f8718a3SScott Long */ 4086f8718a3SScott Long #ifdef BGE_REGISTER_DEBUG 4096f8718a3SScott Long static int bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 4106f8718a3SScott Long static int bge_sysctl_reg_read(SYSCTL_HANDLER_ARGS); 4116f8718a3SScott Long static int bge_sysctl_mem_read(SYSCTL_HANDLER_ARGS); 4126f8718a3SScott Long #endif 4136f8718a3SScott Long static void bge_add_sysctls(struct bge_softc *); 414763757b2SScott Long static int bge_sysctl_stats(SYSCTL_HANDLER_ARGS); 4156f8718a3SScott Long 41695d67482SBill Paul static device_method_t bge_methods[] = { 41795d67482SBill Paul /* Device interface */ 41895d67482SBill Paul DEVMETHOD(device_probe, bge_probe), 41995d67482SBill Paul DEVMETHOD(device_attach, bge_attach), 42095d67482SBill Paul DEVMETHOD(device_detach, bge_detach), 42195d67482SBill Paul DEVMETHOD(device_shutdown, bge_shutdown), 42214afefa3SPawel Jakub Dawidek DEVMETHOD(device_suspend, bge_suspend), 42314afefa3SPawel Jakub Dawidek DEVMETHOD(device_resume, bge_resume), 42495d67482SBill Paul 42595d67482SBill Paul /* bus interface */ 42695d67482SBill Paul DEVMETHOD(bus_print_child, bus_generic_print_child), 42795d67482SBill Paul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 42895d67482SBill Paul 42995d67482SBill Paul /* MII interface */ 43095d67482SBill Paul DEVMETHOD(miibus_readreg, bge_miibus_readreg), 43195d67482SBill Paul DEVMETHOD(miibus_writereg, bge_miibus_writereg), 43295d67482SBill Paul DEVMETHOD(miibus_statchg, bge_miibus_statchg), 43395d67482SBill Paul 43495d67482SBill Paul { 0, 0 } 43595d67482SBill Paul }; 43695d67482SBill Paul 43795d67482SBill Paul static driver_t bge_driver = { 43895d67482SBill Paul "bge", 43995d67482SBill Paul bge_methods, 44095d67482SBill Paul sizeof(struct bge_softc) 44195d67482SBill Paul }; 44295d67482SBill Paul 44395d67482SBill Paul static devclass_t bge_devclass; 44495d67482SBill Paul 445f246e4a1SMatthew N. Dodd DRIVER_MODULE(bge, pci, bge_driver, bge_devclass, 0, 0); 44695d67482SBill Paul DRIVER_MODULE(miibus, bge, miibus_driver, miibus_devclass, 0, 0); 44795d67482SBill Paul 448f1a7e6d5SScott Long static int bge_allow_asf = 1; 449f1a7e6d5SScott Long 450f1a7e6d5SScott Long TUNABLE_INT("hw.bge.allow_asf", &bge_allow_asf); 451f1a7e6d5SScott Long 452f1a7e6d5SScott Long SYSCTL_NODE(_hw, OID_AUTO, bge, CTLFLAG_RD, 0, "BGE driver parameters"); 453f1a7e6d5SScott Long SYSCTL_INT(_hw_bge, OID_AUTO, allow_asf, CTLFLAG_RD, &bge_allow_asf, 0, 454f1a7e6d5SScott Long "Allow ASF mode if available"); 455c4529f41SMichael Reifenberger 45608013fd3SMarius Strobl #define SPARC64_BLADE_1500_MODEL "SUNW,Sun-Blade-1500" 45708013fd3SMarius Strobl #define SPARC64_BLADE_1500_PATH_BGE "/pci@1f,700000/network@2" 45808013fd3SMarius Strobl #define SPARC64_BLADE_2500_MODEL "SUNW,Sun-Blade-2500" 45908013fd3SMarius Strobl #define SPARC64_BLADE_2500_PATH_BGE "/pci@1c,600000/network@3" 46008013fd3SMarius Strobl #define SPARC64_OFW_SUBVENDOR "subsystem-vendor-id" 46108013fd3SMarius Strobl 46208013fd3SMarius Strobl static int 4635fea260fSMarius Strobl bge_has_eaddr(struct bge_softc *sc) 46408013fd3SMarius Strobl { 46508013fd3SMarius Strobl #ifdef __sparc64__ 46608013fd3SMarius Strobl char buf[sizeof(SPARC64_BLADE_1500_PATH_BGE)]; 46708013fd3SMarius Strobl device_t dev; 46808013fd3SMarius Strobl uint32_t subvendor; 46908013fd3SMarius Strobl 47008013fd3SMarius Strobl dev = sc->bge_dev; 47108013fd3SMarius Strobl 47208013fd3SMarius Strobl /* 47308013fd3SMarius Strobl * The on-board BGEs found in sun4u machines aren't fitted with 47408013fd3SMarius Strobl * an EEPROM which means that we have to obtain the MAC address 47508013fd3SMarius Strobl * via OFW and that some tests will always fail. We distinguish 47608013fd3SMarius Strobl * such BGEs by the subvendor ID, which also has to be obtained 47708013fd3SMarius Strobl * from OFW instead of the PCI configuration space as the latter 47808013fd3SMarius Strobl * indicates Broadcom as the subvendor of the netboot interface. 47908013fd3SMarius Strobl * For early Blade 1500 and 2500 we even have to check the OFW 48008013fd3SMarius Strobl * device path as the subvendor ID always defaults to Broadcom 48108013fd3SMarius Strobl * there. 48208013fd3SMarius Strobl */ 48308013fd3SMarius Strobl if (OF_getprop(ofw_bus_get_node(dev), SPARC64_OFW_SUBVENDOR, 48408013fd3SMarius Strobl &subvendor, sizeof(subvendor)) == sizeof(subvendor) && 48508013fd3SMarius Strobl subvendor == SUN_VENDORID) 48608013fd3SMarius Strobl return (0); 48708013fd3SMarius Strobl memset(buf, 0, sizeof(buf)); 48808013fd3SMarius Strobl if (OF_package_to_path(ofw_bus_get_node(dev), buf, sizeof(buf)) > 0) { 48908013fd3SMarius Strobl if (strcmp(sparc64_model, SPARC64_BLADE_1500_MODEL) == 0 && 49008013fd3SMarius Strobl strcmp(buf, SPARC64_BLADE_1500_PATH_BGE) == 0) 49108013fd3SMarius Strobl return (0); 49208013fd3SMarius Strobl if (strcmp(sparc64_model, SPARC64_BLADE_2500_MODEL) == 0 && 49308013fd3SMarius Strobl strcmp(buf, SPARC64_BLADE_2500_PATH_BGE) == 0) 49408013fd3SMarius Strobl return (0); 49508013fd3SMarius Strobl } 49608013fd3SMarius Strobl #endif 49708013fd3SMarius Strobl return (1); 49808013fd3SMarius Strobl } 49908013fd3SMarius Strobl 5003f74909aSGleb Smirnoff static uint32_t 5013f74909aSGleb Smirnoff bge_readmem_ind(struct bge_softc *sc, int off) 50295d67482SBill Paul { 50395d67482SBill Paul device_t dev; 5046f8718a3SScott Long uint32_t val; 50595d67482SBill Paul 50695d67482SBill Paul dev = sc->bge_dev; 50795d67482SBill Paul 50895d67482SBill Paul pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, off, 4); 5096f8718a3SScott Long val = pci_read_config(dev, BGE_PCI_MEMWIN_DATA, 4); 5106f8718a3SScott Long pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, 0, 4); 5116f8718a3SScott Long return (val); 51295d67482SBill Paul } 51395d67482SBill Paul 51495d67482SBill Paul static void 5153f74909aSGleb Smirnoff bge_writemem_ind(struct bge_softc *sc, int off, int val) 51695d67482SBill Paul { 51795d67482SBill Paul device_t dev; 51895d67482SBill Paul 51995d67482SBill Paul dev = sc->bge_dev; 52095d67482SBill Paul 52195d67482SBill Paul pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, off, 4); 52295d67482SBill Paul pci_write_config(dev, BGE_PCI_MEMWIN_DATA, val, 4); 5236f8718a3SScott Long pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, 0, 4); 52495d67482SBill Paul } 52595d67482SBill Paul 52695d67482SBill Paul #ifdef notdef 5273f74909aSGleb Smirnoff static uint32_t 5283f74909aSGleb Smirnoff bge_readreg_ind(struct bge_softc *sc, int off) 52995d67482SBill Paul { 53095d67482SBill Paul device_t dev; 53195d67482SBill Paul 53295d67482SBill Paul dev = sc->bge_dev; 53395d67482SBill Paul 53495d67482SBill Paul pci_write_config(dev, BGE_PCI_REG_BASEADDR, off, 4); 53595d67482SBill Paul return (pci_read_config(dev, BGE_PCI_REG_DATA, 4)); 53695d67482SBill Paul } 53795d67482SBill Paul #endif 53895d67482SBill Paul 53995d67482SBill Paul static void 5403f74909aSGleb Smirnoff bge_writereg_ind(struct bge_softc *sc, int off, int val) 54195d67482SBill Paul { 54295d67482SBill Paul device_t dev; 54395d67482SBill Paul 54495d67482SBill Paul dev = sc->bge_dev; 54595d67482SBill Paul 54695d67482SBill Paul pci_write_config(dev, BGE_PCI_REG_BASEADDR, off, 4); 54795d67482SBill Paul pci_write_config(dev, BGE_PCI_REG_DATA, val, 4); 54895d67482SBill Paul } 54995d67482SBill Paul 5506f8718a3SScott Long static void 5516f8718a3SScott Long bge_writemem_direct(struct bge_softc *sc, int off, int val) 5526f8718a3SScott Long { 5536f8718a3SScott Long CSR_WRITE_4(sc, off, val); 5546f8718a3SScott Long } 5556f8718a3SScott Long 55638cc658fSJohn Baldwin static void 55738cc658fSJohn Baldwin bge_writembx(struct bge_softc *sc, int off, int val) 55838cc658fSJohn Baldwin { 55938cc658fSJohn Baldwin if (sc->bge_asicrev == BGE_ASICREV_BCM5906) 56038cc658fSJohn Baldwin off += BGE_LPMBX_IRQ0_HI - BGE_MBX_IRQ0_HI; 56138cc658fSJohn Baldwin 56238cc658fSJohn Baldwin CSR_WRITE_4(sc, off, val); 56338cc658fSJohn Baldwin } 56438cc658fSJohn Baldwin 565f41ac2beSBill Paul /* 566f41ac2beSBill Paul * Map a single buffer address. 567f41ac2beSBill Paul */ 568f41ac2beSBill Paul 569f41ac2beSBill Paul static void 5703f74909aSGleb Smirnoff bge_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 571f41ac2beSBill Paul { 572f41ac2beSBill Paul struct bge_dmamap_arg *ctx; 573f41ac2beSBill Paul 574f41ac2beSBill Paul if (error) 575f41ac2beSBill Paul return; 576f41ac2beSBill Paul 577f41ac2beSBill Paul ctx = arg; 578f41ac2beSBill Paul 579f41ac2beSBill Paul if (nseg > ctx->bge_maxsegs) { 580f41ac2beSBill Paul ctx->bge_maxsegs = 0; 581f41ac2beSBill Paul return; 582f41ac2beSBill Paul } 583f41ac2beSBill Paul 584f41ac2beSBill Paul ctx->bge_busaddr = segs->ds_addr; 585f41ac2beSBill Paul } 586f41ac2beSBill Paul 58738cc658fSJohn Baldwin static uint8_t 58838cc658fSJohn Baldwin bge_nvram_getbyte(struct bge_softc *sc, int addr, uint8_t *dest) 58938cc658fSJohn Baldwin { 59038cc658fSJohn Baldwin uint32_t access, byte = 0; 59138cc658fSJohn Baldwin int i; 59238cc658fSJohn Baldwin 59338cc658fSJohn Baldwin /* Lock. */ 59438cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_NVRAM_SWARB, BGE_NVRAMSWARB_SET1); 59538cc658fSJohn Baldwin for (i = 0; i < 8000; i++) { 59638cc658fSJohn Baldwin if (CSR_READ_4(sc, BGE_NVRAM_SWARB) & BGE_NVRAMSWARB_GNT1) 59738cc658fSJohn Baldwin break; 59838cc658fSJohn Baldwin DELAY(20); 59938cc658fSJohn Baldwin } 60038cc658fSJohn Baldwin if (i == 8000) 60138cc658fSJohn Baldwin return (1); 60238cc658fSJohn Baldwin 60338cc658fSJohn Baldwin /* Enable access. */ 60438cc658fSJohn Baldwin access = CSR_READ_4(sc, BGE_NVRAM_ACCESS); 60538cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_NVRAM_ACCESS, access | BGE_NVRAMACC_ENABLE); 60638cc658fSJohn Baldwin 60738cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_NVRAM_ADDR, addr & 0xfffffffc); 60838cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_NVRAM_CMD, BGE_NVRAM_READCMD); 60938cc658fSJohn Baldwin for (i = 0; i < BGE_TIMEOUT * 10; i++) { 61038cc658fSJohn Baldwin DELAY(10); 61138cc658fSJohn Baldwin if (CSR_READ_4(sc, BGE_NVRAM_CMD) & BGE_NVRAMCMD_DONE) { 61238cc658fSJohn Baldwin DELAY(10); 61338cc658fSJohn Baldwin break; 61438cc658fSJohn Baldwin } 61538cc658fSJohn Baldwin } 61638cc658fSJohn Baldwin 61738cc658fSJohn Baldwin if (i == BGE_TIMEOUT * 10) { 61838cc658fSJohn Baldwin if_printf(sc->bge_ifp, "nvram read timed out\n"); 61938cc658fSJohn Baldwin return (1); 62038cc658fSJohn Baldwin } 62138cc658fSJohn Baldwin 62238cc658fSJohn Baldwin /* Get result. */ 62338cc658fSJohn Baldwin byte = CSR_READ_4(sc, BGE_NVRAM_RDDATA); 62438cc658fSJohn Baldwin 62538cc658fSJohn Baldwin *dest = (bswap32(byte) >> ((addr % 4) * 8)) & 0xFF; 62638cc658fSJohn Baldwin 62738cc658fSJohn Baldwin /* Disable access. */ 62838cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_NVRAM_ACCESS, access); 62938cc658fSJohn Baldwin 63038cc658fSJohn Baldwin /* Unlock. */ 63138cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_NVRAM_SWARB, BGE_NVRAMSWARB_CLR1); 63238cc658fSJohn Baldwin CSR_READ_4(sc, BGE_NVRAM_SWARB); 63338cc658fSJohn Baldwin 63438cc658fSJohn Baldwin return (0); 63538cc658fSJohn Baldwin } 63638cc658fSJohn Baldwin 63738cc658fSJohn Baldwin /* 63838cc658fSJohn Baldwin * Read a sequence of bytes from NVRAM. 63938cc658fSJohn Baldwin */ 64038cc658fSJohn Baldwin static int 64138cc658fSJohn Baldwin bge_read_nvram(struct bge_softc *sc, caddr_t dest, int off, int cnt) 64238cc658fSJohn Baldwin { 64338cc658fSJohn Baldwin int err = 0, i; 64438cc658fSJohn Baldwin uint8_t byte = 0; 64538cc658fSJohn Baldwin 64638cc658fSJohn Baldwin if (sc->bge_asicrev != BGE_ASICREV_BCM5906) 64738cc658fSJohn Baldwin return (1); 64838cc658fSJohn Baldwin 64938cc658fSJohn Baldwin for (i = 0; i < cnt; i++) { 65038cc658fSJohn Baldwin err = bge_nvram_getbyte(sc, off + i, &byte); 65138cc658fSJohn Baldwin if (err) 65238cc658fSJohn Baldwin break; 65338cc658fSJohn Baldwin *(dest + i) = byte; 65438cc658fSJohn Baldwin } 65538cc658fSJohn Baldwin 65638cc658fSJohn Baldwin return (err ? 1 : 0); 65738cc658fSJohn Baldwin } 65838cc658fSJohn Baldwin 65995d67482SBill Paul /* 66095d67482SBill Paul * Read a byte of data stored in the EEPROM at address 'addr.' The 66195d67482SBill Paul * BCM570x supports both the traditional bitbang interface and an 66295d67482SBill Paul * auto access interface for reading the EEPROM. We use the auto 66395d67482SBill Paul * access method. 66495d67482SBill Paul */ 6653f74909aSGleb Smirnoff static uint8_t 6663f74909aSGleb Smirnoff bge_eeprom_getbyte(struct bge_softc *sc, int addr, uint8_t *dest) 66795d67482SBill Paul { 66895d67482SBill Paul int i; 6693f74909aSGleb Smirnoff uint32_t byte = 0; 67095d67482SBill Paul 67195d67482SBill Paul /* 67295d67482SBill Paul * Enable use of auto EEPROM access so we can avoid 67395d67482SBill Paul * having to use the bitbang method. 67495d67482SBill Paul */ 67595d67482SBill Paul BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM); 67695d67482SBill Paul 67795d67482SBill Paul /* Reset the EEPROM, load the clock period. */ 67895d67482SBill Paul CSR_WRITE_4(sc, BGE_EE_ADDR, 67995d67482SBill Paul BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL)); 68095d67482SBill Paul DELAY(20); 68195d67482SBill Paul 68295d67482SBill Paul /* Issue the read EEPROM command. */ 68395d67482SBill Paul CSR_WRITE_4(sc, BGE_EE_ADDR, BGE_EE_READCMD | addr); 68495d67482SBill Paul 68595d67482SBill Paul /* Wait for completion */ 68695d67482SBill Paul for(i = 0; i < BGE_TIMEOUT * 10; i++) { 68795d67482SBill Paul DELAY(10); 68895d67482SBill Paul if (CSR_READ_4(sc, BGE_EE_ADDR) & BGE_EEADDR_DONE) 68995d67482SBill Paul break; 69095d67482SBill Paul } 69195d67482SBill Paul 692d5d23857SJung-uk Kim if (i == BGE_TIMEOUT * 10) { 693fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "EEPROM read timed out\n"); 694f6789fbaSPyun YongHyeon return (1); 69595d67482SBill Paul } 69695d67482SBill Paul 69795d67482SBill Paul /* Get result. */ 69895d67482SBill Paul byte = CSR_READ_4(sc, BGE_EE_DATA); 69995d67482SBill Paul 7000c8aa4eaSJung-uk Kim *dest = (byte >> ((addr % 4) * 8)) & 0xFF; 70195d67482SBill Paul 70295d67482SBill Paul return (0); 70395d67482SBill Paul } 70495d67482SBill Paul 70595d67482SBill Paul /* 70695d67482SBill Paul * Read a sequence of bytes from the EEPROM. 70795d67482SBill Paul */ 70895d67482SBill Paul static int 7093f74909aSGleb Smirnoff bge_read_eeprom(struct bge_softc *sc, caddr_t dest, int off, int cnt) 71095d67482SBill Paul { 7113f74909aSGleb Smirnoff int i, error = 0; 7123f74909aSGleb Smirnoff uint8_t byte = 0; 71395d67482SBill Paul 71495d67482SBill Paul for (i = 0; i < cnt; i++) { 7153f74909aSGleb Smirnoff error = bge_eeprom_getbyte(sc, off + i, &byte); 7163f74909aSGleb Smirnoff if (error) 71795d67482SBill Paul break; 71895d67482SBill Paul *(dest + i) = byte; 71995d67482SBill Paul } 72095d67482SBill Paul 7213f74909aSGleb Smirnoff return (error ? 1 : 0); 72295d67482SBill Paul } 72395d67482SBill Paul 72495d67482SBill Paul static int 7253f74909aSGleb Smirnoff bge_miibus_readreg(device_t dev, int phy, int reg) 72695d67482SBill Paul { 72795d67482SBill Paul struct bge_softc *sc; 7283f74909aSGleb Smirnoff uint32_t val, autopoll; 72995d67482SBill Paul int i; 73095d67482SBill Paul 73195d67482SBill Paul sc = device_get_softc(dev); 73295d67482SBill Paul 7330434d1b8SBill Paul /* 7340434d1b8SBill Paul * Broadcom's own driver always assumes the internal 7350434d1b8SBill Paul * PHY is at GMII address 1. On some chips, the PHY responds 7360434d1b8SBill Paul * to accesses at all addresses, which could cause us to 7370434d1b8SBill Paul * bogusly attach the PHY 32 times at probe type. Always 7380434d1b8SBill Paul * restricting the lookup to address 1 is simpler than 7390434d1b8SBill Paul * trying to figure out which chips revisions should be 7400434d1b8SBill Paul * special-cased. 7410434d1b8SBill Paul */ 742b1265c1aSJohn Polstra if (phy != 1) 74398b28ee5SBill Paul return (0); 74498b28ee5SBill Paul 74537ceeb4dSPaul Saab /* Reading with autopolling on may trigger PCI errors */ 74637ceeb4dSPaul Saab autopoll = CSR_READ_4(sc, BGE_MI_MODE); 74737ceeb4dSPaul Saab if (autopoll & BGE_MIMODE_AUTOPOLL) { 74837ceeb4dSPaul Saab BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL); 74937ceeb4dSPaul Saab DELAY(40); 75037ceeb4dSPaul Saab } 75137ceeb4dSPaul Saab 75295d67482SBill Paul CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_READ | BGE_MICOMM_BUSY | 75395d67482SBill Paul BGE_MIPHY(phy) | BGE_MIREG(reg)); 75495d67482SBill Paul 75595d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 756d5d23857SJung-uk Kim DELAY(10); 75795d67482SBill Paul val = CSR_READ_4(sc, BGE_MI_COMM); 75895d67482SBill Paul if (!(val & BGE_MICOMM_BUSY)) 75995d67482SBill Paul break; 76095d67482SBill Paul } 76195d67482SBill Paul 76295d67482SBill Paul if (i == BGE_TIMEOUT) { 7635fea260fSMarius Strobl device_printf(sc->bge_dev, 7645fea260fSMarius Strobl "PHY read timed out (phy %d, reg %d, val 0x%08x)\n", 7655fea260fSMarius Strobl phy, reg, val); 76637ceeb4dSPaul Saab val = 0; 76737ceeb4dSPaul Saab goto done; 76895d67482SBill Paul } 76995d67482SBill Paul 77038cc658fSJohn Baldwin DELAY(5); 77195d67482SBill Paul val = CSR_READ_4(sc, BGE_MI_COMM); 77295d67482SBill Paul 77337ceeb4dSPaul Saab done: 77437ceeb4dSPaul Saab if (autopoll & BGE_MIMODE_AUTOPOLL) { 77537ceeb4dSPaul Saab BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL); 77637ceeb4dSPaul Saab DELAY(40); 77737ceeb4dSPaul Saab } 77837ceeb4dSPaul Saab 77995d67482SBill Paul if (val & BGE_MICOMM_READFAIL) 78095d67482SBill Paul return (0); 78195d67482SBill Paul 7820c8aa4eaSJung-uk Kim return (val & 0xFFFF); 78395d67482SBill Paul } 78495d67482SBill Paul 78595d67482SBill Paul static int 7863f74909aSGleb Smirnoff bge_miibus_writereg(device_t dev, int phy, int reg, int val) 78795d67482SBill Paul { 78895d67482SBill Paul struct bge_softc *sc; 7893f74909aSGleb Smirnoff uint32_t autopoll; 79095d67482SBill Paul int i; 79195d67482SBill Paul 79295d67482SBill Paul sc = device_get_softc(dev); 79395d67482SBill Paul 79438cc658fSJohn Baldwin if (sc->bge_asicrev == BGE_ASICREV_BCM5906 && 79538cc658fSJohn Baldwin (reg == BRGPHY_MII_1000CTL || reg == BRGPHY_MII_AUXCTL)) 79638cc658fSJohn Baldwin return(0); 79738cc658fSJohn Baldwin 79837ceeb4dSPaul Saab /* Reading with autopolling on may trigger PCI errors */ 79937ceeb4dSPaul Saab autopoll = CSR_READ_4(sc, BGE_MI_MODE); 80037ceeb4dSPaul Saab if (autopoll & BGE_MIMODE_AUTOPOLL) { 80137ceeb4dSPaul Saab BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL); 80237ceeb4dSPaul Saab DELAY(40); 80337ceeb4dSPaul Saab } 80437ceeb4dSPaul Saab 80595d67482SBill Paul CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_WRITE | BGE_MICOMM_BUSY | 80695d67482SBill Paul BGE_MIPHY(phy) | BGE_MIREG(reg) | val); 80795d67482SBill Paul 80895d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 809d5d23857SJung-uk Kim DELAY(10); 81038cc658fSJohn Baldwin if (!(CSR_READ_4(sc, BGE_MI_COMM) & BGE_MICOMM_BUSY)) { 81138cc658fSJohn Baldwin DELAY(5); 81238cc658fSJohn Baldwin CSR_READ_4(sc, BGE_MI_COMM); /* dummy read */ 81395d67482SBill Paul break; 814d5d23857SJung-uk Kim } 81538cc658fSJohn Baldwin } 816d5d23857SJung-uk Kim 817d5d23857SJung-uk Kim if (i == BGE_TIMEOUT) { 81838cc658fSJohn Baldwin device_printf(sc->bge_dev, 81938cc658fSJohn Baldwin "PHY write timed out (phy %d, reg %d, val %d)\n", 82038cc658fSJohn Baldwin phy, reg, val); 821d5d23857SJung-uk Kim return (0); 82295d67482SBill Paul } 82395d67482SBill Paul 82437ceeb4dSPaul Saab if (autopoll & BGE_MIMODE_AUTOPOLL) { 82537ceeb4dSPaul Saab BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL); 82637ceeb4dSPaul Saab DELAY(40); 82737ceeb4dSPaul Saab } 82837ceeb4dSPaul Saab 82995d67482SBill Paul return (0); 83095d67482SBill Paul } 83195d67482SBill Paul 83295d67482SBill Paul static void 8333f74909aSGleb Smirnoff bge_miibus_statchg(device_t dev) 83495d67482SBill Paul { 83595d67482SBill Paul struct bge_softc *sc; 83695d67482SBill Paul struct mii_data *mii; 83795d67482SBill Paul sc = device_get_softc(dev); 83895d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 83995d67482SBill Paul 84095d67482SBill Paul BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_PORTMODE); 8413f74909aSGleb Smirnoff if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) 84295d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_GMII); 8433f74909aSGleb Smirnoff else 84495d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_MII); 84595d67482SBill Paul 8463f74909aSGleb Smirnoff if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 84795d67482SBill Paul BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_HALF_DUPLEX); 8483f74909aSGleb Smirnoff else 84995d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_HALF_DUPLEX); 85095d67482SBill Paul } 85195d67482SBill Paul 85295d67482SBill Paul /* 85395d67482SBill Paul * Intialize a standard receive ring descriptor. 85495d67482SBill Paul */ 85595d67482SBill Paul static int 8563f74909aSGleb Smirnoff bge_newbuf_std(struct bge_softc *sc, int i, struct mbuf *m) 85795d67482SBill Paul { 85895d67482SBill Paul struct mbuf *m_new = NULL; 85995d67482SBill Paul struct bge_rx_bd *r; 860f41ac2beSBill Paul struct bge_dmamap_arg ctx; 861f41ac2beSBill Paul int error; 86295d67482SBill Paul 86395d67482SBill Paul if (m == NULL) { 864c3a56752SGleb Smirnoff m_new = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 865c3a56752SGleb Smirnoff if (m_new == NULL) 86695d67482SBill Paul return (ENOBUFS); 86795d67482SBill Paul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 86895d67482SBill Paul } else { 86995d67482SBill Paul m_new = m; 87095d67482SBill Paul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 87195d67482SBill Paul m_new->m_data = m_new->m_ext.ext_buf; 87295d67482SBill Paul } 87395d67482SBill Paul 874652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) == 0) 87595d67482SBill Paul m_adj(m_new, ETHER_ALIGN); 87695d67482SBill Paul sc->bge_cdata.bge_rx_std_chain[i] = m_new; 877f41ac2beSBill Paul r = &sc->bge_ldata.bge_rx_std_ring[i]; 878f41ac2beSBill Paul ctx.bge_maxsegs = 1; 879f41ac2beSBill Paul ctx.sc = sc; 880f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_mtag, 881f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[i], mtod(m_new, void *), 882f41ac2beSBill Paul m_new->m_len, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 883f41ac2beSBill Paul if (error || ctx.bge_maxsegs == 0) { 884f7cea149SGleb Smirnoff if (m == NULL) { 885f7cea149SGleb Smirnoff sc->bge_cdata.bge_rx_std_chain[i] = NULL; 886f41ac2beSBill Paul m_freem(m_new); 887f7cea149SGleb Smirnoff } 888f41ac2beSBill Paul return (ENOMEM); 889f41ac2beSBill Paul } 890e907febfSPyun YongHyeon r->bge_addr.bge_addr_lo = BGE_ADDR_LO(ctx.bge_busaddr); 891e907febfSPyun YongHyeon r->bge_addr.bge_addr_hi = BGE_ADDR_HI(ctx.bge_busaddr); 892e907febfSPyun YongHyeon r->bge_flags = BGE_RXBDFLAG_END; 893e907febfSPyun YongHyeon r->bge_len = m_new->m_len; 894e907febfSPyun YongHyeon r->bge_idx = i; 895f41ac2beSBill Paul 896f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_mtag, 897f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[i], 898f41ac2beSBill Paul BUS_DMASYNC_PREREAD); 89995d67482SBill Paul 90095d67482SBill Paul return (0); 90195d67482SBill Paul } 90295d67482SBill Paul 90395d67482SBill Paul /* 90495d67482SBill Paul * Initialize a jumbo receive ring descriptor. This allocates 90595d67482SBill Paul * a jumbo buffer from the pool managed internally by the driver. 90695d67482SBill Paul */ 90795d67482SBill Paul static int 9083f74909aSGleb Smirnoff bge_newbuf_jumbo(struct bge_softc *sc, int i, struct mbuf *m) 90995d67482SBill Paul { 9101be6acb7SGleb Smirnoff bus_dma_segment_t segs[BGE_NSEG_JUMBO]; 9111be6acb7SGleb Smirnoff struct bge_extrx_bd *r; 91295d67482SBill Paul struct mbuf *m_new = NULL; 9131be6acb7SGleb Smirnoff int nsegs; 914f41ac2beSBill Paul int error; 91595d67482SBill Paul 91695d67482SBill Paul if (m == NULL) { 917a163d034SWarner Losh MGETHDR(m_new, M_DONTWAIT, MT_DATA); 9181be6acb7SGleb Smirnoff if (m_new == NULL) 91995d67482SBill Paul return (ENOBUFS); 92095d67482SBill Paul 9211be6acb7SGleb Smirnoff m_cljget(m_new, M_DONTWAIT, MJUM9BYTES); 9221be6acb7SGleb Smirnoff if (!(m_new->m_flags & M_EXT)) { 92395d67482SBill Paul m_freem(m_new); 92495d67482SBill Paul return (ENOBUFS); 92595d67482SBill Paul } 9261be6acb7SGleb Smirnoff m_new->m_len = m_new->m_pkthdr.len = MJUM9BYTES; 92795d67482SBill Paul } else { 92895d67482SBill Paul m_new = m; 9291be6acb7SGleb Smirnoff m_new->m_len = m_new->m_pkthdr.len = MJUM9BYTES; 93095d67482SBill Paul m_new->m_data = m_new->m_ext.ext_buf; 93195d67482SBill Paul } 93295d67482SBill Paul 933652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) == 0) 93495d67482SBill Paul m_adj(m_new, ETHER_ALIGN); 9351be6acb7SGleb Smirnoff 9361be6acb7SGleb Smirnoff error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag_jumbo, 9371be6acb7SGleb Smirnoff sc->bge_cdata.bge_rx_jumbo_dmamap[i], 9381be6acb7SGleb Smirnoff m_new, segs, &nsegs, BUS_DMA_NOWAIT); 9391be6acb7SGleb Smirnoff if (error) { 9401be6acb7SGleb Smirnoff if (m == NULL) 941f41ac2beSBill Paul m_freem(m_new); 9421be6acb7SGleb Smirnoff return (error); 943f7cea149SGleb Smirnoff } 9441be6acb7SGleb Smirnoff sc->bge_cdata.bge_rx_jumbo_chain[i] = m_new; 9451be6acb7SGleb Smirnoff 9461be6acb7SGleb Smirnoff /* 9471be6acb7SGleb Smirnoff * Fill in the extended RX buffer descriptor. 9481be6acb7SGleb Smirnoff */ 9491be6acb7SGleb Smirnoff r = &sc->bge_ldata.bge_rx_jumbo_ring[i]; 9504e7ba1abSGleb Smirnoff r->bge_flags = BGE_RXBDFLAG_JUMBO_RING | BGE_RXBDFLAG_END; 9514e7ba1abSGleb Smirnoff r->bge_idx = i; 9524e7ba1abSGleb Smirnoff r->bge_len3 = r->bge_len2 = r->bge_len1 = 0; 9534e7ba1abSGleb Smirnoff switch (nsegs) { 9544e7ba1abSGleb Smirnoff case 4: 9554e7ba1abSGleb Smirnoff r->bge_addr3.bge_addr_lo = BGE_ADDR_LO(segs[3].ds_addr); 9564e7ba1abSGleb Smirnoff r->bge_addr3.bge_addr_hi = BGE_ADDR_HI(segs[3].ds_addr); 9574e7ba1abSGleb Smirnoff r->bge_len3 = segs[3].ds_len; 9584e7ba1abSGleb Smirnoff case 3: 959e907febfSPyun YongHyeon r->bge_addr2.bge_addr_lo = BGE_ADDR_LO(segs[2].ds_addr); 960e907febfSPyun YongHyeon r->bge_addr2.bge_addr_hi = BGE_ADDR_HI(segs[2].ds_addr); 961e907febfSPyun YongHyeon r->bge_len2 = segs[2].ds_len; 9624e7ba1abSGleb Smirnoff case 2: 9634e7ba1abSGleb Smirnoff r->bge_addr1.bge_addr_lo = BGE_ADDR_LO(segs[1].ds_addr); 9644e7ba1abSGleb Smirnoff r->bge_addr1.bge_addr_hi = BGE_ADDR_HI(segs[1].ds_addr); 9654e7ba1abSGleb Smirnoff r->bge_len1 = segs[1].ds_len; 9664e7ba1abSGleb Smirnoff case 1: 9674e7ba1abSGleb Smirnoff r->bge_addr0.bge_addr_lo = BGE_ADDR_LO(segs[0].ds_addr); 9684e7ba1abSGleb Smirnoff r->bge_addr0.bge_addr_hi = BGE_ADDR_HI(segs[0].ds_addr); 9694e7ba1abSGleb Smirnoff r->bge_len0 = segs[0].ds_len; 9704e7ba1abSGleb Smirnoff break; 9714e7ba1abSGleb Smirnoff default: 9724e7ba1abSGleb Smirnoff panic("%s: %d segments\n", __func__, nsegs); 9734e7ba1abSGleb Smirnoff } 974f41ac2beSBill Paul 975f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_mtag, 976f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[i], 977f41ac2beSBill Paul BUS_DMASYNC_PREREAD); 97895d67482SBill Paul 97995d67482SBill Paul return (0); 98095d67482SBill Paul } 98195d67482SBill Paul 98295d67482SBill Paul /* 98395d67482SBill Paul * The standard receive ring has 512 entries in it. At 2K per mbuf cluster, 98495d67482SBill Paul * that's 1MB or memory, which is a lot. For now, we fill only the first 98595d67482SBill Paul * 256 ring entries and hope that our CPU is fast enough to keep up with 98695d67482SBill Paul * the NIC. 98795d67482SBill Paul */ 98895d67482SBill Paul static int 9893f74909aSGleb Smirnoff bge_init_rx_ring_std(struct bge_softc *sc) 99095d67482SBill Paul { 99195d67482SBill Paul int i; 99295d67482SBill Paul 99395d67482SBill Paul for (i = 0; i < BGE_SSLOTS; i++) { 99495d67482SBill Paul if (bge_newbuf_std(sc, i, NULL) == ENOBUFS) 99595d67482SBill Paul return (ENOBUFS); 99695d67482SBill Paul }; 99795d67482SBill Paul 998f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag, 999f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map, 1000f41ac2beSBill Paul BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1001f41ac2beSBill Paul 100295d67482SBill Paul sc->bge_std = i - 1; 100338cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std); 100495d67482SBill Paul 100595d67482SBill Paul return (0); 100695d67482SBill Paul } 100795d67482SBill Paul 100895d67482SBill Paul static void 10093f74909aSGleb Smirnoff bge_free_rx_ring_std(struct bge_softc *sc) 101095d67482SBill Paul { 101195d67482SBill Paul int i; 101295d67482SBill Paul 101395d67482SBill Paul for (i = 0; i < BGE_STD_RX_RING_CNT; i++) { 101495d67482SBill Paul if (sc->bge_cdata.bge_rx_std_chain[i] != NULL) { 1015e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag, 1016e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_std_dmamap[i], 1017e65bed95SPyun YongHyeon BUS_DMASYNC_POSTREAD); 1018f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag, 1019f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[i]); 1020e65bed95SPyun YongHyeon m_freem(sc->bge_cdata.bge_rx_std_chain[i]); 1021e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_std_chain[i] = NULL; 102295d67482SBill Paul } 1023f41ac2beSBill Paul bzero((char *)&sc->bge_ldata.bge_rx_std_ring[i], 102495d67482SBill Paul sizeof(struct bge_rx_bd)); 102595d67482SBill Paul } 102695d67482SBill Paul } 102795d67482SBill Paul 102895d67482SBill Paul static int 10293f74909aSGleb Smirnoff bge_init_rx_ring_jumbo(struct bge_softc *sc) 103095d67482SBill Paul { 103195d67482SBill Paul struct bge_rcb *rcb; 10321be6acb7SGleb Smirnoff int i; 103395d67482SBill Paul 103495d67482SBill Paul for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 103595d67482SBill Paul if (bge_newbuf_jumbo(sc, i, NULL) == ENOBUFS) 103695d67482SBill Paul return (ENOBUFS); 103795d67482SBill Paul }; 103895d67482SBill Paul 1039f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag, 1040f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_ring_map, 1041f41ac2beSBill Paul BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 1042f41ac2beSBill Paul 104395d67482SBill Paul sc->bge_jumbo = i - 1; 104495d67482SBill Paul 1045f41ac2beSBill Paul rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb; 10461be6acb7SGleb Smirnoff rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0, 10471be6acb7SGleb Smirnoff BGE_RCB_FLAG_USE_EXT_RX_BD); 104867111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); 104995d67482SBill Paul 105038cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo); 105195d67482SBill Paul 105295d67482SBill Paul return (0); 105395d67482SBill Paul } 105495d67482SBill Paul 105595d67482SBill Paul static void 10563f74909aSGleb Smirnoff bge_free_rx_ring_jumbo(struct bge_softc *sc) 105795d67482SBill Paul { 105895d67482SBill Paul int i; 105995d67482SBill Paul 106095d67482SBill Paul for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 106195d67482SBill Paul if (sc->bge_cdata.bge_rx_jumbo_chain[i] != NULL) { 1062e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo, 1063e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_jumbo_dmamap[i], 1064e65bed95SPyun YongHyeon BUS_DMASYNC_POSTREAD); 1065f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo, 1066f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[i]); 1067e65bed95SPyun YongHyeon m_freem(sc->bge_cdata.bge_rx_jumbo_chain[i]); 1068e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_jumbo_chain[i] = NULL; 106995d67482SBill Paul } 1070f41ac2beSBill Paul bzero((char *)&sc->bge_ldata.bge_rx_jumbo_ring[i], 10711be6acb7SGleb Smirnoff sizeof(struct bge_extrx_bd)); 107295d67482SBill Paul } 107395d67482SBill Paul } 107495d67482SBill Paul 107595d67482SBill Paul static void 10763f74909aSGleb Smirnoff bge_free_tx_ring(struct bge_softc *sc) 107795d67482SBill Paul { 107895d67482SBill Paul int i; 107995d67482SBill Paul 1080f41ac2beSBill Paul if (sc->bge_ldata.bge_tx_ring == NULL) 108195d67482SBill Paul return; 108295d67482SBill Paul 108395d67482SBill Paul for (i = 0; i < BGE_TX_RING_CNT; i++) { 108495d67482SBill Paul if (sc->bge_cdata.bge_tx_chain[i] != NULL) { 1085e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag, 1086e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_dmamap[i], 1087e65bed95SPyun YongHyeon BUS_DMASYNC_POSTWRITE); 1088f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag, 1089f41ac2beSBill Paul sc->bge_cdata.bge_tx_dmamap[i]); 1090e65bed95SPyun YongHyeon m_freem(sc->bge_cdata.bge_tx_chain[i]); 1091e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_chain[i] = NULL; 109295d67482SBill Paul } 1093f41ac2beSBill Paul bzero((char *)&sc->bge_ldata.bge_tx_ring[i], 109495d67482SBill Paul sizeof(struct bge_tx_bd)); 109595d67482SBill Paul } 109695d67482SBill Paul } 109795d67482SBill Paul 109895d67482SBill Paul static int 10993f74909aSGleb Smirnoff bge_init_tx_ring(struct bge_softc *sc) 110095d67482SBill Paul { 110195d67482SBill Paul sc->bge_txcnt = 0; 110295d67482SBill Paul sc->bge_tx_saved_considx = 0; 11033927098fSPaul Saab 110414bbd30fSGleb Smirnoff /* Initialize transmit producer index for host-memory send ring. */ 110514bbd30fSGleb Smirnoff sc->bge_tx_prodidx = 0; 110638cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_TX_HOST_PROD0_LO, sc->bge_tx_prodidx); 110714bbd30fSGleb Smirnoff 11083927098fSPaul Saab /* 5700 b2 errata */ 1109e0ced696SPaul Saab if (sc->bge_chiprev == BGE_CHIPREV_5700_BX) 111038cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_TX_HOST_PROD0_LO, sc->bge_tx_prodidx); 11113927098fSPaul Saab 111214bbd30fSGleb Smirnoff /* NIC-memory send ring not used; initialize to zero. */ 111338cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_TX_NIC_PROD0_LO, 0); 11143927098fSPaul Saab /* 5700 b2 errata */ 1115e0ced696SPaul Saab if (sc->bge_chiprev == BGE_CHIPREV_5700_BX) 111638cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_TX_NIC_PROD0_LO, 0); 111795d67482SBill Paul 111895d67482SBill Paul return (0); 111995d67482SBill Paul } 112095d67482SBill Paul 112195d67482SBill Paul static void 11223e9b1bcaSJung-uk Kim bge_setpromisc(struct bge_softc *sc) 11233e9b1bcaSJung-uk Kim { 11243e9b1bcaSJung-uk Kim struct ifnet *ifp; 11253e9b1bcaSJung-uk Kim 11263e9b1bcaSJung-uk Kim BGE_LOCK_ASSERT(sc); 11273e9b1bcaSJung-uk Kim 11283e9b1bcaSJung-uk Kim ifp = sc->bge_ifp; 11293e9b1bcaSJung-uk Kim 113045ee6ab3SJung-uk Kim /* Enable or disable promiscuous mode as needed. */ 11313e9b1bcaSJung-uk Kim if (ifp->if_flags & IFF_PROMISC) 113245ee6ab3SJung-uk Kim BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_PROMISC); 11333e9b1bcaSJung-uk Kim else 113445ee6ab3SJung-uk Kim BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_PROMISC); 11353e9b1bcaSJung-uk Kim } 11363e9b1bcaSJung-uk Kim 11373e9b1bcaSJung-uk Kim static void 11383f74909aSGleb Smirnoff bge_setmulti(struct bge_softc *sc) 113995d67482SBill Paul { 114095d67482SBill Paul struct ifnet *ifp; 114195d67482SBill Paul struct ifmultiaddr *ifma; 11423f74909aSGleb Smirnoff uint32_t hashes[4] = { 0, 0, 0, 0 }; 114395d67482SBill Paul int h, i; 114495d67482SBill Paul 11450f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 11460f9bd73bSSam Leffler 1147fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 114895d67482SBill Paul 114995d67482SBill Paul if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 115095d67482SBill Paul for (i = 0; i < 4; i++) 11510c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), 0xFFFFFFFF); 115295d67482SBill Paul return; 115395d67482SBill Paul } 115495d67482SBill Paul 115595d67482SBill Paul /* First, zot all the existing filters. */ 115695d67482SBill Paul for (i = 0; i < 4; i++) 115795d67482SBill Paul CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), 0); 115895d67482SBill Paul 115995d67482SBill Paul /* Now program new ones. */ 116013b203d0SRobert Watson IF_ADDR_LOCK(ifp); 116195d67482SBill Paul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 116295d67482SBill Paul if (ifma->ifma_addr->sa_family != AF_LINK) 116395d67482SBill Paul continue; 11640e939c0cSChristian Weisgerber h = ether_crc32_le(LLADDR((struct sockaddr_dl *) 11650c8aa4eaSJung-uk Kim ifma->ifma_addr), ETHER_ADDR_LEN) & 0x7F; 11660c8aa4eaSJung-uk Kim hashes[(h & 0x60) >> 5] |= 1 << (h & 0x1F); 116795d67482SBill Paul } 116813b203d0SRobert Watson IF_ADDR_UNLOCK(ifp); 116995d67482SBill Paul 117095d67482SBill Paul for (i = 0; i < 4; i++) 117195d67482SBill Paul CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), hashes[i]); 117295d67482SBill Paul } 117395d67482SBill Paul 11748cb1383cSDoug Ambrisko static void 1175cb2eacc7SYaroslav Tykhiy bge_setvlan(struct bge_softc *sc) 1176cb2eacc7SYaroslav Tykhiy { 1177cb2eacc7SYaroslav Tykhiy struct ifnet *ifp; 1178cb2eacc7SYaroslav Tykhiy 1179cb2eacc7SYaroslav Tykhiy BGE_LOCK_ASSERT(sc); 1180cb2eacc7SYaroslav Tykhiy 1181cb2eacc7SYaroslav Tykhiy ifp = sc->bge_ifp; 1182cb2eacc7SYaroslav Tykhiy 1183cb2eacc7SYaroslav Tykhiy /* Enable or disable VLAN tag stripping as needed. */ 1184cb2eacc7SYaroslav Tykhiy if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 1185cb2eacc7SYaroslav Tykhiy BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_KEEP_VLAN_DIAG); 1186cb2eacc7SYaroslav Tykhiy else 1187cb2eacc7SYaroslav Tykhiy BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_KEEP_VLAN_DIAG); 1188cb2eacc7SYaroslav Tykhiy } 1189cb2eacc7SYaroslav Tykhiy 1190cb2eacc7SYaroslav Tykhiy static void 11918cb1383cSDoug Ambrisko bge_sig_pre_reset(sc, type) 11928cb1383cSDoug Ambrisko struct bge_softc *sc; 11938cb1383cSDoug Ambrisko int type; 11948cb1383cSDoug Ambrisko { 11958cb1383cSDoug Ambrisko /* 11968cb1383cSDoug Ambrisko * Some chips don't like this so only do this if ASF is enabled 11978cb1383cSDoug Ambrisko */ 11988cb1383cSDoug Ambrisko if (sc->bge_asf_mode) 11998cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER); 12008cb1383cSDoug Ambrisko 12018cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) { 12028cb1383cSDoug Ambrisko switch (type) { 12038cb1383cSDoug Ambrisko case BGE_RESET_START: 12048cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */ 12058cb1383cSDoug Ambrisko break; 12068cb1383cSDoug Ambrisko case BGE_RESET_STOP: 12078cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */ 12088cb1383cSDoug Ambrisko break; 12098cb1383cSDoug Ambrisko } 12108cb1383cSDoug Ambrisko } 12118cb1383cSDoug Ambrisko } 12128cb1383cSDoug Ambrisko 12138cb1383cSDoug Ambrisko static void 12148cb1383cSDoug Ambrisko bge_sig_post_reset(sc, type) 12158cb1383cSDoug Ambrisko struct bge_softc *sc; 12168cb1383cSDoug Ambrisko int type; 12178cb1383cSDoug Ambrisko { 12188cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) { 12198cb1383cSDoug Ambrisko switch (type) { 12208cb1383cSDoug Ambrisko case BGE_RESET_START: 12218cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000001); 12228cb1383cSDoug Ambrisko /* START DONE */ 12238cb1383cSDoug Ambrisko break; 12248cb1383cSDoug Ambrisko case BGE_RESET_STOP: 12258cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000002); 12268cb1383cSDoug Ambrisko break; 12278cb1383cSDoug Ambrisko } 12288cb1383cSDoug Ambrisko } 12298cb1383cSDoug Ambrisko } 12308cb1383cSDoug Ambrisko 12318cb1383cSDoug Ambrisko static void 12328cb1383cSDoug Ambrisko bge_sig_legacy(sc, type) 12338cb1383cSDoug Ambrisko struct bge_softc *sc; 12348cb1383cSDoug Ambrisko int type; 12358cb1383cSDoug Ambrisko { 12368cb1383cSDoug Ambrisko if (sc->bge_asf_mode) { 12378cb1383cSDoug Ambrisko switch (type) { 12388cb1383cSDoug Ambrisko case BGE_RESET_START: 12398cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */ 12408cb1383cSDoug Ambrisko break; 12418cb1383cSDoug Ambrisko case BGE_RESET_STOP: 12428cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */ 12438cb1383cSDoug Ambrisko break; 12448cb1383cSDoug Ambrisko } 12458cb1383cSDoug Ambrisko } 12468cb1383cSDoug Ambrisko } 12478cb1383cSDoug Ambrisko 12488cb1383cSDoug Ambrisko void bge_stop_fw(struct bge_softc *); 12498cb1383cSDoug Ambrisko void 12508cb1383cSDoug Ambrisko bge_stop_fw(sc) 12518cb1383cSDoug Ambrisko struct bge_softc *sc; 12528cb1383cSDoug Ambrisko { 12538cb1383cSDoug Ambrisko int i; 12548cb1383cSDoug Ambrisko 12558cb1383cSDoug Ambrisko if (sc->bge_asf_mode) { 12568cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM_FW, BGE_FW_PAUSE); 12578cb1383cSDoug Ambrisko CSR_WRITE_4(sc, BGE_CPU_EVENT, 125839153c5aSJung-uk Kim CSR_READ_4(sc, BGE_CPU_EVENT) | (1 << 14)); 12598cb1383cSDoug Ambrisko 12608cb1383cSDoug Ambrisko for (i = 0; i < 100; i++ ) { 12618cb1383cSDoug Ambrisko if (!(CSR_READ_4(sc, BGE_CPU_EVENT) & (1 << 14))) 12628cb1383cSDoug Ambrisko break; 12638cb1383cSDoug Ambrisko DELAY(10); 12648cb1383cSDoug Ambrisko } 12658cb1383cSDoug Ambrisko } 12668cb1383cSDoug Ambrisko } 12678cb1383cSDoug Ambrisko 126895d67482SBill Paul /* 126995d67482SBill Paul * Do endian, PCI and DMA initialization. Also check the on-board ROM 127095d67482SBill Paul * self-test results. 127195d67482SBill Paul */ 127295d67482SBill Paul static int 12733f74909aSGleb Smirnoff bge_chipinit(struct bge_softc *sc) 127495d67482SBill Paul { 12753f74909aSGleb Smirnoff uint32_t dma_rw_ctl; 127695d67482SBill Paul int i; 127795d67482SBill Paul 12788cb1383cSDoug Ambrisko /* Set endianness before we access any non-PCI registers. */ 1279e907febfSPyun YongHyeon pci_write_config(sc->bge_dev, BGE_PCI_MISC_CTL, BGE_INIT, 4); 128095d67482SBill Paul 128195d67482SBill Paul /* 128295d67482SBill Paul * Check the 'ROM failed' bit on the RX CPU to see if 128308013fd3SMarius Strobl * self-tests passed. Skip this check when there's no 12845fea260fSMarius Strobl * chip containing the Ethernet address fitted, since 12855fea260fSMarius Strobl * in that case it will always fail. 128695d67482SBill Paul */ 12875fea260fSMarius Strobl if ((sc->bge_flags & BGE_FLAG_EADDR) && 128808013fd3SMarius Strobl CSR_READ_4(sc, BGE_RXCPU_MODE) & BGE_RXCPUMODE_ROMFAIL) { 12890c8aa4eaSJung-uk Kim device_printf(sc->bge_dev, "RX CPU self-diagnostics failed!\n"); 129095d67482SBill Paul return (ENODEV); 129195d67482SBill Paul } 129295d67482SBill Paul 129395d67482SBill Paul /* Clear the MAC control register */ 129495d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_MODE, 0); 129595d67482SBill Paul 129695d67482SBill Paul /* 129795d67482SBill Paul * Clear the MAC statistics block in the NIC's 129895d67482SBill Paul * internal memory. 129995d67482SBill Paul */ 130095d67482SBill Paul for (i = BGE_STATS_BLOCK; 13013f74909aSGleb Smirnoff i < BGE_STATS_BLOCK_END + 1; i += sizeof(uint32_t)) 130295d67482SBill Paul BGE_MEMWIN_WRITE(sc, i, 0); 130395d67482SBill Paul 130495d67482SBill Paul for (i = BGE_STATUS_BLOCK; 13053f74909aSGleb Smirnoff i < BGE_STATUS_BLOCK_END + 1; i += sizeof(uint32_t)) 130695d67482SBill Paul BGE_MEMWIN_WRITE(sc, i, 0); 130795d67482SBill Paul 1308186f842bSJung-uk Kim /* 1309186f842bSJung-uk Kim * Set up the PCI DMA control register. 1310186f842bSJung-uk Kim */ 1311186f842bSJung-uk Kim dma_rw_ctl = BGE_PCIDMARWCTL_RD_CMD_SHIFT(6) | 1312186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_CMD_SHIFT(7); 1313652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_PCIE) { 1314186f842bSJung-uk Kim /* Read watermark not used, 128 bytes for write. */ 1315186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(3); 1316652ae483SGleb Smirnoff } else if (sc->bge_flags & BGE_FLAG_PCIX) { 13174c0da0ffSGleb Smirnoff if (BGE_IS_5714_FAMILY(sc)) { 1318186f842bSJung-uk Kim /* 256 bytes for read and write. */ 1319186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(2) | 1320186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_WAT_SHIFT(2); 1321186f842bSJung-uk Kim dma_rw_ctl |= (sc->bge_asicrev == BGE_ASICREV_BCM5780) ? 1322186f842bSJung-uk Kim BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL : 1323186f842bSJung-uk Kim BGE_PCIDMARWCTL_ONEDMA_ATONCE_LOCAL; 1324186f842bSJung-uk Kim } else if (sc->bge_asicrev == BGE_ASICREV_BCM5704) { 1325186f842bSJung-uk Kim /* 1536 bytes for read, 384 bytes for write. */ 1326186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(7) | 1327186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_WAT_SHIFT(3); 1328186f842bSJung-uk Kim } else { 1329186f842bSJung-uk Kim /* 384 bytes for read and write. */ 1330186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(3) | 1331186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_WAT_SHIFT(3) | 13320c8aa4eaSJung-uk Kim 0x0F; 1333186f842bSJung-uk Kim } 1334e0ced696SPaul Saab if (sc->bge_asicrev == BGE_ASICREV_BCM5703 || 1335e0ced696SPaul Saab sc->bge_asicrev == BGE_ASICREV_BCM5704) { 13363f74909aSGleb Smirnoff uint32_t tmp; 13375cba12d3SPaul Saab 1338186f842bSJung-uk Kim /* Set ONE_DMA_AT_ONCE for hardware workaround. */ 13390c8aa4eaSJung-uk Kim tmp = CSR_READ_4(sc, BGE_PCI_CLKCTL) & 0x1F; 1340186f842bSJung-uk Kim if (tmp == 6 || tmp == 7) 1341186f842bSJung-uk Kim dma_rw_ctl |= 1342186f842bSJung-uk Kim BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL; 13435cba12d3SPaul Saab 1344186f842bSJung-uk Kim /* Set PCI-X DMA write workaround. */ 1345186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_ASRT_ALL_BE; 1346186f842bSJung-uk Kim } 1347186f842bSJung-uk Kim } else { 1348186f842bSJung-uk Kim /* Conventional PCI bus: 256 bytes for read and write. */ 1349186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(7) | 1350186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_WAT_SHIFT(7); 1351186f842bSJung-uk Kim 1352186f842bSJung-uk Kim if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && 1353186f842bSJung-uk Kim sc->bge_asicrev != BGE_ASICREV_BCM5750) 1354186f842bSJung-uk Kim dma_rw_ctl |= 0x0F; 1355186f842bSJung-uk Kim } 1356186f842bSJung-uk Kim if (sc->bge_asicrev == BGE_ASICREV_BCM5700 || 1357186f842bSJung-uk Kim sc->bge_asicrev == BGE_ASICREV_BCM5701) 1358186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_USE_MRM | 1359186f842bSJung-uk Kim BGE_PCIDMARWCTL_ASRT_ALL_BE; 1360e0ced696SPaul Saab if (sc->bge_asicrev == BGE_ASICREV_BCM5703 || 1361186f842bSJung-uk Kim sc->bge_asicrev == BGE_ASICREV_BCM5704) 13625cba12d3SPaul Saab dma_rw_ctl &= ~BGE_PCIDMARWCTL_MINDMA; 13635cba12d3SPaul Saab pci_write_config(sc->bge_dev, BGE_PCI_DMA_RW_CTL, dma_rw_ctl, 4); 136495d67482SBill Paul 136595d67482SBill Paul /* 136695d67482SBill Paul * Set up general mode register. 136795d67482SBill Paul */ 1368e907febfSPyun YongHyeon CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS | 136995d67482SBill Paul BGE_MODECTL_MAC_ATTN_INTR | BGE_MODECTL_HOST_SEND_BDS | 1370ee7ef91cSOleg Bulyzhin BGE_MODECTL_TX_NO_PHDR_CSUM); 137195d67482SBill Paul 137295d67482SBill Paul /* 137390447aadSMarius Strobl * BCM5701 B5 have a bug causing data corruption when using 137490447aadSMarius Strobl * 64-bit DMA reads, which can be terminated early and then 137590447aadSMarius Strobl * completed later as 32-bit accesses, in combination with 137690447aadSMarius Strobl * certain bridges. 137790447aadSMarius Strobl */ 137890447aadSMarius Strobl if (sc->bge_asicrev == BGE_ASICREV_BCM5701 && 137990447aadSMarius Strobl sc->bge_chipid == BGE_CHIPID_BCM5701_B5) 138090447aadSMarius Strobl BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_FORCE_PCI32); 138190447aadSMarius Strobl 138290447aadSMarius Strobl /* 13838cb1383cSDoug Ambrisko * Tell the firmware the driver is running 13848cb1383cSDoug Ambrisko */ 13858cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) 13868cb1383cSDoug Ambrisko BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 13878cb1383cSDoug Ambrisko 13888cb1383cSDoug Ambrisko /* 1389ea13bdd5SJohn Polstra * Disable memory write invalidate. Apparently it is not supported 1390ea13bdd5SJohn Polstra * properly by these devices. 139195d67482SBill Paul */ 1392ea13bdd5SJohn Polstra PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, PCIM_CMD_MWIEN, 4); 139395d67482SBill Paul 139495d67482SBill Paul /* Set the timer prescaler (always 66Mhz) */ 13950c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ); 139695d67482SBill Paul 139738cc658fSJohn Baldwin /* XXX: The Linux tg3 driver does this at the start of brgphy_reset. */ 139838cc658fSJohn Baldwin if (sc->bge_asicrev == BGE_ASICREV_BCM5906) { 139938cc658fSJohn Baldwin DELAY(40); /* XXX */ 140038cc658fSJohn Baldwin 140138cc658fSJohn Baldwin /* Put PHY into ready state */ 140238cc658fSJohn Baldwin BGE_CLRBIT(sc, BGE_MISC_CFG, BGE_MISCCFG_EPHY_IDDQ); 140338cc658fSJohn Baldwin CSR_READ_4(sc, BGE_MISC_CFG); /* Flush */ 140438cc658fSJohn Baldwin DELAY(40); 140538cc658fSJohn Baldwin } 140638cc658fSJohn Baldwin 140795d67482SBill Paul return (0); 140895d67482SBill Paul } 140995d67482SBill Paul 141095d67482SBill Paul static int 14113f74909aSGleb Smirnoff bge_blockinit(struct bge_softc *sc) 141295d67482SBill Paul { 141395d67482SBill Paul struct bge_rcb *rcb; 1414e907febfSPyun YongHyeon bus_size_t vrcb; 1415e907febfSPyun YongHyeon bge_hostaddr taddr; 14166f8718a3SScott Long uint32_t val; 141795d67482SBill Paul int i; 141895d67482SBill Paul 141995d67482SBill Paul /* 142095d67482SBill Paul * Initialize the memory window pointer register so that 142195d67482SBill Paul * we can access the first 32K of internal NIC RAM. This will 142295d67482SBill Paul * allow us to set up the TX send ring RCBs and the RX return 142395d67482SBill Paul * ring RCBs, plus other things which live in NIC memory. 142495d67482SBill Paul */ 142595d67482SBill Paul CSR_WRITE_4(sc, BGE_PCI_MEMWIN_BASEADDR, 0); 142695d67482SBill Paul 1427822f63fcSBill Paul /* Note: the BCM5704 has a smaller mbuf space than other chips. */ 1428822f63fcSBill Paul 14297ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 143095d67482SBill Paul /* Configure mbuf memory pool */ 14310dae9719SJung-uk Kim CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR, BGE_BUFFPOOL_1); 1432822f63fcSBill Paul if (sc->bge_asicrev == BGE_ASICREV_BCM5704) 1433822f63fcSBill Paul CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x10000); 1434822f63fcSBill Paul else 143595d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x18000); 143695d67482SBill Paul 143795d67482SBill Paul /* Configure DMA resource pool */ 14380434d1b8SBill Paul CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_BASEADDR, 14390434d1b8SBill Paul BGE_DMA_DESCRIPTORS); 144095d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LEN, 0x2000); 14410434d1b8SBill Paul } 144295d67482SBill Paul 144395d67482SBill Paul /* Configure mbuf pool watermarks */ 144438cc658fSJohn Baldwin if (!BGE_IS_5705_PLUS(sc)) { 1445fa228020SPaul Saab CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x50); 1446fa228020SPaul Saab CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x20); 1447fa228020SPaul Saab CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60); 144838cc658fSJohn Baldwin } else if (sc->bge_asicrev == BGE_ASICREV_BCM5906) { 144938cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0); 145038cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x04); 145138cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x10); 145238cc658fSJohn Baldwin } else { 145338cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0); 145438cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10); 145538cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60); 145638cc658fSJohn Baldwin } 145795d67482SBill Paul 145895d67482SBill Paul /* Configure DMA resource watermarks */ 145995d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LOWAT, 5); 146095d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_HIWAT, 10); 146195d67482SBill Paul 146295d67482SBill Paul /* Enable buffer manager */ 14637ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 146495d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_MODE, 146595d67482SBill Paul BGE_BMANMODE_ENABLE | BGE_BMANMODE_LOMBUF_ATTN); 146695d67482SBill Paul 146795d67482SBill Paul /* Poll for buffer manager start indication */ 146895d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 1469d5d23857SJung-uk Kim DELAY(10); 14700c8aa4eaSJung-uk Kim if (CSR_READ_4(sc, BGE_BMAN_MODE) & BGE_BMANMODE_ENABLE) 147195d67482SBill Paul break; 147295d67482SBill Paul } 147395d67482SBill Paul 147495d67482SBill Paul if (i == BGE_TIMEOUT) { 1475fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 1476fe806fdaSPyun YongHyeon "buffer manager failed to start\n"); 147795d67482SBill Paul return (ENXIO); 147895d67482SBill Paul } 14790434d1b8SBill Paul } 148095d67482SBill Paul 148195d67482SBill Paul /* Enable flow-through queues */ 14820c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF); 148395d67482SBill Paul CSR_WRITE_4(sc, BGE_FTQ_RESET, 0); 148495d67482SBill Paul 148595d67482SBill Paul /* Wait until queue initialization is complete */ 148695d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 1487d5d23857SJung-uk Kim DELAY(10); 148895d67482SBill Paul if (CSR_READ_4(sc, BGE_FTQ_RESET) == 0) 148995d67482SBill Paul break; 149095d67482SBill Paul } 149195d67482SBill Paul 149295d67482SBill Paul if (i == BGE_TIMEOUT) { 1493fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "flow-through queue init failed\n"); 149495d67482SBill Paul return (ENXIO); 149595d67482SBill Paul } 149695d67482SBill Paul 149795d67482SBill Paul /* Initialize the standard RX ring control block */ 1498f41ac2beSBill Paul rcb = &sc->bge_ldata.bge_info.bge_std_rx_rcb; 1499f41ac2beSBill Paul rcb->bge_hostaddr.bge_addr_lo = 1500f41ac2beSBill Paul BGE_ADDR_LO(sc->bge_ldata.bge_rx_std_ring_paddr); 1501f41ac2beSBill Paul rcb->bge_hostaddr.bge_addr_hi = 1502f41ac2beSBill Paul BGE_ADDR_HI(sc->bge_ldata.bge_rx_std_ring_paddr); 1503f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag, 1504f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREREAD); 15057ee00338SJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 15060434d1b8SBill Paul rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0); 15070434d1b8SBill Paul else 15080434d1b8SBill Paul rcb->bge_maxlen_flags = 15090434d1b8SBill Paul BGE_RCB_MAXLEN_FLAGS(BGE_MAX_FRAMELEN, 0); 151095d67482SBill Paul rcb->bge_nicaddr = BGE_STD_RX_RINGS; 15110c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi); 15120c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo); 1513f41ac2beSBill Paul 151467111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); 151567111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr); 151695d67482SBill Paul 151795d67482SBill Paul /* 151895d67482SBill Paul * Initialize the jumbo RX ring control block 151995d67482SBill Paul * We set the 'ring disabled' bit in the flags 152095d67482SBill Paul * field until we're actually ready to start 152195d67482SBill Paul * using this ring (i.e. once we set the MTU 152295d67482SBill Paul * high enough to require it). 152395d67482SBill Paul */ 15244c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc)) { 1525f41ac2beSBill Paul rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb; 1526f41ac2beSBill Paul 1527f41ac2beSBill Paul rcb->bge_hostaddr.bge_addr_lo = 1528f41ac2beSBill Paul BGE_ADDR_LO(sc->bge_ldata.bge_rx_jumbo_ring_paddr); 1529f41ac2beSBill Paul rcb->bge_hostaddr.bge_addr_hi = 1530f41ac2beSBill Paul BGE_ADDR_HI(sc->bge_ldata.bge_rx_jumbo_ring_paddr); 1531f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag, 1532f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_ring_map, 1533f41ac2beSBill Paul BUS_DMASYNC_PREREAD); 15341be6acb7SGleb Smirnoff rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0, 15351be6acb7SGleb Smirnoff BGE_RCB_FLAG_USE_EXT_RX_BD | BGE_RCB_FLAG_RING_DISABLED); 153695d67482SBill Paul rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS; 153767111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI, 153867111612SJohn Polstra rcb->bge_hostaddr.bge_addr_hi); 153967111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO, 154067111612SJohn Polstra rcb->bge_hostaddr.bge_addr_lo); 1541f41ac2beSBill Paul 15420434d1b8SBill Paul CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, 15430434d1b8SBill Paul rcb->bge_maxlen_flags); 154467111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR, rcb->bge_nicaddr); 154595d67482SBill Paul 154695d67482SBill Paul /* Set up dummy disabled mini ring RCB */ 1547f41ac2beSBill Paul rcb = &sc->bge_ldata.bge_info.bge_mini_rx_rcb; 154867111612SJohn Polstra rcb->bge_maxlen_flags = 154967111612SJohn Polstra BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED); 15500434d1b8SBill Paul CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS, 15510434d1b8SBill Paul rcb->bge_maxlen_flags); 15520434d1b8SBill Paul } 155395d67482SBill Paul 155495d67482SBill Paul /* 155595d67482SBill Paul * Set the BD ring replentish thresholds. The recommended 155695d67482SBill Paul * values are 1/8th the number of descriptors allocated to 155795d67482SBill Paul * each ring. 15589ba784dbSScott Long * XXX The 5754 requires a lower threshold, so it might be a 15599ba784dbSScott Long * requirement of all 575x family chips. The Linux driver sets 15609ba784dbSScott Long * the lower threshold for all 5705 family chips as well, but there 15619ba784dbSScott Long * are reports that it might not need to be so strict. 156238cc658fSJohn Baldwin * 156338cc658fSJohn Baldwin * XXX Linux does some extra fiddling here for the 5906 parts as 156438cc658fSJohn Baldwin * well. 156595d67482SBill Paul */ 15665345bad0SScott Long if (BGE_IS_5705_PLUS(sc)) 15676f8718a3SScott Long val = 8; 15686f8718a3SScott Long else 15696f8718a3SScott Long val = BGE_STD_RX_RING_CNT / 8; 15706f8718a3SScott Long CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, val); 157195d67482SBill Paul CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, BGE_JUMBO_RX_RING_CNT/8); 157295d67482SBill Paul 157395d67482SBill Paul /* 157495d67482SBill Paul * Disable all unused send rings by setting the 'ring disabled' 157595d67482SBill Paul * bit in the flags field of all the TX send ring control blocks. 157695d67482SBill Paul * These are located in NIC memory. 157795d67482SBill Paul */ 1578e907febfSPyun YongHyeon vrcb = BGE_MEMWIN_START + BGE_SEND_RING_RCB; 157995d67482SBill Paul for (i = 0; i < BGE_TX_RINGS_EXTSSRAM_MAX; i++) { 1580e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_maxlen_flags, 1581e907febfSPyun YongHyeon BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED)); 1582e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_nicaddr, 0); 1583e907febfSPyun YongHyeon vrcb += sizeof(struct bge_rcb); 158495d67482SBill Paul } 158595d67482SBill Paul 158695d67482SBill Paul /* Configure TX RCB 0 (we use only the first ring) */ 1587e907febfSPyun YongHyeon vrcb = BGE_MEMWIN_START + BGE_SEND_RING_RCB; 1588e907febfSPyun YongHyeon BGE_HOSTADDR(taddr, sc->bge_ldata.bge_tx_ring_paddr); 1589e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_hi, taddr.bge_addr_hi); 1590e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_lo, taddr.bge_addr_lo); 1591e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_nicaddr, 1592e907febfSPyun YongHyeon BGE_NIC_TXRING_ADDR(0, BGE_TX_RING_CNT)); 15937ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 1594e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_maxlen_flags, 1595e907febfSPyun YongHyeon BGE_RCB_MAXLEN_FLAGS(BGE_TX_RING_CNT, 0)); 159695d67482SBill Paul 159795d67482SBill Paul /* Disable all unused RX return rings */ 1598e907febfSPyun YongHyeon vrcb = BGE_MEMWIN_START + BGE_RX_RETURN_RING_RCB; 159995d67482SBill Paul for (i = 0; i < BGE_RX_RINGS_MAX; i++) { 1600e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_hi, 0); 1601e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_lo, 0); 1602e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_maxlen_flags, 16030434d1b8SBill Paul BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt, 1604e907febfSPyun YongHyeon BGE_RCB_FLAG_RING_DISABLED)); 1605e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_nicaddr, 0); 160638cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_CONS0_LO + 16073f74909aSGleb Smirnoff (i * (sizeof(uint64_t))), 0); 1608e907febfSPyun YongHyeon vrcb += sizeof(struct bge_rcb); 160995d67482SBill Paul } 161095d67482SBill Paul 161195d67482SBill Paul /* Initialize RX ring indexes */ 161238cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_STD_PROD_LO, 0); 161338cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_JUMBO_PROD_LO, 0); 161438cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_MINI_PROD_LO, 0); 161595d67482SBill Paul 161695d67482SBill Paul /* 161795d67482SBill Paul * Set up RX return ring 0 161895d67482SBill Paul * Note that the NIC address for RX return rings is 0x00000000. 161995d67482SBill Paul * The return rings live entirely within the host, so the 162095d67482SBill Paul * nicaddr field in the RCB isn't used. 162195d67482SBill Paul */ 1622e907febfSPyun YongHyeon vrcb = BGE_MEMWIN_START + BGE_RX_RETURN_RING_RCB; 1623e907febfSPyun YongHyeon BGE_HOSTADDR(taddr, sc->bge_ldata.bge_rx_return_ring_paddr); 1624e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_hi, taddr.bge_addr_hi); 1625e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_lo, taddr.bge_addr_lo); 1626e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_nicaddr, 0x00000000); 1627e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_maxlen_flags, 1628e907febfSPyun YongHyeon BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt, 0)); 162995d67482SBill Paul 163095d67482SBill Paul /* Set random backoff seed for TX */ 163195d67482SBill Paul CSR_WRITE_4(sc, BGE_TX_RANDOM_BACKOFF, 16324a0d6638SRuslan Ermilov IF_LLADDR(sc->bge_ifp)[0] + IF_LLADDR(sc->bge_ifp)[1] + 16334a0d6638SRuslan Ermilov IF_LLADDR(sc->bge_ifp)[2] + IF_LLADDR(sc->bge_ifp)[3] + 16344a0d6638SRuslan Ermilov IF_LLADDR(sc->bge_ifp)[4] + IF_LLADDR(sc->bge_ifp)[5] + 163595d67482SBill Paul BGE_TX_BACKOFF_SEED_MASK); 163695d67482SBill Paul 163795d67482SBill Paul /* Set inter-packet gap */ 163895d67482SBill Paul CSR_WRITE_4(sc, BGE_TX_LENGTHS, 0x2620); 163995d67482SBill Paul 164095d67482SBill Paul /* 164195d67482SBill Paul * Specify which ring to use for packets that don't match 164295d67482SBill Paul * any RX rules. 164395d67482SBill Paul */ 164495d67482SBill Paul CSR_WRITE_4(sc, BGE_RX_RULES_CFG, 0x08); 164595d67482SBill Paul 164695d67482SBill Paul /* 164795d67482SBill Paul * Configure number of RX lists. One interrupt distribution 164895d67482SBill Paul * list, sixteen active lists, one bad frames class. 164995d67482SBill Paul */ 165095d67482SBill Paul CSR_WRITE_4(sc, BGE_RXLP_CFG, 0x181); 165195d67482SBill Paul 165295d67482SBill Paul /* Inialize RX list placement stats mask. */ 16530c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, 0x007FFFFF); 165495d67482SBill Paul CSR_WRITE_4(sc, BGE_RXLP_STATS_CTL, 0x1); 165595d67482SBill Paul 165695d67482SBill Paul /* Disable host coalescing until we get it set up */ 165795d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_MODE, 0x00000000); 165895d67482SBill Paul 165995d67482SBill Paul /* Poll to make sure it's shut down. */ 166095d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 1661d5d23857SJung-uk Kim DELAY(10); 166295d67482SBill Paul if (!(CSR_READ_4(sc, BGE_HCC_MODE) & BGE_HCCMODE_ENABLE)) 166395d67482SBill Paul break; 166495d67482SBill Paul } 166595d67482SBill Paul 166695d67482SBill Paul if (i == BGE_TIMEOUT) { 1667fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 1668fe806fdaSPyun YongHyeon "host coalescing engine failed to idle\n"); 166995d67482SBill Paul return (ENXIO); 167095d67482SBill Paul } 167195d67482SBill Paul 167295d67482SBill Paul /* Set up host coalescing defaults */ 167395d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS, sc->bge_rx_coal_ticks); 167495d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, sc->bge_tx_coal_ticks); 167595d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, sc->bge_rx_max_coal_bds); 167695d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, sc->bge_tx_max_coal_bds); 16777ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 167895d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS_INT, 0); 167995d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS_INT, 0); 16800434d1b8SBill Paul } 1681b64728e5SBruce Evans CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS_INT, 1); 1682b64728e5SBruce Evans CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS_INT, 1); 168395d67482SBill Paul 168495d67482SBill Paul /* Set up address of statistics block */ 16857ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 1686f41ac2beSBill Paul CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_HI, 1687f41ac2beSBill Paul BGE_ADDR_HI(sc->bge_ldata.bge_stats_paddr)); 168895d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_LO, 1689f41ac2beSBill Paul BGE_ADDR_LO(sc->bge_ldata.bge_stats_paddr)); 16900434d1b8SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATS_BASEADDR, BGE_STATS_BLOCK); 169195d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_BASEADDR, BGE_STATUS_BLOCK); 16920434d1b8SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATS_TICKS, sc->bge_stat_ticks); 16930434d1b8SBill Paul } 16940434d1b8SBill Paul 16950434d1b8SBill Paul /* Set up address of status block */ 1696f41ac2beSBill Paul CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_HI, 1697f41ac2beSBill Paul BGE_ADDR_HI(sc->bge_ldata.bge_status_block_paddr)); 169895d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_LO, 1699f41ac2beSBill Paul BGE_ADDR_LO(sc->bge_ldata.bge_status_block_paddr)); 1700f41ac2beSBill Paul sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx = 0; 1701f41ac2beSBill Paul sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx = 0; 170295d67482SBill Paul 170395d67482SBill Paul /* Turn on host coalescing state machine */ 170495d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE); 170595d67482SBill Paul 170695d67482SBill Paul /* Turn on RX BD completion state machine and enable attentions */ 170795d67482SBill Paul CSR_WRITE_4(sc, BGE_RBDC_MODE, 170895d67482SBill Paul BGE_RBDCMODE_ENABLE | BGE_RBDCMODE_ATTN); 170995d67482SBill Paul 171095d67482SBill Paul /* Turn on RX list placement state machine */ 171195d67482SBill Paul CSR_WRITE_4(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE); 171295d67482SBill Paul 171395d67482SBill Paul /* Turn on RX list selector state machine. */ 17147ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 171595d67482SBill Paul CSR_WRITE_4(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE); 171695d67482SBill Paul 171795d67482SBill Paul /* Turn on DMA, clear stats */ 171895d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_MODE, BGE_MACMODE_TXDMA_ENB | 171995d67482SBill Paul BGE_MACMODE_RXDMA_ENB | BGE_MACMODE_RX_STATS_CLEAR | 172095d67482SBill Paul BGE_MACMODE_TX_STATS_CLEAR | BGE_MACMODE_RX_STATS_ENB | 172195d67482SBill Paul BGE_MACMODE_TX_STATS_ENB | BGE_MACMODE_FRMHDR_DMA_ENB | 1722652ae483SGleb Smirnoff ((sc->bge_flags & BGE_FLAG_TBI) ? 1723652ae483SGleb Smirnoff BGE_PORTMODE_TBI : BGE_PORTMODE_MII)); 172495d67482SBill Paul 172595d67482SBill Paul /* Set misc. local control, enable interrupts on attentions */ 172695d67482SBill Paul CSR_WRITE_4(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_ONATTN); 172795d67482SBill Paul 172895d67482SBill Paul #ifdef notdef 172995d67482SBill Paul /* Assert GPIO pins for PHY reset */ 173095d67482SBill Paul BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_MISCIO_OUT0 | 173195d67482SBill Paul BGE_MLC_MISCIO_OUT1 | BGE_MLC_MISCIO_OUT2); 173295d67482SBill Paul BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_MISCIO_OUTEN0 | 173395d67482SBill Paul BGE_MLC_MISCIO_OUTEN1 | BGE_MLC_MISCIO_OUTEN2); 173495d67482SBill Paul #endif 173595d67482SBill Paul 173695d67482SBill Paul /* Turn on DMA completion state machine */ 17377ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 173895d67482SBill Paul CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE); 173995d67482SBill Paul 17406f8718a3SScott Long val = BGE_WDMAMODE_ENABLE | BGE_WDMAMODE_ALL_ATTNS; 17416f8718a3SScott Long 17426f8718a3SScott Long /* Enable host coalescing bug fix. */ 17436f8718a3SScott Long if (sc->bge_asicrev == BGE_ASICREV_BCM5755 || 17446f8718a3SScott Long sc->bge_asicrev == BGE_ASICREV_BCM5787) 17450c8aa4eaSJung-uk Kim val |= 1 << 29; 17466f8718a3SScott Long 174795d67482SBill Paul /* Turn on write DMA state machine */ 17486f8718a3SScott Long CSR_WRITE_4(sc, BGE_WDMA_MODE, val); 174995d67482SBill Paul 175095d67482SBill Paul /* Turn on read DMA state machine */ 175195d67482SBill Paul CSR_WRITE_4(sc, BGE_RDMA_MODE, 175295d67482SBill Paul BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS); 175395d67482SBill Paul 175495d67482SBill Paul /* Turn on RX data completion state machine */ 175595d67482SBill Paul CSR_WRITE_4(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE); 175695d67482SBill Paul 175795d67482SBill Paul /* Turn on RX BD initiator state machine */ 175895d67482SBill Paul CSR_WRITE_4(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE); 175995d67482SBill Paul 176095d67482SBill Paul /* Turn on RX data and RX BD initiator state machine */ 176195d67482SBill Paul CSR_WRITE_4(sc, BGE_RDBDI_MODE, BGE_RDBDIMODE_ENABLE); 176295d67482SBill Paul 176395d67482SBill Paul /* Turn on Mbuf cluster free state machine */ 17647ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 176595d67482SBill Paul CSR_WRITE_4(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE); 176695d67482SBill Paul 176795d67482SBill Paul /* Turn on send BD completion state machine */ 176895d67482SBill Paul CSR_WRITE_4(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE); 176995d67482SBill Paul 177095d67482SBill Paul /* Turn on send data completion state machine */ 177195d67482SBill Paul CSR_WRITE_4(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE); 177295d67482SBill Paul 177395d67482SBill Paul /* Turn on send data initiator state machine */ 177495d67482SBill Paul CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE); 177595d67482SBill Paul 177695d67482SBill Paul /* Turn on send BD initiator state machine */ 177795d67482SBill Paul CSR_WRITE_4(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE); 177895d67482SBill Paul 177995d67482SBill Paul /* Turn on send BD selector state machine */ 178095d67482SBill Paul CSR_WRITE_4(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE); 178195d67482SBill Paul 17820c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_SDI_STATS_ENABLE_MASK, 0x007FFFFF); 178395d67482SBill Paul CSR_WRITE_4(sc, BGE_SDI_STATS_CTL, 178495d67482SBill Paul BGE_SDISTATSCTL_ENABLE | BGE_SDISTATSCTL_FASTER); 178595d67482SBill Paul 178695d67482SBill Paul /* ack/clear link change events */ 178795d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED | 17880434d1b8SBill Paul BGE_MACSTAT_CFG_CHANGED | BGE_MACSTAT_MI_COMPLETE | 17890434d1b8SBill Paul BGE_MACSTAT_LINK_CHANGED); 1790f41ac2beSBill Paul CSR_WRITE_4(sc, BGE_MI_STS, 0); 179195d67482SBill Paul 179295d67482SBill Paul /* Enable PHY auto polling (for MII/GMII only) */ 1793652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 179495d67482SBill Paul CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK); 1795a1d52896SBill Paul } else { 17966098821cSJung-uk Kim BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL | (10 << 16)); 17971f313773SOleg Bulyzhin if (sc->bge_asicrev == BGE_ASICREV_BCM5700 && 17984c0da0ffSGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5700_B2) 1799a1d52896SBill Paul CSR_WRITE_4(sc, BGE_MAC_EVT_ENB, 1800a1d52896SBill Paul BGE_EVTENB_MI_INTERRUPT); 1801a1d52896SBill Paul } 180295d67482SBill Paul 18031f313773SOleg Bulyzhin /* 18041f313773SOleg Bulyzhin * Clear any pending link state attention. 18051f313773SOleg Bulyzhin * Otherwise some link state change events may be lost until attention 18061f313773SOleg Bulyzhin * is cleared by bge_intr() -> bge_link_upd() sequence. 18071f313773SOleg Bulyzhin * It's not necessary on newer BCM chips - perhaps enabling link 18081f313773SOleg Bulyzhin * state change attentions implies clearing pending attention. 18091f313773SOleg Bulyzhin */ 18101f313773SOleg Bulyzhin CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED | 18111f313773SOleg Bulyzhin BGE_MACSTAT_CFG_CHANGED | BGE_MACSTAT_MI_COMPLETE | 18121f313773SOleg Bulyzhin BGE_MACSTAT_LINK_CHANGED); 18131f313773SOleg Bulyzhin 181495d67482SBill Paul /* Enable link state change attentions. */ 181595d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_EVT_ENB, BGE_EVTENB_LINK_CHANGED); 181695d67482SBill Paul 181795d67482SBill Paul return (0); 181895d67482SBill Paul } 181995d67482SBill Paul 18204c0da0ffSGleb Smirnoff const struct bge_revision * 18214c0da0ffSGleb Smirnoff bge_lookup_rev(uint32_t chipid) 18224c0da0ffSGleb Smirnoff { 18234c0da0ffSGleb Smirnoff const struct bge_revision *br; 18244c0da0ffSGleb Smirnoff 18254c0da0ffSGleb Smirnoff for (br = bge_revisions; br->br_name != NULL; br++) { 18264c0da0ffSGleb Smirnoff if (br->br_chipid == chipid) 18274c0da0ffSGleb Smirnoff return (br); 18284c0da0ffSGleb Smirnoff } 18294c0da0ffSGleb Smirnoff 18304c0da0ffSGleb Smirnoff for (br = bge_majorrevs; br->br_name != NULL; br++) { 18314c0da0ffSGleb Smirnoff if (br->br_chipid == BGE_ASICREV(chipid)) 18324c0da0ffSGleb Smirnoff return (br); 18334c0da0ffSGleb Smirnoff } 18344c0da0ffSGleb Smirnoff 18354c0da0ffSGleb Smirnoff return (NULL); 18364c0da0ffSGleb Smirnoff } 18374c0da0ffSGleb Smirnoff 18384c0da0ffSGleb Smirnoff const struct bge_vendor * 18394c0da0ffSGleb Smirnoff bge_lookup_vendor(uint16_t vid) 18404c0da0ffSGleb Smirnoff { 18414c0da0ffSGleb Smirnoff const struct bge_vendor *v; 18424c0da0ffSGleb Smirnoff 18434c0da0ffSGleb Smirnoff for (v = bge_vendors; v->v_name != NULL; v++) 18444c0da0ffSGleb Smirnoff if (v->v_id == vid) 18454c0da0ffSGleb Smirnoff return (v); 18464c0da0ffSGleb Smirnoff 18474c0da0ffSGleb Smirnoff panic("%s: unknown vendor %d", __func__, vid); 18484c0da0ffSGleb Smirnoff return (NULL); 18494c0da0ffSGleb Smirnoff } 18504c0da0ffSGleb Smirnoff 185195d67482SBill Paul /* 185295d67482SBill Paul * Probe for a Broadcom chip. Check the PCI vendor and device IDs 18534c0da0ffSGleb Smirnoff * against our list and return its name if we find a match. 18544c0da0ffSGleb Smirnoff * 18554c0da0ffSGleb Smirnoff * Note that since the Broadcom controller contains VPD support, we 18567c929cf9SJung-uk Kim * try to get the device name string from the controller itself instead 18577c929cf9SJung-uk Kim * of the compiled-in string. It guarantees we'll always announce the 18587c929cf9SJung-uk Kim * right product name. We fall back to the compiled-in string when 18597c929cf9SJung-uk Kim * VPD is unavailable or corrupt. 186095d67482SBill Paul */ 186195d67482SBill Paul static int 18623f74909aSGleb Smirnoff bge_probe(device_t dev) 186395d67482SBill Paul { 1864852c67f9SMarius Strobl const struct bge_type *t = bge_devs; 18654c0da0ffSGleb Smirnoff struct bge_softc *sc = device_get_softc(dev); 18667c929cf9SJung-uk Kim uint16_t vid, did; 186795d67482SBill Paul 186895d67482SBill Paul sc->bge_dev = dev; 18697c929cf9SJung-uk Kim vid = pci_get_vendor(dev); 18707c929cf9SJung-uk Kim did = pci_get_device(dev); 18714c0da0ffSGleb Smirnoff while(t->bge_vid != 0) { 18727c929cf9SJung-uk Kim if ((vid == t->bge_vid) && (did == t->bge_did)) { 18737c929cf9SJung-uk Kim char model[64], buf[96]; 18744c0da0ffSGleb Smirnoff const struct bge_revision *br; 18754c0da0ffSGleb Smirnoff const struct bge_vendor *v; 18764c0da0ffSGleb Smirnoff uint32_t id; 18774c0da0ffSGleb Smirnoff 18784c0da0ffSGleb Smirnoff id = pci_read_config(dev, BGE_PCI_MISC_CTL, 4) & 18794c0da0ffSGleb Smirnoff BGE_PCIMISCCTL_ASICREV; 18804c0da0ffSGleb Smirnoff br = bge_lookup_rev(id); 18817c929cf9SJung-uk Kim v = bge_lookup_vendor(vid); 18824e35d186SJung-uk Kim { 18834e35d186SJung-uk Kim #if __FreeBSD_version > 700024 18844e35d186SJung-uk Kim const char *pname; 18854e35d186SJung-uk Kim 1886852c67f9SMarius Strobl if (bge_has_eaddr(sc) && 1887852c67f9SMarius Strobl pci_get_vpd_ident(dev, &pname) == 0) 18884e35d186SJung-uk Kim snprintf(model, 64, "%s", pname); 18894e35d186SJung-uk Kim else 18904e35d186SJung-uk Kim #endif 18917c929cf9SJung-uk Kim snprintf(model, 64, "%s %s", 18927c929cf9SJung-uk Kim v->v_name, 18937c929cf9SJung-uk Kim br != NULL ? br->br_name : 18947c929cf9SJung-uk Kim "NetXtreme Ethernet Controller"); 18954e35d186SJung-uk Kim } 18967c929cf9SJung-uk Kim snprintf(buf, 96, "%s, %sASIC rev. %#04x", model, 18977c929cf9SJung-uk Kim br != NULL ? "" : "unknown ", id >> 16); 18984c0da0ffSGleb Smirnoff device_set_desc_copy(dev, buf); 18996d2a9bd6SDoug Ambrisko if (pci_get_subvendor(dev) == DELL_VENDORID) 19005ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_NO_3LED; 190108bf8bb7SJung-uk Kim if (did == BCOM_DEVICEID_BCM5755M) 190208bf8bb7SJung-uk Kim sc->bge_flags |= BGE_FLAG_ADJUST_TRIM; 190395d67482SBill Paul return (0); 190495d67482SBill Paul } 190595d67482SBill Paul t++; 190695d67482SBill Paul } 190795d67482SBill Paul 190895d67482SBill Paul return (ENXIO); 190995d67482SBill Paul } 191095d67482SBill Paul 1911f41ac2beSBill Paul static void 19123f74909aSGleb Smirnoff bge_dma_free(struct bge_softc *sc) 1913f41ac2beSBill Paul { 1914f41ac2beSBill Paul int i; 1915f41ac2beSBill Paul 19163f74909aSGleb Smirnoff /* Destroy DMA maps for RX buffers. */ 1917f41ac2beSBill Paul for (i = 0; i < BGE_STD_RX_RING_CNT; i++) { 1918f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_std_dmamap[i]) 1919f41ac2beSBill Paul bus_dmamap_destroy(sc->bge_cdata.bge_mtag, 1920f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[i]); 1921f41ac2beSBill Paul } 1922f41ac2beSBill Paul 19233f74909aSGleb Smirnoff /* Destroy DMA maps for jumbo RX buffers. */ 1924f41ac2beSBill Paul for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 1925f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_jumbo_dmamap[i]) 1926f41ac2beSBill Paul bus_dmamap_destroy(sc->bge_cdata.bge_mtag_jumbo, 1927f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[i]); 1928f41ac2beSBill Paul } 1929f41ac2beSBill Paul 19303f74909aSGleb Smirnoff /* Destroy DMA maps for TX buffers. */ 1931f41ac2beSBill Paul for (i = 0; i < BGE_TX_RING_CNT; i++) { 1932f41ac2beSBill Paul if (sc->bge_cdata.bge_tx_dmamap[i]) 1933f41ac2beSBill Paul bus_dmamap_destroy(sc->bge_cdata.bge_mtag, 1934f41ac2beSBill Paul sc->bge_cdata.bge_tx_dmamap[i]); 1935f41ac2beSBill Paul } 1936f41ac2beSBill Paul 1937f41ac2beSBill Paul if (sc->bge_cdata.bge_mtag) 1938f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_mtag); 1939f41ac2beSBill Paul 1940f41ac2beSBill Paul 19413f74909aSGleb Smirnoff /* Destroy standard RX ring. */ 1942e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_std_ring_map) 1943e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_rx_std_ring_tag, 1944e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_std_ring_map); 1945e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_std_ring_map && sc->bge_ldata.bge_rx_std_ring) 1946f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_rx_std_ring_tag, 1947f41ac2beSBill Paul sc->bge_ldata.bge_rx_std_ring, 1948f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map); 1949f41ac2beSBill Paul 1950f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_std_ring_tag) 1951f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_rx_std_ring_tag); 1952f41ac2beSBill Paul 19533f74909aSGleb Smirnoff /* Destroy jumbo RX ring. */ 1954e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_jumbo_ring_map) 1955e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_rx_jumbo_ring_tag, 1956e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_jumbo_ring_map); 1957e65bed95SPyun YongHyeon 1958e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_jumbo_ring_map && 1959e65bed95SPyun YongHyeon sc->bge_ldata.bge_rx_jumbo_ring) 1960f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_rx_jumbo_ring_tag, 1961f41ac2beSBill Paul sc->bge_ldata.bge_rx_jumbo_ring, 1962f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_ring_map); 1963f41ac2beSBill Paul 1964f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_jumbo_ring_tag) 1965f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_rx_jumbo_ring_tag); 1966f41ac2beSBill Paul 19673f74909aSGleb Smirnoff /* Destroy RX return ring. */ 1968e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_return_ring_map) 1969e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_rx_return_ring_tag, 1970e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_return_ring_map); 1971e65bed95SPyun YongHyeon 1972e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_return_ring_map && 1973e65bed95SPyun YongHyeon sc->bge_ldata.bge_rx_return_ring) 1974f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_rx_return_ring_tag, 1975f41ac2beSBill Paul sc->bge_ldata.bge_rx_return_ring, 1976f41ac2beSBill Paul sc->bge_cdata.bge_rx_return_ring_map); 1977f41ac2beSBill Paul 1978f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_return_ring_tag) 1979f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_rx_return_ring_tag); 1980f41ac2beSBill Paul 19813f74909aSGleb Smirnoff /* Destroy TX ring. */ 1982e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_tx_ring_map) 1983e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_tx_ring_tag, 1984e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_ring_map); 1985e65bed95SPyun YongHyeon 1986e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_tx_ring_map && sc->bge_ldata.bge_tx_ring) 1987f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_tx_ring_tag, 1988f41ac2beSBill Paul sc->bge_ldata.bge_tx_ring, 1989f41ac2beSBill Paul sc->bge_cdata.bge_tx_ring_map); 1990f41ac2beSBill Paul 1991f41ac2beSBill Paul if (sc->bge_cdata.bge_tx_ring_tag) 1992f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_tx_ring_tag); 1993f41ac2beSBill Paul 19943f74909aSGleb Smirnoff /* Destroy status block. */ 1995e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_status_map) 1996e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_status_tag, 1997e65bed95SPyun YongHyeon sc->bge_cdata.bge_status_map); 1998e65bed95SPyun YongHyeon 1999e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_status_map && sc->bge_ldata.bge_status_block) 2000f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_status_tag, 2001f41ac2beSBill Paul sc->bge_ldata.bge_status_block, 2002f41ac2beSBill Paul sc->bge_cdata.bge_status_map); 2003f41ac2beSBill Paul 2004f41ac2beSBill Paul if (sc->bge_cdata.bge_status_tag) 2005f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_status_tag); 2006f41ac2beSBill Paul 20073f74909aSGleb Smirnoff /* Destroy statistics block. */ 2008e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_stats_map) 2009e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_stats_tag, 2010e65bed95SPyun YongHyeon sc->bge_cdata.bge_stats_map); 2011e65bed95SPyun YongHyeon 2012e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_stats_map && sc->bge_ldata.bge_stats) 2013f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_stats_tag, 2014f41ac2beSBill Paul sc->bge_ldata.bge_stats, 2015f41ac2beSBill Paul sc->bge_cdata.bge_stats_map); 2016f41ac2beSBill Paul 2017f41ac2beSBill Paul if (sc->bge_cdata.bge_stats_tag) 2018f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_stats_tag); 2019f41ac2beSBill Paul 20203f74909aSGleb Smirnoff /* Destroy the parent tag. */ 2021f41ac2beSBill Paul if (sc->bge_cdata.bge_parent_tag) 2022f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_parent_tag); 2023f41ac2beSBill Paul } 2024f41ac2beSBill Paul 2025f41ac2beSBill Paul static int 20263f74909aSGleb Smirnoff bge_dma_alloc(device_t dev) 2027f41ac2beSBill Paul { 20283f74909aSGleb Smirnoff struct bge_dmamap_arg ctx; 2029f41ac2beSBill Paul struct bge_softc *sc; 20301be6acb7SGleb Smirnoff int i, error; 2031f41ac2beSBill Paul 2032f41ac2beSBill Paul sc = device_get_softc(dev); 2033f41ac2beSBill Paul 2034f41ac2beSBill Paul /* 2035f41ac2beSBill Paul * Allocate the parent bus DMA tag appropriate for PCI. 2036f41ac2beSBill Paul */ 20374eee14cbSMarius Strobl error = bus_dma_tag_create(bus_get_dma_tag(sc->bge_dev), 20384eee14cbSMarius Strobl 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 20394eee14cbSMarius Strobl NULL, BUS_SPACE_MAXSIZE_32BIT, 0, BUS_SPACE_MAXSIZE_32BIT, 20404eee14cbSMarius Strobl 0, NULL, NULL, &sc->bge_cdata.bge_parent_tag); 2041f41ac2beSBill Paul 2042e65bed95SPyun YongHyeon if (error != 0) { 2043fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 2044fe806fdaSPyun YongHyeon "could not allocate parent dma tag\n"); 2045e65bed95SPyun YongHyeon return (ENOMEM); 2046e65bed95SPyun YongHyeon } 2047e65bed95SPyun YongHyeon 2048f41ac2beSBill Paul /* 20494eee14cbSMarius Strobl * Create tag for mbufs. 2050f41ac2beSBill Paul */ 20518a2e22deSScott Long error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 1, 2052f41ac2beSBill Paul 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 20531be6acb7SGleb Smirnoff NULL, MCLBYTES * BGE_NSEG_NEW, BGE_NSEG_NEW, MCLBYTES, 20541be6acb7SGleb Smirnoff BUS_DMA_ALLOCNOW, NULL, NULL, &sc->bge_cdata.bge_mtag); 2055f41ac2beSBill Paul 2056f41ac2beSBill Paul if (error) { 2057fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2058f41ac2beSBill Paul return (ENOMEM); 2059f41ac2beSBill Paul } 2060f41ac2beSBill Paul 20613f74909aSGleb Smirnoff /* Create DMA maps for RX buffers. */ 2062f41ac2beSBill Paul for (i = 0; i < BGE_STD_RX_RING_CNT; i++) { 2063f41ac2beSBill Paul error = bus_dmamap_create(sc->bge_cdata.bge_mtag, 0, 2064f41ac2beSBill Paul &sc->bge_cdata.bge_rx_std_dmamap[i]); 2065f41ac2beSBill Paul if (error) { 2066fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 2067fe806fdaSPyun YongHyeon "can't create DMA map for RX\n"); 2068f41ac2beSBill Paul return (ENOMEM); 2069f41ac2beSBill Paul } 2070f41ac2beSBill Paul } 2071f41ac2beSBill Paul 20723f74909aSGleb Smirnoff /* Create DMA maps for TX buffers. */ 2073f41ac2beSBill Paul for (i = 0; i < BGE_TX_RING_CNT; i++) { 2074f41ac2beSBill Paul error = bus_dmamap_create(sc->bge_cdata.bge_mtag, 0, 2075f41ac2beSBill Paul &sc->bge_cdata.bge_tx_dmamap[i]); 2076f41ac2beSBill Paul if (error) { 2077fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 2078fe806fdaSPyun YongHyeon "can't create DMA map for RX\n"); 2079f41ac2beSBill Paul return (ENOMEM); 2080f41ac2beSBill Paul } 2081f41ac2beSBill Paul } 2082f41ac2beSBill Paul 20833f74909aSGleb Smirnoff /* Create tag for standard RX ring. */ 2084f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2085f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2086f41ac2beSBill Paul NULL, BGE_STD_RX_RING_SZ, 1, BGE_STD_RX_RING_SZ, 0, 2087f41ac2beSBill Paul NULL, NULL, &sc->bge_cdata.bge_rx_std_ring_tag); 2088f41ac2beSBill Paul 2089f41ac2beSBill Paul if (error) { 2090fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2091f41ac2beSBill Paul return (ENOMEM); 2092f41ac2beSBill Paul } 2093f41ac2beSBill Paul 20943f74909aSGleb Smirnoff /* Allocate DMA'able memory for standard RX ring. */ 2095f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_std_ring_tag, 2096f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_rx_std_ring, BUS_DMA_NOWAIT, 2097f41ac2beSBill Paul &sc->bge_cdata.bge_rx_std_ring_map); 2098f41ac2beSBill Paul if (error) 2099f41ac2beSBill Paul return (ENOMEM); 2100f41ac2beSBill Paul 2101f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_rx_std_ring, BGE_STD_RX_RING_SZ); 2102f41ac2beSBill Paul 21033f74909aSGleb Smirnoff /* Load the address of the standard RX ring. */ 2104f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2105f41ac2beSBill Paul ctx.sc = sc; 2106f41ac2beSBill Paul 2107f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_rx_std_ring_tag, 2108f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map, sc->bge_ldata.bge_rx_std_ring, 2109f41ac2beSBill Paul BGE_STD_RX_RING_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2110f41ac2beSBill Paul 2111f41ac2beSBill Paul if (error) 2112f41ac2beSBill Paul return (ENOMEM); 2113f41ac2beSBill Paul 2114f41ac2beSBill Paul sc->bge_ldata.bge_rx_std_ring_paddr = ctx.bge_busaddr; 2115f41ac2beSBill Paul 21163f74909aSGleb Smirnoff /* Create tags for jumbo mbufs. */ 21174c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc)) { 2118f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 21198a2e22deSScott Long 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 21201be6acb7SGleb Smirnoff NULL, MJUM9BYTES, BGE_NSEG_JUMBO, PAGE_SIZE, 21211be6acb7SGleb Smirnoff 0, NULL, NULL, &sc->bge_cdata.bge_mtag_jumbo); 2122f41ac2beSBill Paul if (error) { 2123fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 21243f74909aSGleb Smirnoff "could not allocate jumbo dma tag\n"); 2125f41ac2beSBill Paul return (ENOMEM); 2126f41ac2beSBill Paul } 2127f41ac2beSBill Paul 21283f74909aSGleb Smirnoff /* Create tag for jumbo RX ring. */ 2129f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2130f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2131f41ac2beSBill Paul NULL, BGE_JUMBO_RX_RING_SZ, 1, BGE_JUMBO_RX_RING_SZ, 0, 2132f41ac2beSBill Paul NULL, NULL, &sc->bge_cdata.bge_rx_jumbo_ring_tag); 2133f41ac2beSBill Paul 2134f41ac2beSBill Paul if (error) { 2135fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 21363f74909aSGleb Smirnoff "could not allocate jumbo ring dma tag\n"); 2137f41ac2beSBill Paul return (ENOMEM); 2138f41ac2beSBill Paul } 2139f41ac2beSBill Paul 21403f74909aSGleb Smirnoff /* Allocate DMA'able memory for jumbo RX ring. */ 2141f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_jumbo_ring_tag, 21421be6acb7SGleb Smirnoff (void **)&sc->bge_ldata.bge_rx_jumbo_ring, 21431be6acb7SGleb Smirnoff BUS_DMA_NOWAIT | BUS_DMA_ZERO, 2144f41ac2beSBill Paul &sc->bge_cdata.bge_rx_jumbo_ring_map); 2145f41ac2beSBill Paul if (error) 2146f41ac2beSBill Paul return (ENOMEM); 2147f41ac2beSBill Paul 21483f74909aSGleb Smirnoff /* Load the address of the jumbo RX ring. */ 2149f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2150f41ac2beSBill Paul ctx.sc = sc; 2151f41ac2beSBill Paul 2152f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_rx_jumbo_ring_tag, 2153f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_ring_map, 2154f41ac2beSBill Paul sc->bge_ldata.bge_rx_jumbo_ring, BGE_JUMBO_RX_RING_SZ, 2155f41ac2beSBill Paul bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2156f41ac2beSBill Paul 2157f41ac2beSBill Paul if (error) 2158f41ac2beSBill Paul return (ENOMEM); 2159f41ac2beSBill Paul 2160f41ac2beSBill Paul sc->bge_ldata.bge_rx_jumbo_ring_paddr = ctx.bge_busaddr; 2161f41ac2beSBill Paul 21623f74909aSGleb Smirnoff /* Create DMA maps for jumbo RX buffers. */ 2163f41ac2beSBill Paul for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 2164f41ac2beSBill Paul error = bus_dmamap_create(sc->bge_cdata.bge_mtag_jumbo, 2165f41ac2beSBill Paul 0, &sc->bge_cdata.bge_rx_jumbo_dmamap[i]); 2166f41ac2beSBill Paul if (error) { 2167fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 21683f74909aSGleb Smirnoff "can't create DMA map for jumbo RX\n"); 2169f41ac2beSBill Paul return (ENOMEM); 2170f41ac2beSBill Paul } 2171f41ac2beSBill Paul } 2172f41ac2beSBill Paul 2173f41ac2beSBill Paul } 2174f41ac2beSBill Paul 21753f74909aSGleb Smirnoff /* Create tag for RX return ring. */ 2176f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2177f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2178f41ac2beSBill Paul NULL, BGE_RX_RTN_RING_SZ(sc), 1, BGE_RX_RTN_RING_SZ(sc), 0, 2179f41ac2beSBill Paul NULL, NULL, &sc->bge_cdata.bge_rx_return_ring_tag); 2180f41ac2beSBill Paul 2181f41ac2beSBill Paul if (error) { 2182fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2183f41ac2beSBill Paul return (ENOMEM); 2184f41ac2beSBill Paul } 2185f41ac2beSBill Paul 21863f74909aSGleb Smirnoff /* Allocate DMA'able memory for RX return ring. */ 2187f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_return_ring_tag, 2188f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_rx_return_ring, BUS_DMA_NOWAIT, 2189f41ac2beSBill Paul &sc->bge_cdata.bge_rx_return_ring_map); 2190f41ac2beSBill Paul if (error) 2191f41ac2beSBill Paul return (ENOMEM); 2192f41ac2beSBill Paul 2193f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_rx_return_ring, 2194f41ac2beSBill Paul BGE_RX_RTN_RING_SZ(sc)); 2195f41ac2beSBill Paul 21963f74909aSGleb Smirnoff /* Load the address of the RX return ring. */ 2197f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2198f41ac2beSBill Paul ctx.sc = sc; 2199f41ac2beSBill Paul 2200f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_rx_return_ring_tag, 2201f41ac2beSBill Paul sc->bge_cdata.bge_rx_return_ring_map, 2202f41ac2beSBill Paul sc->bge_ldata.bge_rx_return_ring, BGE_RX_RTN_RING_SZ(sc), 2203f41ac2beSBill Paul bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2204f41ac2beSBill Paul 2205f41ac2beSBill Paul if (error) 2206f41ac2beSBill Paul return (ENOMEM); 2207f41ac2beSBill Paul 2208f41ac2beSBill Paul sc->bge_ldata.bge_rx_return_ring_paddr = ctx.bge_busaddr; 2209f41ac2beSBill Paul 22103f74909aSGleb Smirnoff /* Create tag for TX ring. */ 2211f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2212f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2213f41ac2beSBill Paul NULL, BGE_TX_RING_SZ, 1, BGE_TX_RING_SZ, 0, NULL, NULL, 2214f41ac2beSBill Paul &sc->bge_cdata.bge_tx_ring_tag); 2215f41ac2beSBill Paul 2216f41ac2beSBill Paul if (error) { 2217fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2218f41ac2beSBill Paul return (ENOMEM); 2219f41ac2beSBill Paul } 2220f41ac2beSBill Paul 22213f74909aSGleb Smirnoff /* Allocate DMA'able memory for TX ring. */ 2222f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_tx_ring_tag, 2223f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_tx_ring, BUS_DMA_NOWAIT, 2224f41ac2beSBill Paul &sc->bge_cdata.bge_tx_ring_map); 2225f41ac2beSBill Paul if (error) 2226f41ac2beSBill Paul return (ENOMEM); 2227f41ac2beSBill Paul 2228f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_tx_ring, BGE_TX_RING_SZ); 2229f41ac2beSBill Paul 22303f74909aSGleb Smirnoff /* Load the address of the TX ring. */ 2231f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2232f41ac2beSBill Paul ctx.sc = sc; 2233f41ac2beSBill Paul 2234f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_tx_ring_tag, 2235f41ac2beSBill Paul sc->bge_cdata.bge_tx_ring_map, sc->bge_ldata.bge_tx_ring, 2236f41ac2beSBill Paul BGE_TX_RING_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2237f41ac2beSBill Paul 2238f41ac2beSBill Paul if (error) 2239f41ac2beSBill Paul return (ENOMEM); 2240f41ac2beSBill Paul 2241f41ac2beSBill Paul sc->bge_ldata.bge_tx_ring_paddr = ctx.bge_busaddr; 2242f41ac2beSBill Paul 22433f74909aSGleb Smirnoff /* Create tag for status block. */ 2244f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2245f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2246f41ac2beSBill Paul NULL, BGE_STATUS_BLK_SZ, 1, BGE_STATUS_BLK_SZ, 0, 2247f41ac2beSBill Paul NULL, NULL, &sc->bge_cdata.bge_status_tag); 2248f41ac2beSBill Paul 2249f41ac2beSBill Paul if (error) { 2250fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2251f41ac2beSBill Paul return (ENOMEM); 2252f41ac2beSBill Paul } 2253f41ac2beSBill Paul 22543f74909aSGleb Smirnoff /* Allocate DMA'able memory for status block. */ 2255f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_status_tag, 2256f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_status_block, BUS_DMA_NOWAIT, 2257f41ac2beSBill Paul &sc->bge_cdata.bge_status_map); 2258f41ac2beSBill Paul if (error) 2259f41ac2beSBill Paul return (ENOMEM); 2260f41ac2beSBill Paul 2261f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_status_block, BGE_STATUS_BLK_SZ); 2262f41ac2beSBill Paul 22633f74909aSGleb Smirnoff /* Load the address of the status block. */ 2264f41ac2beSBill Paul ctx.sc = sc; 2265f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2266f41ac2beSBill Paul 2267f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_status_tag, 2268f41ac2beSBill Paul sc->bge_cdata.bge_status_map, sc->bge_ldata.bge_status_block, 2269f41ac2beSBill Paul BGE_STATUS_BLK_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2270f41ac2beSBill Paul 2271f41ac2beSBill Paul if (error) 2272f41ac2beSBill Paul return (ENOMEM); 2273f41ac2beSBill Paul 2274f41ac2beSBill Paul sc->bge_ldata.bge_status_block_paddr = ctx.bge_busaddr; 2275f41ac2beSBill Paul 22763f74909aSGleb Smirnoff /* Create tag for statistics block. */ 2277f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2278f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2279f41ac2beSBill Paul NULL, BGE_STATS_SZ, 1, BGE_STATS_SZ, 0, NULL, NULL, 2280f41ac2beSBill Paul &sc->bge_cdata.bge_stats_tag); 2281f41ac2beSBill Paul 2282f41ac2beSBill Paul if (error) { 2283fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2284f41ac2beSBill Paul return (ENOMEM); 2285f41ac2beSBill Paul } 2286f41ac2beSBill Paul 22873f74909aSGleb Smirnoff /* Allocate DMA'able memory for statistics block. */ 2288f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_stats_tag, 2289f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_stats, BUS_DMA_NOWAIT, 2290f41ac2beSBill Paul &sc->bge_cdata.bge_stats_map); 2291f41ac2beSBill Paul if (error) 2292f41ac2beSBill Paul return (ENOMEM); 2293f41ac2beSBill Paul 2294f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_stats, BGE_STATS_SZ); 2295f41ac2beSBill Paul 22963f74909aSGleb Smirnoff /* Load the address of the statstics block. */ 2297f41ac2beSBill Paul ctx.sc = sc; 2298f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2299f41ac2beSBill Paul 2300f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_stats_tag, 2301f41ac2beSBill Paul sc->bge_cdata.bge_stats_map, sc->bge_ldata.bge_stats, 2302f41ac2beSBill Paul BGE_STATS_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2303f41ac2beSBill Paul 2304f41ac2beSBill Paul if (error) 2305f41ac2beSBill Paul return (ENOMEM); 2306f41ac2beSBill Paul 2307f41ac2beSBill Paul sc->bge_ldata.bge_stats_paddr = ctx.bge_busaddr; 2308f41ac2beSBill Paul 2309f41ac2beSBill Paul return (0); 2310f41ac2beSBill Paul } 2311f41ac2beSBill Paul 23120a55a034SJung-uk Kim #if __FreeBSD_version > 602105 2313bf6ef57aSJohn Polstra /* 2314bf6ef57aSJohn Polstra * Return true if this device has more than one port. 2315bf6ef57aSJohn Polstra */ 2316bf6ef57aSJohn Polstra static int 2317bf6ef57aSJohn Polstra bge_has_multiple_ports(struct bge_softc *sc) 2318bf6ef57aSJohn Polstra { 2319bf6ef57aSJohn Polstra device_t dev = sc->bge_dev; 232055aaf894SMarius Strobl u_int b, d, f, fscan, s; 2321bf6ef57aSJohn Polstra 232255aaf894SMarius Strobl d = pci_get_domain(dev); 2323bf6ef57aSJohn Polstra b = pci_get_bus(dev); 2324bf6ef57aSJohn Polstra s = pci_get_slot(dev); 2325bf6ef57aSJohn Polstra f = pci_get_function(dev); 2326bf6ef57aSJohn Polstra for (fscan = 0; fscan <= PCI_FUNCMAX; fscan++) 232755aaf894SMarius Strobl if (fscan != f && pci_find_dbsf(d, b, s, fscan) != NULL) 2328bf6ef57aSJohn Polstra return (1); 2329bf6ef57aSJohn Polstra return (0); 2330bf6ef57aSJohn Polstra } 2331bf6ef57aSJohn Polstra 2332bf6ef57aSJohn Polstra /* 2333bf6ef57aSJohn Polstra * Return true if MSI can be used with this device. 2334bf6ef57aSJohn Polstra */ 2335bf6ef57aSJohn Polstra static int 2336bf6ef57aSJohn Polstra bge_can_use_msi(struct bge_softc *sc) 2337bf6ef57aSJohn Polstra { 2338bf6ef57aSJohn Polstra int can_use_msi = 0; 2339bf6ef57aSJohn Polstra 2340bf6ef57aSJohn Polstra switch (sc->bge_asicrev) { 2341a8376f70SMarius Strobl case BGE_ASICREV_BCM5714_A0: 2342bf6ef57aSJohn Polstra case BGE_ASICREV_BCM5714: 2343bf6ef57aSJohn Polstra /* 2344a8376f70SMarius Strobl * Apparently, MSI doesn't work when these chips are 2345a8376f70SMarius Strobl * configured in single-port mode. 2346bf6ef57aSJohn Polstra */ 2347bf6ef57aSJohn Polstra if (bge_has_multiple_ports(sc)) 2348bf6ef57aSJohn Polstra can_use_msi = 1; 2349bf6ef57aSJohn Polstra break; 2350bf6ef57aSJohn Polstra case BGE_ASICREV_BCM5750: 2351bf6ef57aSJohn Polstra if (sc->bge_chiprev != BGE_CHIPREV_5750_AX && 2352bf6ef57aSJohn Polstra sc->bge_chiprev != BGE_CHIPREV_5750_BX) 2353bf6ef57aSJohn Polstra can_use_msi = 1; 2354bf6ef57aSJohn Polstra break; 2355a8376f70SMarius Strobl default: 2356a8376f70SMarius Strobl if (BGE_IS_575X_PLUS(sc)) 2357bf6ef57aSJohn Polstra can_use_msi = 1; 2358bf6ef57aSJohn Polstra } 2359bf6ef57aSJohn Polstra return (can_use_msi); 2360bf6ef57aSJohn Polstra } 23614e35d186SJung-uk Kim #endif 2362bf6ef57aSJohn Polstra 236395d67482SBill Paul static int 23643f74909aSGleb Smirnoff bge_attach(device_t dev) 236595d67482SBill Paul { 236695d67482SBill Paul struct ifnet *ifp; 236795d67482SBill Paul struct bge_softc *sc; 23684f0794ffSBjoern A. Zeeb uint32_t hwcfg = 0, misccfg; 236908013fd3SMarius Strobl u_char eaddr[ETHER_ADDR_LEN]; 237008013fd3SMarius Strobl int error, reg, rid, trys; 237195d67482SBill Paul 237295d67482SBill Paul sc = device_get_softc(dev); 237395d67482SBill Paul sc->bge_dev = dev; 237495d67482SBill Paul 237595d67482SBill Paul /* 237695d67482SBill Paul * Map control/status registers. 237795d67482SBill Paul */ 237895d67482SBill Paul pci_enable_busmaster(dev); 237995d67482SBill Paul 238095d67482SBill Paul rid = BGE_PCI_BAR0; 23815f96beb9SNate Lawson sc->bge_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 238244f8f2fcSMarius Strobl RF_ACTIVE); 238395d67482SBill Paul 238495d67482SBill Paul if (sc->bge_res == NULL) { 2385fe806fdaSPyun YongHyeon device_printf (sc->bge_dev, "couldn't map memory\n"); 238695d67482SBill Paul error = ENXIO; 238795d67482SBill Paul goto fail; 238895d67482SBill Paul } 238995d67482SBill Paul 2390e53d81eeSPaul Saab /* Save ASIC rev. */ 2391e53d81eeSPaul Saab sc->bge_chipid = 2392e53d81eeSPaul Saab pci_read_config(dev, BGE_PCI_MISC_CTL, 4) & 2393e53d81eeSPaul Saab BGE_PCIMISCCTL_ASICREV; 2394e53d81eeSPaul Saab sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid); 2395e53d81eeSPaul Saab sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid); 2396e53d81eeSPaul Saab 239786543395SJung-uk Kim /* 239838cc658fSJohn Baldwin * Don't enable Ethernet@WireSpeed for the 5700, 5906, or the 239986543395SJung-uk Kim * 5705 A0 and A1 chips. 240086543395SJung-uk Kim */ 240186543395SJung-uk Kim if (sc->bge_asicrev != BGE_ASICREV_BCM5700 && 240238cc658fSJohn Baldwin sc->bge_asicrev != BGE_ASICREV_BCM5906 && 240386543395SJung-uk Kim sc->bge_chipid != BGE_CHIPID_BCM5705_A0 && 240486543395SJung-uk Kim sc->bge_chipid != BGE_CHIPID_BCM5705_A1) 240586543395SJung-uk Kim sc->bge_flags |= BGE_FLAG_WIRESPEED; 240686543395SJung-uk Kim 24075fea260fSMarius Strobl if (bge_has_eaddr(sc)) 24085fea260fSMarius Strobl sc->bge_flags |= BGE_FLAG_EADDR; 240908013fd3SMarius Strobl 24100dae9719SJung-uk Kim /* Save chipset family. */ 24110dae9719SJung-uk Kim switch (sc->bge_asicrev) { 24120dae9719SJung-uk Kim case BGE_ASICREV_BCM5700: 24130dae9719SJung-uk Kim case BGE_ASICREV_BCM5701: 24140dae9719SJung-uk Kim case BGE_ASICREV_BCM5703: 24150dae9719SJung-uk Kim case BGE_ASICREV_BCM5704: 24167ee00338SJung-uk Kim sc->bge_flags |= BGE_FLAG_5700_FAMILY | BGE_FLAG_JUMBO; 24170dae9719SJung-uk Kim break; 24180dae9719SJung-uk Kim case BGE_ASICREV_BCM5714_A0: 24190dae9719SJung-uk Kim case BGE_ASICREV_BCM5780: 24200dae9719SJung-uk Kim case BGE_ASICREV_BCM5714: 24217ee00338SJung-uk Kim sc->bge_flags |= BGE_FLAG_5714_FAMILY /* | BGE_FLAG_JUMBO */; 24225ee49a3aSJung-uk Kim /* FALLTHRU */ 24230dae9719SJung-uk Kim case BGE_ASICREV_BCM5750: 24240dae9719SJung-uk Kim case BGE_ASICREV_BCM5752: 24250dae9719SJung-uk Kim case BGE_ASICREV_BCM5755: 24260dae9719SJung-uk Kim case BGE_ASICREV_BCM5787: 242738cc658fSJohn Baldwin case BGE_ASICREV_BCM5906: 24280dae9719SJung-uk Kim sc->bge_flags |= BGE_FLAG_575X_PLUS; 24295ee49a3aSJung-uk Kim /* FALLTHRU */ 24300dae9719SJung-uk Kim case BGE_ASICREV_BCM5705: 24310dae9719SJung-uk Kim sc->bge_flags |= BGE_FLAG_5705_PLUS; 24320dae9719SJung-uk Kim break; 24330dae9719SJung-uk Kim } 24340dae9719SJung-uk Kim 24355ee49a3aSJung-uk Kim /* Set various bug flags. */ 24361ec4c3a8SJung-uk Kim if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 || 24371ec4c3a8SJung-uk Kim sc->bge_chipid == BGE_CHIPID_BCM5701_B0) 24381ec4c3a8SJung-uk Kim sc->bge_flags |= BGE_FLAG_CRC_BUG; 24395ee49a3aSJung-uk Kim if (sc->bge_chiprev == BGE_CHIPREV_5703_AX || 24405ee49a3aSJung-uk Kim sc->bge_chiprev == BGE_CHIPREV_5704_AX) 24415ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_ADC_BUG; 24425ee49a3aSJung-uk Kim if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0) 24435ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_5704_A0_BUG; 244408bf8bb7SJung-uk Kim if (BGE_IS_5705_PLUS(sc) && 244508bf8bb7SJung-uk Kim !(sc->bge_flags & BGE_FLAG_ADJUST_TRIM)) { 24465ee49a3aSJung-uk Kim if (sc->bge_asicrev == BGE_ASICREV_BCM5755 || 24474fcf220bSJohn Baldwin sc->bge_asicrev == BGE_ASICREV_BCM5787) { 24484fcf220bSJohn Baldwin if (sc->bge_chipid != BGE_CHIPID_BCM5722_A0) 24495ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_JITTER_BUG; 245038cc658fSJohn Baldwin } else if (sc->bge_asicrev != BGE_ASICREV_BCM5906) 24515ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_BER_BUG; 24525ee49a3aSJung-uk Kim } 24535ee49a3aSJung-uk Kim 24544f0794ffSBjoern A. Zeeb 24554f0794ffSBjoern A. Zeeb /* 24564f0794ffSBjoern A. Zeeb * We could possibly check for BCOM_DEVICEID_BCM5788 in bge_probe() 24574f0794ffSBjoern A. Zeeb * but I do not know the DEVICEID for the 5788M. 24584f0794ffSBjoern A. Zeeb */ 24594f0794ffSBjoern A. Zeeb misccfg = CSR_READ_4(sc, BGE_MISC_CFG) & BGE_MISCCFG_BOARD_ID; 24604f0794ffSBjoern A. Zeeb if (misccfg == BGE_MISCCFG_BOARD_ID_5788 || 24614f0794ffSBjoern A. Zeeb misccfg == BGE_MISCCFG_BOARD_ID_5788M) 24624f0794ffSBjoern A. Zeeb sc->bge_flags |= BGE_FLAG_5788; 24634f0794ffSBjoern A. Zeeb 2464e53d81eeSPaul Saab /* 24656f8718a3SScott Long * Check if this is a PCI-X or PCI Express device. 2466e53d81eeSPaul Saab */ 2467fe09b799SJung-uk Kim #if __FreeBSD_version > 602101 24686f8718a3SScott Long if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) { 24694c0da0ffSGleb Smirnoff /* 24706f8718a3SScott Long * Found a PCI Express capabilities register, this 24716f8718a3SScott Long * must be a PCI Express device. 24726f8718a3SScott Long */ 24736f8718a3SScott Long if (reg != 0) 24746f8718a3SScott Long sc->bge_flags |= BGE_FLAG_PCIE; 24756f8718a3SScott Long #else 24765345bad0SScott Long if (BGE_IS_5705_PLUS(sc)) { 24776f8718a3SScott Long reg = pci_read_config(dev, BGE_PCIE_CAPID_REG, 4); 24780c8aa4eaSJung-uk Kim if ((reg & 0xFF) == BGE_PCIE_CAPID) 24796f8718a3SScott Long sc->bge_flags |= BGE_FLAG_PCIE; 248090447aadSMarius Strobl #endif 24816f8718a3SScott Long } else { 24826f8718a3SScott Long /* 24836f8718a3SScott Long * Check if the device is in PCI-X Mode. 24846f8718a3SScott Long * (This bit is not valid on PCI Express controllers.) 24854c0da0ffSGleb Smirnoff */ 248690447aadSMarius Strobl if ((pci_read_config(dev, BGE_PCI_PCISTATE, 4) & 24874c0da0ffSGleb Smirnoff BGE_PCISTATE_PCI_BUSMODE) == 0) 2488652ae483SGleb Smirnoff sc->bge_flags |= BGE_FLAG_PCIX; 24896f8718a3SScott Long } 24904c0da0ffSGleb Smirnoff 24910a55a034SJung-uk Kim #if __FreeBSD_version > 602105 24924e35d186SJung-uk Kim { 24934e35d186SJung-uk Kim int msicount; 24944e35d186SJung-uk Kim 2495bf6ef57aSJohn Polstra /* 2496bf6ef57aSJohn Polstra * Allocate the interrupt, using MSI if possible. These devices 2497bf6ef57aSJohn Polstra * support 8 MSI messages, but only the first one is used in 2498bf6ef57aSJohn Polstra * normal operation. 2499bf6ef57aSJohn Polstra */ 2500bf6ef57aSJohn Polstra if (bge_can_use_msi(sc)) { 2501bf6ef57aSJohn Polstra msicount = pci_msi_count(dev); 2502bf6ef57aSJohn Polstra if (msicount > 1) 2503bf6ef57aSJohn Polstra msicount = 1; 2504bf6ef57aSJohn Polstra } else 2505bf6ef57aSJohn Polstra msicount = 0; 2506bf6ef57aSJohn Polstra if (msicount == 1 && pci_alloc_msi(dev, &msicount) == 0) { 2507bf6ef57aSJohn Polstra rid = 1; 2508bf6ef57aSJohn Polstra sc->bge_flags |= BGE_FLAG_MSI; 2509bf6ef57aSJohn Polstra } else 2510bf6ef57aSJohn Polstra rid = 0; 25114e35d186SJung-uk Kim } 25124e35d186SJung-uk Kim #else 25134e35d186SJung-uk Kim rid = 0; 25144e35d186SJung-uk Kim #endif 2515bf6ef57aSJohn Polstra 2516bf6ef57aSJohn Polstra sc->bge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 2517bf6ef57aSJohn Polstra RF_SHAREABLE | RF_ACTIVE); 2518bf6ef57aSJohn Polstra 2519bf6ef57aSJohn Polstra if (sc->bge_irq == NULL) { 2520bf6ef57aSJohn Polstra device_printf(sc->bge_dev, "couldn't map interrupt\n"); 2521bf6ef57aSJohn Polstra error = ENXIO; 2522bf6ef57aSJohn Polstra goto fail; 2523bf6ef57aSJohn Polstra } 2524bf6ef57aSJohn Polstra 2525bf6ef57aSJohn Polstra BGE_LOCK_INIT(sc, device_get_nameunit(dev)); 2526bf6ef57aSJohn Polstra 252795d67482SBill Paul /* Try to reset the chip. */ 25288cb1383cSDoug Ambrisko if (bge_reset(sc)) { 25298cb1383cSDoug Ambrisko device_printf(sc->bge_dev, "chip reset failed\n"); 25308cb1383cSDoug Ambrisko error = ENXIO; 25318cb1383cSDoug Ambrisko goto fail; 25328cb1383cSDoug Ambrisko } 25338cb1383cSDoug Ambrisko 25348cb1383cSDoug Ambrisko sc->bge_asf_mode = 0; 2535f1a7e6d5SScott Long if (bge_allow_asf && (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) 2536f1a7e6d5SScott Long == BGE_MAGIC_NUMBER)) { 25378cb1383cSDoug Ambrisko if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG) 25388cb1383cSDoug Ambrisko & BGE_HWCFG_ASF) { 25398cb1383cSDoug Ambrisko sc->bge_asf_mode |= ASF_ENABLE; 25408cb1383cSDoug Ambrisko sc->bge_asf_mode |= ASF_STACKUP; 25418cb1383cSDoug Ambrisko if (sc->bge_asicrev == BGE_ASICREV_BCM5750) { 25428cb1383cSDoug Ambrisko sc->bge_asf_mode |= ASF_NEW_HANDSHAKE; 25438cb1383cSDoug Ambrisko } 25448cb1383cSDoug Ambrisko } 25458cb1383cSDoug Ambrisko } 25468cb1383cSDoug Ambrisko 25478cb1383cSDoug Ambrisko /* Try to reset the chip again the nice way. */ 25488cb1383cSDoug Ambrisko bge_stop_fw(sc); 25498cb1383cSDoug Ambrisko bge_sig_pre_reset(sc, BGE_RESET_STOP); 25508cb1383cSDoug Ambrisko if (bge_reset(sc)) { 25518cb1383cSDoug Ambrisko device_printf(sc->bge_dev, "chip reset failed\n"); 25528cb1383cSDoug Ambrisko error = ENXIO; 25538cb1383cSDoug Ambrisko goto fail; 25548cb1383cSDoug Ambrisko } 25558cb1383cSDoug Ambrisko 25568cb1383cSDoug Ambrisko bge_sig_legacy(sc, BGE_RESET_STOP); 25578cb1383cSDoug Ambrisko bge_sig_post_reset(sc, BGE_RESET_STOP); 255895d67482SBill Paul 255995d67482SBill Paul if (bge_chipinit(sc)) { 2560fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "chip initialization failed\n"); 256195d67482SBill Paul error = ENXIO; 256295d67482SBill Paul goto fail; 256395d67482SBill Paul } 256495d67482SBill Paul 256538cc658fSJohn Baldwin error = bge_get_eaddr(sc, eaddr); 256638cc658fSJohn Baldwin if (error) { 256708013fd3SMarius Strobl device_printf(sc->bge_dev, 256808013fd3SMarius Strobl "failed to read station address\n"); 256995d67482SBill Paul error = ENXIO; 257095d67482SBill Paul goto fail; 257195d67482SBill Paul } 257295d67482SBill Paul 2573f41ac2beSBill Paul /* 5705 limits RX return ring to 512 entries. */ 25747ee00338SJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 2575f41ac2beSBill Paul sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705; 2576f41ac2beSBill Paul else 2577f41ac2beSBill Paul sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT; 2578f41ac2beSBill Paul 2579f41ac2beSBill Paul if (bge_dma_alloc(dev)) { 2580fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 2581fe806fdaSPyun YongHyeon "failed to allocate DMA resources\n"); 2582f41ac2beSBill Paul error = ENXIO; 2583f41ac2beSBill Paul goto fail; 2584f41ac2beSBill Paul } 2585f41ac2beSBill Paul 258695d67482SBill Paul /* Set default tuneable values. */ 258795d67482SBill Paul sc->bge_stat_ticks = BGE_TICKS_PER_SEC; 258895d67482SBill Paul sc->bge_rx_coal_ticks = 150; 258995d67482SBill Paul sc->bge_tx_coal_ticks = 150; 25906f8718a3SScott Long sc->bge_rx_max_coal_bds = 10; 25916f8718a3SScott Long sc->bge_tx_max_coal_bds = 10; 259295d67482SBill Paul 259395d67482SBill Paul /* Set up ifnet structure */ 2594fc74a9f9SBrooks Davis ifp = sc->bge_ifp = if_alloc(IFT_ETHER); 2595fc74a9f9SBrooks Davis if (ifp == NULL) { 2596fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "failed to if_alloc()\n"); 2597fc74a9f9SBrooks Davis error = ENXIO; 2598fc74a9f9SBrooks Davis goto fail; 2599fc74a9f9SBrooks Davis } 260095d67482SBill Paul ifp->if_softc = sc; 26019bf40edeSBrooks Davis if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 260295d67482SBill Paul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 260395d67482SBill Paul ifp->if_ioctl = bge_ioctl; 260495d67482SBill Paul ifp->if_start = bge_start; 260595d67482SBill Paul ifp->if_init = bge_init; 260695d67482SBill Paul ifp->if_mtu = ETHERMTU; 26074d665c4dSDag-Erling Smørgrav ifp->if_snd.ifq_drv_maxlen = BGE_TX_RING_CNT - 1; 26084d665c4dSDag-Erling Smørgrav IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen); 26094d665c4dSDag-Erling Smørgrav IFQ_SET_READY(&ifp->if_snd); 261095d67482SBill Paul ifp->if_hwassist = BGE_CSUM_FEATURES; 2611d375e524SGleb Smirnoff ifp->if_capabilities = IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING | 26124e35d186SJung-uk Kim IFCAP_VLAN_MTU; 26134e35d186SJung-uk Kim #ifdef IFCAP_VLAN_HWCSUM 26144e35d186SJung-uk Kim ifp->if_capabilities |= IFCAP_VLAN_HWCSUM; 26154e35d186SJung-uk Kim #endif 261695d67482SBill Paul ifp->if_capenable = ifp->if_capabilities; 261775719184SGleb Smirnoff #ifdef DEVICE_POLLING 261875719184SGleb Smirnoff ifp->if_capabilities |= IFCAP_POLLING; 261975719184SGleb Smirnoff #endif 262095d67482SBill Paul 2621a1d52896SBill Paul /* 2622d375e524SGleb Smirnoff * 5700 B0 chips do not support checksumming correctly due 2623d375e524SGleb Smirnoff * to hardware bugs. 2624d375e524SGleb Smirnoff */ 2625d375e524SGleb Smirnoff if (sc->bge_chipid == BGE_CHIPID_BCM5700_B0) { 2626d375e524SGleb Smirnoff ifp->if_capabilities &= ~IFCAP_HWCSUM; 2627d375e524SGleb Smirnoff ifp->if_capenable &= IFCAP_HWCSUM; 2628d375e524SGleb Smirnoff ifp->if_hwassist = 0; 2629d375e524SGleb Smirnoff } 2630d375e524SGleb Smirnoff 2631d375e524SGleb Smirnoff /* 2632a1d52896SBill Paul * Figure out what sort of media we have by checking the 263341abcc1bSPaul Saab * hardware config word in the first 32k of NIC internal memory, 263441abcc1bSPaul Saab * or fall back to examining the EEPROM if necessary. 263541abcc1bSPaul Saab * Note: on some BCM5700 cards, this value appears to be unset. 263641abcc1bSPaul Saab * If that's the case, we have to rely on identifying the NIC 263741abcc1bSPaul Saab * by its PCI subsystem ID, as we do below for the SysKonnect 263841abcc1bSPaul Saab * SK-9D41. 2639a1d52896SBill Paul */ 264041abcc1bSPaul Saab if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) == BGE_MAGIC_NUMBER) 264141abcc1bSPaul Saab hwcfg = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG); 26425fea260fSMarius Strobl else if ((sc->bge_flags & BGE_FLAG_EADDR) && 26435fea260fSMarius Strobl (sc->bge_asicrev != BGE_ASICREV_BCM5906)) { 2644f6789fbaSPyun YongHyeon if (bge_read_eeprom(sc, (caddr_t)&hwcfg, BGE_EE_HWCFG_OFFSET, 2645f6789fbaSPyun YongHyeon sizeof(hwcfg))) { 2646fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "failed to read EEPROM\n"); 2647f6789fbaSPyun YongHyeon error = ENXIO; 2648f6789fbaSPyun YongHyeon goto fail; 2649f6789fbaSPyun YongHyeon } 265041abcc1bSPaul Saab hwcfg = ntohl(hwcfg); 265141abcc1bSPaul Saab } 265241abcc1bSPaul Saab 265341abcc1bSPaul Saab if ((hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) 2654652ae483SGleb Smirnoff sc->bge_flags |= BGE_FLAG_TBI; 2655a1d52896SBill Paul 265695d67482SBill Paul /* The SysKonnect SK-9D41 is a 1000baseSX card. */ 26570c8aa4eaSJung-uk Kim if ((pci_read_config(dev, BGE_PCI_SUBSYS, 4) >> 16) == SK_SUBSYSID_9D41) 2658652ae483SGleb Smirnoff sc->bge_flags |= BGE_FLAG_TBI; 265995d67482SBill Paul 2660652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 26610c8aa4eaSJung-uk Kim ifmedia_init(&sc->bge_ifmedia, IFM_IMASK, bge_ifmedia_upd, 26620c8aa4eaSJung-uk Kim bge_ifmedia_sts); 26630c8aa4eaSJung-uk Kim ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_1000_SX, 0, NULL); 26646098821cSJung-uk Kim ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_1000_SX | IFM_FDX, 26656098821cSJung-uk Kim 0, NULL); 266695d67482SBill Paul ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 266795d67482SBill Paul ifmedia_set(&sc->bge_ifmedia, IFM_ETHER | IFM_AUTO); 2668da3003f0SBill Paul sc->bge_ifmedia.ifm_media = sc->bge_ifmedia.ifm_cur->ifm_media; 266995d67482SBill Paul } else { 267095d67482SBill Paul /* 26718cb1383cSDoug Ambrisko * Do transceiver setup and tell the firmware the 26728cb1383cSDoug Ambrisko * driver is down so we can try to get access the 26738cb1383cSDoug Ambrisko * probe if ASF is running. Retry a couple of times 26748cb1383cSDoug Ambrisko * if we get a conflict with the ASF firmware accessing 26758cb1383cSDoug Ambrisko * the PHY. 267695d67482SBill Paul */ 26778cb1383cSDoug Ambrisko BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 26788cb1383cSDoug Ambrisko again: 26798cb1383cSDoug Ambrisko bge_asf_driver_up(sc); 26808cb1383cSDoug Ambrisko 26818cb1383cSDoug Ambrisko trys = 0; 268295d67482SBill Paul if (mii_phy_probe(dev, &sc->bge_miibus, 268395d67482SBill Paul bge_ifmedia_upd, bge_ifmedia_sts)) { 26848cb1383cSDoug Ambrisko if (trys++ < 4) { 26858cb1383cSDoug Ambrisko device_printf(sc->bge_dev, "Try again\n"); 26864e35d186SJung-uk Kim bge_miibus_writereg(sc->bge_dev, 1, MII_BMCR, 26874e35d186SJung-uk Kim BMCR_RESET); 26888cb1383cSDoug Ambrisko goto again; 26898cb1383cSDoug Ambrisko } 26908cb1383cSDoug Ambrisko 2691fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "MII without any PHY!\n"); 269295d67482SBill Paul error = ENXIO; 269395d67482SBill Paul goto fail; 269495d67482SBill Paul } 26958cb1383cSDoug Ambrisko 26968cb1383cSDoug Ambrisko /* 26978cb1383cSDoug Ambrisko * Now tell the firmware we are going up after probing the PHY 26988cb1383cSDoug Ambrisko */ 26998cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) 27008cb1383cSDoug Ambrisko BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 270195d67482SBill Paul } 270295d67482SBill Paul 270395d67482SBill Paul /* 2704e255b776SJohn Polstra * When using the BCM5701 in PCI-X mode, data corruption has 2705e255b776SJohn Polstra * been observed in the first few bytes of some received packets. 2706e255b776SJohn Polstra * Aligning the packet buffer in memory eliminates the corruption. 2707e255b776SJohn Polstra * Unfortunately, this misaligns the packet payloads. On platforms 2708e255b776SJohn Polstra * which do not support unaligned accesses, we will realign the 2709e255b776SJohn Polstra * payloads by copying the received packets. 2710e255b776SJohn Polstra */ 2711652ae483SGleb Smirnoff if (sc->bge_asicrev == BGE_ASICREV_BCM5701 && 2712652ae483SGleb Smirnoff sc->bge_flags & BGE_FLAG_PCIX) 2713652ae483SGleb Smirnoff sc->bge_flags |= BGE_FLAG_RX_ALIGNBUG; 2714e255b776SJohn Polstra 2715e255b776SJohn Polstra /* 271695d67482SBill Paul * Call MI attach routine. 271795d67482SBill Paul */ 2718fc74a9f9SBrooks Davis ether_ifattach(ifp, eaddr); 2719b74e67fbSGleb Smirnoff callout_init_mtx(&sc->bge_stat_ch, &sc->bge_mtx, 0); 27200f9bd73bSSam Leffler 27210f9bd73bSSam Leffler /* 27220f9bd73bSSam Leffler * Hookup IRQ last. 27230f9bd73bSSam Leffler */ 27244e35d186SJung-uk Kim #if __FreeBSD_version > 700030 27250f9bd73bSSam Leffler error = bus_setup_intr(dev, sc->bge_irq, INTR_TYPE_NET | INTR_MPSAFE, 2726ef544f63SPaolo Pisati NULL, bge_intr, sc, &sc->bge_intrhand); 27274e35d186SJung-uk Kim #else 27284e35d186SJung-uk Kim error = bus_setup_intr(dev, sc->bge_irq, INTR_TYPE_NET | INTR_MPSAFE, 27294e35d186SJung-uk Kim bge_intr, sc, &sc->bge_intrhand); 27304e35d186SJung-uk Kim #endif 27310f9bd73bSSam Leffler 27320f9bd73bSSam Leffler if (error) { 2733fc74a9f9SBrooks Davis bge_detach(dev); 2734fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "couldn't set up irq\n"); 27350f9bd73bSSam Leffler } 273695d67482SBill Paul 27376f8718a3SScott Long bge_add_sysctls(sc); 27386f8718a3SScott Long 273908013fd3SMarius Strobl return (0); 274008013fd3SMarius Strobl 274195d67482SBill Paul fail: 274208013fd3SMarius Strobl bge_release_resources(sc); 274308013fd3SMarius Strobl 274495d67482SBill Paul return (error); 274595d67482SBill Paul } 274695d67482SBill Paul 274795d67482SBill Paul static int 27483f74909aSGleb Smirnoff bge_detach(device_t dev) 274995d67482SBill Paul { 275095d67482SBill Paul struct bge_softc *sc; 275195d67482SBill Paul struct ifnet *ifp; 275295d67482SBill Paul 275395d67482SBill Paul sc = device_get_softc(dev); 2754fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 275595d67482SBill Paul 275675719184SGleb Smirnoff #ifdef DEVICE_POLLING 275775719184SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) 275875719184SGleb Smirnoff ether_poll_deregister(ifp); 275975719184SGleb Smirnoff #endif 276075719184SGleb Smirnoff 27610f9bd73bSSam Leffler BGE_LOCK(sc); 276295d67482SBill Paul bge_stop(sc); 276395d67482SBill Paul bge_reset(sc); 27640f9bd73bSSam Leffler BGE_UNLOCK(sc); 27650f9bd73bSSam Leffler 27665dda8085SOleg Bulyzhin callout_drain(&sc->bge_stat_ch); 27675dda8085SOleg Bulyzhin 27680f9bd73bSSam Leffler ether_ifdetach(ifp); 276995d67482SBill Paul 2770652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 277195d67482SBill Paul ifmedia_removeall(&sc->bge_ifmedia); 277295d67482SBill Paul } else { 277395d67482SBill Paul bus_generic_detach(dev); 277495d67482SBill Paul device_delete_child(dev, sc->bge_miibus); 277595d67482SBill Paul } 277695d67482SBill Paul 277795d67482SBill Paul bge_release_resources(sc); 277895d67482SBill Paul 277995d67482SBill Paul return (0); 278095d67482SBill Paul } 278195d67482SBill Paul 278295d67482SBill Paul static void 27833f74909aSGleb Smirnoff bge_release_resources(struct bge_softc *sc) 278495d67482SBill Paul { 278595d67482SBill Paul device_t dev; 278695d67482SBill Paul 278795d67482SBill Paul dev = sc->bge_dev; 278895d67482SBill Paul 278995d67482SBill Paul if (sc->bge_intrhand != NULL) 279095d67482SBill Paul bus_teardown_intr(dev, sc->bge_irq, sc->bge_intrhand); 279195d67482SBill Paul 279295d67482SBill Paul if (sc->bge_irq != NULL) 2793724bd939SJohn Polstra bus_release_resource(dev, SYS_RES_IRQ, 2794724bd939SJohn Polstra sc->bge_flags & BGE_FLAG_MSI ? 1 : 0, sc->bge_irq); 2795724bd939SJohn Polstra 27960a55a034SJung-uk Kim #if __FreeBSD_version > 602105 2797724bd939SJohn Polstra if (sc->bge_flags & BGE_FLAG_MSI) 2798724bd939SJohn Polstra pci_release_msi(dev); 27994e35d186SJung-uk Kim #endif 280095d67482SBill Paul 280195d67482SBill Paul if (sc->bge_res != NULL) 280295d67482SBill Paul bus_release_resource(dev, SYS_RES_MEMORY, 280395d67482SBill Paul BGE_PCI_BAR0, sc->bge_res); 280495d67482SBill Paul 2805ad61f896SRuslan Ermilov if (sc->bge_ifp != NULL) 2806ad61f896SRuslan Ermilov if_free(sc->bge_ifp); 2807ad61f896SRuslan Ermilov 2808f41ac2beSBill Paul bge_dma_free(sc); 280995d67482SBill Paul 28100f9bd73bSSam Leffler if (mtx_initialized(&sc->bge_mtx)) /* XXX */ 28110f9bd73bSSam Leffler BGE_LOCK_DESTROY(sc); 281295d67482SBill Paul } 281395d67482SBill Paul 28148cb1383cSDoug Ambrisko static int 28153f74909aSGleb Smirnoff bge_reset(struct bge_softc *sc) 281695d67482SBill Paul { 281795d67482SBill Paul device_t dev; 28185fea260fSMarius Strobl uint32_t cachesize, command, pcistate, reset, val; 28196f8718a3SScott Long void (*write_op)(struct bge_softc *, int, int); 28205fea260fSMarius Strobl int i; 282195d67482SBill Paul 282295d67482SBill Paul dev = sc->bge_dev; 282395d67482SBill Paul 282438cc658fSJohn Baldwin if (BGE_IS_575X_PLUS(sc) && !BGE_IS_5714_FAMILY(sc) && 282538cc658fSJohn Baldwin (sc->bge_asicrev != BGE_ASICREV_BCM5906)) { 28266f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_PCIE) 28276f8718a3SScott Long write_op = bge_writemem_direct; 28286f8718a3SScott Long else 28296f8718a3SScott Long write_op = bge_writemem_ind; 28309ba784dbSScott Long } else 28316f8718a3SScott Long write_op = bge_writereg_ind; 28326f8718a3SScott Long 283395d67482SBill Paul /* Save some important PCI state. */ 283495d67482SBill Paul cachesize = pci_read_config(dev, BGE_PCI_CACHESZ, 4); 283595d67482SBill Paul command = pci_read_config(dev, BGE_PCI_CMD, 4); 283695d67482SBill Paul pcistate = pci_read_config(dev, BGE_PCI_PCISTATE, 4); 283795d67482SBill Paul 283895d67482SBill Paul pci_write_config(dev, BGE_PCI_MISC_CTL, 283995d67482SBill Paul BGE_PCIMISCCTL_INDIRECT_ACCESS | BGE_PCIMISCCTL_MASK_PCI_INTR | 2840e907febfSPyun YongHyeon BGE_HIF_SWAP_OPTIONS | BGE_PCIMISCCTL_PCISTATE_RW, 4); 284195d67482SBill Paul 28426f8718a3SScott Long /* Disable fastboot on controllers that support it. */ 28436f8718a3SScott Long if (sc->bge_asicrev == BGE_ASICREV_BCM5752 || 28446f8718a3SScott Long sc->bge_asicrev == BGE_ASICREV_BCM5755 || 28456f8718a3SScott Long sc->bge_asicrev == BGE_ASICREV_BCM5787) { 28466f8718a3SScott Long if (bootverbose) 28479ba784dbSScott Long device_printf(sc->bge_dev, "Disabling fastboot\n"); 28486f8718a3SScott Long CSR_WRITE_4(sc, BGE_FASTBOOT_PC, 0x0); 28496f8718a3SScott Long } 28506f8718a3SScott Long 28516f8718a3SScott Long /* 28526f8718a3SScott Long * Write the magic number to SRAM at offset 0xB50. 28536f8718a3SScott Long * When firmware finishes its initialization it will 28546f8718a3SScott Long * write ~BGE_MAGIC_NUMBER to the same location. 28556f8718a3SScott Long */ 28566f8718a3SScott Long bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER); 28576f8718a3SScott Long 28580c8aa4eaSJung-uk Kim reset = BGE_MISCCFG_RESET_CORE_CLOCKS | BGE_32BITTIME_66MHZ; 2859e53d81eeSPaul Saab 2860e53d81eeSPaul Saab /* XXX: Broadcom Linux driver. */ 2861652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_PCIE) { 28620c8aa4eaSJung-uk Kim if (CSR_READ_4(sc, 0x7E2C) == 0x60) /* PCIE 1.0 */ 28630c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, 0x7E2C, 0x20); 2864e53d81eeSPaul Saab if (sc->bge_chipid != BGE_CHIPID_BCM5750_A0) { 2865e53d81eeSPaul Saab /* Prevent PCIE link training during global reset */ 28660c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_MISC_CFG, 1 << 29); 28670c8aa4eaSJung-uk Kim reset |= 1 << 29; 2868e53d81eeSPaul Saab } 2869e53d81eeSPaul Saab } 2870e53d81eeSPaul Saab 287121c9e407SDavid Christensen /* 28726f8718a3SScott Long * Set GPHY Power Down Override to leave GPHY 28736f8718a3SScott Long * powered up in D0 uninitialized. 28746f8718a3SScott Long */ 28755345bad0SScott Long if (BGE_IS_5705_PLUS(sc)) 28766f8718a3SScott Long reset |= 0x04000000; 28776f8718a3SScott Long 287895d67482SBill Paul /* Issue global reset */ 28796f8718a3SScott Long write_op(sc, BGE_MISC_CFG, reset); 288095d67482SBill Paul 288138cc658fSJohn Baldwin if (sc->bge_asicrev == BGE_ASICREV_BCM5906) { 28825fea260fSMarius Strobl val = CSR_READ_4(sc, BGE_VCPU_STATUS); 288338cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_VCPU_STATUS, 28845fea260fSMarius Strobl val | BGE_VCPU_STATUS_DRV_RESET); 28855fea260fSMarius Strobl val = CSR_READ_4(sc, BGE_VCPU_EXT_CTRL); 288638cc658fSJohn Baldwin CSR_WRITE_4(sc, BGE_VCPU_EXT_CTRL, 28875fea260fSMarius Strobl val & ~BGE_VCPU_EXT_CTRL_HALT_CPU); 288838cc658fSJohn Baldwin } 288938cc658fSJohn Baldwin 289095d67482SBill Paul DELAY(1000); 289195d67482SBill Paul 2892e53d81eeSPaul Saab /* XXX: Broadcom Linux driver. */ 2893652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_PCIE) { 2894e53d81eeSPaul Saab if (sc->bge_chipid == BGE_CHIPID_BCM5750_A0) { 2895e53d81eeSPaul Saab DELAY(500000); /* wait for link training to complete */ 28965fea260fSMarius Strobl val = pci_read_config(dev, 0xC4, 4); 28975fea260fSMarius Strobl pci_write_config(dev, 0xC4, val | (1 << 15), 4); 2898e53d81eeSPaul Saab } 28999ba784dbSScott Long /* 29009ba784dbSScott Long * Set PCIE max payload size to 128 bytes and clear error 29019ba784dbSScott Long * status. 29029ba784dbSScott Long */ 29030c8aa4eaSJung-uk Kim pci_write_config(dev, 0xD8, 0xF5000, 4); 2904e53d81eeSPaul Saab } 2905e53d81eeSPaul Saab 29063f74909aSGleb Smirnoff /* Reset some of the PCI state that got zapped by reset. */ 290795d67482SBill Paul pci_write_config(dev, BGE_PCI_MISC_CTL, 290895d67482SBill Paul BGE_PCIMISCCTL_INDIRECT_ACCESS | BGE_PCIMISCCTL_MASK_PCI_INTR | 2909e907febfSPyun YongHyeon BGE_HIF_SWAP_OPTIONS | BGE_PCIMISCCTL_PCISTATE_RW, 4); 291095d67482SBill Paul pci_write_config(dev, BGE_PCI_CACHESZ, cachesize, 4); 291195d67482SBill Paul pci_write_config(dev, BGE_PCI_CMD, command, 4); 29120c8aa4eaSJung-uk Kim write_op(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ); 291395d67482SBill Paul 2914bf6ef57aSJohn Polstra /* Re-enable MSI, if neccesary, and enable the memory arbiter. */ 29154c0da0ffSGleb Smirnoff if (BGE_IS_5714_FAMILY(sc)) { 2916bf6ef57aSJohn Polstra /* This chip disables MSI on reset. */ 2917bf6ef57aSJohn Polstra if (sc->bge_flags & BGE_FLAG_MSI) { 2918bf6ef57aSJohn Polstra val = pci_read_config(dev, BGE_PCI_MSI_CTL, 2); 2919bf6ef57aSJohn Polstra pci_write_config(dev, BGE_PCI_MSI_CTL, 2920bf6ef57aSJohn Polstra val | PCIM_MSICTRL_MSI_ENABLE, 2); 2921bf6ef57aSJohn Polstra val = CSR_READ_4(sc, BGE_MSI_MODE); 2922bf6ef57aSJohn Polstra CSR_WRITE_4(sc, BGE_MSI_MODE, 2923bf6ef57aSJohn Polstra val | BGE_MSIMODE_ENABLE); 2924bf6ef57aSJohn Polstra } 29254c0da0ffSGleb Smirnoff val = CSR_READ_4(sc, BGE_MARB_MODE); 29264c0da0ffSGleb Smirnoff CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val); 29274c0da0ffSGleb Smirnoff } else 2928a7b0c314SPaul Saab CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE); 2929a7b0c314SPaul Saab 293038cc658fSJohn Baldwin if (sc->bge_asicrev == BGE_ASICREV_BCM5906) { 293138cc658fSJohn Baldwin for (i = 0; i < BGE_TIMEOUT; i++) { 293238cc658fSJohn Baldwin val = CSR_READ_4(sc, BGE_VCPU_STATUS); 293338cc658fSJohn Baldwin if (val & BGE_VCPU_STATUS_INIT_DONE) 293438cc658fSJohn Baldwin break; 293538cc658fSJohn Baldwin DELAY(100); 293638cc658fSJohn Baldwin } 293738cc658fSJohn Baldwin if (i == BGE_TIMEOUT) { 293838cc658fSJohn Baldwin device_printf(sc->bge_dev, "reset timed out\n"); 293938cc658fSJohn Baldwin return (1); 294038cc658fSJohn Baldwin } 294138cc658fSJohn Baldwin } else { 294295d67482SBill Paul /* 29436f8718a3SScott Long * Poll until we see the 1's complement of the magic number. 294408013fd3SMarius Strobl * This indicates that the firmware initialization is complete. 29455fea260fSMarius Strobl * We expect this to fail if no chip containing the Ethernet 29465fea260fSMarius Strobl * address is fitted though. 294795d67482SBill Paul */ 294895d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 2949d5d23857SJung-uk Kim DELAY(10); 295095d67482SBill Paul val = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM); 295195d67482SBill Paul if (val == ~BGE_MAGIC_NUMBER) 295295d67482SBill Paul break; 295395d67482SBill Paul } 295495d67482SBill Paul 29555fea260fSMarius Strobl if ((sc->bge_flags & BGE_FLAG_EADDR) && i == BGE_TIMEOUT) 29569ba784dbSScott Long device_printf(sc->bge_dev, "firmware handshake timed out, " 29579ba784dbSScott Long "found 0x%08x\n", val); 295838cc658fSJohn Baldwin } 295995d67482SBill Paul 296095d67482SBill Paul /* 296195d67482SBill Paul * XXX Wait for the value of the PCISTATE register to 296295d67482SBill Paul * return to its original pre-reset state. This is a 296395d67482SBill Paul * fairly good indicator of reset completion. If we don't 296495d67482SBill Paul * wait for the reset to fully complete, trying to read 296595d67482SBill Paul * from the device's non-PCI registers may yield garbage 296695d67482SBill Paul * results. 296795d67482SBill Paul */ 296895d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 296995d67482SBill Paul if (pci_read_config(dev, BGE_PCI_PCISTATE, 4) == pcistate) 297095d67482SBill Paul break; 297195d67482SBill Paul DELAY(10); 297295d67482SBill Paul } 297395d67482SBill Paul 29746f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_PCIE) { 29750c8aa4eaSJung-uk Kim reset = bge_readmem_ind(sc, 0x7C00); 29760c8aa4eaSJung-uk Kim bge_writemem_ind(sc, 0x7C00, reset | (1 << 25)); 29776f8718a3SScott Long } 29786f8718a3SScott Long 29793f74909aSGleb Smirnoff /* Fix up byte swapping. */ 2980e907febfSPyun YongHyeon CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS | 298195d67482SBill Paul BGE_MODECTL_BYTESWAP_DATA); 298295d67482SBill Paul 29838cb1383cSDoug Ambrisko /* Tell the ASF firmware we are up */ 29848cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) 29858cb1383cSDoug Ambrisko BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 29868cb1383cSDoug Ambrisko 298795d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_MODE, 0); 298895d67482SBill Paul 2989da3003f0SBill Paul /* 2990da3003f0SBill Paul * The 5704 in TBI mode apparently needs some special 2991da3003f0SBill Paul * adjustment to insure the SERDES drive level is set 2992da3003f0SBill Paul * to 1.2V. 2993da3003f0SBill Paul */ 2994652ae483SGleb Smirnoff if (sc->bge_asicrev == BGE_ASICREV_BCM5704 && 2995652ae483SGleb Smirnoff sc->bge_flags & BGE_FLAG_TBI) { 29965fea260fSMarius Strobl val = CSR_READ_4(sc, BGE_SERDES_CFG); 29975fea260fSMarius Strobl val = (val & ~0xFFF) | 0x880; 29985fea260fSMarius Strobl CSR_WRITE_4(sc, BGE_SERDES_CFG, val); 2999da3003f0SBill Paul } 3000da3003f0SBill Paul 3001e53d81eeSPaul Saab /* XXX: Broadcom Linux driver. */ 3002652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_PCIE && 3003652ae483SGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5750_A0) { 30045fea260fSMarius Strobl val = CSR_READ_4(sc, 0x7C00); 30055fea260fSMarius Strobl CSR_WRITE_4(sc, 0x7C00, val | (1 << 25)); 3006e53d81eeSPaul Saab } 300795d67482SBill Paul DELAY(10000); 30088cb1383cSDoug Ambrisko 30098cb1383cSDoug Ambrisko return(0); 301095d67482SBill Paul } 301195d67482SBill Paul 301295d67482SBill Paul /* 301395d67482SBill Paul * Frame reception handling. This is called if there's a frame 301495d67482SBill Paul * on the receive return list. 301595d67482SBill Paul * 301695d67482SBill Paul * Note: we have to be able to handle two possibilities here: 30171be6acb7SGleb Smirnoff * 1) the frame is from the jumbo receive ring 301895d67482SBill Paul * 2) the frame is from the standard receive ring 301995d67482SBill Paul */ 302095d67482SBill Paul 302195d67482SBill Paul static void 30223f74909aSGleb Smirnoff bge_rxeof(struct bge_softc *sc) 302395d67482SBill Paul { 302495d67482SBill Paul struct ifnet *ifp; 302595d67482SBill Paul int stdcnt = 0, jumbocnt = 0; 302695d67482SBill Paul 30270f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 30280f9bd73bSSam Leffler 30293f74909aSGleb Smirnoff /* Nothing to do. */ 3030cfcb5025SOleg Bulyzhin if (sc->bge_rx_saved_considx == 3031cfcb5025SOleg Bulyzhin sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx) 3032cfcb5025SOleg Bulyzhin return; 3033cfcb5025SOleg Bulyzhin 3034fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 303595d67482SBill Paul 3036f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_return_ring_tag, 3037e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_return_ring_map, BUS_DMASYNC_POSTREAD); 3038f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag, 3039f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_POSTREAD); 30404c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc)) 3041f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag, 30424c0da0ffSGleb Smirnoff sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_POSTREAD); 3043f41ac2beSBill Paul 304495d67482SBill Paul while(sc->bge_rx_saved_considx != 3045f41ac2beSBill Paul sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx) { 304695d67482SBill Paul struct bge_rx_bd *cur_rx; 30473f74909aSGleb Smirnoff uint32_t rxidx; 304895d67482SBill Paul struct mbuf *m = NULL; 30493f74909aSGleb Smirnoff uint16_t vlan_tag = 0; 305095d67482SBill Paul int have_tag = 0; 305195d67482SBill Paul 305275719184SGleb Smirnoff #ifdef DEVICE_POLLING 305375719184SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) { 305475719184SGleb Smirnoff if (sc->rxcycles <= 0) 305575719184SGleb Smirnoff break; 305675719184SGleb Smirnoff sc->rxcycles--; 305775719184SGleb Smirnoff } 305875719184SGleb Smirnoff #endif 305975719184SGleb Smirnoff 306095d67482SBill Paul cur_rx = 3061f41ac2beSBill Paul &sc->bge_ldata.bge_rx_return_ring[sc->bge_rx_saved_considx]; 306295d67482SBill Paul 306395d67482SBill Paul rxidx = cur_rx->bge_idx; 30640434d1b8SBill Paul BGE_INC(sc->bge_rx_saved_considx, sc->bge_return_ring_cnt); 306595d67482SBill Paul 3066cb2eacc7SYaroslav Tykhiy if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING && 3067cb2eacc7SYaroslav Tykhiy cur_rx->bge_flags & BGE_RXBDFLAG_VLAN_TAG) { 306895d67482SBill Paul have_tag = 1; 306995d67482SBill Paul vlan_tag = cur_rx->bge_vlan_tag; 307095d67482SBill Paul } 307195d67482SBill Paul 307295d67482SBill Paul if (cur_rx->bge_flags & BGE_RXBDFLAG_JUMBO_RING) { 307395d67482SBill Paul BGE_INC(sc->bge_jumbo, BGE_JUMBO_RX_RING_CNT); 3074f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo, 3075f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[rxidx], 3076f41ac2beSBill Paul BUS_DMASYNC_POSTREAD); 3077f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo, 3078f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[rxidx]); 307995d67482SBill Paul m = sc->bge_cdata.bge_rx_jumbo_chain[rxidx]; 308095d67482SBill Paul sc->bge_cdata.bge_rx_jumbo_chain[rxidx] = NULL; 308195d67482SBill Paul jumbocnt++; 308295d67482SBill Paul if (cur_rx->bge_flags & BGE_RXBDFLAG_ERROR) { 308395d67482SBill Paul ifp->if_ierrors++; 308495d67482SBill Paul bge_newbuf_jumbo(sc, sc->bge_jumbo, m); 308595d67482SBill Paul continue; 308695d67482SBill Paul } 308795d67482SBill Paul if (bge_newbuf_jumbo(sc, 308895d67482SBill Paul sc->bge_jumbo, NULL) == ENOBUFS) { 308995d67482SBill Paul ifp->if_ierrors++; 309095d67482SBill Paul bge_newbuf_jumbo(sc, sc->bge_jumbo, m); 309195d67482SBill Paul continue; 309295d67482SBill Paul } 309395d67482SBill Paul } else { 309495d67482SBill Paul BGE_INC(sc->bge_std, BGE_STD_RX_RING_CNT); 3095f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_mtag, 3096f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[rxidx], 3097f41ac2beSBill Paul BUS_DMASYNC_POSTREAD); 3098f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag, 3099f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[rxidx]); 310095d67482SBill Paul m = sc->bge_cdata.bge_rx_std_chain[rxidx]; 310195d67482SBill Paul sc->bge_cdata.bge_rx_std_chain[rxidx] = NULL; 310295d67482SBill Paul stdcnt++; 310395d67482SBill Paul if (cur_rx->bge_flags & BGE_RXBDFLAG_ERROR) { 310495d67482SBill Paul ifp->if_ierrors++; 310595d67482SBill Paul bge_newbuf_std(sc, sc->bge_std, m); 310695d67482SBill Paul continue; 310795d67482SBill Paul } 310895d67482SBill Paul if (bge_newbuf_std(sc, sc->bge_std, 310995d67482SBill Paul NULL) == ENOBUFS) { 311095d67482SBill Paul ifp->if_ierrors++; 311195d67482SBill Paul bge_newbuf_std(sc, sc->bge_std, m); 311295d67482SBill Paul continue; 311395d67482SBill Paul } 311495d67482SBill Paul } 311595d67482SBill Paul 311695d67482SBill Paul ifp->if_ipackets++; 3117e65bed95SPyun YongHyeon #ifndef __NO_STRICT_ALIGNMENT 3118e255b776SJohn Polstra /* 3119e65bed95SPyun YongHyeon * For architectures with strict alignment we must make sure 3120e65bed95SPyun YongHyeon * the payload is aligned. 3121e255b776SJohn Polstra */ 3122652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) { 3123e255b776SJohn Polstra bcopy(m->m_data, m->m_data + ETHER_ALIGN, 3124e255b776SJohn Polstra cur_rx->bge_len); 3125e255b776SJohn Polstra m->m_data += ETHER_ALIGN; 3126e255b776SJohn Polstra } 3127e255b776SJohn Polstra #endif 3128473851baSPaul Saab m->m_pkthdr.len = m->m_len = cur_rx->bge_len - ETHER_CRC_LEN; 312995d67482SBill Paul m->m_pkthdr.rcvif = ifp; 313095d67482SBill Paul 3131b874fdd4SYaroslav Tykhiy if (ifp->if_capenable & IFCAP_RXCSUM) { 313278178cd1SGleb Smirnoff if (cur_rx->bge_flags & BGE_RXBDFLAG_IP_CSUM) { 313395d67482SBill Paul m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 31340c8aa4eaSJung-uk Kim if ((cur_rx->bge_ip_csum ^ 0xFFFF) == 0) 31350c8aa4eaSJung-uk Kim m->m_pkthdr.csum_flags |= CSUM_IP_VALID; 313678178cd1SGleb Smirnoff } 3137d375e524SGleb Smirnoff if (cur_rx->bge_flags & BGE_RXBDFLAG_TCP_UDP_CSUM && 3138d375e524SGleb Smirnoff m->m_pkthdr.len >= ETHER_MIN_NOPAD) { 313995d67482SBill Paul m->m_pkthdr.csum_data = 314095d67482SBill Paul cur_rx->bge_tcp_udp_csum; 3141ee7ef91cSOleg Bulyzhin m->m_pkthdr.csum_flags |= 3142ee7ef91cSOleg Bulyzhin CSUM_DATA_VALID | CSUM_PSEUDO_HDR; 314395d67482SBill Paul } 314495d67482SBill Paul } 314595d67482SBill Paul 314695d67482SBill Paul /* 3147673d9191SSam Leffler * If we received a packet with a vlan tag, 3148673d9191SSam Leffler * attach that information to the packet. 314995d67482SBill Paul */ 3150d147662cSGleb Smirnoff if (have_tag) { 31514e35d186SJung-uk Kim #if __FreeBSD_version > 700022 315278ba57b9SAndre Oppermann m->m_pkthdr.ether_vtag = vlan_tag; 315378ba57b9SAndre Oppermann m->m_flags |= M_VLANTAG; 31544e35d186SJung-uk Kim #else 31554e35d186SJung-uk Kim VLAN_INPUT_TAG_NEW(ifp, m, vlan_tag); 31564e35d186SJung-uk Kim if (m == NULL) 31574e35d186SJung-uk Kim continue; 31584e35d186SJung-uk Kim #endif 3159d147662cSGleb Smirnoff } 316095d67482SBill Paul 31610f9bd73bSSam Leffler BGE_UNLOCK(sc); 3162673d9191SSam Leffler (*ifp->if_input)(ifp, m); 31630f9bd73bSSam Leffler BGE_LOCK(sc); 316495d67482SBill Paul } 316595d67482SBill Paul 3166e65bed95SPyun YongHyeon if (stdcnt > 0) 3167f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag, 3168e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREWRITE); 31694c0da0ffSGleb Smirnoff 31704c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc) && jumbocnt > 0) 3171f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag, 31724c0da0ffSGleb Smirnoff sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_PREWRITE); 3173f41ac2beSBill Paul 317438cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_CONS0_LO, sc->bge_rx_saved_considx); 317595d67482SBill Paul if (stdcnt) 317638cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std); 317795d67482SBill Paul if (jumbocnt) 317838cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo); 31796b037352SJung-uk Kim #ifdef notyet 31806b037352SJung-uk Kim /* 31816b037352SJung-uk Kim * This register wraps very quickly under heavy packet drops. 31826b037352SJung-uk Kim * If you need correct statistics, you can enable this check. 31836b037352SJung-uk Kim */ 31846b037352SJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 31856b037352SJung-uk Kim ifp->if_ierrors += CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS); 31866b037352SJung-uk Kim #endif 318795d67482SBill Paul } 318895d67482SBill Paul 318995d67482SBill Paul static void 31903f74909aSGleb Smirnoff bge_txeof(struct bge_softc *sc) 319195d67482SBill Paul { 319295d67482SBill Paul struct bge_tx_bd *cur_tx = NULL; 319395d67482SBill Paul struct ifnet *ifp; 319495d67482SBill Paul 31950f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 31960f9bd73bSSam Leffler 31973f74909aSGleb Smirnoff /* Nothing to do. */ 3198cfcb5025SOleg Bulyzhin if (sc->bge_tx_saved_considx == 3199cfcb5025SOleg Bulyzhin sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx) 3200cfcb5025SOleg Bulyzhin return; 3201cfcb5025SOleg Bulyzhin 3202fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 320395d67482SBill Paul 3204e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_tx_ring_tag, 3205e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_ring_map, 3206e65bed95SPyun YongHyeon BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 320795d67482SBill Paul /* 320895d67482SBill Paul * Go through our tx ring and free mbufs for those 320995d67482SBill Paul * frames that have been sent. 321095d67482SBill Paul */ 321195d67482SBill Paul while (sc->bge_tx_saved_considx != 3212f41ac2beSBill Paul sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx) { 32133f74909aSGleb Smirnoff uint32_t idx = 0; 321495d67482SBill Paul 321595d67482SBill Paul idx = sc->bge_tx_saved_considx; 3216f41ac2beSBill Paul cur_tx = &sc->bge_ldata.bge_tx_ring[idx]; 321795d67482SBill Paul if (cur_tx->bge_flags & BGE_TXBDFLAG_END) 321895d67482SBill Paul ifp->if_opackets++; 321995d67482SBill Paul if (sc->bge_cdata.bge_tx_chain[idx] != NULL) { 3220e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag, 3221e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_dmamap[idx], 3222e65bed95SPyun YongHyeon BUS_DMASYNC_POSTWRITE); 3223f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag, 3224f41ac2beSBill Paul sc->bge_cdata.bge_tx_dmamap[idx]); 3225e65bed95SPyun YongHyeon m_freem(sc->bge_cdata.bge_tx_chain[idx]); 3226e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_chain[idx] = NULL; 322795d67482SBill Paul } 322895d67482SBill Paul sc->bge_txcnt--; 322995d67482SBill Paul BGE_INC(sc->bge_tx_saved_considx, BGE_TX_RING_CNT); 323095d67482SBill Paul } 323195d67482SBill Paul 323295d67482SBill Paul if (cur_tx != NULL) 323313f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 32345b01e77cSBruce Evans if (sc->bge_txcnt == 0) 32355b01e77cSBruce Evans sc->bge_timer = 0; 323695d67482SBill Paul } 323795d67482SBill Paul 323875719184SGleb Smirnoff #ifdef DEVICE_POLLING 323975719184SGleb Smirnoff static void 324075719184SGleb Smirnoff bge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 324175719184SGleb Smirnoff { 324275719184SGleb Smirnoff struct bge_softc *sc = ifp->if_softc; 3243366454f2SOleg Bulyzhin uint32_t statusword; 324475719184SGleb Smirnoff 32453f74909aSGleb Smirnoff BGE_LOCK(sc); 32463f74909aSGleb Smirnoff if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 32473f74909aSGleb Smirnoff BGE_UNLOCK(sc); 32483f74909aSGleb Smirnoff return; 32493f74909aSGleb Smirnoff } 325075719184SGleb Smirnoff 3251dab5cd05SOleg Bulyzhin bus_dmamap_sync(sc->bge_cdata.bge_status_tag, 3252e65bed95SPyun YongHyeon sc->bge_cdata.bge_status_map, BUS_DMASYNC_POSTREAD); 3253dab5cd05SOleg Bulyzhin 32543f74909aSGleb Smirnoff statusword = atomic_readandclear_32( 32553f74909aSGleb Smirnoff &sc->bge_ldata.bge_status_block->bge_status); 3256dab5cd05SOleg Bulyzhin 3257dab5cd05SOleg Bulyzhin bus_dmamap_sync(sc->bge_cdata.bge_status_tag, 3258e65bed95SPyun YongHyeon sc->bge_cdata.bge_status_map, BUS_DMASYNC_PREREAD); 3259366454f2SOleg Bulyzhin 32600c8aa4eaSJung-uk Kim /* Note link event. It will be processed by POLL_AND_CHECK_STATUS. */ 3261366454f2SOleg Bulyzhin if (statusword & BGE_STATFLAG_LINKSTATE_CHANGED) 3262366454f2SOleg Bulyzhin sc->bge_link_evt++; 3263366454f2SOleg Bulyzhin 3264366454f2SOleg Bulyzhin if (cmd == POLL_AND_CHECK_STATUS) 3265366454f2SOleg Bulyzhin if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 && 32664c0da0ffSGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5700_B2) || 3267652ae483SGleb Smirnoff sc->bge_link_evt || (sc->bge_flags & BGE_FLAG_TBI)) 3268366454f2SOleg Bulyzhin bge_link_upd(sc); 3269366454f2SOleg Bulyzhin 3270366454f2SOleg Bulyzhin sc->rxcycles = count; 3271366454f2SOleg Bulyzhin bge_rxeof(sc); 3272366454f2SOleg Bulyzhin bge_txeof(sc); 3273366454f2SOleg Bulyzhin if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 3274366454f2SOleg Bulyzhin bge_start_locked(ifp); 32753f74909aSGleb Smirnoff 32763f74909aSGleb Smirnoff BGE_UNLOCK(sc); 327775719184SGleb Smirnoff } 327875719184SGleb Smirnoff #endif /* DEVICE_POLLING */ 327975719184SGleb Smirnoff 328095d67482SBill Paul static void 32813f74909aSGleb Smirnoff bge_intr(void *xsc) 328295d67482SBill Paul { 328395d67482SBill Paul struct bge_softc *sc; 328495d67482SBill Paul struct ifnet *ifp; 3285dab5cd05SOleg Bulyzhin uint32_t statusword; 328695d67482SBill Paul 328795d67482SBill Paul sc = xsc; 3288f41ac2beSBill Paul 32890f9bd73bSSam Leffler BGE_LOCK(sc); 32900f9bd73bSSam Leffler 3291dab5cd05SOleg Bulyzhin ifp = sc->bge_ifp; 3292dab5cd05SOleg Bulyzhin 329375719184SGleb Smirnoff #ifdef DEVICE_POLLING 329475719184SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) { 329575719184SGleb Smirnoff BGE_UNLOCK(sc); 329675719184SGleb Smirnoff return; 329775719184SGleb Smirnoff } 329875719184SGleb Smirnoff #endif 329975719184SGleb Smirnoff 3300f30cbfc6SScott Long /* 3301b848e032SBruce Evans * Ack the interrupt by writing something to BGE_MBX_IRQ0_LO. Don't 3302b848e032SBruce Evans * disable interrupts by writing nonzero like we used to, since with 3303b848e032SBruce Evans * our current organization this just gives complications and 3304b848e032SBruce Evans * pessimizations for re-enabling interrupts. We used to have races 3305b848e032SBruce Evans * instead of the necessary complications. Disabling interrupts 3306b848e032SBruce Evans * would just reduce the chance of a status update while we are 3307b848e032SBruce Evans * running (by switching to the interrupt-mode coalescence 3308b848e032SBruce Evans * parameters), but this chance is already very low so it is more 3309b848e032SBruce Evans * efficient to get another interrupt than prevent it. 3310b848e032SBruce Evans * 3311b848e032SBruce Evans * We do the ack first to ensure another interrupt if there is a 3312b848e032SBruce Evans * status update after the ack. We don't check for the status 3313b848e032SBruce Evans * changing later because it is more efficient to get another 3314b848e032SBruce Evans * interrupt than prevent it, not quite as above (not checking is 3315b848e032SBruce Evans * a smaller optimization than not toggling the interrupt enable, 3316b848e032SBruce Evans * since checking doesn't involve PCI accesses and toggling require 3317b848e032SBruce Evans * the status check). So toggling would probably be a pessimization 3318b848e032SBruce Evans * even with MSI. It would only be needed for using a task queue. 3319b848e032SBruce Evans */ 332038cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_IRQ0_LO, 0); 3321b848e032SBruce Evans 3322b848e032SBruce Evans /* 3323f30cbfc6SScott Long * Do the mandatory PCI flush as well as get the link status. 3324f30cbfc6SScott Long */ 3325f30cbfc6SScott Long statusword = CSR_READ_4(sc, BGE_MAC_STS) & BGE_MACSTAT_LINK_CHANGED; 3326f41ac2beSBill Paul 3327f30cbfc6SScott Long /* Make sure the descriptor ring indexes are coherent. */ 3328f30cbfc6SScott Long bus_dmamap_sync(sc->bge_cdata.bge_status_tag, 3329f30cbfc6SScott Long sc->bge_cdata.bge_status_map, BUS_DMASYNC_POSTREAD); 3330f30cbfc6SScott Long bus_dmamap_sync(sc->bge_cdata.bge_status_tag, 3331f30cbfc6SScott Long sc->bge_cdata.bge_status_map, BUS_DMASYNC_PREREAD); 3332f30cbfc6SScott Long 33331f313773SOleg Bulyzhin if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 && 33344c0da0ffSGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5700_B2) || 3335f30cbfc6SScott Long statusword || sc->bge_link_evt) 3336dab5cd05SOleg Bulyzhin bge_link_upd(sc); 333795d67482SBill Paul 333813f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 33393f74909aSGleb Smirnoff /* Check RX return ring producer/consumer. */ 334095d67482SBill Paul bge_rxeof(sc); 334195d67482SBill Paul 33423f74909aSGleb Smirnoff /* Check TX ring producer/consumer. */ 334395d67482SBill Paul bge_txeof(sc); 334495d67482SBill Paul } 334595d67482SBill Paul 334613f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING && 334713f4c340SRobert Watson !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 33480f9bd73bSSam Leffler bge_start_locked(ifp); 33490f9bd73bSSam Leffler 33500f9bd73bSSam Leffler BGE_UNLOCK(sc); 335195d67482SBill Paul } 335295d67482SBill Paul 335395d67482SBill Paul static void 33548cb1383cSDoug Ambrisko bge_asf_driver_up(struct bge_softc *sc) 33558cb1383cSDoug Ambrisko { 33568cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) { 33578cb1383cSDoug Ambrisko /* Send ASF heartbeat aprox. every 2s */ 33588cb1383cSDoug Ambrisko if (sc->bge_asf_count) 33598cb1383cSDoug Ambrisko sc->bge_asf_count --; 33608cb1383cSDoug Ambrisko else { 33618cb1383cSDoug Ambrisko sc->bge_asf_count = 5; 33628cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM_FW, 33638cb1383cSDoug Ambrisko BGE_FW_DRV_ALIVE); 33648cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENNCOMM_FW_LEN, 4); 33658cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENNCOMM_FW_DATA, 3); 33668cb1383cSDoug Ambrisko CSR_WRITE_4(sc, BGE_CPU_EVENT, 336739153c5aSJung-uk Kim CSR_READ_4(sc, BGE_CPU_EVENT) | (1 << 14)); 33688cb1383cSDoug Ambrisko } 33698cb1383cSDoug Ambrisko } 33708cb1383cSDoug Ambrisko } 33718cb1383cSDoug Ambrisko 33728cb1383cSDoug Ambrisko static void 3373b74e67fbSGleb Smirnoff bge_tick(void *xsc) 33740f9bd73bSSam Leffler { 3375b74e67fbSGleb Smirnoff struct bge_softc *sc = xsc; 337695d67482SBill Paul struct mii_data *mii = NULL; 337795d67482SBill Paul 33780f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 337995d67482SBill Paul 33805dda8085SOleg Bulyzhin /* Synchronize with possible callout reset/stop. */ 33815dda8085SOleg Bulyzhin if (callout_pending(&sc->bge_stat_ch) || 33825dda8085SOleg Bulyzhin !callout_active(&sc->bge_stat_ch)) 33835dda8085SOleg Bulyzhin return; 33845dda8085SOleg Bulyzhin 33857ee00338SJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 33860434d1b8SBill Paul bge_stats_update_regs(sc); 33870434d1b8SBill Paul else 338895d67482SBill Paul bge_stats_update(sc); 338995d67482SBill Paul 3390652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_TBI) == 0) { 339195d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 339282b67c01SOleg Bulyzhin /* 339382b67c01SOleg Bulyzhin * Do not touch PHY if we have link up. This could break 339482b67c01SOleg Bulyzhin * IPMI/ASF mode or produce extra input errors 339582b67c01SOleg Bulyzhin * (extra errors was reported for bcm5701 & bcm5704). 339682b67c01SOleg Bulyzhin */ 339782b67c01SOleg Bulyzhin if (!sc->bge_link) 339895d67482SBill Paul mii_tick(mii); 33997b97099dSOleg Bulyzhin } else { 34007b97099dSOleg Bulyzhin /* 34017b97099dSOleg Bulyzhin * Since in TBI mode auto-polling can't be used we should poll 34027b97099dSOleg Bulyzhin * link status manually. Here we register pending link event 34037b97099dSOleg Bulyzhin * and trigger interrupt. 34047b97099dSOleg Bulyzhin */ 34057b97099dSOleg Bulyzhin #ifdef DEVICE_POLLING 34063f74909aSGleb Smirnoff /* In polling mode we poll link state in bge_poll(). */ 34077b97099dSOleg Bulyzhin if (!(sc->bge_ifp->if_capenable & IFCAP_POLLING)) 34087b97099dSOleg Bulyzhin #endif 34097b97099dSOleg Bulyzhin { 34107b97099dSOleg Bulyzhin sc->bge_link_evt++; 34114f0794ffSBjoern A. Zeeb if (sc->bge_asicrev == BGE_ASICREV_BCM5700 || 34124f0794ffSBjoern A. Zeeb sc->bge_flags & BGE_FLAG_5788) 34137b97099dSOleg Bulyzhin BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_SET); 34144f0794ffSBjoern A. Zeeb else 34154f0794ffSBjoern A. Zeeb BGE_SETBIT(sc, BGE_HCC_MODE, BGE_HCCMODE_COAL_NOW); 34167b97099dSOleg Bulyzhin } 3417dab5cd05SOleg Bulyzhin } 341895d67482SBill Paul 34198cb1383cSDoug Ambrisko bge_asf_driver_up(sc); 3420b74e67fbSGleb Smirnoff bge_watchdog(sc); 34218cb1383cSDoug Ambrisko 3422dab5cd05SOleg Bulyzhin callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc); 342395d67482SBill Paul } 342495d67482SBill Paul 342595d67482SBill Paul static void 34263f74909aSGleb Smirnoff bge_stats_update_regs(struct bge_softc *sc) 34270434d1b8SBill Paul { 34283f74909aSGleb Smirnoff struct ifnet *ifp; 34290434d1b8SBill Paul 3430fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 34310434d1b8SBill Paul 34326b037352SJung-uk Kim ifp->if_collisions += CSR_READ_4(sc, BGE_MAC_STATS + 34337e6e2507SJung-uk Kim offsetof(struct bge_mac_stats_regs, etherStatsCollisions)); 34347e6e2507SJung-uk Kim 34356b037352SJung-uk Kim ifp->if_ierrors += CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS); 34360434d1b8SBill Paul } 34370434d1b8SBill Paul 34380434d1b8SBill Paul static void 34393f74909aSGleb Smirnoff bge_stats_update(struct bge_softc *sc) 344095d67482SBill Paul { 344195d67482SBill Paul struct ifnet *ifp; 3442e907febfSPyun YongHyeon bus_size_t stats; 34437e6e2507SJung-uk Kim uint32_t cnt; /* current register value */ 344495d67482SBill Paul 3445fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 344695d67482SBill Paul 3447e907febfSPyun YongHyeon stats = BGE_MEMWIN_START + BGE_STATS_BLOCK; 3448e907febfSPyun YongHyeon 3449e907febfSPyun YongHyeon #define READ_STAT(sc, stats, stat) \ 3450e907febfSPyun YongHyeon CSR_READ_4(sc, stats + offsetof(struct bge_stats, stat)) 345195d67482SBill Paul 34528634dfffSJung-uk Kim cnt = READ_STAT(sc, stats, txstats.etherStatsCollisions.bge_addr_lo); 34536b037352SJung-uk Kim ifp->if_collisions += (uint32_t)(cnt - sc->bge_tx_collisions); 34546fb34dd2SOleg Bulyzhin sc->bge_tx_collisions = cnt; 34556fb34dd2SOleg Bulyzhin 34566fb34dd2SOleg Bulyzhin cnt = READ_STAT(sc, stats, ifInDiscards.bge_addr_lo); 34576b037352SJung-uk Kim ifp->if_ierrors += (uint32_t)(cnt - sc->bge_rx_discards); 34586fb34dd2SOleg Bulyzhin sc->bge_rx_discards = cnt; 34596fb34dd2SOleg Bulyzhin 34606fb34dd2SOleg Bulyzhin cnt = READ_STAT(sc, stats, txstats.ifOutDiscards.bge_addr_lo); 34616b037352SJung-uk Kim ifp->if_oerrors += (uint32_t)(cnt - sc->bge_tx_discards); 34626fb34dd2SOleg Bulyzhin sc->bge_tx_discards = cnt; 346395d67482SBill Paul 3464e907febfSPyun YongHyeon #undef READ_STAT 346595d67482SBill Paul } 346695d67482SBill Paul 346795d67482SBill Paul /* 3468d375e524SGleb Smirnoff * Pad outbound frame to ETHER_MIN_NOPAD for an unusual reason. 3469d375e524SGleb Smirnoff * The bge hardware will pad out Tx runts to ETHER_MIN_NOPAD, 3470d375e524SGleb Smirnoff * but when such padded frames employ the bge IP/TCP checksum offload, 3471d375e524SGleb Smirnoff * the hardware checksum assist gives incorrect results (possibly 3472d375e524SGleb Smirnoff * from incorporating its own padding into the UDP/TCP checksum; who knows). 3473d375e524SGleb Smirnoff * If we pad such runts with zeros, the onboard checksum comes out correct. 3474d375e524SGleb Smirnoff */ 3475d375e524SGleb Smirnoff static __inline int 3476d375e524SGleb Smirnoff bge_cksum_pad(struct mbuf *m) 3477d375e524SGleb Smirnoff { 3478d375e524SGleb Smirnoff int padlen = ETHER_MIN_NOPAD - m->m_pkthdr.len; 3479d375e524SGleb Smirnoff struct mbuf *last; 3480d375e524SGleb Smirnoff 3481d375e524SGleb Smirnoff /* If there's only the packet-header and we can pad there, use it. */ 3482d375e524SGleb Smirnoff if (m->m_pkthdr.len == m->m_len && M_WRITABLE(m) && 3483d375e524SGleb Smirnoff M_TRAILINGSPACE(m) >= padlen) { 3484d375e524SGleb Smirnoff last = m; 3485d375e524SGleb Smirnoff } else { 3486d375e524SGleb Smirnoff /* 3487d375e524SGleb Smirnoff * Walk packet chain to find last mbuf. We will either 3488d375e524SGleb Smirnoff * pad there, or append a new mbuf and pad it. 3489d375e524SGleb Smirnoff */ 3490d375e524SGleb Smirnoff for (last = m; last->m_next != NULL; last = last->m_next); 3491d375e524SGleb Smirnoff if (!(M_WRITABLE(last) && M_TRAILINGSPACE(last) >= padlen)) { 3492d375e524SGleb Smirnoff /* Allocate new empty mbuf, pad it. Compact later. */ 3493d375e524SGleb Smirnoff struct mbuf *n; 3494d375e524SGleb Smirnoff 3495d375e524SGleb Smirnoff MGET(n, M_DONTWAIT, MT_DATA); 3496d375e524SGleb Smirnoff if (n == NULL) 3497d375e524SGleb Smirnoff return (ENOBUFS); 3498d375e524SGleb Smirnoff n->m_len = 0; 3499d375e524SGleb Smirnoff last->m_next = n; 3500d375e524SGleb Smirnoff last = n; 3501d375e524SGleb Smirnoff } 3502d375e524SGleb Smirnoff } 3503d375e524SGleb Smirnoff 3504d375e524SGleb Smirnoff /* Now zero the pad area, to avoid the bge cksum-assist bug. */ 3505d375e524SGleb Smirnoff memset(mtod(last, caddr_t) + last->m_len, 0, padlen); 3506d375e524SGleb Smirnoff last->m_len += padlen; 3507d375e524SGleb Smirnoff m->m_pkthdr.len += padlen; 3508d375e524SGleb Smirnoff 3509d375e524SGleb Smirnoff return (0); 3510d375e524SGleb Smirnoff } 3511d375e524SGleb Smirnoff 3512d375e524SGleb Smirnoff /* 351395d67482SBill Paul * Encapsulate an mbuf chain in the tx ring by coupling the mbuf data 351495d67482SBill Paul * pointers to descriptors. 351595d67482SBill Paul */ 351695d67482SBill Paul static int 3517676ad2c9SGleb Smirnoff bge_encap(struct bge_softc *sc, struct mbuf **m_head, uint32_t *txidx) 351895d67482SBill Paul { 35197e27542aSGleb Smirnoff bus_dma_segment_t segs[BGE_NSEG_NEW]; 3520f41ac2beSBill Paul bus_dmamap_t map; 3521676ad2c9SGleb Smirnoff struct bge_tx_bd *d; 3522676ad2c9SGleb Smirnoff struct mbuf *m = *m_head; 35237e27542aSGleb Smirnoff uint32_t idx = *txidx; 3524676ad2c9SGleb Smirnoff uint16_t csum_flags; 35257e27542aSGleb Smirnoff int nsegs, i, error; 352695d67482SBill Paul 35276909dc43SGleb Smirnoff csum_flags = 0; 35286909dc43SGleb Smirnoff if (m->m_pkthdr.csum_flags) { 35296909dc43SGleb Smirnoff if (m->m_pkthdr.csum_flags & CSUM_IP) 35306909dc43SGleb Smirnoff csum_flags |= BGE_TXBDFLAG_IP_CSUM; 35316909dc43SGleb Smirnoff if (m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) { 35326909dc43SGleb Smirnoff csum_flags |= BGE_TXBDFLAG_TCP_UDP_CSUM; 35336909dc43SGleb Smirnoff if (m->m_pkthdr.len < ETHER_MIN_NOPAD && 35346909dc43SGleb Smirnoff (error = bge_cksum_pad(m)) != 0) { 35356909dc43SGleb Smirnoff m_freem(m); 35366909dc43SGleb Smirnoff *m_head = NULL; 35376909dc43SGleb Smirnoff return (error); 35386909dc43SGleb Smirnoff } 35396909dc43SGleb Smirnoff } 35406909dc43SGleb Smirnoff if (m->m_flags & M_LASTFRAG) 35416909dc43SGleb Smirnoff csum_flags |= BGE_TXBDFLAG_IP_FRAG_END; 35426909dc43SGleb Smirnoff else if (m->m_flags & M_FRAG) 35436909dc43SGleb Smirnoff csum_flags |= BGE_TXBDFLAG_IP_FRAG; 35446909dc43SGleb Smirnoff } 35456909dc43SGleb Smirnoff 35467e27542aSGleb Smirnoff map = sc->bge_cdata.bge_tx_dmamap[idx]; 3547676ad2c9SGleb Smirnoff error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag, map, m, segs, 3548676ad2c9SGleb Smirnoff &nsegs, BUS_DMA_NOWAIT); 35497e27542aSGleb Smirnoff if (error == EFBIG) { 35504eee14cbSMarius Strobl m = m_collapse(m, M_DONTWAIT, BGE_NSEG_NEW); 3551676ad2c9SGleb Smirnoff if (m == NULL) { 3552676ad2c9SGleb Smirnoff m_freem(*m_head); 3553676ad2c9SGleb Smirnoff *m_head = NULL; 35547e27542aSGleb Smirnoff return (ENOBUFS); 35557e27542aSGleb Smirnoff } 3556676ad2c9SGleb Smirnoff *m_head = m; 3557676ad2c9SGleb Smirnoff error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag, map, m, 3558676ad2c9SGleb Smirnoff segs, &nsegs, BUS_DMA_NOWAIT); 3559676ad2c9SGleb Smirnoff if (error) { 3560676ad2c9SGleb Smirnoff m_freem(m); 3561676ad2c9SGleb Smirnoff *m_head = NULL; 35627e27542aSGleb Smirnoff return (error); 35637e27542aSGleb Smirnoff } 3564676ad2c9SGleb Smirnoff } else if (error != 0) 3565676ad2c9SGleb Smirnoff return (error); 35667e27542aSGleb Smirnoff 356795d67482SBill Paul /* 356895d67482SBill Paul * Sanity check: avoid coming within 16 descriptors 356995d67482SBill Paul * of the end of the ring. 357095d67482SBill Paul */ 35717e27542aSGleb Smirnoff if (nsegs > (BGE_TX_RING_CNT - sc->bge_txcnt - 16)) { 35727e27542aSGleb Smirnoff bus_dmamap_unload(sc->bge_cdata.bge_mtag, map); 357395d67482SBill Paul return (ENOBUFS); 35747e27542aSGleb Smirnoff } 35757e27542aSGleb Smirnoff 3576e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag, map, BUS_DMASYNC_PREWRITE); 3577e65bed95SPyun YongHyeon 35787e27542aSGleb Smirnoff for (i = 0; ; i++) { 35797e27542aSGleb Smirnoff d = &sc->bge_ldata.bge_tx_ring[idx]; 35807e27542aSGleb Smirnoff d->bge_addr.bge_addr_lo = BGE_ADDR_LO(segs[i].ds_addr); 35817e27542aSGleb Smirnoff d->bge_addr.bge_addr_hi = BGE_ADDR_HI(segs[i].ds_addr); 35827e27542aSGleb Smirnoff d->bge_len = segs[i].ds_len; 35837e27542aSGleb Smirnoff d->bge_flags = csum_flags; 35847e27542aSGleb Smirnoff if (i == nsegs - 1) 35857e27542aSGleb Smirnoff break; 35867e27542aSGleb Smirnoff BGE_INC(idx, BGE_TX_RING_CNT); 35877e27542aSGleb Smirnoff } 35887e27542aSGleb Smirnoff 35897e27542aSGleb Smirnoff /* Mark the last segment as end of packet... */ 35907e27542aSGleb Smirnoff d->bge_flags |= BGE_TXBDFLAG_END; 3591676ad2c9SGleb Smirnoff 35927e27542aSGleb Smirnoff /* ... and put VLAN tag into first segment. */ 35937e27542aSGleb Smirnoff d = &sc->bge_ldata.bge_tx_ring[*txidx]; 35944e35d186SJung-uk Kim #if __FreeBSD_version > 700022 359578ba57b9SAndre Oppermann if (m->m_flags & M_VLANTAG) { 35967e27542aSGleb Smirnoff d->bge_flags |= BGE_TXBDFLAG_VLAN_TAG; 359778ba57b9SAndre Oppermann d->bge_vlan_tag = m->m_pkthdr.ether_vtag; 35987e27542aSGleb Smirnoff } else 35997e27542aSGleb Smirnoff d->bge_vlan_tag = 0; 36004e35d186SJung-uk Kim #else 36014e35d186SJung-uk Kim { 36024e35d186SJung-uk Kim struct m_tag *mtag; 36034e35d186SJung-uk Kim 36044e35d186SJung-uk Kim if ((mtag = VLAN_OUTPUT_TAG(sc->bge_ifp, m)) != NULL) { 36054e35d186SJung-uk Kim d->bge_flags |= BGE_TXBDFLAG_VLAN_TAG; 36064e35d186SJung-uk Kim d->bge_vlan_tag = VLAN_TAG_VALUE(mtag); 36074e35d186SJung-uk Kim } else 36084e35d186SJung-uk Kim d->bge_vlan_tag = 0; 36094e35d186SJung-uk Kim } 36104e35d186SJung-uk Kim #endif 3611f41ac2beSBill Paul 3612f41ac2beSBill Paul /* 3613f41ac2beSBill Paul * Insure that the map for this transmission 3614f41ac2beSBill Paul * is placed at the array index of the last descriptor 3615f41ac2beSBill Paul * in this chain. 3616f41ac2beSBill Paul */ 36177e27542aSGleb Smirnoff sc->bge_cdata.bge_tx_dmamap[*txidx] = sc->bge_cdata.bge_tx_dmamap[idx]; 36187e27542aSGleb Smirnoff sc->bge_cdata.bge_tx_dmamap[idx] = map; 3619676ad2c9SGleb Smirnoff sc->bge_cdata.bge_tx_chain[idx] = m; 36207e27542aSGleb Smirnoff sc->bge_txcnt += nsegs; 362195d67482SBill Paul 36227e27542aSGleb Smirnoff BGE_INC(idx, BGE_TX_RING_CNT); 36237e27542aSGleb Smirnoff *txidx = idx; 362495d67482SBill Paul 362595d67482SBill Paul return (0); 362695d67482SBill Paul } 362795d67482SBill Paul 362895d67482SBill Paul /* 362995d67482SBill Paul * Main transmit routine. To avoid having to do mbuf copies, we put pointers 363095d67482SBill Paul * to the mbuf data regions directly in the transmit descriptors. 363195d67482SBill Paul */ 363295d67482SBill Paul static void 36333f74909aSGleb Smirnoff bge_start_locked(struct ifnet *ifp) 363495d67482SBill Paul { 363595d67482SBill Paul struct bge_softc *sc; 363695d67482SBill Paul struct mbuf *m_head = NULL; 363714bbd30fSGleb Smirnoff uint32_t prodidx; 3638303a718cSDag-Erling Smørgrav int count = 0; 363995d67482SBill Paul 364095d67482SBill Paul sc = ifp->if_softc; 364195d67482SBill Paul 3642dab5cd05SOleg Bulyzhin if (!sc->bge_link || IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 364395d67482SBill Paul return; 364495d67482SBill Paul 364514bbd30fSGleb Smirnoff prodidx = sc->bge_tx_prodidx; 364695d67482SBill Paul 364795d67482SBill Paul while(sc->bge_cdata.bge_tx_chain[prodidx] == NULL) { 36484d665c4dSDag-Erling Smørgrav IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 364995d67482SBill Paul if (m_head == NULL) 365095d67482SBill Paul break; 365195d67482SBill Paul 365295d67482SBill Paul /* 365395d67482SBill Paul * XXX 3654b874fdd4SYaroslav Tykhiy * The code inside the if() block is never reached since we 3655b874fdd4SYaroslav Tykhiy * must mark CSUM_IP_FRAGS in our if_hwassist to start getting 3656b874fdd4SYaroslav Tykhiy * requests to checksum TCP/UDP in a fragmented packet. 3657b874fdd4SYaroslav Tykhiy * 3658b874fdd4SYaroslav Tykhiy * XXX 365995d67482SBill Paul * safety overkill. If this is a fragmented packet chain 366095d67482SBill Paul * with delayed TCP/UDP checksums, then only encapsulate 366195d67482SBill Paul * it if we have enough descriptors to handle the entire 366295d67482SBill Paul * chain at once. 366395d67482SBill Paul * (paranoia -- may not actually be needed) 366495d67482SBill Paul */ 366595d67482SBill Paul if (m_head->m_flags & M_FIRSTFRAG && 366695d67482SBill Paul m_head->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) { 366795d67482SBill Paul if ((BGE_TX_RING_CNT - sc->bge_txcnt) < 366895d67482SBill Paul m_head->m_pkthdr.csum_data + 16) { 36694d665c4dSDag-Erling Smørgrav IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 367013f4c340SRobert Watson ifp->if_drv_flags |= IFF_DRV_OACTIVE; 367195d67482SBill Paul break; 367295d67482SBill Paul } 367395d67482SBill Paul } 367495d67482SBill Paul 367595d67482SBill Paul /* 367695d67482SBill Paul * Pack the data into the transmit ring. If we 367795d67482SBill Paul * don't have room, set the OACTIVE flag and wait 367895d67482SBill Paul * for the NIC to drain the ring. 367995d67482SBill Paul */ 3680676ad2c9SGleb Smirnoff if (bge_encap(sc, &m_head, &prodidx)) { 3681676ad2c9SGleb Smirnoff if (m_head == NULL) 3682676ad2c9SGleb Smirnoff break; 36834d665c4dSDag-Erling Smørgrav IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 368413f4c340SRobert Watson ifp->if_drv_flags |= IFF_DRV_OACTIVE; 368595d67482SBill Paul break; 368695d67482SBill Paul } 3687303a718cSDag-Erling Smørgrav ++count; 368895d67482SBill Paul 368995d67482SBill Paul /* 369095d67482SBill Paul * If there's a BPF listener, bounce a copy of this frame 369195d67482SBill Paul * to him. 369295d67482SBill Paul */ 36934e35d186SJung-uk Kim #ifdef ETHER_BPF_MTAP 369445ee6ab3SJung-uk Kim ETHER_BPF_MTAP(ifp, m_head); 36954e35d186SJung-uk Kim #else 36964e35d186SJung-uk Kim BPF_MTAP(ifp, m_head); 36974e35d186SJung-uk Kim #endif 369895d67482SBill Paul } 369995d67482SBill Paul 37003f74909aSGleb Smirnoff if (count == 0) 37013f74909aSGleb Smirnoff /* No packets were dequeued. */ 3702303a718cSDag-Erling Smørgrav return; 3703303a718cSDag-Erling Smørgrav 37043f74909aSGleb Smirnoff /* Transmit. */ 370538cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_TX_HOST_PROD0_LO, prodidx); 37063927098fSPaul Saab /* 5700 b2 errata */ 3707e0ced696SPaul Saab if (sc->bge_chiprev == BGE_CHIPREV_5700_BX) 370838cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_TX_HOST_PROD0_LO, prodidx); 370995d67482SBill Paul 371014bbd30fSGleb Smirnoff sc->bge_tx_prodidx = prodidx; 371114bbd30fSGleb Smirnoff 371295d67482SBill Paul /* 371395d67482SBill Paul * Set a timeout in case the chip goes out to lunch. 371495d67482SBill Paul */ 3715b74e67fbSGleb Smirnoff sc->bge_timer = 5; 371695d67482SBill Paul } 371795d67482SBill Paul 37180f9bd73bSSam Leffler /* 37190f9bd73bSSam Leffler * Main transmit routine. To avoid having to do mbuf copies, we put pointers 37200f9bd73bSSam Leffler * to the mbuf data regions directly in the transmit descriptors. 37210f9bd73bSSam Leffler */ 372295d67482SBill Paul static void 37233f74909aSGleb Smirnoff bge_start(struct ifnet *ifp) 372495d67482SBill Paul { 37250f9bd73bSSam Leffler struct bge_softc *sc; 37260f9bd73bSSam Leffler 37270f9bd73bSSam Leffler sc = ifp->if_softc; 37280f9bd73bSSam Leffler BGE_LOCK(sc); 37290f9bd73bSSam Leffler bge_start_locked(ifp); 37300f9bd73bSSam Leffler BGE_UNLOCK(sc); 37310f9bd73bSSam Leffler } 37320f9bd73bSSam Leffler 37330f9bd73bSSam Leffler static void 37343f74909aSGleb Smirnoff bge_init_locked(struct bge_softc *sc) 37350f9bd73bSSam Leffler { 373695d67482SBill Paul struct ifnet *ifp; 37373f74909aSGleb Smirnoff uint16_t *m; 373895d67482SBill Paul 37390f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 374095d67482SBill Paul 3741fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 374295d67482SBill Paul 374313f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING) 374495d67482SBill Paul return; 374595d67482SBill Paul 374695d67482SBill Paul /* Cancel pending I/O and flush buffers. */ 374795d67482SBill Paul bge_stop(sc); 37488cb1383cSDoug Ambrisko 37498cb1383cSDoug Ambrisko bge_stop_fw(sc); 37508cb1383cSDoug Ambrisko bge_sig_pre_reset(sc, BGE_RESET_START); 375195d67482SBill Paul bge_reset(sc); 37528cb1383cSDoug Ambrisko bge_sig_legacy(sc, BGE_RESET_START); 37538cb1383cSDoug Ambrisko bge_sig_post_reset(sc, BGE_RESET_START); 37548cb1383cSDoug Ambrisko 375595d67482SBill Paul bge_chipinit(sc); 375695d67482SBill Paul 375795d67482SBill Paul /* 375895d67482SBill Paul * Init the various state machines, ring 375995d67482SBill Paul * control blocks and firmware. 376095d67482SBill Paul */ 376195d67482SBill Paul if (bge_blockinit(sc)) { 3762fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "initialization failure\n"); 376395d67482SBill Paul return; 376495d67482SBill Paul } 376595d67482SBill Paul 3766fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 376795d67482SBill Paul 376895d67482SBill Paul /* Specify MTU. */ 376995d67482SBill Paul CSR_WRITE_4(sc, BGE_RX_MTU, ifp->if_mtu + 3770cb2eacc7SYaroslav Tykhiy ETHER_HDR_LEN + ETHER_CRC_LEN + 3771cb2eacc7SYaroslav Tykhiy (ifp->if_capenable & IFCAP_VLAN_MTU ? ETHER_VLAN_ENCAP_LEN : 0)); 377295d67482SBill Paul 377395d67482SBill Paul /* Load our MAC address. */ 37743f74909aSGleb Smirnoff m = (uint16_t *)IF_LLADDR(sc->bge_ifp); 377595d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_ADDR1_LO, htons(m[0])); 377695d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI, (htons(m[1]) << 16) | htons(m[2])); 377795d67482SBill Paul 37783e9b1bcaSJung-uk Kim /* Program promiscuous mode. */ 37793e9b1bcaSJung-uk Kim bge_setpromisc(sc); 378095d67482SBill Paul 378195d67482SBill Paul /* Program multicast filter. */ 378295d67482SBill Paul bge_setmulti(sc); 378395d67482SBill Paul 3784cb2eacc7SYaroslav Tykhiy /* Program VLAN tag stripping. */ 3785cb2eacc7SYaroslav Tykhiy bge_setvlan(sc); 3786cb2eacc7SYaroslav Tykhiy 378795d67482SBill Paul /* Init RX ring. */ 378895d67482SBill Paul bge_init_rx_ring_std(sc); 378995d67482SBill Paul 37900434d1b8SBill Paul /* 37910434d1b8SBill Paul * Workaround for a bug in 5705 ASIC rev A0. Poll the NIC's 37920434d1b8SBill Paul * memory to insure that the chip has in fact read the first 37930434d1b8SBill Paul * entry of the ring. 37940434d1b8SBill Paul */ 37950434d1b8SBill Paul if (sc->bge_chipid == BGE_CHIPID_BCM5705_A0) { 37963f74909aSGleb Smirnoff uint32_t v, i; 37970434d1b8SBill Paul for (i = 0; i < 10; i++) { 37980434d1b8SBill Paul DELAY(20); 37990434d1b8SBill Paul v = bge_readmem_ind(sc, BGE_STD_RX_RINGS + 8); 38000434d1b8SBill Paul if (v == (MCLBYTES - ETHER_ALIGN)) 38010434d1b8SBill Paul break; 38020434d1b8SBill Paul } 38030434d1b8SBill Paul if (i == 10) 3804fe806fdaSPyun YongHyeon device_printf (sc->bge_dev, 3805fe806fdaSPyun YongHyeon "5705 A0 chip failed to load RX ring\n"); 38060434d1b8SBill Paul } 38070434d1b8SBill Paul 380895d67482SBill Paul /* Init jumbo RX ring. */ 380995d67482SBill Paul if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 381095d67482SBill Paul bge_init_rx_ring_jumbo(sc); 381195d67482SBill Paul 38123f74909aSGleb Smirnoff /* Init our RX return ring index. */ 381395d67482SBill Paul sc->bge_rx_saved_considx = 0; 381495d67482SBill Paul 38157e6e2507SJung-uk Kim /* Init our RX/TX stat counters. */ 38167e6e2507SJung-uk Kim sc->bge_rx_discards = sc->bge_tx_discards = sc->bge_tx_collisions = 0; 38177e6e2507SJung-uk Kim 381895d67482SBill Paul /* Init TX ring. */ 381995d67482SBill Paul bge_init_tx_ring(sc); 382095d67482SBill Paul 38213f74909aSGleb Smirnoff /* Turn on transmitter. */ 382295d67482SBill Paul BGE_SETBIT(sc, BGE_TX_MODE, BGE_TXMODE_ENABLE); 382395d67482SBill Paul 38243f74909aSGleb Smirnoff /* Turn on receiver. */ 382595d67482SBill Paul BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE); 382695d67482SBill Paul 382795d67482SBill Paul /* Tell firmware we're alive. */ 382895d67482SBill Paul BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 382995d67482SBill Paul 383075719184SGleb Smirnoff #ifdef DEVICE_POLLING 383175719184SGleb Smirnoff /* Disable interrupts if we are polling. */ 383275719184SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) { 383375719184SGleb Smirnoff BGE_SETBIT(sc, BGE_PCI_MISC_CTL, 383475719184SGleb Smirnoff BGE_PCIMISCCTL_MASK_PCI_INTR); 383538cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_IRQ0_LO, 1); 383675719184SGleb Smirnoff } else 383775719184SGleb Smirnoff #endif 383875719184SGleb Smirnoff 383995d67482SBill Paul /* Enable host interrupts. */ 384075719184SGleb Smirnoff { 384195d67482SBill Paul BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_CLEAR_INTA); 384295d67482SBill Paul BGE_CLRBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR); 384338cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_IRQ0_LO, 0); 384475719184SGleb Smirnoff } 384595d67482SBill Paul 384667d5e043SOleg Bulyzhin bge_ifmedia_upd_locked(ifp); 384795d67482SBill Paul 384813f4c340SRobert Watson ifp->if_drv_flags |= IFF_DRV_RUNNING; 384913f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 385095d67482SBill Paul 38510f9bd73bSSam Leffler callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc); 38520f9bd73bSSam Leffler } 38530f9bd73bSSam Leffler 38540f9bd73bSSam Leffler static void 38553f74909aSGleb Smirnoff bge_init(void *xsc) 38560f9bd73bSSam Leffler { 38570f9bd73bSSam Leffler struct bge_softc *sc = xsc; 38580f9bd73bSSam Leffler 38590f9bd73bSSam Leffler BGE_LOCK(sc); 38600f9bd73bSSam Leffler bge_init_locked(sc); 38610f9bd73bSSam Leffler BGE_UNLOCK(sc); 386295d67482SBill Paul } 386395d67482SBill Paul 386495d67482SBill Paul /* 386595d67482SBill Paul * Set media options. 386695d67482SBill Paul */ 386795d67482SBill Paul static int 38683f74909aSGleb Smirnoff bge_ifmedia_upd(struct ifnet *ifp) 386995d67482SBill Paul { 387067d5e043SOleg Bulyzhin struct bge_softc *sc = ifp->if_softc; 387167d5e043SOleg Bulyzhin int res; 387267d5e043SOleg Bulyzhin 387367d5e043SOleg Bulyzhin BGE_LOCK(sc); 387467d5e043SOleg Bulyzhin res = bge_ifmedia_upd_locked(ifp); 387567d5e043SOleg Bulyzhin BGE_UNLOCK(sc); 387667d5e043SOleg Bulyzhin 387767d5e043SOleg Bulyzhin return (res); 387867d5e043SOleg Bulyzhin } 387967d5e043SOleg Bulyzhin 388067d5e043SOleg Bulyzhin static int 388167d5e043SOleg Bulyzhin bge_ifmedia_upd_locked(struct ifnet *ifp) 388267d5e043SOleg Bulyzhin { 388367d5e043SOleg Bulyzhin struct bge_softc *sc = ifp->if_softc; 388495d67482SBill Paul struct mii_data *mii; 388595d67482SBill Paul struct ifmedia *ifm; 388695d67482SBill Paul 388767d5e043SOleg Bulyzhin BGE_LOCK_ASSERT(sc); 388867d5e043SOleg Bulyzhin 388995d67482SBill Paul ifm = &sc->bge_ifmedia; 389095d67482SBill Paul 389195d67482SBill Paul /* If this is a 1000baseX NIC, enable the TBI port. */ 3892652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 389395d67482SBill Paul if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 389495d67482SBill Paul return (EINVAL); 389595d67482SBill Paul switch(IFM_SUBTYPE(ifm->ifm_media)) { 389695d67482SBill Paul case IFM_AUTO: 3897ff50922bSDoug White /* 3898ff50922bSDoug White * The BCM5704 ASIC appears to have a special 3899ff50922bSDoug White * mechanism for programming the autoneg 3900ff50922bSDoug White * advertisement registers in TBI mode. 3901ff50922bSDoug White */ 39020f89fde2SJung-uk Kim if (sc->bge_asicrev == BGE_ASICREV_BCM5704) { 3903ff50922bSDoug White uint32_t sgdig; 39040f89fde2SJung-uk Kim sgdig = CSR_READ_4(sc, BGE_SGDIG_STS); 39050f89fde2SJung-uk Kim if (sgdig & BGE_SGDIGSTS_DONE) { 3906ff50922bSDoug White CSR_WRITE_4(sc, BGE_TX_TBI_AUTONEG, 0); 3907ff50922bSDoug White sgdig = CSR_READ_4(sc, BGE_SGDIG_CFG); 3908ff50922bSDoug White sgdig |= BGE_SGDIGCFG_AUTO | 3909ff50922bSDoug White BGE_SGDIGCFG_PAUSE_CAP | 3910ff50922bSDoug White BGE_SGDIGCFG_ASYM_PAUSE; 3911ff50922bSDoug White CSR_WRITE_4(sc, BGE_SGDIG_CFG, 3912ff50922bSDoug White sgdig | BGE_SGDIGCFG_SEND); 3913ff50922bSDoug White DELAY(5); 3914ff50922bSDoug White CSR_WRITE_4(sc, BGE_SGDIG_CFG, sgdig); 3915ff50922bSDoug White } 39160f89fde2SJung-uk Kim } 391795d67482SBill Paul break; 391895d67482SBill Paul case IFM_1000_SX: 391995d67482SBill Paul if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { 392095d67482SBill Paul BGE_CLRBIT(sc, BGE_MAC_MODE, 392195d67482SBill Paul BGE_MACMODE_HALF_DUPLEX); 392295d67482SBill Paul } else { 392395d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_MODE, 392495d67482SBill Paul BGE_MACMODE_HALF_DUPLEX); 392595d67482SBill Paul } 392695d67482SBill Paul break; 392795d67482SBill Paul default: 392895d67482SBill Paul return (EINVAL); 392995d67482SBill Paul } 393095d67482SBill Paul return (0); 393195d67482SBill Paul } 393295d67482SBill Paul 39331493e883SOleg Bulyzhin sc->bge_link_evt++; 393495d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 393595d67482SBill Paul if (mii->mii_instance) { 393695d67482SBill Paul struct mii_softc *miisc; 393795d67482SBill Paul for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 393895d67482SBill Paul miisc = LIST_NEXT(miisc, mii_list)) 393995d67482SBill Paul mii_phy_reset(miisc); 394095d67482SBill Paul } 394195d67482SBill Paul mii_mediachg(mii); 394295d67482SBill Paul 3943902827f6SBjoern A. Zeeb /* 3944902827f6SBjoern A. Zeeb * Force an interrupt so that we will call bge_link_upd 3945902827f6SBjoern A. Zeeb * if needed and clear any pending link state attention. 3946902827f6SBjoern A. Zeeb * Without this we are not getting any further interrupts 3947902827f6SBjoern A. Zeeb * for link state changes and thus will not UP the link and 3948902827f6SBjoern A. Zeeb * not be able to send in bge_start_locked. The only 3949902827f6SBjoern A. Zeeb * way to get things working was to receive a packet and 3950902827f6SBjoern A. Zeeb * get an RX intr. 3951902827f6SBjoern A. Zeeb * bge_tick should help for fiber cards and we might not 3952902827f6SBjoern A. Zeeb * need to do this here if BGE_FLAG_TBI is set but as 3953902827f6SBjoern A. Zeeb * we poll for fiber anyway it should not harm. 3954902827f6SBjoern A. Zeeb */ 39554f0794ffSBjoern A. Zeeb if (sc->bge_asicrev == BGE_ASICREV_BCM5700 || 39564f0794ffSBjoern A. Zeeb sc->bge_flags & BGE_FLAG_5788) 3957902827f6SBjoern A. Zeeb BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_SET); 39584f0794ffSBjoern A. Zeeb else 395963ccfe30SBjoern A. Zeeb BGE_SETBIT(sc, BGE_HCC_MODE, BGE_HCCMODE_COAL_NOW); 3960902827f6SBjoern A. Zeeb 396195d67482SBill Paul return (0); 396295d67482SBill Paul } 396395d67482SBill Paul 396495d67482SBill Paul /* 396595d67482SBill Paul * Report current media status. 396695d67482SBill Paul */ 396795d67482SBill Paul static void 39683f74909aSGleb Smirnoff bge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 396995d67482SBill Paul { 397067d5e043SOleg Bulyzhin struct bge_softc *sc = ifp->if_softc; 397195d67482SBill Paul struct mii_data *mii; 397295d67482SBill Paul 397367d5e043SOleg Bulyzhin BGE_LOCK(sc); 397495d67482SBill Paul 3975652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 397695d67482SBill Paul ifmr->ifm_status = IFM_AVALID; 397795d67482SBill Paul ifmr->ifm_active = IFM_ETHER; 397895d67482SBill Paul if (CSR_READ_4(sc, BGE_MAC_STS) & 397995d67482SBill Paul BGE_MACSTAT_TBI_PCS_SYNCHED) 398095d67482SBill Paul ifmr->ifm_status |= IFM_ACTIVE; 39814c0da0ffSGleb Smirnoff else { 39824c0da0ffSGleb Smirnoff ifmr->ifm_active |= IFM_NONE; 398367d5e043SOleg Bulyzhin BGE_UNLOCK(sc); 39844c0da0ffSGleb Smirnoff return; 39854c0da0ffSGleb Smirnoff } 398695d67482SBill Paul ifmr->ifm_active |= IFM_1000_SX; 398795d67482SBill Paul if (CSR_READ_4(sc, BGE_MAC_MODE) & BGE_MACMODE_HALF_DUPLEX) 398895d67482SBill Paul ifmr->ifm_active |= IFM_HDX; 398995d67482SBill Paul else 399095d67482SBill Paul ifmr->ifm_active |= IFM_FDX; 399167d5e043SOleg Bulyzhin BGE_UNLOCK(sc); 399295d67482SBill Paul return; 399395d67482SBill Paul } 399495d67482SBill Paul 399595d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 399695d67482SBill Paul mii_pollstat(mii); 399795d67482SBill Paul ifmr->ifm_active = mii->mii_media_active; 399895d67482SBill Paul ifmr->ifm_status = mii->mii_media_status; 399967d5e043SOleg Bulyzhin 400067d5e043SOleg Bulyzhin BGE_UNLOCK(sc); 400195d67482SBill Paul } 400295d67482SBill Paul 400395d67482SBill Paul static int 40043f74909aSGleb Smirnoff bge_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 400595d67482SBill Paul { 400695d67482SBill Paul struct bge_softc *sc = ifp->if_softc; 400795d67482SBill Paul struct ifreq *ifr = (struct ifreq *) data; 400895d67482SBill Paul struct mii_data *mii; 4009f9004b6dSJung-uk Kim int flags, mask, error = 0; 401095d67482SBill Paul 401195d67482SBill Paul switch (command) { 401295d67482SBill Paul case SIOCSIFMTU: 40134c0da0ffSGleb Smirnoff if (ifr->ifr_mtu < ETHERMIN || 40144c0da0ffSGleb Smirnoff ((BGE_IS_JUMBO_CAPABLE(sc)) && 40154c0da0ffSGleb Smirnoff ifr->ifr_mtu > BGE_JUMBO_MTU) || 40164c0da0ffSGleb Smirnoff ((!BGE_IS_JUMBO_CAPABLE(sc)) && 40174c0da0ffSGleb Smirnoff ifr->ifr_mtu > ETHERMTU)) 401895d67482SBill Paul error = EINVAL; 40194c0da0ffSGleb Smirnoff else if (ifp->if_mtu != ifr->ifr_mtu) { 402095d67482SBill Paul ifp->if_mtu = ifr->ifr_mtu; 402113f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 402295d67482SBill Paul bge_init(sc); 402395d67482SBill Paul } 402495d67482SBill Paul break; 402595d67482SBill Paul case SIOCSIFFLAGS: 40260f9bd73bSSam Leffler BGE_LOCK(sc); 402795d67482SBill Paul if (ifp->if_flags & IFF_UP) { 402895d67482SBill Paul /* 402995d67482SBill Paul * If only the state of the PROMISC flag changed, 403095d67482SBill Paul * then just use the 'set promisc mode' command 403195d67482SBill Paul * instead of reinitializing the entire NIC. Doing 403295d67482SBill Paul * a full re-init means reloading the firmware and 403395d67482SBill Paul * waiting for it to start up, which may take a 4034d183af7fSRuslan Ermilov * second or two. Similarly for ALLMULTI. 403595d67482SBill Paul */ 4036f9004b6dSJung-uk Kim if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 4037f9004b6dSJung-uk Kim flags = ifp->if_flags ^ sc->bge_if_flags; 40383e9b1bcaSJung-uk Kim if (flags & IFF_PROMISC) 40393e9b1bcaSJung-uk Kim bge_setpromisc(sc); 4040f9004b6dSJung-uk Kim if (flags & IFF_ALLMULTI) 4041d183af7fSRuslan Ermilov bge_setmulti(sc); 404295d67482SBill Paul } else 40430f9bd73bSSam Leffler bge_init_locked(sc); 404495d67482SBill Paul } else { 404513f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 404695d67482SBill Paul bge_stop(sc); 404795d67482SBill Paul } 404895d67482SBill Paul } 404995d67482SBill Paul sc->bge_if_flags = ifp->if_flags; 40500f9bd73bSSam Leffler BGE_UNLOCK(sc); 405195d67482SBill Paul error = 0; 405295d67482SBill Paul break; 405395d67482SBill Paul case SIOCADDMULTI: 405495d67482SBill Paul case SIOCDELMULTI: 405513f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 40560f9bd73bSSam Leffler BGE_LOCK(sc); 405795d67482SBill Paul bge_setmulti(sc); 40580f9bd73bSSam Leffler BGE_UNLOCK(sc); 405995d67482SBill Paul error = 0; 406095d67482SBill Paul } 406195d67482SBill Paul break; 406295d67482SBill Paul case SIOCSIFMEDIA: 406395d67482SBill Paul case SIOCGIFMEDIA: 4064652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 406595d67482SBill Paul error = ifmedia_ioctl(ifp, ifr, 406695d67482SBill Paul &sc->bge_ifmedia, command); 406795d67482SBill Paul } else { 406895d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 406995d67482SBill Paul error = ifmedia_ioctl(ifp, ifr, 407095d67482SBill Paul &mii->mii_media, command); 407195d67482SBill Paul } 407295d67482SBill Paul break; 407395d67482SBill Paul case SIOCSIFCAP: 407495d67482SBill Paul mask = ifr->ifr_reqcap ^ ifp->if_capenable; 407575719184SGleb Smirnoff #ifdef DEVICE_POLLING 407675719184SGleb Smirnoff if (mask & IFCAP_POLLING) { 407775719184SGleb Smirnoff if (ifr->ifr_reqcap & IFCAP_POLLING) { 407875719184SGleb Smirnoff error = ether_poll_register(bge_poll, ifp); 407975719184SGleb Smirnoff if (error) 408075719184SGleb Smirnoff return (error); 408175719184SGleb Smirnoff BGE_LOCK(sc); 408275719184SGleb Smirnoff BGE_SETBIT(sc, BGE_PCI_MISC_CTL, 408375719184SGleb Smirnoff BGE_PCIMISCCTL_MASK_PCI_INTR); 408438cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_IRQ0_LO, 1); 408575719184SGleb Smirnoff ifp->if_capenable |= IFCAP_POLLING; 408675719184SGleb Smirnoff BGE_UNLOCK(sc); 408775719184SGleb Smirnoff } else { 408875719184SGleb Smirnoff error = ether_poll_deregister(ifp); 408975719184SGleb Smirnoff /* Enable interrupt even in error case */ 409075719184SGleb Smirnoff BGE_LOCK(sc); 409175719184SGleb Smirnoff BGE_CLRBIT(sc, BGE_PCI_MISC_CTL, 409275719184SGleb Smirnoff BGE_PCIMISCCTL_MASK_PCI_INTR); 409338cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_IRQ0_LO, 0); 409475719184SGleb Smirnoff ifp->if_capenable &= ~IFCAP_POLLING; 409575719184SGleb Smirnoff BGE_UNLOCK(sc); 409675719184SGleb Smirnoff } 409775719184SGleb Smirnoff } 409875719184SGleb Smirnoff #endif 4099d375e524SGleb Smirnoff if (mask & IFCAP_HWCSUM) { 4100d375e524SGleb Smirnoff ifp->if_capenable ^= IFCAP_HWCSUM; 4101d375e524SGleb Smirnoff if (IFCAP_HWCSUM & ifp->if_capenable && 4102d375e524SGleb Smirnoff IFCAP_HWCSUM & ifp->if_capabilities) 4103b874fdd4SYaroslav Tykhiy ifp->if_hwassist = BGE_CSUM_FEATURES; 410495d67482SBill Paul else 4105b874fdd4SYaroslav Tykhiy ifp->if_hwassist = 0; 41064e35d186SJung-uk Kim #ifdef VLAN_CAPABILITIES 4107479b23b7SGleb Smirnoff VLAN_CAPABILITIES(ifp); 41084e35d186SJung-uk Kim #endif 410995d67482SBill Paul } 4110cb2eacc7SYaroslav Tykhiy 4111cb2eacc7SYaroslav Tykhiy if (mask & IFCAP_VLAN_MTU) { 4112cb2eacc7SYaroslav Tykhiy ifp->if_capenable ^= IFCAP_VLAN_MTU; 4113cb2eacc7SYaroslav Tykhiy ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 4114cb2eacc7SYaroslav Tykhiy bge_init(sc); 4115cb2eacc7SYaroslav Tykhiy } 4116cb2eacc7SYaroslav Tykhiy 4117cb2eacc7SYaroslav Tykhiy if (mask & IFCAP_VLAN_HWTAGGING) { 4118cb2eacc7SYaroslav Tykhiy ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 4119cb2eacc7SYaroslav Tykhiy BGE_LOCK(sc); 4120cb2eacc7SYaroslav Tykhiy bge_setvlan(sc); 4121cb2eacc7SYaroslav Tykhiy BGE_UNLOCK(sc); 4122cb2eacc7SYaroslav Tykhiy #ifdef VLAN_CAPABILITIES 4123cb2eacc7SYaroslav Tykhiy VLAN_CAPABILITIES(ifp); 4124cb2eacc7SYaroslav Tykhiy #endif 4125cb2eacc7SYaroslav Tykhiy } 4126cb2eacc7SYaroslav Tykhiy 412795d67482SBill Paul break; 412895d67482SBill Paul default: 4129673d9191SSam Leffler error = ether_ioctl(ifp, command, data); 413095d67482SBill Paul break; 413195d67482SBill Paul } 413295d67482SBill Paul 413395d67482SBill Paul return (error); 413495d67482SBill Paul } 413595d67482SBill Paul 413695d67482SBill Paul static void 4137b74e67fbSGleb Smirnoff bge_watchdog(struct bge_softc *sc) 413895d67482SBill Paul { 4139b74e67fbSGleb Smirnoff struct ifnet *ifp; 414095d67482SBill Paul 4141b74e67fbSGleb Smirnoff BGE_LOCK_ASSERT(sc); 4142b74e67fbSGleb Smirnoff 4143b74e67fbSGleb Smirnoff if (sc->bge_timer == 0 || --sc->bge_timer) 4144b74e67fbSGleb Smirnoff return; 4145b74e67fbSGleb Smirnoff 4146b74e67fbSGleb Smirnoff ifp = sc->bge_ifp; 414795d67482SBill Paul 4148fe806fdaSPyun YongHyeon if_printf(ifp, "watchdog timeout -- resetting\n"); 414995d67482SBill Paul 415013f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 4151426742bfSGleb Smirnoff bge_init_locked(sc); 415295d67482SBill Paul 415395d67482SBill Paul ifp->if_oerrors++; 415495d67482SBill Paul } 415595d67482SBill Paul 415695d67482SBill Paul /* 415795d67482SBill Paul * Stop the adapter and free any mbufs allocated to the 415895d67482SBill Paul * RX and TX lists. 415995d67482SBill Paul */ 416095d67482SBill Paul static void 41613f74909aSGleb Smirnoff bge_stop(struct bge_softc *sc) 416295d67482SBill Paul { 416395d67482SBill Paul struct ifnet *ifp; 416495d67482SBill Paul struct ifmedia_entry *ifm; 416595d67482SBill Paul struct mii_data *mii = NULL; 416695d67482SBill Paul int mtmp, itmp; 416795d67482SBill Paul 41680f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 41690f9bd73bSSam Leffler 4170fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 417195d67482SBill Paul 4172652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_TBI) == 0) 417395d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 417495d67482SBill Paul 41750f9bd73bSSam Leffler callout_stop(&sc->bge_stat_ch); 417695d67482SBill Paul 417795d67482SBill Paul /* 41783f74909aSGleb Smirnoff * Disable all of the receiver blocks. 417995d67482SBill Paul */ 418095d67482SBill Paul BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE); 418195d67482SBill Paul BGE_CLRBIT(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE); 418295d67482SBill Paul BGE_CLRBIT(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE); 41837ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 418495d67482SBill Paul BGE_CLRBIT(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE); 418595d67482SBill Paul BGE_CLRBIT(sc, BGE_RDBDI_MODE, BGE_RBDIMODE_ENABLE); 418695d67482SBill Paul BGE_CLRBIT(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE); 418795d67482SBill Paul BGE_CLRBIT(sc, BGE_RBDC_MODE, BGE_RBDCMODE_ENABLE); 418895d67482SBill Paul 418995d67482SBill Paul /* 41903f74909aSGleb Smirnoff * Disable all of the transmit blocks. 419195d67482SBill Paul */ 419295d67482SBill Paul BGE_CLRBIT(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE); 419395d67482SBill Paul BGE_CLRBIT(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE); 419495d67482SBill Paul BGE_CLRBIT(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE); 419595d67482SBill Paul BGE_CLRBIT(sc, BGE_RDMA_MODE, BGE_RDMAMODE_ENABLE); 419695d67482SBill Paul BGE_CLRBIT(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE); 41977ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 419895d67482SBill Paul BGE_CLRBIT(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE); 419995d67482SBill Paul BGE_CLRBIT(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE); 420095d67482SBill Paul 420195d67482SBill Paul /* 420295d67482SBill Paul * Shut down all of the memory managers and related 420395d67482SBill Paul * state machines. 420495d67482SBill Paul */ 420595d67482SBill Paul BGE_CLRBIT(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE); 420695d67482SBill Paul BGE_CLRBIT(sc, BGE_WDMA_MODE, BGE_WDMAMODE_ENABLE); 42077ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 420895d67482SBill Paul BGE_CLRBIT(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE); 42090c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF); 421095d67482SBill Paul CSR_WRITE_4(sc, BGE_FTQ_RESET, 0); 42117ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 421295d67482SBill Paul BGE_CLRBIT(sc, BGE_BMAN_MODE, BGE_BMANMODE_ENABLE); 421395d67482SBill Paul BGE_CLRBIT(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE); 42140434d1b8SBill Paul } 421595d67482SBill Paul 421695d67482SBill Paul /* Disable host interrupts. */ 421795d67482SBill Paul BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR); 421838cc658fSJohn Baldwin bge_writembx(sc, BGE_MBX_IRQ0_LO, 1); 421995d67482SBill Paul 422095d67482SBill Paul /* 422195d67482SBill Paul * Tell firmware we're shutting down. 422295d67482SBill Paul */ 42238cb1383cSDoug Ambrisko 42248cb1383cSDoug Ambrisko bge_stop_fw(sc); 42258cb1383cSDoug Ambrisko bge_sig_pre_reset(sc, BGE_RESET_STOP); 42268cb1383cSDoug Ambrisko bge_reset(sc); 42278cb1383cSDoug Ambrisko bge_sig_legacy(sc, BGE_RESET_STOP); 42288cb1383cSDoug Ambrisko bge_sig_post_reset(sc, BGE_RESET_STOP); 42298cb1383cSDoug Ambrisko 42308cb1383cSDoug Ambrisko /* 42318cb1383cSDoug Ambrisko * Keep the ASF firmware running if up. 42328cb1383cSDoug Ambrisko */ 42338cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) 42348cb1383cSDoug Ambrisko BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 42358cb1383cSDoug Ambrisko else 423695d67482SBill Paul BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 423795d67482SBill Paul 423895d67482SBill Paul /* Free the RX lists. */ 423995d67482SBill Paul bge_free_rx_ring_std(sc); 424095d67482SBill Paul 424195d67482SBill Paul /* Free jumbo RX list. */ 42424c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc)) 424395d67482SBill Paul bge_free_rx_ring_jumbo(sc); 424495d67482SBill Paul 424595d67482SBill Paul /* Free TX buffers. */ 424695d67482SBill Paul bge_free_tx_ring(sc); 424795d67482SBill Paul 424895d67482SBill Paul /* 424995d67482SBill Paul * Isolate/power down the PHY, but leave the media selection 425095d67482SBill Paul * unchanged so that things will be put back to normal when 425195d67482SBill Paul * we bring the interface back up. 425295d67482SBill Paul */ 4253652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_TBI) == 0) { 425495d67482SBill Paul itmp = ifp->if_flags; 425595d67482SBill Paul ifp->if_flags |= IFF_UP; 4256dcc34049SPawel Jakub Dawidek /* 4257dcc34049SPawel Jakub Dawidek * If we are called from bge_detach(), mii is already NULL. 4258dcc34049SPawel Jakub Dawidek */ 4259dcc34049SPawel Jakub Dawidek if (mii != NULL) { 426095d67482SBill Paul ifm = mii->mii_media.ifm_cur; 426195d67482SBill Paul mtmp = ifm->ifm_media; 426295d67482SBill Paul ifm->ifm_media = IFM_ETHER | IFM_NONE; 426395d67482SBill Paul mii_mediachg(mii); 426495d67482SBill Paul ifm->ifm_media = mtmp; 4265dcc34049SPawel Jakub Dawidek } 426695d67482SBill Paul ifp->if_flags = itmp; 426795d67482SBill Paul } 426895d67482SBill Paul 426995d67482SBill Paul sc->bge_tx_saved_considx = BGE_TXCONS_UNSET; 427095d67482SBill Paul 42715dda8085SOleg Bulyzhin /* Clear MAC's link state (PHY may still have link UP). */ 42721493e883SOleg Bulyzhin if (bootverbose && sc->bge_link) 42731493e883SOleg Bulyzhin if_printf(sc->bge_ifp, "link DOWN\n"); 42741493e883SOleg Bulyzhin sc->bge_link = 0; 427595d67482SBill Paul 42761493e883SOleg Bulyzhin ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 427795d67482SBill Paul } 427895d67482SBill Paul 427995d67482SBill Paul /* 428095d67482SBill Paul * Stop all chip I/O so that the kernel's probe routines don't 428195d67482SBill Paul * get confused by errant DMAs when rebooting. 428295d67482SBill Paul */ 4283b6c974e8SWarner Losh static int 42843f74909aSGleb Smirnoff bge_shutdown(device_t dev) 428595d67482SBill Paul { 428695d67482SBill Paul struct bge_softc *sc; 428795d67482SBill Paul 428895d67482SBill Paul sc = device_get_softc(dev); 42890f9bd73bSSam Leffler BGE_LOCK(sc); 429095d67482SBill Paul bge_stop(sc); 429195d67482SBill Paul bge_reset(sc); 42920f9bd73bSSam Leffler BGE_UNLOCK(sc); 4293b6c974e8SWarner Losh 4294b6c974e8SWarner Losh return (0); 429595d67482SBill Paul } 429614afefa3SPawel Jakub Dawidek 429714afefa3SPawel Jakub Dawidek static int 429814afefa3SPawel Jakub Dawidek bge_suspend(device_t dev) 429914afefa3SPawel Jakub Dawidek { 430014afefa3SPawel Jakub Dawidek struct bge_softc *sc; 430114afefa3SPawel Jakub Dawidek 430214afefa3SPawel Jakub Dawidek sc = device_get_softc(dev); 430314afefa3SPawel Jakub Dawidek BGE_LOCK(sc); 430414afefa3SPawel Jakub Dawidek bge_stop(sc); 430514afefa3SPawel Jakub Dawidek BGE_UNLOCK(sc); 430614afefa3SPawel Jakub Dawidek 430714afefa3SPawel Jakub Dawidek return (0); 430814afefa3SPawel Jakub Dawidek } 430914afefa3SPawel Jakub Dawidek 431014afefa3SPawel Jakub Dawidek static int 431114afefa3SPawel Jakub Dawidek bge_resume(device_t dev) 431214afefa3SPawel Jakub Dawidek { 431314afefa3SPawel Jakub Dawidek struct bge_softc *sc; 431414afefa3SPawel Jakub Dawidek struct ifnet *ifp; 431514afefa3SPawel Jakub Dawidek 431614afefa3SPawel Jakub Dawidek sc = device_get_softc(dev); 431714afefa3SPawel Jakub Dawidek BGE_LOCK(sc); 431814afefa3SPawel Jakub Dawidek ifp = sc->bge_ifp; 431914afefa3SPawel Jakub Dawidek if (ifp->if_flags & IFF_UP) { 432014afefa3SPawel Jakub Dawidek bge_init_locked(sc); 432114afefa3SPawel Jakub Dawidek if (ifp->if_drv_flags & IFF_DRV_RUNNING) 432214afefa3SPawel Jakub Dawidek bge_start_locked(ifp); 432314afefa3SPawel Jakub Dawidek } 432414afefa3SPawel Jakub Dawidek BGE_UNLOCK(sc); 432514afefa3SPawel Jakub Dawidek 432614afefa3SPawel Jakub Dawidek return (0); 432714afefa3SPawel Jakub Dawidek } 4328dab5cd05SOleg Bulyzhin 4329dab5cd05SOleg Bulyzhin static void 43303f74909aSGleb Smirnoff bge_link_upd(struct bge_softc *sc) 4331dab5cd05SOleg Bulyzhin { 43321f313773SOleg Bulyzhin struct mii_data *mii; 43331f313773SOleg Bulyzhin uint32_t link, status; 4334dab5cd05SOleg Bulyzhin 4335dab5cd05SOleg Bulyzhin BGE_LOCK_ASSERT(sc); 43361f313773SOleg Bulyzhin 43373f74909aSGleb Smirnoff /* Clear 'pending link event' flag. */ 43387b97099dSOleg Bulyzhin sc->bge_link_evt = 0; 43397b97099dSOleg Bulyzhin 4340dab5cd05SOleg Bulyzhin /* 4341dab5cd05SOleg Bulyzhin * Process link state changes. 4342dab5cd05SOleg Bulyzhin * Grrr. The link status word in the status block does 4343dab5cd05SOleg Bulyzhin * not work correctly on the BCM5700 rev AX and BX chips, 4344dab5cd05SOleg Bulyzhin * according to all available information. Hence, we have 4345dab5cd05SOleg Bulyzhin * to enable MII interrupts in order to properly obtain 4346dab5cd05SOleg Bulyzhin * async link changes. Unfortunately, this also means that 4347dab5cd05SOleg Bulyzhin * we have to read the MAC status register to detect link 4348dab5cd05SOleg Bulyzhin * changes, thereby adding an additional register access to 4349dab5cd05SOleg Bulyzhin * the interrupt handler. 43501f313773SOleg Bulyzhin * 43511f313773SOleg Bulyzhin * XXX: perhaps link state detection procedure used for 43524c0da0ffSGleb Smirnoff * BGE_CHIPID_BCM5700_B2 can be used for others BCM5700 revisions. 4353dab5cd05SOleg Bulyzhin */ 4354dab5cd05SOleg Bulyzhin 43551f313773SOleg Bulyzhin if (sc->bge_asicrev == BGE_ASICREV_BCM5700 && 43564c0da0ffSGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5700_B2) { 4357dab5cd05SOleg Bulyzhin status = CSR_READ_4(sc, BGE_MAC_STS); 4358dab5cd05SOleg Bulyzhin if (status & BGE_MACSTAT_MI_INTERRUPT) { 43591f313773SOleg Bulyzhin mii = device_get_softc(sc->bge_miibus); 43605dda8085SOleg Bulyzhin mii_pollstat(mii); 43611f313773SOleg Bulyzhin if (!sc->bge_link && 43621f313773SOleg Bulyzhin mii->mii_media_status & IFM_ACTIVE && 43631f313773SOleg Bulyzhin IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 43641f313773SOleg Bulyzhin sc->bge_link++; 43651f313773SOleg Bulyzhin if (bootverbose) 43661f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link UP\n"); 43671f313773SOleg Bulyzhin } else if (sc->bge_link && 43681f313773SOleg Bulyzhin (!(mii->mii_media_status & IFM_ACTIVE) || 43691f313773SOleg Bulyzhin IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)) { 43701f313773SOleg Bulyzhin sc->bge_link = 0; 43711f313773SOleg Bulyzhin if (bootverbose) 43721f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link DOWN\n"); 43731f313773SOleg Bulyzhin } 43741f313773SOleg Bulyzhin 43753f74909aSGleb Smirnoff /* Clear the interrupt. */ 4376dab5cd05SOleg Bulyzhin CSR_WRITE_4(sc, BGE_MAC_EVT_ENB, 4377dab5cd05SOleg Bulyzhin BGE_EVTENB_MI_INTERRUPT); 4378dab5cd05SOleg Bulyzhin bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR); 4379dab5cd05SOleg Bulyzhin bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR, 4380dab5cd05SOleg Bulyzhin BRGPHY_INTRS); 4381dab5cd05SOleg Bulyzhin } 4382dab5cd05SOleg Bulyzhin return; 4383dab5cd05SOleg Bulyzhin } 4384dab5cd05SOleg Bulyzhin 4385652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 43861f313773SOleg Bulyzhin status = CSR_READ_4(sc, BGE_MAC_STS); 43877b97099dSOleg Bulyzhin if (status & BGE_MACSTAT_TBI_PCS_SYNCHED) { 43887b97099dSOleg Bulyzhin if (!sc->bge_link) { 43891f313773SOleg Bulyzhin sc->bge_link++; 43901f313773SOleg Bulyzhin if (sc->bge_asicrev == BGE_ASICREV_BCM5704) 43911f313773SOleg Bulyzhin BGE_CLRBIT(sc, BGE_MAC_MODE, 43921f313773SOleg Bulyzhin BGE_MACMODE_TBI_SEND_CFGS); 43930c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF); 43941f313773SOleg Bulyzhin if (bootverbose) 43951f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link UP\n"); 43963f74909aSGleb Smirnoff if_link_state_change(sc->bge_ifp, 43973f74909aSGleb Smirnoff LINK_STATE_UP); 43987b97099dSOleg Bulyzhin } 43991f313773SOleg Bulyzhin } else if (sc->bge_link) { 4400dab5cd05SOleg Bulyzhin sc->bge_link = 0; 44011f313773SOleg Bulyzhin if (bootverbose) 44021f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link DOWN\n"); 44037b97099dSOleg Bulyzhin if_link_state_change(sc->bge_ifp, LINK_STATE_DOWN); 44041f313773SOleg Bulyzhin } 44051493e883SOleg Bulyzhin } else if (CSR_READ_4(sc, BGE_MI_MODE) & BGE_MIMODE_AUTOPOLL) { 44061f313773SOleg Bulyzhin /* 44070c8aa4eaSJung-uk Kim * Some broken BCM chips have BGE_STATFLAG_LINKSTATE_CHANGED bit 44080c8aa4eaSJung-uk Kim * in status word always set. Workaround this bug by reading 44090c8aa4eaSJung-uk Kim * PHY link status directly. 44101f313773SOleg Bulyzhin */ 44111f313773SOleg Bulyzhin link = (CSR_READ_4(sc, BGE_MI_STS) & BGE_MISTS_LINK) ? 1 : 0; 44121f313773SOleg Bulyzhin 44131f313773SOleg Bulyzhin if (link != sc->bge_link || 44141f313773SOleg Bulyzhin sc->bge_asicrev == BGE_ASICREV_BCM5700) { 44151f313773SOleg Bulyzhin mii = device_get_softc(sc->bge_miibus); 44165dda8085SOleg Bulyzhin mii_pollstat(mii); 44171f313773SOleg Bulyzhin if (!sc->bge_link && 44181f313773SOleg Bulyzhin mii->mii_media_status & IFM_ACTIVE && 44191f313773SOleg Bulyzhin IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 44201f313773SOleg Bulyzhin sc->bge_link++; 44211f313773SOleg Bulyzhin if (bootverbose) 44221f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link UP\n"); 44231f313773SOleg Bulyzhin } else if (sc->bge_link && 44241f313773SOleg Bulyzhin (!(mii->mii_media_status & IFM_ACTIVE) || 44251f313773SOleg Bulyzhin IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)) { 44261f313773SOleg Bulyzhin sc->bge_link = 0; 44271f313773SOleg Bulyzhin if (bootverbose) 44281f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link DOWN\n"); 44291f313773SOleg Bulyzhin } 44301f313773SOleg Bulyzhin } 44310c8aa4eaSJung-uk Kim } else { 44320c8aa4eaSJung-uk Kim /* 44330c8aa4eaSJung-uk Kim * Discard link events for MII/GMII controllers 44340c8aa4eaSJung-uk Kim * if MI auto-polling is disabled. 44350c8aa4eaSJung-uk Kim */ 4436dab5cd05SOleg Bulyzhin } 4437dab5cd05SOleg Bulyzhin 44383f74909aSGleb Smirnoff /* Clear the attention. */ 4439dab5cd05SOleg Bulyzhin CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED | 4440dab5cd05SOleg Bulyzhin BGE_MACSTAT_CFG_CHANGED | BGE_MACSTAT_MI_COMPLETE | 4441dab5cd05SOleg Bulyzhin BGE_MACSTAT_LINK_CHANGED); 4442dab5cd05SOleg Bulyzhin } 44436f8718a3SScott Long 4444763757b2SScott Long #define BGE_SYSCTL_STAT(sc, ctx, desc, parent, node, oid) \ 444506e83c7eSScott Long SYSCTL_ADD_PROC(ctx, parent, OID_AUTO, oid, CTLTYPE_UINT|CTLFLAG_RD, \ 4446763757b2SScott Long sc, offsetof(struct bge_stats, node), bge_sysctl_stats, "IU", \ 4447763757b2SScott Long desc) 4448763757b2SScott Long 44496f8718a3SScott Long static void 44506f8718a3SScott Long bge_add_sysctls(struct bge_softc *sc) 44516f8718a3SScott Long { 44526f8718a3SScott Long struct sysctl_ctx_list *ctx; 4453763757b2SScott Long struct sysctl_oid_list *children, *schildren; 4454763757b2SScott Long struct sysctl_oid *tree; 44556f8718a3SScott Long 44566f8718a3SScott Long ctx = device_get_sysctl_ctx(sc->bge_dev); 44576f8718a3SScott Long children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->bge_dev)); 44586f8718a3SScott Long 44596f8718a3SScott Long #ifdef BGE_REGISTER_DEBUG 44606f8718a3SScott Long SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "debug_info", 44616f8718a3SScott Long CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_debug_info, "I", 44626f8718a3SScott Long "Debug Information"); 44636f8718a3SScott Long 44646f8718a3SScott Long SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "reg_read", 44656f8718a3SScott Long CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_reg_read, "I", 44666f8718a3SScott Long "Register Read"); 44676f8718a3SScott Long 44686f8718a3SScott Long SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "mem_read", 44696f8718a3SScott Long CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_mem_read, "I", 44706f8718a3SScott Long "Memory Read"); 44716f8718a3SScott Long 44726f8718a3SScott Long #endif 4473763757b2SScott Long 4474d949071dSJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 4475d949071dSJung-uk Kim return; 4476d949071dSJung-uk Kim 4477763757b2SScott Long tree = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "stats", CTLFLAG_RD, 4478763757b2SScott Long NULL, "BGE Statistics"); 4479763757b2SScott Long schildren = children = SYSCTL_CHILDREN(tree); 4480763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Frames Dropped Due To Filters", 4481763757b2SScott Long children, COSFramesDroppedDueToFilters, 4482763757b2SScott Long "FramesDroppedDueToFilters"); 4483763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC DMA Write Queue Full", 4484763757b2SScott Long children, nicDmaWriteQueueFull, "DmaWriteQueueFull"); 4485763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC DMA Write High Priority Queue Full", 4486763757b2SScott Long children, nicDmaWriteHighPriQueueFull, "DmaWriteHighPriQueueFull"); 4487763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC No More RX Buffer Descriptors", 4488763757b2SScott Long children, nicNoMoreRxBDs, "NoMoreRxBDs"); 448906e83c7eSScott Long BGE_SYSCTL_STAT(sc, ctx, "Discarded Input Frames", 449006e83c7eSScott Long children, ifInDiscards, "InputDiscards"); 449106e83c7eSScott Long BGE_SYSCTL_STAT(sc, ctx, "Input Errors", 449206e83c7eSScott Long children, ifInErrors, "InputErrors"); 4493763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Recv Threshold Hit", 4494763757b2SScott Long children, nicRecvThresholdHit, "RecvThresholdHit"); 4495763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC DMA Read Queue Full", 4496763757b2SScott Long children, nicDmaReadQueueFull, "DmaReadQueueFull"); 4497763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC DMA Read High Priority Queue Full", 4498763757b2SScott Long children, nicDmaReadHighPriQueueFull, "DmaReadHighPriQueueFull"); 4499763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Send Data Complete Queue Full", 4500763757b2SScott Long children, nicSendDataCompQueueFull, "SendDataCompQueueFull"); 4501763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Ring Set Send Producer Index", 4502763757b2SScott Long children, nicRingSetSendProdIndex, "RingSetSendProdIndex"); 4503763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Ring Status Update", 4504763757b2SScott Long children, nicRingStatusUpdate, "RingStatusUpdate"); 4505763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Interrupts", 4506763757b2SScott Long children, nicInterrupts, "Interrupts"); 4507763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Avoided Interrupts", 4508763757b2SScott Long children, nicAvoidedInterrupts, "AvoidedInterrupts"); 4509763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Send Threshold Hit", 4510763757b2SScott Long children, nicSendThresholdHit, "SendThresholdHit"); 4511763757b2SScott Long 4512763757b2SScott Long tree = SYSCTL_ADD_NODE(ctx, schildren, OID_AUTO, "rx", CTLFLAG_RD, 4513763757b2SScott Long NULL, "BGE RX Statistics"); 4514763757b2SScott Long children = SYSCTL_CHILDREN(tree); 4515763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Inbound Octets", 4516763757b2SScott Long children, rxstats.ifHCInOctets, "Octets"); 4517763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Fragments", 4518763757b2SScott Long children, rxstats.etherStatsFragments, "Fragments"); 4519763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Inbound Unicast Packets", 4520763757b2SScott Long children, rxstats.ifHCInUcastPkts, "UcastPkts"); 4521763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Inbound Multicast Packets", 4522763757b2SScott Long children, rxstats.ifHCInMulticastPkts, "MulticastPkts"); 4523763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "FCS Errors", 4524763757b2SScott Long children, rxstats.dot3StatsFCSErrors, "FCSErrors"); 4525763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Alignment Errors", 4526763757b2SScott Long children, rxstats.dot3StatsAlignmentErrors, "AlignmentErrors"); 4527763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XON Pause Frames Received", 4528763757b2SScott Long children, rxstats.xonPauseFramesReceived, "xonPauseFramesReceived"); 4529763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XOFF Pause Frames Received", 4530763757b2SScott Long children, rxstats.xoffPauseFramesReceived, 4531763757b2SScott Long "xoffPauseFramesReceived"); 4532763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "MAC Control Frames Received", 4533763757b2SScott Long children, rxstats.macControlFramesReceived, 4534763757b2SScott Long "ControlFramesReceived"); 4535763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XOFF State Entered", 4536763757b2SScott Long children, rxstats.xoffStateEntered, "xoffStateEntered"); 4537763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Frames Too Long", 4538763757b2SScott Long children, rxstats.dot3StatsFramesTooLong, "FramesTooLong"); 4539763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Jabbers", 4540763757b2SScott Long children, rxstats.etherStatsJabbers, "Jabbers"); 4541763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Undersized Packets", 4542763757b2SScott Long children, rxstats.etherStatsUndersizePkts, "UndersizePkts"); 4543763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Inbound Range Length Errors", 454406e83c7eSScott Long children, rxstats.inRangeLengthError, "inRangeLengthError"); 4545763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Range Length Errors", 454606e83c7eSScott Long children, rxstats.outRangeLengthError, "outRangeLengthError"); 4547763757b2SScott Long 4548763757b2SScott Long tree = SYSCTL_ADD_NODE(ctx, schildren, OID_AUTO, "tx", CTLFLAG_RD, 4549763757b2SScott Long NULL, "BGE TX Statistics"); 4550763757b2SScott Long children = SYSCTL_CHILDREN(tree); 4551763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Octets", 4552763757b2SScott Long children, txstats.ifHCOutOctets, "Octets"); 4553763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "TX Collisions", 4554763757b2SScott Long children, txstats.etherStatsCollisions, "Collisions"); 4555763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XON Sent", 4556763757b2SScott Long children, txstats.outXonSent, "XonSent"); 4557763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XOFF Sent", 4558763757b2SScott Long children, txstats.outXoffSent, "XoffSent"); 4559763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Flow Control Done", 4560763757b2SScott Long children, txstats.flowControlDone, "flowControlDone"); 4561763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Internal MAC TX errors", 4562763757b2SScott Long children, txstats.dot3StatsInternalMacTransmitErrors, 4563763757b2SScott Long "InternalMacTransmitErrors"); 4564763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Single Collision Frames", 4565763757b2SScott Long children, txstats.dot3StatsSingleCollisionFrames, 4566763757b2SScott Long "SingleCollisionFrames"); 4567763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Multiple Collision Frames", 4568763757b2SScott Long children, txstats.dot3StatsMultipleCollisionFrames, 4569763757b2SScott Long "MultipleCollisionFrames"); 4570763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Deferred Transmissions", 4571763757b2SScott Long children, txstats.dot3StatsDeferredTransmissions, 4572763757b2SScott Long "DeferredTransmissions"); 4573763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Excessive Collisions", 4574763757b2SScott Long children, txstats.dot3StatsExcessiveCollisions, 4575763757b2SScott Long "ExcessiveCollisions"); 4576763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Late Collisions", 457706e83c7eSScott Long children, txstats.dot3StatsLateCollisions, 457806e83c7eSScott Long "LateCollisions"); 4579763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Unicast Packets", 4580763757b2SScott Long children, txstats.ifHCOutUcastPkts, "UcastPkts"); 4581763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Multicast Packets", 4582763757b2SScott Long children, txstats.ifHCOutMulticastPkts, "MulticastPkts"); 4583763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Broadcast Packets", 4584763757b2SScott Long children, txstats.ifHCOutBroadcastPkts, "BroadcastPkts"); 4585763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Carrier Sense Errors", 4586763757b2SScott Long children, txstats.dot3StatsCarrierSenseErrors, 4587763757b2SScott Long "CarrierSenseErrors"); 4588763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Discards", 4589763757b2SScott Long children, txstats.ifOutDiscards, "Discards"); 4590763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Errors", 4591763757b2SScott Long children, txstats.ifOutErrors, "Errors"); 4592763757b2SScott Long } 4593763757b2SScott Long 4594763757b2SScott Long static int 4595763757b2SScott Long bge_sysctl_stats(SYSCTL_HANDLER_ARGS) 4596763757b2SScott Long { 4597763757b2SScott Long struct bge_softc *sc; 459806e83c7eSScott Long uint32_t result; 4599d949071dSJung-uk Kim int offset; 4600763757b2SScott Long 4601763757b2SScott Long sc = (struct bge_softc *)arg1; 4602763757b2SScott Long offset = arg2; 4603d949071dSJung-uk Kim result = CSR_READ_4(sc, BGE_MEMWIN_START + BGE_STATS_BLOCK + offset + 4604d949071dSJung-uk Kim offsetof(bge_hostaddr, bge_addr_lo)); 4605041b706bSDavid Malone return (sysctl_handle_int(oidp, &result, 0, req)); 46066f8718a3SScott Long } 46076f8718a3SScott Long 46086f8718a3SScott Long #ifdef BGE_REGISTER_DEBUG 46096f8718a3SScott Long static int 46106f8718a3SScott Long bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 46116f8718a3SScott Long { 46126f8718a3SScott Long struct bge_softc *sc; 46136f8718a3SScott Long uint16_t *sbdata; 46146f8718a3SScott Long int error; 46156f8718a3SScott Long int result; 46166f8718a3SScott Long int i, j; 46176f8718a3SScott Long 46186f8718a3SScott Long result = -1; 46196f8718a3SScott Long error = sysctl_handle_int(oidp, &result, 0, req); 46206f8718a3SScott Long if (error || (req->newptr == NULL)) 46216f8718a3SScott Long return (error); 46226f8718a3SScott Long 46236f8718a3SScott Long if (result == 1) { 46246f8718a3SScott Long sc = (struct bge_softc *)arg1; 46256f8718a3SScott Long 46266f8718a3SScott Long sbdata = (uint16_t *)sc->bge_ldata.bge_status_block; 46276f8718a3SScott Long printf("Status Block:\n"); 46286f8718a3SScott Long for (i = 0x0; i < (BGE_STATUS_BLK_SZ / 4); ) { 46296f8718a3SScott Long printf("%06x:", i); 46306f8718a3SScott Long for (j = 0; j < 8; j++) { 46316f8718a3SScott Long printf(" %04x", sbdata[i]); 46326f8718a3SScott Long i += 4; 46336f8718a3SScott Long } 46346f8718a3SScott Long printf("\n"); 46356f8718a3SScott Long } 46366f8718a3SScott Long 46376f8718a3SScott Long printf("Registers:\n"); 46380c8aa4eaSJung-uk Kim for (i = 0x800; i < 0xA00; ) { 46396f8718a3SScott Long printf("%06x:", i); 46406f8718a3SScott Long for (j = 0; j < 8; j++) { 46416f8718a3SScott Long printf(" %08x", CSR_READ_4(sc, i)); 46426f8718a3SScott Long i += 4; 46436f8718a3SScott Long } 46446f8718a3SScott Long printf("\n"); 46456f8718a3SScott Long } 46466f8718a3SScott Long 46476f8718a3SScott Long printf("Hardware Flags:\n"); 46485345bad0SScott Long if (BGE_IS_575X_PLUS(sc)) 46496f8718a3SScott Long printf(" - 575X Plus\n"); 46505345bad0SScott Long if (BGE_IS_5705_PLUS(sc)) 46516f8718a3SScott Long printf(" - 5705 Plus\n"); 46525345bad0SScott Long if (BGE_IS_5714_FAMILY(sc)) 46535345bad0SScott Long printf(" - 5714 Family\n"); 46545345bad0SScott Long if (BGE_IS_5700_FAMILY(sc)) 46555345bad0SScott Long printf(" - 5700 Family\n"); 46566f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_JUMBO) 46576f8718a3SScott Long printf(" - Supports Jumbo Frames\n"); 46586f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_PCIX) 46596f8718a3SScott Long printf(" - PCI-X Bus\n"); 46606f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_PCIE) 46616f8718a3SScott Long printf(" - PCI Express Bus\n"); 46625ee49a3aSJung-uk Kim if (sc->bge_flags & BGE_FLAG_NO_3LED) 46636f8718a3SScott Long printf(" - No 3 LEDs\n"); 46646f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) 46656f8718a3SScott Long printf(" - RX Alignment Bug\n"); 46666f8718a3SScott Long } 46676f8718a3SScott Long 46686f8718a3SScott Long return (error); 46696f8718a3SScott Long } 46706f8718a3SScott Long 46716f8718a3SScott Long static int 46726f8718a3SScott Long bge_sysctl_reg_read(SYSCTL_HANDLER_ARGS) 46736f8718a3SScott Long { 46746f8718a3SScott Long struct bge_softc *sc; 46756f8718a3SScott Long int error; 46766f8718a3SScott Long uint16_t result; 46776f8718a3SScott Long uint32_t val; 46786f8718a3SScott Long 46796f8718a3SScott Long result = -1; 46806f8718a3SScott Long error = sysctl_handle_int(oidp, &result, 0, req); 46816f8718a3SScott Long if (error || (req->newptr == NULL)) 46826f8718a3SScott Long return (error); 46836f8718a3SScott Long 46846f8718a3SScott Long if (result < 0x8000) { 46856f8718a3SScott Long sc = (struct bge_softc *)arg1; 46866f8718a3SScott Long val = CSR_READ_4(sc, result); 46876f8718a3SScott Long printf("reg 0x%06X = 0x%08X\n", result, val); 46886f8718a3SScott Long } 46896f8718a3SScott Long 46906f8718a3SScott Long return (error); 46916f8718a3SScott Long } 46926f8718a3SScott Long 46936f8718a3SScott Long static int 46946f8718a3SScott Long bge_sysctl_mem_read(SYSCTL_HANDLER_ARGS) 46956f8718a3SScott Long { 46966f8718a3SScott Long struct bge_softc *sc; 46976f8718a3SScott Long int error; 46986f8718a3SScott Long uint16_t result; 46996f8718a3SScott Long uint32_t val; 47006f8718a3SScott Long 47016f8718a3SScott Long result = -1; 47026f8718a3SScott Long error = sysctl_handle_int(oidp, &result, 0, req); 47036f8718a3SScott Long if (error || (req->newptr == NULL)) 47046f8718a3SScott Long return (error); 47056f8718a3SScott Long 47066f8718a3SScott Long if (result < 0x8000) { 47076f8718a3SScott Long sc = (struct bge_softc *)arg1; 47086f8718a3SScott Long val = bge_readmem_ind(sc, result); 47096f8718a3SScott Long printf("mem 0x%06X = 0x%08X\n", result, val); 47106f8718a3SScott Long } 47116f8718a3SScott Long 47126f8718a3SScott Long return (error); 47136f8718a3SScott Long } 47146f8718a3SScott Long #endif 471538cc658fSJohn Baldwin 471638cc658fSJohn Baldwin static int 47175fea260fSMarius Strobl bge_get_eaddr_fw(struct bge_softc *sc, uint8_t ether_addr[]) 47185fea260fSMarius Strobl { 47195fea260fSMarius Strobl 47205fea260fSMarius Strobl if (sc->bge_flags & BGE_FLAG_EADDR) 47215fea260fSMarius Strobl return (1); 47225fea260fSMarius Strobl 47235fea260fSMarius Strobl #ifdef __sparc64__ 47245fea260fSMarius Strobl OF_getetheraddr(sc->bge_dev, ether_addr); 47255fea260fSMarius Strobl return (0); 47265fea260fSMarius Strobl #endif 47275fea260fSMarius Strobl return (1); 47285fea260fSMarius Strobl } 47295fea260fSMarius Strobl 47305fea260fSMarius Strobl static int 473138cc658fSJohn Baldwin bge_get_eaddr_mem(struct bge_softc *sc, uint8_t ether_addr[]) 473238cc658fSJohn Baldwin { 473338cc658fSJohn Baldwin uint32_t mac_addr; 473438cc658fSJohn Baldwin 473538cc658fSJohn Baldwin mac_addr = bge_readmem_ind(sc, 0x0c14); 473638cc658fSJohn Baldwin if ((mac_addr >> 16) == 0x484b) { 473738cc658fSJohn Baldwin ether_addr[0] = (uint8_t)(mac_addr >> 8); 473838cc658fSJohn Baldwin ether_addr[1] = (uint8_t)mac_addr; 473938cc658fSJohn Baldwin mac_addr = bge_readmem_ind(sc, 0x0c18); 474038cc658fSJohn Baldwin ether_addr[2] = (uint8_t)(mac_addr >> 24); 474138cc658fSJohn Baldwin ether_addr[3] = (uint8_t)(mac_addr >> 16); 474238cc658fSJohn Baldwin ether_addr[4] = (uint8_t)(mac_addr >> 8); 474338cc658fSJohn Baldwin ether_addr[5] = (uint8_t)mac_addr; 47445fea260fSMarius Strobl return (0); 474538cc658fSJohn Baldwin } 47465fea260fSMarius Strobl return (1); 474738cc658fSJohn Baldwin } 474838cc658fSJohn Baldwin 474938cc658fSJohn Baldwin static int 475038cc658fSJohn Baldwin bge_get_eaddr_nvram(struct bge_softc *sc, uint8_t ether_addr[]) 475138cc658fSJohn Baldwin { 475238cc658fSJohn Baldwin int mac_offset = BGE_EE_MAC_OFFSET; 475338cc658fSJohn Baldwin 475438cc658fSJohn Baldwin if (sc->bge_asicrev == BGE_ASICREV_BCM5906) 475538cc658fSJohn Baldwin mac_offset = BGE_EE_MAC_OFFSET_5906; 475638cc658fSJohn Baldwin 47575fea260fSMarius Strobl return (bge_read_nvram(sc, ether_addr, mac_offset + 2, 47585fea260fSMarius Strobl ETHER_ADDR_LEN)); 475938cc658fSJohn Baldwin } 476038cc658fSJohn Baldwin 476138cc658fSJohn Baldwin static int 476238cc658fSJohn Baldwin bge_get_eaddr_eeprom(struct bge_softc *sc, uint8_t ether_addr[]) 476338cc658fSJohn Baldwin { 476438cc658fSJohn Baldwin 47655fea260fSMarius Strobl if (sc->bge_asicrev == BGE_ASICREV_BCM5906) 47665fea260fSMarius Strobl return (1); 47675fea260fSMarius Strobl 47685fea260fSMarius Strobl return (bge_read_eeprom(sc, ether_addr, BGE_EE_MAC_OFFSET + 2, 47695fea260fSMarius Strobl ETHER_ADDR_LEN)); 477038cc658fSJohn Baldwin } 477138cc658fSJohn Baldwin 477238cc658fSJohn Baldwin static int 477338cc658fSJohn Baldwin bge_get_eaddr(struct bge_softc *sc, uint8_t eaddr[]) 477438cc658fSJohn Baldwin { 477538cc658fSJohn Baldwin static const bge_eaddr_fcn_t bge_eaddr_funcs[] = { 477638cc658fSJohn Baldwin /* NOTE: Order is critical */ 47775fea260fSMarius Strobl bge_get_eaddr_fw, 477838cc658fSJohn Baldwin bge_get_eaddr_mem, 477938cc658fSJohn Baldwin bge_get_eaddr_nvram, 478038cc658fSJohn Baldwin bge_get_eaddr_eeprom, 478138cc658fSJohn Baldwin NULL 478238cc658fSJohn Baldwin }; 478338cc658fSJohn Baldwin const bge_eaddr_fcn_t *func; 478438cc658fSJohn Baldwin 478538cc658fSJohn Baldwin for (func = bge_eaddr_funcs; *func != NULL; ++func) { 478638cc658fSJohn Baldwin if ((*func)(sc, eaddr) == 0) 478738cc658fSJohn Baldwin break; 478838cc658fSJohn Baldwin } 478938cc658fSJohn Baldwin return (*func == NULL ? ENXIO : 0); 479038cc658fSJohn Baldwin } 4791