1098ca2bdSWarner Losh /*- 295d67482SBill Paul * Copyright (c) 2001 Wind River Systems 395d67482SBill Paul * Copyright (c) 1997, 1998, 1999, 2001 495d67482SBill Paul * Bill Paul <wpaul@windriver.com>. All rights reserved. 595d67482SBill Paul * 695d67482SBill Paul * Redistribution and use in source and binary forms, with or without 795d67482SBill Paul * modification, are permitted provided that the following conditions 895d67482SBill Paul * are met: 995d67482SBill Paul * 1. Redistributions of source code must retain the above copyright 1095d67482SBill Paul * notice, this list of conditions and the following disclaimer. 1195d67482SBill Paul * 2. Redistributions in binary form must reproduce the above copyright 1295d67482SBill Paul * notice, this list of conditions and the following disclaimer in the 1395d67482SBill Paul * documentation and/or other materials provided with the distribution. 1495d67482SBill Paul * 3. All advertising materials mentioning features or use of this software 1595d67482SBill Paul * must display the following acknowledgement: 1695d67482SBill Paul * This product includes software developed by Bill Paul. 1795d67482SBill Paul * 4. Neither the name of the author nor the names of any co-contributors 1895d67482SBill Paul * may be used to endorse or promote products derived from this software 1995d67482SBill Paul * without specific prior written permission. 2095d67482SBill Paul * 2195d67482SBill Paul * THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND 2295d67482SBill Paul * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 2395d67482SBill Paul * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 2495d67482SBill Paul * ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD 2595d67482SBill Paul * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 2695d67482SBill Paul * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2795d67482SBill Paul * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2895d67482SBill Paul * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 2995d67482SBill Paul * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 3095d67482SBill Paul * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 3195d67482SBill Paul * THE POSSIBILITY OF SUCH DAMAGE. 3295d67482SBill Paul */ 3395d67482SBill Paul 34aad970f1SDavid E. O'Brien #include <sys/cdefs.h> 35aad970f1SDavid E. O'Brien __FBSDID("$FreeBSD$"); 36aad970f1SDavid E. O'Brien 3795d67482SBill Paul /* 3895d67482SBill Paul * Broadcom BCM570x family gigabit ethernet driver for FreeBSD. 3995d67482SBill Paul * 4095d67482SBill Paul * The Broadcom BCM5700 is based on technology originally developed by 4195d67482SBill Paul * Alteon Networks as part of the Tigon I and Tigon II gigabit ethernet 4295d67482SBill Paul * MAC chips. The BCM5700, sometimes refered to as the Tigon III, has 4395d67482SBill Paul * two on-board MIPS R4000 CPUs and can have as much as 16MB of external 4495d67482SBill Paul * SSRAM. The BCM5700 supports TCP, UDP and IP checksum offload, jumbo 4595d67482SBill Paul * frames, highly configurable RX filtering, and 16 RX and TX queues 4695d67482SBill Paul * (which, along with RX filter rules, can be used for QOS applications). 4795d67482SBill Paul * Other features, such as TCP segmentation, may be available as part 4895d67482SBill Paul * of value-added firmware updates. Unlike the Tigon I and Tigon II, 4995d67482SBill Paul * firmware images can be stored in hardware and need not be compiled 5095d67482SBill Paul * into the driver. 5195d67482SBill Paul * 5295d67482SBill Paul * The BCM5700 supports the PCI v2.2 and PCI-X v1.0 standards, and will 5395d67482SBill Paul * function in a 32-bit/64-bit 33/66Mhz bus, or a 64-bit/133Mhz bus. 5495d67482SBill Paul * 5595d67482SBill Paul * The BCM5701 is a single-chip solution incorporating both the BCM5700 5698b28ee5SBill Paul * MAC and a BCM5401 10/100/1000 PHY. Unlike the BCM5700, the BCM5701 5795d67482SBill Paul * does not support external SSRAM. 5895d67482SBill Paul * 5995d67482SBill Paul * Broadcom also produces a variation of the BCM5700 under the "Altima" 6095d67482SBill Paul * brand name, which is functionally similar but lacks PCI-X support. 6195d67482SBill Paul * 6295d67482SBill Paul * Without external SSRAM, you can only have at most 4 TX rings, 6395d67482SBill Paul * and the use of the mini RX ring is disabled. This seems to imply 6495d67482SBill Paul * that these features are simply not available on the BCM5701. As a 6595d67482SBill Paul * result, this driver does not implement any support for the mini RX 6695d67482SBill Paul * ring. 6795d67482SBill Paul */ 6895d67482SBill Paul 6975719184SGleb Smirnoff #ifdef HAVE_KERNEL_OPTION_HEADERS 7075719184SGleb Smirnoff #include "opt_device_polling.h" 7175719184SGleb Smirnoff #endif 7275719184SGleb Smirnoff 7395d67482SBill Paul #include <sys/param.h> 74f41ac2beSBill Paul #include <sys/endian.h> 7595d67482SBill Paul #include <sys/systm.h> 7695d67482SBill Paul #include <sys/sockio.h> 7795d67482SBill Paul #include <sys/mbuf.h> 7895d67482SBill Paul #include <sys/malloc.h> 7995d67482SBill Paul #include <sys/kernel.h> 80fe12f24bSPoul-Henning Kamp #include <sys/module.h> 8195d67482SBill Paul #include <sys/socket.h> 82f1a7e6d5SScott Long #include <sys/sysctl.h> 8395d67482SBill Paul 8495d67482SBill Paul #include <net/if.h> 8595d67482SBill Paul #include <net/if_arp.h> 8695d67482SBill Paul #include <net/ethernet.h> 8795d67482SBill Paul #include <net/if_dl.h> 8895d67482SBill Paul #include <net/if_media.h> 8995d67482SBill Paul 9095d67482SBill Paul #include <net/bpf.h> 9195d67482SBill Paul 9295d67482SBill Paul #include <net/if_types.h> 9395d67482SBill Paul #include <net/if_vlan_var.h> 9495d67482SBill Paul 9595d67482SBill Paul #include <netinet/in_systm.h> 9695d67482SBill Paul #include <netinet/in.h> 9795d67482SBill Paul #include <netinet/ip.h> 9895d67482SBill Paul 9995d67482SBill Paul #include <machine/bus.h> 10095d67482SBill Paul #include <machine/resource.h> 10195d67482SBill Paul #include <sys/bus.h> 10295d67482SBill Paul #include <sys/rman.h> 10395d67482SBill Paul 10495d67482SBill Paul #include <dev/mii/mii.h> 10595d67482SBill Paul #include <dev/mii/miivar.h> 1062d3ce713SDavid E. O'Brien #include "miidevs.h" 10795d67482SBill Paul #include <dev/mii/brgphyreg.h> 10895d67482SBill Paul 10908013fd3SMarius Strobl #ifdef __sparc64__ 11008013fd3SMarius Strobl #include <dev/ofw/ofw_bus.h> 11108013fd3SMarius Strobl #include <dev/ofw/openfirm.h> 11208013fd3SMarius Strobl #include <machine/ofw_machdep.h> 11308013fd3SMarius Strobl #include <machine/ver.h> 11408013fd3SMarius Strobl #endif 11508013fd3SMarius Strobl 1164fbd232cSWarner Losh #include <dev/pci/pcireg.h> 1174fbd232cSWarner Losh #include <dev/pci/pcivar.h> 11895d67482SBill Paul 11995d67482SBill Paul #include <dev/bge/if_bgereg.h> 12095d67482SBill Paul 1215ddc5794SJohn Polstra #define BGE_CSUM_FEATURES (CSUM_IP | CSUM_TCP | CSUM_UDP) 122d375e524SGleb Smirnoff #define ETHER_MIN_NOPAD (ETHER_MIN_LEN - ETHER_CRC_LEN) /* i.e., 60 */ 12395d67482SBill Paul 124f246e4a1SMatthew N. Dodd MODULE_DEPEND(bge, pci, 1, 1, 1); 125f246e4a1SMatthew N. Dodd MODULE_DEPEND(bge, ether, 1, 1, 1); 12695d67482SBill Paul MODULE_DEPEND(bge, miibus, 1, 1, 1); 12795d67482SBill Paul 1287b279558SWarner Losh /* "device miibus" required. See GENERIC if you get errors here. */ 12995d67482SBill Paul #include "miibus_if.h" 13095d67482SBill Paul 13195d67482SBill Paul /* 13295d67482SBill Paul * Various supported device vendors/types and their names. Note: the 13395d67482SBill Paul * spec seems to indicate that the hardware still has Alteon's vendor 13495d67482SBill Paul * ID burned into it, though it will always be overriden by the vendor 13595d67482SBill Paul * ID in the EEPROM. Just to be safe, we cover all possibilities. 13695d67482SBill Paul */ 1374c0da0ffSGleb Smirnoff static struct bge_type { 1384c0da0ffSGleb Smirnoff uint16_t bge_vid; 1394c0da0ffSGleb Smirnoff uint16_t bge_did; 1404c0da0ffSGleb Smirnoff } bge_devs[] = { 1414c0da0ffSGleb Smirnoff { ALTEON_VENDORID, ALTEON_DEVICEID_BCM5700 }, 1424c0da0ffSGleb Smirnoff { ALTEON_VENDORID, ALTEON_DEVICEID_BCM5701 }, 14395d67482SBill Paul 1444c0da0ffSGleb Smirnoff { ALTIMA_VENDORID, ALTIMA_DEVICE_AC1000 }, 1454c0da0ffSGleb Smirnoff { ALTIMA_VENDORID, ALTIMA_DEVICE_AC1002 }, 1464c0da0ffSGleb Smirnoff { ALTIMA_VENDORID, ALTIMA_DEVICE_AC9100 }, 1474c0da0ffSGleb Smirnoff 1484c0da0ffSGleb Smirnoff { APPLE_VENDORID, APPLE_DEVICE_BCM5701 }, 1494c0da0ffSGleb Smirnoff 1504c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5700 }, 1514c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5701 }, 1524c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5702 }, 1534c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5702_ALT }, 1544c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5702X }, 1554c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5703 }, 1564c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5703_ALT }, 1574c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5703X }, 1584c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5704C }, 1594c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5704S }, 1604c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5704S_ALT }, 1614c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705 }, 1624c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705F }, 1634c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705K }, 1644c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705M }, 1654c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5705M_ALT }, 1664c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5714C }, 1674c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5714S }, 1684c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5715 }, 1694c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5715S }, 1704c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5720 }, 1714c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5721 }, 1724c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5750 }, 1734c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5750M }, 1744c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5751 }, 1754c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5751F }, 1764c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5751M }, 1774c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5752 }, 1784c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5752M }, 1794c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5753 }, 1804c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5753F }, 1814c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5753M }, 1829e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5754 }, 1839e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5754M }, 1849e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5755 }, 1859e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5755M }, 1864c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5780 }, 1874c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5780S }, 1884c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5781 }, 1894c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5782 }, 1909e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5786 }, 1919e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5787 }, 1929e86676bSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5787M }, 1934c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5788 }, 1944c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5789 }, 1954c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5901 }, 1964c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5901A2 }, 1974c0da0ffSGleb Smirnoff { BCOM_VENDORID, BCOM_DEVICEID_BCM5903M }, 1984c0da0ffSGleb Smirnoff 1994c0da0ffSGleb Smirnoff { SK_VENDORID, SK_DEVICEID_ALTIMA }, 2004c0da0ffSGleb Smirnoff 2014c0da0ffSGleb Smirnoff { TC_VENDORID, TC_DEVICEID_3C996 }, 2024c0da0ffSGleb Smirnoff 2034c0da0ffSGleb Smirnoff { 0, 0 } 20495d67482SBill Paul }; 20595d67482SBill Paul 2064c0da0ffSGleb Smirnoff static const struct bge_vendor { 2074c0da0ffSGleb Smirnoff uint16_t v_id; 2084c0da0ffSGleb Smirnoff const char *v_name; 2094c0da0ffSGleb Smirnoff } bge_vendors[] = { 2104c0da0ffSGleb Smirnoff { ALTEON_VENDORID, "Alteon" }, 2114c0da0ffSGleb Smirnoff { ALTIMA_VENDORID, "Altima" }, 2124c0da0ffSGleb Smirnoff { APPLE_VENDORID, "Apple" }, 2134c0da0ffSGleb Smirnoff { BCOM_VENDORID, "Broadcom" }, 2144c0da0ffSGleb Smirnoff { SK_VENDORID, "SysKonnect" }, 2154c0da0ffSGleb Smirnoff { TC_VENDORID, "3Com" }, 2164c0da0ffSGleb Smirnoff 2174c0da0ffSGleb Smirnoff { 0, NULL } 2184c0da0ffSGleb Smirnoff }; 2194c0da0ffSGleb Smirnoff 2204c0da0ffSGleb Smirnoff static const struct bge_revision { 2214c0da0ffSGleb Smirnoff uint32_t br_chipid; 2224c0da0ffSGleb Smirnoff const char *br_name; 2234c0da0ffSGleb Smirnoff } bge_revisions[] = { 2244c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_A0, "BCM5700 A0" }, 2254c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_A1, "BCM5700 A1" }, 2264c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_B0, "BCM5700 B0" }, 2274c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_B1, "BCM5700 B1" }, 2284c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_B2, "BCM5700 B2" }, 2294c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_B3, "BCM5700 B3" }, 2304c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_ALTIMA, "BCM5700 Altima" }, 2314c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5700_C0, "BCM5700 C0" }, 2324c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5701_A0, "BCM5701 A0" }, 2334c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5701_B0, "BCM5701 B0" }, 2344c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5701_B2, "BCM5701 B2" }, 2354c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5701_B5, "BCM5701 B5" }, 2364c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5703_A0, "BCM5703 A0" }, 2374c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5703_A1, "BCM5703 A1" }, 2384c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5703_A2, "BCM5703 A2" }, 2394c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5703_A3, "BCM5703 A3" }, 2409e86676bSGleb Smirnoff { BGE_CHIPID_BCM5703_B0, "BCM5703 B0" }, 2414c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_A0, "BCM5704 A0" }, 2424c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_A1, "BCM5704 A1" }, 2434c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_A2, "BCM5704 A2" }, 2444c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_A3, "BCM5704 A3" }, 2454c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5704_B0, "BCM5704 B0" }, 2464c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5705_A0, "BCM5705 A0" }, 2474c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5705_A1, "BCM5705 A1" }, 2484c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5705_A2, "BCM5705 A2" }, 2494c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5705_A3, "BCM5705 A3" }, 2504c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_A0, "BCM5750 A0" }, 2514c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_A1, "BCM5750 A1" }, 2524c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_A3, "BCM5750 A3" }, 2534c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_B0, "BCM5750 B0" }, 2544c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_B1, "BCM5750 B1" }, 2554c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_C0, "BCM5750 C0" }, 2564c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5750_C1, "BCM5750 C1" }, 25742787b76SGleb Smirnoff { BGE_CHIPID_BCM5750_C2, "BCM5750 C2" }, 2584c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5714_A0, "BCM5714 A0" }, 2594c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5752_A0, "BCM5752 A0" }, 2604c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5752_A1, "BCM5752 A1" }, 2614c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5752_A2, "BCM5752 A2" }, 2624c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5714_B0, "BCM5714 B0" }, 2634c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5714_B3, "BCM5714 B3" }, 2644c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5715_A0, "BCM5715 A0" }, 2654c0da0ffSGleb Smirnoff { BGE_CHIPID_BCM5715_A1, "BCM5715 A1" }, 2660c4a1ef8SJung-uk Kim { BGE_CHIPID_BCM5715_A3, "BCM5715 A3" }, 2670c4a1ef8SJung-uk Kim { BGE_CHIPID_BCM5755_A0, "BCM5755 A0" }, 2680c4a1ef8SJung-uk Kim { BGE_CHIPID_BCM5755_A1, "BCM5755 A1" }, 2690c4a1ef8SJung-uk Kim { BGE_CHIPID_BCM5755_A2, "BCM5755 A2" }, 27081179070SJung-uk Kim /* 5754 and 5787 share the same ASIC ID */ 2716f8718a3SScott Long { BGE_CHIPID_BCM5787_A0, "BCM5754/5787 A0" }, 2726f8718a3SScott Long { BGE_CHIPID_BCM5787_A1, "BCM5754/5787 A1" }, 2736f8718a3SScott Long { BGE_CHIPID_BCM5787_A2, "BCM5754/5787 A2" }, 2744c0da0ffSGleb Smirnoff 2754c0da0ffSGleb Smirnoff { 0, NULL } 2764c0da0ffSGleb Smirnoff }; 2774c0da0ffSGleb Smirnoff 2784c0da0ffSGleb Smirnoff /* 2794c0da0ffSGleb Smirnoff * Some defaults for major revisions, so that newer steppings 2804c0da0ffSGleb Smirnoff * that we don't know about have a shot at working. 2814c0da0ffSGleb Smirnoff */ 2824c0da0ffSGleb Smirnoff static const struct bge_revision bge_majorrevs[] = { 2839e86676bSGleb Smirnoff { BGE_ASICREV_BCM5700, "unknown BCM5700" }, 2849e86676bSGleb Smirnoff { BGE_ASICREV_BCM5701, "unknown BCM5701" }, 2859e86676bSGleb Smirnoff { BGE_ASICREV_BCM5703, "unknown BCM5703" }, 2869e86676bSGleb Smirnoff { BGE_ASICREV_BCM5704, "unknown BCM5704" }, 2879e86676bSGleb Smirnoff { BGE_ASICREV_BCM5705, "unknown BCM5705" }, 2889e86676bSGleb Smirnoff { BGE_ASICREV_BCM5750, "unknown BCM5750" }, 2899e86676bSGleb Smirnoff { BGE_ASICREV_BCM5714_A0, "unknown BCM5714" }, 2909e86676bSGleb Smirnoff { BGE_ASICREV_BCM5752, "unknown BCM5752" }, 2919e86676bSGleb Smirnoff { BGE_ASICREV_BCM5780, "unknown BCM5780" }, 2929e86676bSGleb Smirnoff { BGE_ASICREV_BCM5714, "unknown BCM5714" }, 2939e86676bSGleb Smirnoff { BGE_ASICREV_BCM5755, "unknown BCM5755" }, 29481179070SJung-uk Kim /* 5754 and 5787 share the same ASIC ID */ 2956f8718a3SScott Long { BGE_ASICREV_BCM5787, "unknown BCM5754/5787" }, 2964c0da0ffSGleb Smirnoff 2974c0da0ffSGleb Smirnoff { 0, NULL } 2984c0da0ffSGleb Smirnoff }; 2994c0da0ffSGleb Smirnoff 3000c8aa4eaSJung-uk Kim #define BGE_IS_JUMBO_CAPABLE(sc) ((sc)->bge_flags & BGE_FLAG_JUMBO) 3010c8aa4eaSJung-uk Kim #define BGE_IS_5700_FAMILY(sc) ((sc)->bge_flags & BGE_FLAG_5700_FAMILY) 3020c8aa4eaSJung-uk Kim #define BGE_IS_5705_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_5705_PLUS) 3030c8aa4eaSJung-uk Kim #define BGE_IS_5714_FAMILY(sc) ((sc)->bge_flags & BGE_FLAG_5714_FAMILY) 3040c8aa4eaSJung-uk Kim #define BGE_IS_575X_PLUS(sc) ((sc)->bge_flags & BGE_FLAG_575X_PLUS) 3054c0da0ffSGleb Smirnoff 3064c0da0ffSGleb Smirnoff const struct bge_revision * bge_lookup_rev(uint32_t); 3074c0da0ffSGleb Smirnoff const struct bge_vendor * bge_lookup_vendor(uint16_t); 308e51a25f8SAlfred Perlstein static int bge_probe(device_t); 309e51a25f8SAlfred Perlstein static int bge_attach(device_t); 310e51a25f8SAlfred Perlstein static int bge_detach(device_t); 31114afefa3SPawel Jakub Dawidek static int bge_suspend(device_t); 31214afefa3SPawel Jakub Dawidek static int bge_resume(device_t); 3133f74909aSGleb Smirnoff static void bge_release_resources(struct bge_softc *); 314f41ac2beSBill Paul static void bge_dma_map_addr(void *, bus_dma_segment_t *, int, int); 315f41ac2beSBill Paul static int bge_dma_alloc(device_t); 316f41ac2beSBill Paul static void bge_dma_free(struct bge_softc *); 317f41ac2beSBill Paul 318e51a25f8SAlfred Perlstein static void bge_txeof(struct bge_softc *); 319e51a25f8SAlfred Perlstein static void bge_rxeof(struct bge_softc *); 32095d67482SBill Paul 3218cb1383cSDoug Ambrisko static void bge_asf_driver_up (struct bge_softc *); 322e51a25f8SAlfred Perlstein static void bge_tick(void *); 323e51a25f8SAlfred Perlstein static void bge_stats_update(struct bge_softc *); 3243f74909aSGleb Smirnoff static void bge_stats_update_regs(struct bge_softc *); 325676ad2c9SGleb Smirnoff static int bge_encap(struct bge_softc *, struct mbuf **, uint32_t *); 32695d67482SBill Paul 327e51a25f8SAlfred Perlstein static void bge_intr(void *); 3280f9bd73bSSam Leffler static void bge_start_locked(struct ifnet *); 329e51a25f8SAlfred Perlstein static void bge_start(struct ifnet *); 330e51a25f8SAlfred Perlstein static int bge_ioctl(struct ifnet *, u_long, caddr_t); 3310f9bd73bSSam Leffler static void bge_init_locked(struct bge_softc *); 332e51a25f8SAlfred Perlstein static void bge_init(void *); 333e51a25f8SAlfred Perlstein static void bge_stop(struct bge_softc *); 334b74e67fbSGleb Smirnoff static void bge_watchdog(struct bge_softc *); 335e51a25f8SAlfred Perlstein static void bge_shutdown(device_t); 33667d5e043SOleg Bulyzhin static int bge_ifmedia_upd_locked(struct ifnet *); 337e51a25f8SAlfred Perlstein static int bge_ifmedia_upd(struct ifnet *); 338e51a25f8SAlfred Perlstein static void bge_ifmedia_sts(struct ifnet *, struct ifmediareq *); 33995d67482SBill Paul 3403f74909aSGleb Smirnoff static uint8_t bge_eeprom_getbyte(struct bge_softc *, int, uint8_t *); 341e51a25f8SAlfred Perlstein static int bge_read_eeprom(struct bge_softc *, caddr_t, int, int); 34295d67482SBill Paul 3433e9b1bcaSJung-uk Kim static void bge_setpromisc(struct bge_softc *); 344e51a25f8SAlfred Perlstein static void bge_setmulti(struct bge_softc *); 345cb2eacc7SYaroslav Tykhiy static void bge_setvlan(struct bge_softc *); 34695d67482SBill Paul 347e51a25f8SAlfred Perlstein static int bge_newbuf_std(struct bge_softc *, int, struct mbuf *); 348e51a25f8SAlfred Perlstein static int bge_newbuf_jumbo(struct bge_softc *, int, struct mbuf *); 349e51a25f8SAlfred Perlstein static int bge_init_rx_ring_std(struct bge_softc *); 350e51a25f8SAlfred Perlstein static void bge_free_rx_ring_std(struct bge_softc *); 351e51a25f8SAlfred Perlstein static int bge_init_rx_ring_jumbo(struct bge_softc *); 352e51a25f8SAlfred Perlstein static void bge_free_rx_ring_jumbo(struct bge_softc *); 353e51a25f8SAlfred Perlstein static void bge_free_tx_ring(struct bge_softc *); 354e51a25f8SAlfred Perlstein static int bge_init_tx_ring(struct bge_softc *); 35595d67482SBill Paul 356e51a25f8SAlfred Perlstein static int bge_chipinit(struct bge_softc *); 357e51a25f8SAlfred Perlstein static int bge_blockinit(struct bge_softc *); 35895d67482SBill Paul 35908013fd3SMarius Strobl static int bge_has_eeprom(struct bge_softc *); 3603f74909aSGleb Smirnoff static uint32_t bge_readmem_ind(struct bge_softc *, int); 361e51a25f8SAlfred Perlstein static void bge_writemem_ind(struct bge_softc *, int, int); 36295d67482SBill Paul #ifdef notdef 3633f74909aSGleb Smirnoff static uint32_t bge_readreg_ind(struct bge_softc *, int); 36495d67482SBill Paul #endif 3659ba784dbSScott Long static void bge_writemem_direct(struct bge_softc *, int, int); 366e51a25f8SAlfred Perlstein static void bge_writereg_ind(struct bge_softc *, int, int); 36795d67482SBill Paul 368e51a25f8SAlfred Perlstein static int bge_miibus_readreg(device_t, int, int); 369e51a25f8SAlfred Perlstein static int bge_miibus_writereg(device_t, int, int, int); 370e51a25f8SAlfred Perlstein static void bge_miibus_statchg(device_t); 37175719184SGleb Smirnoff #ifdef DEVICE_POLLING 3723f74909aSGleb Smirnoff static void bge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count); 37375719184SGleb Smirnoff #endif 37495d67482SBill Paul 3758cb1383cSDoug Ambrisko #define BGE_RESET_START 1 3768cb1383cSDoug Ambrisko #define BGE_RESET_STOP 2 3778cb1383cSDoug Ambrisko static void bge_sig_post_reset(struct bge_softc *, int); 3788cb1383cSDoug Ambrisko static void bge_sig_legacy(struct bge_softc *, int); 3798cb1383cSDoug Ambrisko static void bge_sig_pre_reset(struct bge_softc *, int); 3808cb1383cSDoug Ambrisko static int bge_reset(struct bge_softc *); 381dab5cd05SOleg Bulyzhin static void bge_link_upd(struct bge_softc *); 38295d67482SBill Paul 3836f8718a3SScott Long /* 3846f8718a3SScott Long * The BGE_REGISTER_DEBUG option is only for low-level debugging. It may 3856f8718a3SScott Long * leak information to untrusted users. It is also known to cause alignment 3866f8718a3SScott Long * traps on certain architectures. 3876f8718a3SScott Long */ 3886f8718a3SScott Long #ifdef BGE_REGISTER_DEBUG 3896f8718a3SScott Long static int bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS); 3906f8718a3SScott Long static int bge_sysctl_reg_read(SYSCTL_HANDLER_ARGS); 3916f8718a3SScott Long static int bge_sysctl_mem_read(SYSCTL_HANDLER_ARGS); 3926f8718a3SScott Long #endif 3936f8718a3SScott Long static void bge_add_sysctls(struct bge_softc *); 394763757b2SScott Long static int bge_sysctl_stats(SYSCTL_HANDLER_ARGS); 3956f8718a3SScott Long 39695d67482SBill Paul static device_method_t bge_methods[] = { 39795d67482SBill Paul /* Device interface */ 39895d67482SBill Paul DEVMETHOD(device_probe, bge_probe), 39995d67482SBill Paul DEVMETHOD(device_attach, bge_attach), 40095d67482SBill Paul DEVMETHOD(device_detach, bge_detach), 40195d67482SBill Paul DEVMETHOD(device_shutdown, bge_shutdown), 40214afefa3SPawel Jakub Dawidek DEVMETHOD(device_suspend, bge_suspend), 40314afefa3SPawel Jakub Dawidek DEVMETHOD(device_resume, bge_resume), 40495d67482SBill Paul 40595d67482SBill Paul /* bus interface */ 40695d67482SBill Paul DEVMETHOD(bus_print_child, bus_generic_print_child), 40795d67482SBill Paul DEVMETHOD(bus_driver_added, bus_generic_driver_added), 40895d67482SBill Paul 40995d67482SBill Paul /* MII interface */ 41095d67482SBill Paul DEVMETHOD(miibus_readreg, bge_miibus_readreg), 41195d67482SBill Paul DEVMETHOD(miibus_writereg, bge_miibus_writereg), 41295d67482SBill Paul DEVMETHOD(miibus_statchg, bge_miibus_statchg), 41395d67482SBill Paul 41495d67482SBill Paul { 0, 0 } 41595d67482SBill Paul }; 41695d67482SBill Paul 41795d67482SBill Paul static driver_t bge_driver = { 41895d67482SBill Paul "bge", 41995d67482SBill Paul bge_methods, 42095d67482SBill Paul sizeof(struct bge_softc) 42195d67482SBill Paul }; 42295d67482SBill Paul 42395d67482SBill Paul static devclass_t bge_devclass; 42495d67482SBill Paul 425f246e4a1SMatthew N. Dodd DRIVER_MODULE(bge, pci, bge_driver, bge_devclass, 0, 0); 42695d67482SBill Paul DRIVER_MODULE(miibus, bge, miibus_driver, miibus_devclass, 0, 0); 42795d67482SBill Paul 428f1a7e6d5SScott Long static int bge_allow_asf = 1; 429f1a7e6d5SScott Long 430f1a7e6d5SScott Long TUNABLE_INT("hw.bge.allow_asf", &bge_allow_asf); 431f1a7e6d5SScott Long 432f1a7e6d5SScott Long SYSCTL_NODE(_hw, OID_AUTO, bge, CTLFLAG_RD, 0, "BGE driver parameters"); 433f1a7e6d5SScott Long SYSCTL_INT(_hw_bge, OID_AUTO, allow_asf, CTLFLAG_RD, &bge_allow_asf, 0, 434f1a7e6d5SScott Long "Allow ASF mode if available"); 435c4529f41SMichael Reifenberger 43608013fd3SMarius Strobl #define SPARC64_BLADE_1500_MODEL "SUNW,Sun-Blade-1500" 43708013fd3SMarius Strobl #define SPARC64_BLADE_1500_PATH_BGE "/pci@1f,700000/network@2" 43808013fd3SMarius Strobl #define SPARC64_BLADE_2500_MODEL "SUNW,Sun-Blade-2500" 43908013fd3SMarius Strobl #define SPARC64_BLADE_2500_PATH_BGE "/pci@1c,600000/network@3" 44008013fd3SMarius Strobl #define SPARC64_OFW_SUBVENDOR "subsystem-vendor-id" 44108013fd3SMarius Strobl 44208013fd3SMarius Strobl static int 44308013fd3SMarius Strobl bge_has_eeprom(struct bge_softc *sc) 44408013fd3SMarius Strobl { 44508013fd3SMarius Strobl #ifdef __sparc64__ 44608013fd3SMarius Strobl char buf[sizeof(SPARC64_BLADE_1500_PATH_BGE)]; 44708013fd3SMarius Strobl device_t dev; 44808013fd3SMarius Strobl uint32_t subvendor; 44908013fd3SMarius Strobl 45008013fd3SMarius Strobl dev = sc->bge_dev; 45108013fd3SMarius Strobl 45208013fd3SMarius Strobl /* 45308013fd3SMarius Strobl * The on-board BGEs found in sun4u machines aren't fitted with 45408013fd3SMarius Strobl * an EEPROM which means that we have to obtain the MAC address 45508013fd3SMarius Strobl * via OFW and that some tests will always fail. We distinguish 45608013fd3SMarius Strobl * such BGEs by the subvendor ID, which also has to be obtained 45708013fd3SMarius Strobl * from OFW instead of the PCI configuration space as the latter 45808013fd3SMarius Strobl * indicates Broadcom as the subvendor of the netboot interface. 45908013fd3SMarius Strobl * For early Blade 1500 and 2500 we even have to check the OFW 46008013fd3SMarius Strobl * device path as the subvendor ID always defaults to Broadcom 46108013fd3SMarius Strobl * there. 46208013fd3SMarius Strobl */ 46308013fd3SMarius Strobl if (OF_getprop(ofw_bus_get_node(dev), SPARC64_OFW_SUBVENDOR, 46408013fd3SMarius Strobl &subvendor, sizeof(subvendor)) == sizeof(subvendor) && 46508013fd3SMarius Strobl subvendor == SUN_VENDORID) 46608013fd3SMarius Strobl return (0); 46708013fd3SMarius Strobl memset(buf, 0, sizeof(buf)); 46808013fd3SMarius Strobl if (OF_package_to_path(ofw_bus_get_node(dev), buf, sizeof(buf)) > 0) { 46908013fd3SMarius Strobl if (strcmp(sparc64_model, SPARC64_BLADE_1500_MODEL) == 0 && 47008013fd3SMarius Strobl strcmp(buf, SPARC64_BLADE_1500_PATH_BGE) == 0) 47108013fd3SMarius Strobl return (0); 47208013fd3SMarius Strobl if (strcmp(sparc64_model, SPARC64_BLADE_2500_MODEL) == 0 && 47308013fd3SMarius Strobl strcmp(buf, SPARC64_BLADE_2500_PATH_BGE) == 0) 47408013fd3SMarius Strobl return (0); 47508013fd3SMarius Strobl } 47608013fd3SMarius Strobl #endif 47708013fd3SMarius Strobl return (1); 47808013fd3SMarius Strobl } 47908013fd3SMarius Strobl 4803f74909aSGleb Smirnoff static uint32_t 4813f74909aSGleb Smirnoff bge_readmem_ind(struct bge_softc *sc, int off) 48295d67482SBill Paul { 48395d67482SBill Paul device_t dev; 4846f8718a3SScott Long uint32_t val; 48595d67482SBill Paul 48695d67482SBill Paul dev = sc->bge_dev; 48795d67482SBill Paul 48895d67482SBill Paul pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, off, 4); 4896f8718a3SScott Long val = pci_read_config(dev, BGE_PCI_MEMWIN_DATA, 4); 4906f8718a3SScott Long pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, 0, 4); 4916f8718a3SScott Long return (val); 49295d67482SBill Paul } 49395d67482SBill Paul 49495d67482SBill Paul static void 4953f74909aSGleb Smirnoff bge_writemem_ind(struct bge_softc *sc, int off, int val) 49695d67482SBill Paul { 49795d67482SBill Paul device_t dev; 49895d67482SBill Paul 49995d67482SBill Paul dev = sc->bge_dev; 50095d67482SBill Paul 50195d67482SBill Paul pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, off, 4); 50295d67482SBill Paul pci_write_config(dev, BGE_PCI_MEMWIN_DATA, val, 4); 5036f8718a3SScott Long pci_write_config(dev, BGE_PCI_MEMWIN_BASEADDR, 0, 4); 50495d67482SBill Paul } 50595d67482SBill Paul 50695d67482SBill Paul #ifdef notdef 5073f74909aSGleb Smirnoff static uint32_t 5083f74909aSGleb Smirnoff bge_readreg_ind(struct bge_softc *sc, int off) 50995d67482SBill Paul { 51095d67482SBill Paul device_t dev; 51195d67482SBill Paul 51295d67482SBill Paul dev = sc->bge_dev; 51395d67482SBill Paul 51495d67482SBill Paul pci_write_config(dev, BGE_PCI_REG_BASEADDR, off, 4); 51595d67482SBill Paul return (pci_read_config(dev, BGE_PCI_REG_DATA, 4)); 51695d67482SBill Paul } 51795d67482SBill Paul #endif 51895d67482SBill Paul 51995d67482SBill Paul static void 5203f74909aSGleb Smirnoff bge_writereg_ind(struct bge_softc *sc, int off, int val) 52195d67482SBill Paul { 52295d67482SBill Paul device_t dev; 52395d67482SBill Paul 52495d67482SBill Paul dev = sc->bge_dev; 52595d67482SBill Paul 52695d67482SBill Paul pci_write_config(dev, BGE_PCI_REG_BASEADDR, off, 4); 52795d67482SBill Paul pci_write_config(dev, BGE_PCI_REG_DATA, val, 4); 52895d67482SBill Paul } 52995d67482SBill Paul 5306f8718a3SScott Long static void 5316f8718a3SScott Long bge_writemem_direct(struct bge_softc *sc, int off, int val) 5326f8718a3SScott Long { 5336f8718a3SScott Long CSR_WRITE_4(sc, off, val); 5346f8718a3SScott Long } 5356f8718a3SScott Long 536f41ac2beSBill Paul /* 537f41ac2beSBill Paul * Map a single buffer address. 538f41ac2beSBill Paul */ 539f41ac2beSBill Paul 540f41ac2beSBill Paul static void 5413f74909aSGleb Smirnoff bge_dma_map_addr(void *arg, bus_dma_segment_t *segs, int nseg, int error) 542f41ac2beSBill Paul { 543f41ac2beSBill Paul struct bge_dmamap_arg *ctx; 544f41ac2beSBill Paul 545f41ac2beSBill Paul if (error) 546f41ac2beSBill Paul return; 547f41ac2beSBill Paul 548f41ac2beSBill Paul ctx = arg; 549f41ac2beSBill Paul 550f41ac2beSBill Paul if (nseg > ctx->bge_maxsegs) { 551f41ac2beSBill Paul ctx->bge_maxsegs = 0; 552f41ac2beSBill Paul return; 553f41ac2beSBill Paul } 554f41ac2beSBill Paul 555f41ac2beSBill Paul ctx->bge_busaddr = segs->ds_addr; 556f41ac2beSBill Paul } 557f41ac2beSBill Paul 55895d67482SBill Paul /* 55995d67482SBill Paul * Read a byte of data stored in the EEPROM at address 'addr.' The 56095d67482SBill Paul * BCM570x supports both the traditional bitbang interface and an 56195d67482SBill Paul * auto access interface for reading the EEPROM. We use the auto 56295d67482SBill Paul * access method. 56395d67482SBill Paul */ 5643f74909aSGleb Smirnoff static uint8_t 5653f74909aSGleb Smirnoff bge_eeprom_getbyte(struct bge_softc *sc, int addr, uint8_t *dest) 56695d67482SBill Paul { 56795d67482SBill Paul int i; 5683f74909aSGleb Smirnoff uint32_t byte = 0; 56995d67482SBill Paul 57095d67482SBill Paul /* 57195d67482SBill Paul * Enable use of auto EEPROM access so we can avoid 57295d67482SBill Paul * having to use the bitbang method. 57395d67482SBill Paul */ 57495d67482SBill Paul BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_AUTO_EEPROM); 57595d67482SBill Paul 57695d67482SBill Paul /* Reset the EEPROM, load the clock period. */ 57795d67482SBill Paul CSR_WRITE_4(sc, BGE_EE_ADDR, 57895d67482SBill Paul BGE_EEADDR_RESET | BGE_EEHALFCLK(BGE_HALFCLK_384SCL)); 57995d67482SBill Paul DELAY(20); 58095d67482SBill Paul 58195d67482SBill Paul /* Issue the read EEPROM command. */ 58295d67482SBill Paul CSR_WRITE_4(sc, BGE_EE_ADDR, BGE_EE_READCMD | addr); 58395d67482SBill Paul 58495d67482SBill Paul /* Wait for completion */ 58595d67482SBill Paul for(i = 0; i < BGE_TIMEOUT * 10; i++) { 58695d67482SBill Paul DELAY(10); 58795d67482SBill Paul if (CSR_READ_4(sc, BGE_EE_ADDR) & BGE_EEADDR_DONE) 58895d67482SBill Paul break; 58995d67482SBill Paul } 59095d67482SBill Paul 591d5d23857SJung-uk Kim if (i == BGE_TIMEOUT * 10) { 592fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "EEPROM read timed out\n"); 593f6789fbaSPyun YongHyeon return (1); 59495d67482SBill Paul } 59595d67482SBill Paul 59695d67482SBill Paul /* Get result. */ 59795d67482SBill Paul byte = CSR_READ_4(sc, BGE_EE_DATA); 59895d67482SBill Paul 5990c8aa4eaSJung-uk Kim *dest = (byte >> ((addr % 4) * 8)) & 0xFF; 60095d67482SBill Paul 60195d67482SBill Paul return (0); 60295d67482SBill Paul } 60395d67482SBill Paul 60495d67482SBill Paul /* 60595d67482SBill Paul * Read a sequence of bytes from the EEPROM. 60695d67482SBill Paul */ 60795d67482SBill Paul static int 6083f74909aSGleb Smirnoff bge_read_eeprom(struct bge_softc *sc, caddr_t dest, int off, int cnt) 60995d67482SBill Paul { 6103f74909aSGleb Smirnoff int i, error = 0; 6113f74909aSGleb Smirnoff uint8_t byte = 0; 61295d67482SBill Paul 61395d67482SBill Paul for (i = 0; i < cnt; i++) { 6143f74909aSGleb Smirnoff error = bge_eeprom_getbyte(sc, off + i, &byte); 6153f74909aSGleb Smirnoff if (error) 61695d67482SBill Paul break; 61795d67482SBill Paul *(dest + i) = byte; 61895d67482SBill Paul } 61995d67482SBill Paul 6203f74909aSGleb Smirnoff return (error ? 1 : 0); 62195d67482SBill Paul } 62295d67482SBill Paul 62395d67482SBill Paul static int 6243f74909aSGleb Smirnoff bge_miibus_readreg(device_t dev, int phy, int reg) 62595d67482SBill Paul { 62695d67482SBill Paul struct bge_softc *sc; 6273f74909aSGleb Smirnoff uint32_t val, autopoll; 62895d67482SBill Paul int i; 62995d67482SBill Paul 63095d67482SBill Paul sc = device_get_softc(dev); 63195d67482SBill Paul 6320434d1b8SBill Paul /* 6330434d1b8SBill Paul * Broadcom's own driver always assumes the internal 6340434d1b8SBill Paul * PHY is at GMII address 1. On some chips, the PHY responds 6350434d1b8SBill Paul * to accesses at all addresses, which could cause us to 6360434d1b8SBill Paul * bogusly attach the PHY 32 times at probe type. Always 6370434d1b8SBill Paul * restricting the lookup to address 1 is simpler than 6380434d1b8SBill Paul * trying to figure out which chips revisions should be 6390434d1b8SBill Paul * special-cased. 6400434d1b8SBill Paul */ 641b1265c1aSJohn Polstra if (phy != 1) 64298b28ee5SBill Paul return (0); 64398b28ee5SBill Paul 64437ceeb4dSPaul Saab /* Reading with autopolling on may trigger PCI errors */ 64537ceeb4dSPaul Saab autopoll = CSR_READ_4(sc, BGE_MI_MODE); 64637ceeb4dSPaul Saab if (autopoll & BGE_MIMODE_AUTOPOLL) { 64737ceeb4dSPaul Saab BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL); 64837ceeb4dSPaul Saab DELAY(40); 64937ceeb4dSPaul Saab } 65037ceeb4dSPaul Saab 65195d67482SBill Paul CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_READ | BGE_MICOMM_BUSY | 65295d67482SBill Paul BGE_MIPHY(phy) | BGE_MIREG(reg)); 65395d67482SBill Paul 65495d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 655d5d23857SJung-uk Kim DELAY(10); 65695d67482SBill Paul val = CSR_READ_4(sc, BGE_MI_COMM); 65795d67482SBill Paul if (!(val & BGE_MICOMM_BUSY)) 65895d67482SBill Paul break; 65995d67482SBill Paul } 66095d67482SBill Paul 66195d67482SBill Paul if (i == BGE_TIMEOUT) { 6626b9f5c94SGleb Smirnoff device_printf(sc->bge_dev, "PHY read timed out\n"); 66337ceeb4dSPaul Saab val = 0; 66437ceeb4dSPaul Saab goto done; 66595d67482SBill Paul } 66695d67482SBill Paul 66795d67482SBill Paul val = CSR_READ_4(sc, BGE_MI_COMM); 66895d67482SBill Paul 66937ceeb4dSPaul Saab done: 67037ceeb4dSPaul Saab if (autopoll & BGE_MIMODE_AUTOPOLL) { 67137ceeb4dSPaul Saab BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL); 67237ceeb4dSPaul Saab DELAY(40); 67337ceeb4dSPaul Saab } 67437ceeb4dSPaul Saab 67595d67482SBill Paul if (val & BGE_MICOMM_READFAIL) 67695d67482SBill Paul return (0); 67795d67482SBill Paul 6780c8aa4eaSJung-uk Kim return (val & 0xFFFF); 67995d67482SBill Paul } 68095d67482SBill Paul 68195d67482SBill Paul static int 6823f74909aSGleb Smirnoff bge_miibus_writereg(device_t dev, int phy, int reg, int val) 68395d67482SBill Paul { 68495d67482SBill Paul struct bge_softc *sc; 6853f74909aSGleb Smirnoff uint32_t autopoll; 68695d67482SBill Paul int i; 68795d67482SBill Paul 68895d67482SBill Paul sc = device_get_softc(dev); 68995d67482SBill Paul 69037ceeb4dSPaul Saab /* Reading with autopolling on may trigger PCI errors */ 69137ceeb4dSPaul Saab autopoll = CSR_READ_4(sc, BGE_MI_MODE); 69237ceeb4dSPaul Saab if (autopoll & BGE_MIMODE_AUTOPOLL) { 69337ceeb4dSPaul Saab BGE_CLRBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL); 69437ceeb4dSPaul Saab DELAY(40); 69537ceeb4dSPaul Saab } 69637ceeb4dSPaul Saab 69795d67482SBill Paul CSR_WRITE_4(sc, BGE_MI_COMM, BGE_MICMD_WRITE | BGE_MICOMM_BUSY | 69895d67482SBill Paul BGE_MIPHY(phy) | BGE_MIREG(reg) | val); 69995d67482SBill Paul 70095d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 701d5d23857SJung-uk Kim DELAY(10); 70295d67482SBill Paul if (!(CSR_READ_4(sc, BGE_MI_COMM) & BGE_MICOMM_BUSY)) 70395d67482SBill Paul break; 704d5d23857SJung-uk Kim } 705d5d23857SJung-uk Kim 706d5d23857SJung-uk Kim if (i == BGE_TIMEOUT) { 707d5d23857SJung-uk Kim device_printf(sc->bge_dev, "PHY write timed out\n"); 708d5d23857SJung-uk Kim return (0); 70995d67482SBill Paul } 71095d67482SBill Paul 71137ceeb4dSPaul Saab if (autopoll & BGE_MIMODE_AUTOPOLL) { 71237ceeb4dSPaul Saab BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL); 71337ceeb4dSPaul Saab DELAY(40); 71437ceeb4dSPaul Saab } 71537ceeb4dSPaul Saab 71695d67482SBill Paul return (0); 71795d67482SBill Paul } 71895d67482SBill Paul 71995d67482SBill Paul static void 7203f74909aSGleb Smirnoff bge_miibus_statchg(device_t dev) 72195d67482SBill Paul { 72295d67482SBill Paul struct bge_softc *sc; 72395d67482SBill Paul struct mii_data *mii; 72495d67482SBill Paul sc = device_get_softc(dev); 72595d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 72695d67482SBill Paul 72795d67482SBill Paul BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_PORTMODE); 7283f74909aSGleb Smirnoff if (IFM_SUBTYPE(mii->mii_media_active) == IFM_1000_T) 72995d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_GMII); 7303f74909aSGleb Smirnoff else 73195d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_MODE, BGE_PORTMODE_MII); 73295d67482SBill Paul 7333f74909aSGleb Smirnoff if ((mii->mii_media_active & IFM_GMASK) == IFM_FDX) 73495d67482SBill Paul BGE_CLRBIT(sc, BGE_MAC_MODE, BGE_MACMODE_HALF_DUPLEX); 7353f74909aSGleb Smirnoff else 73695d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_MODE, BGE_MACMODE_HALF_DUPLEX); 73795d67482SBill Paul } 73895d67482SBill Paul 73995d67482SBill Paul /* 74095d67482SBill Paul * Intialize a standard receive ring descriptor. 74195d67482SBill Paul */ 74295d67482SBill Paul static int 7433f74909aSGleb Smirnoff bge_newbuf_std(struct bge_softc *sc, int i, struct mbuf *m) 74495d67482SBill Paul { 74595d67482SBill Paul struct mbuf *m_new = NULL; 74695d67482SBill Paul struct bge_rx_bd *r; 747f41ac2beSBill Paul struct bge_dmamap_arg ctx; 748f41ac2beSBill Paul int error; 74995d67482SBill Paul 75095d67482SBill Paul if (m == NULL) { 751c3a56752SGleb Smirnoff m_new = m_getcl(M_DONTWAIT, MT_DATA, M_PKTHDR); 752c3a56752SGleb Smirnoff if (m_new == NULL) 75395d67482SBill Paul return (ENOBUFS); 75495d67482SBill Paul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 75595d67482SBill Paul } else { 75695d67482SBill Paul m_new = m; 75795d67482SBill Paul m_new->m_len = m_new->m_pkthdr.len = MCLBYTES; 75895d67482SBill Paul m_new->m_data = m_new->m_ext.ext_buf; 75995d67482SBill Paul } 76095d67482SBill Paul 761652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) == 0) 76295d67482SBill Paul m_adj(m_new, ETHER_ALIGN); 76395d67482SBill Paul sc->bge_cdata.bge_rx_std_chain[i] = m_new; 764f41ac2beSBill Paul r = &sc->bge_ldata.bge_rx_std_ring[i]; 765f41ac2beSBill Paul ctx.bge_maxsegs = 1; 766f41ac2beSBill Paul ctx.sc = sc; 767f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_mtag, 768f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[i], mtod(m_new, void *), 769f41ac2beSBill Paul m_new->m_len, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 770f41ac2beSBill Paul if (error || ctx.bge_maxsegs == 0) { 771f7cea149SGleb Smirnoff if (m == NULL) { 772f7cea149SGleb Smirnoff sc->bge_cdata.bge_rx_std_chain[i] = NULL; 773f41ac2beSBill Paul m_freem(m_new); 774f7cea149SGleb Smirnoff } 775f41ac2beSBill Paul return (ENOMEM); 776f41ac2beSBill Paul } 777e907febfSPyun YongHyeon r->bge_addr.bge_addr_lo = BGE_ADDR_LO(ctx.bge_busaddr); 778e907febfSPyun YongHyeon r->bge_addr.bge_addr_hi = BGE_ADDR_HI(ctx.bge_busaddr); 779e907febfSPyun YongHyeon r->bge_flags = BGE_RXBDFLAG_END; 780e907febfSPyun YongHyeon r->bge_len = m_new->m_len; 781e907febfSPyun YongHyeon r->bge_idx = i; 782f41ac2beSBill Paul 783f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_mtag, 784f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[i], 785f41ac2beSBill Paul BUS_DMASYNC_PREREAD); 78695d67482SBill Paul 78795d67482SBill Paul return (0); 78895d67482SBill Paul } 78995d67482SBill Paul 79095d67482SBill Paul /* 79195d67482SBill Paul * Initialize a jumbo receive ring descriptor. This allocates 79295d67482SBill Paul * a jumbo buffer from the pool managed internally by the driver. 79395d67482SBill Paul */ 79495d67482SBill Paul static int 7953f74909aSGleb Smirnoff bge_newbuf_jumbo(struct bge_softc *sc, int i, struct mbuf *m) 79695d67482SBill Paul { 7971be6acb7SGleb Smirnoff bus_dma_segment_t segs[BGE_NSEG_JUMBO]; 7981be6acb7SGleb Smirnoff struct bge_extrx_bd *r; 79995d67482SBill Paul struct mbuf *m_new = NULL; 8001be6acb7SGleb Smirnoff int nsegs; 801f41ac2beSBill Paul int error; 80295d67482SBill Paul 80395d67482SBill Paul if (m == NULL) { 804a163d034SWarner Losh MGETHDR(m_new, M_DONTWAIT, MT_DATA); 8051be6acb7SGleb Smirnoff if (m_new == NULL) 80695d67482SBill Paul return (ENOBUFS); 80795d67482SBill Paul 8081be6acb7SGleb Smirnoff m_cljget(m_new, M_DONTWAIT, MJUM9BYTES); 8091be6acb7SGleb Smirnoff if (!(m_new->m_flags & M_EXT)) { 81095d67482SBill Paul m_freem(m_new); 81195d67482SBill Paul return (ENOBUFS); 81295d67482SBill Paul } 8131be6acb7SGleb Smirnoff m_new->m_len = m_new->m_pkthdr.len = MJUM9BYTES; 81495d67482SBill Paul } else { 81595d67482SBill Paul m_new = m; 8161be6acb7SGleb Smirnoff m_new->m_len = m_new->m_pkthdr.len = MJUM9BYTES; 81795d67482SBill Paul m_new->m_data = m_new->m_ext.ext_buf; 81895d67482SBill Paul } 81995d67482SBill Paul 820652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) == 0) 82195d67482SBill Paul m_adj(m_new, ETHER_ALIGN); 8221be6acb7SGleb Smirnoff 8231be6acb7SGleb Smirnoff error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag_jumbo, 8241be6acb7SGleb Smirnoff sc->bge_cdata.bge_rx_jumbo_dmamap[i], 8251be6acb7SGleb Smirnoff m_new, segs, &nsegs, BUS_DMA_NOWAIT); 8261be6acb7SGleb Smirnoff if (error) { 8271be6acb7SGleb Smirnoff if (m == NULL) 828f41ac2beSBill Paul m_freem(m_new); 8291be6acb7SGleb Smirnoff return (error); 830f7cea149SGleb Smirnoff } 8311be6acb7SGleb Smirnoff sc->bge_cdata.bge_rx_jumbo_chain[i] = m_new; 8321be6acb7SGleb Smirnoff 8331be6acb7SGleb Smirnoff /* 8341be6acb7SGleb Smirnoff * Fill in the extended RX buffer descriptor. 8351be6acb7SGleb Smirnoff */ 8361be6acb7SGleb Smirnoff r = &sc->bge_ldata.bge_rx_jumbo_ring[i]; 8374e7ba1abSGleb Smirnoff r->bge_flags = BGE_RXBDFLAG_JUMBO_RING | BGE_RXBDFLAG_END; 8384e7ba1abSGleb Smirnoff r->bge_idx = i; 8394e7ba1abSGleb Smirnoff r->bge_len3 = r->bge_len2 = r->bge_len1 = 0; 8404e7ba1abSGleb Smirnoff switch (nsegs) { 8414e7ba1abSGleb Smirnoff case 4: 8424e7ba1abSGleb Smirnoff r->bge_addr3.bge_addr_lo = BGE_ADDR_LO(segs[3].ds_addr); 8434e7ba1abSGleb Smirnoff r->bge_addr3.bge_addr_hi = BGE_ADDR_HI(segs[3].ds_addr); 8444e7ba1abSGleb Smirnoff r->bge_len3 = segs[3].ds_len; 8454e7ba1abSGleb Smirnoff case 3: 846e907febfSPyun YongHyeon r->bge_addr2.bge_addr_lo = BGE_ADDR_LO(segs[2].ds_addr); 847e907febfSPyun YongHyeon r->bge_addr2.bge_addr_hi = BGE_ADDR_HI(segs[2].ds_addr); 848e907febfSPyun YongHyeon r->bge_len2 = segs[2].ds_len; 8494e7ba1abSGleb Smirnoff case 2: 8504e7ba1abSGleb Smirnoff r->bge_addr1.bge_addr_lo = BGE_ADDR_LO(segs[1].ds_addr); 8514e7ba1abSGleb Smirnoff r->bge_addr1.bge_addr_hi = BGE_ADDR_HI(segs[1].ds_addr); 8524e7ba1abSGleb Smirnoff r->bge_len1 = segs[1].ds_len; 8534e7ba1abSGleb Smirnoff case 1: 8544e7ba1abSGleb Smirnoff r->bge_addr0.bge_addr_lo = BGE_ADDR_LO(segs[0].ds_addr); 8554e7ba1abSGleb Smirnoff r->bge_addr0.bge_addr_hi = BGE_ADDR_HI(segs[0].ds_addr); 8564e7ba1abSGleb Smirnoff r->bge_len0 = segs[0].ds_len; 8574e7ba1abSGleb Smirnoff break; 8584e7ba1abSGleb Smirnoff default: 8594e7ba1abSGleb Smirnoff panic("%s: %d segments\n", __func__, nsegs); 8604e7ba1abSGleb Smirnoff } 861f41ac2beSBill Paul 862f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_mtag, 863f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[i], 864f41ac2beSBill Paul BUS_DMASYNC_PREREAD); 86595d67482SBill Paul 86695d67482SBill Paul return (0); 86795d67482SBill Paul } 86895d67482SBill Paul 86995d67482SBill Paul /* 87095d67482SBill Paul * The standard receive ring has 512 entries in it. At 2K per mbuf cluster, 87195d67482SBill Paul * that's 1MB or memory, which is a lot. For now, we fill only the first 87295d67482SBill Paul * 256 ring entries and hope that our CPU is fast enough to keep up with 87395d67482SBill Paul * the NIC. 87495d67482SBill Paul */ 87595d67482SBill Paul static int 8763f74909aSGleb Smirnoff bge_init_rx_ring_std(struct bge_softc *sc) 87795d67482SBill Paul { 87895d67482SBill Paul int i; 87995d67482SBill Paul 88095d67482SBill Paul for (i = 0; i < BGE_SSLOTS; i++) { 88195d67482SBill Paul if (bge_newbuf_std(sc, i, NULL) == ENOBUFS) 88295d67482SBill Paul return (ENOBUFS); 88395d67482SBill Paul }; 88495d67482SBill Paul 885f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag, 886f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map, 887f41ac2beSBill Paul BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 888f41ac2beSBill Paul 88995d67482SBill Paul sc->bge_std = i - 1; 89095d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std); 89195d67482SBill Paul 89295d67482SBill Paul return (0); 89395d67482SBill Paul } 89495d67482SBill Paul 89595d67482SBill Paul static void 8963f74909aSGleb Smirnoff bge_free_rx_ring_std(struct bge_softc *sc) 89795d67482SBill Paul { 89895d67482SBill Paul int i; 89995d67482SBill Paul 90095d67482SBill Paul for (i = 0; i < BGE_STD_RX_RING_CNT; i++) { 90195d67482SBill Paul if (sc->bge_cdata.bge_rx_std_chain[i] != NULL) { 902e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag, 903e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_std_dmamap[i], 904e65bed95SPyun YongHyeon BUS_DMASYNC_POSTREAD); 905f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag, 906f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[i]); 907e65bed95SPyun YongHyeon m_freem(sc->bge_cdata.bge_rx_std_chain[i]); 908e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_std_chain[i] = NULL; 90995d67482SBill Paul } 910f41ac2beSBill Paul bzero((char *)&sc->bge_ldata.bge_rx_std_ring[i], 91195d67482SBill Paul sizeof(struct bge_rx_bd)); 91295d67482SBill Paul } 91395d67482SBill Paul } 91495d67482SBill Paul 91595d67482SBill Paul static int 9163f74909aSGleb Smirnoff bge_init_rx_ring_jumbo(struct bge_softc *sc) 91795d67482SBill Paul { 91895d67482SBill Paul struct bge_rcb *rcb; 9191be6acb7SGleb Smirnoff int i; 92095d67482SBill Paul 92195d67482SBill Paul for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 92295d67482SBill Paul if (bge_newbuf_jumbo(sc, i, NULL) == ENOBUFS) 92395d67482SBill Paul return (ENOBUFS); 92495d67482SBill Paul }; 92595d67482SBill Paul 926f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag, 927f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_ring_map, 928f41ac2beSBill Paul BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE); 929f41ac2beSBill Paul 93095d67482SBill Paul sc->bge_jumbo = i - 1; 93195d67482SBill Paul 932f41ac2beSBill Paul rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb; 9331be6acb7SGleb Smirnoff rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0, 9341be6acb7SGleb Smirnoff BGE_RCB_FLAG_USE_EXT_RX_BD); 93567111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); 93695d67482SBill Paul 93795d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo); 93895d67482SBill Paul 93995d67482SBill Paul return (0); 94095d67482SBill Paul } 94195d67482SBill Paul 94295d67482SBill Paul static void 9433f74909aSGleb Smirnoff bge_free_rx_ring_jumbo(struct bge_softc *sc) 94495d67482SBill Paul { 94595d67482SBill Paul int i; 94695d67482SBill Paul 94795d67482SBill Paul for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 94895d67482SBill Paul if (sc->bge_cdata.bge_rx_jumbo_chain[i] != NULL) { 949e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo, 950e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_jumbo_dmamap[i], 951e65bed95SPyun YongHyeon BUS_DMASYNC_POSTREAD); 952f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo, 953f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[i]); 954e65bed95SPyun YongHyeon m_freem(sc->bge_cdata.bge_rx_jumbo_chain[i]); 955e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_jumbo_chain[i] = NULL; 95695d67482SBill Paul } 957f41ac2beSBill Paul bzero((char *)&sc->bge_ldata.bge_rx_jumbo_ring[i], 9581be6acb7SGleb Smirnoff sizeof(struct bge_extrx_bd)); 95995d67482SBill Paul } 96095d67482SBill Paul } 96195d67482SBill Paul 96295d67482SBill Paul static void 9633f74909aSGleb Smirnoff bge_free_tx_ring(struct bge_softc *sc) 96495d67482SBill Paul { 96595d67482SBill Paul int i; 96695d67482SBill Paul 967f41ac2beSBill Paul if (sc->bge_ldata.bge_tx_ring == NULL) 96895d67482SBill Paul return; 96995d67482SBill Paul 97095d67482SBill Paul for (i = 0; i < BGE_TX_RING_CNT; i++) { 97195d67482SBill Paul if (sc->bge_cdata.bge_tx_chain[i] != NULL) { 972e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag, 973e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_dmamap[i], 974e65bed95SPyun YongHyeon BUS_DMASYNC_POSTWRITE); 975f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag, 976f41ac2beSBill Paul sc->bge_cdata.bge_tx_dmamap[i]); 977e65bed95SPyun YongHyeon m_freem(sc->bge_cdata.bge_tx_chain[i]); 978e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_chain[i] = NULL; 97995d67482SBill Paul } 980f41ac2beSBill Paul bzero((char *)&sc->bge_ldata.bge_tx_ring[i], 98195d67482SBill Paul sizeof(struct bge_tx_bd)); 98295d67482SBill Paul } 98395d67482SBill Paul } 98495d67482SBill Paul 98595d67482SBill Paul static int 9863f74909aSGleb Smirnoff bge_init_tx_ring(struct bge_softc *sc) 98795d67482SBill Paul { 98895d67482SBill Paul sc->bge_txcnt = 0; 98995d67482SBill Paul sc->bge_tx_saved_considx = 0; 9903927098fSPaul Saab 99114bbd30fSGleb Smirnoff /* Initialize transmit producer index for host-memory send ring. */ 99214bbd30fSGleb Smirnoff sc->bge_tx_prodidx = 0; 99314bbd30fSGleb Smirnoff CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, sc->bge_tx_prodidx); 99414bbd30fSGleb Smirnoff 9953927098fSPaul Saab /* 5700 b2 errata */ 996e0ced696SPaul Saab if (sc->bge_chiprev == BGE_CHIPREV_5700_BX) 99714bbd30fSGleb Smirnoff CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, sc->bge_tx_prodidx); 9983927098fSPaul Saab 99914bbd30fSGleb Smirnoff /* NIC-memory send ring not used; initialize to zero. */ 10003927098fSPaul Saab CSR_WRITE_4(sc, BGE_MBX_TX_NIC_PROD0_LO, 0); 10013927098fSPaul Saab /* 5700 b2 errata */ 1002e0ced696SPaul Saab if (sc->bge_chiprev == BGE_CHIPREV_5700_BX) 100395d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_TX_NIC_PROD0_LO, 0); 100495d67482SBill Paul 100595d67482SBill Paul return (0); 100695d67482SBill Paul } 100795d67482SBill Paul 100895d67482SBill Paul static void 10093e9b1bcaSJung-uk Kim bge_setpromisc(struct bge_softc *sc) 10103e9b1bcaSJung-uk Kim { 10113e9b1bcaSJung-uk Kim struct ifnet *ifp; 10123e9b1bcaSJung-uk Kim 10133e9b1bcaSJung-uk Kim BGE_LOCK_ASSERT(sc); 10143e9b1bcaSJung-uk Kim 10153e9b1bcaSJung-uk Kim ifp = sc->bge_ifp; 10163e9b1bcaSJung-uk Kim 101745ee6ab3SJung-uk Kim /* Enable or disable promiscuous mode as needed. */ 10183e9b1bcaSJung-uk Kim if (ifp->if_flags & IFF_PROMISC) 101945ee6ab3SJung-uk Kim BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_PROMISC); 10203e9b1bcaSJung-uk Kim else 102145ee6ab3SJung-uk Kim BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_PROMISC); 10223e9b1bcaSJung-uk Kim } 10233e9b1bcaSJung-uk Kim 10243e9b1bcaSJung-uk Kim static void 10253f74909aSGleb Smirnoff bge_setmulti(struct bge_softc *sc) 102695d67482SBill Paul { 102795d67482SBill Paul struct ifnet *ifp; 102895d67482SBill Paul struct ifmultiaddr *ifma; 10293f74909aSGleb Smirnoff uint32_t hashes[4] = { 0, 0, 0, 0 }; 103095d67482SBill Paul int h, i; 103195d67482SBill Paul 10320f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 10330f9bd73bSSam Leffler 1034fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 103595d67482SBill Paul 103695d67482SBill Paul if (ifp->if_flags & IFF_ALLMULTI || ifp->if_flags & IFF_PROMISC) { 103795d67482SBill Paul for (i = 0; i < 4; i++) 10380c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), 0xFFFFFFFF); 103995d67482SBill Paul return; 104095d67482SBill Paul } 104195d67482SBill Paul 104295d67482SBill Paul /* First, zot all the existing filters. */ 104395d67482SBill Paul for (i = 0; i < 4; i++) 104495d67482SBill Paul CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), 0); 104595d67482SBill Paul 104695d67482SBill Paul /* Now program new ones. */ 104713b203d0SRobert Watson IF_ADDR_LOCK(ifp); 104895d67482SBill Paul TAILQ_FOREACH(ifma, &ifp->if_multiaddrs, ifma_link) { 104995d67482SBill Paul if (ifma->ifma_addr->sa_family != AF_LINK) 105095d67482SBill Paul continue; 10510e939c0cSChristian Weisgerber h = ether_crc32_le(LLADDR((struct sockaddr_dl *) 10520c8aa4eaSJung-uk Kim ifma->ifma_addr), ETHER_ADDR_LEN) & 0x7F; 10530c8aa4eaSJung-uk Kim hashes[(h & 0x60) >> 5] |= 1 << (h & 0x1F); 105495d67482SBill Paul } 105513b203d0SRobert Watson IF_ADDR_UNLOCK(ifp); 105695d67482SBill Paul 105795d67482SBill Paul for (i = 0; i < 4; i++) 105895d67482SBill Paul CSR_WRITE_4(sc, BGE_MAR0 + (i * 4), hashes[i]); 105995d67482SBill Paul } 106095d67482SBill Paul 10618cb1383cSDoug Ambrisko static void 1062cb2eacc7SYaroslav Tykhiy bge_setvlan(struct bge_softc *sc) 1063cb2eacc7SYaroslav Tykhiy { 1064cb2eacc7SYaroslav Tykhiy struct ifnet *ifp; 1065cb2eacc7SYaroslav Tykhiy 1066cb2eacc7SYaroslav Tykhiy BGE_LOCK_ASSERT(sc); 1067cb2eacc7SYaroslav Tykhiy 1068cb2eacc7SYaroslav Tykhiy ifp = sc->bge_ifp; 1069cb2eacc7SYaroslav Tykhiy 1070cb2eacc7SYaroslav Tykhiy /* Enable or disable VLAN tag stripping as needed. */ 1071cb2eacc7SYaroslav Tykhiy if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) 1072cb2eacc7SYaroslav Tykhiy BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_KEEP_VLAN_DIAG); 1073cb2eacc7SYaroslav Tykhiy else 1074cb2eacc7SYaroslav Tykhiy BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_RX_KEEP_VLAN_DIAG); 1075cb2eacc7SYaroslav Tykhiy } 1076cb2eacc7SYaroslav Tykhiy 1077cb2eacc7SYaroslav Tykhiy static void 10788cb1383cSDoug Ambrisko bge_sig_pre_reset(sc, type) 10798cb1383cSDoug Ambrisko struct bge_softc *sc; 10808cb1383cSDoug Ambrisko int type; 10818cb1383cSDoug Ambrisko { 10828cb1383cSDoug Ambrisko /* 10838cb1383cSDoug Ambrisko * Some chips don't like this so only do this if ASF is enabled 10848cb1383cSDoug Ambrisko */ 10858cb1383cSDoug Ambrisko if (sc->bge_asf_mode) 10868cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER); 10878cb1383cSDoug Ambrisko 10888cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) { 10898cb1383cSDoug Ambrisko switch (type) { 10908cb1383cSDoug Ambrisko case BGE_RESET_START: 10918cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */ 10928cb1383cSDoug Ambrisko break; 10938cb1383cSDoug Ambrisko case BGE_RESET_STOP: 10948cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */ 10958cb1383cSDoug Ambrisko break; 10968cb1383cSDoug Ambrisko } 10978cb1383cSDoug Ambrisko } 10988cb1383cSDoug Ambrisko } 10998cb1383cSDoug Ambrisko 11008cb1383cSDoug Ambrisko static void 11018cb1383cSDoug Ambrisko bge_sig_post_reset(sc, type) 11028cb1383cSDoug Ambrisko struct bge_softc *sc; 11038cb1383cSDoug Ambrisko int type; 11048cb1383cSDoug Ambrisko { 11058cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_NEW_HANDSHAKE) { 11068cb1383cSDoug Ambrisko switch (type) { 11078cb1383cSDoug Ambrisko case BGE_RESET_START: 11088cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000001); 11098cb1383cSDoug Ambrisko /* START DONE */ 11108cb1383cSDoug Ambrisko break; 11118cb1383cSDoug Ambrisko case BGE_RESET_STOP: 11128cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x80000002); 11138cb1383cSDoug Ambrisko break; 11148cb1383cSDoug Ambrisko } 11158cb1383cSDoug Ambrisko } 11168cb1383cSDoug Ambrisko } 11178cb1383cSDoug Ambrisko 11188cb1383cSDoug Ambrisko static void 11198cb1383cSDoug Ambrisko bge_sig_legacy(sc, type) 11208cb1383cSDoug Ambrisko struct bge_softc *sc; 11218cb1383cSDoug Ambrisko int type; 11228cb1383cSDoug Ambrisko { 11238cb1383cSDoug Ambrisko if (sc->bge_asf_mode) { 11248cb1383cSDoug Ambrisko switch (type) { 11258cb1383cSDoug Ambrisko case BGE_RESET_START: 11268cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x1); /* START */ 11278cb1383cSDoug Ambrisko break; 11288cb1383cSDoug Ambrisko case BGE_RESET_STOP: 11298cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SDI_STATUS, 0x2); /* UNLOAD */ 11308cb1383cSDoug Ambrisko break; 11318cb1383cSDoug Ambrisko } 11328cb1383cSDoug Ambrisko } 11338cb1383cSDoug Ambrisko } 11348cb1383cSDoug Ambrisko 11358cb1383cSDoug Ambrisko void bge_stop_fw(struct bge_softc *); 11368cb1383cSDoug Ambrisko void 11378cb1383cSDoug Ambrisko bge_stop_fw(sc) 11388cb1383cSDoug Ambrisko struct bge_softc *sc; 11398cb1383cSDoug Ambrisko { 11408cb1383cSDoug Ambrisko int i; 11418cb1383cSDoug Ambrisko 11428cb1383cSDoug Ambrisko if (sc->bge_asf_mode) { 11438cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM_FW, BGE_FW_PAUSE); 11448cb1383cSDoug Ambrisko CSR_WRITE_4(sc, BGE_CPU_EVENT, 114539153c5aSJung-uk Kim CSR_READ_4(sc, BGE_CPU_EVENT) | (1 << 14)); 11468cb1383cSDoug Ambrisko 11478cb1383cSDoug Ambrisko for (i = 0; i < 100; i++ ) { 11488cb1383cSDoug Ambrisko if (!(CSR_READ_4(sc, BGE_CPU_EVENT) & (1 << 14))) 11498cb1383cSDoug Ambrisko break; 11508cb1383cSDoug Ambrisko DELAY(10); 11518cb1383cSDoug Ambrisko } 11528cb1383cSDoug Ambrisko } 11538cb1383cSDoug Ambrisko } 11548cb1383cSDoug Ambrisko 115595d67482SBill Paul /* 115695d67482SBill Paul * Do endian, PCI and DMA initialization. Also check the on-board ROM 115795d67482SBill Paul * self-test results. 115895d67482SBill Paul */ 115995d67482SBill Paul static int 11603f74909aSGleb Smirnoff bge_chipinit(struct bge_softc *sc) 116195d67482SBill Paul { 11623f74909aSGleb Smirnoff uint32_t dma_rw_ctl; 116395d67482SBill Paul int i; 116495d67482SBill Paul 11658cb1383cSDoug Ambrisko /* Set endianness before we access any non-PCI registers. */ 1166e907febfSPyun YongHyeon pci_write_config(sc->bge_dev, BGE_PCI_MISC_CTL, BGE_INIT, 4); 116795d67482SBill Paul 116895d67482SBill Paul /* 116995d67482SBill Paul * Check the 'ROM failed' bit on the RX CPU to see if 117008013fd3SMarius Strobl * self-tests passed. Skip this check when there's no 117108013fd3SMarius Strobl * EEPROM fitted, since in that case it will always 117208013fd3SMarius Strobl * fail. 117395d67482SBill Paul */ 117408013fd3SMarius Strobl if ((sc->bge_flags & BGE_FLAG_EEPROM) && 117508013fd3SMarius Strobl CSR_READ_4(sc, BGE_RXCPU_MODE) & BGE_RXCPUMODE_ROMFAIL) { 11760c8aa4eaSJung-uk Kim device_printf(sc->bge_dev, "RX CPU self-diagnostics failed!\n"); 117795d67482SBill Paul return (ENODEV); 117895d67482SBill Paul } 117995d67482SBill Paul 118095d67482SBill Paul /* Clear the MAC control register */ 118195d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_MODE, 0); 118295d67482SBill Paul 118395d67482SBill Paul /* 118495d67482SBill Paul * Clear the MAC statistics block in the NIC's 118595d67482SBill Paul * internal memory. 118695d67482SBill Paul */ 118795d67482SBill Paul for (i = BGE_STATS_BLOCK; 11883f74909aSGleb Smirnoff i < BGE_STATS_BLOCK_END + 1; i += sizeof(uint32_t)) 118995d67482SBill Paul BGE_MEMWIN_WRITE(sc, i, 0); 119095d67482SBill Paul 119195d67482SBill Paul for (i = BGE_STATUS_BLOCK; 11923f74909aSGleb Smirnoff i < BGE_STATUS_BLOCK_END + 1; i += sizeof(uint32_t)) 119395d67482SBill Paul BGE_MEMWIN_WRITE(sc, i, 0); 119495d67482SBill Paul 1195186f842bSJung-uk Kim /* 1196186f842bSJung-uk Kim * Set up the PCI DMA control register. 1197186f842bSJung-uk Kim */ 1198186f842bSJung-uk Kim dma_rw_ctl = BGE_PCIDMARWCTL_RD_CMD_SHIFT(6) | 1199186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_CMD_SHIFT(7); 1200652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_PCIE) { 1201186f842bSJung-uk Kim /* Read watermark not used, 128 bytes for write. */ 1202186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_WR_WAT_SHIFT(3); 1203652ae483SGleb Smirnoff } else if (sc->bge_flags & BGE_FLAG_PCIX) { 12044c0da0ffSGleb Smirnoff if (BGE_IS_5714_FAMILY(sc)) { 1205186f842bSJung-uk Kim /* 256 bytes for read and write. */ 1206186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(2) | 1207186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_WAT_SHIFT(2); 1208186f842bSJung-uk Kim dma_rw_ctl |= (sc->bge_asicrev == BGE_ASICREV_BCM5780) ? 1209186f842bSJung-uk Kim BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL : 1210186f842bSJung-uk Kim BGE_PCIDMARWCTL_ONEDMA_ATONCE_LOCAL; 1211186f842bSJung-uk Kim } else if (sc->bge_asicrev == BGE_ASICREV_BCM5704) { 1212186f842bSJung-uk Kim /* 1536 bytes for read, 384 bytes for write. */ 1213186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(7) | 1214186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_WAT_SHIFT(3); 1215186f842bSJung-uk Kim } else { 1216186f842bSJung-uk Kim /* 384 bytes for read and write. */ 1217186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(3) | 1218186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_WAT_SHIFT(3) | 12190c8aa4eaSJung-uk Kim 0x0F; 1220186f842bSJung-uk Kim } 1221e0ced696SPaul Saab if (sc->bge_asicrev == BGE_ASICREV_BCM5703 || 1222e0ced696SPaul Saab sc->bge_asicrev == BGE_ASICREV_BCM5704) { 12233f74909aSGleb Smirnoff uint32_t tmp; 12245cba12d3SPaul Saab 1225186f842bSJung-uk Kim /* Set ONE_DMA_AT_ONCE for hardware workaround. */ 12260c8aa4eaSJung-uk Kim tmp = CSR_READ_4(sc, BGE_PCI_CLKCTL) & 0x1F; 1227186f842bSJung-uk Kim if (tmp == 6 || tmp == 7) 1228186f842bSJung-uk Kim dma_rw_ctl |= 1229186f842bSJung-uk Kim BGE_PCIDMARWCTL_ONEDMA_ATONCE_GLOBAL; 12305cba12d3SPaul Saab 1231186f842bSJung-uk Kim /* Set PCI-X DMA write workaround. */ 1232186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_ASRT_ALL_BE; 1233186f842bSJung-uk Kim } 1234186f842bSJung-uk Kim } else { 1235186f842bSJung-uk Kim /* Conventional PCI bus: 256 bytes for read and write. */ 1236186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_RD_WAT_SHIFT(7) | 1237186f842bSJung-uk Kim BGE_PCIDMARWCTL_WR_WAT_SHIFT(7); 1238186f842bSJung-uk Kim 1239186f842bSJung-uk Kim if (sc->bge_asicrev != BGE_ASICREV_BCM5705 && 1240186f842bSJung-uk Kim sc->bge_asicrev != BGE_ASICREV_BCM5750) 1241186f842bSJung-uk Kim dma_rw_ctl |= 0x0F; 1242186f842bSJung-uk Kim } 1243186f842bSJung-uk Kim if (sc->bge_asicrev == BGE_ASICREV_BCM5700 || 1244186f842bSJung-uk Kim sc->bge_asicrev == BGE_ASICREV_BCM5701) 1245186f842bSJung-uk Kim dma_rw_ctl |= BGE_PCIDMARWCTL_USE_MRM | 1246186f842bSJung-uk Kim BGE_PCIDMARWCTL_ASRT_ALL_BE; 1247e0ced696SPaul Saab if (sc->bge_asicrev == BGE_ASICREV_BCM5703 || 1248186f842bSJung-uk Kim sc->bge_asicrev == BGE_ASICREV_BCM5704) 12495cba12d3SPaul Saab dma_rw_ctl &= ~BGE_PCIDMARWCTL_MINDMA; 12505cba12d3SPaul Saab pci_write_config(sc->bge_dev, BGE_PCI_DMA_RW_CTL, dma_rw_ctl, 4); 125195d67482SBill Paul 125295d67482SBill Paul /* 125395d67482SBill Paul * Set up general mode register. 125495d67482SBill Paul */ 1255e907febfSPyun YongHyeon CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS | 125695d67482SBill Paul BGE_MODECTL_MAC_ATTN_INTR | BGE_MODECTL_HOST_SEND_BDS | 1257ee7ef91cSOleg Bulyzhin BGE_MODECTL_TX_NO_PHDR_CSUM); 125895d67482SBill Paul 125995d67482SBill Paul /* 12608cb1383cSDoug Ambrisko * Tell the firmware the driver is running 12618cb1383cSDoug Ambrisko */ 12628cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) 12638cb1383cSDoug Ambrisko BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 12648cb1383cSDoug Ambrisko 12658cb1383cSDoug Ambrisko /* 1266ea13bdd5SJohn Polstra * Disable memory write invalidate. Apparently it is not supported 1267ea13bdd5SJohn Polstra * properly by these devices. 126895d67482SBill Paul */ 1269ea13bdd5SJohn Polstra PCI_CLRBIT(sc->bge_dev, BGE_PCI_CMD, PCIM_CMD_MWIEN, 4); 127095d67482SBill Paul 127195d67482SBill Paul /* Set the timer prescaler (always 66Mhz) */ 12720c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ); 127395d67482SBill Paul 127495d67482SBill Paul return (0); 127595d67482SBill Paul } 127695d67482SBill Paul 127795d67482SBill Paul static int 12783f74909aSGleb Smirnoff bge_blockinit(struct bge_softc *sc) 127995d67482SBill Paul { 128095d67482SBill Paul struct bge_rcb *rcb; 1281e907febfSPyun YongHyeon bus_size_t vrcb; 1282e907febfSPyun YongHyeon bge_hostaddr taddr; 12836f8718a3SScott Long uint32_t val; 128495d67482SBill Paul int i; 128595d67482SBill Paul 128695d67482SBill Paul /* 128795d67482SBill Paul * Initialize the memory window pointer register so that 128895d67482SBill Paul * we can access the first 32K of internal NIC RAM. This will 128995d67482SBill Paul * allow us to set up the TX send ring RCBs and the RX return 129095d67482SBill Paul * ring RCBs, plus other things which live in NIC memory. 129195d67482SBill Paul */ 129295d67482SBill Paul CSR_WRITE_4(sc, BGE_PCI_MEMWIN_BASEADDR, 0); 129395d67482SBill Paul 1294822f63fcSBill Paul /* Note: the BCM5704 has a smaller mbuf space than other chips. */ 1295822f63fcSBill Paul 12967ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 129795d67482SBill Paul /* Configure mbuf memory pool */ 12980dae9719SJung-uk Kim CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_BASEADDR, BGE_BUFFPOOL_1); 1299822f63fcSBill Paul if (sc->bge_asicrev == BGE_ASICREV_BCM5704) 1300822f63fcSBill Paul CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x10000); 1301822f63fcSBill Paul else 130295d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_LEN, 0x18000); 130395d67482SBill Paul 130495d67482SBill Paul /* Configure DMA resource pool */ 13050434d1b8SBill Paul CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_BASEADDR, 13060434d1b8SBill Paul BGE_DMA_DESCRIPTORS); 130795d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LEN, 0x2000); 13080434d1b8SBill Paul } 130995d67482SBill Paul 131095d67482SBill Paul /* Configure mbuf pool watermarks */ 13117ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 13120434d1b8SBill Paul CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x0); 13130434d1b8SBill Paul CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x10); 13140434d1b8SBill Paul } else { 1315fa228020SPaul Saab CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_READDMA_LOWAT, 0x50); 1316fa228020SPaul Saab CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_MACRX_LOWAT, 0x20); 13170434d1b8SBill Paul } 1318fa228020SPaul Saab CSR_WRITE_4(sc, BGE_BMAN_MBUFPOOL_HIWAT, 0x60); 131995d67482SBill Paul 132095d67482SBill Paul /* Configure DMA resource watermarks */ 132195d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_LOWAT, 5); 132295d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_DMA_DESCPOOL_HIWAT, 10); 132395d67482SBill Paul 132495d67482SBill Paul /* Enable buffer manager */ 13257ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 132695d67482SBill Paul CSR_WRITE_4(sc, BGE_BMAN_MODE, 132795d67482SBill Paul BGE_BMANMODE_ENABLE | BGE_BMANMODE_LOMBUF_ATTN); 132895d67482SBill Paul 132995d67482SBill Paul /* Poll for buffer manager start indication */ 133095d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 1331d5d23857SJung-uk Kim DELAY(10); 13320c8aa4eaSJung-uk Kim if (CSR_READ_4(sc, BGE_BMAN_MODE) & BGE_BMANMODE_ENABLE) 133395d67482SBill Paul break; 133495d67482SBill Paul } 133595d67482SBill Paul 133695d67482SBill Paul if (i == BGE_TIMEOUT) { 1337fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 1338fe806fdaSPyun YongHyeon "buffer manager failed to start\n"); 133995d67482SBill Paul return (ENXIO); 134095d67482SBill Paul } 13410434d1b8SBill Paul } 134295d67482SBill Paul 134395d67482SBill Paul /* Enable flow-through queues */ 13440c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF); 134595d67482SBill Paul CSR_WRITE_4(sc, BGE_FTQ_RESET, 0); 134695d67482SBill Paul 134795d67482SBill Paul /* Wait until queue initialization is complete */ 134895d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 1349d5d23857SJung-uk Kim DELAY(10); 135095d67482SBill Paul if (CSR_READ_4(sc, BGE_FTQ_RESET) == 0) 135195d67482SBill Paul break; 135295d67482SBill Paul } 135395d67482SBill Paul 135495d67482SBill Paul if (i == BGE_TIMEOUT) { 1355fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "flow-through queue init failed\n"); 135695d67482SBill Paul return (ENXIO); 135795d67482SBill Paul } 135895d67482SBill Paul 135995d67482SBill Paul /* Initialize the standard RX ring control block */ 1360f41ac2beSBill Paul rcb = &sc->bge_ldata.bge_info.bge_std_rx_rcb; 1361f41ac2beSBill Paul rcb->bge_hostaddr.bge_addr_lo = 1362f41ac2beSBill Paul BGE_ADDR_LO(sc->bge_ldata.bge_rx_std_ring_paddr); 1363f41ac2beSBill Paul rcb->bge_hostaddr.bge_addr_hi = 1364f41ac2beSBill Paul BGE_ADDR_HI(sc->bge_ldata.bge_rx_std_ring_paddr); 1365f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag, 1366f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREREAD); 13677ee00338SJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 13680434d1b8SBill Paul rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(512, 0); 13690434d1b8SBill Paul else 13700434d1b8SBill Paul rcb->bge_maxlen_flags = 13710434d1b8SBill Paul BGE_RCB_MAXLEN_FLAGS(BGE_MAX_FRAMELEN, 0); 137295d67482SBill Paul rcb->bge_nicaddr = BGE_STD_RX_RINGS; 13730c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_HI, rcb->bge_hostaddr.bge_addr_hi); 13740c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_RX_STD_RCB_HADDR_LO, rcb->bge_hostaddr.bge_addr_lo); 1375f41ac2beSBill Paul 137667111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_STD_RCB_MAXLEN_FLAGS, rcb->bge_maxlen_flags); 137767111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_STD_RCB_NICADDR, rcb->bge_nicaddr); 137895d67482SBill Paul 137995d67482SBill Paul /* 138095d67482SBill Paul * Initialize the jumbo RX ring control block 138195d67482SBill Paul * We set the 'ring disabled' bit in the flags 138295d67482SBill Paul * field until we're actually ready to start 138395d67482SBill Paul * using this ring (i.e. once we set the MTU 138495d67482SBill Paul * high enough to require it). 138595d67482SBill Paul */ 13864c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc)) { 1387f41ac2beSBill Paul rcb = &sc->bge_ldata.bge_info.bge_jumbo_rx_rcb; 1388f41ac2beSBill Paul 1389f41ac2beSBill Paul rcb->bge_hostaddr.bge_addr_lo = 1390f41ac2beSBill Paul BGE_ADDR_LO(sc->bge_ldata.bge_rx_jumbo_ring_paddr); 1391f41ac2beSBill Paul rcb->bge_hostaddr.bge_addr_hi = 1392f41ac2beSBill Paul BGE_ADDR_HI(sc->bge_ldata.bge_rx_jumbo_ring_paddr); 1393f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag, 1394f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_ring_map, 1395f41ac2beSBill Paul BUS_DMASYNC_PREREAD); 13961be6acb7SGleb Smirnoff rcb->bge_maxlen_flags = BGE_RCB_MAXLEN_FLAGS(0, 13971be6acb7SGleb Smirnoff BGE_RCB_FLAG_USE_EXT_RX_BD | BGE_RCB_FLAG_RING_DISABLED); 139895d67482SBill Paul rcb->bge_nicaddr = BGE_JUMBO_RX_RINGS; 139967111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_HI, 140067111612SJohn Polstra rcb->bge_hostaddr.bge_addr_hi); 140167111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_HADDR_LO, 140267111612SJohn Polstra rcb->bge_hostaddr.bge_addr_lo); 1403f41ac2beSBill Paul 14040434d1b8SBill Paul CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_MAXLEN_FLAGS, 14050434d1b8SBill Paul rcb->bge_maxlen_flags); 140667111612SJohn Polstra CSR_WRITE_4(sc, BGE_RX_JUMBO_RCB_NICADDR, rcb->bge_nicaddr); 140795d67482SBill Paul 140895d67482SBill Paul /* Set up dummy disabled mini ring RCB */ 1409f41ac2beSBill Paul rcb = &sc->bge_ldata.bge_info.bge_mini_rx_rcb; 141067111612SJohn Polstra rcb->bge_maxlen_flags = 141167111612SJohn Polstra BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED); 14120434d1b8SBill Paul CSR_WRITE_4(sc, BGE_RX_MINI_RCB_MAXLEN_FLAGS, 14130434d1b8SBill Paul rcb->bge_maxlen_flags); 14140434d1b8SBill Paul } 141595d67482SBill Paul 141695d67482SBill Paul /* 141795d67482SBill Paul * Set the BD ring replentish thresholds. The recommended 141895d67482SBill Paul * values are 1/8th the number of descriptors allocated to 141995d67482SBill Paul * each ring. 14209ba784dbSScott Long * XXX The 5754 requires a lower threshold, so it might be a 14219ba784dbSScott Long * requirement of all 575x family chips. The Linux driver sets 14229ba784dbSScott Long * the lower threshold for all 5705 family chips as well, but there 14239ba784dbSScott Long * are reports that it might not need to be so strict. 142495d67482SBill Paul */ 14255345bad0SScott Long if (BGE_IS_5705_PLUS(sc)) 14266f8718a3SScott Long val = 8; 14276f8718a3SScott Long else 14286f8718a3SScott Long val = BGE_STD_RX_RING_CNT / 8; 14296f8718a3SScott Long CSR_WRITE_4(sc, BGE_RBDI_STD_REPL_THRESH, val); 143095d67482SBill Paul CSR_WRITE_4(sc, BGE_RBDI_JUMBO_REPL_THRESH, BGE_JUMBO_RX_RING_CNT/8); 143195d67482SBill Paul 143295d67482SBill Paul /* 143395d67482SBill Paul * Disable all unused send rings by setting the 'ring disabled' 143495d67482SBill Paul * bit in the flags field of all the TX send ring control blocks. 143595d67482SBill Paul * These are located in NIC memory. 143695d67482SBill Paul */ 1437e907febfSPyun YongHyeon vrcb = BGE_MEMWIN_START + BGE_SEND_RING_RCB; 143895d67482SBill Paul for (i = 0; i < BGE_TX_RINGS_EXTSSRAM_MAX; i++) { 1439e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_maxlen_flags, 1440e907febfSPyun YongHyeon BGE_RCB_MAXLEN_FLAGS(0, BGE_RCB_FLAG_RING_DISABLED)); 1441e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_nicaddr, 0); 1442e907febfSPyun YongHyeon vrcb += sizeof(struct bge_rcb); 144395d67482SBill Paul } 144495d67482SBill Paul 144595d67482SBill Paul /* Configure TX RCB 0 (we use only the first ring) */ 1446e907febfSPyun YongHyeon vrcb = BGE_MEMWIN_START + BGE_SEND_RING_RCB; 1447e907febfSPyun YongHyeon BGE_HOSTADDR(taddr, sc->bge_ldata.bge_tx_ring_paddr); 1448e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_hi, taddr.bge_addr_hi); 1449e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_lo, taddr.bge_addr_lo); 1450e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_nicaddr, 1451e907febfSPyun YongHyeon BGE_NIC_TXRING_ADDR(0, BGE_TX_RING_CNT)); 14527ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 1453e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_maxlen_flags, 1454e907febfSPyun YongHyeon BGE_RCB_MAXLEN_FLAGS(BGE_TX_RING_CNT, 0)); 145595d67482SBill Paul 145695d67482SBill Paul /* Disable all unused RX return rings */ 1457e907febfSPyun YongHyeon vrcb = BGE_MEMWIN_START + BGE_RX_RETURN_RING_RCB; 145895d67482SBill Paul for (i = 0; i < BGE_RX_RINGS_MAX; i++) { 1459e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_hi, 0); 1460e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_lo, 0); 1461e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_maxlen_flags, 14620434d1b8SBill Paul BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt, 1463e907febfSPyun YongHyeon BGE_RCB_FLAG_RING_DISABLED)); 1464e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_nicaddr, 0); 146595d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO + 14663f74909aSGleb Smirnoff (i * (sizeof(uint64_t))), 0); 1467e907febfSPyun YongHyeon vrcb += sizeof(struct bge_rcb); 146895d67482SBill Paul } 146995d67482SBill Paul 147095d67482SBill Paul /* Initialize RX ring indexes */ 147195d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, 0); 147295d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, 0); 147395d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_MINI_PROD_LO, 0); 147495d67482SBill Paul 147595d67482SBill Paul /* 147695d67482SBill Paul * Set up RX return ring 0 147795d67482SBill Paul * Note that the NIC address for RX return rings is 0x00000000. 147895d67482SBill Paul * The return rings live entirely within the host, so the 147995d67482SBill Paul * nicaddr field in the RCB isn't used. 148095d67482SBill Paul */ 1481e907febfSPyun YongHyeon vrcb = BGE_MEMWIN_START + BGE_RX_RETURN_RING_RCB; 1482e907febfSPyun YongHyeon BGE_HOSTADDR(taddr, sc->bge_ldata.bge_rx_return_ring_paddr); 1483e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_hi, taddr.bge_addr_hi); 1484e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_hostaddr.bge_addr_lo, taddr.bge_addr_lo); 1485e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_nicaddr, 0x00000000); 1486e907febfSPyun YongHyeon RCB_WRITE_4(sc, vrcb, bge_maxlen_flags, 1487e907febfSPyun YongHyeon BGE_RCB_MAXLEN_FLAGS(sc->bge_return_ring_cnt, 0)); 148895d67482SBill Paul 148995d67482SBill Paul /* Set random backoff seed for TX */ 149095d67482SBill Paul CSR_WRITE_4(sc, BGE_TX_RANDOM_BACKOFF, 14914a0d6638SRuslan Ermilov IF_LLADDR(sc->bge_ifp)[0] + IF_LLADDR(sc->bge_ifp)[1] + 14924a0d6638SRuslan Ermilov IF_LLADDR(sc->bge_ifp)[2] + IF_LLADDR(sc->bge_ifp)[3] + 14934a0d6638SRuslan Ermilov IF_LLADDR(sc->bge_ifp)[4] + IF_LLADDR(sc->bge_ifp)[5] + 149495d67482SBill Paul BGE_TX_BACKOFF_SEED_MASK); 149595d67482SBill Paul 149695d67482SBill Paul /* Set inter-packet gap */ 149795d67482SBill Paul CSR_WRITE_4(sc, BGE_TX_LENGTHS, 0x2620); 149895d67482SBill Paul 149995d67482SBill Paul /* 150095d67482SBill Paul * Specify which ring to use for packets that don't match 150195d67482SBill Paul * any RX rules. 150295d67482SBill Paul */ 150395d67482SBill Paul CSR_WRITE_4(sc, BGE_RX_RULES_CFG, 0x08); 150495d67482SBill Paul 150595d67482SBill Paul /* 150695d67482SBill Paul * Configure number of RX lists. One interrupt distribution 150795d67482SBill Paul * list, sixteen active lists, one bad frames class. 150895d67482SBill Paul */ 150995d67482SBill Paul CSR_WRITE_4(sc, BGE_RXLP_CFG, 0x181); 151095d67482SBill Paul 151195d67482SBill Paul /* Inialize RX list placement stats mask. */ 15120c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_RXLP_STATS_ENABLE_MASK, 0x007FFFFF); 151395d67482SBill Paul CSR_WRITE_4(sc, BGE_RXLP_STATS_CTL, 0x1); 151495d67482SBill Paul 151595d67482SBill Paul /* Disable host coalescing until we get it set up */ 151695d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_MODE, 0x00000000); 151795d67482SBill Paul 151895d67482SBill Paul /* Poll to make sure it's shut down. */ 151995d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 1520d5d23857SJung-uk Kim DELAY(10); 152195d67482SBill Paul if (!(CSR_READ_4(sc, BGE_HCC_MODE) & BGE_HCCMODE_ENABLE)) 152295d67482SBill Paul break; 152395d67482SBill Paul } 152495d67482SBill Paul 152595d67482SBill Paul if (i == BGE_TIMEOUT) { 1526fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 1527fe806fdaSPyun YongHyeon "host coalescing engine failed to idle\n"); 152895d67482SBill Paul return (ENXIO); 152995d67482SBill Paul } 153095d67482SBill Paul 153195d67482SBill Paul /* Set up host coalescing defaults */ 153295d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS, sc->bge_rx_coal_ticks); 153395d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS, sc->bge_tx_coal_ticks); 153495d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS, sc->bge_rx_max_coal_bds); 153595d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS, sc->bge_tx_max_coal_bds); 15367ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 153795d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_RX_COAL_TICKS_INT, 0); 153895d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_TX_COAL_TICKS_INT, 0); 15390434d1b8SBill Paul } 1540b64728e5SBruce Evans CSR_WRITE_4(sc, BGE_HCC_RX_MAX_COAL_BDS_INT, 1); 1541b64728e5SBruce Evans CSR_WRITE_4(sc, BGE_HCC_TX_MAX_COAL_BDS_INT, 1); 154295d67482SBill Paul 154395d67482SBill Paul /* Set up address of statistics block */ 15447ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 1545f41ac2beSBill Paul CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_HI, 1546f41ac2beSBill Paul BGE_ADDR_HI(sc->bge_ldata.bge_stats_paddr)); 154795d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATS_ADDR_LO, 1548f41ac2beSBill Paul BGE_ADDR_LO(sc->bge_ldata.bge_stats_paddr)); 15490434d1b8SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATS_BASEADDR, BGE_STATS_BLOCK); 155095d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_BASEADDR, BGE_STATUS_BLOCK); 15510434d1b8SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATS_TICKS, sc->bge_stat_ticks); 15520434d1b8SBill Paul } 15530434d1b8SBill Paul 15540434d1b8SBill Paul /* Set up address of status block */ 1555f41ac2beSBill Paul CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_HI, 1556f41ac2beSBill Paul BGE_ADDR_HI(sc->bge_ldata.bge_status_block_paddr)); 155795d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_STATUSBLK_ADDR_LO, 1558f41ac2beSBill Paul BGE_ADDR_LO(sc->bge_ldata.bge_status_block_paddr)); 1559f41ac2beSBill Paul sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx = 0; 1560f41ac2beSBill Paul sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx = 0; 156195d67482SBill Paul 156295d67482SBill Paul /* Turn on host coalescing state machine */ 156395d67482SBill Paul CSR_WRITE_4(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE); 156495d67482SBill Paul 156595d67482SBill Paul /* Turn on RX BD completion state machine and enable attentions */ 156695d67482SBill Paul CSR_WRITE_4(sc, BGE_RBDC_MODE, 156795d67482SBill Paul BGE_RBDCMODE_ENABLE | BGE_RBDCMODE_ATTN); 156895d67482SBill Paul 156995d67482SBill Paul /* Turn on RX list placement state machine */ 157095d67482SBill Paul CSR_WRITE_4(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE); 157195d67482SBill Paul 157295d67482SBill Paul /* Turn on RX list selector state machine. */ 15737ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 157495d67482SBill Paul CSR_WRITE_4(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE); 157595d67482SBill Paul 157695d67482SBill Paul /* Turn on DMA, clear stats */ 157795d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_MODE, BGE_MACMODE_TXDMA_ENB | 157895d67482SBill Paul BGE_MACMODE_RXDMA_ENB | BGE_MACMODE_RX_STATS_CLEAR | 157995d67482SBill Paul BGE_MACMODE_TX_STATS_CLEAR | BGE_MACMODE_RX_STATS_ENB | 158095d67482SBill Paul BGE_MACMODE_TX_STATS_ENB | BGE_MACMODE_FRMHDR_DMA_ENB | 1581652ae483SGleb Smirnoff ((sc->bge_flags & BGE_FLAG_TBI) ? 1582652ae483SGleb Smirnoff BGE_PORTMODE_TBI : BGE_PORTMODE_MII)); 158395d67482SBill Paul 158495d67482SBill Paul /* Set misc. local control, enable interrupts on attentions */ 158595d67482SBill Paul CSR_WRITE_4(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_ONATTN); 158695d67482SBill Paul 158795d67482SBill Paul #ifdef notdef 158895d67482SBill Paul /* Assert GPIO pins for PHY reset */ 158995d67482SBill Paul BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_MISCIO_OUT0 | 159095d67482SBill Paul BGE_MLC_MISCIO_OUT1 | BGE_MLC_MISCIO_OUT2); 159195d67482SBill Paul BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_MISCIO_OUTEN0 | 159295d67482SBill Paul BGE_MLC_MISCIO_OUTEN1 | BGE_MLC_MISCIO_OUTEN2); 159395d67482SBill Paul #endif 159495d67482SBill Paul 159595d67482SBill Paul /* Turn on DMA completion state machine */ 15967ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 159795d67482SBill Paul CSR_WRITE_4(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE); 159895d67482SBill Paul 15996f8718a3SScott Long val = BGE_WDMAMODE_ENABLE | BGE_WDMAMODE_ALL_ATTNS; 16006f8718a3SScott Long 16016f8718a3SScott Long /* Enable host coalescing bug fix. */ 16026f8718a3SScott Long if (sc->bge_asicrev == BGE_ASICREV_BCM5755 || 16036f8718a3SScott Long sc->bge_asicrev == BGE_ASICREV_BCM5787) 16040c8aa4eaSJung-uk Kim val |= 1 << 29; 16056f8718a3SScott Long 160695d67482SBill Paul /* Turn on write DMA state machine */ 16076f8718a3SScott Long CSR_WRITE_4(sc, BGE_WDMA_MODE, val); 160895d67482SBill Paul 160995d67482SBill Paul /* Turn on read DMA state machine */ 161095d67482SBill Paul CSR_WRITE_4(sc, BGE_RDMA_MODE, 161195d67482SBill Paul BGE_RDMAMODE_ENABLE | BGE_RDMAMODE_ALL_ATTNS); 161295d67482SBill Paul 161395d67482SBill Paul /* Turn on RX data completion state machine */ 161495d67482SBill Paul CSR_WRITE_4(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE); 161595d67482SBill Paul 161695d67482SBill Paul /* Turn on RX BD initiator state machine */ 161795d67482SBill Paul CSR_WRITE_4(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE); 161895d67482SBill Paul 161995d67482SBill Paul /* Turn on RX data and RX BD initiator state machine */ 162095d67482SBill Paul CSR_WRITE_4(sc, BGE_RDBDI_MODE, BGE_RDBDIMODE_ENABLE); 162195d67482SBill Paul 162295d67482SBill Paul /* Turn on Mbuf cluster free state machine */ 16237ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 162495d67482SBill Paul CSR_WRITE_4(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE); 162595d67482SBill Paul 162695d67482SBill Paul /* Turn on send BD completion state machine */ 162795d67482SBill Paul CSR_WRITE_4(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE); 162895d67482SBill Paul 162995d67482SBill Paul /* Turn on send data completion state machine */ 163095d67482SBill Paul CSR_WRITE_4(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE); 163195d67482SBill Paul 163295d67482SBill Paul /* Turn on send data initiator state machine */ 163395d67482SBill Paul CSR_WRITE_4(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE); 163495d67482SBill Paul 163595d67482SBill Paul /* Turn on send BD initiator state machine */ 163695d67482SBill Paul CSR_WRITE_4(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE); 163795d67482SBill Paul 163895d67482SBill Paul /* Turn on send BD selector state machine */ 163995d67482SBill Paul CSR_WRITE_4(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE); 164095d67482SBill Paul 16410c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_SDI_STATS_ENABLE_MASK, 0x007FFFFF); 164295d67482SBill Paul CSR_WRITE_4(sc, BGE_SDI_STATS_CTL, 164395d67482SBill Paul BGE_SDISTATSCTL_ENABLE | BGE_SDISTATSCTL_FASTER); 164495d67482SBill Paul 164595d67482SBill Paul /* ack/clear link change events */ 164695d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED | 16470434d1b8SBill Paul BGE_MACSTAT_CFG_CHANGED | BGE_MACSTAT_MI_COMPLETE | 16480434d1b8SBill Paul BGE_MACSTAT_LINK_CHANGED); 1649f41ac2beSBill Paul CSR_WRITE_4(sc, BGE_MI_STS, 0); 165095d67482SBill Paul 165195d67482SBill Paul /* Enable PHY auto polling (for MII/GMII only) */ 1652652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 165395d67482SBill Paul CSR_WRITE_4(sc, BGE_MI_STS, BGE_MISTS_LINK); 1654a1d52896SBill Paul } else { 16556098821cSJung-uk Kim BGE_SETBIT(sc, BGE_MI_MODE, BGE_MIMODE_AUTOPOLL | (10 << 16)); 16561f313773SOleg Bulyzhin if (sc->bge_asicrev == BGE_ASICREV_BCM5700 && 16574c0da0ffSGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5700_B2) 1658a1d52896SBill Paul CSR_WRITE_4(sc, BGE_MAC_EVT_ENB, 1659a1d52896SBill Paul BGE_EVTENB_MI_INTERRUPT); 1660a1d52896SBill Paul } 166195d67482SBill Paul 16621f313773SOleg Bulyzhin /* 16631f313773SOleg Bulyzhin * Clear any pending link state attention. 16641f313773SOleg Bulyzhin * Otherwise some link state change events may be lost until attention 16651f313773SOleg Bulyzhin * is cleared by bge_intr() -> bge_link_upd() sequence. 16661f313773SOleg Bulyzhin * It's not necessary on newer BCM chips - perhaps enabling link 16671f313773SOleg Bulyzhin * state change attentions implies clearing pending attention. 16681f313773SOleg Bulyzhin */ 16691f313773SOleg Bulyzhin CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED | 16701f313773SOleg Bulyzhin BGE_MACSTAT_CFG_CHANGED | BGE_MACSTAT_MI_COMPLETE | 16711f313773SOleg Bulyzhin BGE_MACSTAT_LINK_CHANGED); 16721f313773SOleg Bulyzhin 167395d67482SBill Paul /* Enable link state change attentions. */ 167495d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_EVT_ENB, BGE_EVTENB_LINK_CHANGED); 167595d67482SBill Paul 167695d67482SBill Paul return (0); 167795d67482SBill Paul } 167895d67482SBill Paul 16794c0da0ffSGleb Smirnoff const struct bge_revision * 16804c0da0ffSGleb Smirnoff bge_lookup_rev(uint32_t chipid) 16814c0da0ffSGleb Smirnoff { 16824c0da0ffSGleb Smirnoff const struct bge_revision *br; 16834c0da0ffSGleb Smirnoff 16844c0da0ffSGleb Smirnoff for (br = bge_revisions; br->br_name != NULL; br++) { 16854c0da0ffSGleb Smirnoff if (br->br_chipid == chipid) 16864c0da0ffSGleb Smirnoff return (br); 16874c0da0ffSGleb Smirnoff } 16884c0da0ffSGleb Smirnoff 16894c0da0ffSGleb Smirnoff for (br = bge_majorrevs; br->br_name != NULL; br++) { 16904c0da0ffSGleb Smirnoff if (br->br_chipid == BGE_ASICREV(chipid)) 16914c0da0ffSGleb Smirnoff return (br); 16924c0da0ffSGleb Smirnoff } 16934c0da0ffSGleb Smirnoff 16944c0da0ffSGleb Smirnoff return (NULL); 16954c0da0ffSGleb Smirnoff } 16964c0da0ffSGleb Smirnoff 16974c0da0ffSGleb Smirnoff const struct bge_vendor * 16984c0da0ffSGleb Smirnoff bge_lookup_vendor(uint16_t vid) 16994c0da0ffSGleb Smirnoff { 17004c0da0ffSGleb Smirnoff const struct bge_vendor *v; 17014c0da0ffSGleb Smirnoff 17024c0da0ffSGleb Smirnoff for (v = bge_vendors; v->v_name != NULL; v++) 17034c0da0ffSGleb Smirnoff if (v->v_id == vid) 17044c0da0ffSGleb Smirnoff return (v); 17054c0da0ffSGleb Smirnoff 17064c0da0ffSGleb Smirnoff panic("%s: unknown vendor %d", __func__, vid); 17074c0da0ffSGleb Smirnoff return (NULL); 17084c0da0ffSGleb Smirnoff } 17094c0da0ffSGleb Smirnoff 171095d67482SBill Paul /* 171195d67482SBill Paul * Probe for a Broadcom chip. Check the PCI vendor and device IDs 17124c0da0ffSGleb Smirnoff * against our list and return its name if we find a match. 17134c0da0ffSGleb Smirnoff * 17144c0da0ffSGleb Smirnoff * Note that since the Broadcom controller contains VPD support, we 17157c929cf9SJung-uk Kim * try to get the device name string from the controller itself instead 17167c929cf9SJung-uk Kim * of the compiled-in string. It guarantees we'll always announce the 17177c929cf9SJung-uk Kim * right product name. We fall back to the compiled-in string when 17187c929cf9SJung-uk Kim * VPD is unavailable or corrupt. 171995d67482SBill Paul */ 172095d67482SBill Paul static int 17213f74909aSGleb Smirnoff bge_probe(device_t dev) 172295d67482SBill Paul { 17234c0da0ffSGleb Smirnoff struct bge_type *t = bge_devs; 17244c0da0ffSGleb Smirnoff struct bge_softc *sc = device_get_softc(dev); 17257c929cf9SJung-uk Kim uint16_t vid, did; 172695d67482SBill Paul 172795d67482SBill Paul sc->bge_dev = dev; 17287c929cf9SJung-uk Kim vid = pci_get_vendor(dev); 17297c929cf9SJung-uk Kim did = pci_get_device(dev); 17304c0da0ffSGleb Smirnoff while(t->bge_vid != 0) { 17317c929cf9SJung-uk Kim if ((vid == t->bge_vid) && (did == t->bge_did)) { 17327c929cf9SJung-uk Kim char model[64], buf[96]; 17334c0da0ffSGleb Smirnoff const struct bge_revision *br; 17344c0da0ffSGleb Smirnoff const struct bge_vendor *v; 17354c0da0ffSGleb Smirnoff uint32_t id; 17364c0da0ffSGleb Smirnoff 17374c0da0ffSGleb Smirnoff id = pci_read_config(dev, BGE_PCI_MISC_CTL, 4) & 17384c0da0ffSGleb Smirnoff BGE_PCIMISCCTL_ASICREV; 17394c0da0ffSGleb Smirnoff br = bge_lookup_rev(id); 17407c929cf9SJung-uk Kim v = bge_lookup_vendor(vid); 17414e35d186SJung-uk Kim { 17424e35d186SJung-uk Kim #if __FreeBSD_version > 700024 17434e35d186SJung-uk Kim const char *pname; 17444e35d186SJung-uk Kim 17454e35d186SJung-uk Kim if (pci_get_vpd_ident(dev, &pname) == 0) 17464e35d186SJung-uk Kim snprintf(model, 64, "%s", pname); 17474e35d186SJung-uk Kim else 17484e35d186SJung-uk Kim #endif 17497c929cf9SJung-uk Kim snprintf(model, 64, "%s %s", 17507c929cf9SJung-uk Kim v->v_name, 17517c929cf9SJung-uk Kim br != NULL ? br->br_name : 17527c929cf9SJung-uk Kim "NetXtreme Ethernet Controller"); 17534e35d186SJung-uk Kim } 17547c929cf9SJung-uk Kim snprintf(buf, 96, "%s, %sASIC rev. %#04x", model, 17557c929cf9SJung-uk Kim br != NULL ? "" : "unknown ", id >> 16); 17564c0da0ffSGleb Smirnoff device_set_desc_copy(dev, buf); 17576d2a9bd6SDoug Ambrisko if (pci_get_subvendor(dev) == DELL_VENDORID) 17585ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_NO_3LED; 175908bf8bb7SJung-uk Kim if (did == BCOM_DEVICEID_BCM5755M) 176008bf8bb7SJung-uk Kim sc->bge_flags |= BGE_FLAG_ADJUST_TRIM; 176195d67482SBill Paul return (0); 176295d67482SBill Paul } 176395d67482SBill Paul t++; 176495d67482SBill Paul } 176595d67482SBill Paul 176695d67482SBill Paul return (ENXIO); 176795d67482SBill Paul } 176895d67482SBill Paul 1769f41ac2beSBill Paul static void 17703f74909aSGleb Smirnoff bge_dma_free(struct bge_softc *sc) 1771f41ac2beSBill Paul { 1772f41ac2beSBill Paul int i; 1773f41ac2beSBill Paul 17743f74909aSGleb Smirnoff /* Destroy DMA maps for RX buffers. */ 1775f41ac2beSBill Paul for (i = 0; i < BGE_STD_RX_RING_CNT; i++) { 1776f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_std_dmamap[i]) 1777f41ac2beSBill Paul bus_dmamap_destroy(sc->bge_cdata.bge_mtag, 1778f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[i]); 1779f41ac2beSBill Paul } 1780f41ac2beSBill Paul 17813f74909aSGleb Smirnoff /* Destroy DMA maps for jumbo RX buffers. */ 1782f41ac2beSBill Paul for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 1783f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_jumbo_dmamap[i]) 1784f41ac2beSBill Paul bus_dmamap_destroy(sc->bge_cdata.bge_mtag_jumbo, 1785f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[i]); 1786f41ac2beSBill Paul } 1787f41ac2beSBill Paul 17883f74909aSGleb Smirnoff /* Destroy DMA maps for TX buffers. */ 1789f41ac2beSBill Paul for (i = 0; i < BGE_TX_RING_CNT; i++) { 1790f41ac2beSBill Paul if (sc->bge_cdata.bge_tx_dmamap[i]) 1791f41ac2beSBill Paul bus_dmamap_destroy(sc->bge_cdata.bge_mtag, 1792f41ac2beSBill Paul sc->bge_cdata.bge_tx_dmamap[i]); 1793f41ac2beSBill Paul } 1794f41ac2beSBill Paul 1795f41ac2beSBill Paul if (sc->bge_cdata.bge_mtag) 1796f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_mtag); 1797f41ac2beSBill Paul 1798f41ac2beSBill Paul 17993f74909aSGleb Smirnoff /* Destroy standard RX ring. */ 1800e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_std_ring_map) 1801e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_rx_std_ring_tag, 1802e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_std_ring_map); 1803e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_std_ring_map && sc->bge_ldata.bge_rx_std_ring) 1804f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_rx_std_ring_tag, 1805f41ac2beSBill Paul sc->bge_ldata.bge_rx_std_ring, 1806f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map); 1807f41ac2beSBill Paul 1808f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_std_ring_tag) 1809f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_rx_std_ring_tag); 1810f41ac2beSBill Paul 18113f74909aSGleb Smirnoff /* Destroy jumbo RX ring. */ 1812e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_jumbo_ring_map) 1813e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_rx_jumbo_ring_tag, 1814e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_jumbo_ring_map); 1815e65bed95SPyun YongHyeon 1816e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_jumbo_ring_map && 1817e65bed95SPyun YongHyeon sc->bge_ldata.bge_rx_jumbo_ring) 1818f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_rx_jumbo_ring_tag, 1819f41ac2beSBill Paul sc->bge_ldata.bge_rx_jumbo_ring, 1820f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_ring_map); 1821f41ac2beSBill Paul 1822f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_jumbo_ring_tag) 1823f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_rx_jumbo_ring_tag); 1824f41ac2beSBill Paul 18253f74909aSGleb Smirnoff /* Destroy RX return ring. */ 1826e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_return_ring_map) 1827e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_rx_return_ring_tag, 1828e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_return_ring_map); 1829e65bed95SPyun YongHyeon 1830e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_rx_return_ring_map && 1831e65bed95SPyun YongHyeon sc->bge_ldata.bge_rx_return_ring) 1832f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_rx_return_ring_tag, 1833f41ac2beSBill Paul sc->bge_ldata.bge_rx_return_ring, 1834f41ac2beSBill Paul sc->bge_cdata.bge_rx_return_ring_map); 1835f41ac2beSBill Paul 1836f41ac2beSBill Paul if (sc->bge_cdata.bge_rx_return_ring_tag) 1837f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_rx_return_ring_tag); 1838f41ac2beSBill Paul 18393f74909aSGleb Smirnoff /* Destroy TX ring. */ 1840e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_tx_ring_map) 1841e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_tx_ring_tag, 1842e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_ring_map); 1843e65bed95SPyun YongHyeon 1844e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_tx_ring_map && sc->bge_ldata.bge_tx_ring) 1845f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_tx_ring_tag, 1846f41ac2beSBill Paul sc->bge_ldata.bge_tx_ring, 1847f41ac2beSBill Paul sc->bge_cdata.bge_tx_ring_map); 1848f41ac2beSBill Paul 1849f41ac2beSBill Paul if (sc->bge_cdata.bge_tx_ring_tag) 1850f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_tx_ring_tag); 1851f41ac2beSBill Paul 18523f74909aSGleb Smirnoff /* Destroy status block. */ 1853e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_status_map) 1854e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_status_tag, 1855e65bed95SPyun YongHyeon sc->bge_cdata.bge_status_map); 1856e65bed95SPyun YongHyeon 1857e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_status_map && sc->bge_ldata.bge_status_block) 1858f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_status_tag, 1859f41ac2beSBill Paul sc->bge_ldata.bge_status_block, 1860f41ac2beSBill Paul sc->bge_cdata.bge_status_map); 1861f41ac2beSBill Paul 1862f41ac2beSBill Paul if (sc->bge_cdata.bge_status_tag) 1863f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_status_tag); 1864f41ac2beSBill Paul 18653f74909aSGleb Smirnoff /* Destroy statistics block. */ 1866e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_stats_map) 1867e65bed95SPyun YongHyeon bus_dmamap_unload(sc->bge_cdata.bge_stats_tag, 1868e65bed95SPyun YongHyeon sc->bge_cdata.bge_stats_map); 1869e65bed95SPyun YongHyeon 1870e65bed95SPyun YongHyeon if (sc->bge_cdata.bge_stats_map && sc->bge_ldata.bge_stats) 1871f41ac2beSBill Paul bus_dmamem_free(sc->bge_cdata.bge_stats_tag, 1872f41ac2beSBill Paul sc->bge_ldata.bge_stats, 1873f41ac2beSBill Paul sc->bge_cdata.bge_stats_map); 1874f41ac2beSBill Paul 1875f41ac2beSBill Paul if (sc->bge_cdata.bge_stats_tag) 1876f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_stats_tag); 1877f41ac2beSBill Paul 18783f74909aSGleb Smirnoff /* Destroy the parent tag. */ 1879f41ac2beSBill Paul if (sc->bge_cdata.bge_parent_tag) 1880f41ac2beSBill Paul bus_dma_tag_destroy(sc->bge_cdata.bge_parent_tag); 1881f41ac2beSBill Paul } 1882f41ac2beSBill Paul 1883f41ac2beSBill Paul static int 18843f74909aSGleb Smirnoff bge_dma_alloc(device_t dev) 1885f41ac2beSBill Paul { 18863f74909aSGleb Smirnoff struct bge_dmamap_arg ctx; 1887f41ac2beSBill Paul struct bge_softc *sc; 18881be6acb7SGleb Smirnoff int i, error; 1889f41ac2beSBill Paul 1890f41ac2beSBill Paul sc = device_get_softc(dev); 1891f41ac2beSBill Paul 1892f41ac2beSBill Paul /* 1893f41ac2beSBill Paul * Allocate the parent bus DMA tag appropriate for PCI. 1894f41ac2beSBill Paul */ 1895378f231eSJohn-Mark Gurney error = bus_dma_tag_create(bus_get_dma_tag(sc->bge_dev), /* parent */ 1896706620f0SScott Long 1, 0, /* alignment, boundary */ 1897f41ac2beSBill Paul BUS_SPACE_MAXADDR, /* lowaddr */ 18982f28b973SScott Long BUS_SPACE_MAXADDR, /* highaddr */ 1899f41ac2beSBill Paul NULL, NULL, /* filter, filterarg */ 1900f41ac2beSBill Paul MAXBSIZE, BGE_NSEG_NEW, /* maxsize, nsegments */ 1901f41ac2beSBill Paul BUS_SPACE_MAXSIZE_32BIT, /* maxsegsize */ 19028a40c10eSScott Long 0, /* flags */ 1903f41ac2beSBill Paul NULL, NULL, /* lockfunc, lockarg */ 1904f41ac2beSBill Paul &sc->bge_cdata.bge_parent_tag); 1905f41ac2beSBill Paul 1906e65bed95SPyun YongHyeon if (error != 0) { 1907fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 1908fe806fdaSPyun YongHyeon "could not allocate parent dma tag\n"); 1909e65bed95SPyun YongHyeon return (ENOMEM); 1910e65bed95SPyun YongHyeon } 1911e65bed95SPyun YongHyeon 1912f41ac2beSBill Paul /* 1913f41ac2beSBill Paul * Create tag for RX mbufs. 1914f41ac2beSBill Paul */ 19158a2e22deSScott Long error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 1, 1916f41ac2beSBill Paul 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 19171be6acb7SGleb Smirnoff NULL, MCLBYTES * BGE_NSEG_NEW, BGE_NSEG_NEW, MCLBYTES, 19181be6acb7SGleb Smirnoff BUS_DMA_ALLOCNOW, NULL, NULL, &sc->bge_cdata.bge_mtag); 1919f41ac2beSBill Paul 1920f41ac2beSBill Paul if (error) { 1921fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 1922f41ac2beSBill Paul return (ENOMEM); 1923f41ac2beSBill Paul } 1924f41ac2beSBill Paul 19253f74909aSGleb Smirnoff /* Create DMA maps for RX buffers. */ 1926f41ac2beSBill Paul for (i = 0; i < BGE_STD_RX_RING_CNT; i++) { 1927f41ac2beSBill Paul error = bus_dmamap_create(sc->bge_cdata.bge_mtag, 0, 1928f41ac2beSBill Paul &sc->bge_cdata.bge_rx_std_dmamap[i]); 1929f41ac2beSBill Paul if (error) { 1930fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 1931fe806fdaSPyun YongHyeon "can't create DMA map for RX\n"); 1932f41ac2beSBill Paul return (ENOMEM); 1933f41ac2beSBill Paul } 1934f41ac2beSBill Paul } 1935f41ac2beSBill Paul 19363f74909aSGleb Smirnoff /* Create DMA maps for TX buffers. */ 1937f41ac2beSBill Paul for (i = 0; i < BGE_TX_RING_CNT; i++) { 1938f41ac2beSBill Paul error = bus_dmamap_create(sc->bge_cdata.bge_mtag, 0, 1939f41ac2beSBill Paul &sc->bge_cdata.bge_tx_dmamap[i]); 1940f41ac2beSBill Paul if (error) { 1941fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 1942fe806fdaSPyun YongHyeon "can't create DMA map for RX\n"); 1943f41ac2beSBill Paul return (ENOMEM); 1944f41ac2beSBill Paul } 1945f41ac2beSBill Paul } 1946f41ac2beSBill Paul 19473f74909aSGleb Smirnoff /* Create tag for standard RX ring. */ 1948f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 1949f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 1950f41ac2beSBill Paul NULL, BGE_STD_RX_RING_SZ, 1, BGE_STD_RX_RING_SZ, 0, 1951f41ac2beSBill Paul NULL, NULL, &sc->bge_cdata.bge_rx_std_ring_tag); 1952f41ac2beSBill Paul 1953f41ac2beSBill Paul if (error) { 1954fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 1955f41ac2beSBill Paul return (ENOMEM); 1956f41ac2beSBill Paul } 1957f41ac2beSBill Paul 19583f74909aSGleb Smirnoff /* Allocate DMA'able memory for standard RX ring. */ 1959f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_std_ring_tag, 1960f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_rx_std_ring, BUS_DMA_NOWAIT, 1961f41ac2beSBill Paul &sc->bge_cdata.bge_rx_std_ring_map); 1962f41ac2beSBill Paul if (error) 1963f41ac2beSBill Paul return (ENOMEM); 1964f41ac2beSBill Paul 1965f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_rx_std_ring, BGE_STD_RX_RING_SZ); 1966f41ac2beSBill Paul 19673f74909aSGleb Smirnoff /* Load the address of the standard RX ring. */ 1968f41ac2beSBill Paul ctx.bge_maxsegs = 1; 1969f41ac2beSBill Paul ctx.sc = sc; 1970f41ac2beSBill Paul 1971f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_rx_std_ring_tag, 1972f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map, sc->bge_ldata.bge_rx_std_ring, 1973f41ac2beSBill Paul BGE_STD_RX_RING_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 1974f41ac2beSBill Paul 1975f41ac2beSBill Paul if (error) 1976f41ac2beSBill Paul return (ENOMEM); 1977f41ac2beSBill Paul 1978f41ac2beSBill Paul sc->bge_ldata.bge_rx_std_ring_paddr = ctx.bge_busaddr; 1979f41ac2beSBill Paul 19803f74909aSGleb Smirnoff /* Create tags for jumbo mbufs. */ 19814c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc)) { 1982f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 19838a2e22deSScott Long 1, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 19841be6acb7SGleb Smirnoff NULL, MJUM9BYTES, BGE_NSEG_JUMBO, PAGE_SIZE, 19851be6acb7SGleb Smirnoff 0, NULL, NULL, &sc->bge_cdata.bge_mtag_jumbo); 1986f41ac2beSBill Paul if (error) { 1987fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 19883f74909aSGleb Smirnoff "could not allocate jumbo dma tag\n"); 1989f41ac2beSBill Paul return (ENOMEM); 1990f41ac2beSBill Paul } 1991f41ac2beSBill Paul 19923f74909aSGleb Smirnoff /* Create tag for jumbo RX ring. */ 1993f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 1994f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 1995f41ac2beSBill Paul NULL, BGE_JUMBO_RX_RING_SZ, 1, BGE_JUMBO_RX_RING_SZ, 0, 1996f41ac2beSBill Paul NULL, NULL, &sc->bge_cdata.bge_rx_jumbo_ring_tag); 1997f41ac2beSBill Paul 1998f41ac2beSBill Paul if (error) { 1999fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 20003f74909aSGleb Smirnoff "could not allocate jumbo ring dma tag\n"); 2001f41ac2beSBill Paul return (ENOMEM); 2002f41ac2beSBill Paul } 2003f41ac2beSBill Paul 20043f74909aSGleb Smirnoff /* Allocate DMA'able memory for jumbo RX ring. */ 2005f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_jumbo_ring_tag, 20061be6acb7SGleb Smirnoff (void **)&sc->bge_ldata.bge_rx_jumbo_ring, 20071be6acb7SGleb Smirnoff BUS_DMA_NOWAIT | BUS_DMA_ZERO, 2008f41ac2beSBill Paul &sc->bge_cdata.bge_rx_jumbo_ring_map); 2009f41ac2beSBill Paul if (error) 2010f41ac2beSBill Paul return (ENOMEM); 2011f41ac2beSBill Paul 20123f74909aSGleb Smirnoff /* Load the address of the jumbo RX ring. */ 2013f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2014f41ac2beSBill Paul ctx.sc = sc; 2015f41ac2beSBill Paul 2016f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_rx_jumbo_ring_tag, 2017f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_ring_map, 2018f41ac2beSBill Paul sc->bge_ldata.bge_rx_jumbo_ring, BGE_JUMBO_RX_RING_SZ, 2019f41ac2beSBill Paul bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2020f41ac2beSBill Paul 2021f41ac2beSBill Paul if (error) 2022f41ac2beSBill Paul return (ENOMEM); 2023f41ac2beSBill Paul 2024f41ac2beSBill Paul sc->bge_ldata.bge_rx_jumbo_ring_paddr = ctx.bge_busaddr; 2025f41ac2beSBill Paul 20263f74909aSGleb Smirnoff /* Create DMA maps for jumbo RX buffers. */ 2027f41ac2beSBill Paul for (i = 0; i < BGE_JUMBO_RX_RING_CNT; i++) { 2028f41ac2beSBill Paul error = bus_dmamap_create(sc->bge_cdata.bge_mtag_jumbo, 2029f41ac2beSBill Paul 0, &sc->bge_cdata.bge_rx_jumbo_dmamap[i]); 2030f41ac2beSBill Paul if (error) { 2031fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 20323f74909aSGleb Smirnoff "can't create DMA map for jumbo RX\n"); 2033f41ac2beSBill Paul return (ENOMEM); 2034f41ac2beSBill Paul } 2035f41ac2beSBill Paul } 2036f41ac2beSBill Paul 2037f41ac2beSBill Paul } 2038f41ac2beSBill Paul 20393f74909aSGleb Smirnoff /* Create tag for RX return ring. */ 2040f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2041f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2042f41ac2beSBill Paul NULL, BGE_RX_RTN_RING_SZ(sc), 1, BGE_RX_RTN_RING_SZ(sc), 0, 2043f41ac2beSBill Paul NULL, NULL, &sc->bge_cdata.bge_rx_return_ring_tag); 2044f41ac2beSBill Paul 2045f41ac2beSBill Paul if (error) { 2046fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2047f41ac2beSBill Paul return (ENOMEM); 2048f41ac2beSBill Paul } 2049f41ac2beSBill Paul 20503f74909aSGleb Smirnoff /* Allocate DMA'able memory for RX return ring. */ 2051f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_rx_return_ring_tag, 2052f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_rx_return_ring, BUS_DMA_NOWAIT, 2053f41ac2beSBill Paul &sc->bge_cdata.bge_rx_return_ring_map); 2054f41ac2beSBill Paul if (error) 2055f41ac2beSBill Paul return (ENOMEM); 2056f41ac2beSBill Paul 2057f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_rx_return_ring, 2058f41ac2beSBill Paul BGE_RX_RTN_RING_SZ(sc)); 2059f41ac2beSBill Paul 20603f74909aSGleb Smirnoff /* Load the address of the RX return ring. */ 2061f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2062f41ac2beSBill Paul ctx.sc = sc; 2063f41ac2beSBill Paul 2064f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_rx_return_ring_tag, 2065f41ac2beSBill Paul sc->bge_cdata.bge_rx_return_ring_map, 2066f41ac2beSBill Paul sc->bge_ldata.bge_rx_return_ring, BGE_RX_RTN_RING_SZ(sc), 2067f41ac2beSBill Paul bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2068f41ac2beSBill Paul 2069f41ac2beSBill Paul if (error) 2070f41ac2beSBill Paul return (ENOMEM); 2071f41ac2beSBill Paul 2072f41ac2beSBill Paul sc->bge_ldata.bge_rx_return_ring_paddr = ctx.bge_busaddr; 2073f41ac2beSBill Paul 20743f74909aSGleb Smirnoff /* Create tag for TX ring. */ 2075f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2076f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2077f41ac2beSBill Paul NULL, BGE_TX_RING_SZ, 1, BGE_TX_RING_SZ, 0, NULL, NULL, 2078f41ac2beSBill Paul &sc->bge_cdata.bge_tx_ring_tag); 2079f41ac2beSBill Paul 2080f41ac2beSBill Paul if (error) { 2081fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2082f41ac2beSBill Paul return (ENOMEM); 2083f41ac2beSBill Paul } 2084f41ac2beSBill Paul 20853f74909aSGleb Smirnoff /* Allocate DMA'able memory for TX ring. */ 2086f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_tx_ring_tag, 2087f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_tx_ring, BUS_DMA_NOWAIT, 2088f41ac2beSBill Paul &sc->bge_cdata.bge_tx_ring_map); 2089f41ac2beSBill Paul if (error) 2090f41ac2beSBill Paul return (ENOMEM); 2091f41ac2beSBill Paul 2092f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_tx_ring, BGE_TX_RING_SZ); 2093f41ac2beSBill Paul 20943f74909aSGleb Smirnoff /* Load the address of the TX ring. */ 2095f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2096f41ac2beSBill Paul ctx.sc = sc; 2097f41ac2beSBill Paul 2098f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_tx_ring_tag, 2099f41ac2beSBill Paul sc->bge_cdata.bge_tx_ring_map, sc->bge_ldata.bge_tx_ring, 2100f41ac2beSBill Paul BGE_TX_RING_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2101f41ac2beSBill Paul 2102f41ac2beSBill Paul if (error) 2103f41ac2beSBill Paul return (ENOMEM); 2104f41ac2beSBill Paul 2105f41ac2beSBill Paul sc->bge_ldata.bge_tx_ring_paddr = ctx.bge_busaddr; 2106f41ac2beSBill Paul 21073f74909aSGleb Smirnoff /* Create tag for status block. */ 2108f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2109f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2110f41ac2beSBill Paul NULL, BGE_STATUS_BLK_SZ, 1, BGE_STATUS_BLK_SZ, 0, 2111f41ac2beSBill Paul NULL, NULL, &sc->bge_cdata.bge_status_tag); 2112f41ac2beSBill Paul 2113f41ac2beSBill Paul if (error) { 2114fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2115f41ac2beSBill Paul return (ENOMEM); 2116f41ac2beSBill Paul } 2117f41ac2beSBill Paul 21183f74909aSGleb Smirnoff /* Allocate DMA'able memory for status block. */ 2119f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_status_tag, 2120f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_status_block, BUS_DMA_NOWAIT, 2121f41ac2beSBill Paul &sc->bge_cdata.bge_status_map); 2122f41ac2beSBill Paul if (error) 2123f41ac2beSBill Paul return (ENOMEM); 2124f41ac2beSBill Paul 2125f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_status_block, BGE_STATUS_BLK_SZ); 2126f41ac2beSBill Paul 21273f74909aSGleb Smirnoff /* Load the address of the status block. */ 2128f41ac2beSBill Paul ctx.sc = sc; 2129f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2130f41ac2beSBill Paul 2131f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_status_tag, 2132f41ac2beSBill Paul sc->bge_cdata.bge_status_map, sc->bge_ldata.bge_status_block, 2133f41ac2beSBill Paul BGE_STATUS_BLK_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2134f41ac2beSBill Paul 2135f41ac2beSBill Paul if (error) 2136f41ac2beSBill Paul return (ENOMEM); 2137f41ac2beSBill Paul 2138f41ac2beSBill Paul sc->bge_ldata.bge_status_block_paddr = ctx.bge_busaddr; 2139f41ac2beSBill Paul 21403f74909aSGleb Smirnoff /* Create tag for statistics block. */ 2141f41ac2beSBill Paul error = bus_dma_tag_create(sc->bge_cdata.bge_parent_tag, 2142f41ac2beSBill Paul PAGE_SIZE, 0, BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR, NULL, 2143f41ac2beSBill Paul NULL, BGE_STATS_SZ, 1, BGE_STATS_SZ, 0, NULL, NULL, 2144f41ac2beSBill Paul &sc->bge_cdata.bge_stats_tag); 2145f41ac2beSBill Paul 2146f41ac2beSBill Paul if (error) { 2147fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "could not allocate dma tag\n"); 2148f41ac2beSBill Paul return (ENOMEM); 2149f41ac2beSBill Paul } 2150f41ac2beSBill Paul 21513f74909aSGleb Smirnoff /* Allocate DMA'able memory for statistics block. */ 2152f41ac2beSBill Paul error = bus_dmamem_alloc(sc->bge_cdata.bge_stats_tag, 2153f41ac2beSBill Paul (void **)&sc->bge_ldata.bge_stats, BUS_DMA_NOWAIT, 2154f41ac2beSBill Paul &sc->bge_cdata.bge_stats_map); 2155f41ac2beSBill Paul if (error) 2156f41ac2beSBill Paul return (ENOMEM); 2157f41ac2beSBill Paul 2158f41ac2beSBill Paul bzero((char *)sc->bge_ldata.bge_stats, BGE_STATS_SZ); 2159f41ac2beSBill Paul 21603f74909aSGleb Smirnoff /* Load the address of the statstics block. */ 2161f41ac2beSBill Paul ctx.sc = sc; 2162f41ac2beSBill Paul ctx.bge_maxsegs = 1; 2163f41ac2beSBill Paul 2164f41ac2beSBill Paul error = bus_dmamap_load(sc->bge_cdata.bge_stats_tag, 2165f41ac2beSBill Paul sc->bge_cdata.bge_stats_map, sc->bge_ldata.bge_stats, 2166f41ac2beSBill Paul BGE_STATS_SZ, bge_dma_map_addr, &ctx, BUS_DMA_NOWAIT); 2167f41ac2beSBill Paul 2168f41ac2beSBill Paul if (error) 2169f41ac2beSBill Paul return (ENOMEM); 2170f41ac2beSBill Paul 2171f41ac2beSBill Paul sc->bge_ldata.bge_stats_paddr = ctx.bge_busaddr; 2172f41ac2beSBill Paul 2173f41ac2beSBill Paul return (0); 2174f41ac2beSBill Paul } 2175f41ac2beSBill Paul 21760a55a034SJung-uk Kim #if __FreeBSD_version > 602105 2177bf6ef57aSJohn Polstra /* 2178bf6ef57aSJohn Polstra * Return true if this device has more than one port. 2179bf6ef57aSJohn Polstra */ 2180bf6ef57aSJohn Polstra static int 2181bf6ef57aSJohn Polstra bge_has_multiple_ports(struct bge_softc *sc) 2182bf6ef57aSJohn Polstra { 2183bf6ef57aSJohn Polstra device_t dev = sc->bge_dev; 218455aaf894SMarius Strobl u_int b, d, f, fscan, s; 2185bf6ef57aSJohn Polstra 218655aaf894SMarius Strobl d = pci_get_domain(dev); 2187bf6ef57aSJohn Polstra b = pci_get_bus(dev); 2188bf6ef57aSJohn Polstra s = pci_get_slot(dev); 2189bf6ef57aSJohn Polstra f = pci_get_function(dev); 2190bf6ef57aSJohn Polstra for (fscan = 0; fscan <= PCI_FUNCMAX; fscan++) 219155aaf894SMarius Strobl if (fscan != f && pci_find_dbsf(d, b, s, fscan) != NULL) 2192bf6ef57aSJohn Polstra return (1); 2193bf6ef57aSJohn Polstra return (0); 2194bf6ef57aSJohn Polstra } 2195bf6ef57aSJohn Polstra 2196bf6ef57aSJohn Polstra /* 2197bf6ef57aSJohn Polstra * Return true if MSI can be used with this device. 2198bf6ef57aSJohn Polstra */ 2199bf6ef57aSJohn Polstra static int 2200bf6ef57aSJohn Polstra bge_can_use_msi(struct bge_softc *sc) 2201bf6ef57aSJohn Polstra { 2202bf6ef57aSJohn Polstra int can_use_msi = 0; 2203bf6ef57aSJohn Polstra 2204bf6ef57aSJohn Polstra switch (sc->bge_asicrev) { 2205bf6ef57aSJohn Polstra case BGE_ASICREV_BCM5714: 2206bf6ef57aSJohn Polstra /* 2207bf6ef57aSJohn Polstra * Apparently, MSI doesn't work when this chip is configured 2208bf6ef57aSJohn Polstra * in single-port mode. 2209bf6ef57aSJohn Polstra */ 2210bf6ef57aSJohn Polstra if (bge_has_multiple_ports(sc)) 2211bf6ef57aSJohn Polstra can_use_msi = 1; 2212bf6ef57aSJohn Polstra break; 2213bf6ef57aSJohn Polstra case BGE_ASICREV_BCM5750: 2214bf6ef57aSJohn Polstra if (sc->bge_chiprev != BGE_CHIPREV_5750_AX && 2215bf6ef57aSJohn Polstra sc->bge_chiprev != BGE_CHIPREV_5750_BX) 2216bf6ef57aSJohn Polstra can_use_msi = 1; 2217bf6ef57aSJohn Polstra break; 2218bf6ef57aSJohn Polstra case BGE_ASICREV_BCM5752: 2219bf6ef57aSJohn Polstra case BGE_ASICREV_BCM5780: 2220bf6ef57aSJohn Polstra can_use_msi = 1; 2221bf6ef57aSJohn Polstra break; 2222bf6ef57aSJohn Polstra } 2223bf6ef57aSJohn Polstra return (can_use_msi); 2224bf6ef57aSJohn Polstra } 22254e35d186SJung-uk Kim #endif 2226bf6ef57aSJohn Polstra 222795d67482SBill Paul static int 22283f74909aSGleb Smirnoff bge_attach(device_t dev) 222995d67482SBill Paul { 223095d67482SBill Paul struct ifnet *ifp; 223195d67482SBill Paul struct bge_softc *sc; 22323f74909aSGleb Smirnoff uint32_t hwcfg = 0; 22333f74909aSGleb Smirnoff uint32_t mac_tmp = 0; 223408013fd3SMarius Strobl u_char eaddr[ETHER_ADDR_LEN]; 223508013fd3SMarius Strobl int error, reg, rid, trys; 223695d67482SBill Paul 223795d67482SBill Paul sc = device_get_softc(dev); 223895d67482SBill Paul sc->bge_dev = dev; 223995d67482SBill Paul 224095d67482SBill Paul /* 224195d67482SBill Paul * Map control/status registers. 224295d67482SBill Paul */ 224395d67482SBill Paul pci_enable_busmaster(dev); 224495d67482SBill Paul 224595d67482SBill Paul rid = BGE_PCI_BAR0; 22465f96beb9SNate Lawson sc->bge_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, 22475f96beb9SNate Lawson RF_ACTIVE | PCI_RF_DENSE); 224895d67482SBill Paul 224995d67482SBill Paul if (sc->bge_res == NULL) { 2250fe806fdaSPyun YongHyeon device_printf (sc->bge_dev, "couldn't map memory\n"); 225195d67482SBill Paul error = ENXIO; 225295d67482SBill Paul goto fail; 225395d67482SBill Paul } 225495d67482SBill Paul 225595d67482SBill Paul sc->bge_btag = rman_get_bustag(sc->bge_res); 225695d67482SBill Paul sc->bge_bhandle = rman_get_bushandle(sc->bge_res); 225795d67482SBill Paul 2258e53d81eeSPaul Saab /* Save ASIC rev. */ 2259e53d81eeSPaul Saab 2260e53d81eeSPaul Saab sc->bge_chipid = 2261e53d81eeSPaul Saab pci_read_config(dev, BGE_PCI_MISC_CTL, 4) & 2262e53d81eeSPaul Saab BGE_PCIMISCCTL_ASICREV; 2263e53d81eeSPaul Saab sc->bge_asicrev = BGE_ASICREV(sc->bge_chipid); 2264e53d81eeSPaul Saab sc->bge_chiprev = BGE_CHIPREV(sc->bge_chipid); 2265e53d81eeSPaul Saab 226608013fd3SMarius Strobl if (bge_has_eeprom(sc)) 226708013fd3SMarius Strobl sc->bge_flags |= BGE_FLAG_EEPROM; 226808013fd3SMarius Strobl 22690dae9719SJung-uk Kim /* Save chipset family. */ 22700dae9719SJung-uk Kim switch (sc->bge_asicrev) { 22710dae9719SJung-uk Kim case BGE_ASICREV_BCM5700: 22720dae9719SJung-uk Kim case BGE_ASICREV_BCM5701: 22730dae9719SJung-uk Kim case BGE_ASICREV_BCM5703: 22740dae9719SJung-uk Kim case BGE_ASICREV_BCM5704: 22757ee00338SJung-uk Kim sc->bge_flags |= BGE_FLAG_5700_FAMILY | BGE_FLAG_JUMBO; 22760dae9719SJung-uk Kim break; 22770dae9719SJung-uk Kim case BGE_ASICREV_BCM5714_A0: 22780dae9719SJung-uk Kim case BGE_ASICREV_BCM5780: 22790dae9719SJung-uk Kim case BGE_ASICREV_BCM5714: 22807ee00338SJung-uk Kim sc->bge_flags |= BGE_FLAG_5714_FAMILY /* | BGE_FLAG_JUMBO */; 22815ee49a3aSJung-uk Kim /* FALLTHRU */ 22820dae9719SJung-uk Kim case BGE_ASICREV_BCM5750: 22830dae9719SJung-uk Kim case BGE_ASICREV_BCM5752: 22840dae9719SJung-uk Kim case BGE_ASICREV_BCM5755: 22850dae9719SJung-uk Kim case BGE_ASICREV_BCM5787: 22860dae9719SJung-uk Kim sc->bge_flags |= BGE_FLAG_575X_PLUS; 22875ee49a3aSJung-uk Kim /* FALLTHRU */ 22880dae9719SJung-uk Kim case BGE_ASICREV_BCM5705: 22890dae9719SJung-uk Kim sc->bge_flags |= BGE_FLAG_5705_PLUS; 22900dae9719SJung-uk Kim break; 22910dae9719SJung-uk Kim } 22920dae9719SJung-uk Kim 22935ee49a3aSJung-uk Kim /* Set various bug flags. */ 22941ec4c3a8SJung-uk Kim if (sc->bge_chipid == BGE_CHIPID_BCM5701_A0 || 22951ec4c3a8SJung-uk Kim sc->bge_chipid == BGE_CHIPID_BCM5701_B0) 22961ec4c3a8SJung-uk Kim sc->bge_flags |= BGE_FLAG_CRC_BUG; 22975ee49a3aSJung-uk Kim if (sc->bge_chiprev == BGE_CHIPREV_5703_AX || 22985ee49a3aSJung-uk Kim sc->bge_chiprev == BGE_CHIPREV_5704_AX) 22995ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_ADC_BUG; 23005ee49a3aSJung-uk Kim if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0) 23015ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_5704_A0_BUG; 230208bf8bb7SJung-uk Kim if (BGE_IS_5705_PLUS(sc) && 230308bf8bb7SJung-uk Kim !(sc->bge_flags & BGE_FLAG_ADJUST_TRIM)) { 23045ee49a3aSJung-uk Kim if (sc->bge_asicrev == BGE_ASICREV_BCM5755 || 23055ee49a3aSJung-uk Kim sc->bge_asicrev == BGE_ASICREV_BCM5787) 23065ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_JITTER_BUG; 23075ee49a3aSJung-uk Kim else 23085ee49a3aSJung-uk Kim sc->bge_flags |= BGE_FLAG_BER_BUG; 23095ee49a3aSJung-uk Kim } 23105ee49a3aSJung-uk Kim 2311e53d81eeSPaul Saab /* 23126f8718a3SScott Long * Check if this is a PCI-X or PCI Express device. 2313e53d81eeSPaul Saab */ 2314fe09b799SJung-uk Kim #if __FreeBSD_version > 602101 23156f8718a3SScott Long if (pci_find_extcap(dev, PCIY_EXPRESS, ®) == 0) { 23164c0da0ffSGleb Smirnoff /* 23176f8718a3SScott Long * Found a PCI Express capabilities register, this 23186f8718a3SScott Long * must be a PCI Express device. 23196f8718a3SScott Long */ 23206f8718a3SScott Long if (reg != 0) 23216f8718a3SScott Long sc->bge_flags |= BGE_FLAG_PCIE; 23226f8718a3SScott Long } else if (pci_find_extcap(dev, PCIY_PCIX, ®) == 0) { 23236f8718a3SScott Long if (reg != 0) 23246f8718a3SScott Long sc->bge_flags |= BGE_FLAG_PCIX; 23256f8718a3SScott Long } 23266f8718a3SScott Long 23276f8718a3SScott Long #else 23285345bad0SScott Long if (BGE_IS_5705_PLUS(sc)) { 23296f8718a3SScott Long reg = pci_read_config(dev, BGE_PCIE_CAPID_REG, 4); 23300c8aa4eaSJung-uk Kim if ((reg & 0xFF) == BGE_PCIE_CAPID) 23316f8718a3SScott Long sc->bge_flags |= BGE_FLAG_PCIE; 23326f8718a3SScott Long } else { 23336f8718a3SScott Long /* 23346f8718a3SScott Long * Check if the device is in PCI-X Mode. 23356f8718a3SScott Long * (This bit is not valid on PCI Express controllers.) 23364c0da0ffSGleb Smirnoff */ 23374c0da0ffSGleb Smirnoff if ((pci_read_config(sc->bge_dev, BGE_PCI_PCISTATE, 4) & 23384c0da0ffSGleb Smirnoff BGE_PCISTATE_PCI_BUSMODE) == 0) 2339652ae483SGleb Smirnoff sc->bge_flags |= BGE_FLAG_PCIX; 23406f8718a3SScott Long } 23416f8718a3SScott Long #endif 23424c0da0ffSGleb Smirnoff 23430a55a034SJung-uk Kim #if __FreeBSD_version > 602105 23444e35d186SJung-uk Kim { 23454e35d186SJung-uk Kim int msicount; 23464e35d186SJung-uk Kim 2347bf6ef57aSJohn Polstra /* 2348bf6ef57aSJohn Polstra * Allocate the interrupt, using MSI if possible. These devices 2349bf6ef57aSJohn Polstra * support 8 MSI messages, but only the first one is used in 2350bf6ef57aSJohn Polstra * normal operation. 2351bf6ef57aSJohn Polstra */ 2352bf6ef57aSJohn Polstra if (bge_can_use_msi(sc)) { 2353bf6ef57aSJohn Polstra msicount = pci_msi_count(dev); 2354bf6ef57aSJohn Polstra if (msicount > 1) 2355bf6ef57aSJohn Polstra msicount = 1; 2356bf6ef57aSJohn Polstra } else 2357bf6ef57aSJohn Polstra msicount = 0; 2358bf6ef57aSJohn Polstra if (msicount == 1 && pci_alloc_msi(dev, &msicount) == 0) { 2359bf6ef57aSJohn Polstra rid = 1; 2360bf6ef57aSJohn Polstra sc->bge_flags |= BGE_FLAG_MSI; 2361bf6ef57aSJohn Polstra } else 2362bf6ef57aSJohn Polstra rid = 0; 23634e35d186SJung-uk Kim } 23644e35d186SJung-uk Kim #else 23654e35d186SJung-uk Kim rid = 0; 23664e35d186SJung-uk Kim #endif 2367bf6ef57aSJohn Polstra 2368bf6ef57aSJohn Polstra sc->bge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 2369bf6ef57aSJohn Polstra RF_SHAREABLE | RF_ACTIVE); 2370bf6ef57aSJohn Polstra 2371bf6ef57aSJohn Polstra if (sc->bge_irq == NULL) { 2372bf6ef57aSJohn Polstra device_printf(sc->bge_dev, "couldn't map interrupt\n"); 2373bf6ef57aSJohn Polstra error = ENXIO; 2374bf6ef57aSJohn Polstra goto fail; 2375bf6ef57aSJohn Polstra } 2376bf6ef57aSJohn Polstra 2377bf6ef57aSJohn Polstra BGE_LOCK_INIT(sc, device_get_nameunit(dev)); 2378bf6ef57aSJohn Polstra 237995d67482SBill Paul /* Try to reset the chip. */ 23808cb1383cSDoug Ambrisko if (bge_reset(sc)) { 23818cb1383cSDoug Ambrisko device_printf(sc->bge_dev, "chip reset failed\n"); 23828cb1383cSDoug Ambrisko error = ENXIO; 23838cb1383cSDoug Ambrisko goto fail; 23848cb1383cSDoug Ambrisko } 23858cb1383cSDoug Ambrisko 23868cb1383cSDoug Ambrisko sc->bge_asf_mode = 0; 2387f1a7e6d5SScott Long if (bge_allow_asf && (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) 2388f1a7e6d5SScott Long == BGE_MAGIC_NUMBER)) { 23898cb1383cSDoug Ambrisko if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG) 23908cb1383cSDoug Ambrisko & BGE_HWCFG_ASF) { 23918cb1383cSDoug Ambrisko sc->bge_asf_mode |= ASF_ENABLE; 23928cb1383cSDoug Ambrisko sc->bge_asf_mode |= ASF_STACKUP; 23938cb1383cSDoug Ambrisko if (sc->bge_asicrev == BGE_ASICREV_BCM5750) { 23948cb1383cSDoug Ambrisko sc->bge_asf_mode |= ASF_NEW_HANDSHAKE; 23958cb1383cSDoug Ambrisko } 23968cb1383cSDoug Ambrisko } 23978cb1383cSDoug Ambrisko } 23988cb1383cSDoug Ambrisko 23998cb1383cSDoug Ambrisko /* Try to reset the chip again the nice way. */ 24008cb1383cSDoug Ambrisko bge_stop_fw(sc); 24018cb1383cSDoug Ambrisko bge_sig_pre_reset(sc, BGE_RESET_STOP); 24028cb1383cSDoug Ambrisko if (bge_reset(sc)) { 24038cb1383cSDoug Ambrisko device_printf(sc->bge_dev, "chip reset failed\n"); 24048cb1383cSDoug Ambrisko error = ENXIO; 24058cb1383cSDoug Ambrisko goto fail; 24068cb1383cSDoug Ambrisko } 24078cb1383cSDoug Ambrisko 24088cb1383cSDoug Ambrisko bge_sig_legacy(sc, BGE_RESET_STOP); 24098cb1383cSDoug Ambrisko bge_sig_post_reset(sc, BGE_RESET_STOP); 241095d67482SBill Paul 241195d67482SBill Paul if (bge_chipinit(sc)) { 2412fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "chip initialization failed\n"); 241395d67482SBill Paul error = ENXIO; 241495d67482SBill Paul goto fail; 241595d67482SBill Paul } 241695d67482SBill Paul 241708013fd3SMarius Strobl #ifdef __sparc64__ 241808013fd3SMarius Strobl if ((sc->bge_flags & BGE_FLAG_EEPROM) == 0) 241908013fd3SMarius Strobl OF_getetheraddr(dev, eaddr); 242008013fd3SMarius Strobl else 242108013fd3SMarius Strobl #endif 242208013fd3SMarius Strobl { 24230c8aa4eaSJung-uk Kim mac_tmp = bge_readmem_ind(sc, 0x0C14); 24240c8aa4eaSJung-uk Kim if ((mac_tmp >> 16) == 0x484B) { 2425fc74a9f9SBrooks Davis eaddr[0] = (u_char)(mac_tmp >> 8); 2426fc74a9f9SBrooks Davis eaddr[1] = (u_char)mac_tmp; 24270c8aa4eaSJung-uk Kim mac_tmp = bge_readmem_ind(sc, 0x0C18); 2428fc74a9f9SBrooks Davis eaddr[2] = (u_char)(mac_tmp >> 24); 2429fc74a9f9SBrooks Davis eaddr[3] = (u_char)(mac_tmp >> 16); 2430fc74a9f9SBrooks Davis eaddr[4] = (u_char)(mac_tmp >> 8); 2431fc74a9f9SBrooks Davis eaddr[5] = (u_char)mac_tmp; 2432fc74a9f9SBrooks Davis } else if (bge_read_eeprom(sc, eaddr, 243395d67482SBill Paul BGE_EE_MAC_OFFSET + 2, ETHER_ADDR_LEN)) { 243408013fd3SMarius Strobl device_printf(sc->bge_dev, 243508013fd3SMarius Strobl "failed to read station address\n"); 243695d67482SBill Paul error = ENXIO; 243795d67482SBill Paul goto fail; 243895d67482SBill Paul } 243908013fd3SMarius Strobl } 244095d67482SBill Paul 2441f41ac2beSBill Paul /* 5705 limits RX return ring to 512 entries. */ 24427ee00338SJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 2443f41ac2beSBill Paul sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT_5705; 2444f41ac2beSBill Paul else 2445f41ac2beSBill Paul sc->bge_return_ring_cnt = BGE_RETURN_RING_CNT; 2446f41ac2beSBill Paul 2447f41ac2beSBill Paul if (bge_dma_alloc(dev)) { 2448fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, 2449fe806fdaSPyun YongHyeon "failed to allocate DMA resources\n"); 2450f41ac2beSBill Paul error = ENXIO; 2451f41ac2beSBill Paul goto fail; 2452f41ac2beSBill Paul } 2453f41ac2beSBill Paul 245495d67482SBill Paul /* Set default tuneable values. */ 245595d67482SBill Paul sc->bge_stat_ticks = BGE_TICKS_PER_SEC; 245695d67482SBill Paul sc->bge_rx_coal_ticks = 150; 245795d67482SBill Paul sc->bge_tx_coal_ticks = 150; 24586f8718a3SScott Long sc->bge_rx_max_coal_bds = 10; 24596f8718a3SScott Long sc->bge_tx_max_coal_bds = 10; 246095d67482SBill Paul 246195d67482SBill Paul /* Set up ifnet structure */ 2462fc74a9f9SBrooks Davis ifp = sc->bge_ifp = if_alloc(IFT_ETHER); 2463fc74a9f9SBrooks Davis if (ifp == NULL) { 2464fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "failed to if_alloc()\n"); 2465fc74a9f9SBrooks Davis error = ENXIO; 2466fc74a9f9SBrooks Davis goto fail; 2467fc74a9f9SBrooks Davis } 246895d67482SBill Paul ifp->if_softc = sc; 24699bf40edeSBrooks Davis if_initname(ifp, device_get_name(dev), device_get_unit(dev)); 247095d67482SBill Paul ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 247195d67482SBill Paul ifp->if_ioctl = bge_ioctl; 247295d67482SBill Paul ifp->if_start = bge_start; 247395d67482SBill Paul ifp->if_init = bge_init; 247495d67482SBill Paul ifp->if_mtu = ETHERMTU; 24754d665c4dSDag-Erling Smørgrav ifp->if_snd.ifq_drv_maxlen = BGE_TX_RING_CNT - 1; 24764d665c4dSDag-Erling Smørgrav IFQ_SET_MAXLEN(&ifp->if_snd, ifp->if_snd.ifq_drv_maxlen); 24774d665c4dSDag-Erling Smørgrav IFQ_SET_READY(&ifp->if_snd); 247895d67482SBill Paul ifp->if_hwassist = BGE_CSUM_FEATURES; 2479d375e524SGleb Smirnoff ifp->if_capabilities = IFCAP_HWCSUM | IFCAP_VLAN_HWTAGGING | 24804e35d186SJung-uk Kim IFCAP_VLAN_MTU; 24814e35d186SJung-uk Kim #ifdef IFCAP_VLAN_HWCSUM 24824e35d186SJung-uk Kim ifp->if_capabilities |= IFCAP_VLAN_HWCSUM; 24834e35d186SJung-uk Kim #endif 248495d67482SBill Paul ifp->if_capenable = ifp->if_capabilities; 248575719184SGleb Smirnoff #ifdef DEVICE_POLLING 248675719184SGleb Smirnoff ifp->if_capabilities |= IFCAP_POLLING; 248775719184SGleb Smirnoff #endif 248895d67482SBill Paul 2489a1d52896SBill Paul /* 2490d375e524SGleb Smirnoff * 5700 B0 chips do not support checksumming correctly due 2491d375e524SGleb Smirnoff * to hardware bugs. 2492d375e524SGleb Smirnoff */ 2493d375e524SGleb Smirnoff if (sc->bge_chipid == BGE_CHIPID_BCM5700_B0) { 2494d375e524SGleb Smirnoff ifp->if_capabilities &= ~IFCAP_HWCSUM; 2495d375e524SGleb Smirnoff ifp->if_capenable &= IFCAP_HWCSUM; 2496d375e524SGleb Smirnoff ifp->if_hwassist = 0; 2497d375e524SGleb Smirnoff } 2498d375e524SGleb Smirnoff 2499d375e524SGleb Smirnoff /* 2500a1d52896SBill Paul * Figure out what sort of media we have by checking the 250141abcc1bSPaul Saab * hardware config word in the first 32k of NIC internal memory, 250241abcc1bSPaul Saab * or fall back to examining the EEPROM if necessary. 250341abcc1bSPaul Saab * Note: on some BCM5700 cards, this value appears to be unset. 250441abcc1bSPaul Saab * If that's the case, we have to rely on identifying the NIC 250541abcc1bSPaul Saab * by its PCI subsystem ID, as we do below for the SysKonnect 250641abcc1bSPaul Saab * SK-9D41. 2507a1d52896SBill Paul */ 250841abcc1bSPaul Saab if (bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_SIG) == BGE_MAGIC_NUMBER) 250941abcc1bSPaul Saab hwcfg = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM_NICCFG); 251008013fd3SMarius Strobl else if (sc->bge_flags & BGE_FLAG_EEPROM) { 2511f6789fbaSPyun YongHyeon if (bge_read_eeprom(sc, (caddr_t)&hwcfg, BGE_EE_HWCFG_OFFSET, 2512f6789fbaSPyun YongHyeon sizeof(hwcfg))) { 2513fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "failed to read EEPROM\n"); 2514f6789fbaSPyun YongHyeon error = ENXIO; 2515f6789fbaSPyun YongHyeon goto fail; 2516f6789fbaSPyun YongHyeon } 251741abcc1bSPaul Saab hwcfg = ntohl(hwcfg); 251841abcc1bSPaul Saab } 251941abcc1bSPaul Saab 252041abcc1bSPaul Saab if ((hwcfg & BGE_HWCFG_MEDIA) == BGE_MEDIA_FIBER) 2521652ae483SGleb Smirnoff sc->bge_flags |= BGE_FLAG_TBI; 2522a1d52896SBill Paul 252395d67482SBill Paul /* The SysKonnect SK-9D41 is a 1000baseSX card. */ 25240c8aa4eaSJung-uk Kim if ((pci_read_config(dev, BGE_PCI_SUBSYS, 4) >> 16) == SK_SUBSYSID_9D41) 2525652ae483SGleb Smirnoff sc->bge_flags |= BGE_FLAG_TBI; 252695d67482SBill Paul 2527652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 25280c8aa4eaSJung-uk Kim ifmedia_init(&sc->bge_ifmedia, IFM_IMASK, bge_ifmedia_upd, 25290c8aa4eaSJung-uk Kim bge_ifmedia_sts); 25300c8aa4eaSJung-uk Kim ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_1000_SX, 0, NULL); 25316098821cSJung-uk Kim ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_1000_SX | IFM_FDX, 25326098821cSJung-uk Kim 0, NULL); 253395d67482SBill Paul ifmedia_add(&sc->bge_ifmedia, IFM_ETHER | IFM_AUTO, 0, NULL); 253495d67482SBill Paul ifmedia_set(&sc->bge_ifmedia, IFM_ETHER | IFM_AUTO); 2535da3003f0SBill Paul sc->bge_ifmedia.ifm_media = sc->bge_ifmedia.ifm_cur->ifm_media; 253695d67482SBill Paul } else { 253795d67482SBill Paul /* 25388cb1383cSDoug Ambrisko * Do transceiver setup and tell the firmware the 25398cb1383cSDoug Ambrisko * driver is down so we can try to get access the 25408cb1383cSDoug Ambrisko * probe if ASF is running. Retry a couple of times 25418cb1383cSDoug Ambrisko * if we get a conflict with the ASF firmware accessing 25428cb1383cSDoug Ambrisko * the PHY. 254395d67482SBill Paul */ 25448cb1383cSDoug Ambrisko BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 25458cb1383cSDoug Ambrisko again: 25468cb1383cSDoug Ambrisko bge_asf_driver_up(sc); 25478cb1383cSDoug Ambrisko 25488cb1383cSDoug Ambrisko trys = 0; 254995d67482SBill Paul if (mii_phy_probe(dev, &sc->bge_miibus, 255095d67482SBill Paul bge_ifmedia_upd, bge_ifmedia_sts)) { 25518cb1383cSDoug Ambrisko if (trys++ < 4) { 25528cb1383cSDoug Ambrisko device_printf(sc->bge_dev, "Try again\n"); 25534e35d186SJung-uk Kim bge_miibus_writereg(sc->bge_dev, 1, MII_BMCR, 25544e35d186SJung-uk Kim BMCR_RESET); 25558cb1383cSDoug Ambrisko goto again; 25568cb1383cSDoug Ambrisko } 25578cb1383cSDoug Ambrisko 2558fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "MII without any PHY!\n"); 255995d67482SBill Paul error = ENXIO; 256095d67482SBill Paul goto fail; 256195d67482SBill Paul } 25628cb1383cSDoug Ambrisko 25638cb1383cSDoug Ambrisko /* 25648cb1383cSDoug Ambrisko * Now tell the firmware we are going up after probing the PHY 25658cb1383cSDoug Ambrisko */ 25668cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) 25678cb1383cSDoug Ambrisko BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 256895d67482SBill Paul } 256995d67482SBill Paul 257095d67482SBill Paul /* 2571e255b776SJohn Polstra * When using the BCM5701 in PCI-X mode, data corruption has 2572e255b776SJohn Polstra * been observed in the first few bytes of some received packets. 2573e255b776SJohn Polstra * Aligning the packet buffer in memory eliminates the corruption. 2574e255b776SJohn Polstra * Unfortunately, this misaligns the packet payloads. On platforms 2575e255b776SJohn Polstra * which do not support unaligned accesses, we will realign the 2576e255b776SJohn Polstra * payloads by copying the received packets. 2577e255b776SJohn Polstra */ 2578652ae483SGleb Smirnoff if (sc->bge_asicrev == BGE_ASICREV_BCM5701 && 2579652ae483SGleb Smirnoff sc->bge_flags & BGE_FLAG_PCIX) 2580652ae483SGleb Smirnoff sc->bge_flags |= BGE_FLAG_RX_ALIGNBUG; 2581e255b776SJohn Polstra 2582e255b776SJohn Polstra /* 258395d67482SBill Paul * Call MI attach routine. 258495d67482SBill Paul */ 2585fc74a9f9SBrooks Davis ether_ifattach(ifp, eaddr); 2586b74e67fbSGleb Smirnoff callout_init_mtx(&sc->bge_stat_ch, &sc->bge_mtx, 0); 25870f9bd73bSSam Leffler 25880f9bd73bSSam Leffler /* 25890f9bd73bSSam Leffler * Hookup IRQ last. 25900f9bd73bSSam Leffler */ 25914e35d186SJung-uk Kim #if __FreeBSD_version > 700030 25920f9bd73bSSam Leffler error = bus_setup_intr(dev, sc->bge_irq, INTR_TYPE_NET | INTR_MPSAFE, 2593ef544f63SPaolo Pisati NULL, bge_intr, sc, &sc->bge_intrhand); 25944e35d186SJung-uk Kim #else 25954e35d186SJung-uk Kim error = bus_setup_intr(dev, sc->bge_irq, INTR_TYPE_NET | INTR_MPSAFE, 25964e35d186SJung-uk Kim bge_intr, sc, &sc->bge_intrhand); 25974e35d186SJung-uk Kim #endif 25980f9bd73bSSam Leffler 25990f9bd73bSSam Leffler if (error) { 2600fc74a9f9SBrooks Davis bge_detach(dev); 2601fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "couldn't set up irq\n"); 26020f9bd73bSSam Leffler } 260395d67482SBill Paul 26046f8718a3SScott Long bge_add_sysctls(sc); 26056f8718a3SScott Long 260608013fd3SMarius Strobl return (0); 260708013fd3SMarius Strobl 260895d67482SBill Paul fail: 260908013fd3SMarius Strobl bge_release_resources(sc); 261008013fd3SMarius Strobl 261195d67482SBill Paul return (error); 261295d67482SBill Paul } 261395d67482SBill Paul 261495d67482SBill Paul static int 26153f74909aSGleb Smirnoff bge_detach(device_t dev) 261695d67482SBill Paul { 261795d67482SBill Paul struct bge_softc *sc; 261895d67482SBill Paul struct ifnet *ifp; 261995d67482SBill Paul 262095d67482SBill Paul sc = device_get_softc(dev); 2621fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 262295d67482SBill Paul 262375719184SGleb Smirnoff #ifdef DEVICE_POLLING 262475719184SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) 262575719184SGleb Smirnoff ether_poll_deregister(ifp); 262675719184SGleb Smirnoff #endif 262775719184SGleb Smirnoff 26280f9bd73bSSam Leffler BGE_LOCK(sc); 262995d67482SBill Paul bge_stop(sc); 263095d67482SBill Paul bge_reset(sc); 26310f9bd73bSSam Leffler BGE_UNLOCK(sc); 26320f9bd73bSSam Leffler 26335dda8085SOleg Bulyzhin callout_drain(&sc->bge_stat_ch); 26345dda8085SOleg Bulyzhin 26350f9bd73bSSam Leffler ether_ifdetach(ifp); 263695d67482SBill Paul 2637652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 263895d67482SBill Paul ifmedia_removeall(&sc->bge_ifmedia); 263995d67482SBill Paul } else { 264095d67482SBill Paul bus_generic_detach(dev); 264195d67482SBill Paul device_delete_child(dev, sc->bge_miibus); 264295d67482SBill Paul } 264395d67482SBill Paul 264495d67482SBill Paul bge_release_resources(sc); 264595d67482SBill Paul 264695d67482SBill Paul return (0); 264795d67482SBill Paul } 264895d67482SBill Paul 264995d67482SBill Paul static void 26503f74909aSGleb Smirnoff bge_release_resources(struct bge_softc *sc) 265195d67482SBill Paul { 265295d67482SBill Paul device_t dev; 265395d67482SBill Paul 265495d67482SBill Paul dev = sc->bge_dev; 265595d67482SBill Paul 265695d67482SBill Paul if (sc->bge_intrhand != NULL) 265795d67482SBill Paul bus_teardown_intr(dev, sc->bge_irq, sc->bge_intrhand); 265895d67482SBill Paul 265995d67482SBill Paul if (sc->bge_irq != NULL) 2660724bd939SJohn Polstra bus_release_resource(dev, SYS_RES_IRQ, 2661724bd939SJohn Polstra sc->bge_flags & BGE_FLAG_MSI ? 1 : 0, sc->bge_irq); 2662724bd939SJohn Polstra 26630a55a034SJung-uk Kim #if __FreeBSD_version > 602105 2664724bd939SJohn Polstra if (sc->bge_flags & BGE_FLAG_MSI) 2665724bd939SJohn Polstra pci_release_msi(dev); 26664e35d186SJung-uk Kim #endif 266795d67482SBill Paul 266895d67482SBill Paul if (sc->bge_res != NULL) 266995d67482SBill Paul bus_release_resource(dev, SYS_RES_MEMORY, 267095d67482SBill Paul BGE_PCI_BAR0, sc->bge_res); 267195d67482SBill Paul 2672ad61f896SRuslan Ermilov if (sc->bge_ifp != NULL) 2673ad61f896SRuslan Ermilov if_free(sc->bge_ifp); 2674ad61f896SRuslan Ermilov 2675f41ac2beSBill Paul bge_dma_free(sc); 267695d67482SBill Paul 26770f9bd73bSSam Leffler if (mtx_initialized(&sc->bge_mtx)) /* XXX */ 26780f9bd73bSSam Leffler BGE_LOCK_DESTROY(sc); 267995d67482SBill Paul } 268095d67482SBill Paul 26818cb1383cSDoug Ambrisko static int 26823f74909aSGleb Smirnoff bge_reset(struct bge_softc *sc) 268395d67482SBill Paul { 268495d67482SBill Paul device_t dev; 26853f74909aSGleb Smirnoff uint32_t cachesize, command, pcistate, reset; 26866f8718a3SScott Long void (*write_op)(struct bge_softc *, int, int); 268795d67482SBill Paul int i, val = 0; 268895d67482SBill Paul 268995d67482SBill Paul dev = sc->bge_dev; 269095d67482SBill Paul 2691464223f7SJung-uk Kim if (BGE_IS_575X_PLUS(sc) && !BGE_IS_5714_FAMILY(sc)) { 26926f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_PCIE) 26936f8718a3SScott Long write_op = bge_writemem_direct; 26946f8718a3SScott Long else 26956f8718a3SScott Long write_op = bge_writemem_ind; 26969ba784dbSScott Long } else 26976f8718a3SScott Long write_op = bge_writereg_ind; 26986f8718a3SScott Long 269995d67482SBill Paul /* Save some important PCI state. */ 270095d67482SBill Paul cachesize = pci_read_config(dev, BGE_PCI_CACHESZ, 4); 270195d67482SBill Paul command = pci_read_config(dev, BGE_PCI_CMD, 4); 270295d67482SBill Paul pcistate = pci_read_config(dev, BGE_PCI_PCISTATE, 4); 270395d67482SBill Paul 270495d67482SBill Paul pci_write_config(dev, BGE_PCI_MISC_CTL, 270595d67482SBill Paul BGE_PCIMISCCTL_INDIRECT_ACCESS | BGE_PCIMISCCTL_MASK_PCI_INTR | 2706e907febfSPyun YongHyeon BGE_HIF_SWAP_OPTIONS | BGE_PCIMISCCTL_PCISTATE_RW, 4); 270795d67482SBill Paul 27086f8718a3SScott Long /* Disable fastboot on controllers that support it. */ 27096f8718a3SScott Long if (sc->bge_asicrev == BGE_ASICREV_BCM5752 || 27106f8718a3SScott Long sc->bge_asicrev == BGE_ASICREV_BCM5755 || 27116f8718a3SScott Long sc->bge_asicrev == BGE_ASICREV_BCM5787) { 27126f8718a3SScott Long if (bootverbose) 27139ba784dbSScott Long device_printf(sc->bge_dev, "Disabling fastboot\n"); 27146f8718a3SScott Long CSR_WRITE_4(sc, BGE_FASTBOOT_PC, 0x0); 27156f8718a3SScott Long } 27166f8718a3SScott Long 27176f8718a3SScott Long /* 27186f8718a3SScott Long * Write the magic number to SRAM at offset 0xB50. 27196f8718a3SScott Long * When firmware finishes its initialization it will 27206f8718a3SScott Long * write ~BGE_MAGIC_NUMBER to the same location. 27216f8718a3SScott Long */ 27226f8718a3SScott Long bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM, BGE_MAGIC_NUMBER); 27236f8718a3SScott Long 27240c8aa4eaSJung-uk Kim reset = BGE_MISCCFG_RESET_CORE_CLOCKS | BGE_32BITTIME_66MHZ; 2725e53d81eeSPaul Saab 2726e53d81eeSPaul Saab /* XXX: Broadcom Linux driver. */ 2727652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_PCIE) { 27280c8aa4eaSJung-uk Kim if (CSR_READ_4(sc, 0x7E2C) == 0x60) /* PCIE 1.0 */ 27290c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, 0x7E2C, 0x20); 2730e53d81eeSPaul Saab if (sc->bge_chipid != BGE_CHIPID_BCM5750_A0) { 2731e53d81eeSPaul Saab /* Prevent PCIE link training during global reset */ 27320c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_MISC_CFG, 1 << 29); 27330c8aa4eaSJung-uk Kim reset |= 1 << 29; 2734e53d81eeSPaul Saab } 2735e53d81eeSPaul Saab } 2736e53d81eeSPaul Saab 273721c9e407SDavid Christensen /* 27386f8718a3SScott Long * Set GPHY Power Down Override to leave GPHY 27396f8718a3SScott Long * powered up in D0 uninitialized. 27406f8718a3SScott Long */ 27415345bad0SScott Long if (BGE_IS_5705_PLUS(sc)) 27426f8718a3SScott Long reset |= 0x04000000; 27436f8718a3SScott Long 274495d67482SBill Paul /* Issue global reset */ 27456f8718a3SScott Long write_op(sc, BGE_MISC_CFG, reset); 274695d67482SBill Paul 274795d67482SBill Paul DELAY(1000); 274895d67482SBill Paul 2749e53d81eeSPaul Saab /* XXX: Broadcom Linux driver. */ 2750652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_PCIE) { 2751e53d81eeSPaul Saab if (sc->bge_chipid == BGE_CHIPID_BCM5750_A0) { 2752e53d81eeSPaul Saab uint32_t v; 2753e53d81eeSPaul Saab 2754e53d81eeSPaul Saab DELAY(500000); /* wait for link training to complete */ 27550c8aa4eaSJung-uk Kim v = pci_read_config(dev, 0xC4, 4); 27560c8aa4eaSJung-uk Kim pci_write_config(dev, 0xC4, v | (1 << 15), 4); 2757e53d81eeSPaul Saab } 27589ba784dbSScott Long /* 27599ba784dbSScott Long * Set PCIE max payload size to 128 bytes and clear error 27609ba784dbSScott Long * status. 27619ba784dbSScott Long */ 27620c8aa4eaSJung-uk Kim pci_write_config(dev, 0xD8, 0xF5000, 4); 2763e53d81eeSPaul Saab } 2764e53d81eeSPaul Saab 27653f74909aSGleb Smirnoff /* Reset some of the PCI state that got zapped by reset. */ 276695d67482SBill Paul pci_write_config(dev, BGE_PCI_MISC_CTL, 276795d67482SBill Paul BGE_PCIMISCCTL_INDIRECT_ACCESS | BGE_PCIMISCCTL_MASK_PCI_INTR | 2768e907febfSPyun YongHyeon BGE_HIF_SWAP_OPTIONS | BGE_PCIMISCCTL_PCISTATE_RW, 4); 276995d67482SBill Paul pci_write_config(dev, BGE_PCI_CACHESZ, cachesize, 4); 277095d67482SBill Paul pci_write_config(dev, BGE_PCI_CMD, command, 4); 27710c8aa4eaSJung-uk Kim write_op(sc, BGE_MISC_CFG, BGE_32BITTIME_66MHZ); 277295d67482SBill Paul 2773bf6ef57aSJohn Polstra /* Re-enable MSI, if neccesary, and enable the memory arbiter. */ 27744c0da0ffSGleb Smirnoff if (BGE_IS_5714_FAMILY(sc)) { 27754c0da0ffSGleb Smirnoff uint32_t val; 27764c0da0ffSGleb Smirnoff 2777bf6ef57aSJohn Polstra /* This chip disables MSI on reset. */ 2778bf6ef57aSJohn Polstra if (sc->bge_flags & BGE_FLAG_MSI) { 2779bf6ef57aSJohn Polstra val = pci_read_config(dev, BGE_PCI_MSI_CTL, 2); 2780bf6ef57aSJohn Polstra pci_write_config(dev, BGE_PCI_MSI_CTL, 2781bf6ef57aSJohn Polstra val | PCIM_MSICTRL_MSI_ENABLE, 2); 2782bf6ef57aSJohn Polstra val = CSR_READ_4(sc, BGE_MSI_MODE); 2783bf6ef57aSJohn Polstra CSR_WRITE_4(sc, BGE_MSI_MODE, 2784bf6ef57aSJohn Polstra val | BGE_MSIMODE_ENABLE); 2785bf6ef57aSJohn Polstra } 27864c0da0ffSGleb Smirnoff val = CSR_READ_4(sc, BGE_MARB_MODE); 27874c0da0ffSGleb Smirnoff CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE | val); 27884c0da0ffSGleb Smirnoff } else 2789a7b0c314SPaul Saab CSR_WRITE_4(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE); 2790a7b0c314SPaul Saab 279195d67482SBill Paul /* 27926f8718a3SScott Long * Poll until we see the 1's complement of the magic number. 279308013fd3SMarius Strobl * This indicates that the firmware initialization is complete. 279408013fd3SMarius Strobl * We expect this to fail if no EEPROM is fitted though. 279595d67482SBill Paul */ 279695d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 2797d5d23857SJung-uk Kim DELAY(10); 279895d67482SBill Paul val = bge_readmem_ind(sc, BGE_SOFTWARE_GENCOMM); 279995d67482SBill Paul if (val == ~BGE_MAGIC_NUMBER) 280095d67482SBill Paul break; 280195d67482SBill Paul } 280295d67482SBill Paul 280308013fd3SMarius Strobl if ((sc->bge_flags & BGE_FLAG_EEPROM) && i == BGE_TIMEOUT) 28049ba784dbSScott Long device_printf(sc->bge_dev, "firmware handshake timed out, " 28059ba784dbSScott Long "found 0x%08x\n", val); 280695d67482SBill Paul 280795d67482SBill Paul /* 280895d67482SBill Paul * XXX Wait for the value of the PCISTATE register to 280995d67482SBill Paul * return to its original pre-reset state. This is a 281095d67482SBill Paul * fairly good indicator of reset completion. If we don't 281195d67482SBill Paul * wait for the reset to fully complete, trying to read 281295d67482SBill Paul * from the device's non-PCI registers may yield garbage 281395d67482SBill Paul * results. 281495d67482SBill Paul */ 281595d67482SBill Paul for (i = 0; i < BGE_TIMEOUT; i++) { 281695d67482SBill Paul if (pci_read_config(dev, BGE_PCI_PCISTATE, 4) == pcistate) 281795d67482SBill Paul break; 281895d67482SBill Paul DELAY(10); 281995d67482SBill Paul } 282095d67482SBill Paul 28216f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_PCIE) { 28220c8aa4eaSJung-uk Kim reset = bge_readmem_ind(sc, 0x7C00); 28230c8aa4eaSJung-uk Kim bge_writemem_ind(sc, 0x7C00, reset | (1 << 25)); 28246f8718a3SScott Long } 28256f8718a3SScott Long 28263f74909aSGleb Smirnoff /* Fix up byte swapping. */ 2827e907febfSPyun YongHyeon CSR_WRITE_4(sc, BGE_MODE_CTL, BGE_DMA_SWAP_OPTIONS | 282895d67482SBill Paul BGE_MODECTL_BYTESWAP_DATA); 282995d67482SBill Paul 28308cb1383cSDoug Ambrisko /* Tell the ASF firmware we are up */ 28318cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) 28328cb1383cSDoug Ambrisko BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 28338cb1383cSDoug Ambrisko 283495d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_MODE, 0); 283595d67482SBill Paul 2836da3003f0SBill Paul /* 2837da3003f0SBill Paul * The 5704 in TBI mode apparently needs some special 2838da3003f0SBill Paul * adjustment to insure the SERDES drive level is set 2839da3003f0SBill Paul * to 1.2V. 2840da3003f0SBill Paul */ 2841652ae483SGleb Smirnoff if (sc->bge_asicrev == BGE_ASICREV_BCM5704 && 2842652ae483SGleb Smirnoff sc->bge_flags & BGE_FLAG_TBI) { 2843da3003f0SBill Paul uint32_t serdescfg; 2844652ae483SGleb Smirnoff 2845da3003f0SBill Paul serdescfg = CSR_READ_4(sc, BGE_SERDES_CFG); 28460c8aa4eaSJung-uk Kim serdescfg = (serdescfg & ~0xFFF) | 0x880; 2847da3003f0SBill Paul CSR_WRITE_4(sc, BGE_SERDES_CFG, serdescfg); 2848da3003f0SBill Paul } 2849da3003f0SBill Paul 2850e53d81eeSPaul Saab /* XXX: Broadcom Linux driver. */ 2851652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_PCIE && 2852652ae483SGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5750_A0) { 2853e53d81eeSPaul Saab uint32_t v; 2854e53d81eeSPaul Saab 28550c8aa4eaSJung-uk Kim v = CSR_READ_4(sc, 0x7C00); 28560c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, 0x7C00, v | (1 << 25)); 2857e53d81eeSPaul Saab } 285895d67482SBill Paul DELAY(10000); 28598cb1383cSDoug Ambrisko 28608cb1383cSDoug Ambrisko return(0); 286195d67482SBill Paul } 286295d67482SBill Paul 286395d67482SBill Paul /* 286495d67482SBill Paul * Frame reception handling. This is called if there's a frame 286595d67482SBill Paul * on the receive return list. 286695d67482SBill Paul * 286795d67482SBill Paul * Note: we have to be able to handle two possibilities here: 28681be6acb7SGleb Smirnoff * 1) the frame is from the jumbo receive ring 286995d67482SBill Paul * 2) the frame is from the standard receive ring 287095d67482SBill Paul */ 287195d67482SBill Paul 287295d67482SBill Paul static void 28733f74909aSGleb Smirnoff bge_rxeof(struct bge_softc *sc) 287495d67482SBill Paul { 287595d67482SBill Paul struct ifnet *ifp; 287695d67482SBill Paul int stdcnt = 0, jumbocnt = 0; 287795d67482SBill Paul 28780f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 28790f9bd73bSSam Leffler 28803f74909aSGleb Smirnoff /* Nothing to do. */ 2881cfcb5025SOleg Bulyzhin if (sc->bge_rx_saved_considx == 2882cfcb5025SOleg Bulyzhin sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx) 2883cfcb5025SOleg Bulyzhin return; 2884cfcb5025SOleg Bulyzhin 2885fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 288695d67482SBill Paul 2887f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_return_ring_tag, 2888e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_return_ring_map, BUS_DMASYNC_POSTREAD); 2889f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag, 2890f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_POSTREAD); 28914c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc)) 2892f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag, 28934c0da0ffSGleb Smirnoff sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_POSTREAD); 2894f41ac2beSBill Paul 289595d67482SBill Paul while(sc->bge_rx_saved_considx != 2896f41ac2beSBill Paul sc->bge_ldata.bge_status_block->bge_idx[0].bge_rx_prod_idx) { 289795d67482SBill Paul struct bge_rx_bd *cur_rx; 28983f74909aSGleb Smirnoff uint32_t rxidx; 289995d67482SBill Paul struct mbuf *m = NULL; 29003f74909aSGleb Smirnoff uint16_t vlan_tag = 0; 290195d67482SBill Paul int have_tag = 0; 290295d67482SBill Paul 290375719184SGleb Smirnoff #ifdef DEVICE_POLLING 290475719184SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) { 290575719184SGleb Smirnoff if (sc->rxcycles <= 0) 290675719184SGleb Smirnoff break; 290775719184SGleb Smirnoff sc->rxcycles--; 290875719184SGleb Smirnoff } 290975719184SGleb Smirnoff #endif 291075719184SGleb Smirnoff 291195d67482SBill Paul cur_rx = 2912f41ac2beSBill Paul &sc->bge_ldata.bge_rx_return_ring[sc->bge_rx_saved_considx]; 291395d67482SBill Paul 291495d67482SBill Paul rxidx = cur_rx->bge_idx; 29150434d1b8SBill Paul BGE_INC(sc->bge_rx_saved_considx, sc->bge_return_ring_cnt); 291695d67482SBill Paul 2917cb2eacc7SYaroslav Tykhiy if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING && 2918cb2eacc7SYaroslav Tykhiy cur_rx->bge_flags & BGE_RXBDFLAG_VLAN_TAG) { 291995d67482SBill Paul have_tag = 1; 292095d67482SBill Paul vlan_tag = cur_rx->bge_vlan_tag; 292195d67482SBill Paul } 292295d67482SBill Paul 292395d67482SBill Paul if (cur_rx->bge_flags & BGE_RXBDFLAG_JUMBO_RING) { 292495d67482SBill Paul BGE_INC(sc->bge_jumbo, BGE_JUMBO_RX_RING_CNT); 2925f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_mtag_jumbo, 2926f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[rxidx], 2927f41ac2beSBill Paul BUS_DMASYNC_POSTREAD); 2928f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag_jumbo, 2929f41ac2beSBill Paul sc->bge_cdata.bge_rx_jumbo_dmamap[rxidx]); 293095d67482SBill Paul m = sc->bge_cdata.bge_rx_jumbo_chain[rxidx]; 293195d67482SBill Paul sc->bge_cdata.bge_rx_jumbo_chain[rxidx] = NULL; 293295d67482SBill Paul jumbocnt++; 293395d67482SBill Paul if (cur_rx->bge_flags & BGE_RXBDFLAG_ERROR) { 293495d67482SBill Paul ifp->if_ierrors++; 293595d67482SBill Paul bge_newbuf_jumbo(sc, sc->bge_jumbo, m); 293695d67482SBill Paul continue; 293795d67482SBill Paul } 293895d67482SBill Paul if (bge_newbuf_jumbo(sc, 293995d67482SBill Paul sc->bge_jumbo, NULL) == ENOBUFS) { 294095d67482SBill Paul ifp->if_ierrors++; 294195d67482SBill Paul bge_newbuf_jumbo(sc, sc->bge_jumbo, m); 294295d67482SBill Paul continue; 294395d67482SBill Paul } 294495d67482SBill Paul } else { 294595d67482SBill Paul BGE_INC(sc->bge_std, BGE_STD_RX_RING_CNT); 2946f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_mtag, 2947f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[rxidx], 2948f41ac2beSBill Paul BUS_DMASYNC_POSTREAD); 2949f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag, 2950f41ac2beSBill Paul sc->bge_cdata.bge_rx_std_dmamap[rxidx]); 295195d67482SBill Paul m = sc->bge_cdata.bge_rx_std_chain[rxidx]; 295295d67482SBill Paul sc->bge_cdata.bge_rx_std_chain[rxidx] = NULL; 295395d67482SBill Paul stdcnt++; 295495d67482SBill Paul if (cur_rx->bge_flags & BGE_RXBDFLAG_ERROR) { 295595d67482SBill Paul ifp->if_ierrors++; 295695d67482SBill Paul bge_newbuf_std(sc, sc->bge_std, m); 295795d67482SBill Paul continue; 295895d67482SBill Paul } 295995d67482SBill Paul if (bge_newbuf_std(sc, sc->bge_std, 296095d67482SBill Paul NULL) == ENOBUFS) { 296195d67482SBill Paul ifp->if_ierrors++; 296295d67482SBill Paul bge_newbuf_std(sc, sc->bge_std, m); 296395d67482SBill Paul continue; 296495d67482SBill Paul } 296595d67482SBill Paul } 296695d67482SBill Paul 296795d67482SBill Paul ifp->if_ipackets++; 2968e65bed95SPyun YongHyeon #ifndef __NO_STRICT_ALIGNMENT 2969e255b776SJohn Polstra /* 2970e65bed95SPyun YongHyeon * For architectures with strict alignment we must make sure 2971e65bed95SPyun YongHyeon * the payload is aligned. 2972e255b776SJohn Polstra */ 2973652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) { 2974e255b776SJohn Polstra bcopy(m->m_data, m->m_data + ETHER_ALIGN, 2975e255b776SJohn Polstra cur_rx->bge_len); 2976e255b776SJohn Polstra m->m_data += ETHER_ALIGN; 2977e255b776SJohn Polstra } 2978e255b776SJohn Polstra #endif 2979473851baSPaul Saab m->m_pkthdr.len = m->m_len = cur_rx->bge_len - ETHER_CRC_LEN; 298095d67482SBill Paul m->m_pkthdr.rcvif = ifp; 298195d67482SBill Paul 2982b874fdd4SYaroslav Tykhiy if (ifp->if_capenable & IFCAP_RXCSUM) { 298378178cd1SGleb Smirnoff if (cur_rx->bge_flags & BGE_RXBDFLAG_IP_CSUM) { 298495d67482SBill Paul m->m_pkthdr.csum_flags |= CSUM_IP_CHECKED; 29850c8aa4eaSJung-uk Kim if ((cur_rx->bge_ip_csum ^ 0xFFFF) == 0) 29860c8aa4eaSJung-uk Kim m->m_pkthdr.csum_flags |= CSUM_IP_VALID; 298778178cd1SGleb Smirnoff } 2988d375e524SGleb Smirnoff if (cur_rx->bge_flags & BGE_RXBDFLAG_TCP_UDP_CSUM && 2989d375e524SGleb Smirnoff m->m_pkthdr.len >= ETHER_MIN_NOPAD) { 299095d67482SBill Paul m->m_pkthdr.csum_data = 299195d67482SBill Paul cur_rx->bge_tcp_udp_csum; 2992ee7ef91cSOleg Bulyzhin m->m_pkthdr.csum_flags |= 2993ee7ef91cSOleg Bulyzhin CSUM_DATA_VALID | CSUM_PSEUDO_HDR; 299495d67482SBill Paul } 299595d67482SBill Paul } 299695d67482SBill Paul 299795d67482SBill Paul /* 2998673d9191SSam Leffler * If we received a packet with a vlan tag, 2999673d9191SSam Leffler * attach that information to the packet. 300095d67482SBill Paul */ 3001d147662cSGleb Smirnoff if (have_tag) { 30024e35d186SJung-uk Kim #if __FreeBSD_version > 700022 300378ba57b9SAndre Oppermann m->m_pkthdr.ether_vtag = vlan_tag; 300478ba57b9SAndre Oppermann m->m_flags |= M_VLANTAG; 30054e35d186SJung-uk Kim #else 30064e35d186SJung-uk Kim VLAN_INPUT_TAG_NEW(ifp, m, vlan_tag); 30074e35d186SJung-uk Kim if (m == NULL) 30084e35d186SJung-uk Kim continue; 30094e35d186SJung-uk Kim #endif 3010d147662cSGleb Smirnoff } 301195d67482SBill Paul 30120f9bd73bSSam Leffler BGE_UNLOCK(sc); 3013673d9191SSam Leffler (*ifp->if_input)(ifp, m); 30140f9bd73bSSam Leffler BGE_LOCK(sc); 301595d67482SBill Paul } 301695d67482SBill Paul 3017e65bed95SPyun YongHyeon if (stdcnt > 0) 3018f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_std_ring_tag, 3019e65bed95SPyun YongHyeon sc->bge_cdata.bge_rx_std_ring_map, BUS_DMASYNC_PREWRITE); 30204c0da0ffSGleb Smirnoff 30214c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc) && jumbocnt > 0) 3022f41ac2beSBill Paul bus_dmamap_sync(sc->bge_cdata.bge_rx_jumbo_ring_tag, 30234c0da0ffSGleb Smirnoff sc->bge_cdata.bge_rx_jumbo_ring_map, BUS_DMASYNC_PREWRITE); 3024f41ac2beSBill Paul 302595d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_CONS0_LO, sc->bge_rx_saved_considx); 302695d67482SBill Paul if (stdcnt) 302795d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_STD_PROD_LO, sc->bge_std); 302895d67482SBill Paul if (jumbocnt) 302995d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_RX_JUMBO_PROD_LO, sc->bge_jumbo); 30306b037352SJung-uk Kim #ifdef notyet 30316b037352SJung-uk Kim /* 30326b037352SJung-uk Kim * This register wraps very quickly under heavy packet drops. 30336b037352SJung-uk Kim * If you need correct statistics, you can enable this check. 30346b037352SJung-uk Kim */ 30356b037352SJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 30366b037352SJung-uk Kim ifp->if_ierrors += CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS); 30376b037352SJung-uk Kim #endif 303895d67482SBill Paul } 303995d67482SBill Paul 304095d67482SBill Paul static void 30413f74909aSGleb Smirnoff bge_txeof(struct bge_softc *sc) 304295d67482SBill Paul { 304395d67482SBill Paul struct bge_tx_bd *cur_tx = NULL; 304495d67482SBill Paul struct ifnet *ifp; 304595d67482SBill Paul 30460f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 30470f9bd73bSSam Leffler 30483f74909aSGleb Smirnoff /* Nothing to do. */ 3049cfcb5025SOleg Bulyzhin if (sc->bge_tx_saved_considx == 3050cfcb5025SOleg Bulyzhin sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx) 3051cfcb5025SOleg Bulyzhin return; 3052cfcb5025SOleg Bulyzhin 3053fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 305495d67482SBill Paul 3055e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_tx_ring_tag, 3056e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_ring_map, 3057e65bed95SPyun YongHyeon BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE); 305895d67482SBill Paul /* 305995d67482SBill Paul * Go through our tx ring and free mbufs for those 306095d67482SBill Paul * frames that have been sent. 306195d67482SBill Paul */ 306295d67482SBill Paul while (sc->bge_tx_saved_considx != 3063f41ac2beSBill Paul sc->bge_ldata.bge_status_block->bge_idx[0].bge_tx_cons_idx) { 30643f74909aSGleb Smirnoff uint32_t idx = 0; 306595d67482SBill Paul 306695d67482SBill Paul idx = sc->bge_tx_saved_considx; 3067f41ac2beSBill Paul cur_tx = &sc->bge_ldata.bge_tx_ring[idx]; 306895d67482SBill Paul if (cur_tx->bge_flags & BGE_TXBDFLAG_END) 306995d67482SBill Paul ifp->if_opackets++; 307095d67482SBill Paul if (sc->bge_cdata.bge_tx_chain[idx] != NULL) { 3071e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag, 3072e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_dmamap[idx], 3073e65bed95SPyun YongHyeon BUS_DMASYNC_POSTWRITE); 3074f41ac2beSBill Paul bus_dmamap_unload(sc->bge_cdata.bge_mtag, 3075f41ac2beSBill Paul sc->bge_cdata.bge_tx_dmamap[idx]); 3076e65bed95SPyun YongHyeon m_freem(sc->bge_cdata.bge_tx_chain[idx]); 3077e65bed95SPyun YongHyeon sc->bge_cdata.bge_tx_chain[idx] = NULL; 307895d67482SBill Paul } 307995d67482SBill Paul sc->bge_txcnt--; 308095d67482SBill Paul BGE_INC(sc->bge_tx_saved_considx, BGE_TX_RING_CNT); 308195d67482SBill Paul } 308295d67482SBill Paul 308395d67482SBill Paul if (cur_tx != NULL) 308413f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 30855b01e77cSBruce Evans if (sc->bge_txcnt == 0) 30865b01e77cSBruce Evans sc->bge_timer = 0; 308795d67482SBill Paul } 308895d67482SBill Paul 308975719184SGleb Smirnoff #ifdef DEVICE_POLLING 309075719184SGleb Smirnoff static void 309175719184SGleb Smirnoff bge_poll(struct ifnet *ifp, enum poll_cmd cmd, int count) 309275719184SGleb Smirnoff { 309375719184SGleb Smirnoff struct bge_softc *sc = ifp->if_softc; 3094366454f2SOleg Bulyzhin uint32_t statusword; 309575719184SGleb Smirnoff 30963f74909aSGleb Smirnoff BGE_LOCK(sc); 30973f74909aSGleb Smirnoff if (!(ifp->if_drv_flags & IFF_DRV_RUNNING)) { 30983f74909aSGleb Smirnoff BGE_UNLOCK(sc); 30993f74909aSGleb Smirnoff return; 31003f74909aSGleb Smirnoff } 310175719184SGleb Smirnoff 3102dab5cd05SOleg Bulyzhin bus_dmamap_sync(sc->bge_cdata.bge_status_tag, 3103e65bed95SPyun YongHyeon sc->bge_cdata.bge_status_map, BUS_DMASYNC_POSTREAD); 3104dab5cd05SOleg Bulyzhin 31053f74909aSGleb Smirnoff statusword = atomic_readandclear_32( 31063f74909aSGleb Smirnoff &sc->bge_ldata.bge_status_block->bge_status); 3107dab5cd05SOleg Bulyzhin 3108dab5cd05SOleg Bulyzhin bus_dmamap_sync(sc->bge_cdata.bge_status_tag, 3109e65bed95SPyun YongHyeon sc->bge_cdata.bge_status_map, BUS_DMASYNC_PREREAD); 3110366454f2SOleg Bulyzhin 31110c8aa4eaSJung-uk Kim /* Note link event. It will be processed by POLL_AND_CHECK_STATUS. */ 3112366454f2SOleg Bulyzhin if (statusword & BGE_STATFLAG_LINKSTATE_CHANGED) 3113366454f2SOleg Bulyzhin sc->bge_link_evt++; 3114366454f2SOleg Bulyzhin 3115366454f2SOleg Bulyzhin if (cmd == POLL_AND_CHECK_STATUS) 3116366454f2SOleg Bulyzhin if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 && 31174c0da0ffSGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5700_B2) || 3118652ae483SGleb Smirnoff sc->bge_link_evt || (sc->bge_flags & BGE_FLAG_TBI)) 3119366454f2SOleg Bulyzhin bge_link_upd(sc); 3120366454f2SOleg Bulyzhin 3121366454f2SOleg Bulyzhin sc->rxcycles = count; 3122366454f2SOleg Bulyzhin bge_rxeof(sc); 3123366454f2SOleg Bulyzhin bge_txeof(sc); 3124366454f2SOleg Bulyzhin if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 3125366454f2SOleg Bulyzhin bge_start_locked(ifp); 31263f74909aSGleb Smirnoff 31273f74909aSGleb Smirnoff BGE_UNLOCK(sc); 312875719184SGleb Smirnoff } 312975719184SGleb Smirnoff #endif /* DEVICE_POLLING */ 313075719184SGleb Smirnoff 313195d67482SBill Paul static void 31323f74909aSGleb Smirnoff bge_intr(void *xsc) 313395d67482SBill Paul { 313495d67482SBill Paul struct bge_softc *sc; 313595d67482SBill Paul struct ifnet *ifp; 3136dab5cd05SOleg Bulyzhin uint32_t statusword; 313795d67482SBill Paul 313895d67482SBill Paul sc = xsc; 3139f41ac2beSBill Paul 31400f9bd73bSSam Leffler BGE_LOCK(sc); 31410f9bd73bSSam Leffler 3142dab5cd05SOleg Bulyzhin ifp = sc->bge_ifp; 3143dab5cd05SOleg Bulyzhin 314475719184SGleb Smirnoff #ifdef DEVICE_POLLING 314575719184SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) { 314675719184SGleb Smirnoff BGE_UNLOCK(sc); 314775719184SGleb Smirnoff return; 314875719184SGleb Smirnoff } 314975719184SGleb Smirnoff #endif 315075719184SGleb Smirnoff 3151f30cbfc6SScott Long /* 3152b848e032SBruce Evans * Ack the interrupt by writing something to BGE_MBX_IRQ0_LO. Don't 3153b848e032SBruce Evans * disable interrupts by writing nonzero like we used to, since with 3154b848e032SBruce Evans * our current organization this just gives complications and 3155b848e032SBruce Evans * pessimizations for re-enabling interrupts. We used to have races 3156b848e032SBruce Evans * instead of the necessary complications. Disabling interrupts 3157b848e032SBruce Evans * would just reduce the chance of a status update while we are 3158b848e032SBruce Evans * running (by switching to the interrupt-mode coalescence 3159b848e032SBruce Evans * parameters), but this chance is already very low so it is more 3160b848e032SBruce Evans * efficient to get another interrupt than prevent it. 3161b848e032SBruce Evans * 3162b848e032SBruce Evans * We do the ack first to ensure another interrupt if there is a 3163b848e032SBruce Evans * status update after the ack. We don't check for the status 3164b848e032SBruce Evans * changing later because it is more efficient to get another 3165b848e032SBruce Evans * interrupt than prevent it, not quite as above (not checking is 3166b848e032SBruce Evans * a smaller optimization than not toggling the interrupt enable, 3167b848e032SBruce Evans * since checking doesn't involve PCI accesses and toggling require 3168b848e032SBruce Evans * the status check). So toggling would probably be a pessimization 3169b848e032SBruce Evans * even with MSI. It would only be needed for using a task queue. 3170b848e032SBruce Evans */ 3171b848e032SBruce Evans CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 0); 3172b848e032SBruce Evans 3173b848e032SBruce Evans /* 3174f30cbfc6SScott Long * Do the mandatory PCI flush as well as get the link status. 3175f30cbfc6SScott Long */ 3176f30cbfc6SScott Long statusword = CSR_READ_4(sc, BGE_MAC_STS) & BGE_MACSTAT_LINK_CHANGED; 3177f41ac2beSBill Paul 3178f30cbfc6SScott Long /* Make sure the descriptor ring indexes are coherent. */ 3179f30cbfc6SScott Long bus_dmamap_sync(sc->bge_cdata.bge_status_tag, 3180f30cbfc6SScott Long sc->bge_cdata.bge_status_map, BUS_DMASYNC_POSTREAD); 3181f30cbfc6SScott Long bus_dmamap_sync(sc->bge_cdata.bge_status_tag, 3182f30cbfc6SScott Long sc->bge_cdata.bge_status_map, BUS_DMASYNC_PREREAD); 3183f30cbfc6SScott Long 31841f313773SOleg Bulyzhin if ((sc->bge_asicrev == BGE_ASICREV_BCM5700 && 31854c0da0ffSGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5700_B2) || 3186f30cbfc6SScott Long statusword || sc->bge_link_evt) 3187dab5cd05SOleg Bulyzhin bge_link_upd(sc); 318895d67482SBill Paul 318913f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 31903f74909aSGleb Smirnoff /* Check RX return ring producer/consumer. */ 319195d67482SBill Paul bge_rxeof(sc); 319295d67482SBill Paul 31933f74909aSGleb Smirnoff /* Check TX ring producer/consumer. */ 319495d67482SBill Paul bge_txeof(sc); 319595d67482SBill Paul } 319695d67482SBill Paul 319713f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING && 319813f4c340SRobert Watson !IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 31990f9bd73bSSam Leffler bge_start_locked(ifp); 32000f9bd73bSSam Leffler 32010f9bd73bSSam Leffler BGE_UNLOCK(sc); 320295d67482SBill Paul } 320395d67482SBill Paul 320495d67482SBill Paul static void 32058cb1383cSDoug Ambrisko bge_asf_driver_up(struct bge_softc *sc) 32068cb1383cSDoug Ambrisko { 32078cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) { 32088cb1383cSDoug Ambrisko /* Send ASF heartbeat aprox. every 2s */ 32098cb1383cSDoug Ambrisko if (sc->bge_asf_count) 32108cb1383cSDoug Ambrisko sc->bge_asf_count --; 32118cb1383cSDoug Ambrisko else { 32128cb1383cSDoug Ambrisko sc->bge_asf_count = 5; 32138cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENCOMM_FW, 32148cb1383cSDoug Ambrisko BGE_FW_DRV_ALIVE); 32158cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENNCOMM_FW_LEN, 4); 32168cb1383cSDoug Ambrisko bge_writemem_ind(sc, BGE_SOFTWARE_GENNCOMM_FW_DATA, 3); 32178cb1383cSDoug Ambrisko CSR_WRITE_4(sc, BGE_CPU_EVENT, 321839153c5aSJung-uk Kim CSR_READ_4(sc, BGE_CPU_EVENT) | (1 << 14)); 32198cb1383cSDoug Ambrisko } 32208cb1383cSDoug Ambrisko } 32218cb1383cSDoug Ambrisko } 32228cb1383cSDoug Ambrisko 32238cb1383cSDoug Ambrisko static void 3224b74e67fbSGleb Smirnoff bge_tick(void *xsc) 32250f9bd73bSSam Leffler { 3226b74e67fbSGleb Smirnoff struct bge_softc *sc = xsc; 322795d67482SBill Paul struct mii_data *mii = NULL; 322895d67482SBill Paul 32290f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 323095d67482SBill Paul 32315dda8085SOleg Bulyzhin /* Synchronize with possible callout reset/stop. */ 32325dda8085SOleg Bulyzhin if (callout_pending(&sc->bge_stat_ch) || 32335dda8085SOleg Bulyzhin !callout_active(&sc->bge_stat_ch)) 32345dda8085SOleg Bulyzhin return; 32355dda8085SOleg Bulyzhin 32367ee00338SJung-uk Kim if (BGE_IS_5705_PLUS(sc)) 32370434d1b8SBill Paul bge_stats_update_regs(sc); 32380434d1b8SBill Paul else 323995d67482SBill Paul bge_stats_update(sc); 324095d67482SBill Paul 3241652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_TBI) == 0) { 324295d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 32438cb1383cSDoug Ambrisko /* Don't mess with the PHY in IPMI/ASF mode */ 32448cb1383cSDoug Ambrisko if (!((sc->bge_asf_mode & ASF_STACKUP) && (sc->bge_link))) 324595d67482SBill Paul mii_tick(mii); 32467b97099dSOleg Bulyzhin } else { 32477b97099dSOleg Bulyzhin /* 32487b97099dSOleg Bulyzhin * Since in TBI mode auto-polling can't be used we should poll 32497b97099dSOleg Bulyzhin * link status manually. Here we register pending link event 32507b97099dSOleg Bulyzhin * and trigger interrupt. 32517b97099dSOleg Bulyzhin */ 32527b97099dSOleg Bulyzhin #ifdef DEVICE_POLLING 32533f74909aSGleb Smirnoff /* In polling mode we poll link state in bge_poll(). */ 32547b97099dSOleg Bulyzhin if (!(sc->bge_ifp->if_capenable & IFCAP_POLLING)) 32557b97099dSOleg Bulyzhin #endif 32567b97099dSOleg Bulyzhin { 32577b97099dSOleg Bulyzhin sc->bge_link_evt++; 32587b97099dSOleg Bulyzhin BGE_SETBIT(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_SET); 32597b97099dSOleg Bulyzhin } 3260dab5cd05SOleg Bulyzhin } 326195d67482SBill Paul 32628cb1383cSDoug Ambrisko bge_asf_driver_up(sc); 3263b74e67fbSGleb Smirnoff bge_watchdog(sc); 32648cb1383cSDoug Ambrisko 3265dab5cd05SOleg Bulyzhin callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc); 326695d67482SBill Paul } 326795d67482SBill Paul 326895d67482SBill Paul static void 32693f74909aSGleb Smirnoff bge_stats_update_regs(struct bge_softc *sc) 32700434d1b8SBill Paul { 32713f74909aSGleb Smirnoff struct ifnet *ifp; 32720434d1b8SBill Paul 3273fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 32740434d1b8SBill Paul 32756b037352SJung-uk Kim ifp->if_collisions += CSR_READ_4(sc, BGE_MAC_STATS + 32767e6e2507SJung-uk Kim offsetof(struct bge_mac_stats_regs, etherStatsCollisions)); 32777e6e2507SJung-uk Kim 32786b037352SJung-uk Kim ifp->if_ierrors += CSR_READ_4(sc, BGE_RXLP_LOCSTAT_IFIN_DROPS); 32790434d1b8SBill Paul } 32800434d1b8SBill Paul 32810434d1b8SBill Paul static void 32823f74909aSGleb Smirnoff bge_stats_update(struct bge_softc *sc) 328395d67482SBill Paul { 328495d67482SBill Paul struct ifnet *ifp; 3285e907febfSPyun YongHyeon bus_size_t stats; 32867e6e2507SJung-uk Kim uint32_t cnt; /* current register value */ 328795d67482SBill Paul 3288fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 328995d67482SBill Paul 3290e907febfSPyun YongHyeon stats = BGE_MEMWIN_START + BGE_STATS_BLOCK; 3291e907febfSPyun YongHyeon 3292e907febfSPyun YongHyeon #define READ_STAT(sc, stats, stat) \ 3293e907febfSPyun YongHyeon CSR_READ_4(sc, stats + offsetof(struct bge_stats, stat)) 329495d67482SBill Paul 32958634dfffSJung-uk Kim cnt = READ_STAT(sc, stats, txstats.etherStatsCollisions.bge_addr_lo); 32966b037352SJung-uk Kim ifp->if_collisions += (uint32_t)(cnt - sc->bge_tx_collisions); 32976fb34dd2SOleg Bulyzhin sc->bge_tx_collisions = cnt; 32986fb34dd2SOleg Bulyzhin 32996fb34dd2SOleg Bulyzhin cnt = READ_STAT(sc, stats, ifInDiscards.bge_addr_lo); 33006b037352SJung-uk Kim ifp->if_ierrors += (uint32_t)(cnt - sc->bge_rx_discards); 33016fb34dd2SOleg Bulyzhin sc->bge_rx_discards = cnt; 33026fb34dd2SOleg Bulyzhin 33036fb34dd2SOleg Bulyzhin cnt = READ_STAT(sc, stats, txstats.ifOutDiscards.bge_addr_lo); 33046b037352SJung-uk Kim ifp->if_oerrors += (uint32_t)(cnt - sc->bge_tx_discards); 33056fb34dd2SOleg Bulyzhin sc->bge_tx_discards = cnt; 330695d67482SBill Paul 3307e907febfSPyun YongHyeon #undef READ_STAT 330895d67482SBill Paul } 330995d67482SBill Paul 331095d67482SBill Paul /* 3311d375e524SGleb Smirnoff * Pad outbound frame to ETHER_MIN_NOPAD for an unusual reason. 3312d375e524SGleb Smirnoff * The bge hardware will pad out Tx runts to ETHER_MIN_NOPAD, 3313d375e524SGleb Smirnoff * but when such padded frames employ the bge IP/TCP checksum offload, 3314d375e524SGleb Smirnoff * the hardware checksum assist gives incorrect results (possibly 3315d375e524SGleb Smirnoff * from incorporating its own padding into the UDP/TCP checksum; who knows). 3316d375e524SGleb Smirnoff * If we pad such runts with zeros, the onboard checksum comes out correct. 3317d375e524SGleb Smirnoff */ 3318d375e524SGleb Smirnoff static __inline int 3319d375e524SGleb Smirnoff bge_cksum_pad(struct mbuf *m) 3320d375e524SGleb Smirnoff { 3321d375e524SGleb Smirnoff int padlen = ETHER_MIN_NOPAD - m->m_pkthdr.len; 3322d375e524SGleb Smirnoff struct mbuf *last; 3323d375e524SGleb Smirnoff 3324d375e524SGleb Smirnoff /* If there's only the packet-header and we can pad there, use it. */ 3325d375e524SGleb Smirnoff if (m->m_pkthdr.len == m->m_len && M_WRITABLE(m) && 3326d375e524SGleb Smirnoff M_TRAILINGSPACE(m) >= padlen) { 3327d375e524SGleb Smirnoff last = m; 3328d375e524SGleb Smirnoff } else { 3329d375e524SGleb Smirnoff /* 3330d375e524SGleb Smirnoff * Walk packet chain to find last mbuf. We will either 3331d375e524SGleb Smirnoff * pad there, or append a new mbuf and pad it. 3332d375e524SGleb Smirnoff */ 3333d375e524SGleb Smirnoff for (last = m; last->m_next != NULL; last = last->m_next); 3334d375e524SGleb Smirnoff if (!(M_WRITABLE(last) && M_TRAILINGSPACE(last) >= padlen)) { 3335d375e524SGleb Smirnoff /* Allocate new empty mbuf, pad it. Compact later. */ 3336d375e524SGleb Smirnoff struct mbuf *n; 3337d375e524SGleb Smirnoff 3338d375e524SGleb Smirnoff MGET(n, M_DONTWAIT, MT_DATA); 3339d375e524SGleb Smirnoff if (n == NULL) 3340d375e524SGleb Smirnoff return (ENOBUFS); 3341d375e524SGleb Smirnoff n->m_len = 0; 3342d375e524SGleb Smirnoff last->m_next = n; 3343d375e524SGleb Smirnoff last = n; 3344d375e524SGleb Smirnoff } 3345d375e524SGleb Smirnoff } 3346d375e524SGleb Smirnoff 3347d375e524SGleb Smirnoff /* Now zero the pad area, to avoid the bge cksum-assist bug. */ 3348d375e524SGleb Smirnoff memset(mtod(last, caddr_t) + last->m_len, 0, padlen); 3349d375e524SGleb Smirnoff last->m_len += padlen; 3350d375e524SGleb Smirnoff m->m_pkthdr.len += padlen; 3351d375e524SGleb Smirnoff 3352d375e524SGleb Smirnoff return (0); 3353d375e524SGleb Smirnoff } 3354d375e524SGleb Smirnoff 3355d375e524SGleb Smirnoff /* 335695d67482SBill Paul * Encapsulate an mbuf chain in the tx ring by coupling the mbuf data 335795d67482SBill Paul * pointers to descriptors. 335895d67482SBill Paul */ 335995d67482SBill Paul static int 3360676ad2c9SGleb Smirnoff bge_encap(struct bge_softc *sc, struct mbuf **m_head, uint32_t *txidx) 336195d67482SBill Paul { 33627e27542aSGleb Smirnoff bus_dma_segment_t segs[BGE_NSEG_NEW]; 3363f41ac2beSBill Paul bus_dmamap_t map; 3364676ad2c9SGleb Smirnoff struct bge_tx_bd *d; 3365676ad2c9SGleb Smirnoff struct mbuf *m = *m_head; 33667e27542aSGleb Smirnoff uint32_t idx = *txidx; 3367676ad2c9SGleb Smirnoff uint16_t csum_flags; 33687e27542aSGleb Smirnoff int nsegs, i, error; 336995d67482SBill Paul 33706909dc43SGleb Smirnoff csum_flags = 0; 33716909dc43SGleb Smirnoff if (m->m_pkthdr.csum_flags) { 33726909dc43SGleb Smirnoff if (m->m_pkthdr.csum_flags & CSUM_IP) 33736909dc43SGleb Smirnoff csum_flags |= BGE_TXBDFLAG_IP_CSUM; 33746909dc43SGleb Smirnoff if (m->m_pkthdr.csum_flags & (CSUM_TCP | CSUM_UDP)) { 33756909dc43SGleb Smirnoff csum_flags |= BGE_TXBDFLAG_TCP_UDP_CSUM; 33766909dc43SGleb Smirnoff if (m->m_pkthdr.len < ETHER_MIN_NOPAD && 33776909dc43SGleb Smirnoff (error = bge_cksum_pad(m)) != 0) { 33786909dc43SGleb Smirnoff m_freem(m); 33796909dc43SGleb Smirnoff *m_head = NULL; 33806909dc43SGleb Smirnoff return (error); 33816909dc43SGleb Smirnoff } 33826909dc43SGleb Smirnoff } 33836909dc43SGleb Smirnoff if (m->m_flags & M_LASTFRAG) 33846909dc43SGleb Smirnoff csum_flags |= BGE_TXBDFLAG_IP_FRAG_END; 33856909dc43SGleb Smirnoff else if (m->m_flags & M_FRAG) 33866909dc43SGleb Smirnoff csum_flags |= BGE_TXBDFLAG_IP_FRAG; 33876909dc43SGleb Smirnoff } 33886909dc43SGleb Smirnoff 33897e27542aSGleb Smirnoff map = sc->bge_cdata.bge_tx_dmamap[idx]; 3390676ad2c9SGleb Smirnoff error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag, map, m, segs, 3391676ad2c9SGleb Smirnoff &nsegs, BUS_DMA_NOWAIT); 33927e27542aSGleb Smirnoff if (error == EFBIG) { 3393676ad2c9SGleb Smirnoff m = m_defrag(m, M_DONTWAIT); 3394676ad2c9SGleb Smirnoff if (m == NULL) { 3395676ad2c9SGleb Smirnoff m_freem(*m_head); 3396676ad2c9SGleb Smirnoff *m_head = NULL; 33977e27542aSGleb Smirnoff return (ENOBUFS); 33987e27542aSGleb Smirnoff } 3399676ad2c9SGleb Smirnoff *m_head = m; 3400676ad2c9SGleb Smirnoff error = bus_dmamap_load_mbuf_sg(sc->bge_cdata.bge_mtag, map, m, 3401676ad2c9SGleb Smirnoff segs, &nsegs, BUS_DMA_NOWAIT); 3402676ad2c9SGleb Smirnoff if (error) { 3403676ad2c9SGleb Smirnoff m_freem(m); 3404676ad2c9SGleb Smirnoff *m_head = NULL; 34057e27542aSGleb Smirnoff return (error); 34067e27542aSGleb Smirnoff } 3407676ad2c9SGleb Smirnoff } else if (error != 0) 3408676ad2c9SGleb Smirnoff return (error); 34097e27542aSGleb Smirnoff 341095d67482SBill Paul /* 341195d67482SBill Paul * Sanity check: avoid coming within 16 descriptors 341295d67482SBill Paul * of the end of the ring. 341395d67482SBill Paul */ 34147e27542aSGleb Smirnoff if (nsegs > (BGE_TX_RING_CNT - sc->bge_txcnt - 16)) { 34157e27542aSGleb Smirnoff bus_dmamap_unload(sc->bge_cdata.bge_mtag, map); 341695d67482SBill Paul return (ENOBUFS); 34177e27542aSGleb Smirnoff } 34187e27542aSGleb Smirnoff 3419e65bed95SPyun YongHyeon bus_dmamap_sync(sc->bge_cdata.bge_mtag, map, BUS_DMASYNC_PREWRITE); 3420e65bed95SPyun YongHyeon 34217e27542aSGleb Smirnoff for (i = 0; ; i++) { 34227e27542aSGleb Smirnoff d = &sc->bge_ldata.bge_tx_ring[idx]; 34237e27542aSGleb Smirnoff d->bge_addr.bge_addr_lo = BGE_ADDR_LO(segs[i].ds_addr); 34247e27542aSGleb Smirnoff d->bge_addr.bge_addr_hi = BGE_ADDR_HI(segs[i].ds_addr); 34257e27542aSGleb Smirnoff d->bge_len = segs[i].ds_len; 34267e27542aSGleb Smirnoff d->bge_flags = csum_flags; 34277e27542aSGleb Smirnoff if (i == nsegs - 1) 34287e27542aSGleb Smirnoff break; 34297e27542aSGleb Smirnoff BGE_INC(idx, BGE_TX_RING_CNT); 34307e27542aSGleb Smirnoff } 34317e27542aSGleb Smirnoff 34327e27542aSGleb Smirnoff /* Mark the last segment as end of packet... */ 34337e27542aSGleb Smirnoff d->bge_flags |= BGE_TXBDFLAG_END; 3434676ad2c9SGleb Smirnoff 34357e27542aSGleb Smirnoff /* ... and put VLAN tag into first segment. */ 34367e27542aSGleb Smirnoff d = &sc->bge_ldata.bge_tx_ring[*txidx]; 34374e35d186SJung-uk Kim #if __FreeBSD_version > 700022 343878ba57b9SAndre Oppermann if (m->m_flags & M_VLANTAG) { 34397e27542aSGleb Smirnoff d->bge_flags |= BGE_TXBDFLAG_VLAN_TAG; 344078ba57b9SAndre Oppermann d->bge_vlan_tag = m->m_pkthdr.ether_vtag; 34417e27542aSGleb Smirnoff } else 34427e27542aSGleb Smirnoff d->bge_vlan_tag = 0; 34434e35d186SJung-uk Kim #else 34444e35d186SJung-uk Kim { 34454e35d186SJung-uk Kim struct m_tag *mtag; 34464e35d186SJung-uk Kim 34474e35d186SJung-uk Kim if ((mtag = VLAN_OUTPUT_TAG(sc->bge_ifp, m)) != NULL) { 34484e35d186SJung-uk Kim d->bge_flags |= BGE_TXBDFLAG_VLAN_TAG; 34494e35d186SJung-uk Kim d->bge_vlan_tag = VLAN_TAG_VALUE(mtag); 34504e35d186SJung-uk Kim } else 34514e35d186SJung-uk Kim d->bge_vlan_tag = 0; 34524e35d186SJung-uk Kim } 34534e35d186SJung-uk Kim #endif 3454f41ac2beSBill Paul 3455f41ac2beSBill Paul /* 3456f41ac2beSBill Paul * Insure that the map for this transmission 3457f41ac2beSBill Paul * is placed at the array index of the last descriptor 3458f41ac2beSBill Paul * in this chain. 3459f41ac2beSBill Paul */ 34607e27542aSGleb Smirnoff sc->bge_cdata.bge_tx_dmamap[*txidx] = sc->bge_cdata.bge_tx_dmamap[idx]; 34617e27542aSGleb Smirnoff sc->bge_cdata.bge_tx_dmamap[idx] = map; 3462676ad2c9SGleb Smirnoff sc->bge_cdata.bge_tx_chain[idx] = m; 34637e27542aSGleb Smirnoff sc->bge_txcnt += nsegs; 346495d67482SBill Paul 34657e27542aSGleb Smirnoff BGE_INC(idx, BGE_TX_RING_CNT); 34667e27542aSGleb Smirnoff *txidx = idx; 346795d67482SBill Paul 346895d67482SBill Paul return (0); 346995d67482SBill Paul } 347095d67482SBill Paul 347195d67482SBill Paul /* 347295d67482SBill Paul * Main transmit routine. To avoid having to do mbuf copies, we put pointers 347395d67482SBill Paul * to the mbuf data regions directly in the transmit descriptors. 347495d67482SBill Paul */ 347595d67482SBill Paul static void 34763f74909aSGleb Smirnoff bge_start_locked(struct ifnet *ifp) 347795d67482SBill Paul { 347895d67482SBill Paul struct bge_softc *sc; 347995d67482SBill Paul struct mbuf *m_head = NULL; 348014bbd30fSGleb Smirnoff uint32_t prodidx; 3481303a718cSDag-Erling Smørgrav int count = 0; 348295d67482SBill Paul 348395d67482SBill Paul sc = ifp->if_softc; 348495d67482SBill Paul 3485dab5cd05SOleg Bulyzhin if (!sc->bge_link || IFQ_DRV_IS_EMPTY(&ifp->if_snd)) 348695d67482SBill Paul return; 348795d67482SBill Paul 348814bbd30fSGleb Smirnoff prodidx = sc->bge_tx_prodidx; 348995d67482SBill Paul 349095d67482SBill Paul while(sc->bge_cdata.bge_tx_chain[prodidx] == NULL) { 34914d665c4dSDag-Erling Smørgrav IFQ_DRV_DEQUEUE(&ifp->if_snd, m_head); 349295d67482SBill Paul if (m_head == NULL) 349395d67482SBill Paul break; 349495d67482SBill Paul 349595d67482SBill Paul /* 349695d67482SBill Paul * XXX 3497b874fdd4SYaroslav Tykhiy * The code inside the if() block is never reached since we 3498b874fdd4SYaroslav Tykhiy * must mark CSUM_IP_FRAGS in our if_hwassist to start getting 3499b874fdd4SYaroslav Tykhiy * requests to checksum TCP/UDP in a fragmented packet. 3500b874fdd4SYaroslav Tykhiy * 3501b874fdd4SYaroslav Tykhiy * XXX 350295d67482SBill Paul * safety overkill. If this is a fragmented packet chain 350395d67482SBill Paul * with delayed TCP/UDP checksums, then only encapsulate 350495d67482SBill Paul * it if we have enough descriptors to handle the entire 350595d67482SBill Paul * chain at once. 350695d67482SBill Paul * (paranoia -- may not actually be needed) 350795d67482SBill Paul */ 350895d67482SBill Paul if (m_head->m_flags & M_FIRSTFRAG && 350995d67482SBill Paul m_head->m_pkthdr.csum_flags & (CSUM_DELAY_DATA)) { 351095d67482SBill Paul if ((BGE_TX_RING_CNT - sc->bge_txcnt) < 351195d67482SBill Paul m_head->m_pkthdr.csum_data + 16) { 35124d665c4dSDag-Erling Smørgrav IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 351313f4c340SRobert Watson ifp->if_drv_flags |= IFF_DRV_OACTIVE; 351495d67482SBill Paul break; 351595d67482SBill Paul } 351695d67482SBill Paul } 351795d67482SBill Paul 351895d67482SBill Paul /* 351995d67482SBill Paul * Pack the data into the transmit ring. If we 352095d67482SBill Paul * don't have room, set the OACTIVE flag and wait 352195d67482SBill Paul * for the NIC to drain the ring. 352295d67482SBill Paul */ 3523676ad2c9SGleb Smirnoff if (bge_encap(sc, &m_head, &prodidx)) { 3524676ad2c9SGleb Smirnoff if (m_head == NULL) 3525676ad2c9SGleb Smirnoff break; 35264d665c4dSDag-Erling Smørgrav IFQ_DRV_PREPEND(&ifp->if_snd, m_head); 352713f4c340SRobert Watson ifp->if_drv_flags |= IFF_DRV_OACTIVE; 352895d67482SBill Paul break; 352995d67482SBill Paul } 3530303a718cSDag-Erling Smørgrav ++count; 353195d67482SBill Paul 353295d67482SBill Paul /* 353395d67482SBill Paul * If there's a BPF listener, bounce a copy of this frame 353495d67482SBill Paul * to him. 353595d67482SBill Paul */ 35364e35d186SJung-uk Kim #ifdef ETHER_BPF_MTAP 353745ee6ab3SJung-uk Kim ETHER_BPF_MTAP(ifp, m_head); 35384e35d186SJung-uk Kim #else 35394e35d186SJung-uk Kim BPF_MTAP(ifp, m_head); 35404e35d186SJung-uk Kim #endif 354195d67482SBill Paul } 354295d67482SBill Paul 35433f74909aSGleb Smirnoff if (count == 0) 35443f74909aSGleb Smirnoff /* No packets were dequeued. */ 3545303a718cSDag-Erling Smørgrav return; 3546303a718cSDag-Erling Smørgrav 35473f74909aSGleb Smirnoff /* Transmit. */ 354895d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, prodidx); 35493927098fSPaul Saab /* 5700 b2 errata */ 3550e0ced696SPaul Saab if (sc->bge_chiprev == BGE_CHIPREV_5700_BX) 35513927098fSPaul Saab CSR_WRITE_4(sc, BGE_MBX_TX_HOST_PROD0_LO, prodidx); 355295d67482SBill Paul 355314bbd30fSGleb Smirnoff sc->bge_tx_prodidx = prodidx; 355414bbd30fSGleb Smirnoff 355595d67482SBill Paul /* 355695d67482SBill Paul * Set a timeout in case the chip goes out to lunch. 355795d67482SBill Paul */ 3558b74e67fbSGleb Smirnoff sc->bge_timer = 5; 355995d67482SBill Paul } 356095d67482SBill Paul 35610f9bd73bSSam Leffler /* 35620f9bd73bSSam Leffler * Main transmit routine. To avoid having to do mbuf copies, we put pointers 35630f9bd73bSSam Leffler * to the mbuf data regions directly in the transmit descriptors. 35640f9bd73bSSam Leffler */ 356595d67482SBill Paul static void 35663f74909aSGleb Smirnoff bge_start(struct ifnet *ifp) 356795d67482SBill Paul { 35680f9bd73bSSam Leffler struct bge_softc *sc; 35690f9bd73bSSam Leffler 35700f9bd73bSSam Leffler sc = ifp->if_softc; 35710f9bd73bSSam Leffler BGE_LOCK(sc); 35720f9bd73bSSam Leffler bge_start_locked(ifp); 35730f9bd73bSSam Leffler BGE_UNLOCK(sc); 35740f9bd73bSSam Leffler } 35750f9bd73bSSam Leffler 35760f9bd73bSSam Leffler static void 35773f74909aSGleb Smirnoff bge_init_locked(struct bge_softc *sc) 35780f9bd73bSSam Leffler { 357995d67482SBill Paul struct ifnet *ifp; 35803f74909aSGleb Smirnoff uint16_t *m; 358195d67482SBill Paul 35820f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 358395d67482SBill Paul 3584fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 358595d67482SBill Paul 358613f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING) 358795d67482SBill Paul return; 358895d67482SBill Paul 358995d67482SBill Paul /* Cancel pending I/O and flush buffers. */ 359095d67482SBill Paul bge_stop(sc); 35918cb1383cSDoug Ambrisko 35928cb1383cSDoug Ambrisko bge_stop_fw(sc); 35938cb1383cSDoug Ambrisko bge_sig_pre_reset(sc, BGE_RESET_START); 359495d67482SBill Paul bge_reset(sc); 35958cb1383cSDoug Ambrisko bge_sig_legacy(sc, BGE_RESET_START); 35968cb1383cSDoug Ambrisko bge_sig_post_reset(sc, BGE_RESET_START); 35978cb1383cSDoug Ambrisko 359895d67482SBill Paul bge_chipinit(sc); 359995d67482SBill Paul 360095d67482SBill Paul /* 360195d67482SBill Paul * Init the various state machines, ring 360295d67482SBill Paul * control blocks and firmware. 360395d67482SBill Paul */ 360495d67482SBill Paul if (bge_blockinit(sc)) { 3605fe806fdaSPyun YongHyeon device_printf(sc->bge_dev, "initialization failure\n"); 360695d67482SBill Paul return; 360795d67482SBill Paul } 360895d67482SBill Paul 3609fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 361095d67482SBill Paul 361195d67482SBill Paul /* Specify MTU. */ 361295d67482SBill Paul CSR_WRITE_4(sc, BGE_RX_MTU, ifp->if_mtu + 3613cb2eacc7SYaroslav Tykhiy ETHER_HDR_LEN + ETHER_CRC_LEN + 3614cb2eacc7SYaroslav Tykhiy (ifp->if_capenable & IFCAP_VLAN_MTU ? ETHER_VLAN_ENCAP_LEN : 0)); 361595d67482SBill Paul 361695d67482SBill Paul /* Load our MAC address. */ 36173f74909aSGleb Smirnoff m = (uint16_t *)IF_LLADDR(sc->bge_ifp); 361895d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_ADDR1_LO, htons(m[0])); 361995d67482SBill Paul CSR_WRITE_4(sc, BGE_MAC_ADDR1_HI, (htons(m[1]) << 16) | htons(m[2])); 362095d67482SBill Paul 36213e9b1bcaSJung-uk Kim /* Program promiscuous mode. */ 36223e9b1bcaSJung-uk Kim bge_setpromisc(sc); 362395d67482SBill Paul 362495d67482SBill Paul /* Program multicast filter. */ 362595d67482SBill Paul bge_setmulti(sc); 362695d67482SBill Paul 3627cb2eacc7SYaroslav Tykhiy /* Program VLAN tag stripping. */ 3628cb2eacc7SYaroslav Tykhiy bge_setvlan(sc); 3629cb2eacc7SYaroslav Tykhiy 363095d67482SBill Paul /* Init RX ring. */ 363195d67482SBill Paul bge_init_rx_ring_std(sc); 363295d67482SBill Paul 36330434d1b8SBill Paul /* 36340434d1b8SBill Paul * Workaround for a bug in 5705 ASIC rev A0. Poll the NIC's 36350434d1b8SBill Paul * memory to insure that the chip has in fact read the first 36360434d1b8SBill Paul * entry of the ring. 36370434d1b8SBill Paul */ 36380434d1b8SBill Paul if (sc->bge_chipid == BGE_CHIPID_BCM5705_A0) { 36393f74909aSGleb Smirnoff uint32_t v, i; 36400434d1b8SBill Paul for (i = 0; i < 10; i++) { 36410434d1b8SBill Paul DELAY(20); 36420434d1b8SBill Paul v = bge_readmem_ind(sc, BGE_STD_RX_RINGS + 8); 36430434d1b8SBill Paul if (v == (MCLBYTES - ETHER_ALIGN)) 36440434d1b8SBill Paul break; 36450434d1b8SBill Paul } 36460434d1b8SBill Paul if (i == 10) 3647fe806fdaSPyun YongHyeon device_printf (sc->bge_dev, 3648fe806fdaSPyun YongHyeon "5705 A0 chip failed to load RX ring\n"); 36490434d1b8SBill Paul } 36500434d1b8SBill Paul 365195d67482SBill Paul /* Init jumbo RX ring. */ 365295d67482SBill Paul if (ifp->if_mtu > (ETHERMTU + ETHER_HDR_LEN + ETHER_CRC_LEN)) 365395d67482SBill Paul bge_init_rx_ring_jumbo(sc); 365495d67482SBill Paul 36553f74909aSGleb Smirnoff /* Init our RX return ring index. */ 365695d67482SBill Paul sc->bge_rx_saved_considx = 0; 365795d67482SBill Paul 36587e6e2507SJung-uk Kim /* Init our RX/TX stat counters. */ 36597e6e2507SJung-uk Kim sc->bge_rx_discards = sc->bge_tx_discards = sc->bge_tx_collisions = 0; 36607e6e2507SJung-uk Kim 366195d67482SBill Paul /* Init TX ring. */ 366295d67482SBill Paul bge_init_tx_ring(sc); 366395d67482SBill Paul 36643f74909aSGleb Smirnoff /* Turn on transmitter. */ 366595d67482SBill Paul BGE_SETBIT(sc, BGE_TX_MODE, BGE_TXMODE_ENABLE); 366695d67482SBill Paul 36673f74909aSGleb Smirnoff /* Turn on receiver. */ 366895d67482SBill Paul BGE_SETBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE); 366995d67482SBill Paul 367095d67482SBill Paul /* Tell firmware we're alive. */ 367195d67482SBill Paul BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 367295d67482SBill Paul 367375719184SGleb Smirnoff #ifdef DEVICE_POLLING 367475719184SGleb Smirnoff /* Disable interrupts if we are polling. */ 367575719184SGleb Smirnoff if (ifp->if_capenable & IFCAP_POLLING) { 367675719184SGleb Smirnoff BGE_SETBIT(sc, BGE_PCI_MISC_CTL, 367775719184SGleb Smirnoff BGE_PCIMISCCTL_MASK_PCI_INTR); 367875719184SGleb Smirnoff CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1); 367975719184SGleb Smirnoff } else 368075719184SGleb Smirnoff #endif 368175719184SGleb Smirnoff 368295d67482SBill Paul /* Enable host interrupts. */ 368375719184SGleb Smirnoff { 368495d67482SBill Paul BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_CLEAR_INTA); 368595d67482SBill Paul BGE_CLRBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR); 368695d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 0); 368775719184SGleb Smirnoff } 368895d67482SBill Paul 368967d5e043SOleg Bulyzhin bge_ifmedia_upd_locked(ifp); 369095d67482SBill Paul 369113f4c340SRobert Watson ifp->if_drv_flags |= IFF_DRV_RUNNING; 369213f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_OACTIVE; 369395d67482SBill Paul 36940f9bd73bSSam Leffler callout_reset(&sc->bge_stat_ch, hz, bge_tick, sc); 36950f9bd73bSSam Leffler } 36960f9bd73bSSam Leffler 36970f9bd73bSSam Leffler static void 36983f74909aSGleb Smirnoff bge_init(void *xsc) 36990f9bd73bSSam Leffler { 37000f9bd73bSSam Leffler struct bge_softc *sc = xsc; 37010f9bd73bSSam Leffler 37020f9bd73bSSam Leffler BGE_LOCK(sc); 37030f9bd73bSSam Leffler bge_init_locked(sc); 37040f9bd73bSSam Leffler BGE_UNLOCK(sc); 370595d67482SBill Paul } 370695d67482SBill Paul 370795d67482SBill Paul /* 370895d67482SBill Paul * Set media options. 370995d67482SBill Paul */ 371095d67482SBill Paul static int 37113f74909aSGleb Smirnoff bge_ifmedia_upd(struct ifnet *ifp) 371295d67482SBill Paul { 371367d5e043SOleg Bulyzhin struct bge_softc *sc = ifp->if_softc; 371467d5e043SOleg Bulyzhin int res; 371567d5e043SOleg Bulyzhin 371667d5e043SOleg Bulyzhin BGE_LOCK(sc); 371767d5e043SOleg Bulyzhin res = bge_ifmedia_upd_locked(ifp); 371867d5e043SOleg Bulyzhin BGE_UNLOCK(sc); 371967d5e043SOleg Bulyzhin 372067d5e043SOleg Bulyzhin return (res); 372167d5e043SOleg Bulyzhin } 372267d5e043SOleg Bulyzhin 372367d5e043SOleg Bulyzhin static int 372467d5e043SOleg Bulyzhin bge_ifmedia_upd_locked(struct ifnet *ifp) 372567d5e043SOleg Bulyzhin { 372667d5e043SOleg Bulyzhin struct bge_softc *sc = ifp->if_softc; 372795d67482SBill Paul struct mii_data *mii; 372895d67482SBill Paul struct ifmedia *ifm; 372995d67482SBill Paul 373067d5e043SOleg Bulyzhin BGE_LOCK_ASSERT(sc); 373167d5e043SOleg Bulyzhin 373295d67482SBill Paul ifm = &sc->bge_ifmedia; 373395d67482SBill Paul 373495d67482SBill Paul /* If this is a 1000baseX NIC, enable the TBI port. */ 3735652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 373695d67482SBill Paul if (IFM_TYPE(ifm->ifm_media) != IFM_ETHER) 373795d67482SBill Paul return (EINVAL); 373895d67482SBill Paul switch(IFM_SUBTYPE(ifm->ifm_media)) { 373995d67482SBill Paul case IFM_AUTO: 3740ff50922bSDoug White /* 3741ff50922bSDoug White * The BCM5704 ASIC appears to have a special 3742ff50922bSDoug White * mechanism for programming the autoneg 3743ff50922bSDoug White * advertisement registers in TBI mode. 3744ff50922bSDoug White */ 37450f89fde2SJung-uk Kim if (sc->bge_asicrev == BGE_ASICREV_BCM5704) { 3746ff50922bSDoug White uint32_t sgdig; 37470f89fde2SJung-uk Kim sgdig = CSR_READ_4(sc, BGE_SGDIG_STS); 37480f89fde2SJung-uk Kim if (sgdig & BGE_SGDIGSTS_DONE) { 3749ff50922bSDoug White CSR_WRITE_4(sc, BGE_TX_TBI_AUTONEG, 0); 3750ff50922bSDoug White sgdig = CSR_READ_4(sc, BGE_SGDIG_CFG); 3751ff50922bSDoug White sgdig |= BGE_SGDIGCFG_AUTO | 3752ff50922bSDoug White BGE_SGDIGCFG_PAUSE_CAP | 3753ff50922bSDoug White BGE_SGDIGCFG_ASYM_PAUSE; 3754ff50922bSDoug White CSR_WRITE_4(sc, BGE_SGDIG_CFG, 3755ff50922bSDoug White sgdig | BGE_SGDIGCFG_SEND); 3756ff50922bSDoug White DELAY(5); 3757ff50922bSDoug White CSR_WRITE_4(sc, BGE_SGDIG_CFG, sgdig); 3758ff50922bSDoug White } 37590f89fde2SJung-uk Kim } 376095d67482SBill Paul break; 376195d67482SBill Paul case IFM_1000_SX: 376295d67482SBill Paul if ((ifm->ifm_media & IFM_GMASK) == IFM_FDX) { 376395d67482SBill Paul BGE_CLRBIT(sc, BGE_MAC_MODE, 376495d67482SBill Paul BGE_MACMODE_HALF_DUPLEX); 376595d67482SBill Paul } else { 376695d67482SBill Paul BGE_SETBIT(sc, BGE_MAC_MODE, 376795d67482SBill Paul BGE_MACMODE_HALF_DUPLEX); 376895d67482SBill Paul } 376995d67482SBill Paul break; 377095d67482SBill Paul default: 377195d67482SBill Paul return (EINVAL); 377295d67482SBill Paul } 377395d67482SBill Paul return (0); 377495d67482SBill Paul } 377595d67482SBill Paul 37761493e883SOleg Bulyzhin sc->bge_link_evt++; 377795d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 377895d67482SBill Paul if (mii->mii_instance) { 377995d67482SBill Paul struct mii_softc *miisc; 378095d67482SBill Paul for (miisc = LIST_FIRST(&mii->mii_phys); miisc != NULL; 378195d67482SBill Paul miisc = LIST_NEXT(miisc, mii_list)) 378295d67482SBill Paul mii_phy_reset(miisc); 378395d67482SBill Paul } 378495d67482SBill Paul mii_mediachg(mii); 378595d67482SBill Paul 378695d67482SBill Paul return (0); 378795d67482SBill Paul } 378895d67482SBill Paul 378995d67482SBill Paul /* 379095d67482SBill Paul * Report current media status. 379195d67482SBill Paul */ 379295d67482SBill Paul static void 37933f74909aSGleb Smirnoff bge_ifmedia_sts(struct ifnet *ifp, struct ifmediareq *ifmr) 379495d67482SBill Paul { 379567d5e043SOleg Bulyzhin struct bge_softc *sc = ifp->if_softc; 379695d67482SBill Paul struct mii_data *mii; 379795d67482SBill Paul 379867d5e043SOleg Bulyzhin BGE_LOCK(sc); 379995d67482SBill Paul 3800652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 380195d67482SBill Paul ifmr->ifm_status = IFM_AVALID; 380295d67482SBill Paul ifmr->ifm_active = IFM_ETHER; 380395d67482SBill Paul if (CSR_READ_4(sc, BGE_MAC_STS) & 380495d67482SBill Paul BGE_MACSTAT_TBI_PCS_SYNCHED) 380595d67482SBill Paul ifmr->ifm_status |= IFM_ACTIVE; 38064c0da0ffSGleb Smirnoff else { 38074c0da0ffSGleb Smirnoff ifmr->ifm_active |= IFM_NONE; 380867d5e043SOleg Bulyzhin BGE_UNLOCK(sc); 38094c0da0ffSGleb Smirnoff return; 38104c0da0ffSGleb Smirnoff } 381195d67482SBill Paul ifmr->ifm_active |= IFM_1000_SX; 381295d67482SBill Paul if (CSR_READ_4(sc, BGE_MAC_MODE) & BGE_MACMODE_HALF_DUPLEX) 381395d67482SBill Paul ifmr->ifm_active |= IFM_HDX; 381495d67482SBill Paul else 381595d67482SBill Paul ifmr->ifm_active |= IFM_FDX; 381667d5e043SOleg Bulyzhin BGE_UNLOCK(sc); 381795d67482SBill Paul return; 381895d67482SBill Paul } 381995d67482SBill Paul 382095d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 382195d67482SBill Paul mii_pollstat(mii); 382295d67482SBill Paul ifmr->ifm_active = mii->mii_media_active; 382395d67482SBill Paul ifmr->ifm_status = mii->mii_media_status; 382467d5e043SOleg Bulyzhin 382567d5e043SOleg Bulyzhin BGE_UNLOCK(sc); 382695d67482SBill Paul } 382795d67482SBill Paul 382895d67482SBill Paul static int 38293f74909aSGleb Smirnoff bge_ioctl(struct ifnet *ifp, u_long command, caddr_t data) 383095d67482SBill Paul { 383195d67482SBill Paul struct bge_softc *sc = ifp->if_softc; 383295d67482SBill Paul struct ifreq *ifr = (struct ifreq *) data; 383395d67482SBill Paul struct mii_data *mii; 3834f9004b6dSJung-uk Kim int flags, mask, error = 0; 383595d67482SBill Paul 383695d67482SBill Paul switch (command) { 383795d67482SBill Paul case SIOCSIFMTU: 38384c0da0ffSGleb Smirnoff if (ifr->ifr_mtu < ETHERMIN || 38394c0da0ffSGleb Smirnoff ((BGE_IS_JUMBO_CAPABLE(sc)) && 38404c0da0ffSGleb Smirnoff ifr->ifr_mtu > BGE_JUMBO_MTU) || 38414c0da0ffSGleb Smirnoff ((!BGE_IS_JUMBO_CAPABLE(sc)) && 38424c0da0ffSGleb Smirnoff ifr->ifr_mtu > ETHERMTU)) 384395d67482SBill Paul error = EINVAL; 38444c0da0ffSGleb Smirnoff else if (ifp->if_mtu != ifr->ifr_mtu) { 384595d67482SBill Paul ifp->if_mtu = ifr->ifr_mtu; 384613f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 384795d67482SBill Paul bge_init(sc); 384895d67482SBill Paul } 384995d67482SBill Paul break; 385095d67482SBill Paul case SIOCSIFFLAGS: 38510f9bd73bSSam Leffler BGE_LOCK(sc); 385295d67482SBill Paul if (ifp->if_flags & IFF_UP) { 385395d67482SBill Paul /* 385495d67482SBill Paul * If only the state of the PROMISC flag changed, 385595d67482SBill Paul * then just use the 'set promisc mode' command 385695d67482SBill Paul * instead of reinitializing the entire NIC. Doing 385795d67482SBill Paul * a full re-init means reloading the firmware and 385895d67482SBill Paul * waiting for it to start up, which may take a 3859d183af7fSRuslan Ermilov * second or two. Similarly for ALLMULTI. 386095d67482SBill Paul */ 3861f9004b6dSJung-uk Kim if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 3862f9004b6dSJung-uk Kim flags = ifp->if_flags ^ sc->bge_if_flags; 38633e9b1bcaSJung-uk Kim if (flags & IFF_PROMISC) 38643e9b1bcaSJung-uk Kim bge_setpromisc(sc); 3865f9004b6dSJung-uk Kim if (flags & IFF_ALLMULTI) 3866d183af7fSRuslan Ermilov bge_setmulti(sc); 386795d67482SBill Paul } else 38680f9bd73bSSam Leffler bge_init_locked(sc); 386995d67482SBill Paul } else { 387013f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 387195d67482SBill Paul bge_stop(sc); 387295d67482SBill Paul } 387395d67482SBill Paul } 387495d67482SBill Paul sc->bge_if_flags = ifp->if_flags; 38750f9bd73bSSam Leffler BGE_UNLOCK(sc); 387695d67482SBill Paul error = 0; 387795d67482SBill Paul break; 387895d67482SBill Paul case SIOCADDMULTI: 387995d67482SBill Paul case SIOCDELMULTI: 388013f4c340SRobert Watson if (ifp->if_drv_flags & IFF_DRV_RUNNING) { 38810f9bd73bSSam Leffler BGE_LOCK(sc); 388295d67482SBill Paul bge_setmulti(sc); 38830f9bd73bSSam Leffler BGE_UNLOCK(sc); 388495d67482SBill Paul error = 0; 388595d67482SBill Paul } 388695d67482SBill Paul break; 388795d67482SBill Paul case SIOCSIFMEDIA: 388895d67482SBill Paul case SIOCGIFMEDIA: 3889652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 389095d67482SBill Paul error = ifmedia_ioctl(ifp, ifr, 389195d67482SBill Paul &sc->bge_ifmedia, command); 389295d67482SBill Paul } else { 389395d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 389495d67482SBill Paul error = ifmedia_ioctl(ifp, ifr, 389595d67482SBill Paul &mii->mii_media, command); 389695d67482SBill Paul } 389795d67482SBill Paul break; 389895d67482SBill Paul case SIOCSIFCAP: 389995d67482SBill Paul mask = ifr->ifr_reqcap ^ ifp->if_capenable; 390075719184SGleb Smirnoff #ifdef DEVICE_POLLING 390175719184SGleb Smirnoff if (mask & IFCAP_POLLING) { 390275719184SGleb Smirnoff if (ifr->ifr_reqcap & IFCAP_POLLING) { 390375719184SGleb Smirnoff error = ether_poll_register(bge_poll, ifp); 390475719184SGleb Smirnoff if (error) 390575719184SGleb Smirnoff return (error); 390675719184SGleb Smirnoff BGE_LOCK(sc); 390775719184SGleb Smirnoff BGE_SETBIT(sc, BGE_PCI_MISC_CTL, 390875719184SGleb Smirnoff BGE_PCIMISCCTL_MASK_PCI_INTR); 390975719184SGleb Smirnoff CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1); 391075719184SGleb Smirnoff ifp->if_capenable |= IFCAP_POLLING; 391175719184SGleb Smirnoff BGE_UNLOCK(sc); 391275719184SGleb Smirnoff } else { 391375719184SGleb Smirnoff error = ether_poll_deregister(ifp); 391475719184SGleb Smirnoff /* Enable interrupt even in error case */ 391575719184SGleb Smirnoff BGE_LOCK(sc); 391675719184SGleb Smirnoff BGE_CLRBIT(sc, BGE_PCI_MISC_CTL, 391775719184SGleb Smirnoff BGE_PCIMISCCTL_MASK_PCI_INTR); 391875719184SGleb Smirnoff CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 0); 391975719184SGleb Smirnoff ifp->if_capenable &= ~IFCAP_POLLING; 392075719184SGleb Smirnoff BGE_UNLOCK(sc); 392175719184SGleb Smirnoff } 392275719184SGleb Smirnoff } 392375719184SGleb Smirnoff #endif 3924d375e524SGleb Smirnoff if (mask & IFCAP_HWCSUM) { 3925d375e524SGleb Smirnoff ifp->if_capenable ^= IFCAP_HWCSUM; 3926d375e524SGleb Smirnoff if (IFCAP_HWCSUM & ifp->if_capenable && 3927d375e524SGleb Smirnoff IFCAP_HWCSUM & ifp->if_capabilities) 3928b874fdd4SYaroslav Tykhiy ifp->if_hwassist = BGE_CSUM_FEATURES; 392995d67482SBill Paul else 3930b874fdd4SYaroslav Tykhiy ifp->if_hwassist = 0; 39314e35d186SJung-uk Kim #ifdef VLAN_CAPABILITIES 3932479b23b7SGleb Smirnoff VLAN_CAPABILITIES(ifp); 39334e35d186SJung-uk Kim #endif 393495d67482SBill Paul } 3935cb2eacc7SYaroslav Tykhiy 3936cb2eacc7SYaroslav Tykhiy if (mask & IFCAP_VLAN_MTU) { 3937cb2eacc7SYaroslav Tykhiy ifp->if_capenable ^= IFCAP_VLAN_MTU; 3938cb2eacc7SYaroslav Tykhiy ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 3939cb2eacc7SYaroslav Tykhiy bge_init(sc); 3940cb2eacc7SYaroslav Tykhiy } 3941cb2eacc7SYaroslav Tykhiy 3942cb2eacc7SYaroslav Tykhiy if (mask & IFCAP_VLAN_HWTAGGING) { 3943cb2eacc7SYaroslav Tykhiy ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING; 3944cb2eacc7SYaroslav Tykhiy BGE_LOCK(sc); 3945cb2eacc7SYaroslav Tykhiy bge_setvlan(sc); 3946cb2eacc7SYaroslav Tykhiy BGE_UNLOCK(sc); 3947cb2eacc7SYaroslav Tykhiy #ifdef VLAN_CAPABILITIES 3948cb2eacc7SYaroslav Tykhiy VLAN_CAPABILITIES(ifp); 3949cb2eacc7SYaroslav Tykhiy #endif 3950cb2eacc7SYaroslav Tykhiy } 3951cb2eacc7SYaroslav Tykhiy 395295d67482SBill Paul break; 395395d67482SBill Paul default: 3954673d9191SSam Leffler error = ether_ioctl(ifp, command, data); 395595d67482SBill Paul break; 395695d67482SBill Paul } 395795d67482SBill Paul 395895d67482SBill Paul return (error); 395995d67482SBill Paul } 396095d67482SBill Paul 396195d67482SBill Paul static void 3962b74e67fbSGleb Smirnoff bge_watchdog(struct bge_softc *sc) 396395d67482SBill Paul { 3964b74e67fbSGleb Smirnoff struct ifnet *ifp; 396595d67482SBill Paul 3966b74e67fbSGleb Smirnoff BGE_LOCK_ASSERT(sc); 3967b74e67fbSGleb Smirnoff 3968b74e67fbSGleb Smirnoff if (sc->bge_timer == 0 || --sc->bge_timer) 3969b74e67fbSGleb Smirnoff return; 3970b74e67fbSGleb Smirnoff 3971b74e67fbSGleb Smirnoff ifp = sc->bge_ifp; 397295d67482SBill Paul 3973fe806fdaSPyun YongHyeon if_printf(ifp, "watchdog timeout -- resetting\n"); 397495d67482SBill Paul 397513f4c340SRobert Watson ifp->if_drv_flags &= ~IFF_DRV_RUNNING; 3976426742bfSGleb Smirnoff bge_init_locked(sc); 397795d67482SBill Paul 397895d67482SBill Paul ifp->if_oerrors++; 397995d67482SBill Paul } 398095d67482SBill Paul 398195d67482SBill Paul /* 398295d67482SBill Paul * Stop the adapter and free any mbufs allocated to the 398395d67482SBill Paul * RX and TX lists. 398495d67482SBill Paul */ 398595d67482SBill Paul static void 39863f74909aSGleb Smirnoff bge_stop(struct bge_softc *sc) 398795d67482SBill Paul { 398895d67482SBill Paul struct ifnet *ifp; 398995d67482SBill Paul struct ifmedia_entry *ifm; 399095d67482SBill Paul struct mii_data *mii = NULL; 399195d67482SBill Paul int mtmp, itmp; 399295d67482SBill Paul 39930f9bd73bSSam Leffler BGE_LOCK_ASSERT(sc); 39940f9bd73bSSam Leffler 3995fc74a9f9SBrooks Davis ifp = sc->bge_ifp; 399695d67482SBill Paul 3997652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_TBI) == 0) 399895d67482SBill Paul mii = device_get_softc(sc->bge_miibus); 399995d67482SBill Paul 40000f9bd73bSSam Leffler callout_stop(&sc->bge_stat_ch); 400195d67482SBill Paul 400295d67482SBill Paul /* 40033f74909aSGleb Smirnoff * Disable all of the receiver blocks. 400495d67482SBill Paul */ 400595d67482SBill Paul BGE_CLRBIT(sc, BGE_RX_MODE, BGE_RXMODE_ENABLE); 400695d67482SBill Paul BGE_CLRBIT(sc, BGE_RBDI_MODE, BGE_RBDIMODE_ENABLE); 400795d67482SBill Paul BGE_CLRBIT(sc, BGE_RXLP_MODE, BGE_RXLPMODE_ENABLE); 40087ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 400995d67482SBill Paul BGE_CLRBIT(sc, BGE_RXLS_MODE, BGE_RXLSMODE_ENABLE); 401095d67482SBill Paul BGE_CLRBIT(sc, BGE_RDBDI_MODE, BGE_RBDIMODE_ENABLE); 401195d67482SBill Paul BGE_CLRBIT(sc, BGE_RDC_MODE, BGE_RDCMODE_ENABLE); 401295d67482SBill Paul BGE_CLRBIT(sc, BGE_RBDC_MODE, BGE_RBDCMODE_ENABLE); 401395d67482SBill Paul 401495d67482SBill Paul /* 40153f74909aSGleb Smirnoff * Disable all of the transmit blocks. 401695d67482SBill Paul */ 401795d67482SBill Paul BGE_CLRBIT(sc, BGE_SRS_MODE, BGE_SRSMODE_ENABLE); 401895d67482SBill Paul BGE_CLRBIT(sc, BGE_SBDI_MODE, BGE_SBDIMODE_ENABLE); 401995d67482SBill Paul BGE_CLRBIT(sc, BGE_SDI_MODE, BGE_SDIMODE_ENABLE); 402095d67482SBill Paul BGE_CLRBIT(sc, BGE_RDMA_MODE, BGE_RDMAMODE_ENABLE); 402195d67482SBill Paul BGE_CLRBIT(sc, BGE_SDC_MODE, BGE_SDCMODE_ENABLE); 40227ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 402395d67482SBill Paul BGE_CLRBIT(sc, BGE_DMAC_MODE, BGE_DMACMODE_ENABLE); 402495d67482SBill Paul BGE_CLRBIT(sc, BGE_SBDC_MODE, BGE_SBDCMODE_ENABLE); 402595d67482SBill Paul 402695d67482SBill Paul /* 402795d67482SBill Paul * Shut down all of the memory managers and related 402895d67482SBill Paul * state machines. 402995d67482SBill Paul */ 403095d67482SBill Paul BGE_CLRBIT(sc, BGE_HCC_MODE, BGE_HCCMODE_ENABLE); 403195d67482SBill Paul BGE_CLRBIT(sc, BGE_WDMA_MODE, BGE_WDMAMODE_ENABLE); 40327ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) 403395d67482SBill Paul BGE_CLRBIT(sc, BGE_MBCF_MODE, BGE_MBCFMODE_ENABLE); 40340c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_FTQ_RESET, 0xFFFFFFFF); 403595d67482SBill Paul CSR_WRITE_4(sc, BGE_FTQ_RESET, 0); 40367ee00338SJung-uk Kim if (!(BGE_IS_5705_PLUS(sc))) { 403795d67482SBill Paul BGE_CLRBIT(sc, BGE_BMAN_MODE, BGE_BMANMODE_ENABLE); 403895d67482SBill Paul BGE_CLRBIT(sc, BGE_MARB_MODE, BGE_MARBMODE_ENABLE); 40390434d1b8SBill Paul } 404095d67482SBill Paul 404195d67482SBill Paul /* Disable host interrupts. */ 404295d67482SBill Paul BGE_SETBIT(sc, BGE_PCI_MISC_CTL, BGE_PCIMISCCTL_MASK_PCI_INTR); 404395d67482SBill Paul CSR_WRITE_4(sc, BGE_MBX_IRQ0_LO, 1); 404495d67482SBill Paul 404595d67482SBill Paul /* 404695d67482SBill Paul * Tell firmware we're shutting down. 404795d67482SBill Paul */ 40488cb1383cSDoug Ambrisko 40498cb1383cSDoug Ambrisko bge_stop_fw(sc); 40508cb1383cSDoug Ambrisko bge_sig_pre_reset(sc, BGE_RESET_STOP); 40518cb1383cSDoug Ambrisko bge_reset(sc); 40528cb1383cSDoug Ambrisko bge_sig_legacy(sc, BGE_RESET_STOP); 40538cb1383cSDoug Ambrisko bge_sig_post_reset(sc, BGE_RESET_STOP); 40548cb1383cSDoug Ambrisko 40558cb1383cSDoug Ambrisko /* 40568cb1383cSDoug Ambrisko * Keep the ASF firmware running if up. 40578cb1383cSDoug Ambrisko */ 40588cb1383cSDoug Ambrisko if (sc->bge_asf_mode & ASF_STACKUP) 40598cb1383cSDoug Ambrisko BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 40608cb1383cSDoug Ambrisko else 406195d67482SBill Paul BGE_CLRBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP); 406295d67482SBill Paul 406395d67482SBill Paul /* Free the RX lists. */ 406495d67482SBill Paul bge_free_rx_ring_std(sc); 406595d67482SBill Paul 406695d67482SBill Paul /* Free jumbo RX list. */ 40674c0da0ffSGleb Smirnoff if (BGE_IS_JUMBO_CAPABLE(sc)) 406895d67482SBill Paul bge_free_rx_ring_jumbo(sc); 406995d67482SBill Paul 407095d67482SBill Paul /* Free TX buffers. */ 407195d67482SBill Paul bge_free_tx_ring(sc); 407295d67482SBill Paul 407395d67482SBill Paul /* 407495d67482SBill Paul * Isolate/power down the PHY, but leave the media selection 407595d67482SBill Paul * unchanged so that things will be put back to normal when 407695d67482SBill Paul * we bring the interface back up. 407795d67482SBill Paul */ 4078652ae483SGleb Smirnoff if ((sc->bge_flags & BGE_FLAG_TBI) == 0) { 407995d67482SBill Paul itmp = ifp->if_flags; 408095d67482SBill Paul ifp->if_flags |= IFF_UP; 4081dcc34049SPawel Jakub Dawidek /* 4082dcc34049SPawel Jakub Dawidek * If we are called from bge_detach(), mii is already NULL. 4083dcc34049SPawel Jakub Dawidek */ 4084dcc34049SPawel Jakub Dawidek if (mii != NULL) { 408595d67482SBill Paul ifm = mii->mii_media.ifm_cur; 408695d67482SBill Paul mtmp = ifm->ifm_media; 408795d67482SBill Paul ifm->ifm_media = IFM_ETHER | IFM_NONE; 408895d67482SBill Paul mii_mediachg(mii); 408995d67482SBill Paul ifm->ifm_media = mtmp; 4090dcc34049SPawel Jakub Dawidek } 409195d67482SBill Paul ifp->if_flags = itmp; 409295d67482SBill Paul } 409395d67482SBill Paul 409495d67482SBill Paul sc->bge_tx_saved_considx = BGE_TXCONS_UNSET; 409595d67482SBill Paul 40965dda8085SOleg Bulyzhin /* Clear MAC's link state (PHY may still have link UP). */ 40971493e883SOleg Bulyzhin if (bootverbose && sc->bge_link) 40981493e883SOleg Bulyzhin if_printf(sc->bge_ifp, "link DOWN\n"); 40991493e883SOleg Bulyzhin sc->bge_link = 0; 410095d67482SBill Paul 41011493e883SOleg Bulyzhin ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE); 410295d67482SBill Paul } 410395d67482SBill Paul 410495d67482SBill Paul /* 410595d67482SBill Paul * Stop all chip I/O so that the kernel's probe routines don't 410695d67482SBill Paul * get confused by errant DMAs when rebooting. 410795d67482SBill Paul */ 410895d67482SBill Paul static void 41093f74909aSGleb Smirnoff bge_shutdown(device_t dev) 411095d67482SBill Paul { 411195d67482SBill Paul struct bge_softc *sc; 411295d67482SBill Paul 411395d67482SBill Paul sc = device_get_softc(dev); 411495d67482SBill Paul 41150f9bd73bSSam Leffler BGE_LOCK(sc); 411695d67482SBill Paul bge_stop(sc); 411795d67482SBill Paul bge_reset(sc); 41180f9bd73bSSam Leffler BGE_UNLOCK(sc); 411995d67482SBill Paul } 412014afefa3SPawel Jakub Dawidek 412114afefa3SPawel Jakub Dawidek static int 412214afefa3SPawel Jakub Dawidek bge_suspend(device_t dev) 412314afefa3SPawel Jakub Dawidek { 412414afefa3SPawel Jakub Dawidek struct bge_softc *sc; 412514afefa3SPawel Jakub Dawidek 412614afefa3SPawel Jakub Dawidek sc = device_get_softc(dev); 412714afefa3SPawel Jakub Dawidek BGE_LOCK(sc); 412814afefa3SPawel Jakub Dawidek bge_stop(sc); 412914afefa3SPawel Jakub Dawidek BGE_UNLOCK(sc); 413014afefa3SPawel Jakub Dawidek 413114afefa3SPawel Jakub Dawidek return (0); 413214afefa3SPawel Jakub Dawidek } 413314afefa3SPawel Jakub Dawidek 413414afefa3SPawel Jakub Dawidek static int 413514afefa3SPawel Jakub Dawidek bge_resume(device_t dev) 413614afefa3SPawel Jakub Dawidek { 413714afefa3SPawel Jakub Dawidek struct bge_softc *sc; 413814afefa3SPawel Jakub Dawidek struct ifnet *ifp; 413914afefa3SPawel Jakub Dawidek 414014afefa3SPawel Jakub Dawidek sc = device_get_softc(dev); 414114afefa3SPawel Jakub Dawidek BGE_LOCK(sc); 414214afefa3SPawel Jakub Dawidek ifp = sc->bge_ifp; 414314afefa3SPawel Jakub Dawidek if (ifp->if_flags & IFF_UP) { 414414afefa3SPawel Jakub Dawidek bge_init_locked(sc); 414514afefa3SPawel Jakub Dawidek if (ifp->if_drv_flags & IFF_DRV_RUNNING) 414614afefa3SPawel Jakub Dawidek bge_start_locked(ifp); 414714afefa3SPawel Jakub Dawidek } 414814afefa3SPawel Jakub Dawidek BGE_UNLOCK(sc); 414914afefa3SPawel Jakub Dawidek 415014afefa3SPawel Jakub Dawidek return (0); 415114afefa3SPawel Jakub Dawidek } 4152dab5cd05SOleg Bulyzhin 4153dab5cd05SOleg Bulyzhin static void 41543f74909aSGleb Smirnoff bge_link_upd(struct bge_softc *sc) 4155dab5cd05SOleg Bulyzhin { 41561f313773SOleg Bulyzhin struct mii_data *mii; 41571f313773SOleg Bulyzhin uint32_t link, status; 4158dab5cd05SOleg Bulyzhin 4159dab5cd05SOleg Bulyzhin BGE_LOCK_ASSERT(sc); 41601f313773SOleg Bulyzhin 41613f74909aSGleb Smirnoff /* Clear 'pending link event' flag. */ 41627b97099dSOleg Bulyzhin sc->bge_link_evt = 0; 41637b97099dSOleg Bulyzhin 4164dab5cd05SOleg Bulyzhin /* 4165dab5cd05SOleg Bulyzhin * Process link state changes. 4166dab5cd05SOleg Bulyzhin * Grrr. The link status word in the status block does 4167dab5cd05SOleg Bulyzhin * not work correctly on the BCM5700 rev AX and BX chips, 4168dab5cd05SOleg Bulyzhin * according to all available information. Hence, we have 4169dab5cd05SOleg Bulyzhin * to enable MII interrupts in order to properly obtain 4170dab5cd05SOleg Bulyzhin * async link changes. Unfortunately, this also means that 4171dab5cd05SOleg Bulyzhin * we have to read the MAC status register to detect link 4172dab5cd05SOleg Bulyzhin * changes, thereby adding an additional register access to 4173dab5cd05SOleg Bulyzhin * the interrupt handler. 41741f313773SOleg Bulyzhin * 41751f313773SOleg Bulyzhin * XXX: perhaps link state detection procedure used for 41764c0da0ffSGleb Smirnoff * BGE_CHIPID_BCM5700_B2 can be used for others BCM5700 revisions. 4177dab5cd05SOleg Bulyzhin */ 4178dab5cd05SOleg Bulyzhin 41791f313773SOleg Bulyzhin if (sc->bge_asicrev == BGE_ASICREV_BCM5700 && 41804c0da0ffSGleb Smirnoff sc->bge_chipid != BGE_CHIPID_BCM5700_B2) { 4181dab5cd05SOleg Bulyzhin status = CSR_READ_4(sc, BGE_MAC_STS); 4182dab5cd05SOleg Bulyzhin if (status & BGE_MACSTAT_MI_INTERRUPT) { 41831f313773SOleg Bulyzhin mii = device_get_softc(sc->bge_miibus); 41845dda8085SOleg Bulyzhin mii_pollstat(mii); 41851f313773SOleg Bulyzhin if (!sc->bge_link && 41861f313773SOleg Bulyzhin mii->mii_media_status & IFM_ACTIVE && 41871f313773SOleg Bulyzhin IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 41881f313773SOleg Bulyzhin sc->bge_link++; 41891f313773SOleg Bulyzhin if (bootverbose) 41901f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link UP\n"); 41911f313773SOleg Bulyzhin } else if (sc->bge_link && 41921f313773SOleg Bulyzhin (!(mii->mii_media_status & IFM_ACTIVE) || 41931f313773SOleg Bulyzhin IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)) { 41941f313773SOleg Bulyzhin sc->bge_link = 0; 41951f313773SOleg Bulyzhin if (bootverbose) 41961f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link DOWN\n"); 41971f313773SOleg Bulyzhin } 41981f313773SOleg Bulyzhin 41993f74909aSGleb Smirnoff /* Clear the interrupt. */ 4200dab5cd05SOleg Bulyzhin CSR_WRITE_4(sc, BGE_MAC_EVT_ENB, 4201dab5cd05SOleg Bulyzhin BGE_EVTENB_MI_INTERRUPT); 4202dab5cd05SOleg Bulyzhin bge_miibus_readreg(sc->bge_dev, 1, BRGPHY_MII_ISR); 4203dab5cd05SOleg Bulyzhin bge_miibus_writereg(sc->bge_dev, 1, BRGPHY_MII_IMR, 4204dab5cd05SOleg Bulyzhin BRGPHY_INTRS); 4205dab5cd05SOleg Bulyzhin } 4206dab5cd05SOleg Bulyzhin return; 4207dab5cd05SOleg Bulyzhin } 4208dab5cd05SOleg Bulyzhin 4209652ae483SGleb Smirnoff if (sc->bge_flags & BGE_FLAG_TBI) { 42101f313773SOleg Bulyzhin status = CSR_READ_4(sc, BGE_MAC_STS); 42117b97099dSOleg Bulyzhin if (status & BGE_MACSTAT_TBI_PCS_SYNCHED) { 42127b97099dSOleg Bulyzhin if (!sc->bge_link) { 42131f313773SOleg Bulyzhin sc->bge_link++; 42141f313773SOleg Bulyzhin if (sc->bge_asicrev == BGE_ASICREV_BCM5704) 42151f313773SOleg Bulyzhin BGE_CLRBIT(sc, BGE_MAC_MODE, 42161f313773SOleg Bulyzhin BGE_MACMODE_TBI_SEND_CFGS); 42170c8aa4eaSJung-uk Kim CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF); 42181f313773SOleg Bulyzhin if (bootverbose) 42191f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link UP\n"); 42203f74909aSGleb Smirnoff if_link_state_change(sc->bge_ifp, 42213f74909aSGleb Smirnoff LINK_STATE_UP); 42227b97099dSOleg Bulyzhin } 42231f313773SOleg Bulyzhin } else if (sc->bge_link) { 4224dab5cd05SOleg Bulyzhin sc->bge_link = 0; 42251f313773SOleg Bulyzhin if (bootverbose) 42261f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link DOWN\n"); 42277b97099dSOleg Bulyzhin if_link_state_change(sc->bge_ifp, LINK_STATE_DOWN); 42281f313773SOleg Bulyzhin } 42291493e883SOleg Bulyzhin } else if (CSR_READ_4(sc, BGE_MI_MODE) & BGE_MIMODE_AUTOPOLL) { 42301f313773SOleg Bulyzhin /* 42310c8aa4eaSJung-uk Kim * Some broken BCM chips have BGE_STATFLAG_LINKSTATE_CHANGED bit 42320c8aa4eaSJung-uk Kim * in status word always set. Workaround this bug by reading 42330c8aa4eaSJung-uk Kim * PHY link status directly. 42341f313773SOleg Bulyzhin */ 42351f313773SOleg Bulyzhin link = (CSR_READ_4(sc, BGE_MI_STS) & BGE_MISTS_LINK) ? 1 : 0; 42361f313773SOleg Bulyzhin 42371f313773SOleg Bulyzhin if (link != sc->bge_link || 42381f313773SOleg Bulyzhin sc->bge_asicrev == BGE_ASICREV_BCM5700) { 42391f313773SOleg Bulyzhin mii = device_get_softc(sc->bge_miibus); 42405dda8085SOleg Bulyzhin mii_pollstat(mii); 42411f313773SOleg Bulyzhin if (!sc->bge_link && 42421f313773SOleg Bulyzhin mii->mii_media_status & IFM_ACTIVE && 42431f313773SOleg Bulyzhin IFM_SUBTYPE(mii->mii_media_active) != IFM_NONE) { 42441f313773SOleg Bulyzhin sc->bge_link++; 42451f313773SOleg Bulyzhin if (bootverbose) 42461f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link UP\n"); 42471f313773SOleg Bulyzhin } else if (sc->bge_link && 42481f313773SOleg Bulyzhin (!(mii->mii_media_status & IFM_ACTIVE) || 42491f313773SOleg Bulyzhin IFM_SUBTYPE(mii->mii_media_active) == IFM_NONE)) { 42501f313773SOleg Bulyzhin sc->bge_link = 0; 42511f313773SOleg Bulyzhin if (bootverbose) 42521f313773SOleg Bulyzhin if_printf(sc->bge_ifp, "link DOWN\n"); 42531f313773SOleg Bulyzhin } 42541f313773SOleg Bulyzhin } 42550c8aa4eaSJung-uk Kim } else { 42560c8aa4eaSJung-uk Kim /* 42570c8aa4eaSJung-uk Kim * Discard link events for MII/GMII controllers 42580c8aa4eaSJung-uk Kim * if MI auto-polling is disabled. 42590c8aa4eaSJung-uk Kim */ 4260dab5cd05SOleg Bulyzhin } 4261dab5cd05SOleg Bulyzhin 42623f74909aSGleb Smirnoff /* Clear the attention. */ 4263dab5cd05SOleg Bulyzhin CSR_WRITE_4(sc, BGE_MAC_STS, BGE_MACSTAT_SYNC_CHANGED | 4264dab5cd05SOleg Bulyzhin BGE_MACSTAT_CFG_CHANGED | BGE_MACSTAT_MI_COMPLETE | 4265dab5cd05SOleg Bulyzhin BGE_MACSTAT_LINK_CHANGED); 4266dab5cd05SOleg Bulyzhin } 42676f8718a3SScott Long 4268763757b2SScott Long #define BGE_SYSCTL_STAT(sc, ctx, desc, parent, node, oid) \ 426906e83c7eSScott Long SYSCTL_ADD_PROC(ctx, parent, OID_AUTO, oid, CTLTYPE_UINT|CTLFLAG_RD, \ 4270763757b2SScott Long sc, offsetof(struct bge_stats, node), bge_sysctl_stats, "IU", \ 4271763757b2SScott Long desc) 4272763757b2SScott Long 42736f8718a3SScott Long static void 42746f8718a3SScott Long bge_add_sysctls(struct bge_softc *sc) 42756f8718a3SScott Long { 42766f8718a3SScott Long struct sysctl_ctx_list *ctx; 4277763757b2SScott Long struct sysctl_oid_list *children, *schildren; 4278763757b2SScott Long struct sysctl_oid *tree; 42796f8718a3SScott Long 42806f8718a3SScott Long ctx = device_get_sysctl_ctx(sc->bge_dev); 42816f8718a3SScott Long children = SYSCTL_CHILDREN(device_get_sysctl_tree(sc->bge_dev)); 42826f8718a3SScott Long 42836f8718a3SScott Long #ifdef BGE_REGISTER_DEBUG 42846f8718a3SScott Long SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "debug_info", 42856f8718a3SScott Long CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_debug_info, "I", 42866f8718a3SScott Long "Debug Information"); 42876f8718a3SScott Long 42886f8718a3SScott Long SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "reg_read", 42896f8718a3SScott Long CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_reg_read, "I", 42906f8718a3SScott Long "Register Read"); 42916f8718a3SScott Long 42926f8718a3SScott Long SYSCTL_ADD_PROC(ctx, children, OID_AUTO, "mem_read", 42936f8718a3SScott Long CTLTYPE_INT | CTLFLAG_RW, sc, 0, bge_sysctl_mem_read, "I", 42946f8718a3SScott Long "Memory Read"); 42956f8718a3SScott Long 42966f8718a3SScott Long #endif 4297763757b2SScott Long 4298763757b2SScott Long tree = SYSCTL_ADD_NODE(ctx, children, OID_AUTO, "stats", CTLFLAG_RD, 4299763757b2SScott Long NULL, "BGE Statistics"); 4300763757b2SScott Long schildren = children = SYSCTL_CHILDREN(tree); 4301763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Frames Dropped Due To Filters", 4302763757b2SScott Long children, COSFramesDroppedDueToFilters, 4303763757b2SScott Long "FramesDroppedDueToFilters"); 4304763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC DMA Write Queue Full", 4305763757b2SScott Long children, nicDmaWriteQueueFull, "DmaWriteQueueFull"); 4306763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC DMA Write High Priority Queue Full", 4307763757b2SScott Long children, nicDmaWriteHighPriQueueFull, "DmaWriteHighPriQueueFull"); 4308763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC No More RX Buffer Descriptors", 4309763757b2SScott Long children, nicNoMoreRxBDs, "NoMoreRxBDs"); 431006e83c7eSScott Long BGE_SYSCTL_STAT(sc, ctx, "Discarded Input Frames", 431106e83c7eSScott Long children, ifInDiscards, "InputDiscards"); 431206e83c7eSScott Long BGE_SYSCTL_STAT(sc, ctx, "Input Errors", 431306e83c7eSScott Long children, ifInErrors, "InputErrors"); 4314763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Recv Threshold Hit", 4315763757b2SScott Long children, nicRecvThresholdHit, "RecvThresholdHit"); 4316763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC DMA Read Queue Full", 4317763757b2SScott Long children, nicDmaReadQueueFull, "DmaReadQueueFull"); 4318763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC DMA Read High Priority Queue Full", 4319763757b2SScott Long children, nicDmaReadHighPriQueueFull, "DmaReadHighPriQueueFull"); 4320763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Send Data Complete Queue Full", 4321763757b2SScott Long children, nicSendDataCompQueueFull, "SendDataCompQueueFull"); 4322763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Ring Set Send Producer Index", 4323763757b2SScott Long children, nicRingSetSendProdIndex, "RingSetSendProdIndex"); 4324763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Ring Status Update", 4325763757b2SScott Long children, nicRingStatusUpdate, "RingStatusUpdate"); 4326763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Interrupts", 4327763757b2SScott Long children, nicInterrupts, "Interrupts"); 4328763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Avoided Interrupts", 4329763757b2SScott Long children, nicAvoidedInterrupts, "AvoidedInterrupts"); 4330763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "NIC Send Threshold Hit", 4331763757b2SScott Long children, nicSendThresholdHit, "SendThresholdHit"); 4332763757b2SScott Long 4333763757b2SScott Long tree = SYSCTL_ADD_NODE(ctx, schildren, OID_AUTO, "rx", CTLFLAG_RD, 4334763757b2SScott Long NULL, "BGE RX Statistics"); 4335763757b2SScott Long children = SYSCTL_CHILDREN(tree); 4336763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Inbound Octets", 4337763757b2SScott Long children, rxstats.ifHCInOctets, "Octets"); 4338763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Fragments", 4339763757b2SScott Long children, rxstats.etherStatsFragments, "Fragments"); 4340763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Inbound Unicast Packets", 4341763757b2SScott Long children, rxstats.ifHCInUcastPkts, "UcastPkts"); 4342763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Inbound Multicast Packets", 4343763757b2SScott Long children, rxstats.ifHCInMulticastPkts, "MulticastPkts"); 4344763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "FCS Errors", 4345763757b2SScott Long children, rxstats.dot3StatsFCSErrors, "FCSErrors"); 4346763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Alignment Errors", 4347763757b2SScott Long children, rxstats.dot3StatsAlignmentErrors, "AlignmentErrors"); 4348763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XON Pause Frames Received", 4349763757b2SScott Long children, rxstats.xonPauseFramesReceived, "xonPauseFramesReceived"); 4350763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XOFF Pause Frames Received", 4351763757b2SScott Long children, rxstats.xoffPauseFramesReceived, 4352763757b2SScott Long "xoffPauseFramesReceived"); 4353763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "MAC Control Frames Received", 4354763757b2SScott Long children, rxstats.macControlFramesReceived, 4355763757b2SScott Long "ControlFramesReceived"); 4356763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XOFF State Entered", 4357763757b2SScott Long children, rxstats.xoffStateEntered, "xoffStateEntered"); 4358763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Frames Too Long", 4359763757b2SScott Long children, rxstats.dot3StatsFramesTooLong, "FramesTooLong"); 4360763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Jabbers", 4361763757b2SScott Long children, rxstats.etherStatsJabbers, "Jabbers"); 4362763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Undersized Packets", 4363763757b2SScott Long children, rxstats.etherStatsUndersizePkts, "UndersizePkts"); 4364763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Inbound Range Length Errors", 436506e83c7eSScott Long children, rxstats.inRangeLengthError, "inRangeLengthError"); 4366763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Range Length Errors", 436706e83c7eSScott Long children, rxstats.outRangeLengthError, "outRangeLengthError"); 4368763757b2SScott Long 4369763757b2SScott Long tree = SYSCTL_ADD_NODE(ctx, schildren, OID_AUTO, "tx", CTLFLAG_RD, 4370763757b2SScott Long NULL, "BGE TX Statistics"); 4371763757b2SScott Long children = SYSCTL_CHILDREN(tree); 4372763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Octets", 4373763757b2SScott Long children, txstats.ifHCOutOctets, "Octets"); 4374763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "TX Collisions", 4375763757b2SScott Long children, txstats.etherStatsCollisions, "Collisions"); 4376763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XON Sent", 4377763757b2SScott Long children, txstats.outXonSent, "XonSent"); 4378763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "XOFF Sent", 4379763757b2SScott Long children, txstats.outXoffSent, "XoffSent"); 4380763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Flow Control Done", 4381763757b2SScott Long children, txstats.flowControlDone, "flowControlDone"); 4382763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Internal MAC TX errors", 4383763757b2SScott Long children, txstats.dot3StatsInternalMacTransmitErrors, 4384763757b2SScott Long "InternalMacTransmitErrors"); 4385763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Single Collision Frames", 4386763757b2SScott Long children, txstats.dot3StatsSingleCollisionFrames, 4387763757b2SScott Long "SingleCollisionFrames"); 4388763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Multiple Collision Frames", 4389763757b2SScott Long children, txstats.dot3StatsMultipleCollisionFrames, 4390763757b2SScott Long "MultipleCollisionFrames"); 4391763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Deferred Transmissions", 4392763757b2SScott Long children, txstats.dot3StatsDeferredTransmissions, 4393763757b2SScott Long "DeferredTransmissions"); 4394763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Excessive Collisions", 4395763757b2SScott Long children, txstats.dot3StatsExcessiveCollisions, 4396763757b2SScott Long "ExcessiveCollisions"); 4397763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Late Collisions", 439806e83c7eSScott Long children, txstats.dot3StatsLateCollisions, 439906e83c7eSScott Long "LateCollisions"); 4400763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Unicast Packets", 4401763757b2SScott Long children, txstats.ifHCOutUcastPkts, "UcastPkts"); 4402763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Multicast Packets", 4403763757b2SScott Long children, txstats.ifHCOutMulticastPkts, "MulticastPkts"); 4404763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Broadcast Packets", 4405763757b2SScott Long children, txstats.ifHCOutBroadcastPkts, "BroadcastPkts"); 4406763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Carrier Sense Errors", 4407763757b2SScott Long children, txstats.dot3StatsCarrierSenseErrors, 4408763757b2SScott Long "CarrierSenseErrors"); 4409763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Discards", 4410763757b2SScott Long children, txstats.ifOutDiscards, "Discards"); 4411763757b2SScott Long BGE_SYSCTL_STAT(sc, ctx, "Outbound Errors", 4412763757b2SScott Long children, txstats.ifOutErrors, "Errors"); 4413763757b2SScott Long } 4414763757b2SScott Long 4415763757b2SScott Long static int 4416763757b2SScott Long bge_sysctl_stats(SYSCTL_HANDLER_ARGS) 4417763757b2SScott Long { 4418763757b2SScott Long struct bge_softc *sc; 441906e83c7eSScott Long uint32_t result; 4420763757b2SScott Long int base, offset; 4421763757b2SScott Long 4422763757b2SScott Long sc = (struct bge_softc *)arg1; 4423763757b2SScott Long offset = arg2; 4424763757b2SScott Long if (BGE_IS_5705_PLUS(sc)) 4425763757b2SScott Long base = BGE_MAC_STATS; 4426763757b2SScott Long else 4427763757b2SScott Long base = BGE_MEMWIN_START + BGE_STATS_BLOCK; 442806e83c7eSScott Long result = CSR_READ_4(sc, base + offset + offsetof(bge_hostaddr, 4429763757b2SScott Long bge_addr_lo)); 4430041b706bSDavid Malone return (sysctl_handle_int(oidp, &result, 0, req)); 44316f8718a3SScott Long } 44326f8718a3SScott Long 44336f8718a3SScott Long #ifdef BGE_REGISTER_DEBUG 44346f8718a3SScott Long static int 44356f8718a3SScott Long bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS) 44366f8718a3SScott Long { 44376f8718a3SScott Long struct bge_softc *sc; 44386f8718a3SScott Long uint16_t *sbdata; 44396f8718a3SScott Long int error; 44406f8718a3SScott Long int result; 44416f8718a3SScott Long int i, j; 44426f8718a3SScott Long 44436f8718a3SScott Long result = -1; 44446f8718a3SScott Long error = sysctl_handle_int(oidp, &result, 0, req); 44456f8718a3SScott Long if (error || (req->newptr == NULL)) 44466f8718a3SScott Long return (error); 44476f8718a3SScott Long 44486f8718a3SScott Long if (result == 1) { 44496f8718a3SScott Long sc = (struct bge_softc *)arg1; 44506f8718a3SScott Long 44516f8718a3SScott Long sbdata = (uint16_t *)sc->bge_ldata.bge_status_block; 44526f8718a3SScott Long printf("Status Block:\n"); 44536f8718a3SScott Long for (i = 0x0; i < (BGE_STATUS_BLK_SZ / 4); ) { 44546f8718a3SScott Long printf("%06x:", i); 44556f8718a3SScott Long for (j = 0; j < 8; j++) { 44566f8718a3SScott Long printf(" %04x", sbdata[i]); 44576f8718a3SScott Long i += 4; 44586f8718a3SScott Long } 44596f8718a3SScott Long printf("\n"); 44606f8718a3SScott Long } 44616f8718a3SScott Long 44626f8718a3SScott Long printf("Registers:\n"); 44630c8aa4eaSJung-uk Kim for (i = 0x800; i < 0xA00; ) { 44646f8718a3SScott Long printf("%06x:", i); 44656f8718a3SScott Long for (j = 0; j < 8; j++) { 44666f8718a3SScott Long printf(" %08x", CSR_READ_4(sc, i)); 44676f8718a3SScott Long i += 4; 44686f8718a3SScott Long } 44696f8718a3SScott Long printf("\n"); 44706f8718a3SScott Long } 44716f8718a3SScott Long 44726f8718a3SScott Long printf("Hardware Flags:\n"); 44735345bad0SScott Long if (BGE_IS_575X_PLUS(sc)) 44746f8718a3SScott Long printf(" - 575X Plus\n"); 44755345bad0SScott Long if (BGE_IS_5705_PLUS(sc)) 44766f8718a3SScott Long printf(" - 5705 Plus\n"); 44775345bad0SScott Long if (BGE_IS_5714_FAMILY(sc)) 44785345bad0SScott Long printf(" - 5714 Family\n"); 44795345bad0SScott Long if (BGE_IS_5700_FAMILY(sc)) 44805345bad0SScott Long printf(" - 5700 Family\n"); 44816f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_JUMBO) 44826f8718a3SScott Long printf(" - Supports Jumbo Frames\n"); 44836f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_PCIX) 44846f8718a3SScott Long printf(" - PCI-X Bus\n"); 44856f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_PCIE) 44866f8718a3SScott Long printf(" - PCI Express Bus\n"); 44875ee49a3aSJung-uk Kim if (sc->bge_flags & BGE_FLAG_NO_3LED) 44886f8718a3SScott Long printf(" - No 3 LEDs\n"); 44896f8718a3SScott Long if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG) 44906f8718a3SScott Long printf(" - RX Alignment Bug\n"); 44916f8718a3SScott Long } 44926f8718a3SScott Long 44936f8718a3SScott Long return (error); 44946f8718a3SScott Long } 44956f8718a3SScott Long 44966f8718a3SScott Long static int 44976f8718a3SScott Long bge_sysctl_reg_read(SYSCTL_HANDLER_ARGS) 44986f8718a3SScott Long { 44996f8718a3SScott Long struct bge_softc *sc; 45006f8718a3SScott Long int error; 45016f8718a3SScott Long uint16_t result; 45026f8718a3SScott Long uint32_t val; 45036f8718a3SScott Long 45046f8718a3SScott Long result = -1; 45056f8718a3SScott Long error = sysctl_handle_int(oidp, &result, 0, req); 45066f8718a3SScott Long if (error || (req->newptr == NULL)) 45076f8718a3SScott Long return (error); 45086f8718a3SScott Long 45096f8718a3SScott Long if (result < 0x8000) { 45106f8718a3SScott Long sc = (struct bge_softc *)arg1; 45116f8718a3SScott Long val = CSR_READ_4(sc, result); 45126f8718a3SScott Long printf("reg 0x%06X = 0x%08X\n", result, val); 45136f8718a3SScott Long } 45146f8718a3SScott Long 45156f8718a3SScott Long return (error); 45166f8718a3SScott Long } 45176f8718a3SScott Long 45186f8718a3SScott Long static int 45196f8718a3SScott Long bge_sysctl_mem_read(SYSCTL_HANDLER_ARGS) 45206f8718a3SScott Long { 45216f8718a3SScott Long struct bge_softc *sc; 45226f8718a3SScott Long int error; 45236f8718a3SScott Long uint16_t result; 45246f8718a3SScott Long uint32_t val; 45256f8718a3SScott Long 45266f8718a3SScott Long result = -1; 45276f8718a3SScott Long error = sysctl_handle_int(oidp, &result, 0, req); 45286f8718a3SScott Long if (error || (req->newptr == NULL)) 45296f8718a3SScott Long return (error); 45306f8718a3SScott Long 45316f8718a3SScott Long if (result < 0x8000) { 45326f8718a3SScott Long sc = (struct bge_softc *)arg1; 45336f8718a3SScott Long val = bge_readmem_ind(sc, result); 45346f8718a3SScott Long printf("mem 0x%06X = 0x%08X\n", result, val); 45356f8718a3SScott Long } 45366f8718a3SScott Long 45376f8718a3SScott Long return (error); 45386f8718a3SScott Long } 45396f8718a3SScott Long #endif 4540