1 /*- 2 * Copyright (c) 2002, 2003 Sam Leffler, Errno Consulting 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 3. Neither the names of the above-listed copyright holders nor the names 16 * of any contributors may be used to endorse or promote products derived 17 * from this software without specific prior written permission. 18 * 19 * Alternatively, this software may be distributed under the terms of the 20 * GNU General Public License ("GPL") version 2 as published by the Free 21 * Software Foundation. 22 * 23 * NO WARRANTY 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 27 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 28 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 29 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 32 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 34 * THE POSSIBILITY OF SUCH DAMAGES. 35 * 36 * $FreeBSD$ 37 */ 38 39 /* 40 * Defintions for the Atheros Wireless LAN controller driver. 41 */ 42 #ifndef _DEV_ATH_ATHVAR_H 43 #define _DEV_ATH_ATHVAR_H 44 45 #include <sys/taskqueue.h> 46 47 #include <contrib/dev/ath/ah.h> 48 #include <dev/ath/if_athioctl.h> 49 50 #define ATH_TIMEOUT 1000 51 52 #define ATH_RXBUF 40 /* number of RX buffers */ 53 #define ATH_TXBUF 60 /* number of TX buffers */ 54 #define ATH_TXDESC 8 /* number of descriptors per buffer */ 55 56 /* driver-specific node */ 57 struct ath_node { 58 struct ieee80211_node st_node; /* base class */ 59 u_int an_tx_ok; /* tx ok pkt */ 60 u_int an_tx_err; /* tx !ok pkt */ 61 u_int an_tx_retr; /* tx retry count */ 62 int an_tx_upper; /* tx upper rate req cnt */ 63 u_int an_tx_antenna; /* antenna for last good frame */ 64 }; 65 66 struct ath_buf { 67 TAILQ_ENTRY(ath_buf) bf_list; 68 int bf_nseg; 69 bus_dmamap_t bf_dmamap; /* DMA map of the buffer */ 70 struct ath_desc *bf_desc; /* virtual addr of desc */ 71 bus_addr_t bf_daddr; /* physical addr of desc */ 72 struct mbuf *bf_m; /* mbuf for buf */ 73 struct ieee80211_node *bf_node; /* pointer to the node */ 74 bus_size_t bf_mapsize; 75 #define ATH_MAX_SCATTER 64 76 bus_dma_segment_t bf_segs[ATH_MAX_SCATTER]; 77 }; 78 79 struct ath_softc { 80 struct ieee80211com sc_ic; /* IEEE 802.11 common */ 81 device_t sc_dev; 82 bus_space_tag_t sc_st; /* bus space tag */ 83 bus_space_handle_t sc_sh; /* bus space handle */ 84 bus_dma_tag_t sc_dmat; /* bus DMA tag */ 85 struct mtx sc_mtx; /* master lock (recursive) */ 86 struct ath_hal *sc_ah; /* Atheros HAL */ 87 unsigned int sc_invalid : 1,/* disable hardware accesses */ 88 sc_have11g : 1,/* have 11g support */ 89 sc_doani : 1,/* dynamic noise immunity */ 90 sc_probing : 1;/* probing AP on beacon miss */ 91 /* rate tables */ 92 const HAL_RATE_TABLE *sc_rates[IEEE80211_MODE_MAX]; 93 const HAL_RATE_TABLE *sc_currates; /* current rate table */ 94 enum ieee80211_phymode sc_curmode; /* current phy mode */ 95 u_int8_t sc_rixmap[256]; /* IEEE to h/w rate table ix */ 96 HAL_INT sc_imask; /* interrupt mask copy */ 97 98 struct ath_desc *sc_desc; /* TX/RX descriptors */ 99 bus_dma_segment_t sc_dseg; 100 bus_dmamap_t sc_ddmamap; /* DMA map for descriptors */ 101 bus_addr_t sc_desc_paddr; /* physical addr of sc_desc */ 102 bus_addr_t sc_desc_len; /* size of sc_desc */ 103 104 struct task sc_fataltask; /* fatal int processing */ 105 struct task sc_rxorntask; /* rxorn int processing */ 106 107 TAILQ_HEAD(, ath_buf) sc_rxbuf; /* receive buffer */ 108 u_int32_t *sc_rxlink; /* link ptr in last RX desc */ 109 struct task sc_rxtask; /* rx int processing */ 110 111 u_int sc_txhalq; /* HAL q for outgoing frames */ 112 u_int32_t *sc_txlink; /* link ptr in last TX desc */ 113 int sc_tx_timer; /* transmit timeout */ 114 TAILQ_HEAD(, ath_buf) sc_txbuf; /* transmit buffer */ 115 struct mtx sc_txbuflock; /* txbuf lock */ 116 TAILQ_HEAD(, ath_buf) sc_txq; /* transmitting queue */ 117 struct mtx sc_txqlock; /* lock on txq and txlink */ 118 struct task sc_txtask; /* tx int processing */ 119 120 u_int sc_bhalq; /* HAL q for outgoing beacons */ 121 struct ath_buf *sc_bcbuf; /* beacon buffer */ 122 struct ath_buf *sc_bufptr; /* allocated buffer ptr */ 123 struct task sc_swbatask; /* swba int processing */ 124 struct task sc_bmisstask; /* bmiss int processing */ 125 126 struct callout sc_cal_ch; /* callout handle for cals */ 127 struct callout sc_scan_ch; /* callout handle for scan */ 128 struct ath_stats sc_stats; /* interface statistics */ 129 }; 130 131 int ath_attach(u_int16_t, struct ath_softc *); 132 int ath_detach(struct ath_softc *); 133 void ath_resume(struct ath_softc *); 134 void ath_suspend(struct ath_softc *); 135 void ath_shutdown(struct ath_softc *); 136 void ath_intr(void *); 137 138 /* 139 * HAL definitions to comply with local coding convention. 140 */ 141 #define ath_hal_reset(_ah, _opmode, _chan, _outdoor, _pstatus) \ 142 ((*(_ah)->ah_reset)((_ah), (_opmode), (_chan), (_outdoor), (_pstatus))) 143 #define ath_hal_getratetable(_ah, _mode) \ 144 ((*(_ah)->ah_getRateTable)((_ah), (_mode))) 145 #define ath_hal_getmac(_ah, _mac) \ 146 ((*(_ah)->ah_getMacAddress)((_ah), (_mac))) 147 #define ath_hal_detach(_ah) \ 148 ((*(_ah)->ah_detach)((_ah))) 149 #define ath_hal_intrset(_ah, _mask) \ 150 ((*(_ah)->ah_setInterrupts)((_ah), (_mask))) 151 #define ath_hal_intrget(_ah) \ 152 ((*(_ah)->ah_getInterrupts)((_ah))) 153 #define ath_hal_intrpend(_ah) \ 154 ((*(_ah)->ah_isInterruptPending)((_ah))) 155 #define ath_hal_getisr(_ah, _pmask) \ 156 ((*(_ah)->ah_getPendingInterrupts)((_ah), (_pmask))) 157 #define ath_hal_updatetxtriglevel(_ah, _inc) \ 158 ((*(_ah)->ah_updateTxTrigLevel)((_ah), (_inc))) 159 #define ath_hal_setpower(_ah, _mode, _sleepduration) \ 160 ((*(_ah)->ah_setPowerMode)((_ah), (_mode), AH_TRUE, (_sleepduration))) 161 #define ath_hal_keyreset(_ah, _ix) \ 162 ((*(_ah)->ah_resetKeyCacheEntry)((_ah), (_ix))) 163 #define ath_hal_keyset(_ah, _ix, _pk) \ 164 ((*(_ah)->ah_setKeyCacheEntry)((_ah), (_ix), (_pk), NULL, AH_FALSE)) 165 #define ath_hal_keyisvalid(_ah, _ix) \ 166 (((*(_ah)->ah_isKeyCacheEntryValid)((_ah), (_ix)))) 167 #define ath_hal_keysetmac(_ah, _ix, _mac) \ 168 ((*(_ah)->ah_setKeyCacheEntryMac)((_ah), (_ix), (_mac))) 169 #define ath_hal_getrxfilter(_ah) \ 170 ((*(_ah)->ah_getRxFilter)((_ah))) 171 #define ath_hal_setrxfilter(_ah, _filter) \ 172 ((*(_ah)->ah_setRxFilter)((_ah), (_filter))) 173 #define ath_hal_setmcastfilter(_ah, _mfilt0, _mfilt1) \ 174 ((*(_ah)->ah_setMulticastFilter)((_ah), (_mfilt0), (_mfilt1))) 175 #define ath_hal_waitforbeacon(_ah, _bf) \ 176 ((*(_ah)->ah_waitForBeaconDone)((_ah), (_bf)->bf_daddr)) 177 #define ath_hal_putrxbuf(_ah, _bufaddr) \ 178 ((*(_ah)->ah_setRxDP)((_ah), (_bufaddr))) 179 #define ath_hal_gettsf32(_ah) \ 180 ((*(_ah)->ah_getTsf32)((_ah))) 181 #define ath_hal_gettsf64(_ah) \ 182 ((*(_ah)->ah_getTsf64)((_ah))) 183 #define ath_hal_resettsf(_ah) \ 184 ((*(_ah)->ah_resetTsf)((_ah))) 185 #define ath_hal_rxena(_ah) \ 186 ((*(_ah)->ah_enableReceive)((_ah))) 187 #define ath_hal_puttxbuf(_ah, _q, _bufaddr) \ 188 ((*(_ah)->ah_setTxDP)((_ah), (_q), (_bufaddr))) 189 #define ath_hal_gettxbuf(_ah, _q) \ 190 ((*(_ah)->ah_getTxDP)((_ah), (_q))) 191 #define ath_hal_getrxbuf(_ah) \ 192 ((*(_ah)->ah_getRxDP)((_ah))) 193 #define ath_hal_txstart(_ah, _q) \ 194 ((*(_ah)->ah_startTxDma)((_ah), (_q))) 195 #define ath_hal_setchannel(_ah, _chan) \ 196 ((*(_ah)->ah_setChannel)((_ah), (_chan))) 197 #define ath_hal_calibrate(_ah, _chan) \ 198 ((*(_ah)->ah_perCalibration)((_ah), (_chan))) 199 #define ath_hal_setledstate(_ah, _state) \ 200 ((*(_ah)->ah_setLedState)((_ah), (_state))) 201 #define ath_hal_beaconinit(_ah, _opmode, _nextb, _bperiod) \ 202 ((*(_ah)->ah_beaconInit)((_ah), (_opmode), (_nextb), (_bperiod))) 203 #define ath_hal_beaconreset(_ah) \ 204 ((*(_ah)->ah_resetStationBeaconTimers)((_ah))) 205 #define ath_hal_beacontimers(_ah, _bs, _tsf, _dc, _cc) \ 206 ((*(_ah)->ah_setStationBeaconTimers)((_ah), (_bs), (_tsf), \ 207 (_dc), (_cc))) 208 #define ath_hal_setassocid(_ah, _bss, _associd) \ 209 ((*(_ah)->ah_writeAssocid)((_ah), (_bss), (_associd), 0)) 210 #define ath_hal_setopmode(_ah, _opmode) \ 211 ((*(_ah)->ah_setPCUConfig)((_ah), (_opmode))) 212 #define ath_hal_stoptxdma(_ah, _qnum) \ 213 ((*(_ah)->ah_stopTxDma)((_ah), (_qnum))) 214 #define ath_hal_stoppcurecv(_ah) \ 215 ((*(_ah)->ah_stopPcuReceive)((_ah))) 216 #define ath_hal_startpcurecv(_ah) \ 217 ((*(_ah)->ah_startPcuReceive)((_ah))) 218 #define ath_hal_stopdmarecv(_ah) \ 219 ((*(_ah)->ah_stopDmaReceive)((_ah))) 220 #define ath_hal_dumpstate(_ah) \ 221 ((*(_ah)->ah_dumpState)((_ah))) 222 #define ath_hal_dumpeeprom(_ah) \ 223 ((*(_ah)->ah_dumpEeprom)((_ah))) 224 #define ath_hal_dumprfgain(_ah) \ 225 ((*(_ah)->ah_dumpRfGain)((_ah))) 226 #define ath_hal_dumpani(_ah) \ 227 ((*(_ah)->ah_dumpAni)((_ah))) 228 #define ath_hal_setuptxqueue(_ah, _type, _irq) \ 229 ((*(_ah)->ah_setupTxQueue)((_ah), (_type), (_irq))) 230 #define ath_hal_resettxqueue(_ah, _q) \ 231 ((*(_ah)->ah_resetTxQueue)((_ah), (_q))) 232 #define ath_hal_releasetxqueue(_ah, _q) \ 233 ((*(_ah)->ah_releaseTxQueue)((_ah), (_q))) 234 #define ath_hal_hasveol(_ah) \ 235 ((*(_ah)->ah_hasVEOL)((_ah))) 236 #define ath_hal_getrfgain(_ah) \ 237 ((*(_ah)->ah_getRfGain)((_ah))) 238 #define ath_hal_rxmonitor(_ah) \ 239 ((*(_ah)->ah_rxMonitor)((_ah))) 240 241 #define ath_hal_setupbeacondesc(_ah, _ds, _opmode, _flen, _hlen, \ 242 _rate, _antmode) \ 243 ((*(_ah)->ah_setupBeaconDesc)((_ah), (_ds), (_opmode), \ 244 (_flen), (_hlen), (_rate), (_antmode))) 245 #define ath_hal_setuprxdesc(_ah, _ds, _size, _intreq) \ 246 ((*(_ah)->ah_setupRxDesc)((_ah), (_ds), (_size), (_intreq))) 247 #define ath_hal_rxprocdesc(_ah, _ds) \ 248 ((*(_ah)->ah_procRxDesc)((_ah), (_ds))) 249 #define ath_hal_setuptxdesc(_ah, _ds, _plen, _hlen, _atype, _txpow, \ 250 _txr0, _txtr0, _keyix, _ant, _flags, \ 251 _rtsrate, _rtsdura) \ 252 ((*(_ah)->ah_setupTxDesc)((_ah), (_ds), (_plen), (_hlen), (_atype), \ 253 (_txpow), (_txr0), (_txtr0), (_keyix), (_ant), \ 254 (_flags), (_rtsrate), (_rtsdura))) 255 #define ath_hal_setupxtxdesc(_ah, _ds, _short, \ 256 _txr1, _txtr1, _txr2, _txtr2, _txr3, _txtr3) \ 257 ((*(_ah)->ah_setupXTxDesc)((_ah), (_ds), (_short), \ 258 (_txr1), (_txtr1), (_txr2), (_txtr2), (_txr3), (_txtr3))) 259 #define ath_hal_filltxdesc(_ah, _ds, _l, _first, _last) \ 260 ((*(_ah)->ah_fillTxDesc)((_ah), (_ds), (_l), (_first), (_last))) 261 #define ath_hal_txprocdesc(_ah, _ds) \ 262 ((*(_ah)->ah_procTxDesc)((_ah), (_ds))) 263 264 #endif /* _DEV_ATH_ATHVAR_H */ 265