1 /*- 2 * Copyright (c) 2011 Adrian Chadd, Xenion Pty Ltd. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification. 11 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 12 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 13 * redistribution must be conditioned upon including a substantially 14 * similar Disclaimer requirement for further binary redistribution. 15 * 16 * NO WARRANTY 17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 19 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 20 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 21 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 22 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 25 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 27 * THE POSSIBILITY OF SUCH DAMAGES. 28 */ 29 30 #include <sys/cdefs.h> 31 __FBSDID("$FreeBSD$"); 32 33 #include "opt_inet.h" 34 #include "opt_ath.h" 35 #include "opt_wlan.h" 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/sysctl.h> 40 #include <sys/mbuf.h> 41 #include <sys/malloc.h> 42 #include <sys/lock.h> 43 #include <sys/mutex.h> 44 #include <sys/kernel.h> 45 #include <sys/socket.h> 46 #include <sys/sockio.h> 47 #include <sys/errno.h> 48 #include <sys/callout.h> 49 #include <sys/bus.h> 50 #include <sys/endian.h> 51 #include <sys/kthread.h> 52 #include <sys/taskqueue.h> 53 #include <sys/priv.h> 54 55 #include <machine/bus.h> 56 57 #include <net/if.h> 58 #include <net/if_dl.h> 59 #include <net/if_media.h> 60 #include <net/if_types.h> 61 #include <net/if_arp.h> 62 #include <net/ethernet.h> 63 #include <net/if_llc.h> 64 65 #include <net80211/ieee80211_var.h> 66 #include <net80211/ieee80211_regdomain.h> 67 #ifdef IEEE80211_SUPPORT_SUPERG 68 #include <net80211/ieee80211_superg.h> 69 #endif 70 #ifdef IEEE80211_SUPPORT_TDMA 71 #include <net80211/ieee80211_tdma.h> 72 #endif 73 74 #include <net/bpf.h> 75 76 #ifdef INET 77 #include <netinet/in.h> 78 #include <netinet/if_ether.h> 79 #endif 80 81 #include <dev/ath/if_athvar.h> 82 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 83 #include <dev/ath/ath_hal/ah_diagcodes.h> 84 85 #ifdef ATH_TX99_DIAG 86 #include <dev/ath/ath_tx99/ath_tx99.h> 87 #endif 88 89 #include <dev/ath/if_ath_tx.h> /* XXX for some support functions */ 90 #include <dev/ath/if_ath_tx_ht.h> 91 #include <dev/ath/if_athrate.h> 92 #include <dev/ath/if_ath_debug.h> 93 94 /* 95 * XXX net80211? 96 */ 97 #define IEEE80211_AMPDU_SUBFRAME_DEFAULT 32 98 99 #define ATH_AGGR_DELIM_SZ 4 /* delimiter size */ 100 #define ATH_AGGR_MINPLEN 256 /* in bytes, minimum packet length */ 101 /* number of delimiters for encryption padding */ 102 #define ATH_AGGR_ENCRYPTDELIM 10 103 104 /* 105 * returns delimiter padding required given the packet length 106 */ 107 #define ATH_AGGR_GET_NDELIM(_len) \ 108 (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ? \ 109 (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2) 110 111 #define PADBYTES(_len) ((4 - ((_len) % 4)) % 4) 112 113 int ath_max_4ms_framelen[4][32] = { 114 [MCS_HT20] = { 115 3212, 6432, 9648, 12864, 19300, 25736, 28952, 32172, 116 6424, 12852, 19280, 25708, 38568, 51424, 57852, 64280, 117 9628, 19260, 28896, 38528, 57792, 65532, 65532, 65532, 118 12828, 25656, 38488, 51320, 65532, 65532, 65532, 65532, 119 }, 120 [MCS_HT20_SGI] = { 121 3572, 7144, 10720, 14296, 21444, 28596, 32172, 35744, 122 7140, 14284, 21428, 28568, 42856, 57144, 64288, 65532, 123 10700, 21408, 32112, 42816, 64228, 65532, 65532, 65532, 124 14256, 28516, 42780, 57040, 65532, 65532, 65532, 65532, 125 }, 126 [MCS_HT40] = { 127 6680, 13360, 20044, 26724, 40092, 53456, 60140, 65532, 128 13348, 26700, 40052, 53400, 65532, 65532, 65532, 65532, 129 20004, 40008, 60016, 65532, 65532, 65532, 65532, 65532, 130 26644, 53292, 65532, 65532, 65532, 65532, 65532, 65532, 131 }, 132 [MCS_HT40_SGI] = { 133 7420, 14844, 22272, 29696, 44544, 59396, 65532, 65532, 134 14832, 29668, 44504, 59340, 65532, 65532, 65532, 65532, 135 22232, 44464, 65532, 65532, 65532, 65532, 65532, 65532, 136 29616, 59232, 65532, 65532, 65532, 65532, 65532, 65532, 137 } 138 }; 139 140 /* 141 * XXX should be in net80211 142 */ 143 static int ieee80211_mpdudensity_map[] = { 144 0, /* IEEE80211_HTCAP_MPDUDENSITY_NA */ 145 25, /* IEEE80211_HTCAP_MPDUDENSITY_025 */ 146 50, /* IEEE80211_HTCAP_MPDUDENSITY_05 */ 147 100, /* IEEE80211_HTCAP_MPDUDENSITY_1 */ 148 200, /* IEEE80211_HTCAP_MPDUDENSITY_2 */ 149 400, /* IEEE80211_HTCAP_MPDUDENSITY_4 */ 150 800, /* IEEE80211_HTCAP_MPDUDENSITY_8 */ 151 1600, /* IEEE80211_HTCAP_MPDUDENSITY_16 */ 152 }; 153 154 /* 155 * XXX should be in the HAL/net80211 ? 156 */ 157 #define BITS_PER_BYTE 8 158 #define OFDM_PLCP_BITS 22 159 #define HT_RC_2_MCS(_rc) ((_rc) & 0x7f) 160 #define HT_RC_2_STREAMS(_rc) ((((_rc) & 0x78) >> 3) + 1) 161 #define L_STF 8 162 #define L_LTF 8 163 #define L_SIG 4 164 #define HT_SIG 8 165 #define HT_STF 4 166 #define HT_LTF(_ns) (4 * (_ns)) 167 #define SYMBOL_TIME(_ns) ((_ns) << 2) // ns * 4 us 168 #define SYMBOL_TIME_HALFGI(_ns) (((_ns) * 18 + 4) / 5) // ns * 3.6 us 169 #define NUM_SYMBOLS_PER_USEC(_usec) (_usec >> 2) 170 #define NUM_SYMBOLS_PER_USEC_HALFGI(_usec) (((_usec*5)-4)/18) 171 #define IS_HT_RATE(_rate) ((_rate) & 0x80) 172 173 const uint32_t bits_per_symbol[][2] = { 174 /* 20MHz 40MHz */ 175 { 26, 54 }, // 0: BPSK 176 { 52, 108 }, // 1: QPSK 1/2 177 { 78, 162 }, // 2: QPSK 3/4 178 { 104, 216 }, // 3: 16-QAM 1/2 179 { 156, 324 }, // 4: 16-QAM 3/4 180 { 208, 432 }, // 5: 64-QAM 2/3 181 { 234, 486 }, // 6: 64-QAM 3/4 182 { 260, 540 }, // 7: 64-QAM 5/6 183 { 52, 108 }, // 8: BPSK 184 { 104, 216 }, // 9: QPSK 1/2 185 { 156, 324 }, // 10: QPSK 3/4 186 { 208, 432 }, // 11: 16-QAM 1/2 187 { 312, 648 }, // 12: 16-QAM 3/4 188 { 416, 864 }, // 13: 64-QAM 2/3 189 { 468, 972 }, // 14: 64-QAM 3/4 190 { 520, 1080 }, // 15: 64-QAM 5/6 191 { 78, 162 }, // 16: BPSK 192 { 156, 324 }, // 17: QPSK 1/2 193 { 234, 486 }, // 18: QPSK 3/4 194 { 312, 648 }, // 19: 16-QAM 1/2 195 { 468, 972 }, // 20: 16-QAM 3/4 196 { 624, 1296 }, // 21: 64-QAM 2/3 197 { 702, 1458 }, // 22: 64-QAM 3/4 198 { 780, 1620 }, // 23: 64-QAM 5/6 199 { 104, 216 }, // 24: BPSK 200 { 208, 432 }, // 25: QPSK 1/2 201 { 312, 648 }, // 26: QPSK 3/4 202 { 416, 864 }, // 27: 16-QAM 1/2 203 { 624, 1296 }, // 28: 16-QAM 3/4 204 { 832, 1728 }, // 29: 64-QAM 2/3 205 { 936, 1944 }, // 30: 64-QAM 3/4 206 { 1040, 2160 }, // 31: 64-QAM 5/6 207 }; 208 209 /* 210 * Fill in the rate array information based on the current 211 * node configuration and the choices made by the rate 212 * selection code and ath_buf setup code. 213 * 214 * Later on, this may end up also being made by the 215 * rate control code, but for now it can live here. 216 * 217 * This needs to be called just before the packet is 218 * queued to the software queue or hardware queue, 219 * so all of the needed fields in bf_state are setup. 220 */ 221 void 222 ath_tx_rate_fill_rcflags(struct ath_softc *sc, struct ath_buf *bf) 223 { 224 struct ieee80211_node *ni = bf->bf_node; 225 struct ieee80211com *ic = ni->ni_ic; 226 const HAL_RATE_TABLE *rt = sc->sc_currates; 227 struct ath_rc_series *rc = bf->bf_state.bfs_rc; 228 uint8_t rate; 229 int i; 230 231 for (i = 0; i < ATH_RC_NUM; i++) { 232 rc[i].flags = 0; 233 if (rc[i].tries == 0) 234 continue; 235 236 rate = rt->info[rc[i].rix].rateCode; 237 238 /* 239 * Only enable short preamble for legacy rates 240 */ 241 if ((! IS_HT_RATE(rate)) && bf->bf_state.bfs_shpream) 242 rate |= rt->info[rc[i].rix].shortPreamble; 243 244 /* 245 * Save this, used by the TX and completion code 246 */ 247 rc[i].ratecode = rate; 248 249 if (bf->bf_state.bfs_txflags & 250 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) 251 rc[i].flags |= ATH_RC_RTSCTS_FLAG; 252 253 /* Only enable shortgi, 2040, dual-stream if HT is set */ 254 if (IS_HT_RATE(rate)) { 255 rc[i].flags |= ATH_RC_HT_FLAG; 256 257 if (ni->ni_chw == 40) 258 rc[i].flags |= ATH_RC_CW40_FLAG; 259 260 if (ni->ni_chw == 40 && 261 ic->ic_htcaps & IEEE80211_HTCAP_SHORTGI40 && 262 ni->ni_htcap & IEEE80211_HTCAP_SHORTGI40) 263 rc[i].flags |= ATH_RC_SGI_FLAG; 264 265 if (ni->ni_chw == 20 && 266 ic->ic_htcaps & IEEE80211_HTCAP_SHORTGI20 && 267 ni->ni_htcap & IEEE80211_HTCAP_SHORTGI20) 268 rc[i].flags |= ATH_RC_SGI_FLAG; 269 270 /* 271 * If we have STBC TX enabled and the receiver 272 * can receive (at least) 1 stream STBC, AND it's 273 * MCS 0-7, AND we have at least two chains enabled, 274 * enable STBC. 275 */ 276 if (ic->ic_htcaps & IEEE80211_HTCAP_TXSTBC && 277 ni->ni_htcap & IEEE80211_HTCAP_RXSTBC_1STREAM && 278 (sc->sc_cur_txchainmask > 1) && 279 HT_RC_2_STREAMS(rate) == 1) { 280 rc[i].flags |= ATH_RC_STBC_FLAG; 281 } 282 283 /* 284 * XXX TODO: LDPC 285 */ 286 287 /* 288 * Dual / Triple stream rate? 289 */ 290 if (HT_RC_2_STREAMS(rate) == 2) 291 rc[i].flags |= ATH_RC_DS_FLAG; 292 else if (HT_RC_2_STREAMS(rate) == 3) 293 rc[i].flags |= ATH_RC_TS_FLAG; 294 } 295 296 /* 297 * Calculate the maximum TX power cap for the current 298 * node. 299 */ 300 rc[i].tx_power_cap = ieee80211_get_node_txpower(ni); 301 302 /* 303 * Calculate the maximum 4ms frame length based 304 * on the MCS rate, SGI and channel width flags. 305 */ 306 if ((rc[i].flags & ATH_RC_HT_FLAG) && 307 (HT_RC_2_MCS(rate) < 32)) { 308 int j; 309 if (rc[i].flags & ATH_RC_CW40_FLAG) { 310 if (rc[i].flags & ATH_RC_SGI_FLAG) 311 j = MCS_HT40_SGI; 312 else 313 j = MCS_HT40; 314 } else { 315 if (rc[i].flags & ATH_RC_SGI_FLAG) 316 j = MCS_HT20_SGI; 317 else 318 j = MCS_HT20; 319 } 320 rc[i].max4msframelen = 321 ath_max_4ms_framelen[j][HT_RC_2_MCS(rate)]; 322 } else 323 rc[i].max4msframelen = 0; 324 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 325 "%s: i=%d, rate=0x%x, flags=0x%x, max4ms=%d\n", 326 __func__, i, rate, rc[i].flags, rc[i].max4msframelen); 327 } 328 } 329 330 /* 331 * Return the number of delimiters to be added to 332 * meet the minimum required mpdudensity. 333 * 334 * Caller should make sure that the rate is HT. 335 * 336 * TODO: is this delimiter calculation supposed to be the 337 * total frame length, the hdr length, the data length (including 338 * delimiters, padding, CRC, etc) or ? 339 * 340 * TODO: this should ensure that the rate control information 341 * HAS been setup for the first rate. 342 * 343 * TODO: ensure this is only called for MCS rates. 344 * 345 * TODO: enforce MCS < 31 346 */ 347 static int 348 ath_compute_num_delims(struct ath_softc *sc, struct ath_buf *first_bf, 349 uint16_t pktlen) 350 { 351 const HAL_RATE_TABLE *rt = sc->sc_currates; 352 struct ieee80211_node *ni = first_bf->bf_node; 353 struct ieee80211vap *vap = ni->ni_vap; 354 int ndelim, mindelim = 0; 355 int mpdudensity; /* in 1/100'th of a microsecond */ 356 uint8_t rc, rix, flags; 357 int width, half_gi; 358 uint32_t nsymbits, nsymbols; 359 uint16_t minlen; 360 361 /* 362 * vap->iv_ampdu_density is a value, rather than the actual 363 * density. 364 */ 365 if (vap->iv_ampdu_density > IEEE80211_HTCAP_MPDUDENSITY_16) 366 mpdudensity = 1600; /* maximum density */ 367 else 368 mpdudensity = ieee80211_mpdudensity_map[vap->iv_ampdu_density]; 369 370 /* Select standard number of delimiters based on frame length */ 371 ndelim = ATH_AGGR_GET_NDELIM(pktlen); 372 373 /* 374 * If encryption is enabled, add extra delimiters to let the 375 * crypto hardware catch up. This could be tuned per-MAC and 376 * per-rate, but for now we'll simply assume encryption is 377 * always enabled. 378 * 379 * Also note that the Atheros reference driver inserts two 380 * delimiters by default for pre-AR9380 peers. This will 381 * include "that" required delimiter. 382 */ 383 ndelim += ATH_AGGR_ENCRYPTDELIM; 384 385 /* 386 * For AR9380, there's a minimum number of delimeters 387 * required when doing RTS. 388 * 389 * XXX TODO: this is only needed if (a) RTS/CTS is enabled, and 390 * XXX (b) this is the first sub-frame in the aggregate. 391 */ 392 if (sc->sc_use_ent && (sc->sc_ent_cfg & AH_ENT_RTSCTS_DELIM_WAR) 393 && ndelim < AH_FIRST_DESC_NDELIMS) 394 ndelim = AH_FIRST_DESC_NDELIMS; 395 396 /* 397 * If sc_delim_min_pad is non-zero, enforce it as the minimum 398 * pad delimiter count. 399 */ 400 if (sc->sc_delim_min_pad != 0) 401 ndelim = MAX(ndelim, sc->sc_delim_min_pad); 402 403 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 404 "%s: pktlen=%d, ndelim=%d, mpdudensity=%d\n", 405 __func__, pktlen, ndelim, mpdudensity); 406 407 /* 408 * If the MPDU density is 0, we can return here. 409 * Otherwise, we need to convert the desired mpdudensity 410 * into a byte length, based on the rate in the subframe. 411 */ 412 if (mpdudensity == 0) 413 return ndelim; 414 415 /* 416 * Convert desired mpdu density from microeconds to bytes based 417 * on highest rate in rate series (i.e. first rate) to determine 418 * required minimum length for subframe. Take into account 419 * whether high rate is 20 or 40Mhz and half or full GI. 420 */ 421 rix = first_bf->bf_state.bfs_rc[0].rix; 422 rc = rt->info[rix].rateCode; 423 flags = first_bf->bf_state.bfs_rc[0].flags; 424 width = !! (flags & ATH_RC_CW40_FLAG); 425 half_gi = !! (flags & ATH_RC_SGI_FLAG); 426 427 /* 428 * mpdudensity is in 1/100th of a usec, so divide by 100 429 */ 430 if (half_gi) 431 nsymbols = NUM_SYMBOLS_PER_USEC_HALFGI(mpdudensity); 432 else 433 nsymbols = NUM_SYMBOLS_PER_USEC(mpdudensity); 434 nsymbols /= 100; 435 436 if (nsymbols == 0) 437 nsymbols = 1; 438 439 nsymbits = bits_per_symbol[HT_RC_2_MCS(rc)][width]; 440 minlen = (nsymbols * nsymbits) / BITS_PER_BYTE; 441 442 /* 443 * Min length is the minimum frame length for the 444 * required MPDU density. 445 */ 446 if (pktlen < minlen) { 447 mindelim = (minlen - pktlen) / ATH_AGGR_DELIM_SZ; 448 ndelim = MAX(mindelim, ndelim); 449 } 450 451 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 452 "%s: pktlen=%d, minlen=%d, rix=%x, rc=%x, width=%d, hgi=%d, ndelim=%d\n", 453 __func__, pktlen, minlen, rix, rc, width, half_gi, ndelim); 454 455 return ndelim; 456 } 457 458 /* 459 * Fetch the aggregation limit. 460 * 461 * It's the lowest of the four rate series 4ms frame length. 462 */ 463 static int 464 ath_get_aggr_limit(struct ath_softc *sc, struct ath_buf *bf) 465 { 466 int amin = ATH_AGGR_MAXSIZE; 467 int i; 468 469 if (sc->sc_aggr_limit > 0 && sc->sc_aggr_limit < ATH_AGGR_MAXSIZE) 470 amin = sc->sc_aggr_limit; 471 472 for (i = 0; i < ATH_RC_NUM; i++) { 473 if (bf->bf_state.bfs_rc[i].tries == 0) 474 continue; 475 amin = MIN(amin, bf->bf_state.bfs_rc[i].max4msframelen); 476 } 477 478 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: max frame len= %d\n", 479 __func__, amin); 480 481 return amin; 482 } 483 484 /* 485 * Setup a 11n rate series structure 486 * 487 * This should be called for both legacy and MCS rates. 488 * 489 * This uses the rate series stuf from ath_tx_rate_fill_rcflags(). 490 * 491 * It, along with ath_buf_set_rate, must be called -after- a burst 492 * or aggregate is setup. 493 */ 494 static void 495 ath_rateseries_setup(struct ath_softc *sc, struct ieee80211_node *ni, 496 struct ath_buf *bf, HAL_11N_RATE_SERIES *series) 497 { 498 struct ieee80211com *ic = ni->ni_ic; 499 struct ath_hal *ah = sc->sc_ah; 500 HAL_BOOL shortPreamble = AH_FALSE; 501 const HAL_RATE_TABLE *rt = sc->sc_currates; 502 int i; 503 int pktlen; 504 struct ath_rc_series *rc = bf->bf_state.bfs_rc; 505 506 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 507 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) 508 shortPreamble = AH_TRUE; 509 510 /* 511 * If this is the first frame in an aggregate series, 512 * use the aggregate length. 513 */ 514 if (bf->bf_state.bfs_aggr) 515 pktlen = bf->bf_state.bfs_al; 516 else 517 pktlen = bf->bf_state.bfs_pktlen; 518 519 /* 520 * XXX TODO: modify this routine to use the bfs_rc[x].flags 521 * XXX fields. 522 */ 523 memset(series, 0, sizeof(HAL_11N_RATE_SERIES) * 4); 524 for (i = 0; i < ATH_RC_NUM; i++) { 525 /* Only set flags for actual TX attempts */ 526 if (rc[i].tries == 0) 527 continue; 528 529 series[i].Tries = rc[i].tries; 530 531 /* 532 * XXX TODO: When the NIC is capable of three stream TX, 533 * transmit 1/2 stream rates on two streams. 534 * 535 * This reduces the power consumption of the NIC and 536 * keeps it within the PCIe slot power limits. 537 */ 538 series[i].ChSel = sc->sc_cur_txchainmask; 539 540 /* 541 * Setup rate and TX power cap for this series. 542 */ 543 series[i].Rate = rt->info[rc[i].rix].rateCode; 544 series[i].RateIndex = rc[i].rix; 545 series[i].tx_power_cap = rc[i].tx_power_cap; 546 547 /* 548 * Enable RTS/CTS as appropriate. 549 */ 550 if (rc[i].flags & ATH_RC_RTSCTS_FLAG) 551 series[i].RateFlags |= HAL_RATESERIES_RTS_CTS; 552 553 /* 554 * 11n rate? Update 11n flags. 555 */ 556 if (rc[i].flags & ATH_RC_HT_FLAG) { 557 if (rc[i].flags & ATH_RC_CW40_FLAG) 558 series[i].RateFlags |= HAL_RATESERIES_2040; 559 560 if (rc[i].flags & ATH_RC_SGI_FLAG) 561 series[i].RateFlags |= HAL_RATESERIES_HALFGI; 562 563 if (rc[i].flags & ATH_RC_STBC_FLAG) 564 series[i].RateFlags |= HAL_RATESERIES_STBC; 565 } 566 567 /* 568 * PktDuration doesn't include slot, ACK, RTS, etc timing - 569 * it's just the packet duration 570 */ 571 if (rc[i].flags & ATH_RC_HT_FLAG) { 572 series[i].PktDuration = 573 ath_computedur_ht(pktlen 574 , series[i].Rate 575 , HT_RC_2_STREAMS(series[i].Rate) 576 , series[i].RateFlags & HAL_RATESERIES_2040 577 , series[i].RateFlags & HAL_RATESERIES_HALFGI); 578 } else { 579 if (shortPreamble) 580 series[i].Rate |= 581 rt->info[rc[i].rix].shortPreamble; 582 series[i].PktDuration = ath_hal_computetxtime(ah, 583 rt, pktlen, rc[i].rix, shortPreamble); 584 } 585 } 586 } 587 588 #if 0 589 static void 590 ath_rateseries_print(struct ath_softc *sc, HAL_11N_RATE_SERIES *series) 591 { 592 int i; 593 for (i = 0; i < ATH_RC_NUM; i++) { 594 device_printf(sc->sc_dev ,"series %d: rate %x; tries %d; " 595 "pktDuration %d; chSel %d; txpowcap %d, rateFlags %x\n", 596 i, 597 series[i].Rate, 598 series[i].Tries, 599 series[i].PktDuration, 600 series[i].ChSel, 601 series[i].tx_power_cap, 602 series[i].RateFlags); 603 } 604 } 605 #endif 606 607 /* 608 * Setup the 11n rate scenario and burst duration for the given TX descriptor 609 * list. 610 * 611 * This isn't useful for sending beacon frames, which has different needs 612 * wrt what's passed into the rate scenario function. 613 */ 614 void 615 ath_buf_set_rate(struct ath_softc *sc, struct ieee80211_node *ni, 616 struct ath_buf *bf) 617 { 618 HAL_11N_RATE_SERIES series[4]; 619 struct ath_desc *ds = bf->bf_desc; 620 struct ath_hal *ah = sc->sc_ah; 621 int is_pspoll = (bf->bf_state.bfs_atype == HAL_PKT_TYPE_PSPOLL); 622 int ctsrate = bf->bf_state.bfs_ctsrate; 623 int flags = bf->bf_state.bfs_txflags; 624 625 /* Setup rate scenario */ 626 memset(&series, 0, sizeof(series)); 627 628 ath_rateseries_setup(sc, ni, bf, series); 629 630 #if 0 631 ath_rateseries_print(sc, series); 632 #endif 633 634 /* Set rate scenario */ 635 /* 636 * Note: Don't allow hardware to override the duration on 637 * ps-poll packets. 638 */ 639 ath_hal_set11nratescenario(ah, ds, 640 !is_pspoll, /* whether to override the duration or not */ 641 ctsrate, /* rts/cts rate */ 642 series, /* 11n rate series */ 643 4, /* number of series */ 644 flags); 645 646 /* Set burst duration */ 647 /* 648 * This is only required when doing 11n burst, not aggregation 649 * ie, if there's a second frame in a RIFS or A-MPDU burst 650 * w/ >1 A-MPDU frame bursting back to back. 651 * Normal A-MPDU doesn't do bursting -between- aggregates. 652 * 653 * .. and it's highly likely this won't ever be implemented 654 */ 655 //ath_hal_set11nburstduration(ah, ds, 8192); 656 } 657 658 /* 659 * Form an aggregate packet list. 660 * 661 * This function enforces the aggregate restrictions/requirements. 662 * 663 * These are: 664 * 665 * + The aggregate size maximum (64k for AR9160 and later, 8K for 666 * AR5416 when doing RTS frame protection.) 667 * + Maximum number of sub-frames for an aggregate 668 * + The aggregate delimiter size, giving MACs time to do whatever is 669 * needed before each frame 670 * + Enforce the BAW limit 671 * 672 * Each descriptor queued should have the DMA setup. 673 * The rate series, descriptor setup, linking, etc is all done 674 * externally. This routine simply chains them together. 675 * ath_tx_setds_11n() will take care of configuring the per- 676 * descriptor setup, and ath_buf_set_rate() will configure the 677 * rate control. 678 * 679 * The TID lock is required for the entirety of this function. 680 * 681 * If some code in another thread adds to the head of this 682 * list, very strange behaviour will occur. Since retransmission is the 683 * only reason this will occur, and this routine is designed to be called 684 * from within the scheduler task, it won't ever clash with the completion 685 * task. 686 * 687 * So if you want to call this from an upper layer context (eg, to direct- 688 * dispatch aggregate frames to the hardware), please keep this in mind. 689 */ 690 ATH_AGGR_STATUS 691 ath_tx_form_aggr(struct ath_softc *sc, struct ath_node *an, 692 struct ath_tid *tid, ath_bufhead *bf_q) 693 { 694 //struct ieee80211_node *ni = &an->an_node; 695 struct ath_buf *bf, *bf_first = NULL, *bf_prev = NULL; 696 int nframes = 0; 697 uint16_t aggr_limit = 0, al = 0, bpad = 0, al_delta, h_baw; 698 struct ieee80211_tx_ampdu *tap; 699 int status = ATH_AGGR_DONE; 700 int prev_frames = 0; /* XXX for AR5416 burst, not done here */ 701 int prev_al = 0; /* XXX also for AR5416 burst */ 702 703 ATH_TX_LOCK_ASSERT(sc); 704 705 tap = ath_tx_get_tx_tid(an, tid->tid); 706 if (tap == NULL) { 707 status = ATH_AGGR_ERROR; 708 goto finish; 709 } 710 711 h_baw = tap->txa_wnd / 2; 712 713 for (;;) { 714 bf = ATH_TID_FIRST(tid); 715 if (bf_first == NULL) 716 bf_first = bf; 717 if (bf == NULL) { 718 status = ATH_AGGR_DONE; 719 break; 720 } else { 721 /* 722 * It's the first frame; 723 * set the aggregation limit based on the 724 * rate control decision that has been made. 725 */ 726 aggr_limit = ath_get_aggr_limit(sc, bf_first); 727 } 728 729 /* Set this early just so things don't get confused */ 730 bf->bf_next = NULL; 731 732 /* 733 * If the frame doesn't have a sequence number that we're 734 * tracking in the BAW (eg NULL QOS data frame), we can't 735 * aggregate it. Stop the aggregation process; the sender 736 * can then TX what's in the list thus far and then 737 * TX the frame individually. 738 */ 739 if (! bf->bf_state.bfs_dobaw) { 740 status = ATH_AGGR_NONAGGR; 741 break; 742 } 743 744 /* 745 * If any of the rates are non-HT, this packet 746 * can't be aggregated. 747 * XXX TODO: add a bf_state flag which gets marked 748 * if any active rate is non-HT. 749 */ 750 751 /* 752 * do not exceed aggregation limit 753 */ 754 al_delta = ATH_AGGR_DELIM_SZ + bf->bf_state.bfs_pktlen; 755 if (nframes && 756 (aggr_limit < (al + bpad + al_delta + prev_al))) { 757 status = ATH_AGGR_LIMITED; 758 break; 759 } 760 761 /* 762 * If RTS/CTS is set on the first frame, enforce 763 * the RTS aggregate limit. 764 */ 765 if (bf_first->bf_state.bfs_txflags & 766 (HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA)) { 767 if (nframes && 768 (sc->sc_rts_aggr_limit < 769 (al + bpad + al_delta + prev_al))) { 770 status = ATH_AGGR_8K_LIMITED; 771 break; 772 } 773 } 774 775 /* 776 * Do not exceed subframe limit. 777 */ 778 if ((nframes + prev_frames) >= MIN((h_baw), 779 IEEE80211_AMPDU_SUBFRAME_DEFAULT)) { 780 status = ATH_AGGR_LIMITED; 781 break; 782 } 783 784 /* 785 * If the current frame has an RTS/CTS configuration 786 * that differs from the first frame, override the 787 * subsequent frame with this config. 788 */ 789 if (bf != bf_first) { 790 bf->bf_state.bfs_txflags &= 791 ~ (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 792 bf->bf_state.bfs_txflags |= 793 bf_first->bf_state.bfs_txflags & 794 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 795 } 796 797 /* 798 * If the packet has a sequence number, do not 799 * step outside of the block-ack window. 800 */ 801 if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 802 SEQNO(bf->bf_state.bfs_seqno))) { 803 status = ATH_AGGR_BAW_CLOSED; 804 break; 805 } 806 807 /* 808 * this packet is part of an aggregate. 809 */ 810 ATH_TID_REMOVE(tid, bf, bf_list); 811 812 /* The TID lock is required for the BAW update */ 813 ath_tx_addto_baw(sc, an, tid, bf); 814 bf->bf_state.bfs_addedbaw = 1; 815 816 /* 817 * XXX enforce ACK for aggregate frames (this needs to be 818 * XXX handled more gracefully? 819 */ 820 if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 821 device_printf(sc->sc_dev, 822 "%s: HAL_TXDESC_NOACK set for an aggregate frame?\n", 823 __func__); 824 bf->bf_state.bfs_txflags &= (~HAL_TXDESC_NOACK); 825 } 826 827 /* 828 * Add the now owned buffer (which isn't 829 * on the software TXQ any longer) to our 830 * aggregate frame list. 831 */ 832 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 833 nframes ++; 834 835 /* Completion handler */ 836 bf->bf_comp = ath_tx_aggr_comp; 837 838 /* 839 * add padding for previous frame to aggregation length 840 */ 841 al += bpad + al_delta; 842 843 /* 844 * Calculate delimiters needed for the current frame 845 */ 846 bf->bf_state.bfs_ndelim = 847 ath_compute_num_delims(sc, bf_first, 848 bf->bf_state.bfs_pktlen); 849 850 /* 851 * Calculate the padding needed from this set of delimiters, 852 * used when calculating if the next frame will fit in 853 * the aggregate. 854 */ 855 bpad = PADBYTES(al_delta) + (bf->bf_state.bfs_ndelim << 2); 856 857 /* 858 * Chain the buffers together 859 */ 860 if (bf_prev) 861 bf_prev->bf_next = bf; 862 bf_prev = bf; 863 864 /* 865 * If we're leaking frames, just return at this point; 866 * we've queued a single frame and we don't want to add 867 * any more. 868 */ 869 if (tid->an->an_leak_count) { 870 status = ATH_AGGR_LEAK_CLOSED; 871 break; 872 } 873 874 #if 0 875 /* 876 * terminate aggregation on a small packet boundary 877 */ 878 if (bf->bf_state.bfs_pktlen < ATH_AGGR_MINPLEN) { 879 status = ATH_AGGR_SHORTPKT; 880 break; 881 } 882 #endif 883 884 } 885 886 finish: 887 /* 888 * Just in case the list was empty when we tried to 889 * dequeue a packet .. 890 */ 891 if (bf_first) { 892 bf_first->bf_state.bfs_al = al; 893 bf_first->bf_state.bfs_nframes = nframes; 894 } 895 return status; 896 } 897