1 /*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer, 11 * without modification. 12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14 * redistribution must be conditioned upon including a substantially 15 * similar Disclaimer requirement for further binary redistribution. 16 * 17 * NO WARRANTY 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGES. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 /* 35 * Driver for the Atheros Wireless LAN controller. 36 * 37 * This software is derived from work of Atsushi Onoe; his contribution 38 * is greatly appreciated. 39 */ 40 41 #include "opt_inet.h" 42 #include "opt_ath.h" 43 #include "opt_wlan.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/sysctl.h> 48 #include <sys/mbuf.h> 49 #include <sys/malloc.h> 50 #include <sys/lock.h> 51 #include <sys/mutex.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/sockio.h> 55 #include <sys/errno.h> 56 #include <sys/callout.h> 57 #include <sys/bus.h> 58 #include <sys/endian.h> 59 #include <sys/kthread.h> 60 #include <sys/taskqueue.h> 61 #include <sys/priv.h> 62 #include <sys/ktr.h> 63 64 #include <machine/bus.h> 65 66 #include <net/if.h> 67 #include <net/if_var.h> 68 #include <net/if_dl.h> 69 #include <net/if_media.h> 70 #include <net/if_types.h> 71 #include <net/if_arp.h> 72 #include <net/ethernet.h> 73 #include <net/if_llc.h> 74 75 #include <net80211/ieee80211_var.h> 76 #include <net80211/ieee80211_regdomain.h> 77 #ifdef IEEE80211_SUPPORT_SUPERG 78 #include <net80211/ieee80211_superg.h> 79 #endif 80 #ifdef IEEE80211_SUPPORT_TDMA 81 #include <net80211/ieee80211_tdma.h> 82 #endif 83 #include <net80211/ieee80211_ht.h> 84 85 #include <net/bpf.h> 86 87 #ifdef INET 88 #include <netinet/in.h> 89 #include <netinet/if_ether.h> 90 #endif 91 92 #include <dev/ath/if_athvar.h> 93 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 94 #include <dev/ath/ath_hal/ah_diagcodes.h> 95 96 #include <dev/ath/if_ath_debug.h> 97 98 #ifdef ATH_TX99_DIAG 99 #include <dev/ath/ath_tx99/ath_tx99.h> 100 #endif 101 102 #include <dev/ath/if_ath_misc.h> 103 #include <dev/ath/if_ath_tx.h> 104 #include <dev/ath/if_ath_tx_ht.h> 105 106 #ifdef ATH_DEBUG_ALQ 107 #include <dev/ath/if_ath_alq.h> 108 #endif 109 110 /* 111 * How many retries to perform in software 112 */ 113 #define SWMAX_RETRIES 10 114 115 /* 116 * What queue to throw the non-QoS TID traffic into 117 */ 118 #define ATH_NONQOS_TID_AC WME_AC_VO 119 120 #if 0 121 static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an); 122 #endif 123 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, 124 int tid); 125 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, 126 int tid); 127 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc, 128 struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0); 129 static int ath_tx_action_frame_override_queue(struct ath_softc *sc, 130 struct ieee80211_node *ni, struct mbuf *m0, int *tid); 131 static struct ath_buf * 132 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 133 struct ath_tid *tid, struct ath_buf *bf); 134 135 #ifdef ATH_DEBUG_ALQ 136 void 137 ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first) 138 { 139 struct ath_buf *bf; 140 int i, n; 141 const char *ds; 142 143 /* XXX we should skip out early if debugging isn't enabled! */ 144 bf = bf_first; 145 146 while (bf != NULL) { 147 /* XXX should ensure bf_nseg > 0! */ 148 if (bf->bf_nseg == 0) 149 break; 150 n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; 151 for (i = 0, ds = (const char *) bf->bf_desc; 152 i < n; 153 i++, ds += sc->sc_tx_desclen) { 154 if_ath_alq_post(&sc->sc_alq, 155 ATH_ALQ_EDMA_TXDESC, 156 sc->sc_tx_desclen, 157 ds); 158 } 159 bf = bf->bf_next; 160 } 161 } 162 #endif /* ATH_DEBUG_ALQ */ 163 164 /* 165 * Whether to use the 11n rate scenario functions or not 166 */ 167 static inline int 168 ath_tx_is_11n(struct ath_softc *sc) 169 { 170 return ((sc->sc_ah->ah_magic == 0x20065416) || 171 (sc->sc_ah->ah_magic == 0x19741014)); 172 } 173 174 /* 175 * Obtain the current TID from the given frame. 176 * 177 * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.) 178 * This has implications for which AC/priority the packet is placed 179 * in. 180 */ 181 static int 182 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0) 183 { 184 const struct ieee80211_frame *wh; 185 int pri = M_WME_GETAC(m0); 186 187 wh = mtod(m0, const struct ieee80211_frame *); 188 if (! IEEE80211_QOS_HAS_SEQ(wh)) 189 return IEEE80211_NONQOS_TID; 190 else 191 return WME_AC_TO_TID(pri); 192 } 193 194 static void 195 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) 196 { 197 struct ieee80211_frame *wh; 198 199 wh = mtod(bf->bf_m, struct ieee80211_frame *); 200 /* Only update/resync if needed */ 201 if (bf->bf_state.bfs_isretried == 0) { 202 wh->i_fc[1] |= IEEE80211_FC1_RETRY; 203 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 204 BUS_DMASYNC_PREWRITE); 205 } 206 bf->bf_state.bfs_isretried = 1; 207 bf->bf_state.bfs_retries ++; 208 } 209 210 /* 211 * Determine what the correct AC queue for the given frame 212 * should be. 213 * 214 * This code assumes that the TIDs map consistently to 215 * the underlying hardware (or software) ath_txq. 216 * Since the sender may try to set an AC which is 217 * arbitrary, non-QoS TIDs may end up being put on 218 * completely different ACs. There's no way to put a 219 * TID into multiple ath_txq's for scheduling, so 220 * for now we override the AC/TXQ selection and set 221 * non-QOS TID frames into the BE queue. 222 * 223 * This may be completely incorrect - specifically, 224 * some management frames may end up out of order 225 * compared to the QoS traffic they're controlling. 226 * I'll look into this later. 227 */ 228 static int 229 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0) 230 { 231 const struct ieee80211_frame *wh; 232 int pri = M_WME_GETAC(m0); 233 wh = mtod(m0, const struct ieee80211_frame *); 234 if (IEEE80211_QOS_HAS_SEQ(wh)) 235 return pri; 236 237 return ATH_NONQOS_TID_AC; 238 } 239 240 void 241 ath_txfrag_cleanup(struct ath_softc *sc, 242 ath_bufhead *frags, struct ieee80211_node *ni) 243 { 244 struct ath_buf *bf, *next; 245 246 ATH_TXBUF_LOCK_ASSERT(sc); 247 248 TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) { 249 /* NB: bf assumed clean */ 250 TAILQ_REMOVE(frags, bf, bf_list); 251 ath_returnbuf_head(sc, bf); 252 ieee80211_node_decref(ni); 253 } 254 } 255 256 /* 257 * Setup xmit of a fragmented frame. Allocate a buffer 258 * for each frag and bump the node reference count to 259 * reflect the held reference to be setup by ath_tx_start. 260 */ 261 int 262 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags, 263 struct mbuf *m0, struct ieee80211_node *ni) 264 { 265 struct mbuf *m; 266 struct ath_buf *bf; 267 268 ATH_TXBUF_LOCK(sc); 269 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) { 270 /* XXX non-management? */ 271 bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL); 272 if (bf == NULL) { /* out of buffers, cleanup */ 273 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n", 274 __func__); 275 ath_txfrag_cleanup(sc, frags, ni); 276 break; 277 } 278 ieee80211_node_incref(ni); 279 TAILQ_INSERT_TAIL(frags, bf, bf_list); 280 } 281 ATH_TXBUF_UNLOCK(sc); 282 283 return !TAILQ_EMPTY(frags); 284 } 285 286 static int 287 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0) 288 { 289 struct mbuf *m; 290 int error; 291 292 /* 293 * Load the DMA map so any coalescing is done. This 294 * also calculates the number of descriptors we need. 295 */ 296 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 297 bf->bf_segs, &bf->bf_nseg, 298 BUS_DMA_NOWAIT); 299 if (error == EFBIG) { 300 /* XXX packet requires too many descriptors */ 301 bf->bf_nseg = ATH_MAX_SCATTER + 1; 302 } else if (error != 0) { 303 sc->sc_stats.ast_tx_busdma++; 304 ieee80211_free_mbuf(m0); 305 return error; 306 } 307 /* 308 * Discard null packets and check for packets that 309 * require too many TX descriptors. We try to convert 310 * the latter to a cluster. 311 */ 312 if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */ 313 sc->sc_stats.ast_tx_linear++; 314 m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER); 315 if (m == NULL) { 316 ieee80211_free_mbuf(m0); 317 sc->sc_stats.ast_tx_nombuf++; 318 return ENOMEM; 319 } 320 m0 = m; 321 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 322 bf->bf_segs, &bf->bf_nseg, 323 BUS_DMA_NOWAIT); 324 if (error != 0) { 325 sc->sc_stats.ast_tx_busdma++; 326 ieee80211_free_mbuf(m0); 327 return error; 328 } 329 KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER, 330 ("too many segments after defrag; nseg %u", bf->bf_nseg)); 331 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 332 sc->sc_stats.ast_tx_nodata++; 333 ieee80211_free_mbuf(m0); 334 return EIO; 335 } 336 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n", 337 __func__, m0, m0->m_pkthdr.len); 338 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 339 bf->bf_m = m0; 340 341 return 0; 342 } 343 344 /* 345 * Chain together segments+descriptors for a frame - 11n or otherwise. 346 * 347 * For aggregates, this is called on each frame in the aggregate. 348 */ 349 static void 350 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0, 351 struct ath_buf *bf, int is_aggr, int is_first_subframe, 352 int is_last_subframe) 353 { 354 struct ath_hal *ah = sc->sc_ah; 355 char *ds; 356 int i, bp, dsp; 357 HAL_DMA_ADDR bufAddrList[4]; 358 uint32_t segLenList[4]; 359 int numTxMaps = 1; 360 int isFirstDesc = 1; 361 362 /* 363 * XXX There's txdma and txdma_mgmt; the descriptor 364 * sizes must match. 365 */ 366 struct ath_descdma *dd = &sc->sc_txdma; 367 368 /* 369 * Fillin the remainder of the descriptor info. 370 */ 371 372 /* 373 * We need the number of TX data pointers in each descriptor. 374 * EDMA and later chips support 4 TX buffers per descriptor; 375 * previous chips just support one. 376 */ 377 numTxMaps = sc->sc_tx_nmaps; 378 379 /* 380 * For EDMA and later chips ensure the TX map is fully populated 381 * before advancing to the next descriptor. 382 */ 383 ds = (char *) bf->bf_desc; 384 bp = dsp = 0; 385 bzero(bufAddrList, sizeof(bufAddrList)); 386 bzero(segLenList, sizeof(segLenList)); 387 for (i = 0; i < bf->bf_nseg; i++) { 388 bufAddrList[bp] = bf->bf_segs[i].ds_addr; 389 segLenList[bp] = bf->bf_segs[i].ds_len; 390 bp++; 391 392 /* 393 * Go to the next segment if this isn't the last segment 394 * and there's space in the current TX map. 395 */ 396 if ((i != bf->bf_nseg - 1) && (bp < numTxMaps)) 397 continue; 398 399 /* 400 * Last segment or we're out of buffer pointers. 401 */ 402 bp = 0; 403 404 if (i == bf->bf_nseg - 1) 405 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 406 else 407 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 408 bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 409 410 /* 411 * XXX This assumes that bfs_txq is the actual destination 412 * hardware queue at this point. It may not have been 413 * assigned, it may actually be pointing to the multicast 414 * software TXQ id. These must be fixed! 415 */ 416 ath_hal_filltxdesc(ah, (struct ath_desc *) ds 417 , bufAddrList 418 , segLenList 419 , bf->bf_descid /* XXX desc id */ 420 , bf->bf_state.bfs_tx_queue 421 , isFirstDesc /* first segment */ 422 , i == bf->bf_nseg - 1 /* last segment */ 423 , (struct ath_desc *) ds0 /* first descriptor */ 424 ); 425 426 /* 427 * Make sure the 11n aggregate fields are cleared. 428 * 429 * XXX TODO: this doesn't need to be called for 430 * aggregate frames; as it'll be called on all 431 * sub-frames. Since the descriptors are in 432 * non-cacheable memory, this leads to some 433 * rather slow writes on MIPS/ARM platforms. 434 */ 435 if (ath_tx_is_11n(sc)) 436 ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds); 437 438 /* 439 * If 11n is enabled, set it up as if it's an aggregate 440 * frame. 441 */ 442 if (is_last_subframe) { 443 ath_hal_set11n_aggr_last(sc->sc_ah, 444 (struct ath_desc *) ds); 445 } else if (is_aggr) { 446 /* 447 * This clears the aggrlen field; so 448 * the caller needs to call set_aggr_first()! 449 * 450 * XXX TODO: don't call this for the first 451 * descriptor in the first frame in an 452 * aggregate! 453 */ 454 ath_hal_set11n_aggr_middle(sc->sc_ah, 455 (struct ath_desc *) ds, 456 bf->bf_state.bfs_ndelim); 457 } 458 isFirstDesc = 0; 459 bf->bf_lastds = (struct ath_desc *) ds; 460 461 /* 462 * Don't forget to skip to the next descriptor. 463 */ 464 ds += sc->sc_tx_desclen; 465 dsp++; 466 467 /* 468 * .. and don't forget to blank these out! 469 */ 470 bzero(bufAddrList, sizeof(bufAddrList)); 471 bzero(segLenList, sizeof(segLenList)); 472 } 473 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 474 } 475 476 /* 477 * Set the rate control fields in the given descriptor based on 478 * the bf_state fields and node state. 479 * 480 * The bfs fields should already be set with the relevant rate 481 * control information, including whether MRR is to be enabled. 482 * 483 * Since the FreeBSD HAL currently sets up the first TX rate 484 * in ath_hal_setuptxdesc(), this will setup the MRR 485 * conditionally for the pre-11n chips, and call ath_buf_set_rate 486 * unconditionally for 11n chips. These require the 11n rate 487 * scenario to be set if MCS rates are enabled, so it's easier 488 * to just always call it. The caller can then only set rates 2, 3 489 * and 4 if multi-rate retry is needed. 490 */ 491 static void 492 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni, 493 struct ath_buf *bf) 494 { 495 struct ath_rc_series *rc = bf->bf_state.bfs_rc; 496 497 /* If mrr is disabled, blank tries 1, 2, 3 */ 498 if (! bf->bf_state.bfs_ismrr) 499 rc[1].tries = rc[2].tries = rc[3].tries = 0; 500 501 #if 0 502 /* 503 * If NOACK is set, just set ntries=1. 504 */ 505 else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 506 rc[1].tries = rc[2].tries = rc[3].tries = 0; 507 rc[0].tries = 1; 508 } 509 #endif 510 511 /* 512 * Always call - that way a retried descriptor will 513 * have the MRR fields overwritten. 514 * 515 * XXX TODO: see if this is really needed - setting up 516 * the first descriptor should set the MRR fields to 0 517 * for us anyway. 518 */ 519 if (ath_tx_is_11n(sc)) { 520 ath_buf_set_rate(sc, ni, bf); 521 } else { 522 ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc 523 , rc[1].ratecode, rc[1].tries 524 , rc[2].ratecode, rc[2].tries 525 , rc[3].ratecode, rc[3].tries 526 ); 527 } 528 } 529 530 /* 531 * Setup segments+descriptors for an 11n aggregate. 532 * bf_first is the first buffer in the aggregate. 533 * The descriptor list must already been linked together using 534 * bf->bf_next. 535 */ 536 static void 537 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first) 538 { 539 struct ath_buf *bf, *bf_prev = NULL; 540 struct ath_desc *ds0 = bf_first->bf_desc; 541 542 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n", 543 __func__, bf_first->bf_state.bfs_nframes, 544 bf_first->bf_state.bfs_al); 545 546 bf = bf_first; 547 548 if (bf->bf_state.bfs_txrate0 == 0) 549 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n", 550 __func__, bf, 0); 551 if (bf->bf_state.bfs_rc[0].ratecode == 0) 552 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n", 553 __func__, bf, 0); 554 555 /* 556 * Setup all descriptors of all subframes - this will 557 * call ath_hal_set11naggrmiddle() on every frame. 558 */ 559 while (bf != NULL) { 560 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 561 "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n", 562 __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen, 563 SEQNO(bf->bf_state.bfs_seqno)); 564 565 /* 566 * Setup the initial fields for the first descriptor - all 567 * the non-11n specific stuff. 568 */ 569 ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc 570 , bf->bf_state.bfs_pktlen /* packet length */ 571 , bf->bf_state.bfs_hdrlen /* header length */ 572 , bf->bf_state.bfs_atype /* Atheros packet type */ 573 , bf->bf_state.bfs_txpower /* txpower */ 574 , bf->bf_state.bfs_txrate0 575 , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 576 , bf->bf_state.bfs_keyix /* key cache index */ 577 , bf->bf_state.bfs_txantenna /* antenna mode */ 578 , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */ 579 , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 580 , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 581 ); 582 583 /* 584 * First descriptor? Setup the rate control and initial 585 * aggregate header information. 586 */ 587 if (bf == bf_first) { 588 /* 589 * setup first desc with rate and aggr info 590 */ 591 ath_tx_set_ratectrl(sc, bf->bf_node, bf); 592 } 593 594 /* 595 * Setup the descriptors for a multi-descriptor frame. 596 * This is both aggregate and non-aggregate aware. 597 */ 598 ath_tx_chaindesclist(sc, ds0, bf, 599 1, /* is_aggr */ 600 !! (bf == bf_first), /* is_first_subframe */ 601 !! (bf->bf_next == NULL) /* is_last_subframe */ 602 ); 603 604 if (bf == bf_first) { 605 /* 606 * Initialise the first 11n aggregate with the 607 * aggregate length and aggregate enable bits. 608 */ 609 ath_hal_set11n_aggr_first(sc->sc_ah, 610 ds0, 611 bf->bf_state.bfs_al, 612 bf->bf_state.bfs_ndelim); 613 } 614 615 /* 616 * Link the last descriptor of the previous frame 617 * to the beginning descriptor of this frame. 618 */ 619 if (bf_prev != NULL) 620 ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 621 bf->bf_daddr); 622 623 /* Save a copy so we can link the next descriptor in */ 624 bf_prev = bf; 625 bf = bf->bf_next; 626 } 627 628 /* 629 * Set the first descriptor bf_lastds field to point to 630 * the last descriptor in the last subframe, that's where 631 * the status update will occur. 632 */ 633 bf_first->bf_lastds = bf_prev->bf_lastds; 634 635 /* 636 * And bf_last in the first descriptor points to the end of 637 * the aggregate list. 638 */ 639 bf_first->bf_last = bf_prev; 640 641 /* 642 * For non-AR9300 NICs, which require the rate control 643 * in the final descriptor - let's set that up now. 644 * 645 * This is because the filltxdesc() HAL call doesn't 646 * populate the last segment with rate control information 647 * if firstSeg is also true. For non-aggregate frames 648 * that is fine, as the first frame already has rate control 649 * info. But if the last frame in an aggregate has one 650 * descriptor, both firstseg and lastseg will be true and 651 * the rate info isn't copied. 652 * 653 * This is inefficient on MIPS/ARM platforms that have 654 * non-cachable memory for TX descriptors, but we'll just 655 * make do for now. 656 * 657 * As to why the rate table is stashed in the last descriptor 658 * rather than the first descriptor? Because proctxdesc() 659 * is called on the final descriptor in an MPDU or A-MPDU - 660 * ie, the one that gets updated by the hardware upon 661 * completion. That way proctxdesc() doesn't need to know 662 * about the first _and_ last TX descriptor. 663 */ 664 ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0); 665 666 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__); 667 } 668 669 /* 670 * Hand-off a frame to the multicast TX queue. 671 * 672 * This is a software TXQ which will be appended to the CAB queue 673 * during the beacon setup code. 674 * 675 * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID 676 * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated 677 * with the actual hardware txq, or all of this will fall apart. 678 * 679 * XXX It may not be a bad idea to just stuff the QCU ID into bf_state 680 * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated 681 * correctly. 682 */ 683 static void 684 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 685 struct ath_buf *bf) 686 { 687 ATH_TX_LOCK_ASSERT(sc); 688 689 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 690 ("%s: busy status 0x%x", __func__, bf->bf_flags)); 691 692 /* 693 * Ensure that the tx queue is the cabq, so things get 694 * mapped correctly. 695 */ 696 if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) { 697 DPRINTF(sc, ATH_DEBUG_XMIT, 698 "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 699 __func__, bf, bf->bf_state.bfs_tx_queue, 700 txq->axq_qnum); 701 } 702 703 ATH_TXQ_LOCK(txq); 704 if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) { 705 struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s); 706 struct ieee80211_frame *wh; 707 708 /* mark previous frame */ 709 wh = mtod(bf_last->bf_m, struct ieee80211_frame *); 710 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 711 bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap, 712 BUS_DMASYNC_PREWRITE); 713 714 /* link descriptor */ 715 ath_hal_settxdesclink(sc->sc_ah, 716 bf_last->bf_lastds, 717 bf->bf_daddr); 718 } 719 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 720 ATH_TXQ_UNLOCK(txq); 721 } 722 723 /* 724 * Hand-off packet to a hardware queue. 725 */ 726 static void 727 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 728 struct ath_buf *bf) 729 { 730 struct ath_hal *ah = sc->sc_ah; 731 struct ath_buf *bf_first; 732 733 /* 734 * Insert the frame on the outbound list and pass it on 735 * to the hardware. Multicast frames buffered for power 736 * save stations and transmit from the CAB queue are stored 737 * on a s/w only queue and loaded on to the CAB queue in 738 * the SWBA handler since frames only go out on DTIM and 739 * to avoid possible races. 740 */ 741 ATH_TX_LOCK_ASSERT(sc); 742 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 743 ("%s: busy status 0x%x", __func__, bf->bf_flags)); 744 KASSERT(txq->axq_qnum != ATH_TXQ_SWQ, 745 ("ath_tx_handoff_hw called for mcast queue")); 746 747 /* 748 * XXX We should instead just verify that sc_txstart_cnt 749 * or ath_txproc_cnt > 0. That would mean that 750 * the reset is going to be waiting for us to complete. 751 */ 752 if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) { 753 device_printf(sc->sc_dev, 754 "%s: TX dispatch without holding txcount/txstart refcnt!\n", 755 __func__); 756 } 757 758 /* 759 * XXX .. this is going to cause the hardware to get upset; 760 * so we really should find some way to drop or queue 761 * things. 762 */ 763 764 ATH_TXQ_LOCK(txq); 765 766 /* 767 * XXX TODO: if there's a holdingbf, then 768 * ATH_TXQ_PUTRUNNING should be clear. 769 * 770 * If there is a holdingbf and the list is empty, 771 * then axq_link should be pointing to the holdingbf. 772 * 773 * Otherwise it should point to the last descriptor 774 * in the last ath_buf. 775 * 776 * In any case, we should really ensure that we 777 * update the previous descriptor link pointer to 778 * this descriptor, regardless of all of the above state. 779 * 780 * For now this is captured by having axq_link point 781 * to either the holdingbf (if the TXQ list is empty) 782 * or the end of the list (if the TXQ list isn't empty.) 783 * I'd rather just kill axq_link here and do it as above. 784 */ 785 786 /* 787 * Append the frame to the TX queue. 788 */ 789 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 790 ATH_KTR(sc, ATH_KTR_TX, 3, 791 "ath_tx_handoff: non-tdma: txq=%u, add bf=%p " 792 "depth=%d", 793 txq->axq_qnum, 794 bf, 795 txq->axq_depth); 796 797 /* 798 * If there's a link pointer, update it. 799 * 800 * XXX we should replace this with the above logic, just 801 * to kill axq_link with fire. 802 */ 803 if (txq->axq_link != NULL) { 804 *txq->axq_link = bf->bf_daddr; 805 DPRINTF(sc, ATH_DEBUG_XMIT, 806 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 807 txq->axq_qnum, txq->axq_link, 808 (caddr_t)bf->bf_daddr, bf->bf_desc, 809 txq->axq_depth); 810 ATH_KTR(sc, ATH_KTR_TX, 5, 811 "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) " 812 "lastds=%d", 813 txq->axq_qnum, txq->axq_link, 814 (caddr_t)bf->bf_daddr, bf->bf_desc, 815 bf->bf_lastds); 816 } 817 818 /* 819 * If we've not pushed anything into the hardware yet, 820 * push the head of the queue into the TxDP. 821 * 822 * Once we've started DMA, there's no guarantee that 823 * updating the TxDP with a new value will actually work. 824 * So we just don't do that - if we hit the end of the list, 825 * we keep that buffer around (the "holding buffer") and 826 * re-start DMA by updating the link pointer of _that_ 827 * descriptor and then restart DMA. 828 */ 829 if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) { 830 bf_first = TAILQ_FIRST(&txq->axq_q); 831 txq->axq_flags |= ATH_TXQ_PUTRUNNING; 832 ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr); 833 DPRINTF(sc, ATH_DEBUG_XMIT, 834 "%s: TXDP[%u] = %p (%p) depth %d\n", 835 __func__, txq->axq_qnum, 836 (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 837 txq->axq_depth); 838 ATH_KTR(sc, ATH_KTR_TX, 5, 839 "ath_tx_handoff: TXDP[%u] = %p (%p) " 840 "lastds=%p depth %d", 841 txq->axq_qnum, 842 (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 843 bf_first->bf_lastds, 844 txq->axq_depth); 845 } 846 847 /* 848 * Ensure that the bf TXQ matches this TXQ, so later 849 * checking and holding buffer manipulation is sane. 850 */ 851 if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) { 852 DPRINTF(sc, ATH_DEBUG_XMIT, 853 "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 854 __func__, bf, bf->bf_state.bfs_tx_queue, 855 txq->axq_qnum); 856 } 857 858 /* 859 * Track aggregate queue depth. 860 */ 861 if (bf->bf_state.bfs_aggr) 862 txq->axq_aggr_depth++; 863 864 /* 865 * Update the link pointer. 866 */ 867 ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); 868 869 /* 870 * Start DMA. 871 * 872 * If we wrote a TxDP above, DMA will start from here. 873 * 874 * If DMA is running, it'll do nothing. 875 * 876 * If the DMA engine hit the end of the QCU list (ie LINK=NULL, 877 * or VEOL) then it stops at the last transmitted write. 878 * We then append a new frame by updating the link pointer 879 * in that descriptor and then kick TxE here; it will re-read 880 * that last descriptor and find the new descriptor to transmit. 881 * 882 * This is why we keep the holding descriptor around. 883 */ 884 ath_hal_txstart(ah, txq->axq_qnum); 885 ATH_TXQ_UNLOCK(txq); 886 ATH_KTR(sc, ATH_KTR_TX, 1, 887 "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum); 888 } 889 890 /* 891 * Restart TX DMA for the given TXQ. 892 * 893 * This must be called whether the queue is empty or not. 894 */ 895 static void 896 ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq) 897 { 898 struct ath_buf *bf, *bf_last; 899 900 ATH_TXQ_LOCK_ASSERT(txq); 901 902 /* XXX make this ATH_TXQ_FIRST */ 903 bf = TAILQ_FIRST(&txq->axq_q); 904 bf_last = ATH_TXQ_LAST(txq, axq_q_s); 905 906 if (bf == NULL) 907 return; 908 909 DPRINTF(sc, ATH_DEBUG_RESET, 910 "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n", 911 __func__, 912 txq->axq_qnum, 913 bf, 914 bf_last, 915 (uint32_t) bf->bf_daddr); 916 917 #ifdef ATH_DEBUG 918 if (sc->sc_debug & ATH_DEBUG_RESET) 919 ath_tx_dump(sc, txq); 920 #endif 921 922 /* 923 * This is called from a restart, so DMA is known to be 924 * completely stopped. 925 */ 926 KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)), 927 ("%s: Q%d: called with PUTRUNNING=1\n", 928 __func__, 929 txq->axq_qnum)); 930 931 ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr); 932 txq->axq_flags |= ATH_TXQ_PUTRUNNING; 933 934 ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds, 935 &txq->axq_link); 936 ath_hal_txstart(sc->sc_ah, txq->axq_qnum); 937 } 938 939 /* 940 * Hand off a packet to the hardware (or mcast queue.) 941 * 942 * The relevant hardware txq should be locked. 943 */ 944 static void 945 ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq, 946 struct ath_buf *bf) 947 { 948 ATH_TX_LOCK_ASSERT(sc); 949 950 #ifdef ATH_DEBUG_ALQ 951 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC)) 952 ath_tx_alq_post(sc, bf); 953 #endif 954 955 if (txq->axq_qnum == ATH_TXQ_SWQ) 956 ath_tx_handoff_mcast(sc, txq, bf); 957 else 958 ath_tx_handoff_hw(sc, txq, bf); 959 } 960 961 static int 962 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni, 963 struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, 964 int *keyix) 965 { 966 DPRINTF(sc, ATH_DEBUG_XMIT, 967 "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n", 968 __func__, 969 *hdrlen, 970 *pktlen, 971 isfrag, 972 iswep, 973 m0); 974 975 if (iswep) { 976 const struct ieee80211_cipher *cip; 977 struct ieee80211_key *k; 978 979 /* 980 * Construct the 802.11 header+trailer for an encrypted 981 * frame. The only reason this can fail is because of an 982 * unknown or unsupported cipher/key type. 983 */ 984 k = ieee80211_crypto_encap(ni, m0); 985 if (k == NULL) { 986 /* 987 * This can happen when the key is yanked after the 988 * frame was queued. Just discard the frame; the 989 * 802.11 layer counts failures and provides 990 * debugging/diagnostics. 991 */ 992 return (0); 993 } 994 /* 995 * Adjust the packet + header lengths for the crypto 996 * additions and calculate the h/w key index. When 997 * a s/w mic is done the frame will have had any mic 998 * added to it prior to entry so m0->m_pkthdr.len will 999 * account for it. Otherwise we need to add it to the 1000 * packet length. 1001 */ 1002 cip = k->wk_cipher; 1003 (*hdrlen) += cip->ic_header; 1004 (*pktlen) += cip->ic_header + cip->ic_trailer; 1005 /* NB: frags always have any TKIP MIC done in s/w */ 1006 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag) 1007 (*pktlen) += cip->ic_miclen; 1008 (*keyix) = k->wk_keyix; 1009 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) { 1010 /* 1011 * Use station key cache slot, if assigned. 1012 */ 1013 (*keyix) = ni->ni_ucastkey.wk_keyix; 1014 if ((*keyix) == IEEE80211_KEYIX_NONE) 1015 (*keyix) = HAL_TXKEYIX_INVALID; 1016 } else 1017 (*keyix) = HAL_TXKEYIX_INVALID; 1018 1019 return (1); 1020 } 1021 1022 /* 1023 * Calculate whether interoperability protection is required for 1024 * this frame. 1025 * 1026 * This requires the rate control information be filled in, 1027 * as the protection requirement depends upon the current 1028 * operating mode / PHY. 1029 */ 1030 static void 1031 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf) 1032 { 1033 struct ieee80211_frame *wh; 1034 uint8_t rix; 1035 uint16_t flags; 1036 int shortPreamble; 1037 const HAL_RATE_TABLE *rt = sc->sc_currates; 1038 struct ieee80211com *ic = &sc->sc_ic; 1039 1040 flags = bf->bf_state.bfs_txflags; 1041 rix = bf->bf_state.bfs_rc[0].rix; 1042 shortPreamble = bf->bf_state.bfs_shpream; 1043 wh = mtod(bf->bf_m, struct ieee80211_frame *); 1044 1045 /* Disable frame protection for TOA probe frames */ 1046 if (bf->bf_flags & ATH_BUF_TOA_PROBE) { 1047 /* XXX count */ 1048 flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA); 1049 bf->bf_state.bfs_doprot = 0; 1050 goto finish; 1051 } 1052 1053 /* 1054 * If 802.11g protection is enabled, determine whether 1055 * to use RTS/CTS or just CTS. Note that this is only 1056 * done for OFDM unicast frames. 1057 */ 1058 if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1059 rt->info[rix].phy == IEEE80211_T_OFDM && 1060 (flags & HAL_TXDESC_NOACK) == 0) { 1061 bf->bf_state.bfs_doprot = 1; 1062 /* XXX fragments must use CCK rates w/ protection */ 1063 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1064 flags |= HAL_TXDESC_RTSENA; 1065 } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1066 flags |= HAL_TXDESC_CTSENA; 1067 } 1068 /* 1069 * For frags it would be desirable to use the 1070 * highest CCK rate for RTS/CTS. But stations 1071 * farther away may detect it at a lower CCK rate 1072 * so use the configured protection rate instead 1073 * (for now). 1074 */ 1075 sc->sc_stats.ast_tx_protect++; 1076 } 1077 1078 /* 1079 * If 11n protection is enabled and it's a HT frame, 1080 * enable RTS. 1081 * 1082 * XXX ic_htprotmode or ic_curhtprotmode? 1083 * XXX should it_htprotmode only matter if ic_curhtprotmode 1084 * XXX indicates it's not a HT pure environment? 1085 */ 1086 if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 1087 rt->info[rix].phy == IEEE80211_T_HT && 1088 (flags & HAL_TXDESC_NOACK) == 0) { 1089 flags |= HAL_TXDESC_RTSENA; 1090 sc->sc_stats.ast_tx_htprotect++; 1091 } 1092 1093 finish: 1094 bf->bf_state.bfs_txflags = flags; 1095 } 1096 1097 /* 1098 * Update the frame duration given the currently selected rate. 1099 * 1100 * This also updates the frame duration value, so it will require 1101 * a DMA flush. 1102 */ 1103 static void 1104 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf) 1105 { 1106 struct ieee80211_frame *wh; 1107 uint8_t rix; 1108 uint16_t flags; 1109 int shortPreamble; 1110 struct ath_hal *ah = sc->sc_ah; 1111 const HAL_RATE_TABLE *rt = sc->sc_currates; 1112 int isfrag = bf->bf_m->m_flags & M_FRAG; 1113 1114 flags = bf->bf_state.bfs_txflags; 1115 rix = bf->bf_state.bfs_rc[0].rix; 1116 shortPreamble = bf->bf_state.bfs_shpream; 1117 wh = mtod(bf->bf_m, struct ieee80211_frame *); 1118 1119 /* 1120 * Calculate duration. This logically belongs in the 802.11 1121 * layer but it lacks sufficient information to calculate it. 1122 */ 1123 if ((flags & HAL_TXDESC_NOACK) == 0 && 1124 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 1125 u_int16_t dur; 1126 if (shortPreamble) 1127 dur = rt->info[rix].spAckDuration; 1128 else 1129 dur = rt->info[rix].lpAckDuration; 1130 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) { 1131 dur += dur; /* additional SIFS+ACK */ 1132 /* 1133 * Include the size of next fragment so NAV is 1134 * updated properly. The last fragment uses only 1135 * the ACK duration 1136 * 1137 * XXX TODO: ensure that the rate lookup for each 1138 * fragment is the same as the rate used by the 1139 * first fragment! 1140 */ 1141 dur += ath_hal_computetxtime(ah, 1142 rt, 1143 bf->bf_nextfraglen, 1144 rix, shortPreamble, 1145 AH_TRUE); 1146 } 1147 if (isfrag) { 1148 /* 1149 * Force hardware to use computed duration for next 1150 * fragment by disabling multi-rate retry which updates 1151 * duration based on the multi-rate duration table. 1152 */ 1153 bf->bf_state.bfs_ismrr = 0; 1154 bf->bf_state.bfs_try0 = ATH_TXMGTTRY; 1155 /* XXX update bfs_rc[0].try? */ 1156 } 1157 1158 /* Update the duration field itself */ 1159 *(u_int16_t *)wh->i_dur = htole16(dur); 1160 } 1161 } 1162 1163 static uint8_t 1164 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt, 1165 int cix, int shortPreamble) 1166 { 1167 uint8_t ctsrate; 1168 1169 /* 1170 * CTS transmit rate is derived from the transmit rate 1171 * by looking in the h/w rate table. We must also factor 1172 * in whether or not a short preamble is to be used. 1173 */ 1174 /* NB: cix is set above where RTS/CTS is enabled */ 1175 KASSERT(cix != 0xff, ("cix not setup")); 1176 ctsrate = rt->info[cix].rateCode; 1177 1178 /* XXX this should only matter for legacy rates */ 1179 if (shortPreamble) 1180 ctsrate |= rt->info[cix].shortPreamble; 1181 1182 return (ctsrate); 1183 } 1184 1185 /* 1186 * Calculate the RTS/CTS duration for legacy frames. 1187 */ 1188 static int 1189 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix, 1190 int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt, 1191 int flags) 1192 { 1193 int ctsduration = 0; 1194 1195 /* This mustn't be called for HT modes */ 1196 if (rt->info[cix].phy == IEEE80211_T_HT) { 1197 printf("%s: HT rate where it shouldn't be (0x%x)\n", 1198 __func__, rt->info[cix].rateCode); 1199 return (-1); 1200 } 1201 1202 /* 1203 * Compute the transmit duration based on the frame 1204 * size and the size of an ACK frame. We call into the 1205 * HAL to do the computation since it depends on the 1206 * characteristics of the actual PHY being used. 1207 * 1208 * NB: CTS is assumed the same size as an ACK so we can 1209 * use the precalculated ACK durations. 1210 */ 1211 if (shortPreamble) { 1212 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1213 ctsduration += rt->info[cix].spAckDuration; 1214 ctsduration += ath_hal_computetxtime(ah, 1215 rt, pktlen, rix, AH_TRUE, AH_TRUE); 1216 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1217 ctsduration += rt->info[rix].spAckDuration; 1218 } else { 1219 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1220 ctsduration += rt->info[cix].lpAckDuration; 1221 ctsduration += ath_hal_computetxtime(ah, 1222 rt, pktlen, rix, AH_FALSE, AH_TRUE); 1223 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1224 ctsduration += rt->info[rix].lpAckDuration; 1225 } 1226 1227 return (ctsduration); 1228 } 1229 1230 /* 1231 * Update the given ath_buf with updated rts/cts setup and duration 1232 * values. 1233 * 1234 * To support rate lookups for each software retry, the rts/cts rate 1235 * and cts duration must be re-calculated. 1236 * 1237 * This function assumes the RTS/CTS flags have been set as needed; 1238 * mrr has been disabled; and the rate control lookup has been done. 1239 * 1240 * XXX TODO: MRR need only be disabled for the pre-11n NICs. 1241 * XXX The 11n NICs support per-rate RTS/CTS configuration. 1242 */ 1243 static void 1244 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf) 1245 { 1246 uint16_t ctsduration = 0; 1247 uint8_t ctsrate = 0; 1248 uint8_t rix = bf->bf_state.bfs_rc[0].rix; 1249 uint8_t cix = 0; 1250 const HAL_RATE_TABLE *rt = sc->sc_currates; 1251 1252 /* 1253 * No RTS/CTS enabled? Don't bother. 1254 */ 1255 if ((bf->bf_state.bfs_txflags & 1256 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { 1257 /* XXX is this really needed? */ 1258 bf->bf_state.bfs_ctsrate = 0; 1259 bf->bf_state.bfs_ctsduration = 0; 1260 return; 1261 } 1262 1263 /* 1264 * If protection is enabled, use the protection rix control 1265 * rate. Otherwise use the rate0 control rate. 1266 */ 1267 if (bf->bf_state.bfs_doprot) 1268 rix = sc->sc_protrix; 1269 else 1270 rix = bf->bf_state.bfs_rc[0].rix; 1271 1272 /* 1273 * If the raw path has hard-coded ctsrate0 to something, 1274 * use it. 1275 */ 1276 if (bf->bf_state.bfs_ctsrate0 != 0) 1277 cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0); 1278 else 1279 /* Control rate from above */ 1280 cix = rt->info[rix].controlRate; 1281 1282 /* Calculate the rtscts rate for the given cix */ 1283 ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix, 1284 bf->bf_state.bfs_shpream); 1285 1286 /* The 11n chipsets do ctsduration calculations for you */ 1287 if (! ath_tx_is_11n(sc)) 1288 ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix, 1289 bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen, 1290 rt, bf->bf_state.bfs_txflags); 1291 1292 /* Squirrel away in ath_buf */ 1293 bf->bf_state.bfs_ctsrate = ctsrate; 1294 bf->bf_state.bfs_ctsduration = ctsduration; 1295 1296 /* 1297 * Must disable multi-rate retry when using RTS/CTS. 1298 */ 1299 if (!sc->sc_mrrprot) { 1300 bf->bf_state.bfs_ismrr = 0; 1301 bf->bf_state.bfs_try0 = 1302 bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */ 1303 } 1304 } 1305 1306 /* 1307 * Setup the descriptor chain for a normal or fast-frame 1308 * frame. 1309 * 1310 * XXX TODO: extend to include the destination hardware QCU ID. 1311 * Make sure that is correct. Make sure that when being added 1312 * to the mcastq, the CABQ QCUID is set or things will get a bit 1313 * odd. 1314 */ 1315 static void 1316 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf) 1317 { 1318 struct ath_desc *ds = bf->bf_desc; 1319 struct ath_hal *ah = sc->sc_ah; 1320 1321 if (bf->bf_state.bfs_txrate0 == 0) 1322 DPRINTF(sc, ATH_DEBUG_XMIT, 1323 "%s: bf=%p, txrate0=%d\n", __func__, bf, 0); 1324 1325 ath_hal_setuptxdesc(ah, ds 1326 , bf->bf_state.bfs_pktlen /* packet length */ 1327 , bf->bf_state.bfs_hdrlen /* header length */ 1328 , bf->bf_state.bfs_atype /* Atheros packet type */ 1329 , bf->bf_state.bfs_txpower /* txpower */ 1330 , bf->bf_state.bfs_txrate0 1331 , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 1332 , bf->bf_state.bfs_keyix /* key cache index */ 1333 , bf->bf_state.bfs_txantenna /* antenna mode */ 1334 , bf->bf_state.bfs_txflags /* flags */ 1335 , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 1336 , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 1337 ); 1338 1339 /* 1340 * This will be overriden when the descriptor chain is written. 1341 */ 1342 bf->bf_lastds = ds; 1343 bf->bf_last = bf; 1344 1345 /* Set rate control and descriptor chain for this frame */ 1346 ath_tx_set_ratectrl(sc, bf->bf_node, bf); 1347 ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0); 1348 } 1349 1350 /* 1351 * Do a rate lookup. 1352 * 1353 * This performs a rate lookup for the given ath_buf only if it's required. 1354 * Non-data frames and raw frames don't require it. 1355 * 1356 * This populates the primary and MRR entries; MRR values are 1357 * then disabled later on if something requires it (eg RTS/CTS on 1358 * pre-11n chipsets. 1359 * 1360 * This needs to be done before the RTS/CTS fields are calculated 1361 * as they may depend upon the rate chosen. 1362 */ 1363 static void 1364 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf) 1365 { 1366 uint8_t rate, rix; 1367 int try0; 1368 1369 if (! bf->bf_state.bfs_doratelookup) 1370 return; 1371 1372 /* Get rid of any previous state */ 1373 bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1374 1375 ATH_NODE_LOCK(ATH_NODE(bf->bf_node)); 1376 ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream, 1377 bf->bf_state.bfs_pktlen, &rix, &try0, &rate); 1378 1379 /* In case MRR is disabled, make sure rc[0] is setup correctly */ 1380 bf->bf_state.bfs_rc[0].rix = rix; 1381 bf->bf_state.bfs_rc[0].ratecode = rate; 1382 bf->bf_state.bfs_rc[0].tries = try0; 1383 1384 if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY) 1385 ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix, 1386 bf->bf_state.bfs_rc); 1387 ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node)); 1388 1389 sc->sc_txrix = rix; /* for LED blinking */ 1390 sc->sc_lastdatarix = rix; /* for fast frames */ 1391 bf->bf_state.bfs_try0 = try0; 1392 bf->bf_state.bfs_txrate0 = rate; 1393 } 1394 1395 /* 1396 * Update the CLRDMASK bit in the ath_buf if it needs to be set. 1397 */ 1398 static void 1399 ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid, 1400 struct ath_buf *bf) 1401 { 1402 struct ath_node *an = ATH_NODE(bf->bf_node); 1403 1404 ATH_TX_LOCK_ASSERT(sc); 1405 1406 if (an->clrdmask == 1) { 1407 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 1408 an->clrdmask = 0; 1409 } 1410 } 1411 1412 /* 1413 * Return whether this frame should be software queued or 1414 * direct dispatched. 1415 * 1416 * When doing powersave, BAR frames should be queued but other management 1417 * frames should be directly sent. 1418 * 1419 * When not doing powersave, stick BAR frames into the hardware queue 1420 * so it goes out even though the queue is paused. 1421 * 1422 * For now, management frames are also software queued by default. 1423 */ 1424 static int 1425 ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an, 1426 struct mbuf *m0, int *queue_to_head) 1427 { 1428 struct ieee80211_node *ni = &an->an_node; 1429 struct ieee80211_frame *wh; 1430 uint8_t type, subtype; 1431 1432 wh = mtod(m0, struct ieee80211_frame *); 1433 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1434 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1435 1436 (*queue_to_head) = 0; 1437 1438 /* If it's not in powersave - direct-dispatch BAR */ 1439 if ((ATH_NODE(ni)->an_is_powersave == 0) 1440 && type == IEEE80211_FC0_TYPE_CTL && 1441 subtype == IEEE80211_FC0_SUBTYPE_BAR) { 1442 DPRINTF(sc, ATH_DEBUG_SW_TX, 1443 "%s: BAR: TX'ing direct\n", __func__); 1444 return (0); 1445 } else if ((ATH_NODE(ni)->an_is_powersave == 1) 1446 && type == IEEE80211_FC0_TYPE_CTL && 1447 subtype == IEEE80211_FC0_SUBTYPE_BAR) { 1448 /* BAR TX whilst asleep; queue */ 1449 DPRINTF(sc, ATH_DEBUG_SW_TX, 1450 "%s: swq: TX'ing\n", __func__); 1451 (*queue_to_head) = 1; 1452 return (1); 1453 } else if ((ATH_NODE(ni)->an_is_powersave == 1) 1454 && (type == IEEE80211_FC0_TYPE_MGT || 1455 type == IEEE80211_FC0_TYPE_CTL)) { 1456 /* 1457 * Other control/mgmt frame; bypass software queuing 1458 * for now! 1459 */ 1460 DPRINTF(sc, ATH_DEBUG_XMIT, 1461 "%s: %6D: Node is asleep; sending mgmt " 1462 "(type=%d, subtype=%d)\n", 1463 __func__, ni->ni_macaddr, ":", type, subtype); 1464 return (0); 1465 } else { 1466 return (1); 1467 } 1468 } 1469 1470 1471 /* 1472 * Transmit the given frame to the hardware. 1473 * 1474 * The frame must already be setup; rate control must already have 1475 * been done. 1476 * 1477 * XXX since the TXQ lock is being held here (and I dislike holding 1478 * it for this long when not doing software aggregation), later on 1479 * break this function into "setup_normal" and "xmit_normal". The 1480 * lock only needs to be held for the ath_tx_handoff call. 1481 * 1482 * XXX we don't update the leak count here - if we're doing 1483 * direct frame dispatch, we need to be able to do it without 1484 * decrementing the leak count (eg multicast queue frames.) 1485 */ 1486 static void 1487 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq, 1488 struct ath_buf *bf) 1489 { 1490 struct ath_node *an = ATH_NODE(bf->bf_node); 1491 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 1492 1493 ATH_TX_LOCK_ASSERT(sc); 1494 1495 /* 1496 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does 1497 * set a completion handler however it doesn't (yet) properly 1498 * handle the strict ordering requirements needed for normal, 1499 * non-aggregate session frames. 1500 * 1501 * Once this is implemented, only set CLRDMASK like this for 1502 * frames that must go out - eg management/raw frames. 1503 */ 1504 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 1505 1506 /* Setup the descriptor before handoff */ 1507 ath_tx_do_ratelookup(sc, bf); 1508 ath_tx_calc_duration(sc, bf); 1509 ath_tx_calc_protection(sc, bf); 1510 ath_tx_set_rtscts(sc, bf); 1511 ath_tx_rate_fill_rcflags(sc, bf); 1512 ath_tx_setds(sc, bf); 1513 1514 /* Track per-TID hardware queue depth correctly */ 1515 tid->hwq_depth++; 1516 1517 /* Assign the completion handler */ 1518 bf->bf_comp = ath_tx_normal_comp; 1519 1520 /* Hand off to hardware */ 1521 ath_tx_handoff(sc, txq, bf); 1522 } 1523 1524 /* 1525 * Do the basic frame setup stuff that's required before the frame 1526 * is added to a software queue. 1527 * 1528 * All frames get mostly the same treatment and it's done once. 1529 * Retransmits fiddle with things like the rate control setup, 1530 * setting the retransmit bit in the packet; doing relevant DMA/bus 1531 * syncing and relinking it (back) into the hardware TX queue. 1532 * 1533 * Note that this may cause the mbuf to be reallocated, so 1534 * m0 may not be valid. 1535 */ 1536 static int 1537 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni, 1538 struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq) 1539 { 1540 struct ieee80211vap *vap = ni->ni_vap; 1541 struct ieee80211com *ic = &sc->sc_ic; 1542 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams; 1543 int error, iswep, ismcast, isfrag, ismrr; 1544 int keyix, hdrlen, pktlen, try0 = 0; 1545 u_int8_t rix = 0, txrate = 0; 1546 struct ath_desc *ds; 1547 struct ieee80211_frame *wh; 1548 u_int subtype, flags; 1549 HAL_PKT_TYPE atype; 1550 const HAL_RATE_TABLE *rt; 1551 HAL_BOOL shortPreamble; 1552 struct ath_node *an; 1553 u_int pri; 1554 1555 /* 1556 * To ensure that both sequence numbers and the CCMP PN handling 1557 * is "correct", make sure that the relevant TID queue is locked. 1558 * Otherwise the CCMP PN and seqno may appear out of order, causing 1559 * re-ordered frames to have out of order CCMP PN's, resulting 1560 * in many, many frame drops. 1561 */ 1562 ATH_TX_LOCK_ASSERT(sc); 1563 1564 wh = mtod(m0, struct ieee80211_frame *); 1565 iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1566 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1567 isfrag = m0->m_flags & M_FRAG; 1568 hdrlen = ieee80211_anyhdrsize(wh); 1569 /* 1570 * Packet length must not include any 1571 * pad bytes; deduct them here. 1572 */ 1573 pktlen = m0->m_pkthdr.len - (hdrlen & 3); 1574 1575 /* Handle encryption twiddling if needed */ 1576 if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, 1577 &pktlen, &keyix)) { 1578 ieee80211_free_mbuf(m0); 1579 return EIO; 1580 } 1581 1582 /* packet header may have moved, reset our local pointer */ 1583 wh = mtod(m0, struct ieee80211_frame *); 1584 1585 pktlen += IEEE80211_CRC_LEN; 1586 1587 /* 1588 * Load the DMA map so any coalescing is done. This 1589 * also calculates the number of descriptors we need. 1590 */ 1591 error = ath_tx_dmasetup(sc, bf, m0); 1592 if (error != 0) 1593 return error; 1594 KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 1595 bf->bf_node = ni; /* NB: held reference */ 1596 m0 = bf->bf_m; /* NB: may have changed */ 1597 wh = mtod(m0, struct ieee80211_frame *); 1598 1599 /* setup descriptors */ 1600 ds = bf->bf_desc; 1601 rt = sc->sc_currates; 1602 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1603 1604 /* 1605 * NB: the 802.11 layer marks whether or not we should 1606 * use short preamble based on the current mode and 1607 * negotiated parameters. 1608 */ 1609 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1610 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 1611 shortPreamble = AH_TRUE; 1612 sc->sc_stats.ast_tx_shortpre++; 1613 } else { 1614 shortPreamble = AH_FALSE; 1615 } 1616 1617 an = ATH_NODE(ni); 1618 //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 1619 flags = 0; 1620 ismrr = 0; /* default no multi-rate retry*/ 1621 pri = M_WME_GETAC(m0); /* honor classification */ 1622 /* XXX use txparams instead of fixed values */ 1623 /* 1624 * Calculate Atheros packet type from IEEE80211 packet header, 1625 * setup for rate calculations, and select h/w transmit queue. 1626 */ 1627 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1628 case IEEE80211_FC0_TYPE_MGT: 1629 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1630 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1631 atype = HAL_PKT_TYPE_BEACON; 1632 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1633 atype = HAL_PKT_TYPE_PROBE_RESP; 1634 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1635 atype = HAL_PKT_TYPE_ATIM; 1636 else 1637 atype = HAL_PKT_TYPE_NORMAL; /* XXX */ 1638 rix = an->an_mgmtrix; 1639 txrate = rt->info[rix].rateCode; 1640 if (shortPreamble) 1641 txrate |= rt->info[rix].shortPreamble; 1642 try0 = ATH_TXMGTTRY; 1643 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1644 break; 1645 case IEEE80211_FC0_TYPE_CTL: 1646 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */ 1647 rix = an->an_mgmtrix; 1648 txrate = rt->info[rix].rateCode; 1649 if (shortPreamble) 1650 txrate |= rt->info[rix].shortPreamble; 1651 try0 = ATH_TXMGTTRY; 1652 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1653 break; 1654 case IEEE80211_FC0_TYPE_DATA: 1655 atype = HAL_PKT_TYPE_NORMAL; /* default */ 1656 /* 1657 * Data frames: multicast frames go out at a fixed rate, 1658 * EAPOL frames use the mgmt frame rate; otherwise consult 1659 * the rate control module for the rate to use. 1660 */ 1661 if (ismcast) { 1662 rix = an->an_mcastrix; 1663 txrate = rt->info[rix].rateCode; 1664 if (shortPreamble) 1665 txrate |= rt->info[rix].shortPreamble; 1666 try0 = 1; 1667 } else if (m0->m_flags & M_EAPOL) { 1668 /* XXX? maybe always use long preamble? */ 1669 rix = an->an_mgmtrix; 1670 txrate = rt->info[rix].rateCode; 1671 if (shortPreamble) 1672 txrate |= rt->info[rix].shortPreamble; 1673 try0 = ATH_TXMAXTRY; /* XXX?too many? */ 1674 } else { 1675 /* 1676 * Do rate lookup on each TX, rather than using 1677 * the hard-coded TX information decided here. 1678 */ 1679 ismrr = 1; 1680 bf->bf_state.bfs_doratelookup = 1; 1681 } 1682 if (cap->cap_wmeParams[pri].wmep_noackPolicy) 1683 flags |= HAL_TXDESC_NOACK; 1684 break; 1685 default: 1686 device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n", 1687 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1688 /* XXX statistic */ 1689 /* XXX free tx dmamap */ 1690 ieee80211_free_mbuf(m0); 1691 return EIO; 1692 } 1693 1694 /* 1695 * There are two known scenarios where the frame AC doesn't match 1696 * what the destination TXQ is. 1697 * 1698 * + non-QoS frames (eg management?) that the net80211 stack has 1699 * assigned a higher AC to, but since it's a non-QoS TID, it's 1700 * being thrown into TID 16. TID 16 gets the AC_BE queue. 1701 * It's quite possible that management frames should just be 1702 * direct dispatched to hardware rather than go via the software 1703 * queue; that should be investigated in the future. There are 1704 * some specific scenarios where this doesn't make sense, mostly 1705 * surrounding ADDBA request/response - hence why that is special 1706 * cased. 1707 * 1708 * + Multicast frames going into the VAP mcast queue. That shows up 1709 * as "TXQ 11". 1710 * 1711 * This driver should eventually support separate TID and TXQ locking, 1712 * allowing for arbitrary AC frames to appear on arbitrary software 1713 * queues, being queued to the "correct" hardware queue when needed. 1714 */ 1715 #if 0 1716 if (txq != sc->sc_ac2q[pri]) { 1717 DPRINTF(sc, ATH_DEBUG_XMIT, 1718 "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n", 1719 __func__, 1720 txq, 1721 txq->axq_qnum, 1722 pri, 1723 sc->sc_ac2q[pri], 1724 sc->sc_ac2q[pri]->axq_qnum); 1725 } 1726 #endif 1727 1728 /* 1729 * Calculate miscellaneous flags. 1730 */ 1731 if (ismcast) { 1732 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1733 } else if (pktlen > vap->iv_rtsthreshold && 1734 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) { 1735 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1736 sc->sc_stats.ast_tx_rts++; 1737 } 1738 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */ 1739 sc->sc_stats.ast_tx_noack++; 1740 #ifdef IEEE80211_SUPPORT_TDMA 1741 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) { 1742 DPRINTF(sc, ATH_DEBUG_TDMA, 1743 "%s: discard frame, ACK required w/ TDMA\n", __func__); 1744 sc->sc_stats.ast_tdma_ack++; 1745 /* XXX free tx dmamap */ 1746 ieee80211_free_mbuf(m0); 1747 return EIO; 1748 } 1749 #endif 1750 1751 /* 1752 * If it's a frame to do location reporting on, 1753 * communicate it to the HAL. 1754 */ 1755 if (ieee80211_get_toa_params(m0, NULL)) { 1756 device_printf(sc->sc_dev, 1757 "%s: setting TX positioning bit\n", __func__); 1758 flags |= HAL_TXDESC_POS; 1759 1760 /* 1761 * Note: The hardware reports timestamps for 1762 * each of the RX'ed packets as part of the packet 1763 * exchange. So this means things like RTS/CTS 1764 * exchanges, as well as the final ACK. 1765 * 1766 * So, if you send a RTS-protected NULL data frame, 1767 * you'll get an RX report for the RTS response, then 1768 * an RX report for the NULL frame, and then the TX 1769 * completion at the end. 1770 * 1771 * NOTE: it doesn't work right for CCK frames; 1772 * there's no channel info data provided unless 1773 * it's OFDM or HT. Will have to dig into it. 1774 */ 1775 flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 1776 bf->bf_flags |= ATH_BUF_TOA_PROBE; 1777 } 1778 1779 #if 0 1780 /* 1781 * Placeholder: if you want to transmit with the azimuth 1782 * timestamp in the end of the payload, here's where you 1783 * should set the TXDESC field. 1784 */ 1785 flags |= HAL_TXDESC_HWTS; 1786 #endif 1787 1788 /* 1789 * Determine if a tx interrupt should be generated for 1790 * this descriptor. We take a tx interrupt to reap 1791 * descriptors when the h/w hits an EOL condition or 1792 * when the descriptor is specifically marked to generate 1793 * an interrupt. We periodically mark descriptors in this 1794 * way to insure timely replenishing of the supply needed 1795 * for sending frames. Defering interrupts reduces system 1796 * load and potentially allows more concurrent work to be 1797 * done but if done to aggressively can cause senders to 1798 * backup. 1799 * 1800 * NB: use >= to deal with sc_txintrperiod changing 1801 * dynamically through sysctl. 1802 */ 1803 if (flags & HAL_TXDESC_INTREQ) { 1804 txq->axq_intrcnt = 0; 1805 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) { 1806 flags |= HAL_TXDESC_INTREQ; 1807 txq->axq_intrcnt = 0; 1808 } 1809 1810 /* This point forward is actual TX bits */ 1811 1812 /* 1813 * At this point we are committed to sending the frame 1814 * and we don't need to look at m_nextpkt; clear it in 1815 * case this frame is part of frag chain. 1816 */ 1817 m0->m_nextpkt = NULL; 1818 1819 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 1820 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len, 1821 sc->sc_hwmap[rix].ieeerate, -1); 1822 1823 if (ieee80211_radiotap_active_vap(vap)) { 1824 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 1825 if (iswep) 1826 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1827 if (isfrag) 1828 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 1829 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 1830 sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni); 1831 sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 1832 1833 ieee80211_radiotap_tx(vap, m0); 1834 } 1835 1836 /* Blank the legacy rate array */ 1837 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1838 1839 /* 1840 * ath_buf_set_rate needs at least one rate/try to setup 1841 * the rate scenario. 1842 */ 1843 bf->bf_state.bfs_rc[0].rix = rix; 1844 bf->bf_state.bfs_rc[0].tries = try0; 1845 bf->bf_state.bfs_rc[0].ratecode = txrate; 1846 1847 /* Store the decided rate index values away */ 1848 bf->bf_state.bfs_pktlen = pktlen; 1849 bf->bf_state.bfs_hdrlen = hdrlen; 1850 bf->bf_state.bfs_atype = atype; 1851 bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni); 1852 bf->bf_state.bfs_txrate0 = txrate; 1853 bf->bf_state.bfs_try0 = try0; 1854 bf->bf_state.bfs_keyix = keyix; 1855 bf->bf_state.bfs_txantenna = sc->sc_txantenna; 1856 bf->bf_state.bfs_txflags = flags; 1857 bf->bf_state.bfs_shpream = shortPreamble; 1858 1859 /* XXX this should be done in ath_tx_setrate() */ 1860 bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */ 1861 bf->bf_state.bfs_ctsrate = 0; /* calculated later */ 1862 bf->bf_state.bfs_ctsduration = 0; 1863 bf->bf_state.bfs_ismrr = ismrr; 1864 1865 return 0; 1866 } 1867 1868 /* 1869 * Queue a frame to the hardware or software queue. 1870 * 1871 * This can be called by the net80211 code. 1872 * 1873 * XXX what about locking? Or, push the seqno assign into the 1874 * XXX aggregate scheduler so its serialised? 1875 * 1876 * XXX When sending management frames via ath_raw_xmit(), 1877 * should CLRDMASK be set unconditionally? 1878 */ 1879 int 1880 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, 1881 struct ath_buf *bf, struct mbuf *m0) 1882 { 1883 struct ieee80211vap *vap = ni->ni_vap; 1884 struct ath_vap *avp = ATH_VAP(vap); 1885 int r = 0; 1886 u_int pri; 1887 int tid; 1888 struct ath_txq *txq; 1889 int ismcast; 1890 const struct ieee80211_frame *wh; 1891 int is_ampdu, is_ampdu_tx, is_ampdu_pending; 1892 ieee80211_seq seqno; 1893 uint8_t type, subtype; 1894 int queue_to_head; 1895 1896 ATH_TX_LOCK_ASSERT(sc); 1897 1898 /* 1899 * Determine the target hardware queue. 1900 * 1901 * For multicast frames, the txq gets overridden appropriately 1902 * depending upon the state of PS. 1903 * 1904 * For any other frame, we do a TID/QoS lookup inside the frame 1905 * to see what the TID should be. If it's a non-QoS frame, the 1906 * AC and TID are overridden. The TID/TXQ code assumes the 1907 * TID is on a predictable hardware TXQ, so we don't support 1908 * having a node TID queued to multiple hardware TXQs. 1909 * This may change in the future but would require some locking 1910 * fudgery. 1911 */ 1912 pri = ath_tx_getac(sc, m0); 1913 tid = ath_tx_gettid(sc, m0); 1914 1915 txq = sc->sc_ac2q[pri]; 1916 wh = mtod(m0, struct ieee80211_frame *); 1917 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1918 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1919 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1920 1921 /* 1922 * Enforce how deep the multicast queue can grow. 1923 * 1924 * XXX duplicated in ath_raw_xmit(). 1925 */ 1926 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1927 if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 1928 > sc->sc_txq_mcastq_maxdepth) { 1929 sc->sc_stats.ast_tx_mcastq_overflow++; 1930 m_freem(m0); 1931 return (ENOBUFS); 1932 } 1933 } 1934 1935 /* 1936 * Enforce how deep the unicast queue can grow. 1937 * 1938 * If the node is in power save then we don't want 1939 * the software queue to grow too deep, or a node may 1940 * end up consuming all of the ath_buf entries. 1941 * 1942 * For now, only do this for DATA frames. 1943 * 1944 * We will want to cap how many management/control 1945 * frames get punted to the software queue so it doesn't 1946 * fill up. But the correct solution isn't yet obvious. 1947 * In any case, this check should at least let frames pass 1948 * that we are direct-dispatching. 1949 * 1950 * XXX TODO: duplicate this to the raw xmit path! 1951 */ 1952 if (type == IEEE80211_FC0_TYPE_DATA && 1953 ATH_NODE(ni)->an_is_powersave && 1954 ATH_NODE(ni)->an_swq_depth > 1955 sc->sc_txq_node_psq_maxdepth) { 1956 sc->sc_stats.ast_tx_node_psq_overflow++; 1957 m_freem(m0); 1958 return (ENOBUFS); 1959 } 1960 1961 /* A-MPDU TX */ 1962 is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid); 1963 is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1964 is_ampdu = is_ampdu_tx | is_ampdu_pending; 1965 1966 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1967 __func__, tid, pri, is_ampdu); 1968 1969 /* Set local packet state, used to queue packets to hardware */ 1970 bf->bf_state.bfs_tid = tid; 1971 bf->bf_state.bfs_tx_queue = txq->axq_qnum; 1972 bf->bf_state.bfs_pri = pri; 1973 1974 #if 1 1975 /* 1976 * When servicing one or more stations in power-save mode 1977 * (or) if there is some mcast data waiting on the mcast 1978 * queue (to prevent out of order delivery) multicast frames 1979 * must be bufferd until after the beacon. 1980 * 1981 * TODO: we should lock the mcastq before we check the length. 1982 */ 1983 if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 1984 txq = &avp->av_mcastq; 1985 /* 1986 * Mark the frame as eventually belonging on the CAB 1987 * queue, so the descriptor setup functions will 1988 * correctly initialise the descriptor 'qcuId' field. 1989 */ 1990 bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; 1991 } 1992 #endif 1993 1994 /* Do the generic frame setup */ 1995 /* XXX should just bzero the bf_state? */ 1996 bf->bf_state.bfs_dobaw = 0; 1997 1998 /* A-MPDU TX? Manually set sequence number */ 1999 /* 2000 * Don't do it whilst pending; the net80211 layer still 2001 * assigns them. 2002 */ 2003 if (is_ampdu_tx) { 2004 /* 2005 * Always call; this function will 2006 * handle making sure that null data frames 2007 * don't get a sequence number from the current 2008 * TID and thus mess with the BAW. 2009 */ 2010 seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0); 2011 2012 /* 2013 * Don't add QoS NULL frames to the BAW. 2014 */ 2015 if (IEEE80211_QOS_HAS_SEQ(wh) && 2016 subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) { 2017 bf->bf_state.bfs_dobaw = 1; 2018 } 2019 } 2020 2021 /* 2022 * If needed, the sequence number has been assigned. 2023 * Squirrel it away somewhere easy to get to. 2024 */ 2025 bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT; 2026 2027 /* Is ampdu pending? fetch the seqno and print it out */ 2028 if (is_ampdu_pending) 2029 DPRINTF(sc, ATH_DEBUG_SW_TX, 2030 "%s: tid %d: ampdu pending, seqno %d\n", 2031 __func__, tid, M_SEQNO_GET(m0)); 2032 2033 /* This also sets up the DMA map */ 2034 r = ath_tx_normal_setup(sc, ni, bf, m0, txq); 2035 2036 if (r != 0) 2037 goto done; 2038 2039 /* At this point m0 could have changed! */ 2040 m0 = bf->bf_m; 2041 2042 #if 1 2043 /* 2044 * If it's a multicast frame, do a direct-dispatch to the 2045 * destination hardware queue. Don't bother software 2046 * queuing it. 2047 */ 2048 /* 2049 * If it's a BAR frame, do a direct dispatch to the 2050 * destination hardware queue. Don't bother software 2051 * queuing it, as the TID will now be paused. 2052 * Sending a BAR frame can occur from the net80211 txa timer 2053 * (ie, retries) or from the ath txtask (completion call.) 2054 * It queues directly to hardware because the TID is paused 2055 * at this point (and won't be unpaused until the BAR has 2056 * either been TXed successfully or max retries has been 2057 * reached.) 2058 */ 2059 /* 2060 * Until things are better debugged - if this node is asleep 2061 * and we're sending it a non-BAR frame, direct dispatch it. 2062 * Why? Because we need to figure out what's actually being 2063 * sent - eg, during reassociation/reauthentication after 2064 * the node (last) disappeared whilst asleep, the driver should 2065 * have unpaused/unsleep'ed the node. So until that is 2066 * sorted out, use this workaround. 2067 */ 2068 if (txq == &avp->av_mcastq) { 2069 DPRINTF(sc, ATH_DEBUG_SW_TX, 2070 "%s: bf=%p: mcastq: TX'ing\n", __func__, bf); 2071 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2072 ath_tx_xmit_normal(sc, txq, bf); 2073 } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 2074 &queue_to_head)) { 2075 ath_tx_swq(sc, ni, txq, queue_to_head, bf); 2076 } else { 2077 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2078 ath_tx_xmit_normal(sc, txq, bf); 2079 } 2080 #else 2081 /* 2082 * For now, since there's no software queue, 2083 * direct-dispatch to the hardware. 2084 */ 2085 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2086 /* 2087 * Update the current leak count if 2088 * we're leaking frames; and set the 2089 * MORE flag as appropriate. 2090 */ 2091 ath_tx_leak_count_update(sc, tid, bf); 2092 ath_tx_xmit_normal(sc, txq, bf); 2093 #endif 2094 done: 2095 return 0; 2096 } 2097 2098 static int 2099 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni, 2100 struct ath_buf *bf, struct mbuf *m0, 2101 const struct ieee80211_bpf_params *params) 2102 { 2103 struct ieee80211com *ic = &sc->sc_ic; 2104 struct ieee80211vap *vap = ni->ni_vap; 2105 int error, ismcast, ismrr; 2106 int keyix, hdrlen, pktlen, try0, txantenna; 2107 u_int8_t rix, txrate; 2108 struct ieee80211_frame *wh; 2109 u_int flags; 2110 HAL_PKT_TYPE atype; 2111 const HAL_RATE_TABLE *rt; 2112 struct ath_desc *ds; 2113 u_int pri; 2114 int o_tid = -1; 2115 int do_override; 2116 uint8_t type, subtype; 2117 int queue_to_head; 2118 struct ath_node *an = ATH_NODE(ni); 2119 2120 ATH_TX_LOCK_ASSERT(sc); 2121 2122 wh = mtod(m0, struct ieee80211_frame *); 2123 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2124 hdrlen = ieee80211_anyhdrsize(wh); 2125 /* 2126 * Packet length must not include any 2127 * pad bytes; deduct them here. 2128 */ 2129 /* XXX honor IEEE80211_BPF_DATAPAD */ 2130 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN; 2131 2132 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2133 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2134 2135 ATH_KTR(sc, ATH_KTR_TX, 2, 2136 "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf); 2137 2138 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n", 2139 __func__, ismcast); 2140 2141 pri = params->ibp_pri & 3; 2142 /* Override pri if the frame isn't a QoS one */ 2143 if (! IEEE80211_QOS_HAS_SEQ(wh)) 2144 pri = ath_tx_getac(sc, m0); 2145 2146 /* XXX If it's an ADDBA, override the correct queue */ 2147 do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid); 2148 2149 /* Map ADDBA to the correct priority */ 2150 if (do_override) { 2151 #if 0 2152 DPRINTF(sc, ATH_DEBUG_XMIT, 2153 "%s: overriding tid %d pri %d -> %d\n", 2154 __func__, o_tid, pri, TID_TO_WME_AC(o_tid)); 2155 #endif 2156 pri = TID_TO_WME_AC(o_tid); 2157 } 2158 2159 /* Handle encryption twiddling if needed */ 2160 if (! ath_tx_tag_crypto(sc, ni, 2161 m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, 2162 &hdrlen, &pktlen, &keyix)) { 2163 ieee80211_free_mbuf(m0); 2164 return EIO; 2165 } 2166 /* packet header may have moved, reset our local pointer */ 2167 wh = mtod(m0, struct ieee80211_frame *); 2168 2169 /* Do the generic frame setup */ 2170 /* XXX should just bzero the bf_state? */ 2171 bf->bf_state.bfs_dobaw = 0; 2172 2173 error = ath_tx_dmasetup(sc, bf, m0); 2174 if (error != 0) 2175 return error; 2176 m0 = bf->bf_m; /* NB: may have changed */ 2177 wh = mtod(m0, struct ieee80211_frame *); 2178 KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 2179 bf->bf_node = ni; /* NB: held reference */ 2180 2181 /* Always enable CLRDMASK for raw frames for now.. */ 2182 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 2183 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 2184 if (params->ibp_flags & IEEE80211_BPF_RTS) 2185 flags |= HAL_TXDESC_RTSENA; 2186 else if (params->ibp_flags & IEEE80211_BPF_CTS) { 2187 /* XXX assume 11g/11n protection? */ 2188 bf->bf_state.bfs_doprot = 1; 2189 flags |= HAL_TXDESC_CTSENA; 2190 } 2191 /* XXX leave ismcast to injector? */ 2192 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast) 2193 flags |= HAL_TXDESC_NOACK; 2194 2195 rt = sc->sc_currates; 2196 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2197 2198 /* Fetch first rate information */ 2199 rix = ath_tx_findrix(sc, params->ibp_rate0); 2200 try0 = params->ibp_try0; 2201 2202 /* 2203 * Override EAPOL rate as appropriate. 2204 */ 2205 if (m0->m_flags & M_EAPOL) { 2206 /* XXX? maybe always use long preamble? */ 2207 rix = an->an_mgmtrix; 2208 try0 = ATH_TXMAXTRY; /* XXX?too many? */ 2209 } 2210 2211 /* 2212 * If it's a frame to do location reporting on, 2213 * communicate it to the HAL. 2214 */ 2215 if (ieee80211_get_toa_params(m0, NULL)) { 2216 device_printf(sc->sc_dev, 2217 "%s: setting TX positioning bit\n", __func__); 2218 flags |= HAL_TXDESC_POS; 2219 flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 2220 bf->bf_flags |= ATH_BUF_TOA_PROBE; 2221 } 2222 2223 txrate = rt->info[rix].rateCode; 2224 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) 2225 txrate |= rt->info[rix].shortPreamble; 2226 sc->sc_txrix = rix; 2227 ismrr = (params->ibp_try1 != 0); 2228 txantenna = params->ibp_pri >> 2; 2229 if (txantenna == 0) /* XXX? */ 2230 txantenna = sc->sc_txantenna; 2231 2232 /* 2233 * Since ctsrate is fixed, store it away for later 2234 * use when the descriptor fields are being set. 2235 */ 2236 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) 2237 bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate; 2238 2239 /* 2240 * NB: we mark all packets as type PSPOLL so the h/w won't 2241 * set the sequence number, duration, etc. 2242 */ 2243 atype = HAL_PKT_TYPE_PSPOLL; 2244 2245 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 2246 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len, 2247 sc->sc_hwmap[rix].ieeerate, -1); 2248 2249 if (ieee80211_radiotap_active_vap(vap)) { 2250 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 2251 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2252 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2253 if (m0->m_flags & M_FRAG) 2254 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 2255 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 2256 sc->sc_tx_th.wt_txpower = MIN(params->ibp_power, 2257 ieee80211_get_node_txpower(ni)); 2258 sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 2259 2260 ieee80211_radiotap_tx(vap, m0); 2261 } 2262 2263 /* 2264 * Formulate first tx descriptor with tx controls. 2265 */ 2266 ds = bf->bf_desc; 2267 /* XXX check return value? */ 2268 2269 /* Store the decided rate index values away */ 2270 bf->bf_state.bfs_pktlen = pktlen; 2271 bf->bf_state.bfs_hdrlen = hdrlen; 2272 bf->bf_state.bfs_atype = atype; 2273 bf->bf_state.bfs_txpower = MIN(params->ibp_power, 2274 ieee80211_get_node_txpower(ni)); 2275 bf->bf_state.bfs_txrate0 = txrate; 2276 bf->bf_state.bfs_try0 = try0; 2277 bf->bf_state.bfs_keyix = keyix; 2278 bf->bf_state.bfs_txantenna = txantenna; 2279 bf->bf_state.bfs_txflags = flags; 2280 bf->bf_state.bfs_shpream = 2281 !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2282 2283 /* Set local packet state, used to queue packets to hardware */ 2284 bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); 2285 bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; 2286 bf->bf_state.bfs_pri = pri; 2287 2288 /* XXX this should be done in ath_tx_setrate() */ 2289 bf->bf_state.bfs_ctsrate = 0; 2290 bf->bf_state.bfs_ctsduration = 0; 2291 bf->bf_state.bfs_ismrr = ismrr; 2292 2293 /* Blank the legacy rate array */ 2294 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 2295 2296 bf->bf_state.bfs_rc[0].rix = rix; 2297 bf->bf_state.bfs_rc[0].tries = try0; 2298 bf->bf_state.bfs_rc[0].ratecode = txrate; 2299 2300 if (ismrr) { 2301 int rix; 2302 2303 rix = ath_tx_findrix(sc, params->ibp_rate1); 2304 bf->bf_state.bfs_rc[1].rix = rix; 2305 bf->bf_state.bfs_rc[1].tries = params->ibp_try1; 2306 2307 rix = ath_tx_findrix(sc, params->ibp_rate2); 2308 bf->bf_state.bfs_rc[2].rix = rix; 2309 bf->bf_state.bfs_rc[2].tries = params->ibp_try2; 2310 2311 rix = ath_tx_findrix(sc, params->ibp_rate3); 2312 bf->bf_state.bfs_rc[3].rix = rix; 2313 bf->bf_state.bfs_rc[3].tries = params->ibp_try3; 2314 } 2315 /* 2316 * All the required rate control decisions have been made; 2317 * fill in the rc flags. 2318 */ 2319 ath_tx_rate_fill_rcflags(sc, bf); 2320 2321 /* NB: no buffered multicast in power save support */ 2322 2323 /* 2324 * If we're overiding the ADDBA destination, dump directly 2325 * into the hardware queue, right after any pending 2326 * frames to that node are. 2327 */ 2328 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n", 2329 __func__, do_override); 2330 2331 #if 1 2332 /* 2333 * Put addba frames in the right place in the right TID/HWQ. 2334 */ 2335 if (do_override) { 2336 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2337 /* 2338 * XXX if it's addba frames, should we be leaking 2339 * them out via the frame leak method? 2340 * XXX for now let's not risk it; but we may wish 2341 * to investigate this later. 2342 */ 2343 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2344 } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 2345 &queue_to_head)) { 2346 /* Queue to software queue */ 2347 ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf); 2348 } else { 2349 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2350 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2351 } 2352 #else 2353 /* Direct-dispatch to the hardware */ 2354 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2355 /* 2356 * Update the current leak count if 2357 * we're leaking frames; and set the 2358 * MORE flag as appropriate. 2359 */ 2360 ath_tx_leak_count_update(sc, tid, bf); 2361 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2362 #endif 2363 return 0; 2364 } 2365 2366 /* 2367 * Send a raw frame. 2368 * 2369 * This can be called by net80211. 2370 */ 2371 int 2372 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2373 const struct ieee80211_bpf_params *params) 2374 { 2375 struct ieee80211com *ic = ni->ni_ic; 2376 struct ath_softc *sc = ic->ic_softc; 2377 struct ath_buf *bf; 2378 struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *); 2379 int error = 0; 2380 2381 ATH_PCU_LOCK(sc); 2382 if (sc->sc_inreset_cnt > 0) { 2383 DPRINTF(sc, ATH_DEBUG_XMIT, 2384 "%s: sc_inreset_cnt > 0; bailing\n", __func__); 2385 error = EIO; 2386 ATH_PCU_UNLOCK(sc); 2387 goto badbad; 2388 } 2389 sc->sc_txstart_cnt++; 2390 ATH_PCU_UNLOCK(sc); 2391 2392 /* Wake the hardware up already */ 2393 ATH_LOCK(sc); 2394 ath_power_set_power_state(sc, HAL_PM_AWAKE); 2395 ATH_UNLOCK(sc); 2396 2397 ATH_TX_LOCK(sc); 2398 2399 if (!sc->sc_running || sc->sc_invalid) { 2400 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d", 2401 __func__, sc->sc_running, sc->sc_invalid); 2402 m_freem(m); 2403 error = ENETDOWN; 2404 goto bad; 2405 } 2406 2407 /* 2408 * Enforce how deep the multicast queue can grow. 2409 * 2410 * XXX duplicated in ath_tx_start(). 2411 */ 2412 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2413 if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 2414 > sc->sc_txq_mcastq_maxdepth) { 2415 sc->sc_stats.ast_tx_mcastq_overflow++; 2416 error = ENOBUFS; 2417 } 2418 2419 if (error != 0) { 2420 m_freem(m); 2421 goto bad; 2422 } 2423 } 2424 2425 /* 2426 * Grab a TX buffer and associated resources. 2427 */ 2428 bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT); 2429 if (bf == NULL) { 2430 sc->sc_stats.ast_tx_nobuf++; 2431 m_freem(m); 2432 error = ENOBUFS; 2433 goto bad; 2434 } 2435 ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n", 2436 m, params, bf); 2437 2438 if (params == NULL) { 2439 /* 2440 * Legacy path; interpret frame contents to decide 2441 * precisely how to send the frame. 2442 */ 2443 if (ath_tx_start(sc, ni, bf, m)) { 2444 error = EIO; /* XXX */ 2445 goto bad2; 2446 } 2447 } else { 2448 /* 2449 * Caller supplied explicit parameters to use in 2450 * sending the frame. 2451 */ 2452 if (ath_tx_raw_start(sc, ni, bf, m, params)) { 2453 error = EIO; /* XXX */ 2454 goto bad2; 2455 } 2456 } 2457 sc->sc_wd_timer = 5; 2458 sc->sc_stats.ast_tx_raw++; 2459 2460 /* 2461 * Update the TIM - if there's anything queued to the 2462 * software queue and power save is enabled, we should 2463 * set the TIM. 2464 */ 2465 ath_tx_update_tim(sc, ni, 1); 2466 2467 ATH_TX_UNLOCK(sc); 2468 2469 ATH_PCU_LOCK(sc); 2470 sc->sc_txstart_cnt--; 2471 ATH_PCU_UNLOCK(sc); 2472 2473 2474 /* Put the hardware back to sleep if required */ 2475 ATH_LOCK(sc); 2476 ath_power_restore_power_state(sc); 2477 ATH_UNLOCK(sc); 2478 2479 return 0; 2480 2481 bad2: 2482 ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, " 2483 "bf=%p", 2484 m, 2485 params, 2486 bf); 2487 ATH_TXBUF_LOCK(sc); 2488 ath_returnbuf_head(sc, bf); 2489 ATH_TXBUF_UNLOCK(sc); 2490 2491 bad: 2492 ATH_TX_UNLOCK(sc); 2493 2494 ATH_PCU_LOCK(sc); 2495 sc->sc_txstart_cnt--; 2496 ATH_PCU_UNLOCK(sc); 2497 2498 /* Put the hardware back to sleep if required */ 2499 ATH_LOCK(sc); 2500 ath_power_restore_power_state(sc); 2501 ATH_UNLOCK(sc); 2502 2503 badbad: 2504 ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p", 2505 m, params); 2506 sc->sc_stats.ast_tx_raw_fail++; 2507 2508 return error; 2509 } 2510 2511 /* Some helper functions */ 2512 2513 /* 2514 * ADDBA (and potentially others) need to be placed in the same 2515 * hardware queue as the TID/node it's relating to. This is so 2516 * it goes out after any pending non-aggregate frames to the 2517 * same node/TID. 2518 * 2519 * If this isn't done, the ADDBA can go out before the frames 2520 * queued in hardware. Even though these frames have a sequence 2521 * number -earlier- than the ADDBA can be transmitted (but 2522 * no frames whose sequence numbers are after the ADDBA should 2523 * be!) they'll arrive after the ADDBA - and the receiving end 2524 * will simply drop them as being out of the BAW. 2525 * 2526 * The frames can't be appended to the TID software queue - it'll 2527 * never be sent out. So these frames have to be directly 2528 * dispatched to the hardware, rather than queued in software. 2529 * So if this function returns true, the TXQ has to be 2530 * overridden and it has to be directly dispatched. 2531 * 2532 * It's a dirty hack, but someone's gotta do it. 2533 */ 2534 2535 /* 2536 * XXX doesn't belong here! 2537 */ 2538 static int 2539 ieee80211_is_action(struct ieee80211_frame *wh) 2540 { 2541 /* Type: Management frame? */ 2542 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != 2543 IEEE80211_FC0_TYPE_MGT) 2544 return 0; 2545 2546 /* Subtype: Action frame? */ 2547 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) != 2548 IEEE80211_FC0_SUBTYPE_ACTION) 2549 return 0; 2550 2551 return 1; 2552 } 2553 2554 #define MS(_v, _f) (((_v) & _f) >> _f##_S) 2555 /* 2556 * Return an alternate TID for ADDBA request frames. 2557 * 2558 * Yes, this likely should be done in the net80211 layer. 2559 */ 2560 static int 2561 ath_tx_action_frame_override_queue(struct ath_softc *sc, 2562 struct ieee80211_node *ni, 2563 struct mbuf *m0, int *tid) 2564 { 2565 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 2566 struct ieee80211_action_ba_addbarequest *ia; 2567 uint8_t *frm; 2568 uint16_t baparamset; 2569 2570 /* Not action frame? Bail */ 2571 if (! ieee80211_is_action(wh)) 2572 return 0; 2573 2574 /* XXX Not needed for frames we send? */ 2575 #if 0 2576 /* Correct length? */ 2577 if (! ieee80211_parse_action(ni, m)) 2578 return 0; 2579 #endif 2580 2581 /* Extract out action frame */ 2582 frm = (u_int8_t *)&wh[1]; 2583 ia = (struct ieee80211_action_ba_addbarequest *) frm; 2584 2585 /* Not ADDBA? Bail */ 2586 if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA) 2587 return 0; 2588 if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST) 2589 return 0; 2590 2591 /* Extract TID, return it */ 2592 baparamset = le16toh(ia->rq_baparamset); 2593 *tid = (int) MS(baparamset, IEEE80211_BAPS_TID); 2594 2595 return 1; 2596 } 2597 #undef MS 2598 2599 /* Per-node software queue operations */ 2600 2601 /* 2602 * Add the current packet to the given BAW. 2603 * It is assumed that the current packet 2604 * 2605 * + fits inside the BAW; 2606 * + already has had a sequence number allocated. 2607 * 2608 * Since the BAW status may be modified by both the ath task and 2609 * the net80211/ifnet contexts, the TID must be locked. 2610 */ 2611 void 2612 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an, 2613 struct ath_tid *tid, struct ath_buf *bf) 2614 { 2615 int index, cindex; 2616 struct ieee80211_tx_ampdu *tap; 2617 2618 ATH_TX_LOCK_ASSERT(sc); 2619 2620 if (bf->bf_state.bfs_isretried) 2621 return; 2622 2623 tap = ath_tx_get_tx_tid(an, tid->tid); 2624 2625 if (! bf->bf_state.bfs_dobaw) { 2626 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2627 "%s: dobaw=0, seqno=%d, window %d:%d\n", 2628 __func__, SEQNO(bf->bf_state.bfs_seqno), 2629 tap->txa_start, tap->txa_wnd); 2630 } 2631 2632 if (bf->bf_state.bfs_addedbaw) 2633 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2634 "%s: re-added? tid=%d, seqno %d; window %d:%d; " 2635 "baw head=%d tail=%d\n", 2636 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2637 tap->txa_start, tap->txa_wnd, tid->baw_head, 2638 tid->baw_tail); 2639 2640 /* 2641 * Verify that the given sequence number is not outside of the 2642 * BAW. Complain loudly if that's the case. 2643 */ 2644 if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 2645 SEQNO(bf->bf_state.bfs_seqno))) { 2646 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2647 "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; " 2648 "baw head=%d tail=%d\n", 2649 __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2650 tap->txa_start, tap->txa_wnd, tid->baw_head, 2651 tid->baw_tail); 2652 } 2653 2654 /* 2655 * ni->ni_txseqs[] is the currently allocated seqno. 2656 * the txa state contains the current baw start. 2657 */ 2658 index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno)); 2659 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2660 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2661 "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d " 2662 "baw head=%d tail=%d\n", 2663 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2664 tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head, 2665 tid->baw_tail); 2666 2667 2668 #if 0 2669 assert(tid->tx_buf[cindex] == NULL); 2670 #endif 2671 if (tid->tx_buf[cindex] != NULL) { 2672 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2673 "%s: ba packet dup (index=%d, cindex=%d, " 2674 "head=%d, tail=%d)\n", 2675 __func__, index, cindex, tid->baw_head, tid->baw_tail); 2676 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2677 "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n", 2678 __func__, 2679 tid->tx_buf[cindex], 2680 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno), 2681 bf, 2682 SEQNO(bf->bf_state.bfs_seqno) 2683 ); 2684 } 2685 tid->tx_buf[cindex] = bf; 2686 2687 if (index >= ((tid->baw_tail - tid->baw_head) & 2688 (ATH_TID_MAX_BUFS - 1))) { 2689 tid->baw_tail = cindex; 2690 INCR(tid->baw_tail, ATH_TID_MAX_BUFS); 2691 } 2692 } 2693 2694 /* 2695 * Flip the BAW buffer entry over from the existing one to the new one. 2696 * 2697 * When software retransmitting a (sub-)frame, it is entirely possible that 2698 * the frame ath_buf is marked as BUSY and can't be immediately reused. 2699 * In that instance the buffer is cloned and the new buffer is used for 2700 * retransmit. We thus need to update the ath_buf slot in the BAW buf 2701 * tracking array to maintain consistency. 2702 */ 2703 static void 2704 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an, 2705 struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf) 2706 { 2707 int index, cindex; 2708 struct ieee80211_tx_ampdu *tap; 2709 int seqno = SEQNO(old_bf->bf_state.bfs_seqno); 2710 2711 ATH_TX_LOCK_ASSERT(sc); 2712 2713 tap = ath_tx_get_tx_tid(an, tid->tid); 2714 index = ATH_BA_INDEX(tap->txa_start, seqno); 2715 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2716 2717 /* 2718 * Just warn for now; if it happens then we should find out 2719 * about it. It's highly likely the aggregation session will 2720 * soon hang. 2721 */ 2722 if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) { 2723 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2724 "%s: retransmitted buffer" 2725 " has mismatching seqno's, BA session may hang.\n", 2726 __func__); 2727 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2728 "%s: old seqno=%d, new_seqno=%d\n", __func__, 2729 old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno); 2730 } 2731 2732 if (tid->tx_buf[cindex] != old_bf) { 2733 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2734 "%s: ath_buf pointer incorrect; " 2735 " has m BA session may hang.\n", __func__); 2736 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2737 "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf); 2738 } 2739 2740 tid->tx_buf[cindex] = new_bf; 2741 } 2742 2743 /* 2744 * seq_start - left edge of BAW 2745 * seq_next - current/next sequence number to allocate 2746 * 2747 * Since the BAW status may be modified by both the ath task and 2748 * the net80211/ifnet contexts, the TID must be locked. 2749 */ 2750 static void 2751 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an, 2752 struct ath_tid *tid, const struct ath_buf *bf) 2753 { 2754 int index, cindex; 2755 struct ieee80211_tx_ampdu *tap; 2756 int seqno = SEQNO(bf->bf_state.bfs_seqno); 2757 2758 ATH_TX_LOCK_ASSERT(sc); 2759 2760 tap = ath_tx_get_tx_tid(an, tid->tid); 2761 index = ATH_BA_INDEX(tap->txa_start, seqno); 2762 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2763 2764 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2765 "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, " 2766 "baw head=%d, tail=%d\n", 2767 __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index, 2768 cindex, tid->baw_head, tid->baw_tail); 2769 2770 /* 2771 * If this occurs then we have a big problem - something else 2772 * has slid tap->txa_start along without updating the BAW 2773 * tracking start/end pointers. Thus the TX BAW state is now 2774 * completely busted. 2775 * 2776 * But for now, since I haven't yet fixed TDMA and buffer cloning, 2777 * it's quite possible that a cloned buffer is making its way 2778 * here and causing it to fire off. Disable TDMA for now. 2779 */ 2780 if (tid->tx_buf[cindex] != bf) { 2781 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2782 "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n", 2783 __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 2784 tid->tx_buf[cindex], 2785 (tid->tx_buf[cindex] != NULL) ? 2786 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1); 2787 } 2788 2789 tid->tx_buf[cindex] = NULL; 2790 2791 while (tid->baw_head != tid->baw_tail && 2792 !tid->tx_buf[tid->baw_head]) { 2793 INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 2794 INCR(tid->baw_head, ATH_TID_MAX_BUFS); 2795 } 2796 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2797 "%s: tid=%d: baw is now %d:%d, baw head=%d\n", 2798 __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head); 2799 } 2800 2801 static void 2802 ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid, 2803 struct ath_buf *bf) 2804 { 2805 struct ieee80211_frame *wh; 2806 2807 ATH_TX_LOCK_ASSERT(sc); 2808 2809 if (tid->an->an_leak_count > 0) { 2810 wh = mtod(bf->bf_m, struct ieee80211_frame *); 2811 2812 /* 2813 * Update MORE based on the software/net80211 queue states. 2814 */ 2815 if ((tid->an->an_stack_psq > 0) 2816 || (tid->an->an_swq_depth > 0)) 2817 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 2818 else 2819 wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA; 2820 2821 DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE, 2822 "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n", 2823 __func__, 2824 tid->an->an_node.ni_macaddr, 2825 ":", 2826 tid->an->an_leak_count, 2827 tid->an->an_stack_psq, 2828 tid->an->an_swq_depth, 2829 !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA)); 2830 2831 /* 2832 * Re-sync the underlying buffer. 2833 */ 2834 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 2835 BUS_DMASYNC_PREWRITE); 2836 2837 tid->an->an_leak_count --; 2838 } 2839 } 2840 2841 static int 2842 ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid) 2843 { 2844 2845 ATH_TX_LOCK_ASSERT(sc); 2846 2847 if (tid->an->an_leak_count > 0) { 2848 return (1); 2849 } 2850 if (tid->paused) 2851 return (0); 2852 return (1); 2853 } 2854 2855 /* 2856 * Mark the current node/TID as ready to TX. 2857 * 2858 * This is done to make it easy for the software scheduler to 2859 * find which nodes have data to send. 2860 * 2861 * The TXQ lock must be held. 2862 */ 2863 void 2864 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid) 2865 { 2866 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2867 2868 ATH_TX_LOCK_ASSERT(sc); 2869 2870 /* 2871 * If we are leaking out a frame to this destination 2872 * for PS-POLL, ensure that we allow scheduling to 2873 * occur. 2874 */ 2875 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 2876 return; /* paused, can't schedule yet */ 2877 2878 if (tid->sched) 2879 return; /* already scheduled */ 2880 2881 tid->sched = 1; 2882 2883 #if 0 2884 /* 2885 * If this is a sleeping node we're leaking to, given 2886 * it a higher priority. This is so bad for QoS it hurts. 2887 */ 2888 if (tid->an->an_leak_count) { 2889 TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem); 2890 } else { 2891 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2892 } 2893 #endif 2894 2895 /* 2896 * We can't do the above - it'll confuse the TXQ software 2897 * scheduler which will keep checking the _head_ TID 2898 * in the list to see if it has traffic. If we queue 2899 * a TID to the head of the list and it doesn't transmit, 2900 * we'll check it again. 2901 * 2902 * So, get the rest of this leaking frames support working 2903 * and reliable first and _then_ optimise it so they're 2904 * pushed out in front of any other pending software 2905 * queued nodes. 2906 */ 2907 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2908 } 2909 2910 /* 2911 * Mark the current node as no longer needing to be polled for 2912 * TX packets. 2913 * 2914 * The TXQ lock must be held. 2915 */ 2916 static void 2917 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid) 2918 { 2919 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2920 2921 ATH_TX_LOCK_ASSERT(sc); 2922 2923 if (tid->sched == 0) 2924 return; 2925 2926 tid->sched = 0; 2927 TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem); 2928 } 2929 2930 /* 2931 * Assign a sequence number manually to the given frame. 2932 * 2933 * This should only be called for A-MPDU TX frames. 2934 */ 2935 static ieee80211_seq 2936 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni, 2937 struct ath_buf *bf, struct mbuf *m0) 2938 { 2939 struct ieee80211_frame *wh; 2940 int tid, pri; 2941 ieee80211_seq seqno; 2942 uint8_t subtype; 2943 2944 /* TID lookup */ 2945 wh = mtod(m0, struct ieee80211_frame *); 2946 pri = M_WME_GETAC(m0); /* honor classification */ 2947 tid = WME_AC_TO_TID(pri); 2948 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n", 2949 __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2950 2951 /* XXX Is it a control frame? Ignore */ 2952 2953 /* Does the packet require a sequence number? */ 2954 if (! IEEE80211_QOS_HAS_SEQ(wh)) 2955 return -1; 2956 2957 ATH_TX_LOCK_ASSERT(sc); 2958 2959 /* 2960 * Is it a QOS NULL Data frame? Give it a sequence number from 2961 * the default TID (IEEE80211_NONQOS_TID.) 2962 * 2963 * The RX path of everything I've looked at doesn't include the NULL 2964 * data frame sequence number in the aggregation state updates, so 2965 * assigning it a sequence number there will cause a BAW hole on the 2966 * RX side. 2967 */ 2968 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2969 if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) { 2970 /* XXX no locking for this TID? This is a bit of a problem. */ 2971 seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 2972 INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 2973 } else { 2974 /* Manually assign sequence number */ 2975 seqno = ni->ni_txseqs[tid]; 2976 INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE); 2977 } 2978 *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 2979 M_SEQNO_SET(m0, seqno); 2980 2981 /* Return so caller can do something with it if needed */ 2982 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: -> seqno=%d\n", __func__, seqno); 2983 return seqno; 2984 } 2985 2986 /* 2987 * Attempt to direct dispatch an aggregate frame to hardware. 2988 * If the frame is out of BAW, queue. 2989 * Otherwise, schedule it as a single frame. 2990 */ 2991 static void 2992 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 2993 struct ath_txq *txq, struct ath_buf *bf) 2994 { 2995 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 2996 struct ieee80211_tx_ampdu *tap; 2997 2998 ATH_TX_LOCK_ASSERT(sc); 2999 3000 tap = ath_tx_get_tx_tid(an, tid->tid); 3001 3002 /* paused? queue */ 3003 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 3004 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3005 /* XXX don't sched - we're paused! */ 3006 return; 3007 } 3008 3009 /* outside baw? queue */ 3010 if (bf->bf_state.bfs_dobaw && 3011 (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 3012 SEQNO(bf->bf_state.bfs_seqno)))) { 3013 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3014 ath_tx_tid_sched(sc, tid); 3015 return; 3016 } 3017 3018 /* 3019 * This is a temporary check and should be removed once 3020 * all the relevant code paths have been fixed. 3021 * 3022 * During aggregate retries, it's possible that the head 3023 * frame will fail (which has the bfs_aggr and bfs_nframes 3024 * fields set for said aggregate) and will be retried as 3025 * a single frame. In this instance, the values should 3026 * be reset or the completion code will get upset with you. 3027 */ 3028 if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) { 3029 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 3030 "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__, 3031 bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes); 3032 bf->bf_state.bfs_aggr = 0; 3033 bf->bf_state.bfs_nframes = 1; 3034 } 3035 3036 /* Update CLRDMASK just before this frame is queued */ 3037 ath_tx_update_clrdmask(sc, tid, bf); 3038 3039 /* Direct dispatch to hardware */ 3040 ath_tx_do_ratelookup(sc, bf); 3041 ath_tx_calc_duration(sc, bf); 3042 ath_tx_calc_protection(sc, bf); 3043 ath_tx_set_rtscts(sc, bf); 3044 ath_tx_rate_fill_rcflags(sc, bf); 3045 ath_tx_setds(sc, bf); 3046 3047 /* Statistics */ 3048 sc->sc_aggr_stats.aggr_low_hwq_single_pkt++; 3049 3050 /* Track per-TID hardware queue depth correctly */ 3051 tid->hwq_depth++; 3052 3053 /* Add to BAW */ 3054 if (bf->bf_state.bfs_dobaw) { 3055 ath_tx_addto_baw(sc, an, tid, bf); 3056 bf->bf_state.bfs_addedbaw = 1; 3057 } 3058 3059 /* Set completion handler, multi-frame aggregate or not */ 3060 bf->bf_comp = ath_tx_aggr_comp; 3061 3062 /* 3063 * Update the current leak count if 3064 * we're leaking frames; and set the 3065 * MORE flag as appropriate. 3066 */ 3067 ath_tx_leak_count_update(sc, tid, bf); 3068 3069 /* Hand off to hardware */ 3070 ath_tx_handoff(sc, txq, bf); 3071 } 3072 3073 /* 3074 * Attempt to send the packet. 3075 * If the queue isn't busy, direct-dispatch. 3076 * If the queue is busy enough, queue the given packet on the 3077 * relevant software queue. 3078 */ 3079 void 3080 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, 3081 struct ath_txq *txq, int queue_to_head, struct ath_buf *bf) 3082 { 3083 struct ath_node *an = ATH_NODE(ni); 3084 struct ieee80211_frame *wh; 3085 struct ath_tid *atid; 3086 int pri, tid; 3087 struct mbuf *m0 = bf->bf_m; 3088 3089 ATH_TX_LOCK_ASSERT(sc); 3090 3091 /* Fetch the TID - non-QoS frames get assigned to TID 16 */ 3092 wh = mtod(m0, struct ieee80211_frame *); 3093 pri = ath_tx_getac(sc, m0); 3094 tid = ath_tx_gettid(sc, m0); 3095 atid = &an->an_tid[tid]; 3096 3097 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 3098 __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 3099 3100 /* Set local packet state, used to queue packets to hardware */ 3101 /* XXX potentially duplicate info, re-check */ 3102 bf->bf_state.bfs_tid = tid; 3103 bf->bf_state.bfs_tx_queue = txq->axq_qnum; 3104 bf->bf_state.bfs_pri = pri; 3105 3106 /* 3107 * If the hardware queue isn't busy, queue it directly. 3108 * If the hardware queue is busy, queue it. 3109 * If the TID is paused or the traffic it outside BAW, software 3110 * queue it. 3111 * 3112 * If the node is in power-save and we're leaking a frame, 3113 * leak a single frame. 3114 */ 3115 if (! ath_tx_tid_can_tx_or_sched(sc, atid)) { 3116 /* TID is paused, queue */ 3117 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__); 3118 /* 3119 * If the caller requested that it be sent at a high 3120 * priority, queue it at the head of the list. 3121 */ 3122 if (queue_to_head) 3123 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 3124 else 3125 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3126 } else if (ath_tx_ampdu_pending(sc, an, tid)) { 3127 /* AMPDU pending; queue */ 3128 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__); 3129 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3130 /* XXX sched? */ 3131 } else if (ath_tx_ampdu_running(sc, an, tid)) { 3132 /* AMPDU running, attempt direct dispatch if possible */ 3133 3134 /* 3135 * Always queue the frame to the tail of the list. 3136 */ 3137 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3138 3139 /* 3140 * If the hardware queue isn't busy, direct dispatch 3141 * the head frame in the list. Don't schedule the 3142 * TID - let it build some more frames first? 3143 * 3144 * When running A-MPDU, always just check the hardware 3145 * queue depth against the aggregate frame limit. 3146 * We don't want to burst a large number of single frames 3147 * out to the hardware; we want to aggressively hold back. 3148 * 3149 * Otherwise, schedule the TID. 3150 */ 3151 /* XXX TXQ locking */ 3152 if (txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_aggr) { 3153 bf = ATH_TID_FIRST(atid); 3154 ATH_TID_REMOVE(atid, bf, bf_list); 3155 3156 /* 3157 * Ensure it's definitely treated as a non-AMPDU 3158 * frame - this information may have been left 3159 * over from a previous attempt. 3160 */ 3161 bf->bf_state.bfs_aggr = 0; 3162 bf->bf_state.bfs_nframes = 1; 3163 3164 /* Queue to the hardware */ 3165 ath_tx_xmit_aggr(sc, an, txq, bf); 3166 DPRINTF(sc, ATH_DEBUG_SW_TX, 3167 "%s: xmit_aggr\n", 3168 __func__); 3169 } else { 3170 DPRINTF(sc, ATH_DEBUG_SW_TX, 3171 "%s: ampdu; swq'ing\n", 3172 __func__); 3173 3174 ath_tx_tid_sched(sc, atid); 3175 } 3176 /* 3177 * If we're not doing A-MPDU, be prepared to direct dispatch 3178 * up to both limits if possible. This particular corner 3179 * case may end up with packet starvation between aggregate 3180 * traffic and non-aggregate traffic: we want to ensure 3181 * that non-aggregate stations get a few frames queued to the 3182 * hardware before the aggregate station(s) get their chance. 3183 * 3184 * So if you only ever see a couple of frames direct dispatched 3185 * to the hardware from a non-AMPDU client, check both here 3186 * and in the software queue dispatcher to ensure that those 3187 * non-AMPDU stations get a fair chance to transmit. 3188 */ 3189 /* XXX TXQ locking */ 3190 } else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) && 3191 (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) { 3192 /* AMPDU not running, attempt direct dispatch */ 3193 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__); 3194 /* See if clrdmask needs to be set */ 3195 ath_tx_update_clrdmask(sc, atid, bf); 3196 3197 /* 3198 * Update the current leak count if 3199 * we're leaking frames; and set the 3200 * MORE flag as appropriate. 3201 */ 3202 ath_tx_leak_count_update(sc, atid, bf); 3203 3204 /* 3205 * Dispatch the frame. 3206 */ 3207 ath_tx_xmit_normal(sc, txq, bf); 3208 } else { 3209 /* Busy; queue */ 3210 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__); 3211 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3212 ath_tx_tid_sched(sc, atid); 3213 } 3214 } 3215 3216 /* 3217 * Only set the clrdmask bit if none of the nodes are currently 3218 * filtered. 3219 * 3220 * XXX TODO: go through all the callers and check to see 3221 * which are being called in the context of looping over all 3222 * TIDs (eg, if all tids are being paused, resumed, etc.) 3223 * That'll avoid O(n^2) complexity here. 3224 */ 3225 static void 3226 ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an) 3227 { 3228 int i; 3229 3230 ATH_TX_LOCK_ASSERT(sc); 3231 3232 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3233 if (an->an_tid[i].isfiltered == 1) 3234 return; 3235 } 3236 an->clrdmask = 1; 3237 } 3238 3239 /* 3240 * Configure the per-TID node state. 3241 * 3242 * This likely belongs in if_ath_node.c but I can't think of anywhere 3243 * else to put it just yet. 3244 * 3245 * This sets up the SLISTs and the mutex as appropriate. 3246 */ 3247 void 3248 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an) 3249 { 3250 int i, j; 3251 struct ath_tid *atid; 3252 3253 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3254 atid = &an->an_tid[i]; 3255 3256 /* XXX now with this bzer(), is the field 0'ing needed? */ 3257 bzero(atid, sizeof(*atid)); 3258 3259 TAILQ_INIT(&atid->tid_q); 3260 TAILQ_INIT(&atid->filtq.tid_q); 3261 atid->tid = i; 3262 atid->an = an; 3263 for (j = 0; j < ATH_TID_MAX_BUFS; j++) 3264 atid->tx_buf[j] = NULL; 3265 atid->baw_head = atid->baw_tail = 0; 3266 atid->paused = 0; 3267 atid->sched = 0; 3268 atid->hwq_depth = 0; 3269 atid->cleanup_inprogress = 0; 3270 if (i == IEEE80211_NONQOS_TID) 3271 atid->ac = ATH_NONQOS_TID_AC; 3272 else 3273 atid->ac = TID_TO_WME_AC(i); 3274 } 3275 an->clrdmask = 1; /* Always start by setting this bit */ 3276 } 3277 3278 /* 3279 * Pause the current TID. This stops packets from being transmitted 3280 * on it. 3281 * 3282 * Since this is also called from upper layers as well as the driver, 3283 * it will get the TID lock. 3284 */ 3285 static void 3286 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid) 3287 { 3288 3289 ATH_TX_LOCK_ASSERT(sc); 3290 tid->paused++; 3291 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n", 3292 __func__, 3293 tid->an->an_node.ni_macaddr, ":", 3294 tid->tid, 3295 tid->paused); 3296 } 3297 3298 /* 3299 * Unpause the current TID, and schedule it if needed. 3300 */ 3301 static void 3302 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid) 3303 { 3304 ATH_TX_LOCK_ASSERT(sc); 3305 3306 /* 3307 * There's some odd places where ath_tx_tid_resume() is called 3308 * when it shouldn't be; this works around that particular issue 3309 * until it's actually resolved. 3310 */ 3311 if (tid->paused == 0) { 3312 device_printf(sc->sc_dev, 3313 "%s: [%6D]: tid=%d, paused=0?\n", 3314 __func__, 3315 tid->an->an_node.ni_macaddr, ":", 3316 tid->tid); 3317 } else { 3318 tid->paused--; 3319 } 3320 3321 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 3322 "%s: [%6D]: tid=%d, unpaused = %d\n", 3323 __func__, 3324 tid->an->an_node.ni_macaddr, ":", 3325 tid->tid, 3326 tid->paused); 3327 3328 if (tid->paused) 3329 return; 3330 3331 /* 3332 * Override the clrdmask configuration for the next frame 3333 * from this TID, just to get the ball rolling. 3334 */ 3335 ath_tx_set_clrdmask(sc, tid->an); 3336 3337 if (tid->axq_depth == 0) 3338 return; 3339 3340 /* XXX isfiltered shouldn't ever be 0 at this point */ 3341 if (tid->isfiltered == 1) { 3342 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n", 3343 __func__); 3344 return; 3345 } 3346 3347 ath_tx_tid_sched(sc, tid); 3348 3349 /* 3350 * Queue the software TX scheduler. 3351 */ 3352 ath_tx_swq_kick(sc); 3353 } 3354 3355 /* 3356 * Add the given ath_buf to the TID filtered frame list. 3357 * This requires the TID be filtered. 3358 */ 3359 static void 3360 ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid, 3361 struct ath_buf *bf) 3362 { 3363 3364 ATH_TX_LOCK_ASSERT(sc); 3365 3366 if (!tid->isfiltered) 3367 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n", 3368 __func__); 3369 3370 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf); 3371 3372 /* Set the retry bit and bump the retry counter */ 3373 ath_tx_set_retry(sc, bf); 3374 sc->sc_stats.ast_tx_swfiltered++; 3375 3376 ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list); 3377 } 3378 3379 /* 3380 * Handle a completed filtered frame from the given TID. 3381 * This just enables/pauses the filtered frame state if required 3382 * and appends the filtered frame to the filtered queue. 3383 */ 3384 static void 3385 ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid, 3386 struct ath_buf *bf) 3387 { 3388 3389 ATH_TX_LOCK_ASSERT(sc); 3390 3391 if (! tid->isfiltered) { 3392 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n", 3393 __func__, tid->tid); 3394 tid->isfiltered = 1; 3395 ath_tx_tid_pause(sc, tid); 3396 } 3397 3398 /* Add the frame to the filter queue */ 3399 ath_tx_tid_filt_addbuf(sc, tid, bf); 3400 } 3401 3402 /* 3403 * Complete the filtered frame TX completion. 3404 * 3405 * If there are no more frames in the hardware queue, unpause/unfilter 3406 * the TID if applicable. Otherwise we will wait for a node PS transition 3407 * to unfilter. 3408 */ 3409 static void 3410 ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid) 3411 { 3412 struct ath_buf *bf; 3413 int do_resume = 0; 3414 3415 ATH_TX_LOCK_ASSERT(sc); 3416 3417 if (tid->hwq_depth != 0) 3418 return; 3419 3420 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n", 3421 __func__, tid->tid); 3422 if (tid->isfiltered == 1) { 3423 tid->isfiltered = 0; 3424 do_resume = 1; 3425 } 3426 3427 /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */ 3428 ath_tx_set_clrdmask(sc, tid->an); 3429 3430 /* XXX this is really quite inefficient */ 3431 while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) { 3432 ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3433 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3434 } 3435 3436 /* And only resume if we had paused before */ 3437 if (do_resume) 3438 ath_tx_tid_resume(sc, tid); 3439 } 3440 3441 /* 3442 * Called when a single (aggregate or otherwise) frame is completed. 3443 * 3444 * Returns 0 if the buffer could be added to the filtered list 3445 * (cloned or otherwise), 1 if the buffer couldn't be added to the 3446 * filtered list (failed clone; expired retry) and the caller should 3447 * free it and handle it like a failure (eg by sending a BAR.) 3448 * 3449 * since the buffer may be cloned, bf must be not touched after this 3450 * if the return value is 0. 3451 */ 3452 static int 3453 ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid, 3454 struct ath_buf *bf) 3455 { 3456 struct ath_buf *nbf; 3457 int retval; 3458 3459 ATH_TX_LOCK_ASSERT(sc); 3460 3461 /* 3462 * Don't allow a filtered frame to live forever. 3463 */ 3464 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 3465 sc->sc_stats.ast_tx_swretrymax++; 3466 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3467 "%s: bf=%p, seqno=%d, exceeded retries\n", 3468 __func__, 3469 bf, 3470 SEQNO(bf->bf_state.bfs_seqno)); 3471 retval = 1; /* error */ 3472 goto finish; 3473 } 3474 3475 /* 3476 * A busy buffer can't be added to the retry list. 3477 * It needs to be cloned. 3478 */ 3479 if (bf->bf_flags & ATH_BUF_BUSY) { 3480 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3481 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3482 "%s: busy buffer clone: %p -> %p\n", 3483 __func__, bf, nbf); 3484 } else { 3485 nbf = bf; 3486 } 3487 3488 if (nbf == NULL) { 3489 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3490 "%s: busy buffer couldn't be cloned (%p)!\n", 3491 __func__, bf); 3492 retval = 1; /* error */ 3493 } else { 3494 ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3495 retval = 0; /* ok */ 3496 } 3497 finish: 3498 ath_tx_tid_filt_comp_complete(sc, tid); 3499 3500 return (retval); 3501 } 3502 3503 static void 3504 ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid, 3505 struct ath_buf *bf_first, ath_bufhead *bf_q) 3506 { 3507 struct ath_buf *bf, *bf_next, *nbf; 3508 3509 ATH_TX_LOCK_ASSERT(sc); 3510 3511 bf = bf_first; 3512 while (bf) { 3513 bf_next = bf->bf_next; 3514 bf->bf_next = NULL; /* Remove it from the aggr list */ 3515 3516 /* 3517 * Don't allow a filtered frame to live forever. 3518 */ 3519 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 3520 sc->sc_stats.ast_tx_swretrymax++; 3521 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3522 "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n", 3523 __func__, 3524 tid->tid, 3525 bf, 3526 SEQNO(bf->bf_state.bfs_seqno)); 3527 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3528 goto next; 3529 } 3530 3531 if (bf->bf_flags & ATH_BUF_BUSY) { 3532 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3533 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3534 "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n", 3535 __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno)); 3536 } else { 3537 nbf = bf; 3538 } 3539 3540 /* 3541 * If the buffer couldn't be cloned, add it to bf_q; 3542 * the caller will free the buffer(s) as required. 3543 */ 3544 if (nbf == NULL) { 3545 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3546 "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n", 3547 __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno)); 3548 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3549 } else { 3550 ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3551 } 3552 next: 3553 bf = bf_next; 3554 } 3555 3556 ath_tx_tid_filt_comp_complete(sc, tid); 3557 } 3558 3559 /* 3560 * Suspend the queue because we need to TX a BAR. 3561 */ 3562 static void 3563 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid) 3564 { 3565 3566 ATH_TX_LOCK_ASSERT(sc); 3567 3568 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3569 "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n", 3570 __func__, 3571 tid->tid, 3572 tid->bar_wait, 3573 tid->bar_tx); 3574 3575 /* We shouldn't be called when bar_tx is 1 */ 3576 if (tid->bar_tx) { 3577 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3578 "%s: bar_tx is 1?!\n", __func__); 3579 } 3580 3581 /* If we've already been called, just be patient. */ 3582 if (tid->bar_wait) 3583 return; 3584 3585 /* Wait! */ 3586 tid->bar_wait = 1; 3587 3588 /* Only one pause, no matter how many frames fail */ 3589 ath_tx_tid_pause(sc, tid); 3590 } 3591 3592 /* 3593 * We've finished with BAR handling - either we succeeded or 3594 * failed. Either way, unsuspend TX. 3595 */ 3596 static void 3597 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid) 3598 { 3599 3600 ATH_TX_LOCK_ASSERT(sc); 3601 3602 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3603 "%s: %6D: TID=%d, called\n", 3604 __func__, 3605 tid->an->an_node.ni_macaddr, 3606 ":", 3607 tid->tid); 3608 3609 if (tid->bar_tx == 0 || tid->bar_wait == 0) { 3610 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3611 "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 3612 __func__, tid->an->an_node.ni_macaddr, ":", 3613 tid->tid, tid->bar_tx, tid->bar_wait); 3614 } 3615 3616 tid->bar_tx = tid->bar_wait = 0; 3617 ath_tx_tid_resume(sc, tid); 3618 } 3619 3620 /* 3621 * Return whether we're ready to TX a BAR frame. 3622 * 3623 * Requires the TID lock be held. 3624 */ 3625 static int 3626 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid) 3627 { 3628 3629 ATH_TX_LOCK_ASSERT(sc); 3630 3631 if (tid->bar_wait == 0 || tid->hwq_depth > 0) 3632 return (0); 3633 3634 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3635 "%s: %6D: TID=%d, bar ready\n", 3636 __func__, 3637 tid->an->an_node.ni_macaddr, 3638 ":", 3639 tid->tid); 3640 3641 return (1); 3642 } 3643 3644 /* 3645 * Check whether the current TID is ready to have a BAR 3646 * TXed and if so, do the TX. 3647 * 3648 * Since the TID/TXQ lock can't be held during a call to 3649 * ieee80211_send_bar(), we have to do the dirty thing of unlocking it, 3650 * sending the BAR and locking it again. 3651 * 3652 * Eventually, the code to send the BAR should be broken out 3653 * from this routine so the lock doesn't have to be reacquired 3654 * just to be immediately dropped by the caller. 3655 */ 3656 static void 3657 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid) 3658 { 3659 struct ieee80211_tx_ampdu *tap; 3660 3661 ATH_TX_LOCK_ASSERT(sc); 3662 3663 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3664 "%s: %6D: TID=%d, called\n", 3665 __func__, 3666 tid->an->an_node.ni_macaddr, 3667 ":", 3668 tid->tid); 3669 3670 tap = ath_tx_get_tx_tid(tid->an, tid->tid); 3671 3672 /* 3673 * This is an error condition! 3674 */ 3675 if (tid->bar_wait == 0 || tid->bar_tx == 1) { 3676 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3677 "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 3678 __func__, tid->an->an_node.ni_macaddr, ":", 3679 tid->tid, tid->bar_tx, tid->bar_wait); 3680 return; 3681 } 3682 3683 /* Don't do anything if we still have pending frames */ 3684 if (tid->hwq_depth > 0) { 3685 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3686 "%s: %6D: TID=%d, hwq_depth=%d, waiting\n", 3687 __func__, 3688 tid->an->an_node.ni_macaddr, 3689 ":", 3690 tid->tid, 3691 tid->hwq_depth); 3692 return; 3693 } 3694 3695 /* We're now about to TX */ 3696 tid->bar_tx = 1; 3697 3698 /* 3699 * Override the clrdmask configuration for the next frame, 3700 * just to get the ball rolling. 3701 */ 3702 ath_tx_set_clrdmask(sc, tid->an); 3703 3704 /* 3705 * Calculate new BAW left edge, now that all frames have either 3706 * succeeded or failed. 3707 * 3708 * XXX verify this is _actually_ the valid value to begin at! 3709 */ 3710 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3711 "%s: %6D: TID=%d, new BAW left edge=%d\n", 3712 __func__, 3713 tid->an->an_node.ni_macaddr, 3714 ":", 3715 tid->tid, 3716 tap->txa_start); 3717 3718 /* Try sending the BAR frame */ 3719 /* We can't hold the lock here! */ 3720 3721 ATH_TX_UNLOCK(sc); 3722 if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) { 3723 /* Success? Now we wait for notification that it's done */ 3724 ATH_TX_LOCK(sc); 3725 return; 3726 } 3727 3728 /* Failure? For now, warn loudly and continue */ 3729 ATH_TX_LOCK(sc); 3730 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3731 "%s: %6D: TID=%d, failed to TX BAR, continue!\n", 3732 __func__, tid->an->an_node.ni_macaddr, ":", 3733 tid->tid); 3734 ath_tx_tid_bar_unsuspend(sc, tid); 3735 } 3736 3737 static void 3738 ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an, 3739 struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf) 3740 { 3741 3742 ATH_TX_LOCK_ASSERT(sc); 3743 3744 /* 3745 * If the current TID is running AMPDU, update 3746 * the BAW. 3747 */ 3748 if (ath_tx_ampdu_running(sc, an, tid->tid) && 3749 bf->bf_state.bfs_dobaw) { 3750 /* 3751 * Only remove the frame from the BAW if it's 3752 * been transmitted at least once; this means 3753 * the frame was in the BAW to begin with. 3754 */ 3755 if (bf->bf_state.bfs_retries > 0) { 3756 ath_tx_update_baw(sc, an, tid, bf); 3757 bf->bf_state.bfs_dobaw = 0; 3758 } 3759 #if 0 3760 /* 3761 * This has become a non-fatal error now 3762 */ 3763 if (! bf->bf_state.bfs_addedbaw) 3764 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW 3765 "%s: wasn't added: seqno %d\n", 3766 __func__, SEQNO(bf->bf_state.bfs_seqno)); 3767 #endif 3768 } 3769 3770 /* Strip it out of an aggregate list if it was in one */ 3771 bf->bf_next = NULL; 3772 3773 /* Insert on the free queue to be freed by the caller */ 3774 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 3775 } 3776 3777 static void 3778 ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an, 3779 const char *pfx, struct ath_tid *tid, struct ath_buf *bf) 3780 { 3781 struct ieee80211_node *ni = &an->an_node; 3782 struct ath_txq *txq; 3783 struct ieee80211_tx_ampdu *tap; 3784 3785 txq = sc->sc_ac2q[tid->ac]; 3786 tap = ath_tx_get_tx_tid(an, tid->tid); 3787 3788 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3789 "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, " 3790 "seqno=%d, retry=%d\n", 3791 __func__, 3792 pfx, 3793 ni->ni_macaddr, 3794 ":", 3795 bf, 3796 bf->bf_state.bfs_addedbaw, 3797 bf->bf_state.bfs_dobaw, 3798 SEQNO(bf->bf_state.bfs_seqno), 3799 bf->bf_state.bfs_retries); 3800 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3801 "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n", 3802 __func__, 3803 pfx, 3804 ni->ni_macaddr, 3805 ":", 3806 bf, 3807 txq->axq_qnum, 3808 txq->axq_depth, 3809 txq->axq_aggr_depth); 3810 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3811 "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, " 3812 "isfiltered=%d\n", 3813 __func__, 3814 pfx, 3815 ni->ni_macaddr, 3816 ":", 3817 bf, 3818 tid->axq_depth, 3819 tid->hwq_depth, 3820 tid->bar_wait, 3821 tid->isfiltered); 3822 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3823 "%s: %s: %6D: tid %d: " 3824 "sched=%d, paused=%d, " 3825 "incomp=%d, baw_head=%d, " 3826 "baw_tail=%d txa_start=%d, ni_txseqs=%d\n", 3827 __func__, 3828 pfx, 3829 ni->ni_macaddr, 3830 ":", 3831 tid->tid, 3832 tid->sched, tid->paused, 3833 tid->incomp, tid->baw_head, 3834 tid->baw_tail, tap == NULL ? -1 : tap->txa_start, 3835 ni->ni_txseqs[tid->tid]); 3836 3837 /* XXX Dump the frame, see what it is? */ 3838 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 3839 ieee80211_dump_pkt(ni->ni_ic, 3840 mtod(bf->bf_m, const uint8_t *), 3841 bf->bf_m->m_len, 0, -1); 3842 } 3843 3844 /* 3845 * Free any packets currently pending in the software TX queue. 3846 * 3847 * This will be called when a node is being deleted. 3848 * 3849 * It can also be called on an active node during an interface 3850 * reset or state transition. 3851 * 3852 * (From Linux/reference): 3853 * 3854 * TODO: For frame(s) that are in the retry state, we will reuse the 3855 * sequence number(s) without setting the retry bit. The 3856 * alternative is to give up on these and BAR the receiver's window 3857 * forward. 3858 */ 3859 static void 3860 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an, 3861 struct ath_tid *tid, ath_bufhead *bf_cq) 3862 { 3863 struct ath_buf *bf; 3864 struct ieee80211_tx_ampdu *tap; 3865 struct ieee80211_node *ni = &an->an_node; 3866 int t; 3867 3868 tap = ath_tx_get_tx_tid(an, tid->tid); 3869 3870 ATH_TX_LOCK_ASSERT(sc); 3871 3872 /* Walk the queue, free frames */ 3873 t = 0; 3874 for (;;) { 3875 bf = ATH_TID_FIRST(tid); 3876 if (bf == NULL) { 3877 break; 3878 } 3879 3880 if (t == 0) { 3881 ath_tx_tid_drain_print(sc, an, "norm", tid, bf); 3882 // t = 1; 3883 } 3884 3885 ATH_TID_REMOVE(tid, bf, bf_list); 3886 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3887 } 3888 3889 /* And now, drain the filtered frame queue */ 3890 t = 0; 3891 for (;;) { 3892 bf = ATH_TID_FILT_FIRST(tid); 3893 if (bf == NULL) 3894 break; 3895 3896 if (t == 0) { 3897 ath_tx_tid_drain_print(sc, an, "filt", tid, bf); 3898 // t = 1; 3899 } 3900 3901 ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3902 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3903 } 3904 3905 /* 3906 * Override the clrdmask configuration for the next frame 3907 * in case there is some future transmission, just to get 3908 * the ball rolling. 3909 * 3910 * This won't hurt things if the TID is about to be freed. 3911 */ 3912 ath_tx_set_clrdmask(sc, tid->an); 3913 3914 /* 3915 * Now that it's completed, grab the TID lock and update 3916 * the sequence number and BAW window. 3917 * Because sequence numbers have been assigned to frames 3918 * that haven't been sent yet, it's entirely possible 3919 * we'll be called with some pending frames that have not 3920 * been transmitted. 3921 * 3922 * The cleaner solution is to do the sequence number allocation 3923 * when the packet is first transmitted - and thus the "retries" 3924 * check above would be enough to update the BAW/seqno. 3925 */ 3926 3927 /* But don't do it for non-QoS TIDs */ 3928 if (tap) { 3929 #if 1 3930 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 3931 "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n", 3932 __func__, 3933 ni->ni_macaddr, 3934 ":", 3935 an, 3936 tid->tid, 3937 tap->txa_start); 3938 #endif 3939 ni->ni_txseqs[tid->tid] = tap->txa_start; 3940 tid->baw_tail = tid->baw_head; 3941 } 3942 } 3943 3944 /* 3945 * Reset the TID state. This must be only called once the node has 3946 * had its frames flushed from this TID, to ensure that no other 3947 * pause / unpause logic can kick in. 3948 */ 3949 static void 3950 ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid) 3951 { 3952 3953 #if 0 3954 tid->bar_wait = tid->bar_tx = tid->isfiltered = 0; 3955 tid->paused = tid->sched = tid->addba_tx_pending = 0; 3956 tid->incomp = tid->cleanup_inprogress = 0; 3957 #endif 3958 3959 /* 3960 * If we have a bar_wait set, we need to unpause the TID 3961 * here. Otherwise once cleanup has finished, the TID won't 3962 * have the right paused counter. 3963 * 3964 * XXX I'm not going through resume here - I don't want the 3965 * node to be rescheuled just yet. This however should be 3966 * methodized! 3967 */ 3968 if (tid->bar_wait) { 3969 if (tid->paused > 0) { 3970 tid->paused --; 3971 } 3972 } 3973 3974 /* 3975 * XXX same with a currently filtered TID. 3976 * 3977 * Since this is being called during a flush, we assume that 3978 * the filtered frame list is actually empty. 3979 * 3980 * XXX TODO: add in a check to ensure that the filtered queue 3981 * depth is actually 0! 3982 */ 3983 if (tid->isfiltered) { 3984 if (tid->paused > 0) { 3985 tid->paused --; 3986 } 3987 } 3988 3989 /* 3990 * Clear BAR, filtered frames, scheduled and ADDBA pending. 3991 * The TID may be going through cleanup from the last association 3992 * where things in the BAW are still in the hardware queue. 3993 */ 3994 tid->bar_wait = 0; 3995 tid->bar_tx = 0; 3996 tid->isfiltered = 0; 3997 tid->sched = 0; 3998 tid->addba_tx_pending = 0; 3999 4000 /* 4001 * XXX TODO: it may just be enough to walk the HWQs and mark 4002 * frames for that node as non-aggregate; or mark the ath_node 4003 * with something that indicates that aggregation is no longer 4004 * occurring. Then we can just toss the BAW complaints and 4005 * do a complete hard reset of state here - no pause, no 4006 * complete counter, etc. 4007 */ 4008 4009 } 4010 4011 /* 4012 * Flush all software queued packets for the given node. 4013 * 4014 * This occurs when a completion handler frees the last buffer 4015 * for a node, and the node is thus freed. This causes the node 4016 * to be cleaned up, which ends up calling ath_tx_node_flush. 4017 */ 4018 void 4019 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an) 4020 { 4021 int tid; 4022 ath_bufhead bf_cq; 4023 struct ath_buf *bf; 4024 4025 TAILQ_INIT(&bf_cq); 4026 4027 ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p", 4028 &an->an_node); 4029 4030 ATH_TX_LOCK(sc); 4031 DPRINTF(sc, ATH_DEBUG_NODE, 4032 "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, " 4033 "swq_depth=%d, clrdmask=%d, leak_count=%d\n", 4034 __func__, 4035 an->an_node.ni_macaddr, 4036 ":", 4037 an->an_is_powersave, 4038 an->an_stack_psq, 4039 an->an_tim_set, 4040 an->an_swq_depth, 4041 an->clrdmask, 4042 an->an_leak_count); 4043 4044 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 4045 struct ath_tid *atid = &an->an_tid[tid]; 4046 4047 /* Free packets */ 4048 ath_tx_tid_drain(sc, an, atid, &bf_cq); 4049 4050 /* Remove this tid from the list of active tids */ 4051 ath_tx_tid_unsched(sc, atid); 4052 4053 /* Reset the per-TID pause, BAR, etc state */ 4054 ath_tx_tid_reset(sc, atid); 4055 } 4056 4057 /* 4058 * Clear global leak count 4059 */ 4060 an->an_leak_count = 0; 4061 ATH_TX_UNLOCK(sc); 4062 4063 /* Handle completed frames */ 4064 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4065 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4066 ath_tx_default_comp(sc, bf, 0); 4067 } 4068 } 4069 4070 /* 4071 * Drain all the software TXQs currently with traffic queued. 4072 */ 4073 void 4074 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq) 4075 { 4076 struct ath_tid *tid; 4077 ath_bufhead bf_cq; 4078 struct ath_buf *bf; 4079 4080 TAILQ_INIT(&bf_cq); 4081 ATH_TX_LOCK(sc); 4082 4083 /* 4084 * Iterate over all active tids for the given txq, 4085 * flushing and unsched'ing them 4086 */ 4087 while (! TAILQ_EMPTY(&txq->axq_tidq)) { 4088 tid = TAILQ_FIRST(&txq->axq_tidq); 4089 ath_tx_tid_drain(sc, tid->an, tid, &bf_cq); 4090 ath_tx_tid_unsched(sc, tid); 4091 } 4092 4093 ATH_TX_UNLOCK(sc); 4094 4095 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4096 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4097 ath_tx_default_comp(sc, bf, 0); 4098 } 4099 } 4100 4101 /* 4102 * Handle completion of non-aggregate session frames. 4103 * 4104 * This (currently) doesn't implement software retransmission of 4105 * non-aggregate frames! 4106 * 4107 * Software retransmission of non-aggregate frames needs to obey 4108 * the strict sequence number ordering, and drop any frames that 4109 * will fail this. 4110 * 4111 * For now, filtered frames and frame transmission will cause 4112 * all kinds of issues. So we don't support them. 4113 * 4114 * So anyone queuing frames via ath_tx_normal_xmit() or 4115 * ath_tx_hw_queue_norm() must override and set CLRDMASK. 4116 */ 4117 void 4118 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 4119 { 4120 struct ieee80211_node *ni = bf->bf_node; 4121 struct ath_node *an = ATH_NODE(ni); 4122 int tid = bf->bf_state.bfs_tid; 4123 struct ath_tid *atid = &an->an_tid[tid]; 4124 struct ath_tx_status *ts = &bf->bf_status.ds_txstat; 4125 4126 /* The TID state is protected behind the TXQ lock */ 4127 ATH_TX_LOCK(sc); 4128 4129 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n", 4130 __func__, bf, fail, atid->hwq_depth - 1); 4131 4132 atid->hwq_depth--; 4133 4134 #if 0 4135 /* 4136 * If the frame was filtered, stick it on the filter frame 4137 * queue and complain about it. It shouldn't happen! 4138 */ 4139 if ((ts->ts_status & HAL_TXERR_FILT) || 4140 (ts->ts_status != 0 && atid->isfiltered)) { 4141 DPRINTF(sc, ATH_DEBUG_SW_TX, 4142 "%s: isfiltered=%d, ts_status=%d: huh?\n", 4143 __func__, 4144 atid->isfiltered, 4145 ts->ts_status); 4146 ath_tx_tid_filt_comp_buf(sc, atid, bf); 4147 } 4148 #endif 4149 if (atid->isfiltered) 4150 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__); 4151 if (atid->hwq_depth < 0) 4152 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 4153 __func__, atid->hwq_depth); 4154 4155 /* If the TID is being cleaned up, track things */ 4156 /* XXX refactor! */ 4157 if (atid->cleanup_inprogress) { 4158 atid->incomp--; 4159 if (atid->incomp == 0) { 4160 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4161 "%s: TID %d: cleaned up! resume!\n", 4162 __func__, tid); 4163 atid->cleanup_inprogress = 0; 4164 ath_tx_tid_resume(sc, atid); 4165 } 4166 } 4167 4168 /* 4169 * If the queue is filtered, potentially mark it as complete 4170 * and reschedule it as needed. 4171 * 4172 * This is required as there may be a subsequent TX descriptor 4173 * for this end-node that has CLRDMASK set, so it's quite possible 4174 * that a filtered frame will be followed by a non-filtered 4175 * (complete or otherwise) frame. 4176 * 4177 * XXX should we do this before we complete the frame? 4178 */ 4179 if (atid->isfiltered) 4180 ath_tx_tid_filt_comp_complete(sc, atid); 4181 ATH_TX_UNLOCK(sc); 4182 4183 /* 4184 * punt to rate control if we're not being cleaned up 4185 * during a hw queue drain and the frame wanted an ACK. 4186 */ 4187 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4188 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4189 ts, bf->bf_state.bfs_pktlen, 4190 1, (ts->ts_status == 0) ? 0 : 1); 4191 4192 ath_tx_default_comp(sc, bf, fail); 4193 } 4194 4195 /* 4196 * Handle cleanup of aggregate session packets that aren't 4197 * an A-MPDU. 4198 * 4199 * There's no need to update the BAW here - the session is being 4200 * torn down. 4201 */ 4202 static void 4203 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4204 { 4205 struct ieee80211_node *ni = bf->bf_node; 4206 struct ath_node *an = ATH_NODE(ni); 4207 int tid = bf->bf_state.bfs_tid; 4208 struct ath_tid *atid = &an->an_tid[tid]; 4209 4210 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n", 4211 __func__, tid, atid->incomp); 4212 4213 ATH_TX_LOCK(sc); 4214 atid->incomp--; 4215 4216 /* XXX refactor! */ 4217 if (bf->bf_state.bfs_dobaw) { 4218 ath_tx_update_baw(sc, an, atid, bf); 4219 if (!bf->bf_state.bfs_addedbaw) 4220 DPRINTF(sc, ATH_DEBUG_SW_TX, 4221 "%s: wasn't added: seqno %d\n", 4222 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4223 } 4224 4225 if (atid->incomp == 0) { 4226 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4227 "%s: TID %d: cleaned up! resume!\n", 4228 __func__, tid); 4229 atid->cleanup_inprogress = 0; 4230 ath_tx_tid_resume(sc, atid); 4231 } 4232 ATH_TX_UNLOCK(sc); 4233 4234 ath_tx_default_comp(sc, bf, 0); 4235 } 4236 4237 4238 /* 4239 * This as it currently stands is a bit dumb. Ideally we'd just 4240 * fail the frame the normal way and have it permanently fail 4241 * via the normal aggregate completion path. 4242 */ 4243 static void 4244 ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an, 4245 int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq) 4246 { 4247 struct ath_tid *atid = &an->an_tid[tid]; 4248 struct ath_buf *bf, *bf_next; 4249 4250 ATH_TX_LOCK_ASSERT(sc); 4251 4252 /* 4253 * Remove this frame from the queue. 4254 */ 4255 ATH_TID_REMOVE(atid, bf_head, bf_list); 4256 4257 /* 4258 * Loop over all the frames in the aggregate. 4259 */ 4260 bf = bf_head; 4261 while (bf != NULL) { 4262 bf_next = bf->bf_next; /* next aggregate frame, or NULL */ 4263 4264 /* 4265 * If it's been added to the BAW we need to kick 4266 * it out of the BAW before we continue. 4267 * 4268 * XXX if it's an aggregate, assert that it's in the 4269 * BAW - we shouldn't have it be in an aggregate 4270 * otherwise! 4271 */ 4272 if (bf->bf_state.bfs_addedbaw) { 4273 ath_tx_update_baw(sc, an, atid, bf); 4274 bf->bf_state.bfs_dobaw = 0; 4275 } 4276 4277 /* 4278 * Give it the default completion handler. 4279 */ 4280 bf->bf_comp = ath_tx_normal_comp; 4281 bf->bf_next = NULL; 4282 4283 /* 4284 * Add it to the list to free. 4285 */ 4286 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 4287 4288 /* 4289 * Now advance to the next frame in the aggregate. 4290 */ 4291 bf = bf_next; 4292 } 4293 } 4294 4295 /* 4296 * Performs transmit side cleanup when TID changes from aggregated to 4297 * unaggregated and during reassociation. 4298 * 4299 * For now, this just tosses everything from the TID software queue 4300 * whether or not it has been retried and marks the TID as 4301 * pending completion if there's anything for this TID queued to 4302 * the hardware. 4303 * 4304 * The caller is responsible for pausing the TID and unpausing the 4305 * TID if no cleanup was required. Otherwise the cleanup path will 4306 * unpause the TID once the last hardware queued frame is completed. 4307 */ 4308 static void 4309 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid, 4310 ath_bufhead *bf_cq) 4311 { 4312 struct ath_tid *atid = &an->an_tid[tid]; 4313 struct ath_buf *bf, *bf_next; 4314 4315 ATH_TX_LOCK_ASSERT(sc); 4316 4317 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4318 "%s: TID %d: called; inprogress=%d\n", __func__, tid, 4319 atid->cleanup_inprogress); 4320 4321 /* 4322 * Move the filtered frames to the TX queue, before 4323 * we run off and discard/process things. 4324 */ 4325 4326 /* XXX this is really quite inefficient */ 4327 while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) { 4328 ATH_TID_FILT_REMOVE(atid, bf, bf_list); 4329 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4330 } 4331 4332 /* 4333 * Update the frames in the software TX queue: 4334 * 4335 * + Discard retry frames in the queue 4336 * + Fix the completion function to be non-aggregate 4337 */ 4338 bf = ATH_TID_FIRST(atid); 4339 while (bf) { 4340 /* 4341 * Grab the next frame in the list, we may 4342 * be fiddling with the list. 4343 */ 4344 bf_next = TAILQ_NEXT(bf, bf_list); 4345 4346 /* 4347 * Free the frame and all subframes. 4348 */ 4349 ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq); 4350 4351 /* 4352 * Next frame! 4353 */ 4354 bf = bf_next; 4355 } 4356 4357 /* 4358 * If there's anything in the hardware queue we wait 4359 * for the TID HWQ to empty. 4360 */ 4361 if (atid->hwq_depth > 0) { 4362 /* 4363 * XXX how about we kill atid->incomp, and instead 4364 * replace it with a macro that checks that atid->hwq_depth 4365 * is 0? 4366 */ 4367 atid->incomp = atid->hwq_depth; 4368 atid->cleanup_inprogress = 1; 4369 } 4370 4371 if (atid->cleanup_inprogress) 4372 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4373 "%s: TID %d: cleanup needed: %d packets\n", 4374 __func__, tid, atid->incomp); 4375 4376 /* Owner now must free completed frames */ 4377 } 4378 4379 static struct ath_buf * 4380 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 4381 struct ath_tid *tid, struct ath_buf *bf) 4382 { 4383 struct ath_buf *nbf; 4384 int error; 4385 4386 /* 4387 * Clone the buffer. This will handle the dma unmap and 4388 * copy the node reference to the new buffer. If this 4389 * works out, 'bf' will have no DMA mapping, no mbuf 4390 * pointer and no node reference. 4391 */ 4392 nbf = ath_buf_clone(sc, bf); 4393 4394 #if 0 4395 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n", 4396 __func__); 4397 #endif 4398 4399 if (nbf == NULL) { 4400 /* Failed to clone */ 4401 DPRINTF(sc, ATH_DEBUG_XMIT, 4402 "%s: failed to clone a busy buffer\n", 4403 __func__); 4404 return NULL; 4405 } 4406 4407 /* Setup the dma for the new buffer */ 4408 error = ath_tx_dmasetup(sc, nbf, nbf->bf_m); 4409 if (error != 0) { 4410 DPRINTF(sc, ATH_DEBUG_XMIT, 4411 "%s: failed to setup dma for clone\n", 4412 __func__); 4413 /* 4414 * Put this at the head of the list, not tail; 4415 * that way it doesn't interfere with the 4416 * busy buffer logic (which uses the tail of 4417 * the list.) 4418 */ 4419 ATH_TXBUF_LOCK(sc); 4420 ath_returnbuf_head(sc, nbf); 4421 ATH_TXBUF_UNLOCK(sc); 4422 return NULL; 4423 } 4424 4425 /* Update BAW if required, before we free the original buf */ 4426 if (bf->bf_state.bfs_dobaw) 4427 ath_tx_switch_baw_buf(sc, an, tid, bf, nbf); 4428 4429 /* Free original buffer; return new buffer */ 4430 ath_freebuf(sc, bf); 4431 4432 return nbf; 4433 } 4434 4435 /* 4436 * Handle retrying an unaggregate frame in an aggregate 4437 * session. 4438 * 4439 * If too many retries occur, pause the TID, wait for 4440 * any further retransmits (as there's no reason why 4441 * non-aggregate frames in an aggregate session are 4442 * transmitted in-order; they just have to be in-BAW) 4443 * and then queue a BAR. 4444 */ 4445 static void 4446 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4447 { 4448 struct ieee80211_node *ni = bf->bf_node; 4449 struct ath_node *an = ATH_NODE(ni); 4450 int tid = bf->bf_state.bfs_tid; 4451 struct ath_tid *atid = &an->an_tid[tid]; 4452 struct ieee80211_tx_ampdu *tap; 4453 4454 ATH_TX_LOCK(sc); 4455 4456 tap = ath_tx_get_tx_tid(an, tid); 4457 4458 /* 4459 * If the buffer is marked as busy, we can't directly 4460 * reuse it. Instead, try to clone the buffer. 4461 * If the clone is successful, recycle the old buffer. 4462 * If the clone is unsuccessful, set bfs_retries to max 4463 * to force the next bit of code to free the buffer 4464 * for us. 4465 */ 4466 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4467 (bf->bf_flags & ATH_BUF_BUSY)) { 4468 struct ath_buf *nbf; 4469 nbf = ath_tx_retry_clone(sc, an, atid, bf); 4470 if (nbf) 4471 /* bf has been freed at this point */ 4472 bf = nbf; 4473 else 4474 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4475 } 4476 4477 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4478 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4479 "%s: exceeded retries; seqno %d\n", 4480 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4481 sc->sc_stats.ast_tx_swretrymax++; 4482 4483 /* Update BAW anyway */ 4484 if (bf->bf_state.bfs_dobaw) { 4485 ath_tx_update_baw(sc, an, atid, bf); 4486 if (! bf->bf_state.bfs_addedbaw) 4487 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4488 "%s: wasn't added: seqno %d\n", 4489 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4490 } 4491 bf->bf_state.bfs_dobaw = 0; 4492 4493 /* Suspend the TX queue and get ready to send the BAR */ 4494 ath_tx_tid_bar_suspend(sc, atid); 4495 4496 /* Send the BAR if there are no other frames waiting */ 4497 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4498 ath_tx_tid_bar_tx(sc, atid); 4499 4500 ATH_TX_UNLOCK(sc); 4501 4502 /* Free buffer, bf is free after this call */ 4503 ath_tx_default_comp(sc, bf, 0); 4504 return; 4505 } 4506 4507 /* 4508 * This increments the retry counter as well as 4509 * sets the retry flag in the ath_buf and packet 4510 * body. 4511 */ 4512 ath_tx_set_retry(sc, bf); 4513 sc->sc_stats.ast_tx_swretries++; 4514 4515 /* 4516 * Insert this at the head of the queue, so it's 4517 * retried before any current/subsequent frames. 4518 */ 4519 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4520 ath_tx_tid_sched(sc, atid); 4521 /* Send the BAR if there are no other frames waiting */ 4522 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4523 ath_tx_tid_bar_tx(sc, atid); 4524 4525 ATH_TX_UNLOCK(sc); 4526 } 4527 4528 /* 4529 * Common code for aggregate excessive retry/subframe retry. 4530 * If retrying, queues buffers to bf_q. If not, frees the 4531 * buffers. 4532 * 4533 * XXX should unify this with ath_tx_aggr_retry_unaggr() 4534 */ 4535 static int 4536 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf, 4537 ath_bufhead *bf_q) 4538 { 4539 struct ieee80211_node *ni = bf->bf_node; 4540 struct ath_node *an = ATH_NODE(ni); 4541 int tid = bf->bf_state.bfs_tid; 4542 struct ath_tid *atid = &an->an_tid[tid]; 4543 4544 ATH_TX_LOCK_ASSERT(sc); 4545 4546 /* XXX clr11naggr should be done for all subframes */ 4547 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 4548 ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0); 4549 4550 /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */ 4551 4552 /* 4553 * If the buffer is marked as busy, we can't directly 4554 * reuse it. Instead, try to clone the buffer. 4555 * If the clone is successful, recycle the old buffer. 4556 * If the clone is unsuccessful, set bfs_retries to max 4557 * to force the next bit of code to free the buffer 4558 * for us. 4559 */ 4560 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4561 (bf->bf_flags & ATH_BUF_BUSY)) { 4562 struct ath_buf *nbf; 4563 nbf = ath_tx_retry_clone(sc, an, atid, bf); 4564 if (nbf) 4565 /* bf has been freed at this point */ 4566 bf = nbf; 4567 else 4568 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4569 } 4570 4571 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4572 sc->sc_stats.ast_tx_swretrymax++; 4573 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4574 "%s: max retries: seqno %d\n", 4575 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4576 ath_tx_update_baw(sc, an, atid, bf); 4577 if (!bf->bf_state.bfs_addedbaw) 4578 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4579 "%s: wasn't added: seqno %d\n", 4580 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4581 bf->bf_state.bfs_dobaw = 0; 4582 return 1; 4583 } 4584 4585 ath_tx_set_retry(sc, bf); 4586 sc->sc_stats.ast_tx_swretries++; 4587 bf->bf_next = NULL; /* Just to make sure */ 4588 4589 /* Clear the aggregate state */ 4590 bf->bf_state.bfs_aggr = 0; 4591 bf->bf_state.bfs_ndelim = 0; /* ??? needed? */ 4592 bf->bf_state.bfs_nframes = 1; 4593 4594 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 4595 return 0; 4596 } 4597 4598 /* 4599 * error pkt completion for an aggregate destination 4600 */ 4601 static void 4602 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first, 4603 struct ath_tid *tid) 4604 { 4605 struct ieee80211_node *ni = bf_first->bf_node; 4606 struct ath_node *an = ATH_NODE(ni); 4607 struct ath_buf *bf_next, *bf; 4608 ath_bufhead bf_q; 4609 int drops = 0; 4610 struct ieee80211_tx_ampdu *tap; 4611 ath_bufhead bf_cq; 4612 4613 TAILQ_INIT(&bf_q); 4614 TAILQ_INIT(&bf_cq); 4615 4616 /* 4617 * Update rate control - all frames have failed. 4618 * 4619 * XXX use the length in the first frame in the series; 4620 * XXX just so things are consistent for now. 4621 */ 4622 ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc, 4623 &bf_first->bf_status.ds_txstat, 4624 bf_first->bf_state.bfs_pktlen, 4625 bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes); 4626 4627 ATH_TX_LOCK(sc); 4628 tap = ath_tx_get_tx_tid(an, tid->tid); 4629 sc->sc_stats.ast_tx_aggr_failall++; 4630 4631 /* Retry all subframes */ 4632 bf = bf_first; 4633 while (bf) { 4634 bf_next = bf->bf_next; 4635 bf->bf_next = NULL; /* Remove it from the aggr list */ 4636 sc->sc_stats.ast_tx_aggr_fail++; 4637 if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4638 drops++; 4639 bf->bf_next = NULL; 4640 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4641 } 4642 bf = bf_next; 4643 } 4644 4645 /* Prepend all frames to the beginning of the queue */ 4646 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4647 TAILQ_REMOVE(&bf_q, bf, bf_list); 4648 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 4649 } 4650 4651 /* 4652 * Schedule the TID to be re-tried. 4653 */ 4654 ath_tx_tid_sched(sc, tid); 4655 4656 /* 4657 * send bar if we dropped any frames 4658 * 4659 * Keep the txq lock held for now, as we need to ensure 4660 * that ni_txseqs[] is consistent (as it's being updated 4661 * in the ifnet TX context or raw TX context.) 4662 */ 4663 if (drops) { 4664 /* Suspend the TX queue and get ready to send the BAR */ 4665 ath_tx_tid_bar_suspend(sc, tid); 4666 } 4667 4668 /* 4669 * Send BAR if required 4670 */ 4671 if (ath_tx_tid_bar_tx_ready(sc, tid)) 4672 ath_tx_tid_bar_tx(sc, tid); 4673 4674 ATH_TX_UNLOCK(sc); 4675 4676 /* Complete frames which errored out */ 4677 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4678 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4679 ath_tx_default_comp(sc, bf, 0); 4680 } 4681 } 4682 4683 /* 4684 * Handle clean-up of packets from an aggregate list. 4685 * 4686 * There's no need to update the BAW here - the session is being 4687 * torn down. 4688 */ 4689 static void 4690 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first) 4691 { 4692 struct ath_buf *bf, *bf_next; 4693 struct ieee80211_node *ni = bf_first->bf_node; 4694 struct ath_node *an = ATH_NODE(ni); 4695 int tid = bf_first->bf_state.bfs_tid; 4696 struct ath_tid *atid = &an->an_tid[tid]; 4697 4698 ATH_TX_LOCK(sc); 4699 4700 /* update incomp */ 4701 atid->incomp--; 4702 4703 /* Update the BAW */ 4704 bf = bf_first; 4705 while (bf) { 4706 /* XXX refactor! */ 4707 if (bf->bf_state.bfs_dobaw) { 4708 ath_tx_update_baw(sc, an, atid, bf); 4709 if (!bf->bf_state.bfs_addedbaw) 4710 DPRINTF(sc, ATH_DEBUG_SW_TX, 4711 "%s: wasn't added: seqno %d\n", 4712 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4713 } 4714 bf = bf->bf_next; 4715 } 4716 4717 if (atid->incomp == 0) { 4718 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4719 "%s: TID %d: cleaned up! resume!\n", 4720 __func__, tid); 4721 atid->cleanup_inprogress = 0; 4722 ath_tx_tid_resume(sc, atid); 4723 } 4724 4725 /* Send BAR if required */ 4726 /* XXX why would we send a BAR when transitioning to non-aggregation? */ 4727 /* 4728 * XXX TODO: we should likely just tear down the BAR state here, 4729 * rather than sending a BAR. 4730 */ 4731 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4732 ath_tx_tid_bar_tx(sc, atid); 4733 4734 ATH_TX_UNLOCK(sc); 4735 4736 /* Handle frame completion as individual frames */ 4737 bf = bf_first; 4738 while (bf) { 4739 bf_next = bf->bf_next; 4740 bf->bf_next = NULL; 4741 ath_tx_default_comp(sc, bf, 1); 4742 bf = bf_next; 4743 } 4744 } 4745 4746 /* 4747 * Handle completion of an set of aggregate frames. 4748 * 4749 * Note: the completion handler is the last descriptor in the aggregate, 4750 * not the last descriptor in the first frame. 4751 */ 4752 static void 4753 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first, 4754 int fail) 4755 { 4756 //struct ath_desc *ds = bf->bf_lastds; 4757 struct ieee80211_node *ni = bf_first->bf_node; 4758 struct ath_node *an = ATH_NODE(ni); 4759 int tid = bf_first->bf_state.bfs_tid; 4760 struct ath_tid *atid = &an->an_tid[tid]; 4761 struct ath_tx_status ts; 4762 struct ieee80211_tx_ampdu *tap; 4763 ath_bufhead bf_q; 4764 ath_bufhead bf_cq; 4765 int seq_st, tx_ok; 4766 int hasba, isaggr; 4767 uint32_t ba[2]; 4768 struct ath_buf *bf, *bf_next; 4769 int ba_index; 4770 int drops = 0; 4771 int nframes = 0, nbad = 0, nf; 4772 int pktlen; 4773 /* XXX there's too much on the stack? */ 4774 struct ath_rc_series rc[ATH_RC_NUM]; 4775 int txseq; 4776 4777 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n", 4778 __func__, atid->hwq_depth); 4779 4780 /* 4781 * Take a copy; this may be needed -after- bf_first 4782 * has been completed and freed. 4783 */ 4784 ts = bf_first->bf_status.ds_txstat; 4785 4786 TAILQ_INIT(&bf_q); 4787 TAILQ_INIT(&bf_cq); 4788 4789 /* The TID state is kept behind the TXQ lock */ 4790 ATH_TX_LOCK(sc); 4791 4792 atid->hwq_depth--; 4793 if (atid->hwq_depth < 0) 4794 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n", 4795 __func__, atid->hwq_depth); 4796 4797 /* 4798 * If the TID is filtered, handle completing the filter 4799 * transition before potentially kicking it to the cleanup 4800 * function. 4801 * 4802 * XXX this is duplicate work, ew. 4803 */ 4804 if (atid->isfiltered) 4805 ath_tx_tid_filt_comp_complete(sc, atid); 4806 4807 /* 4808 * Punt cleanup to the relevant function, not our problem now 4809 */ 4810 if (atid->cleanup_inprogress) { 4811 if (atid->isfiltered) 4812 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4813 "%s: isfiltered=1, normal_comp?\n", 4814 __func__); 4815 ATH_TX_UNLOCK(sc); 4816 ath_tx_comp_cleanup_aggr(sc, bf_first); 4817 return; 4818 } 4819 4820 /* 4821 * If the frame is filtered, transition to filtered frame 4822 * mode and add this to the filtered frame list. 4823 * 4824 * XXX TODO: figure out how this interoperates with 4825 * BAR, pause and cleanup states. 4826 */ 4827 if ((ts.ts_status & HAL_TXERR_FILT) || 4828 (ts.ts_status != 0 && atid->isfiltered)) { 4829 if (fail != 0) 4830 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4831 "%s: isfiltered=1, fail=%d\n", __func__, fail); 4832 ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq); 4833 4834 /* Remove from BAW */ 4835 TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) { 4836 if (bf->bf_state.bfs_addedbaw) 4837 drops++; 4838 if (bf->bf_state.bfs_dobaw) { 4839 ath_tx_update_baw(sc, an, atid, bf); 4840 if (!bf->bf_state.bfs_addedbaw) 4841 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4842 "%s: wasn't added: seqno %d\n", 4843 __func__, 4844 SEQNO(bf->bf_state.bfs_seqno)); 4845 } 4846 bf->bf_state.bfs_dobaw = 0; 4847 } 4848 /* 4849 * If any intermediate frames in the BAW were dropped when 4850 * handling filtering things, send a BAR. 4851 */ 4852 if (drops) 4853 ath_tx_tid_bar_suspend(sc, atid); 4854 4855 /* 4856 * Finish up by sending a BAR if required and freeing 4857 * the frames outside of the TX lock. 4858 */ 4859 goto finish_send_bar; 4860 } 4861 4862 /* 4863 * XXX for now, use the first frame in the aggregate for 4864 * XXX rate control completion; it's at least consistent. 4865 */ 4866 pktlen = bf_first->bf_state.bfs_pktlen; 4867 4868 /* 4869 * Handle errors first! 4870 * 4871 * Here, handle _any_ error as a "exceeded retries" error. 4872 * Later on (when filtered frames are to be specially handled) 4873 * it'll have to be expanded. 4874 */ 4875 #if 0 4876 if (ts.ts_status & HAL_TXERR_XRETRY) { 4877 #endif 4878 if (ts.ts_status != 0) { 4879 ATH_TX_UNLOCK(sc); 4880 ath_tx_comp_aggr_error(sc, bf_first, atid); 4881 return; 4882 } 4883 4884 tap = ath_tx_get_tx_tid(an, tid); 4885 4886 /* 4887 * extract starting sequence and block-ack bitmap 4888 */ 4889 /* XXX endian-ness of seq_st, ba? */ 4890 seq_st = ts.ts_seqnum; 4891 hasba = !! (ts.ts_flags & HAL_TX_BA); 4892 tx_ok = (ts.ts_status == 0); 4893 isaggr = bf_first->bf_state.bfs_aggr; 4894 ba[0] = ts.ts_ba_low; 4895 ba[1] = ts.ts_ba_high; 4896 4897 /* 4898 * Copy the TX completion status and the rate control 4899 * series from the first descriptor, as it may be freed 4900 * before the rate control code can get its grubby fingers 4901 * into things. 4902 */ 4903 memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc)); 4904 4905 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4906 "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, " 4907 "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n", 4908 __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags, 4909 isaggr, seq_st, hasba, ba[0], ba[1]); 4910 4911 /* 4912 * The reference driver doesn't do this; it simply ignores 4913 * this check in its entirety. 4914 * 4915 * I've seen this occur when using iperf to send traffic 4916 * out tid 1 - the aggregate frames are all marked as TID 1, 4917 * but the TXSTATUS has TID=0. So, let's just ignore this 4918 * check. 4919 */ 4920 #if 0 4921 /* Occasionally, the MAC sends a tx status for the wrong TID. */ 4922 if (tid != ts.ts_tid) { 4923 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n", 4924 __func__, tid, ts.ts_tid); 4925 tx_ok = 0; 4926 } 4927 #endif 4928 4929 /* AR5416 BA bug; this requires an interface reset */ 4930 if (isaggr && tx_ok && (! hasba)) { 4931 device_printf(sc->sc_dev, 4932 "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, " 4933 "seq_st=%d\n", 4934 __func__, hasba, tx_ok, isaggr, seq_st); 4935 /* XXX TODO: schedule an interface reset */ 4936 #ifdef ATH_DEBUG 4937 ath_printtxbuf(sc, bf_first, 4938 sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0); 4939 #endif 4940 } 4941 4942 /* 4943 * Walk the list of frames, figure out which ones were correctly 4944 * sent and which weren't. 4945 */ 4946 bf = bf_first; 4947 nf = bf_first->bf_state.bfs_nframes; 4948 4949 /* bf_first is going to be invalid once this list is walked */ 4950 bf_first = NULL; 4951 4952 /* 4953 * Walk the list of completed frames and determine 4954 * which need to be completed and which need to be 4955 * retransmitted. 4956 * 4957 * For completed frames, the completion functions need 4958 * to be called at the end of this function as the last 4959 * node reference may free the node. 4960 * 4961 * Finally, since the TXQ lock can't be held during the 4962 * completion callback (to avoid lock recursion), 4963 * the completion calls have to be done outside of the 4964 * lock. 4965 */ 4966 while (bf) { 4967 nframes++; 4968 ba_index = ATH_BA_INDEX(seq_st, 4969 SEQNO(bf->bf_state.bfs_seqno)); 4970 bf_next = bf->bf_next; 4971 bf->bf_next = NULL; /* Remove it from the aggr list */ 4972 4973 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4974 "%s: checking bf=%p seqno=%d; ack=%d\n", 4975 __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 4976 ATH_BA_ISSET(ba, ba_index)); 4977 4978 if (tx_ok && ATH_BA_ISSET(ba, ba_index)) { 4979 sc->sc_stats.ast_tx_aggr_ok++; 4980 ath_tx_update_baw(sc, an, atid, bf); 4981 bf->bf_state.bfs_dobaw = 0; 4982 if (!bf->bf_state.bfs_addedbaw) 4983 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4984 "%s: wasn't added: seqno %d\n", 4985 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4986 bf->bf_next = NULL; 4987 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4988 } else { 4989 sc->sc_stats.ast_tx_aggr_fail++; 4990 if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4991 drops++; 4992 bf->bf_next = NULL; 4993 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4994 } 4995 nbad++; 4996 } 4997 bf = bf_next; 4998 } 4999 5000 /* 5001 * Now that the BAW updates have been done, unlock 5002 * 5003 * txseq is grabbed before the lock is released so we 5004 * have a consistent view of what -was- in the BAW. 5005 * Anything after this point will not yet have been 5006 * TXed. 5007 */ 5008 txseq = tap->txa_start; 5009 ATH_TX_UNLOCK(sc); 5010 5011 if (nframes != nf) 5012 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5013 "%s: num frames seen=%d; bf nframes=%d\n", 5014 __func__, nframes, nf); 5015 5016 /* 5017 * Now we know how many frames were bad, call the rate 5018 * control code. 5019 */ 5020 if (fail == 0) 5021 ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes, 5022 nbad); 5023 5024 /* 5025 * send bar if we dropped any frames 5026 */ 5027 if (drops) { 5028 /* Suspend the TX queue and get ready to send the BAR */ 5029 ATH_TX_LOCK(sc); 5030 ath_tx_tid_bar_suspend(sc, atid); 5031 ATH_TX_UNLOCK(sc); 5032 } 5033 5034 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5035 "%s: txa_start now %d\n", __func__, tap->txa_start); 5036 5037 ATH_TX_LOCK(sc); 5038 5039 /* Prepend all frames to the beginning of the queue */ 5040 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 5041 TAILQ_REMOVE(&bf_q, bf, bf_list); 5042 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 5043 } 5044 5045 /* 5046 * Reschedule to grab some further frames. 5047 */ 5048 ath_tx_tid_sched(sc, atid); 5049 5050 /* 5051 * If the queue is filtered, re-schedule as required. 5052 * 5053 * This is required as there may be a subsequent TX descriptor 5054 * for this end-node that has CLRDMASK set, so it's quite possible 5055 * that a filtered frame will be followed by a non-filtered 5056 * (complete or otherwise) frame. 5057 * 5058 * XXX should we do this before we complete the frame? 5059 */ 5060 if (atid->isfiltered) 5061 ath_tx_tid_filt_comp_complete(sc, atid); 5062 5063 finish_send_bar: 5064 5065 /* 5066 * Send BAR if required 5067 */ 5068 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5069 ath_tx_tid_bar_tx(sc, atid); 5070 5071 ATH_TX_UNLOCK(sc); 5072 5073 /* Do deferred completion */ 5074 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5075 TAILQ_REMOVE(&bf_cq, bf, bf_list); 5076 ath_tx_default_comp(sc, bf, 0); 5077 } 5078 } 5079 5080 /* 5081 * Handle completion of unaggregated frames in an ADDBA 5082 * session. 5083 * 5084 * Fail is set to 1 if the entry is being freed via a call to 5085 * ath_tx_draintxq(). 5086 */ 5087 static void 5088 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail) 5089 { 5090 struct ieee80211_node *ni = bf->bf_node; 5091 struct ath_node *an = ATH_NODE(ni); 5092 int tid = bf->bf_state.bfs_tid; 5093 struct ath_tid *atid = &an->an_tid[tid]; 5094 struct ath_tx_status ts; 5095 int drops = 0; 5096 5097 /* 5098 * Take a copy of this; filtering/cloning the frame may free the 5099 * bf pointer. 5100 */ 5101 ts = bf->bf_status.ds_txstat; 5102 5103 /* 5104 * Update rate control status here, before we possibly 5105 * punt to retry or cleanup. 5106 * 5107 * Do it outside of the TXQ lock. 5108 */ 5109 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 5110 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 5111 &bf->bf_status.ds_txstat, 5112 bf->bf_state.bfs_pktlen, 5113 1, (ts.ts_status == 0) ? 0 : 1); 5114 5115 /* 5116 * This is called early so atid->hwq_depth can be tracked. 5117 * This unfortunately means that it's released and regrabbed 5118 * during retry and cleanup. That's rather inefficient. 5119 */ 5120 ATH_TX_LOCK(sc); 5121 5122 if (tid == IEEE80211_NONQOS_TID) 5123 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__); 5124 5125 DPRINTF(sc, ATH_DEBUG_SW_TX, 5126 "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n", 5127 __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth, 5128 SEQNO(bf->bf_state.bfs_seqno)); 5129 5130 atid->hwq_depth--; 5131 if (atid->hwq_depth < 0) 5132 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 5133 __func__, atid->hwq_depth); 5134 5135 /* 5136 * If the TID is filtered, handle completing the filter 5137 * transition before potentially kicking it to the cleanup 5138 * function. 5139 */ 5140 if (atid->isfiltered) 5141 ath_tx_tid_filt_comp_complete(sc, atid); 5142 5143 /* 5144 * If a cleanup is in progress, punt to comp_cleanup; 5145 * rather than handling it here. It's thus their 5146 * responsibility to clean up, call the completion 5147 * function in net80211, etc. 5148 */ 5149 if (atid->cleanup_inprogress) { 5150 if (atid->isfiltered) 5151 DPRINTF(sc, ATH_DEBUG_SW_TX, 5152 "%s: isfiltered=1, normal_comp?\n", 5153 __func__); 5154 ATH_TX_UNLOCK(sc); 5155 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n", 5156 __func__); 5157 ath_tx_comp_cleanup_unaggr(sc, bf); 5158 return; 5159 } 5160 5161 /* 5162 * XXX TODO: how does cleanup, BAR and filtered frame handling 5163 * overlap? 5164 * 5165 * If the frame is filtered OR if it's any failure but 5166 * the TID is filtered, the frame must be added to the 5167 * filtered frame list. 5168 * 5169 * However - a busy buffer can't be added to the filtered 5170 * list as it will end up being recycled without having 5171 * been made available for the hardware. 5172 */ 5173 if ((ts.ts_status & HAL_TXERR_FILT) || 5174 (ts.ts_status != 0 && atid->isfiltered)) { 5175 int freeframe; 5176 5177 if (fail != 0) 5178 DPRINTF(sc, ATH_DEBUG_SW_TX, 5179 "%s: isfiltered=1, fail=%d\n", 5180 __func__, fail); 5181 freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf); 5182 /* 5183 * If freeframe=0 then bf is no longer ours; don't 5184 * touch it. 5185 */ 5186 if (freeframe) { 5187 /* Remove from BAW */ 5188 if (bf->bf_state.bfs_addedbaw) 5189 drops++; 5190 if (bf->bf_state.bfs_dobaw) { 5191 ath_tx_update_baw(sc, an, atid, bf); 5192 if (!bf->bf_state.bfs_addedbaw) 5193 DPRINTF(sc, ATH_DEBUG_SW_TX, 5194 "%s: wasn't added: seqno %d\n", 5195 __func__, SEQNO(bf->bf_state.bfs_seqno)); 5196 } 5197 bf->bf_state.bfs_dobaw = 0; 5198 } 5199 5200 /* 5201 * If the frame couldn't be filtered, treat it as a drop and 5202 * prepare to send a BAR. 5203 */ 5204 if (freeframe && drops) 5205 ath_tx_tid_bar_suspend(sc, atid); 5206 5207 /* 5208 * Send BAR if required 5209 */ 5210 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5211 ath_tx_tid_bar_tx(sc, atid); 5212 5213 ATH_TX_UNLOCK(sc); 5214 /* 5215 * If freeframe is set, then the frame couldn't be 5216 * cloned and bf is still valid. Just complete/free it. 5217 */ 5218 if (freeframe) 5219 ath_tx_default_comp(sc, bf, fail); 5220 5221 return; 5222 } 5223 /* 5224 * Don't bother with the retry check if all frames 5225 * are being failed (eg during queue deletion.) 5226 */ 5227 #if 0 5228 if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) { 5229 #endif 5230 if (fail == 0 && ts.ts_status != 0) { 5231 ATH_TX_UNLOCK(sc); 5232 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n", 5233 __func__); 5234 ath_tx_aggr_retry_unaggr(sc, bf); 5235 return; 5236 } 5237 5238 /* Success? Complete */ 5239 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n", 5240 __func__, tid, SEQNO(bf->bf_state.bfs_seqno)); 5241 if (bf->bf_state.bfs_dobaw) { 5242 ath_tx_update_baw(sc, an, atid, bf); 5243 bf->bf_state.bfs_dobaw = 0; 5244 if (!bf->bf_state.bfs_addedbaw) 5245 DPRINTF(sc, ATH_DEBUG_SW_TX, 5246 "%s: wasn't added: seqno %d\n", 5247 __func__, SEQNO(bf->bf_state.bfs_seqno)); 5248 } 5249 5250 /* 5251 * If the queue is filtered, re-schedule as required. 5252 * 5253 * This is required as there may be a subsequent TX descriptor 5254 * for this end-node that has CLRDMASK set, so it's quite possible 5255 * that a filtered frame will be followed by a non-filtered 5256 * (complete or otherwise) frame. 5257 * 5258 * XXX should we do this before we complete the frame? 5259 */ 5260 if (atid->isfiltered) 5261 ath_tx_tid_filt_comp_complete(sc, atid); 5262 5263 /* 5264 * Send BAR if required 5265 */ 5266 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5267 ath_tx_tid_bar_tx(sc, atid); 5268 5269 ATH_TX_UNLOCK(sc); 5270 5271 ath_tx_default_comp(sc, bf, fail); 5272 /* bf is freed at this point */ 5273 } 5274 5275 void 5276 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 5277 { 5278 if (bf->bf_state.bfs_aggr) 5279 ath_tx_aggr_comp_aggr(sc, bf, fail); 5280 else 5281 ath_tx_aggr_comp_unaggr(sc, bf, fail); 5282 } 5283 5284 /* 5285 * Schedule some packets from the given node/TID to the hardware. 5286 * 5287 * This is the aggregate version. 5288 */ 5289 void 5290 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an, 5291 struct ath_tid *tid) 5292 { 5293 struct ath_buf *bf; 5294 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5295 struct ieee80211_tx_ampdu *tap; 5296 ATH_AGGR_STATUS status; 5297 ath_bufhead bf_q; 5298 5299 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid); 5300 ATH_TX_LOCK_ASSERT(sc); 5301 5302 /* 5303 * XXX TODO: If we're called for a queue that we're leaking frames to, 5304 * ensure we only leak one. 5305 */ 5306 5307 tap = ath_tx_get_tx_tid(an, tid->tid); 5308 5309 if (tid->tid == IEEE80211_NONQOS_TID) 5310 DPRINTF(sc, ATH_DEBUG_SW_TX, 5311 "%s: called for TID=NONQOS_TID?\n", __func__); 5312 5313 for (;;) { 5314 status = ATH_AGGR_DONE; 5315 5316 /* 5317 * If the upper layer has paused the TID, don't 5318 * queue any further packets. 5319 * 5320 * This can also occur from the completion task because 5321 * of packet loss; but as its serialised with this code, 5322 * it won't "appear" half way through queuing packets. 5323 */ 5324 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5325 break; 5326 5327 bf = ATH_TID_FIRST(tid); 5328 if (bf == NULL) { 5329 break; 5330 } 5331 5332 /* 5333 * If the packet doesn't fall within the BAW (eg a NULL 5334 * data frame), schedule it directly; continue. 5335 */ 5336 if (! bf->bf_state.bfs_dobaw) { 5337 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5338 "%s: non-baw packet\n", 5339 __func__); 5340 ATH_TID_REMOVE(tid, bf, bf_list); 5341 5342 if (bf->bf_state.bfs_nframes > 1) 5343 DPRINTF(sc, ATH_DEBUG_SW_TX, 5344 "%s: aggr=%d, nframes=%d\n", 5345 __func__, 5346 bf->bf_state.bfs_aggr, 5347 bf->bf_state.bfs_nframes); 5348 5349 /* 5350 * This shouldn't happen - such frames shouldn't 5351 * ever have been queued as an aggregate in the 5352 * first place. However, make sure the fields 5353 * are correctly setup just to be totally sure. 5354 */ 5355 bf->bf_state.bfs_aggr = 0; 5356 bf->bf_state.bfs_nframes = 1; 5357 5358 /* Update CLRDMASK just before this frame is queued */ 5359 ath_tx_update_clrdmask(sc, tid, bf); 5360 5361 ath_tx_do_ratelookup(sc, bf); 5362 ath_tx_calc_duration(sc, bf); 5363 ath_tx_calc_protection(sc, bf); 5364 ath_tx_set_rtscts(sc, bf); 5365 ath_tx_rate_fill_rcflags(sc, bf); 5366 ath_tx_setds(sc, bf); 5367 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5368 5369 sc->sc_aggr_stats.aggr_nonbaw_pkt++; 5370 5371 /* Queue the packet; continue */ 5372 goto queuepkt; 5373 } 5374 5375 TAILQ_INIT(&bf_q); 5376 5377 /* 5378 * Do a rate control lookup on the first frame in the 5379 * list. The rate control code needs that to occur 5380 * before it can determine whether to TX. 5381 * It's inaccurate because the rate control code doesn't 5382 * really "do" aggregate lookups, so it only considers 5383 * the size of the first frame. 5384 */ 5385 ath_tx_do_ratelookup(sc, bf); 5386 bf->bf_state.bfs_rc[3].rix = 0; 5387 bf->bf_state.bfs_rc[3].tries = 0; 5388 5389 ath_tx_calc_duration(sc, bf); 5390 ath_tx_calc_protection(sc, bf); 5391 5392 ath_tx_set_rtscts(sc, bf); 5393 ath_tx_rate_fill_rcflags(sc, bf); 5394 5395 status = ath_tx_form_aggr(sc, an, tid, &bf_q); 5396 5397 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5398 "%s: ath_tx_form_aggr() status=%d\n", __func__, status); 5399 5400 /* 5401 * No frames to be picked up - out of BAW 5402 */ 5403 if (TAILQ_EMPTY(&bf_q)) 5404 break; 5405 5406 /* 5407 * This assumes that the descriptor list in the ath_bufhead 5408 * are already linked together via bf_next pointers. 5409 */ 5410 bf = TAILQ_FIRST(&bf_q); 5411 5412 if (status == ATH_AGGR_8K_LIMITED) 5413 sc->sc_aggr_stats.aggr_rts_aggr_limited++; 5414 5415 /* 5416 * If it's the only frame send as non-aggregate 5417 * assume that ath_tx_form_aggr() has checked 5418 * whether it's in the BAW and added it appropriately. 5419 */ 5420 if (bf->bf_state.bfs_nframes == 1) { 5421 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5422 "%s: single-frame aggregate\n", __func__); 5423 5424 /* Update CLRDMASK just before this frame is queued */ 5425 ath_tx_update_clrdmask(sc, tid, bf); 5426 5427 bf->bf_state.bfs_aggr = 0; 5428 bf->bf_state.bfs_ndelim = 0; 5429 ath_tx_setds(sc, bf); 5430 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5431 if (status == ATH_AGGR_BAW_CLOSED) 5432 sc->sc_aggr_stats.aggr_baw_closed_single_pkt++; 5433 else 5434 sc->sc_aggr_stats.aggr_single_pkt++; 5435 } else { 5436 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5437 "%s: multi-frame aggregate: %d frames, " 5438 "length %d\n", 5439 __func__, bf->bf_state.bfs_nframes, 5440 bf->bf_state.bfs_al); 5441 bf->bf_state.bfs_aggr = 1; 5442 sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++; 5443 sc->sc_aggr_stats.aggr_aggr_pkt++; 5444 5445 /* Update CLRDMASK just before this frame is queued */ 5446 ath_tx_update_clrdmask(sc, tid, bf); 5447 5448 /* 5449 * Calculate the duration/protection as required. 5450 */ 5451 ath_tx_calc_duration(sc, bf); 5452 ath_tx_calc_protection(sc, bf); 5453 5454 /* 5455 * Update the rate and rtscts information based on the 5456 * rate decision made by the rate control code; 5457 * the first frame in the aggregate needs it. 5458 */ 5459 ath_tx_set_rtscts(sc, bf); 5460 5461 /* 5462 * Setup the relevant descriptor fields 5463 * for aggregation. The first descriptor 5464 * already points to the rest in the chain. 5465 */ 5466 ath_tx_setds_11n(sc, bf); 5467 5468 } 5469 queuepkt: 5470 /* Set completion handler, multi-frame aggregate or not */ 5471 bf->bf_comp = ath_tx_aggr_comp; 5472 5473 if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 5474 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__); 5475 5476 /* 5477 * Update leak count and frame config if were leaking frames. 5478 * 5479 * XXX TODO: it should update all frames in an aggregate 5480 * correctly! 5481 */ 5482 ath_tx_leak_count_update(sc, tid, bf); 5483 5484 /* Punt to txq */ 5485 ath_tx_handoff(sc, txq, bf); 5486 5487 /* Track outstanding buffer count to hardware */ 5488 /* aggregates are "one" buffer */ 5489 tid->hwq_depth++; 5490 5491 /* 5492 * Break out if ath_tx_form_aggr() indicated 5493 * there can't be any further progress (eg BAW is full.) 5494 * Checking for an empty txq is done above. 5495 * 5496 * XXX locking on txq here? 5497 */ 5498 /* XXX TXQ locking */ 5499 if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr || 5500 (status == ATH_AGGR_BAW_CLOSED || 5501 status == ATH_AGGR_LEAK_CLOSED)) 5502 break; 5503 } 5504 } 5505 5506 /* 5507 * Schedule some packets from the given node/TID to the hardware. 5508 * 5509 * XXX TODO: this routine doesn't enforce the maximum TXQ depth. 5510 * It just dumps frames into the TXQ. We should limit how deep 5511 * the transmit queue can grow for frames dispatched to the given 5512 * TXQ. 5513 * 5514 * To avoid locking issues, either we need to own the TXQ lock 5515 * at this point, or we need to pass in the maximum frame count 5516 * from the caller. 5517 */ 5518 void 5519 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an, 5520 struct ath_tid *tid) 5521 { 5522 struct ath_buf *bf; 5523 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5524 5525 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n", 5526 __func__, an, tid->tid); 5527 5528 ATH_TX_LOCK_ASSERT(sc); 5529 5530 /* Check - is AMPDU pending or running? then print out something */ 5531 if (ath_tx_ampdu_pending(sc, an, tid->tid)) 5532 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n", 5533 __func__, tid->tid); 5534 if (ath_tx_ampdu_running(sc, an, tid->tid)) 5535 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n", 5536 __func__, tid->tid); 5537 5538 for (;;) { 5539 5540 /* 5541 * If the upper layers have paused the TID, don't 5542 * queue any further packets. 5543 * 5544 * XXX if we are leaking frames, make sure we decrement 5545 * that counter _and_ we continue here. 5546 */ 5547 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5548 break; 5549 5550 bf = ATH_TID_FIRST(tid); 5551 if (bf == NULL) { 5552 break; 5553 } 5554 5555 ATH_TID_REMOVE(tid, bf, bf_list); 5556 5557 /* Sanity check! */ 5558 if (tid->tid != bf->bf_state.bfs_tid) { 5559 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !=" 5560 " tid %d\n", __func__, bf->bf_state.bfs_tid, 5561 tid->tid); 5562 } 5563 /* Normal completion handler */ 5564 bf->bf_comp = ath_tx_normal_comp; 5565 5566 /* 5567 * Override this for now, until the non-aggregate 5568 * completion handler correctly handles software retransmits. 5569 */ 5570 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 5571 5572 /* Update CLRDMASK just before this frame is queued */ 5573 ath_tx_update_clrdmask(sc, tid, bf); 5574 5575 /* Program descriptors + rate control */ 5576 ath_tx_do_ratelookup(sc, bf); 5577 ath_tx_calc_duration(sc, bf); 5578 ath_tx_calc_protection(sc, bf); 5579 ath_tx_set_rtscts(sc, bf); 5580 ath_tx_rate_fill_rcflags(sc, bf); 5581 ath_tx_setds(sc, bf); 5582 5583 /* 5584 * Update the current leak count if 5585 * we're leaking frames; and set the 5586 * MORE flag as appropriate. 5587 */ 5588 ath_tx_leak_count_update(sc, tid, bf); 5589 5590 /* Track outstanding buffer count to hardware */ 5591 /* aggregates are "one" buffer */ 5592 tid->hwq_depth++; 5593 5594 /* Punt to hardware or software txq */ 5595 ath_tx_handoff(sc, txq, bf); 5596 } 5597 } 5598 5599 /* 5600 * Schedule some packets to the given hardware queue. 5601 * 5602 * This function walks the list of TIDs (ie, ath_node TIDs 5603 * with queued traffic) and attempts to schedule traffic 5604 * from them. 5605 * 5606 * TID scheduling is implemented as a FIFO, with TIDs being 5607 * added to the end of the queue after some frames have been 5608 * scheduled. 5609 */ 5610 void 5611 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq) 5612 { 5613 struct ath_tid *tid, *next, *last; 5614 5615 ATH_TX_LOCK_ASSERT(sc); 5616 5617 /* 5618 * Don't schedule if the hardware queue is busy. 5619 * This (hopefully) gives some more time to aggregate 5620 * some packets in the aggregation queue. 5621 * 5622 * XXX It doesn't stop a parallel sender from sneaking 5623 * in transmitting a frame! 5624 */ 5625 /* XXX TXQ locking */ 5626 if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 5627 sc->sc_aggr_stats.aggr_sched_nopkt++; 5628 return; 5629 } 5630 if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5631 sc->sc_aggr_stats.aggr_sched_nopkt++; 5632 return; 5633 } 5634 5635 last = TAILQ_LAST(&txq->axq_tidq, axq_t_s); 5636 5637 TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) { 5638 /* 5639 * Suspend paused queues here; they'll be resumed 5640 * once the addba completes or times out. 5641 */ 5642 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n", 5643 __func__, tid->tid, tid->paused); 5644 ath_tx_tid_unsched(sc, tid); 5645 /* 5646 * This node may be in power-save and we're leaking 5647 * a frame; be careful. 5648 */ 5649 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 5650 goto loop_done; 5651 } 5652 if (ath_tx_ampdu_running(sc, tid->an, tid->tid)) 5653 ath_tx_tid_hw_queue_aggr(sc, tid->an, tid); 5654 else 5655 ath_tx_tid_hw_queue_norm(sc, tid->an, tid); 5656 5657 /* Not empty? Re-schedule */ 5658 if (tid->axq_depth != 0) 5659 ath_tx_tid_sched(sc, tid); 5660 5661 /* 5662 * Give the software queue time to aggregate more 5663 * packets. If we aren't running aggregation then 5664 * we should still limit the hardware queue depth. 5665 */ 5666 /* XXX TXQ locking */ 5667 if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 5668 break; 5669 } 5670 if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5671 break; 5672 } 5673 loop_done: 5674 /* 5675 * If this was the last entry on the original list, stop. 5676 * Otherwise nodes that have been rescheduled onto the end 5677 * of the TID FIFO list will just keep being rescheduled. 5678 * 5679 * XXX What should we do about nodes that were paused 5680 * but are pending a leaking frame in response to a ps-poll? 5681 * They'll be put at the front of the list; so they'll 5682 * prematurely trigger this condition! Ew. 5683 */ 5684 if (tid == last) 5685 break; 5686 } 5687 } 5688 5689 /* 5690 * TX addba handling 5691 */ 5692 5693 /* 5694 * Return net80211 TID struct pointer, or NULL for none 5695 */ 5696 struct ieee80211_tx_ampdu * 5697 ath_tx_get_tx_tid(struct ath_node *an, int tid) 5698 { 5699 struct ieee80211_node *ni = &an->an_node; 5700 struct ieee80211_tx_ampdu *tap; 5701 5702 if (tid == IEEE80211_NONQOS_TID) 5703 return NULL; 5704 5705 tap = &ni->ni_tx_ampdu[tid]; 5706 return tap; 5707 } 5708 5709 /* 5710 * Is AMPDU-TX running? 5711 */ 5712 static int 5713 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid) 5714 { 5715 struct ieee80211_tx_ampdu *tap; 5716 5717 if (tid == IEEE80211_NONQOS_TID) 5718 return 0; 5719 5720 tap = ath_tx_get_tx_tid(an, tid); 5721 if (tap == NULL) 5722 return 0; /* Not valid; default to not running */ 5723 5724 return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING); 5725 } 5726 5727 /* 5728 * Is AMPDU-TX negotiation pending? 5729 */ 5730 static int 5731 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid) 5732 { 5733 struct ieee80211_tx_ampdu *tap; 5734 5735 if (tid == IEEE80211_NONQOS_TID) 5736 return 0; 5737 5738 tap = ath_tx_get_tx_tid(an, tid); 5739 if (tap == NULL) 5740 return 0; /* Not valid; default to not pending */ 5741 5742 return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND); 5743 } 5744 5745 /* 5746 * Is AMPDU-TX pending for the given TID? 5747 */ 5748 5749 5750 /* 5751 * Method to handle sending an ADDBA request. 5752 * 5753 * We tap this so the relevant flags can be set to pause the TID 5754 * whilst waiting for the response. 5755 * 5756 * XXX there's no timeout handler we can override? 5757 */ 5758 int 5759 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5760 int dialogtoken, int baparamset, int batimeout) 5761 { 5762 struct ath_softc *sc = ni->ni_ic->ic_softc; 5763 int tid = tap->txa_tid; 5764 struct ath_node *an = ATH_NODE(ni); 5765 struct ath_tid *atid = &an->an_tid[tid]; 5766 5767 /* 5768 * XXX danger Will Robinson! 5769 * 5770 * Although the taskqueue may be running and scheduling some more 5771 * packets, these should all be _before_ the addba sequence number. 5772 * However, net80211 will keep self-assigning sequence numbers 5773 * until addba has been negotiated. 5774 * 5775 * In the past, these packets would be "paused" (which still works 5776 * fine, as they're being scheduled to the driver in the same 5777 * serialised method which is calling the addba request routine) 5778 * and when the aggregation session begins, they'll be dequeued 5779 * as aggregate packets and added to the BAW. However, now there's 5780 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these 5781 * packets. Thus they never get included in the BAW tracking and 5782 * this can cause the initial burst of packets after the addba 5783 * negotiation to "hang", as they quickly fall outside the BAW. 5784 * 5785 * The "eventual" solution should be to tag these packets with 5786 * dobaw. Although net80211 has given us a sequence number, 5787 * it'll be "after" the left edge of the BAW and thus it'll 5788 * fall within it. 5789 */ 5790 ATH_TX_LOCK(sc); 5791 /* 5792 * This is a bit annoying. Until net80211 HT code inherits some 5793 * (any) locking, we may have this called in parallel BUT only 5794 * one response/timeout will be called. Grr. 5795 */ 5796 if (atid->addba_tx_pending == 0) { 5797 ath_tx_tid_pause(sc, atid); 5798 atid->addba_tx_pending = 1; 5799 } 5800 ATH_TX_UNLOCK(sc); 5801 5802 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5803 "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n", 5804 __func__, 5805 ni->ni_macaddr, 5806 ":", 5807 dialogtoken, baparamset, batimeout); 5808 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5809 "%s: txa_start=%d, ni_txseqs=%d\n", 5810 __func__, tap->txa_start, ni->ni_txseqs[tid]); 5811 5812 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 5813 batimeout); 5814 } 5815 5816 /* 5817 * Handle an ADDBA response. 5818 * 5819 * We unpause the queue so TX'ing can resume. 5820 * 5821 * Any packets TX'ed from this point should be "aggregate" (whether 5822 * aggregate or not) so the BAW is updated. 5823 * 5824 * Note! net80211 keeps self-assigning sequence numbers until 5825 * ampdu is negotiated. This means the initially-negotiated BAW left 5826 * edge won't match the ni->ni_txseq. 5827 * 5828 * So, being very dirty, the BAW left edge is "slid" here to match 5829 * ni->ni_txseq. 5830 * 5831 * What likely SHOULD happen is that all packets subsequent to the 5832 * addba request should be tagged as aggregate and queued as non-aggregate 5833 * frames; thus updating the BAW. For now though, I'll just slide the 5834 * window. 5835 */ 5836 int 5837 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5838 int status, int code, int batimeout) 5839 { 5840 struct ath_softc *sc = ni->ni_ic->ic_softc; 5841 int tid = tap->txa_tid; 5842 struct ath_node *an = ATH_NODE(ni); 5843 struct ath_tid *atid = &an->an_tid[tid]; 5844 int r; 5845 5846 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5847 "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__, 5848 ni->ni_macaddr, 5849 ":", 5850 status, code, batimeout); 5851 5852 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5853 "%s: txa_start=%d, ni_txseqs=%d\n", 5854 __func__, tap->txa_start, ni->ni_txseqs[tid]); 5855 5856 /* 5857 * Call this first, so the interface flags get updated 5858 * before the TID is unpaused. Otherwise a race condition 5859 * exists where the unpaused TID still doesn't yet have 5860 * IEEE80211_AGGR_RUNNING set. 5861 */ 5862 r = sc->sc_addba_response(ni, tap, status, code, batimeout); 5863 5864 ATH_TX_LOCK(sc); 5865 atid->addba_tx_pending = 0; 5866 /* 5867 * XXX dirty! 5868 * Slide the BAW left edge to wherever net80211 left it for us. 5869 * Read above for more information. 5870 */ 5871 tap->txa_start = ni->ni_txseqs[tid]; 5872 ath_tx_tid_resume(sc, atid); 5873 ATH_TX_UNLOCK(sc); 5874 return r; 5875 } 5876 5877 5878 /* 5879 * Stop ADDBA on a queue. 5880 * 5881 * This can be called whilst BAR TX is currently active on the queue, 5882 * so make sure this is unblocked before continuing. 5883 */ 5884 void 5885 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 5886 { 5887 struct ath_softc *sc = ni->ni_ic->ic_softc; 5888 int tid = tap->txa_tid; 5889 struct ath_node *an = ATH_NODE(ni); 5890 struct ath_tid *atid = &an->an_tid[tid]; 5891 ath_bufhead bf_cq; 5892 struct ath_buf *bf; 5893 5894 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n", 5895 __func__, 5896 ni->ni_macaddr, 5897 ":"); 5898 5899 /* 5900 * Pause TID traffic early, so there aren't any races 5901 * Unblock the pending BAR held traffic, if it's currently paused. 5902 */ 5903 ATH_TX_LOCK(sc); 5904 ath_tx_tid_pause(sc, atid); 5905 if (atid->bar_wait) { 5906 /* 5907 * bar_unsuspend() expects bar_tx == 1, as it should be 5908 * called from the TX completion path. This quietens 5909 * the warning. It's cleared for us anyway. 5910 */ 5911 atid->bar_tx = 1; 5912 ath_tx_tid_bar_unsuspend(sc, atid); 5913 } 5914 ATH_TX_UNLOCK(sc); 5915 5916 /* There's no need to hold the TXQ lock here */ 5917 sc->sc_addba_stop(ni, tap); 5918 5919 /* 5920 * ath_tx_tid_cleanup will resume the TID if possible, otherwise 5921 * it'll set the cleanup flag, and it'll be unpaused once 5922 * things have been cleaned up. 5923 */ 5924 TAILQ_INIT(&bf_cq); 5925 ATH_TX_LOCK(sc); 5926 5927 /* 5928 * In case there's a followup call to this, only call it 5929 * if we don't have a cleanup in progress. 5930 * 5931 * Since we've paused the queue above, we need to make 5932 * sure we unpause if there's already a cleanup in 5933 * progress - it means something else is also doing 5934 * this stuff, so we don't need to also keep it paused. 5935 */ 5936 if (atid->cleanup_inprogress) { 5937 ath_tx_tid_resume(sc, atid); 5938 } else { 5939 ath_tx_tid_cleanup(sc, an, tid, &bf_cq); 5940 /* 5941 * Unpause the TID if no cleanup is required. 5942 */ 5943 if (! atid->cleanup_inprogress) 5944 ath_tx_tid_resume(sc, atid); 5945 } 5946 ATH_TX_UNLOCK(sc); 5947 5948 /* Handle completing frames and fail them */ 5949 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5950 TAILQ_REMOVE(&bf_cq, bf, bf_list); 5951 ath_tx_default_comp(sc, bf, 1); 5952 } 5953 5954 } 5955 5956 /* 5957 * Handle a node reassociation. 5958 * 5959 * We may have a bunch of frames queued to the hardware; those need 5960 * to be marked as cleanup. 5961 */ 5962 void 5963 ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an) 5964 { 5965 struct ath_tid *tid; 5966 int i; 5967 ath_bufhead bf_cq; 5968 struct ath_buf *bf; 5969 5970 TAILQ_INIT(&bf_cq); 5971 5972 ATH_TX_UNLOCK_ASSERT(sc); 5973 5974 ATH_TX_LOCK(sc); 5975 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 5976 tid = &an->an_tid[i]; 5977 if (tid->hwq_depth == 0) 5978 continue; 5979 DPRINTF(sc, ATH_DEBUG_NODE, 5980 "%s: %6D: TID %d: cleaning up TID\n", 5981 __func__, 5982 an->an_node.ni_macaddr, 5983 ":", 5984 i); 5985 /* 5986 * In case there's a followup call to this, only call it 5987 * if we don't have a cleanup in progress. 5988 */ 5989 if (! tid->cleanup_inprogress) { 5990 ath_tx_tid_pause(sc, tid); 5991 ath_tx_tid_cleanup(sc, an, i, &bf_cq); 5992 /* 5993 * Unpause the TID if no cleanup is required. 5994 */ 5995 if (! tid->cleanup_inprogress) 5996 ath_tx_tid_resume(sc, tid); 5997 } 5998 } 5999 ATH_TX_UNLOCK(sc); 6000 6001 /* Handle completing frames and fail them */ 6002 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 6003 TAILQ_REMOVE(&bf_cq, bf, bf_list); 6004 ath_tx_default_comp(sc, bf, 1); 6005 } 6006 } 6007 6008 /* 6009 * Note: net80211 bar_timeout() doesn't call this function on BAR failure; 6010 * it simply tears down the aggregation session. Ew. 6011 * 6012 * It however will call ieee80211_ampdu_stop() which will call 6013 * ic->ic_addba_stop(). 6014 * 6015 * XXX This uses a hard-coded max BAR count value; the whole 6016 * XXX BAR TX success or failure should be better handled! 6017 */ 6018 void 6019 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 6020 int status) 6021 { 6022 struct ath_softc *sc = ni->ni_ic->ic_softc; 6023 int tid = tap->txa_tid; 6024 struct ath_node *an = ATH_NODE(ni); 6025 struct ath_tid *atid = &an->an_tid[tid]; 6026 int attempts = tap->txa_attempts; 6027 int old_txa_start; 6028 6029 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6030 "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n", 6031 __func__, 6032 ni->ni_macaddr, 6033 ":", 6034 tap->txa_tid, 6035 atid->tid, 6036 status, 6037 attempts, 6038 tap->txa_start, 6039 tap->txa_seqpending); 6040 6041 /* Note: This may update the BAW details */ 6042 /* 6043 * XXX What if this does slide the BAW along? We need to somehow 6044 * XXX either fix things when it does happen, or prevent the 6045 * XXX seqpending value to be anything other than exactly what 6046 * XXX the hell we want! 6047 * 6048 * XXX So for now, how I do this inside the TX lock for now 6049 * XXX and just correct it afterwards? The below condition should 6050 * XXX never happen and if it does I need to fix all kinds of things. 6051 */ 6052 ATH_TX_LOCK(sc); 6053 old_txa_start = tap->txa_start; 6054 sc->sc_bar_response(ni, tap, status); 6055 if (tap->txa_start != old_txa_start) { 6056 device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n", 6057 __func__, 6058 tid, 6059 tap->txa_start, 6060 old_txa_start); 6061 } 6062 tap->txa_start = old_txa_start; 6063 ATH_TX_UNLOCK(sc); 6064 6065 /* Unpause the TID */ 6066 /* 6067 * XXX if this is attempt=50, the TID will be downgraded 6068 * XXX to a non-aggregate session. So we must unpause the 6069 * XXX TID here or it'll never be done. 6070 * 6071 * Also, don't call it if bar_tx/bar_wait are 0; something 6072 * has beaten us to the punch? (XXX figure out what?) 6073 */ 6074 if (status == 0 || attempts == 50) { 6075 ATH_TX_LOCK(sc); 6076 if (atid->bar_tx == 0 || atid->bar_wait == 0) 6077 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6078 "%s: huh? bar_tx=%d, bar_wait=%d\n", 6079 __func__, 6080 atid->bar_tx, atid->bar_wait); 6081 else 6082 ath_tx_tid_bar_unsuspend(sc, atid); 6083 ATH_TX_UNLOCK(sc); 6084 } 6085 } 6086 6087 /* 6088 * This is called whenever the pending ADDBA request times out. 6089 * Unpause and reschedule the TID. 6090 */ 6091 void 6092 ath_addba_response_timeout(struct ieee80211_node *ni, 6093 struct ieee80211_tx_ampdu *tap) 6094 { 6095 struct ath_softc *sc = ni->ni_ic->ic_softc; 6096 int tid = tap->txa_tid; 6097 struct ath_node *an = ATH_NODE(ni); 6098 struct ath_tid *atid = &an->an_tid[tid]; 6099 6100 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 6101 "%s: %6D: TID=%d, called; resuming\n", 6102 __func__, 6103 ni->ni_macaddr, 6104 ":", 6105 tid); 6106 6107 ATH_TX_LOCK(sc); 6108 atid->addba_tx_pending = 0; 6109 ATH_TX_UNLOCK(sc); 6110 6111 /* Note: This updates the aggregate state to (again) pending */ 6112 sc->sc_addba_response_timeout(ni, tap); 6113 6114 /* Unpause the TID; which reschedules it */ 6115 ATH_TX_LOCK(sc); 6116 ath_tx_tid_resume(sc, atid); 6117 ATH_TX_UNLOCK(sc); 6118 } 6119 6120 /* 6121 * Check if a node is asleep or not. 6122 */ 6123 int 6124 ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an) 6125 { 6126 6127 ATH_TX_LOCK_ASSERT(sc); 6128 6129 return (an->an_is_powersave); 6130 } 6131 6132 /* 6133 * Mark a node as currently "in powersaving." 6134 * This suspends all traffic on the node. 6135 * 6136 * This must be called with the node/tx locks free. 6137 * 6138 * XXX TODO: the locking silliness below is due to how the node 6139 * locking currently works. Right now, the node lock is grabbed 6140 * to do rate control lookups and these are done with the TX 6141 * queue lock held. This means the node lock can't be grabbed 6142 * first here or a LOR will occur. 6143 * 6144 * Eventually (hopefully!) the TX path code will only grab 6145 * the TXQ lock when transmitting and the ath_node lock when 6146 * doing node/TID operations. There are other complications - 6147 * the sched/unsched operations involve walking the per-txq 6148 * 'active tid' list and this requires both locks to be held. 6149 */ 6150 void 6151 ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an) 6152 { 6153 struct ath_tid *atid; 6154 struct ath_txq *txq; 6155 int tid; 6156 6157 ATH_TX_UNLOCK_ASSERT(sc); 6158 6159 /* Suspend all traffic on the node */ 6160 ATH_TX_LOCK(sc); 6161 6162 if (an->an_is_powersave) { 6163 DPRINTF(sc, ATH_DEBUG_XMIT, 6164 "%s: %6D: node was already asleep!\n", 6165 __func__, an->an_node.ni_macaddr, ":"); 6166 ATH_TX_UNLOCK(sc); 6167 return; 6168 } 6169 6170 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 6171 atid = &an->an_tid[tid]; 6172 txq = sc->sc_ac2q[atid->ac]; 6173 6174 ath_tx_tid_pause(sc, atid); 6175 } 6176 6177 /* Mark node as in powersaving */ 6178 an->an_is_powersave = 1; 6179 6180 ATH_TX_UNLOCK(sc); 6181 } 6182 6183 /* 6184 * Mark a node as currently "awake." 6185 * This resumes all traffic to the node. 6186 */ 6187 void 6188 ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an) 6189 { 6190 struct ath_tid *atid; 6191 struct ath_txq *txq; 6192 int tid; 6193 6194 ATH_TX_UNLOCK_ASSERT(sc); 6195 6196 ATH_TX_LOCK(sc); 6197 6198 /* !? */ 6199 if (an->an_is_powersave == 0) { 6200 ATH_TX_UNLOCK(sc); 6201 DPRINTF(sc, ATH_DEBUG_XMIT, 6202 "%s: an=%p: node was already awake\n", 6203 __func__, an); 6204 return; 6205 } 6206 6207 /* Mark node as awake */ 6208 an->an_is_powersave = 0; 6209 /* 6210 * Clear any pending leaked frame requests 6211 */ 6212 an->an_leak_count = 0; 6213 6214 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 6215 atid = &an->an_tid[tid]; 6216 txq = sc->sc_ac2q[atid->ac]; 6217 6218 ath_tx_tid_resume(sc, atid); 6219 } 6220 ATH_TX_UNLOCK(sc); 6221 } 6222 6223 static int 6224 ath_legacy_dma_txsetup(struct ath_softc *sc) 6225 { 6226 6227 /* nothing new needed */ 6228 return (0); 6229 } 6230 6231 static int 6232 ath_legacy_dma_txteardown(struct ath_softc *sc) 6233 { 6234 6235 /* nothing new needed */ 6236 return (0); 6237 } 6238 6239 void 6240 ath_xmit_setup_legacy(struct ath_softc *sc) 6241 { 6242 /* 6243 * For now, just set the descriptor length to sizeof(ath_desc); 6244 * worry about extracting the real length out of the HAL later. 6245 */ 6246 sc->sc_tx_desclen = sizeof(struct ath_desc); 6247 sc->sc_tx_statuslen = sizeof(struct ath_desc); 6248 sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */ 6249 6250 sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup; 6251 sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown; 6252 sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func; 6253 6254 sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart; 6255 sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff; 6256 6257 sc->sc_tx.xmit_drain = ath_legacy_tx_drain; 6258 } 6259