xref: /freebsd/sys/dev/ath/if_ath_tx.c (revision 9966c0f962e22d47291b867d16f7845c05d1e9da)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
5  * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer,
13  *    without modification.
14  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
15  *    similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
16  *    redistribution must be conditioned upon including a substantially
17  *    similar Disclaimer requirement for further binary redistribution.
18  *
19  * NO WARRANTY
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
23  * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
24  * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
25  * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
28  * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
30  * THE POSSIBILITY OF SUCH DAMAGES.
31  */
32 
33 #include <sys/cdefs.h>
34 __FBSDID("$FreeBSD$");
35 
36 /*
37  * Driver for the Atheros Wireless LAN controller.
38  *
39  * This software is derived from work of Atsushi Onoe; his contribution
40  * is greatly appreciated.
41  */
42 
43 #include "opt_inet.h"
44 #include "opt_ath.h"
45 #include "opt_wlan.h"
46 
47 #include <sys/param.h>
48 #include <sys/systm.h>
49 #include <sys/sysctl.h>
50 #include <sys/mbuf.h>
51 #include <sys/malloc.h>
52 #include <sys/lock.h>
53 #include <sys/mutex.h>
54 #include <sys/kernel.h>
55 #include <sys/socket.h>
56 #include <sys/sockio.h>
57 #include <sys/errno.h>
58 #include <sys/callout.h>
59 #include <sys/bus.h>
60 #include <sys/endian.h>
61 #include <sys/kthread.h>
62 #include <sys/taskqueue.h>
63 #include <sys/priv.h>
64 #include <sys/ktr.h>
65 
66 #include <machine/bus.h>
67 
68 #include <net/if.h>
69 #include <net/if_var.h>
70 #include <net/if_dl.h>
71 #include <net/if_media.h>
72 #include <net/if_types.h>
73 #include <net/if_arp.h>
74 #include <net/ethernet.h>
75 #include <net/if_llc.h>
76 
77 #include <net80211/ieee80211_var.h>
78 #include <net80211/ieee80211_regdomain.h>
79 #ifdef IEEE80211_SUPPORT_SUPERG
80 #include <net80211/ieee80211_superg.h>
81 #endif
82 #ifdef IEEE80211_SUPPORT_TDMA
83 #include <net80211/ieee80211_tdma.h>
84 #endif
85 #include <net80211/ieee80211_ht.h>
86 
87 #include <net/bpf.h>
88 
89 #ifdef INET
90 #include <netinet/in.h>
91 #include <netinet/if_ether.h>
92 #endif
93 
94 #include <dev/ath/if_athvar.h>
95 #include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
96 #include <dev/ath/ath_hal/ah_diagcodes.h>
97 
98 #include <dev/ath/if_ath_debug.h>
99 
100 #ifdef ATH_TX99_DIAG
101 #include <dev/ath/ath_tx99/ath_tx99.h>
102 #endif
103 
104 #include <dev/ath/if_ath_misc.h>
105 #include <dev/ath/if_ath_tx.h>
106 #include <dev/ath/if_ath_tx_ht.h>
107 
108 #ifdef	ATH_DEBUG_ALQ
109 #include <dev/ath/if_ath_alq.h>
110 #endif
111 
112 /*
113  * How many retries to perform in software
114  */
115 #define	SWMAX_RETRIES		10
116 
117 /*
118  * What queue to throw the non-QoS TID traffic into
119  */
120 #define	ATH_NONQOS_TID_AC	WME_AC_VO
121 
122 #if 0
123 static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an);
124 #endif
125 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an,
126     int tid);
127 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an,
128     int tid);
129 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc,
130     struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0);
131 static int ath_tx_action_frame_override_queue(struct ath_softc *sc,
132     struct ieee80211_node *ni, struct mbuf *m0, int *tid);
133 static struct ath_buf *
134 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
135     struct ath_tid *tid, struct ath_buf *bf);
136 
137 #ifdef	ATH_DEBUG_ALQ
138 void
139 ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first)
140 {
141 	struct ath_buf *bf;
142 	int i, n;
143 	const char *ds;
144 
145 	/* XXX we should skip out early if debugging isn't enabled! */
146 	bf = bf_first;
147 
148 	while (bf != NULL) {
149 		/* XXX should ensure bf_nseg > 0! */
150 		if (bf->bf_nseg == 0)
151 			break;
152 		n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1;
153 		for (i = 0, ds = (const char *) bf->bf_desc;
154 		    i < n;
155 		    i++, ds += sc->sc_tx_desclen) {
156 			if_ath_alq_post(&sc->sc_alq,
157 			    ATH_ALQ_EDMA_TXDESC,
158 			    sc->sc_tx_desclen,
159 			    ds);
160 		}
161 		bf = bf->bf_next;
162 	}
163 }
164 #endif /* ATH_DEBUG_ALQ */
165 
166 /*
167  * Whether to use the 11n rate scenario functions or not
168  */
169 static inline int
170 ath_tx_is_11n(struct ath_softc *sc)
171 {
172 	return ((sc->sc_ah->ah_magic == 0x20065416) ||
173 		    (sc->sc_ah->ah_magic == 0x19741014));
174 }
175 
176 /*
177  * Obtain the current TID from the given frame.
178  *
179  * Non-QoS frames get mapped to a TID so frames consistently
180  * go on a sensible queue.
181  */
182 static int
183 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0)
184 {
185 	const struct ieee80211_frame *wh;
186 
187 	wh = mtod(m0, const struct ieee80211_frame *);
188 
189 	/* Non-QoS: map frame to a TID queue for software queueing */
190 	if (! IEEE80211_QOS_HAS_SEQ(wh))
191 		return (WME_AC_TO_TID(M_WME_GETAC(m0)));
192 
193 	/* QoS - fetch the TID from the header, ignore mbuf WME */
194 	return (ieee80211_gettid(wh));
195 }
196 
197 static void
198 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf)
199 {
200 	struct ieee80211_frame *wh;
201 
202 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
203 	/* Only update/resync if needed */
204 	if (bf->bf_state.bfs_isretried == 0) {
205 		wh->i_fc[1] |= IEEE80211_FC1_RETRY;
206 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
207 		    BUS_DMASYNC_PREWRITE);
208 	}
209 	bf->bf_state.bfs_isretried = 1;
210 	bf->bf_state.bfs_retries ++;
211 }
212 
213 /*
214  * Determine what the correct AC queue for the given frame
215  * should be.
216  *
217  * For QoS frames, obey the TID.  That way things like
218  * management frames that are related to a given TID
219  * are thus serialised with the rest of the TID traffic,
220  * regardless of net80211 overriding priority.
221  *
222  * For non-QoS frames, return the mbuf WMI priority.
223  *
224  * This has implications that higher priority non-QoS traffic
225  * may end up being scheduled before other non-QoS traffic,
226  * leading to out-of-sequence packets being emitted.
227  *
228  * (It'd be nice to log/count this so we can see if it
229  * really is a problem.)
230  *
231  * TODO: maybe we should throw multicast traffic, QoS or
232  * otherwise, into a separate TX queue?
233  */
234 static int
235 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0)
236 {
237 	const struct ieee80211_frame *wh;
238 
239 	wh = mtod(m0, const struct ieee80211_frame *);
240 
241 	/*
242 	 * QoS data frame (sequence number or otherwise) -
243 	 * return hardware queue mapping for the underlying
244 	 * TID.
245 	 */
246 	if (IEEE80211_QOS_HAS_SEQ(wh))
247 		return TID_TO_WME_AC(ieee80211_gettid(wh));
248 
249 	/*
250 	 * Otherwise - return mbuf QoS pri.
251 	 */
252 	return (M_WME_GETAC(m0));
253 }
254 
255 void
256 ath_txfrag_cleanup(struct ath_softc *sc,
257 	ath_bufhead *frags, struct ieee80211_node *ni)
258 {
259 	struct ath_buf *bf, *next;
260 
261 	ATH_TXBUF_LOCK_ASSERT(sc);
262 
263 	TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) {
264 		/* NB: bf assumed clean */
265 		TAILQ_REMOVE(frags, bf, bf_list);
266 		ath_returnbuf_head(sc, bf);
267 		ieee80211_node_decref(ni);
268 	}
269 }
270 
271 /*
272  * Setup xmit of a fragmented frame.  Allocate a buffer
273  * for each frag and bump the node reference count to
274  * reflect the held reference to be setup by ath_tx_start.
275  */
276 int
277 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags,
278 	struct mbuf *m0, struct ieee80211_node *ni)
279 {
280 	struct mbuf *m;
281 	struct ath_buf *bf;
282 
283 	ATH_TXBUF_LOCK(sc);
284 	for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) {
285 		/* XXX non-management? */
286 		bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL);
287 		if (bf == NULL) {	/* out of buffers, cleanup */
288 			DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n",
289 			    __func__);
290 			ath_txfrag_cleanup(sc, frags, ni);
291 			break;
292 		}
293 		ieee80211_node_incref(ni);
294 		TAILQ_INSERT_TAIL(frags, bf, bf_list);
295 	}
296 	ATH_TXBUF_UNLOCK(sc);
297 
298 	return !TAILQ_EMPTY(frags);
299 }
300 
301 static int
302 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0)
303 {
304 	struct mbuf *m;
305 	int error;
306 
307 	/*
308 	 * Load the DMA map so any coalescing is done.  This
309 	 * also calculates the number of descriptors we need.
310 	 */
311 	error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
312 				     bf->bf_segs, &bf->bf_nseg,
313 				     BUS_DMA_NOWAIT);
314 	if (error == EFBIG) {
315 		/* XXX packet requires too many descriptors */
316 		bf->bf_nseg = ATH_MAX_SCATTER + 1;
317 	} else if (error != 0) {
318 		sc->sc_stats.ast_tx_busdma++;
319 		ieee80211_free_mbuf(m0);
320 		return error;
321 	}
322 	/*
323 	 * Discard null packets and check for packets that
324 	 * require too many TX descriptors.  We try to convert
325 	 * the latter to a cluster.
326 	 */
327 	if (bf->bf_nseg > ATH_MAX_SCATTER) {		/* too many desc's, linearize */
328 		sc->sc_stats.ast_tx_linear++;
329 		m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER);
330 		if (m == NULL) {
331 			ieee80211_free_mbuf(m0);
332 			sc->sc_stats.ast_tx_nombuf++;
333 			return ENOMEM;
334 		}
335 		m0 = m;
336 		error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0,
337 					     bf->bf_segs, &bf->bf_nseg,
338 					     BUS_DMA_NOWAIT);
339 		if (error != 0) {
340 			sc->sc_stats.ast_tx_busdma++;
341 			ieee80211_free_mbuf(m0);
342 			return error;
343 		}
344 		KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER,
345 		    ("too many segments after defrag; nseg %u", bf->bf_nseg));
346 	} else if (bf->bf_nseg == 0) {		/* null packet, discard */
347 		sc->sc_stats.ast_tx_nodata++;
348 		ieee80211_free_mbuf(m0);
349 		return EIO;
350 	}
351 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n",
352 		__func__, m0, m0->m_pkthdr.len);
353 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
354 	bf->bf_m = m0;
355 
356 	return 0;
357 }
358 
359 /*
360  * Chain together segments+descriptors for a frame - 11n or otherwise.
361  *
362  * For aggregates, this is called on each frame in the aggregate.
363  */
364 static void
365 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0,
366     struct ath_buf *bf, bool is_aggr, int is_first_subframe,
367     int is_last_subframe)
368 {
369 	struct ath_hal *ah = sc->sc_ah;
370 	char *ds;
371 	int i, bp, dsp;
372 	HAL_DMA_ADDR bufAddrList[4];
373 	uint32_t segLenList[4];
374 	int numTxMaps = 1;
375 	int isFirstDesc = 1;
376 
377 	/*
378 	 * XXX There's txdma and txdma_mgmt; the descriptor
379 	 * sizes must match.
380 	 */
381 	struct ath_descdma *dd = &sc->sc_txdma;
382 
383 	/*
384 	 * Fillin the remainder of the descriptor info.
385 	 */
386 
387 	/*
388 	 * We need the number of TX data pointers in each descriptor.
389 	 * EDMA and later chips support 4 TX buffers per descriptor;
390 	 * previous chips just support one.
391 	 */
392 	numTxMaps = sc->sc_tx_nmaps;
393 
394 	/*
395 	 * For EDMA and later chips ensure the TX map is fully populated
396 	 * before advancing to the next descriptor.
397 	 */
398 	ds = (char *) bf->bf_desc;
399 	bp = dsp = 0;
400 	bzero(bufAddrList, sizeof(bufAddrList));
401 	bzero(segLenList, sizeof(segLenList));
402 	for (i = 0; i < bf->bf_nseg; i++) {
403 		bufAddrList[bp] = bf->bf_segs[i].ds_addr;
404 		segLenList[bp] = bf->bf_segs[i].ds_len;
405 		bp++;
406 
407 		/*
408 		 * Go to the next segment if this isn't the last segment
409 		 * and there's space in the current TX map.
410 		 */
411 		if ((i != bf->bf_nseg - 1) && (bp < numTxMaps))
412 			continue;
413 
414 		/*
415 		 * Last segment or we're out of buffer pointers.
416 		 */
417 		bp = 0;
418 
419 		if (i == bf->bf_nseg - 1)
420 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0);
421 		else
422 			ath_hal_settxdesclink(ah, (struct ath_desc *) ds,
423 			    bf->bf_daddr + dd->dd_descsize * (dsp + 1));
424 
425 		/*
426 		 * XXX This assumes that bfs_txq is the actual destination
427 		 * hardware queue at this point.  It may not have been
428 		 * assigned, it may actually be pointing to the multicast
429 		 * software TXQ id.  These must be fixed!
430 		 */
431 		ath_hal_filltxdesc(ah, (struct ath_desc *) ds
432 			, bufAddrList
433 			, segLenList
434 			, bf->bf_descid		/* XXX desc id */
435 			, bf->bf_state.bfs_tx_queue
436 			, isFirstDesc		/* first segment */
437 			, i == bf->bf_nseg - 1	/* last segment */
438 			, (struct ath_desc *) ds0	/* first descriptor */
439 		);
440 
441 		/*
442 		 * Make sure the 11n aggregate fields are cleared.
443 		 *
444 		 * XXX TODO: this doesn't need to be called for
445 		 * aggregate frames; as it'll be called on all
446 		 * sub-frames.  Since the descriptors are in
447 		 * non-cacheable memory, this leads to some
448 		 * rather slow writes on MIPS/ARM platforms.
449 		 */
450 		if (ath_tx_is_11n(sc))
451 			ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds);
452 
453 		/*
454 		 * If 11n is enabled, set it up as if it's an aggregate
455 		 * frame.
456 		 */
457 		if (is_last_subframe) {
458 			ath_hal_set11n_aggr_last(sc->sc_ah,
459 			    (struct ath_desc *) ds);
460 		} else if (is_aggr) {
461 			/*
462 			 * This clears the aggrlen field; so
463 			 * the caller needs to call set_aggr_first()!
464 			 *
465 			 * XXX TODO: don't call this for the first
466 			 * descriptor in the first frame in an
467 			 * aggregate!
468 			 */
469 			ath_hal_set11n_aggr_middle(sc->sc_ah,
470 			    (struct ath_desc *) ds,
471 			    bf->bf_state.bfs_ndelim);
472 		}
473 		isFirstDesc = 0;
474 		bf->bf_lastds = (struct ath_desc *) ds;
475 
476 		/*
477 		 * Don't forget to skip to the next descriptor.
478 		 */
479 		ds += sc->sc_tx_desclen;
480 		dsp++;
481 
482 		/*
483 		 * .. and don't forget to blank these out!
484 		 */
485 		bzero(bufAddrList, sizeof(bufAddrList));
486 		bzero(segLenList, sizeof(segLenList));
487 	}
488 	bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE);
489 }
490 
491 /*
492  * Set the rate control fields in the given descriptor based on
493  * the bf_state fields and node state.
494  *
495  * The bfs fields should already be set with the relevant rate
496  * control information, including whether MRR is to be enabled.
497  *
498  * Since the FreeBSD HAL currently sets up the first TX rate
499  * in ath_hal_setuptxdesc(), this will setup the MRR
500  * conditionally for the pre-11n chips, and call ath_buf_set_rate
501  * unconditionally for 11n chips. These require the 11n rate
502  * scenario to be set if MCS rates are enabled, so it's easier
503  * to just always call it. The caller can then only set rates 2, 3
504  * and 4 if multi-rate retry is needed.
505  */
506 static void
507 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni,
508     struct ath_buf *bf)
509 {
510 	struct ath_rc_series *rc = bf->bf_state.bfs_rc;
511 
512 	/* If mrr is disabled, blank tries 1, 2, 3 */
513 	if (! bf->bf_state.bfs_ismrr)
514 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
515 
516 #if 0
517 	/*
518 	 * If NOACK is set, just set ntries=1.
519 	 */
520 	else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) {
521 		rc[1].tries = rc[2].tries = rc[3].tries = 0;
522 		rc[0].tries = 1;
523 	}
524 #endif
525 
526 	/*
527 	 * Always call - that way a retried descriptor will
528 	 * have the MRR fields overwritten.
529 	 *
530 	 * XXX TODO: see if this is really needed - setting up
531 	 * the first descriptor should set the MRR fields to 0
532 	 * for us anyway.
533 	 */
534 	if (ath_tx_is_11n(sc)) {
535 		ath_buf_set_rate(sc, ni, bf);
536 	} else {
537 		ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc
538 			, rc[1].ratecode, rc[1].tries
539 			, rc[2].ratecode, rc[2].tries
540 			, rc[3].ratecode, rc[3].tries
541 		);
542 	}
543 }
544 
545 /*
546  * Setup segments+descriptors for an 11n aggregate.
547  * bf_first is the first buffer in the aggregate.
548  * The descriptor list must already been linked together using
549  * bf->bf_next.
550  */
551 static void
552 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first)
553 {
554 	struct ath_buf *bf, *bf_prev = NULL;
555 	struct ath_desc *ds0 = bf_first->bf_desc;
556 
557 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n",
558 	    __func__, bf_first->bf_state.bfs_nframes,
559 	    bf_first->bf_state.bfs_al);
560 
561 	bf = bf_first;
562 
563 	if (bf->bf_state.bfs_txrate0 == 0)
564 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n",
565 		    __func__, bf, 0);
566 	if (bf->bf_state.bfs_rc[0].ratecode == 0)
567 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n",
568 		    __func__, bf, 0);
569 
570 	/*
571 	 * Setup all descriptors of all subframes - this will
572 	 * call ath_hal_set11naggrmiddle() on every frame.
573 	 */
574 	while (bf != NULL) {
575 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
576 		    "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n",
577 		    __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen,
578 		    SEQNO(bf->bf_state.bfs_seqno));
579 
580 		/*
581 		 * Setup the initial fields for the first descriptor - all
582 		 * the non-11n specific stuff.
583 		 */
584 		ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc
585 			, bf->bf_state.bfs_pktlen	/* packet length */
586 			, bf->bf_state.bfs_hdrlen	/* header length */
587 			, bf->bf_state.bfs_atype	/* Atheros packet type */
588 			, bf->bf_state.bfs_txpower	/* txpower */
589 			, bf->bf_state.bfs_txrate0
590 			, bf->bf_state.bfs_try0		/* series 0 rate/tries */
591 			, bf->bf_state.bfs_keyix	/* key cache index */
592 			, bf->bf_state.bfs_txantenna	/* antenna mode */
593 			, bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ	/* flags */
594 			, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
595 			, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
596 		);
597 
598 		/*
599 		 * First descriptor? Setup the rate control and initial
600 		 * aggregate header information.
601 		 */
602 		if (bf == bf_first) {
603 			/*
604 			 * setup first desc with rate and aggr info
605 			 */
606 			ath_tx_set_ratectrl(sc, bf->bf_node, bf);
607 		}
608 
609 		/*
610 		 * Setup the descriptors for a multi-descriptor frame.
611 		 * This is both aggregate and non-aggregate aware.
612 		 */
613 		ath_tx_chaindesclist(sc, ds0, bf,
614 		    1, /* is_aggr */
615 		    !! (bf == bf_first), /* is_first_subframe */
616 		    !! (bf->bf_next == NULL) /* is_last_subframe */
617 		    );
618 
619 		if (bf == bf_first) {
620 			/*
621 			 * Initialise the first 11n aggregate with the
622 			 * aggregate length and aggregate enable bits.
623 			 */
624 			ath_hal_set11n_aggr_first(sc->sc_ah,
625 			    ds0,
626 			    bf->bf_state.bfs_al,
627 			    bf->bf_state.bfs_ndelim);
628 		}
629 
630 		/*
631 		 * Link the last descriptor of the previous frame
632 		 * to the beginning descriptor of this frame.
633 		 */
634 		if (bf_prev != NULL)
635 			ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds,
636 			    bf->bf_daddr);
637 
638 		/* Save a copy so we can link the next descriptor in */
639 		bf_prev = bf;
640 		bf = bf->bf_next;
641 	}
642 
643 	/*
644 	 * Set the first descriptor bf_lastds field to point to
645 	 * the last descriptor in the last subframe, that's where
646 	 * the status update will occur.
647 	 */
648 	bf_first->bf_lastds = bf_prev->bf_lastds;
649 
650 	/*
651 	 * And bf_last in the first descriptor points to the end of
652 	 * the aggregate list.
653 	 */
654 	bf_first->bf_last = bf_prev;
655 
656 	/*
657 	 * For non-AR9300 NICs, which require the rate control
658 	 * in the final descriptor - let's set that up now.
659 	 *
660 	 * This is because the filltxdesc() HAL call doesn't
661 	 * populate the last segment with rate control information
662 	 * if firstSeg is also true.  For non-aggregate frames
663 	 * that is fine, as the first frame already has rate control
664 	 * info.  But if the last frame in an aggregate has one
665 	 * descriptor, both firstseg and lastseg will be true and
666 	 * the rate info isn't copied.
667 	 *
668 	 * This is inefficient on MIPS/ARM platforms that have
669 	 * non-cachable memory for TX descriptors, but we'll just
670 	 * make do for now.
671 	 *
672 	 * As to why the rate table is stashed in the last descriptor
673 	 * rather than the first descriptor?  Because proctxdesc()
674 	 * is called on the final descriptor in an MPDU or A-MPDU -
675 	 * ie, the one that gets updated by the hardware upon
676 	 * completion.  That way proctxdesc() doesn't need to know
677 	 * about the first _and_ last TX descriptor.
678 	 */
679 	ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0);
680 
681 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__);
682 }
683 
684 /*
685  * Hand-off a frame to the multicast TX queue.
686  *
687  * This is a software TXQ which will be appended to the CAB queue
688  * during the beacon setup code.
689  *
690  * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID
691  * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated
692  * with the actual hardware txq, or all of this will fall apart.
693  *
694  * XXX It may not be a bad idea to just stuff the QCU ID into bf_state
695  * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated
696  * correctly.
697  */
698 static void
699 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq,
700     struct ath_buf *bf)
701 {
702 	ATH_TX_LOCK_ASSERT(sc);
703 
704 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
705 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
706 
707 	/*
708 	 * Ensure that the tx queue is the cabq, so things get
709 	 * mapped correctly.
710 	 */
711 	if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) {
712 		DPRINTF(sc, ATH_DEBUG_XMIT,
713 		    "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
714 		    __func__, bf, bf->bf_state.bfs_tx_queue,
715 		    txq->axq_qnum);
716 	}
717 
718 	ATH_TXQ_LOCK(txq);
719 	if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) {
720 		struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s);
721 		struct ieee80211_frame *wh;
722 
723 		/* mark previous frame */
724 		wh = mtod(bf_last->bf_m, struct ieee80211_frame *);
725 		wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
726 		bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap,
727 		    BUS_DMASYNC_PREWRITE);
728 
729 		/* link descriptor */
730 		ath_hal_settxdesclink(sc->sc_ah,
731 		    bf_last->bf_lastds,
732 		    bf->bf_daddr);
733 	}
734 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
735 	ATH_TXQ_UNLOCK(txq);
736 }
737 
738 /*
739  * Hand-off packet to a hardware queue.
740  */
741 static void
742 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq,
743     struct ath_buf *bf)
744 {
745 	struct ath_hal *ah = sc->sc_ah;
746 	struct ath_buf *bf_first;
747 
748 	/*
749 	 * Insert the frame on the outbound list and pass it on
750 	 * to the hardware.  Multicast frames buffered for power
751 	 * save stations and transmit from the CAB queue are stored
752 	 * on a s/w only queue and loaded on to the CAB queue in
753 	 * the SWBA handler since frames only go out on DTIM and
754 	 * to avoid possible races.
755 	 */
756 	ATH_TX_LOCK_ASSERT(sc);
757 	KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0,
758 	     ("%s: busy status 0x%x", __func__, bf->bf_flags));
759 	KASSERT(txq->axq_qnum != ATH_TXQ_SWQ,
760 	     ("ath_tx_handoff_hw called for mcast queue"));
761 
762 	/*
763 	 * XXX We should instead just verify that sc_txstart_cnt
764 	 * or ath_txproc_cnt > 0.  That would mean that
765 	 * the reset is going to be waiting for us to complete.
766 	 */
767 	if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) {
768 		device_printf(sc->sc_dev,
769 		    "%s: TX dispatch without holding txcount/txstart refcnt!\n",
770 		    __func__);
771 	}
772 
773 	/*
774 	 * XXX .. this is going to cause the hardware to get upset;
775 	 * so we really should find some way to drop or queue
776 	 * things.
777 	 */
778 
779 	ATH_TXQ_LOCK(txq);
780 
781 	/*
782 	 * XXX TODO: if there's a holdingbf, then
783 	 * ATH_TXQ_PUTRUNNING should be clear.
784 	 *
785 	 * If there is a holdingbf and the list is empty,
786 	 * then axq_link should be pointing to the holdingbf.
787 	 *
788 	 * Otherwise it should point to the last descriptor
789 	 * in the last ath_buf.
790 	 *
791 	 * In any case, we should really ensure that we
792 	 * update the previous descriptor link pointer to
793 	 * this descriptor, regardless of all of the above state.
794 	 *
795 	 * For now this is captured by having axq_link point
796 	 * to either the holdingbf (if the TXQ list is empty)
797 	 * or the end of the list (if the TXQ list isn't empty.)
798 	 * I'd rather just kill axq_link here and do it as above.
799 	 */
800 
801 	/*
802 	 * Append the frame to the TX queue.
803 	 */
804 	ATH_TXQ_INSERT_TAIL(txq, bf, bf_list);
805 	ATH_KTR(sc, ATH_KTR_TX, 3,
806 	    "ath_tx_handoff: non-tdma: txq=%u, add bf=%p "
807 	    "depth=%d",
808 	    txq->axq_qnum,
809 	    bf,
810 	    txq->axq_depth);
811 
812 	/*
813 	 * If there's a link pointer, update it.
814 	 *
815 	 * XXX we should replace this with the above logic, just
816 	 * to kill axq_link with fire.
817 	 */
818 	if (txq->axq_link != NULL) {
819 		*txq->axq_link = bf->bf_daddr;
820 		DPRINTF(sc, ATH_DEBUG_XMIT,
821 		    "%s: link[%u](%p)=%p (%p) depth %d\n", __func__,
822 		    txq->axq_qnum, txq->axq_link,
823 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
824 		    txq->axq_depth);
825 		ATH_KTR(sc, ATH_KTR_TX, 5,
826 		    "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) "
827 		    "lastds=%d",
828 		    txq->axq_qnum, txq->axq_link,
829 		    (caddr_t)bf->bf_daddr, bf->bf_desc,
830 		    bf->bf_lastds);
831 	}
832 
833 	/*
834 	 * If we've not pushed anything into the hardware yet,
835 	 * push the head of the queue into the TxDP.
836 	 *
837 	 * Once we've started DMA, there's no guarantee that
838 	 * updating the TxDP with a new value will actually work.
839 	 * So we just don't do that - if we hit the end of the list,
840 	 * we keep that buffer around (the "holding buffer") and
841 	 * re-start DMA by updating the link pointer of _that_
842 	 * descriptor and then restart DMA.
843 	 */
844 	if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) {
845 		bf_first = TAILQ_FIRST(&txq->axq_q);
846 		txq->axq_flags |= ATH_TXQ_PUTRUNNING;
847 		ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr);
848 		DPRINTF(sc, ATH_DEBUG_XMIT,
849 		    "%s: TXDP[%u] = %p (%p) depth %d\n",
850 		    __func__, txq->axq_qnum,
851 		    (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
852 		    txq->axq_depth);
853 		ATH_KTR(sc, ATH_KTR_TX, 5,
854 		    "ath_tx_handoff: TXDP[%u] = %p (%p) "
855 		    "lastds=%p depth %d",
856 		    txq->axq_qnum,
857 		    (caddr_t)bf_first->bf_daddr, bf_first->bf_desc,
858 		    bf_first->bf_lastds,
859 		    txq->axq_depth);
860 	}
861 
862 	/*
863 	 * Ensure that the bf TXQ matches this TXQ, so later
864 	 * checking and holding buffer manipulation is sane.
865 	 */
866 	if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) {
867 		DPRINTF(sc, ATH_DEBUG_XMIT,
868 		    "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n",
869 		    __func__, bf, bf->bf_state.bfs_tx_queue,
870 		    txq->axq_qnum);
871 	}
872 
873 	/*
874 	 * Track aggregate queue depth.
875 	 */
876 	if (bf->bf_state.bfs_aggr)
877 		txq->axq_aggr_depth++;
878 
879 	/*
880 	 * Update the link pointer.
881 	 */
882 	ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link);
883 
884 	/*
885 	 * Start DMA.
886 	 *
887 	 * If we wrote a TxDP above, DMA will start from here.
888 	 *
889 	 * If DMA is running, it'll do nothing.
890 	 *
891 	 * If the DMA engine hit the end of the QCU list (ie LINK=NULL,
892 	 * or VEOL) then it stops at the last transmitted write.
893 	 * We then append a new frame by updating the link pointer
894 	 * in that descriptor and then kick TxE here; it will re-read
895 	 * that last descriptor and find the new descriptor to transmit.
896 	 *
897 	 * This is why we keep the holding descriptor around.
898 	 */
899 	ath_hal_txstart(ah, txq->axq_qnum);
900 	ATH_TXQ_UNLOCK(txq);
901 	ATH_KTR(sc, ATH_KTR_TX, 1,
902 	    "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum);
903 }
904 
905 /*
906  * Restart TX DMA for the given TXQ.
907  *
908  * This must be called whether the queue is empty or not.
909  */
910 static void
911 ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq)
912 {
913 	struct ath_buf *bf, *bf_last;
914 
915 	ATH_TXQ_LOCK_ASSERT(txq);
916 
917 	/* XXX make this ATH_TXQ_FIRST */
918 	bf = TAILQ_FIRST(&txq->axq_q);
919 	bf_last = ATH_TXQ_LAST(txq, axq_q_s);
920 
921 	if (bf == NULL)
922 		return;
923 
924 	DPRINTF(sc, ATH_DEBUG_RESET,
925 	    "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n",
926 	    __func__,
927 	    txq->axq_qnum,
928 	    bf,
929 	    bf_last,
930 	    (uint32_t) bf->bf_daddr);
931 
932 #ifdef	ATH_DEBUG
933 	if (sc->sc_debug & ATH_DEBUG_RESET)
934 		ath_tx_dump(sc, txq);
935 #endif
936 
937 	/*
938 	 * This is called from a restart, so DMA is known to be
939 	 * completely stopped.
940 	 */
941 	KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)),
942 	    ("%s: Q%d: called with PUTRUNNING=1\n",
943 	    __func__,
944 	    txq->axq_qnum));
945 
946 	ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr);
947 	txq->axq_flags |= ATH_TXQ_PUTRUNNING;
948 
949 	ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds,
950 	    &txq->axq_link);
951 	ath_hal_txstart(sc->sc_ah, txq->axq_qnum);
952 }
953 
954 /*
955  * Hand off a packet to the hardware (or mcast queue.)
956  *
957  * The relevant hardware txq should be locked.
958  */
959 static void
960 ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq,
961     struct ath_buf *bf)
962 {
963 	ATH_TX_LOCK_ASSERT(sc);
964 
965 #ifdef	ATH_DEBUG_ALQ
966 	if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC))
967 		ath_tx_alq_post(sc, bf);
968 #endif
969 
970 	if (txq->axq_qnum == ATH_TXQ_SWQ)
971 		ath_tx_handoff_mcast(sc, txq, bf);
972 	else
973 		ath_tx_handoff_hw(sc, txq, bf);
974 }
975 
976 static int
977 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni,
978     struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen,
979     int *keyix)
980 {
981 	DPRINTF(sc, ATH_DEBUG_XMIT,
982 	    "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n",
983 	    __func__,
984 	    *hdrlen,
985 	    *pktlen,
986 	    isfrag,
987 	    iswep,
988 	    m0);
989 
990 	if (iswep) {
991 		const struct ieee80211_cipher *cip;
992 		struct ieee80211_key *k;
993 
994 		/*
995 		 * Construct the 802.11 header+trailer for an encrypted
996 		 * frame. The only reason this can fail is because of an
997 		 * unknown or unsupported cipher/key type.
998 		 */
999 		k = ieee80211_crypto_encap(ni, m0);
1000 		if (k == NULL) {
1001 			/*
1002 			 * This can happen when the key is yanked after the
1003 			 * frame was queued.  Just discard the frame; the
1004 			 * 802.11 layer counts failures and provides
1005 			 * debugging/diagnostics.
1006 			 */
1007 			return (0);
1008 		}
1009 		/*
1010 		 * Adjust the packet + header lengths for the crypto
1011 		 * additions and calculate the h/w key index.  When
1012 		 * a s/w mic is done the frame will have had any mic
1013 		 * added to it prior to entry so m0->m_pkthdr.len will
1014 		 * account for it. Otherwise we need to add it to the
1015 		 * packet length.
1016 		 */
1017 		cip = k->wk_cipher;
1018 		(*hdrlen) += cip->ic_header;
1019 		(*pktlen) += cip->ic_header + cip->ic_trailer;
1020 		/* NB: frags always have any TKIP MIC done in s/w */
1021 		if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag)
1022 			(*pktlen) += cip->ic_miclen;
1023 		(*keyix) = k->wk_keyix;
1024 	} else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) {
1025 		/*
1026 		 * Use station key cache slot, if assigned.
1027 		 */
1028 		(*keyix) = ni->ni_ucastkey.wk_keyix;
1029 		if ((*keyix) == IEEE80211_KEYIX_NONE)
1030 			(*keyix) = HAL_TXKEYIX_INVALID;
1031 	} else
1032 		(*keyix) = HAL_TXKEYIX_INVALID;
1033 
1034 	return (1);
1035 }
1036 
1037 /*
1038  * Calculate whether interoperability protection is required for
1039  * this frame.
1040  *
1041  * This requires the rate control information be filled in,
1042  * as the protection requirement depends upon the current
1043  * operating mode / PHY.
1044  */
1045 static void
1046 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf)
1047 {
1048 	struct ieee80211_frame *wh;
1049 	uint8_t rix;
1050 	uint16_t flags;
1051 	int shortPreamble;
1052 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1053 	struct ieee80211com *ic = &sc->sc_ic;
1054 
1055 	flags = bf->bf_state.bfs_txflags;
1056 	rix = bf->bf_state.bfs_rc[0].rix;
1057 	shortPreamble = bf->bf_state.bfs_shpream;
1058 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1059 
1060 	/* Disable frame protection for TOA probe frames */
1061 	if (bf->bf_flags & ATH_BUF_TOA_PROBE) {
1062 		/* XXX count */
1063 		flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA);
1064 		bf->bf_state.bfs_doprot = 0;
1065 		goto finish;
1066 	}
1067 
1068 	/*
1069 	 * If 802.11g protection is enabled, determine whether
1070 	 * to use RTS/CTS or just CTS.  Note that this is only
1071 	 * done for OFDM unicast frames.
1072 	 */
1073 	if ((ic->ic_flags & IEEE80211_F_USEPROT) &&
1074 	    rt->info[rix].phy == IEEE80211_T_OFDM &&
1075 	    (flags & HAL_TXDESC_NOACK) == 0) {
1076 		bf->bf_state.bfs_doprot = 1;
1077 		/* XXX fragments must use CCK rates w/ protection */
1078 		if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) {
1079 			flags |= HAL_TXDESC_RTSENA;
1080 		} else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) {
1081 			flags |= HAL_TXDESC_CTSENA;
1082 		}
1083 		/*
1084 		 * For frags it would be desirable to use the
1085 		 * highest CCK rate for RTS/CTS.  But stations
1086 		 * farther away may detect it at a lower CCK rate
1087 		 * so use the configured protection rate instead
1088 		 * (for now).
1089 		 */
1090 		sc->sc_stats.ast_tx_protect++;
1091 	}
1092 
1093 	/*
1094 	 * If 11n protection is enabled and it's a HT frame,
1095 	 * enable RTS.
1096 	 *
1097 	 * XXX ic_htprotmode or ic_curhtprotmode?
1098 	 * XXX should it_htprotmode only matter if ic_curhtprotmode
1099 	 * XXX indicates it's not a HT pure environment?
1100 	 */
1101 	if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) &&
1102 	    rt->info[rix].phy == IEEE80211_T_HT &&
1103 	    (flags & HAL_TXDESC_NOACK) == 0) {
1104 		flags |= HAL_TXDESC_RTSENA;
1105 		sc->sc_stats.ast_tx_htprotect++;
1106 	}
1107 
1108 finish:
1109 	bf->bf_state.bfs_txflags = flags;
1110 }
1111 
1112 /*
1113  * Update the frame duration given the currently selected rate.
1114  *
1115  * This also updates the frame duration value, so it will require
1116  * a DMA flush.
1117  */
1118 static void
1119 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf)
1120 {
1121 	struct ieee80211_frame *wh;
1122 	uint8_t rix;
1123 	uint16_t flags;
1124 	int shortPreamble;
1125 	struct ath_hal *ah = sc->sc_ah;
1126 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1127 	int isfrag = bf->bf_m->m_flags & M_FRAG;
1128 
1129 	flags = bf->bf_state.bfs_txflags;
1130 	rix = bf->bf_state.bfs_rc[0].rix;
1131 	shortPreamble = bf->bf_state.bfs_shpream;
1132 	wh = mtod(bf->bf_m, struct ieee80211_frame *);
1133 
1134 	/*
1135 	 * Calculate duration.  This logically belongs in the 802.11
1136 	 * layer but it lacks sufficient information to calculate it.
1137 	 */
1138 	if ((flags & HAL_TXDESC_NOACK) == 0 &&
1139 	    (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) {
1140 		u_int16_t dur;
1141 		if (shortPreamble)
1142 			dur = rt->info[rix].spAckDuration;
1143 		else
1144 			dur = rt->info[rix].lpAckDuration;
1145 		if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) {
1146 			dur += dur;		/* additional SIFS+ACK */
1147 			/*
1148 			 * Include the size of next fragment so NAV is
1149 			 * updated properly.  The last fragment uses only
1150 			 * the ACK duration
1151 			 *
1152 			 * XXX TODO: ensure that the rate lookup for each
1153 			 * fragment is the same as the rate used by the
1154 			 * first fragment!
1155 			 */
1156 			dur += ath_hal_computetxtime(ah,
1157 			    rt,
1158 			    bf->bf_nextfraglen,
1159 			    rix, shortPreamble,
1160 			    AH_TRUE);
1161 		}
1162 		if (isfrag) {
1163 			/*
1164 			 * Force hardware to use computed duration for next
1165 			 * fragment by disabling multi-rate retry which updates
1166 			 * duration based on the multi-rate duration table.
1167 			 */
1168 			bf->bf_state.bfs_ismrr = 0;
1169 			bf->bf_state.bfs_try0 = ATH_TXMGTTRY;
1170 			/* XXX update bfs_rc[0].try? */
1171 		}
1172 
1173 		/* Update the duration field itself */
1174 		*(u_int16_t *)wh->i_dur = htole16(dur);
1175 	}
1176 }
1177 
1178 static uint8_t
1179 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt,
1180     int cix, int shortPreamble)
1181 {
1182 	uint8_t ctsrate;
1183 
1184 	/*
1185 	 * CTS transmit rate is derived from the transmit rate
1186 	 * by looking in the h/w rate table.  We must also factor
1187 	 * in whether or not a short preamble is to be used.
1188 	 */
1189 	/* NB: cix is set above where RTS/CTS is enabled */
1190 	KASSERT(cix != 0xff, ("cix not setup"));
1191 	ctsrate = rt->info[cix].rateCode;
1192 
1193 	/* XXX this should only matter for legacy rates */
1194 	if (shortPreamble)
1195 		ctsrate |= rt->info[cix].shortPreamble;
1196 
1197 	return (ctsrate);
1198 }
1199 
1200 /*
1201  * Calculate the RTS/CTS duration for legacy frames.
1202  */
1203 static int
1204 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix,
1205     int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt,
1206     int flags)
1207 {
1208 	int ctsduration = 0;
1209 
1210 	/* This mustn't be called for HT modes */
1211 	if (rt->info[cix].phy == IEEE80211_T_HT) {
1212 		printf("%s: HT rate where it shouldn't be (0x%x)\n",
1213 		    __func__, rt->info[cix].rateCode);
1214 		return (-1);
1215 	}
1216 
1217 	/*
1218 	 * Compute the transmit duration based on the frame
1219 	 * size and the size of an ACK frame.  We call into the
1220 	 * HAL to do the computation since it depends on the
1221 	 * characteristics of the actual PHY being used.
1222 	 *
1223 	 * NB: CTS is assumed the same size as an ACK so we can
1224 	 *     use the precalculated ACK durations.
1225 	 */
1226 	if (shortPreamble) {
1227 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1228 			ctsduration += rt->info[cix].spAckDuration;
1229 		ctsduration += ath_hal_computetxtime(ah,
1230 			rt, pktlen, rix, AH_TRUE, AH_TRUE);
1231 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1232 			ctsduration += rt->info[rix].spAckDuration;
1233 	} else {
1234 		if (flags & HAL_TXDESC_RTSENA)		/* SIFS + CTS */
1235 			ctsduration += rt->info[cix].lpAckDuration;
1236 		ctsduration += ath_hal_computetxtime(ah,
1237 			rt, pktlen, rix, AH_FALSE, AH_TRUE);
1238 		if ((flags & HAL_TXDESC_NOACK) == 0)	/* SIFS + ACK */
1239 			ctsduration += rt->info[rix].lpAckDuration;
1240 	}
1241 
1242 	return (ctsduration);
1243 }
1244 
1245 /*
1246  * Update the given ath_buf with updated rts/cts setup and duration
1247  * values.
1248  *
1249  * To support rate lookups for each software retry, the rts/cts rate
1250  * and cts duration must be re-calculated.
1251  *
1252  * This function assumes the RTS/CTS flags have been set as needed;
1253  * mrr has been disabled; and the rate control lookup has been done.
1254  *
1255  * XXX TODO: MRR need only be disabled for the pre-11n NICs.
1256  * XXX The 11n NICs support per-rate RTS/CTS configuration.
1257  */
1258 static void
1259 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf)
1260 {
1261 	uint16_t ctsduration = 0;
1262 	uint8_t ctsrate = 0;
1263 	uint8_t rix = bf->bf_state.bfs_rc[0].rix;
1264 	uint8_t cix = 0;
1265 	const HAL_RATE_TABLE *rt = sc->sc_currates;
1266 
1267 	/*
1268 	 * No RTS/CTS enabled? Don't bother.
1269 	 */
1270 	if ((bf->bf_state.bfs_txflags &
1271 	    (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) {
1272 		/* XXX is this really needed? */
1273 		bf->bf_state.bfs_ctsrate = 0;
1274 		bf->bf_state.bfs_ctsduration = 0;
1275 		return;
1276 	}
1277 
1278 	/*
1279 	 * If protection is enabled, use the protection rix control
1280 	 * rate. Otherwise use the rate0 control rate.
1281 	 */
1282 	if (bf->bf_state.bfs_doprot)
1283 		rix = sc->sc_protrix;
1284 	else
1285 		rix = bf->bf_state.bfs_rc[0].rix;
1286 
1287 	/*
1288 	 * If the raw path has hard-coded ctsrate0 to something,
1289 	 * use it.
1290 	 */
1291 	if (bf->bf_state.bfs_ctsrate0 != 0)
1292 		cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0);
1293 	else
1294 		/* Control rate from above */
1295 		cix = rt->info[rix].controlRate;
1296 
1297 	/* Calculate the rtscts rate for the given cix */
1298 	ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix,
1299 	    bf->bf_state.bfs_shpream);
1300 
1301 	/* The 11n chipsets do ctsduration calculations for you */
1302 	if (! ath_tx_is_11n(sc))
1303 		ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix,
1304 		    bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen,
1305 		    rt, bf->bf_state.bfs_txflags);
1306 
1307 	/* Squirrel away in ath_buf */
1308 	bf->bf_state.bfs_ctsrate = ctsrate;
1309 	bf->bf_state.bfs_ctsduration = ctsduration;
1310 
1311 	/*
1312 	 * Must disable multi-rate retry when using RTS/CTS.
1313 	 */
1314 	if (!sc->sc_mrrprot) {
1315 		bf->bf_state.bfs_ismrr = 0;
1316 		bf->bf_state.bfs_try0 =
1317 		    bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */
1318 	}
1319 }
1320 
1321 /*
1322  * Setup the descriptor chain for a normal or fast-frame
1323  * frame.
1324  *
1325  * XXX TODO: extend to include the destination hardware QCU ID.
1326  * Make sure that is correct.  Make sure that when being added
1327  * to the mcastq, the CABQ QCUID is set or things will get a bit
1328  * odd.
1329  */
1330 static void
1331 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf)
1332 {
1333 	struct ath_desc *ds = bf->bf_desc;
1334 	struct ath_hal *ah = sc->sc_ah;
1335 
1336 	if (bf->bf_state.bfs_txrate0 == 0)
1337 		DPRINTF(sc, ATH_DEBUG_XMIT,
1338 		    "%s: bf=%p, txrate0=%d\n", __func__, bf, 0);
1339 
1340 	ath_hal_setuptxdesc(ah, ds
1341 		, bf->bf_state.bfs_pktlen	/* packet length */
1342 		, bf->bf_state.bfs_hdrlen	/* header length */
1343 		, bf->bf_state.bfs_atype	/* Atheros packet type */
1344 		, bf->bf_state.bfs_txpower	/* txpower */
1345 		, bf->bf_state.bfs_txrate0
1346 		, bf->bf_state.bfs_try0		/* series 0 rate/tries */
1347 		, bf->bf_state.bfs_keyix	/* key cache index */
1348 		, bf->bf_state.bfs_txantenna	/* antenna mode */
1349 		, bf->bf_state.bfs_txflags	/* flags */
1350 		, bf->bf_state.bfs_ctsrate	/* rts/cts rate */
1351 		, bf->bf_state.bfs_ctsduration	/* rts/cts duration */
1352 	);
1353 
1354 	/*
1355 	 * This will be overriden when the descriptor chain is written.
1356 	 */
1357 	bf->bf_lastds = ds;
1358 	bf->bf_last = bf;
1359 
1360 	/* Set rate control and descriptor chain for this frame */
1361 	ath_tx_set_ratectrl(sc, bf->bf_node, bf);
1362 	ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0);
1363 }
1364 
1365 /*
1366  * Do a rate lookup.
1367  *
1368  * This performs a rate lookup for the given ath_buf only if it's required.
1369  * Non-data frames and raw frames don't require it.
1370  *
1371  * This populates the primary and MRR entries; MRR values are
1372  * then disabled later on if something requires it (eg RTS/CTS on
1373  * pre-11n chipsets.
1374  *
1375  * This needs to be done before the RTS/CTS fields are calculated
1376  * as they may depend upon the rate chosen.
1377  */
1378 static void
1379 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf, int tid,
1380     int pktlen, int is_aggr)
1381 {
1382 	uint8_t rate, rix;
1383 	int try0;
1384 	int maxdur; // Note: Unused for now
1385 	int maxpktlen;
1386 
1387 	if (! bf->bf_state.bfs_doratelookup)
1388 		return;
1389 
1390 	/* Get rid of any previous state */
1391 	bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1392 
1393 	ATH_NODE_LOCK(ATH_NODE(bf->bf_node));
1394 	ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream,
1395 	    pktlen, tid, is_aggr, &rix, &try0, &rate, &maxdur, &maxpktlen);
1396 
1397 	/* In case MRR is disabled, make sure rc[0] is setup correctly */
1398 	bf->bf_state.bfs_rc[0].rix = rix;
1399 	bf->bf_state.bfs_rc[0].ratecode = rate;
1400 	bf->bf_state.bfs_rc[0].tries = try0;
1401 
1402 	if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY)
1403 		ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix,
1404 		    is_aggr, bf->bf_state.bfs_rc);
1405 	ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node));
1406 
1407 	sc->sc_txrix = rix;	/* for LED blinking */
1408 	sc->sc_lastdatarix = rix;	/* for fast frames */
1409 	bf->bf_state.bfs_try0 = try0;
1410 	bf->bf_state.bfs_txrate0 = rate;
1411 	bf->bf_state.bfs_rc_maxpktlen = maxpktlen;
1412 }
1413 
1414 /*
1415  * Update the CLRDMASK bit in the ath_buf if it needs to be set.
1416  */
1417 static void
1418 ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid,
1419     struct ath_buf *bf)
1420 {
1421 	struct ath_node *an = ATH_NODE(bf->bf_node);
1422 
1423 	ATH_TX_LOCK_ASSERT(sc);
1424 
1425 	if (an->clrdmask == 1) {
1426 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1427 		an->clrdmask = 0;
1428 	}
1429 }
1430 
1431 /*
1432  * Return whether this frame should be software queued or
1433  * direct dispatched.
1434  *
1435  * When doing powersave, BAR frames should be queued but other management
1436  * frames should be directly sent.
1437  *
1438  * When not doing powersave, stick BAR frames into the hardware queue
1439  * so it goes out even though the queue is paused.
1440  *
1441  * For now, management frames are also software queued by default.
1442  */
1443 static int
1444 ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an,
1445     struct mbuf *m0, int *queue_to_head)
1446 {
1447 	struct ieee80211_node *ni = &an->an_node;
1448 	struct ieee80211_frame *wh;
1449 	uint8_t type, subtype;
1450 
1451 	wh = mtod(m0, struct ieee80211_frame *);
1452 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1453 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1454 
1455 	(*queue_to_head) = 0;
1456 
1457 	/* If it's not in powersave - direct-dispatch BAR */
1458 	if ((ATH_NODE(ni)->an_is_powersave == 0)
1459 	    && type == IEEE80211_FC0_TYPE_CTL &&
1460 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1461 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1462 		    "%s: BAR: TX'ing direct\n", __func__);
1463 		return (0);
1464 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
1465 	    && type == IEEE80211_FC0_TYPE_CTL &&
1466 	    subtype == IEEE80211_FC0_SUBTYPE_BAR) {
1467 		/* BAR TX whilst asleep; queue */
1468 		DPRINTF(sc, ATH_DEBUG_SW_TX,
1469 		    "%s: swq: TX'ing\n", __func__);
1470 		(*queue_to_head) = 1;
1471 		return (1);
1472 	} else if ((ATH_NODE(ni)->an_is_powersave == 1)
1473 	    && (type == IEEE80211_FC0_TYPE_MGT ||
1474 	        type == IEEE80211_FC0_TYPE_CTL)) {
1475 		/*
1476 		 * Other control/mgmt frame; bypass software queuing
1477 		 * for now!
1478 		 */
1479 		DPRINTF(sc, ATH_DEBUG_XMIT,
1480 		    "%s: %6D: Node is asleep; sending mgmt "
1481 		    "(type=%d, subtype=%d)\n",
1482 		    __func__, ni->ni_macaddr, ":", type, subtype);
1483 		return (0);
1484 	} else {
1485 		return (1);
1486 	}
1487 }
1488 
1489 /*
1490  * Transmit the given frame to the hardware.
1491  *
1492  * The frame must already be setup; rate control must already have
1493  * been done.
1494  *
1495  * XXX since the TXQ lock is being held here (and I dislike holding
1496  * it for this long when not doing software aggregation), later on
1497  * break this function into "setup_normal" and "xmit_normal". The
1498  * lock only needs to be held for the ath_tx_handoff call.
1499  *
1500  * XXX we don't update the leak count here - if we're doing
1501  * direct frame dispatch, we need to be able to do it without
1502  * decrementing the leak count (eg multicast queue frames.)
1503  */
1504 static void
1505 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq,
1506     struct ath_buf *bf)
1507 {
1508 	struct ath_node *an = ATH_NODE(bf->bf_node);
1509 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
1510 
1511 	ATH_TX_LOCK_ASSERT(sc);
1512 
1513 	/*
1514 	 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does
1515 	 * set a completion handler however it doesn't (yet) properly
1516 	 * handle the strict ordering requirements needed for normal,
1517 	 * non-aggregate session frames.
1518 	 *
1519 	 * Once this is implemented, only set CLRDMASK like this for
1520 	 * frames that must go out - eg management/raw frames.
1521 	 */
1522 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
1523 
1524 	/* Setup the descriptor before handoff */
1525 	ath_tx_do_ratelookup(sc, bf, tid->tid, bf->bf_state.bfs_pktlen, false);
1526 	ath_tx_calc_duration(sc, bf);
1527 	ath_tx_calc_protection(sc, bf);
1528 	ath_tx_set_rtscts(sc, bf);
1529 	ath_tx_rate_fill_rcflags(sc, bf);
1530 	ath_tx_setds(sc, bf);
1531 
1532 	/* Track per-TID hardware queue depth correctly */
1533 	tid->hwq_depth++;
1534 
1535 	/* Assign the completion handler */
1536 	bf->bf_comp = ath_tx_normal_comp;
1537 
1538 	/* Hand off to hardware */
1539 	ath_tx_handoff(sc, txq, bf);
1540 }
1541 
1542 /*
1543  * Do the basic frame setup stuff that's required before the frame
1544  * is added to a software queue.
1545  *
1546  * All frames get mostly the same treatment and it's done once.
1547  * Retransmits fiddle with things like the rate control setup,
1548  * setting the retransmit bit in the packet; doing relevant DMA/bus
1549  * syncing and relinking it (back) into the hardware TX queue.
1550  *
1551  * Note that this may cause the mbuf to be reallocated, so
1552  * m0 may not be valid.
1553  */
1554 static int
1555 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni,
1556     struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq)
1557 {
1558 	struct ieee80211vap *vap = ni->ni_vap;
1559 	struct ieee80211com *ic = &sc->sc_ic;
1560 	int error, iswep, ismcast, isfrag, ismrr;
1561 	int keyix, hdrlen, pktlen, try0 = 0;
1562 	u_int8_t rix = 0, txrate = 0;
1563 	struct ath_desc *ds;
1564 	struct ieee80211_frame *wh;
1565 	u_int subtype, flags;
1566 	HAL_PKT_TYPE atype;
1567 	const HAL_RATE_TABLE *rt;
1568 	HAL_BOOL shortPreamble;
1569 	struct ath_node *an;
1570 
1571 	/* XXX TODO: this pri is only used for non-QoS check, right? */
1572 	u_int pri;
1573 
1574 	/*
1575 	 * To ensure that both sequence numbers and the CCMP PN handling
1576 	 * is "correct", make sure that the relevant TID queue is locked.
1577 	 * Otherwise the CCMP PN and seqno may appear out of order, causing
1578 	 * re-ordered frames to have out of order CCMP PN's, resulting
1579 	 * in many, many frame drops.
1580 	 */
1581 	ATH_TX_LOCK_ASSERT(sc);
1582 
1583 	wh = mtod(m0, struct ieee80211_frame *);
1584 	iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED;
1585 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1586 	isfrag = m0->m_flags & M_FRAG;
1587 	hdrlen = ieee80211_anyhdrsize(wh);
1588 	/*
1589 	 * Packet length must not include any
1590 	 * pad bytes; deduct them here.
1591 	 */
1592 	pktlen = m0->m_pkthdr.len - (hdrlen & 3);
1593 
1594 	/* Handle encryption twiddling if needed */
1595 	if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen,
1596 	    &pktlen, &keyix)) {
1597 		ieee80211_free_mbuf(m0);
1598 		return EIO;
1599 	}
1600 
1601 	/* packet header may have moved, reset our local pointer */
1602 	wh = mtod(m0, struct ieee80211_frame *);
1603 
1604 	pktlen += IEEE80211_CRC_LEN;
1605 
1606 	/*
1607 	 * Load the DMA map so any coalescing is done.  This
1608 	 * also calculates the number of descriptors we need.
1609 	 */
1610 	error = ath_tx_dmasetup(sc, bf, m0);
1611 	if (error != 0)
1612 		return error;
1613 	KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
1614 	bf->bf_node = ni;			/* NB: held reference */
1615 	m0 = bf->bf_m;				/* NB: may have changed */
1616 	wh = mtod(m0, struct ieee80211_frame *);
1617 
1618 	/* setup descriptors */
1619 	ds = bf->bf_desc;
1620 	rt = sc->sc_currates;
1621 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
1622 
1623 	/*
1624 	 * NB: the 802.11 layer marks whether or not we should
1625 	 * use short preamble based on the current mode and
1626 	 * negotiated parameters.
1627 	 */
1628 	if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) &&
1629 	    (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) {
1630 		shortPreamble = AH_TRUE;
1631 		sc->sc_stats.ast_tx_shortpre++;
1632 	} else {
1633 		shortPreamble = AH_FALSE;
1634 	}
1635 
1636 	an = ATH_NODE(ni);
1637 	//flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
1638 	flags = 0;
1639 	ismrr = 0;				/* default no multi-rate retry*/
1640 
1641 	pri = ath_tx_getac(sc, m0);			/* honor classification */
1642 	/* XXX use txparams instead of fixed values */
1643 	/*
1644 	 * Calculate Atheros packet type from IEEE80211 packet header,
1645 	 * setup for rate calculations, and select h/w transmit queue.
1646 	 */
1647 	switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) {
1648 	case IEEE80211_FC0_TYPE_MGT:
1649 		subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1650 		if (subtype == IEEE80211_FC0_SUBTYPE_BEACON)
1651 			atype = HAL_PKT_TYPE_BEACON;
1652 		else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP)
1653 			atype = HAL_PKT_TYPE_PROBE_RESP;
1654 		else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM)
1655 			atype = HAL_PKT_TYPE_ATIM;
1656 		else
1657 			atype = HAL_PKT_TYPE_NORMAL;	/* XXX */
1658 		rix = an->an_mgmtrix;
1659 		txrate = rt->info[rix].rateCode;
1660 		if (shortPreamble)
1661 			txrate |= rt->info[rix].shortPreamble;
1662 		try0 = ATH_TXMGTTRY;
1663 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1664 		break;
1665 	case IEEE80211_FC0_TYPE_CTL:
1666 		atype = HAL_PKT_TYPE_PSPOLL;	/* stop setting of duration */
1667 		rix = an->an_mgmtrix;
1668 		txrate = rt->info[rix].rateCode;
1669 		if (shortPreamble)
1670 			txrate |= rt->info[rix].shortPreamble;
1671 		try0 = ATH_TXMGTTRY;
1672 		flags |= HAL_TXDESC_INTREQ;	/* force interrupt */
1673 		break;
1674 	case IEEE80211_FC0_TYPE_DATA:
1675 		atype = HAL_PKT_TYPE_NORMAL;		/* default */
1676 		/*
1677 		 * Data frames: multicast frames go out at a fixed rate,
1678 		 * EAPOL frames use the mgmt frame rate; otherwise consult
1679 		 * the rate control module for the rate to use.
1680 		 */
1681 		if (ismcast) {
1682 			rix = an->an_mcastrix;
1683 			txrate = rt->info[rix].rateCode;
1684 			if (shortPreamble)
1685 				txrate |= rt->info[rix].shortPreamble;
1686 			try0 = 1;
1687 		} else if (m0->m_flags & M_EAPOL) {
1688 			/* XXX? maybe always use long preamble? */
1689 			rix = an->an_mgmtrix;
1690 			txrate = rt->info[rix].rateCode;
1691 			if (shortPreamble)
1692 				txrate |= rt->info[rix].shortPreamble;
1693 			try0 = ATH_TXMAXTRY;	/* XXX?too many? */
1694 		} else {
1695 			/*
1696 			 * Do rate lookup on each TX, rather than using
1697 			 * the hard-coded TX information decided here.
1698 			 */
1699 			ismrr = 1;
1700 			bf->bf_state.bfs_doratelookup = 1;
1701 		}
1702 
1703 		/*
1704 		 * Check whether to set NOACK for this WME category or not.
1705 		 */
1706 		if (ieee80211_wme_vap_ac_is_noack(vap, pri))
1707 			flags |= HAL_TXDESC_NOACK;
1708 		break;
1709 	default:
1710 		device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n",
1711 		    wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__);
1712 		/* XXX statistic */
1713 		/* XXX free tx dmamap */
1714 		ieee80211_free_mbuf(m0);
1715 		return EIO;
1716 	}
1717 
1718 	/*
1719 	 * There are two known scenarios where the frame AC doesn't match
1720 	 * what the destination TXQ is.
1721 	 *
1722 	 * + non-QoS frames (eg management?) that the net80211 stack has
1723 	 *   assigned a higher AC to, but since it's a non-QoS TID, it's
1724 	 *   being thrown into TID 16.  TID 16 gets the AC_BE queue.
1725 	 *   It's quite possible that management frames should just be
1726 	 *   direct dispatched to hardware rather than go via the software
1727 	 *   queue; that should be investigated in the future.  There are
1728 	 *   some specific scenarios where this doesn't make sense, mostly
1729 	 *   surrounding ADDBA request/response - hence why that is special
1730 	 *   cased.
1731 	 *
1732 	 * + Multicast frames going into the VAP mcast queue.  That shows up
1733 	 *   as "TXQ 11".
1734 	 *
1735 	 * This driver should eventually support separate TID and TXQ locking,
1736 	 * allowing for arbitrary AC frames to appear on arbitrary software
1737 	 * queues, being queued to the "correct" hardware queue when needed.
1738 	 */
1739 #if 0
1740 	if (txq != sc->sc_ac2q[pri]) {
1741 		DPRINTF(sc, ATH_DEBUG_XMIT,
1742 		    "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n",
1743 		    __func__,
1744 		    txq,
1745 		    txq->axq_qnum,
1746 		    pri,
1747 		    sc->sc_ac2q[pri],
1748 		    sc->sc_ac2q[pri]->axq_qnum);
1749 	}
1750 #endif
1751 
1752 	/*
1753 	 * Calculate miscellaneous flags.
1754 	 */
1755 	if (ismcast) {
1756 		flags |= HAL_TXDESC_NOACK;	/* no ack on broad/multicast */
1757 	} else if (pktlen > vap->iv_rtsthreshold &&
1758 	    (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) {
1759 		flags |= HAL_TXDESC_RTSENA;	/* RTS based on frame length */
1760 		sc->sc_stats.ast_tx_rts++;
1761 	}
1762 	if (flags & HAL_TXDESC_NOACK)		/* NB: avoid double counting */
1763 		sc->sc_stats.ast_tx_noack++;
1764 #ifdef IEEE80211_SUPPORT_TDMA
1765 	if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) {
1766 		DPRINTF(sc, ATH_DEBUG_TDMA,
1767 		    "%s: discard frame, ACK required w/ TDMA\n", __func__);
1768 		sc->sc_stats.ast_tdma_ack++;
1769 		/* XXX free tx dmamap */
1770 		ieee80211_free_mbuf(m0);
1771 		return EIO;
1772 	}
1773 #endif
1774 
1775 	/*
1776 	 * If it's a frame to do location reporting on,
1777 	 * communicate it to the HAL.
1778 	 */
1779 	if (ieee80211_get_toa_params(m0, NULL)) {
1780 		device_printf(sc->sc_dev,
1781 		    "%s: setting TX positioning bit\n", __func__);
1782 		flags |= HAL_TXDESC_POS;
1783 
1784 		/*
1785 		 * Note: The hardware reports timestamps for
1786 		 * each of the RX'ed packets as part of the packet
1787 		 * exchange.  So this means things like RTS/CTS
1788 		 * exchanges, as well as the final ACK.
1789 		 *
1790 		 * So, if you send a RTS-protected NULL data frame,
1791 		 * you'll get an RX report for the RTS response, then
1792 		 * an RX report for the NULL frame, and then the TX
1793 		 * completion at the end.
1794 		 *
1795 		 * NOTE: it doesn't work right for CCK frames;
1796 		 * there's no channel info data provided unless
1797 		 * it's OFDM or HT.  Will have to dig into it.
1798 		 */
1799 		flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
1800 		bf->bf_flags |= ATH_BUF_TOA_PROBE;
1801 	}
1802 
1803 #if 0
1804 	/*
1805 	 * Placeholder: if you want to transmit with the azimuth
1806 	 * timestamp in the end of the payload, here's where you
1807 	 * should set the TXDESC field.
1808 	 */
1809 	flags |= HAL_TXDESC_HWTS;
1810 #endif
1811 
1812 	/*
1813 	 * Determine if a tx interrupt should be generated for
1814 	 * this descriptor.  We take a tx interrupt to reap
1815 	 * descriptors when the h/w hits an EOL condition or
1816 	 * when the descriptor is specifically marked to generate
1817 	 * an interrupt.  We periodically mark descriptors in this
1818 	 * way to insure timely replenishing of the supply needed
1819 	 * for sending frames.  Defering interrupts reduces system
1820 	 * load and potentially allows more concurrent work to be
1821 	 * done but if done to aggressively can cause senders to
1822 	 * backup.
1823 	 *
1824 	 * NB: use >= to deal with sc_txintrperiod changing
1825 	 *     dynamically through sysctl.
1826 	 */
1827 	if (flags & HAL_TXDESC_INTREQ) {
1828 		txq->axq_intrcnt = 0;
1829 	} else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) {
1830 		flags |= HAL_TXDESC_INTREQ;
1831 		txq->axq_intrcnt = 0;
1832 	}
1833 
1834 	/* This point forward is actual TX bits */
1835 
1836 	/*
1837 	 * At this point we are committed to sending the frame
1838 	 * and we don't need to look at m_nextpkt; clear it in
1839 	 * case this frame is part of frag chain.
1840 	 */
1841 	m0->m_nextpkt = NULL;
1842 
1843 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
1844 		ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len,
1845 		    sc->sc_hwmap[rix].ieeerate, -1);
1846 
1847 	if (ieee80211_radiotap_active_vap(vap)) {
1848 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
1849 		if (iswep)
1850 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
1851 		if (isfrag)
1852 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
1853 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
1854 		sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni);
1855 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
1856 
1857 		ieee80211_radiotap_tx(vap, m0);
1858 	}
1859 
1860 	/* Blank the legacy rate array */
1861 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
1862 
1863 	/*
1864 	 * ath_buf_set_rate needs at least one rate/try to setup
1865 	 * the rate scenario.
1866 	 */
1867 	bf->bf_state.bfs_rc[0].rix = rix;
1868 	bf->bf_state.bfs_rc[0].tries = try0;
1869 	bf->bf_state.bfs_rc[0].ratecode = txrate;
1870 
1871 	/* Store the decided rate index values away */
1872 	bf->bf_state.bfs_pktlen = pktlen;
1873 	bf->bf_state.bfs_hdrlen = hdrlen;
1874 	bf->bf_state.bfs_atype = atype;
1875 	bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni);
1876 	bf->bf_state.bfs_txrate0 = txrate;
1877 	bf->bf_state.bfs_try0 = try0;
1878 	bf->bf_state.bfs_keyix = keyix;
1879 	bf->bf_state.bfs_txantenna = sc->sc_txantenna;
1880 	bf->bf_state.bfs_txflags = flags;
1881 	bf->bf_state.bfs_shpream = shortPreamble;
1882 
1883 	/* XXX this should be done in ath_tx_setrate() */
1884 	bf->bf_state.bfs_ctsrate0 = 0;	/* ie, no hard-coded ctsrate */
1885 	bf->bf_state.bfs_ctsrate = 0;	/* calculated later */
1886 	bf->bf_state.bfs_ctsduration = 0;
1887 	bf->bf_state.bfs_ismrr = ismrr;
1888 
1889 	return 0;
1890 }
1891 
1892 /*
1893  * Queue a frame to the hardware or software queue.
1894  *
1895  * This can be called by the net80211 code.
1896  *
1897  * XXX what about locking? Or, push the seqno assign into the
1898  * XXX aggregate scheduler so its serialised?
1899  *
1900  * XXX When sending management frames via ath_raw_xmit(),
1901  *     should CLRDMASK be set unconditionally?
1902  */
1903 int
1904 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni,
1905     struct ath_buf *bf, struct mbuf *m0)
1906 {
1907 	struct ieee80211vap *vap = ni->ni_vap;
1908 	struct ath_vap *avp = ATH_VAP(vap);
1909 	int r = 0;
1910 	u_int pri;
1911 	int tid;
1912 	struct ath_txq *txq;
1913 	int ismcast;
1914 	const struct ieee80211_frame *wh;
1915 	int is_ampdu, is_ampdu_tx, is_ampdu_pending;
1916 	ieee80211_seq seqno;
1917 	uint8_t type, subtype;
1918 	int queue_to_head;
1919 
1920 	ATH_TX_LOCK_ASSERT(sc);
1921 
1922 	/*
1923 	 * Determine the target hardware queue.
1924 	 *
1925 	 * For multicast frames, the txq gets overridden appropriately
1926 	 * depending upon the state of PS.  If powersave is enabled
1927 	 * then they get added to the cabq for later transmit.
1928 	 *
1929 	 * The "fun" issue here is that group addressed frames should
1930 	 * have the sequence number from a different pool, rather than
1931 	 * the per-TID pool.  That means that even QoS group addressed
1932 	 * frames will have a sequence number from that global value,
1933 	 * which means if we transmit different group addressed frames
1934 	 * at different traffic priorities, the sequence numbers will
1935 	 * all be out of whack.  So - chances are, the right thing
1936 	 * to do here is to always put group addressed frames into the BE
1937 	 * queue, and ignore the TID for queue selection.
1938 	 *
1939 	 * For any other frame, we do a TID/QoS lookup inside the frame
1940 	 * to see what the TID should be. If it's a non-QoS frame, the
1941 	 * AC and TID are overridden. The TID/TXQ code assumes the
1942 	 * TID is on a predictable hardware TXQ, so we don't support
1943 	 * having a node TID queued to multiple hardware TXQs.
1944 	 * This may change in the future but would require some locking
1945 	 * fudgery.
1946 	 */
1947 	pri = ath_tx_getac(sc, m0);
1948 	tid = ath_tx_gettid(sc, m0);
1949 
1950 	txq = sc->sc_ac2q[pri];
1951 	wh = mtod(m0, struct ieee80211_frame *);
1952 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
1953 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
1954 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
1955 
1956 	/*
1957 	 * Enforce how deep the multicast queue can grow.
1958 	 *
1959 	 * XXX duplicated in ath_raw_xmit().
1960 	 */
1961 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1962 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
1963 		    > sc->sc_txq_mcastq_maxdepth) {
1964 			sc->sc_stats.ast_tx_mcastq_overflow++;
1965 			m_freem(m0);
1966 			return (ENOBUFS);
1967 		}
1968 	}
1969 
1970 	/*
1971 	 * Enforce how deep the unicast queue can grow.
1972 	 *
1973 	 * If the node is in power save then we don't want
1974 	 * the software queue to grow too deep, or a node may
1975 	 * end up consuming all of the ath_buf entries.
1976 	 *
1977 	 * For now, only do this for DATA frames.
1978 	 *
1979 	 * We will want to cap how many management/control
1980 	 * frames get punted to the software queue so it doesn't
1981 	 * fill up.  But the correct solution isn't yet obvious.
1982 	 * In any case, this check should at least let frames pass
1983 	 * that we are direct-dispatching.
1984 	 *
1985 	 * XXX TODO: duplicate this to the raw xmit path!
1986 	 */
1987 	if (type == IEEE80211_FC0_TYPE_DATA &&
1988 	    ATH_NODE(ni)->an_is_powersave &&
1989 	    ATH_NODE(ni)->an_swq_depth >
1990 	     sc->sc_txq_node_psq_maxdepth) {
1991 		sc->sc_stats.ast_tx_node_psq_overflow++;
1992 		m_freem(m0);
1993 		return (ENOBUFS);
1994 	}
1995 
1996 	/* A-MPDU TX */
1997 	is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid);
1998 	is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid);
1999 	is_ampdu = is_ampdu_tx | is_ampdu_pending;
2000 
2001 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n",
2002 	    __func__, tid, pri, is_ampdu);
2003 
2004 	/* Set local packet state, used to queue packets to hardware */
2005 	bf->bf_state.bfs_tid = tid;
2006 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
2007 	bf->bf_state.bfs_pri = pri;
2008 
2009 #if 1
2010 	/*
2011 	 * When servicing one or more stations in power-save mode
2012 	 * (or) if there is some mcast data waiting on the mcast
2013 	 * queue (to prevent out of order delivery) multicast frames
2014 	 * must be bufferd until after the beacon.
2015 	 *
2016 	 * TODO: we should lock the mcastq before we check the length.
2017 	 */
2018 	if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) {
2019 		txq = &avp->av_mcastq;
2020 		/*
2021 		 * Mark the frame as eventually belonging on the CAB
2022 		 * queue, so the descriptor setup functions will
2023 		 * correctly initialise the descriptor 'qcuId' field.
2024 		 */
2025 		bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum;
2026 	}
2027 #endif
2028 
2029 	/* Do the generic frame setup */
2030 	/* XXX should just bzero the bf_state? */
2031 	bf->bf_state.bfs_dobaw = 0;
2032 
2033 	/* A-MPDU TX? Manually set sequence number */
2034 	/*
2035 	 * Don't do it whilst pending; the net80211 layer still
2036 	 * assigns them.
2037 	 *
2038 	 * Don't assign A-MPDU sequence numbers to group address
2039 	 * frames; they come from a different sequence number space.
2040 	 */
2041 	if (is_ampdu_tx && (! IEEE80211_IS_MULTICAST(wh->i_addr1))) {
2042 		/*
2043 		 * Always call; this function will
2044 		 * handle making sure that null data frames
2045 		 * and group-addressed frames don't get a sequence number
2046 		 * from the current TID and thus mess with the BAW.
2047 		 */
2048 		seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0);
2049 
2050 		/*
2051 		 * Don't add QoS NULL frames and group-addressed frames
2052 		 * to the BAW.
2053 		 */
2054 		if (IEEE80211_QOS_HAS_SEQ(wh) &&
2055 		    (! IEEE80211_IS_MULTICAST(wh->i_addr1)) &&
2056 		    (subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL)) {
2057 			bf->bf_state.bfs_dobaw = 1;
2058 		}
2059 	}
2060 
2061 	/*
2062 	 * If needed, the sequence number has been assigned.
2063 	 * Squirrel it away somewhere easy to get to.
2064 	 */
2065 	bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT;
2066 
2067 	/* Is ampdu pending? fetch the seqno and print it out */
2068 	if (is_ampdu_pending)
2069 		DPRINTF(sc, ATH_DEBUG_SW_TX,
2070 		    "%s: tid %d: ampdu pending, seqno %d\n",
2071 		    __func__, tid, M_SEQNO_GET(m0));
2072 
2073 	/* This also sets up the DMA map; crypto; frame parameters, etc */
2074 	r = ath_tx_normal_setup(sc, ni, bf, m0, txq);
2075 
2076 	if (r != 0)
2077 		goto done;
2078 
2079 	/* At this point m0 could have changed! */
2080 	m0 = bf->bf_m;
2081 
2082 #if 1
2083 	/*
2084 	 * If it's a multicast frame, do a direct-dispatch to the
2085 	 * destination hardware queue. Don't bother software
2086 	 * queuing it.
2087 	 */
2088 	/*
2089 	 * If it's a BAR frame, do a direct dispatch to the
2090 	 * destination hardware queue. Don't bother software
2091 	 * queuing it, as the TID will now be paused.
2092 	 * Sending a BAR frame can occur from the net80211 txa timer
2093 	 * (ie, retries) or from the ath txtask (completion call.)
2094 	 * It queues directly to hardware because the TID is paused
2095 	 * at this point (and won't be unpaused until the BAR has
2096 	 * either been TXed successfully or max retries has been
2097 	 * reached.)
2098 	 */
2099 	/*
2100 	 * Until things are better debugged - if this node is asleep
2101 	 * and we're sending it a non-BAR frame, direct dispatch it.
2102 	 * Why? Because we need to figure out what's actually being
2103 	 * sent - eg, during reassociation/reauthentication after
2104 	 * the node (last) disappeared whilst asleep, the driver should
2105 	 * have unpaused/unsleep'ed the node.  So until that is
2106 	 * sorted out, use this workaround.
2107 	 */
2108 	if (txq == &avp->av_mcastq) {
2109 		DPRINTF(sc, ATH_DEBUG_SW_TX,
2110 		    "%s: bf=%p: mcastq: TX'ing\n", __func__, bf);
2111 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2112 		ath_tx_xmit_normal(sc, txq, bf);
2113 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2114 	    &queue_to_head)) {
2115 		ath_tx_swq(sc, ni, txq, queue_to_head, bf);
2116 	} else {
2117 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2118 		ath_tx_xmit_normal(sc, txq, bf);
2119 	}
2120 #else
2121 	/*
2122 	 * For now, since there's no software queue,
2123 	 * direct-dispatch to the hardware.
2124 	 */
2125 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2126 	/*
2127 	 * Update the current leak count if
2128 	 * we're leaking frames; and set the
2129 	 * MORE flag as appropriate.
2130 	 */
2131 	ath_tx_leak_count_update(sc, tid, bf);
2132 	ath_tx_xmit_normal(sc, txq, bf);
2133 #endif
2134 done:
2135 	return 0;
2136 }
2137 
2138 static int
2139 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni,
2140 	struct ath_buf *bf, struct mbuf *m0,
2141 	const struct ieee80211_bpf_params *params)
2142 {
2143 	struct ieee80211com *ic = &sc->sc_ic;
2144 	struct ieee80211vap *vap = ni->ni_vap;
2145 	int error, ismcast, ismrr;
2146 	int keyix, hdrlen, pktlen, try0, txantenna;
2147 	u_int8_t rix, txrate;
2148 	struct ieee80211_frame *wh;
2149 	u_int flags;
2150 	HAL_PKT_TYPE atype;
2151 	const HAL_RATE_TABLE *rt;
2152 	struct ath_desc *ds;
2153 	u_int pri;
2154 	int o_tid = -1;
2155 	int do_override;
2156 	uint8_t type, subtype;
2157 	int queue_to_head;
2158 	struct ath_node *an = ATH_NODE(ni);
2159 
2160 	ATH_TX_LOCK_ASSERT(sc);
2161 
2162 	wh = mtod(m0, struct ieee80211_frame *);
2163 	ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1);
2164 	hdrlen = ieee80211_anyhdrsize(wh);
2165 	/*
2166 	 * Packet length must not include any
2167 	 * pad bytes; deduct them here.
2168 	 */
2169 	/* XXX honor IEEE80211_BPF_DATAPAD */
2170 	pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN;
2171 
2172 	type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK;
2173 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
2174 
2175 	ATH_KTR(sc, ATH_KTR_TX, 2,
2176 	     "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf);
2177 
2178 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n",
2179 	    __func__, ismcast);
2180 
2181 	pri = params->ibp_pri & 3;
2182 	/* Override pri if the frame isn't a QoS one */
2183 	if (! IEEE80211_QOS_HAS_SEQ(wh))
2184 		pri = ath_tx_getac(sc, m0);
2185 
2186 	/* XXX If it's an ADDBA, override the correct queue */
2187 	do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid);
2188 
2189 	/* Map ADDBA to the correct priority */
2190 	if (do_override) {
2191 #if 1
2192 		DPRINTF(sc, ATH_DEBUG_XMIT,
2193 		    "%s: overriding tid %d pri %d -> %d\n",
2194 		    __func__, o_tid, pri, TID_TO_WME_AC(o_tid));
2195 #endif
2196 		pri = TID_TO_WME_AC(o_tid);
2197 	}
2198 
2199 	/*
2200 	 * "pri" is the hardware queue to transmit on.
2201 	 *
2202 	 * Look at the description in ath_tx_start() to understand
2203 	 * what needs to be "fixed" here so we just use the TID
2204 	 * for QoS frames.
2205 	 */
2206 
2207 	/* Handle encryption twiddling if needed */
2208 	if (! ath_tx_tag_crypto(sc, ni,
2209 	    m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0,
2210 	    &hdrlen, &pktlen, &keyix)) {
2211 		ieee80211_free_mbuf(m0);
2212 		return EIO;
2213 	}
2214 	/* packet header may have moved, reset our local pointer */
2215 	wh = mtod(m0, struct ieee80211_frame *);
2216 
2217 	/* Do the generic frame setup */
2218 	/* XXX should just bzero the bf_state? */
2219 	bf->bf_state.bfs_dobaw = 0;
2220 
2221 	error = ath_tx_dmasetup(sc, bf, m0);
2222 	if (error != 0)
2223 		return error;
2224 	m0 = bf->bf_m;				/* NB: may have changed */
2225 	wh = mtod(m0, struct ieee80211_frame *);
2226 	KASSERT((ni != NULL), ("%s: ni=NULL!", __func__));
2227 	bf->bf_node = ni;			/* NB: held reference */
2228 
2229 	/* Always enable CLRDMASK for raw frames for now.. */
2230 	flags = HAL_TXDESC_CLRDMASK;		/* XXX needed for crypto errs */
2231 	flags |= HAL_TXDESC_INTREQ;		/* force interrupt */
2232 	if (params->ibp_flags & IEEE80211_BPF_RTS)
2233 		flags |= HAL_TXDESC_RTSENA;
2234 	else if (params->ibp_flags & IEEE80211_BPF_CTS) {
2235 		/* XXX assume 11g/11n protection? */
2236 		bf->bf_state.bfs_doprot = 1;
2237 		flags |= HAL_TXDESC_CTSENA;
2238 	}
2239 	/* XXX leave ismcast to injector? */
2240 	if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast)
2241 		flags |= HAL_TXDESC_NOACK;
2242 
2243 	rt = sc->sc_currates;
2244 	KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode));
2245 
2246 	/* Fetch first rate information */
2247 	rix = ath_tx_findrix(sc, params->ibp_rate0);
2248 	try0 = params->ibp_try0;
2249 
2250 	/*
2251 	 * Override EAPOL rate as appropriate.
2252 	 */
2253 	if (m0->m_flags & M_EAPOL) {
2254 		/* XXX? maybe always use long preamble? */
2255 		rix = an->an_mgmtrix;
2256 		try0 = ATH_TXMAXTRY;	/* XXX?too many? */
2257 	}
2258 
2259 	/*
2260 	 * If it's a frame to do location reporting on,
2261 	 * communicate it to the HAL.
2262 	 */
2263 	if (ieee80211_get_toa_params(m0, NULL)) {
2264 		device_printf(sc->sc_dev,
2265 		    "%s: setting TX positioning bit\n", __func__);
2266 		flags |= HAL_TXDESC_POS;
2267 		flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA);
2268 		bf->bf_flags |= ATH_BUF_TOA_PROBE;
2269 	}
2270 
2271 	txrate = rt->info[rix].rateCode;
2272 	if (params->ibp_flags & IEEE80211_BPF_SHORTPRE)
2273 		txrate |= rt->info[rix].shortPreamble;
2274 	sc->sc_txrix = rix;
2275 	ismrr = (params->ibp_try1 != 0);
2276 	txantenna = params->ibp_pri >> 2;
2277 	if (txantenna == 0)			/* XXX? */
2278 		txantenna = sc->sc_txantenna;
2279 
2280 	/*
2281 	 * Since ctsrate is fixed, store it away for later
2282 	 * use when the descriptor fields are being set.
2283 	 */
2284 	if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA))
2285 		bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate;
2286 
2287 	/*
2288 	 * NB: we mark all packets as type PSPOLL so the h/w won't
2289 	 * set the sequence number, duration, etc.
2290 	 */
2291 	atype = HAL_PKT_TYPE_PSPOLL;
2292 
2293 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
2294 		ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len,
2295 		    sc->sc_hwmap[rix].ieeerate, -1);
2296 
2297 	if (ieee80211_radiotap_active_vap(vap)) {
2298 		sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags;
2299 		if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED)
2300 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP;
2301 		if (m0->m_flags & M_FRAG)
2302 			sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG;
2303 		sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate;
2304 		sc->sc_tx_th.wt_txpower = MIN(params->ibp_power,
2305 		    ieee80211_get_node_txpower(ni));
2306 		sc->sc_tx_th.wt_antenna = sc->sc_txantenna;
2307 
2308 		ieee80211_radiotap_tx(vap, m0);
2309 	}
2310 
2311 	/*
2312 	 * Formulate first tx descriptor with tx controls.
2313 	 */
2314 	ds = bf->bf_desc;
2315 	/* XXX check return value? */
2316 
2317 	/* Store the decided rate index values away */
2318 	bf->bf_state.bfs_pktlen = pktlen;
2319 	bf->bf_state.bfs_hdrlen = hdrlen;
2320 	bf->bf_state.bfs_atype = atype;
2321 	bf->bf_state.bfs_txpower = MIN(params->ibp_power,
2322 	    ieee80211_get_node_txpower(ni));
2323 	bf->bf_state.bfs_txrate0 = txrate;
2324 	bf->bf_state.bfs_try0 = try0;
2325 	bf->bf_state.bfs_keyix = keyix;
2326 	bf->bf_state.bfs_txantenna = txantenna;
2327 	bf->bf_state.bfs_txflags = flags;
2328 	bf->bf_state.bfs_shpream =
2329 	    !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE);
2330 
2331 	/* Set local packet state, used to queue packets to hardware */
2332 	bf->bf_state.bfs_tid = WME_AC_TO_TID(pri);
2333 	bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum;
2334 	bf->bf_state.bfs_pri = pri;
2335 
2336 	/* XXX this should be done in ath_tx_setrate() */
2337 	bf->bf_state.bfs_ctsrate = 0;
2338 	bf->bf_state.bfs_ctsduration = 0;
2339 	bf->bf_state.bfs_ismrr = ismrr;
2340 
2341 	/* Blank the legacy rate array */
2342 	bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc));
2343 
2344 	bf->bf_state.bfs_rc[0].rix = rix;
2345 	bf->bf_state.bfs_rc[0].tries = try0;
2346 	bf->bf_state.bfs_rc[0].ratecode = txrate;
2347 
2348 	if (ismrr) {
2349 		int rix;
2350 
2351 		rix = ath_tx_findrix(sc, params->ibp_rate1);
2352 		bf->bf_state.bfs_rc[1].rix = rix;
2353 		bf->bf_state.bfs_rc[1].tries = params->ibp_try1;
2354 
2355 		rix = ath_tx_findrix(sc, params->ibp_rate2);
2356 		bf->bf_state.bfs_rc[2].rix = rix;
2357 		bf->bf_state.bfs_rc[2].tries = params->ibp_try2;
2358 
2359 		rix = ath_tx_findrix(sc, params->ibp_rate3);
2360 		bf->bf_state.bfs_rc[3].rix = rix;
2361 		bf->bf_state.bfs_rc[3].tries = params->ibp_try3;
2362 	}
2363 	/*
2364 	 * All the required rate control decisions have been made;
2365 	 * fill in the rc flags.
2366 	 */
2367 	ath_tx_rate_fill_rcflags(sc, bf);
2368 
2369 	/* NB: no buffered multicast in power save support */
2370 
2371 	/*
2372 	 * If we're overiding the ADDBA destination, dump directly
2373 	 * into the hardware queue, right after any pending
2374 	 * frames to that node are.
2375 	 */
2376 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n",
2377 	    __func__, do_override);
2378 
2379 #if 1
2380 	/*
2381 	 * Put addba frames in the right place in the right TID/HWQ.
2382 	 */
2383 	if (do_override) {
2384 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2385 		/*
2386 		 * XXX if it's addba frames, should we be leaking
2387 		 * them out via the frame leak method?
2388 		 * XXX for now let's not risk it; but we may wish
2389 		 * to investigate this later.
2390 		 */
2391 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2392 	} else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0,
2393 	    &queue_to_head)) {
2394 		/* Queue to software queue */
2395 		ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf);
2396 	} else {
2397 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2398 		ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2399 	}
2400 #else
2401 	/* Direct-dispatch to the hardware */
2402 	bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
2403 	/*
2404 	 * Update the current leak count if
2405 	 * we're leaking frames; and set the
2406 	 * MORE flag as appropriate.
2407 	 */
2408 	ath_tx_leak_count_update(sc, tid, bf);
2409 	ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf);
2410 #endif
2411 	return 0;
2412 }
2413 
2414 /*
2415  * Send a raw frame.
2416  *
2417  * This can be called by net80211.
2418  */
2419 int
2420 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m,
2421 	const struct ieee80211_bpf_params *params)
2422 {
2423 	struct ieee80211com *ic = ni->ni_ic;
2424 	struct ath_softc *sc = ic->ic_softc;
2425 	struct ath_buf *bf;
2426 	struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *);
2427 	int error = 0;
2428 
2429 	ATH_PCU_LOCK(sc);
2430 	if (sc->sc_inreset_cnt > 0) {
2431 		DPRINTF(sc, ATH_DEBUG_XMIT,
2432 		    "%s: sc_inreset_cnt > 0; bailing\n", __func__);
2433 		error = EIO;
2434 		ATH_PCU_UNLOCK(sc);
2435 		goto badbad;
2436 	}
2437 	sc->sc_txstart_cnt++;
2438 	ATH_PCU_UNLOCK(sc);
2439 
2440 	/* Wake the hardware up already */
2441 	ATH_LOCK(sc);
2442 	ath_power_set_power_state(sc, HAL_PM_AWAKE);
2443 	ATH_UNLOCK(sc);
2444 
2445 	ATH_TX_LOCK(sc);
2446 
2447 	if (!sc->sc_running || sc->sc_invalid) {
2448 		DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d",
2449 		    __func__, sc->sc_running, sc->sc_invalid);
2450 		m_freem(m);
2451 		error = ENETDOWN;
2452 		goto bad;
2453 	}
2454 
2455 	/*
2456 	 * Enforce how deep the multicast queue can grow.
2457 	 *
2458 	 * XXX duplicated in ath_tx_start().
2459 	 */
2460 	if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2461 		if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth
2462 		    > sc->sc_txq_mcastq_maxdepth) {
2463 			sc->sc_stats.ast_tx_mcastq_overflow++;
2464 			error = ENOBUFS;
2465 		}
2466 
2467 		if (error != 0) {
2468 			m_freem(m);
2469 			goto bad;
2470 		}
2471 	}
2472 
2473 	/*
2474 	 * Grab a TX buffer and associated resources.
2475 	 */
2476 	bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT);
2477 	if (bf == NULL) {
2478 		sc->sc_stats.ast_tx_nobuf++;
2479 		m_freem(m);
2480 		error = ENOBUFS;
2481 		goto bad;
2482 	}
2483 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n",
2484 	    m, params,  bf);
2485 
2486 	if (params == NULL) {
2487 		/*
2488 		 * Legacy path; interpret frame contents to decide
2489 		 * precisely how to send the frame.
2490 		 */
2491 		if (ath_tx_start(sc, ni, bf, m)) {
2492 			error = EIO;		/* XXX */
2493 			goto bad2;
2494 		}
2495 	} else {
2496 		/*
2497 		 * Caller supplied explicit parameters to use in
2498 		 * sending the frame.
2499 		 */
2500 		if (ath_tx_raw_start(sc, ni, bf, m, params)) {
2501 			error = EIO;		/* XXX */
2502 			goto bad2;
2503 		}
2504 	}
2505 	sc->sc_wd_timer = 5;
2506 	sc->sc_stats.ast_tx_raw++;
2507 
2508 	/*
2509 	 * Update the TIM - if there's anything queued to the
2510 	 * software queue and power save is enabled, we should
2511 	 * set the TIM.
2512 	 */
2513 	ath_tx_update_tim(sc, ni, 1);
2514 
2515 	ATH_TX_UNLOCK(sc);
2516 
2517 	ATH_PCU_LOCK(sc);
2518 	sc->sc_txstart_cnt--;
2519 	ATH_PCU_UNLOCK(sc);
2520 
2521 	/* Put the hardware back to sleep if required */
2522 	ATH_LOCK(sc);
2523 	ath_power_restore_power_state(sc);
2524 	ATH_UNLOCK(sc);
2525 
2526 	return 0;
2527 
2528 bad2:
2529 	ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, "
2530 	    "bf=%p",
2531 	    m,
2532 	    params,
2533 	    bf);
2534 	ATH_TXBUF_LOCK(sc);
2535 	ath_returnbuf_head(sc, bf);
2536 	ATH_TXBUF_UNLOCK(sc);
2537 
2538 bad:
2539 	ATH_TX_UNLOCK(sc);
2540 
2541 	ATH_PCU_LOCK(sc);
2542 	sc->sc_txstart_cnt--;
2543 	ATH_PCU_UNLOCK(sc);
2544 
2545 	/* Put the hardware back to sleep if required */
2546 	ATH_LOCK(sc);
2547 	ath_power_restore_power_state(sc);
2548 	ATH_UNLOCK(sc);
2549 
2550 badbad:
2551 	ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p",
2552 	    m, params);
2553 	sc->sc_stats.ast_tx_raw_fail++;
2554 
2555 	return error;
2556 }
2557 
2558 /* Some helper functions */
2559 
2560 /*
2561  * ADDBA (and potentially others) need to be placed in the same
2562  * hardware queue as the TID/node it's relating to. This is so
2563  * it goes out after any pending non-aggregate frames to the
2564  * same node/TID.
2565  *
2566  * If this isn't done, the ADDBA can go out before the frames
2567  * queued in hardware. Even though these frames have a sequence
2568  * number -earlier- than the ADDBA can be transmitted (but
2569  * no frames whose sequence numbers are after the ADDBA should
2570  * be!) they'll arrive after the ADDBA - and the receiving end
2571  * will simply drop them as being out of the BAW.
2572  *
2573  * The frames can't be appended to the TID software queue - it'll
2574  * never be sent out. So these frames have to be directly
2575  * dispatched to the hardware, rather than queued in software.
2576  * So if this function returns true, the TXQ has to be
2577  * overridden and it has to be directly dispatched.
2578  *
2579  * It's a dirty hack, but someone's gotta do it.
2580  */
2581 
2582 /*
2583  * XXX doesn't belong here!
2584  */
2585 static int
2586 ieee80211_is_action(struct ieee80211_frame *wh)
2587 {
2588 	/* Type: Management frame? */
2589 	if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) !=
2590 	    IEEE80211_FC0_TYPE_MGT)
2591 		return 0;
2592 
2593 	/* Subtype: Action frame? */
2594 	if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) !=
2595 	    IEEE80211_FC0_SUBTYPE_ACTION)
2596 		return 0;
2597 
2598 	return 1;
2599 }
2600 
2601 #define	MS(_v, _f)	(((_v) & _f) >> _f##_S)
2602 /*
2603  * Return an alternate TID for ADDBA request frames.
2604  *
2605  * Yes, this likely should be done in the net80211 layer.
2606  */
2607 static int
2608 ath_tx_action_frame_override_queue(struct ath_softc *sc,
2609     struct ieee80211_node *ni,
2610     struct mbuf *m0, int *tid)
2611 {
2612 	struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *);
2613 	struct ieee80211_action_ba_addbarequest *ia;
2614 	uint8_t *frm;
2615 	uint16_t baparamset;
2616 
2617 	/* Not action frame? Bail */
2618 	if (! ieee80211_is_action(wh))
2619 		return 0;
2620 
2621 	/* XXX Not needed for frames we send? */
2622 #if 0
2623 	/* Correct length? */
2624 	if (! ieee80211_parse_action(ni, m))
2625 		return 0;
2626 #endif
2627 
2628 	/* Extract out action frame */
2629 	frm = (u_int8_t *)&wh[1];
2630 	ia = (struct ieee80211_action_ba_addbarequest *) frm;
2631 
2632 	/* Not ADDBA? Bail */
2633 	if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA)
2634 		return 0;
2635 	if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST)
2636 		return 0;
2637 
2638 	/* Extract TID, return it */
2639 	baparamset = le16toh(ia->rq_baparamset);
2640 	*tid = (int) MS(baparamset, IEEE80211_BAPS_TID);
2641 
2642 	return 1;
2643 }
2644 #undef	MS
2645 
2646 /* Per-node software queue operations */
2647 
2648 /*
2649  * Add the current packet to the given BAW.
2650  * It is assumed that the current packet
2651  *
2652  * + fits inside the BAW;
2653  * + already has had a sequence number allocated.
2654  *
2655  * Since the BAW status may be modified by both the ath task and
2656  * the net80211/ifnet contexts, the TID must be locked.
2657  */
2658 void
2659 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an,
2660     struct ath_tid *tid, struct ath_buf *bf)
2661 {
2662 	int index, cindex;
2663 	struct ieee80211_tx_ampdu *tap;
2664 
2665 	ATH_TX_LOCK_ASSERT(sc);
2666 
2667 	if (bf->bf_state.bfs_isretried)
2668 		return;
2669 
2670 	tap = ath_tx_get_tx_tid(an, tid->tid);
2671 
2672 	if (! bf->bf_state.bfs_dobaw) {
2673 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2674 		    "%s: dobaw=0, seqno=%d, window %d:%d\n",
2675 		    __func__, SEQNO(bf->bf_state.bfs_seqno),
2676 		    tap->txa_start, tap->txa_wnd);
2677 	}
2678 
2679 	if (bf->bf_state.bfs_addedbaw)
2680 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2681 		    "%s: re-added? tid=%d, seqno %d; window %d:%d; "
2682 		    "baw head=%d tail=%d\n",
2683 		    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2684 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2685 		    tid->baw_tail);
2686 
2687 	/*
2688 	 * Verify that the given sequence number is not outside of the
2689 	 * BAW.  Complain loudly if that's the case.
2690 	 */
2691 	if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
2692 	    SEQNO(bf->bf_state.bfs_seqno))) {
2693 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2694 		    "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; "
2695 		    "baw head=%d tail=%d\n",
2696 		    __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2697 		    tap->txa_start, tap->txa_wnd, tid->baw_head,
2698 		    tid->baw_tail);
2699 	}
2700 
2701 	/*
2702 	 * ni->ni_txseqs[] is the currently allocated seqno.
2703 	 * the txa state contains the current baw start.
2704 	 */
2705 	index  = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno));
2706 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2707 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2708 	    "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d "
2709 	    "baw head=%d tail=%d\n",
2710 	    __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno),
2711 	    tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head,
2712 	    tid->baw_tail);
2713 
2714 #if 0
2715 	assert(tid->tx_buf[cindex] == NULL);
2716 #endif
2717 	if (tid->tx_buf[cindex] != NULL) {
2718 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2719 		    "%s: ba packet dup (index=%d, cindex=%d, "
2720 		    "head=%d, tail=%d)\n",
2721 		    __func__, index, cindex, tid->baw_head, tid->baw_tail);
2722 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2723 		    "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n",
2724 		    __func__,
2725 		    tid->tx_buf[cindex],
2726 		    SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno),
2727 		    bf,
2728 		    SEQNO(bf->bf_state.bfs_seqno)
2729 		);
2730 	}
2731 	tid->tx_buf[cindex] = bf;
2732 
2733 	if (index >= ((tid->baw_tail - tid->baw_head) &
2734 	    (ATH_TID_MAX_BUFS - 1))) {
2735 		tid->baw_tail = cindex;
2736 		INCR(tid->baw_tail, ATH_TID_MAX_BUFS);
2737 	}
2738 }
2739 
2740 /*
2741  * Flip the BAW buffer entry over from the existing one to the new one.
2742  *
2743  * When software retransmitting a (sub-)frame, it is entirely possible that
2744  * the frame ath_buf is marked as BUSY and can't be immediately reused.
2745  * In that instance the buffer is cloned and the new buffer is used for
2746  * retransmit. We thus need to update the ath_buf slot in the BAW buf
2747  * tracking array to maintain consistency.
2748  */
2749 static void
2750 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an,
2751     struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf)
2752 {
2753 	int index, cindex;
2754 	struct ieee80211_tx_ampdu *tap;
2755 	int seqno = SEQNO(old_bf->bf_state.bfs_seqno);
2756 
2757 	ATH_TX_LOCK_ASSERT(sc);
2758 
2759 	tap = ath_tx_get_tx_tid(an, tid->tid);
2760 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2761 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2762 
2763 	/*
2764 	 * Just warn for now; if it happens then we should find out
2765 	 * about it. It's highly likely the aggregation session will
2766 	 * soon hang.
2767 	 */
2768 	if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) {
2769 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2770 		    "%s: retransmitted buffer"
2771 		    " has mismatching seqno's, BA session may hang.\n",
2772 		    __func__);
2773 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2774 		    "%s: old seqno=%d, new_seqno=%d\n", __func__,
2775 		    old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno);
2776 	}
2777 
2778 	if (tid->tx_buf[cindex] != old_bf) {
2779 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2780 		    "%s: ath_buf pointer incorrect; "
2781 		    " has m BA session may hang.\n", __func__);
2782 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2783 		    "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf);
2784 	}
2785 
2786 	tid->tx_buf[cindex] = new_bf;
2787 }
2788 
2789 /*
2790  * seq_start - left edge of BAW
2791  * seq_next - current/next sequence number to allocate
2792  *
2793  * Since the BAW status may be modified by both the ath task and
2794  * the net80211/ifnet contexts, the TID must be locked.
2795  */
2796 static void
2797 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an,
2798     struct ath_tid *tid, const struct ath_buf *bf)
2799 {
2800 	int index, cindex;
2801 	struct ieee80211_tx_ampdu *tap;
2802 	int seqno = SEQNO(bf->bf_state.bfs_seqno);
2803 
2804 	ATH_TX_LOCK_ASSERT(sc);
2805 
2806 	tap = ath_tx_get_tx_tid(an, tid->tid);
2807 	index  = ATH_BA_INDEX(tap->txa_start, seqno);
2808 	cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1);
2809 
2810 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2811 	    "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, "
2812 	    "baw head=%d, tail=%d\n",
2813 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index,
2814 	    cindex, tid->baw_head, tid->baw_tail);
2815 
2816 	/*
2817 	 * If this occurs then we have a big problem - something else
2818 	 * has slid tap->txa_start along without updating the BAW
2819 	 * tracking start/end pointers. Thus the TX BAW state is now
2820 	 * completely busted.
2821 	 *
2822 	 * But for now, since I haven't yet fixed TDMA and buffer cloning,
2823 	 * it's quite possible that a cloned buffer is making its way
2824 	 * here and causing it to fire off. Disable TDMA for now.
2825 	 */
2826 	if (tid->tx_buf[cindex] != bf) {
2827 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2828 		    "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n",
2829 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
2830 		    tid->tx_buf[cindex],
2831 		    (tid->tx_buf[cindex] != NULL) ?
2832 		      SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1);
2833 	}
2834 
2835 	tid->tx_buf[cindex] = NULL;
2836 
2837 	while (tid->baw_head != tid->baw_tail &&
2838 	    !tid->tx_buf[tid->baw_head]) {
2839 		INCR(tap->txa_start, IEEE80211_SEQ_RANGE);
2840 		INCR(tid->baw_head, ATH_TID_MAX_BUFS);
2841 	}
2842 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
2843 	    "%s: tid=%d: baw is now %d:%d, baw head=%d\n",
2844 	    __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head);
2845 }
2846 
2847 static void
2848 ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid,
2849     struct ath_buf *bf)
2850 {
2851 	struct ieee80211_frame *wh;
2852 
2853 	ATH_TX_LOCK_ASSERT(sc);
2854 
2855 	if (tid->an->an_leak_count > 0) {
2856 		wh = mtod(bf->bf_m, struct ieee80211_frame *);
2857 
2858 		/*
2859 		 * Update MORE based on the software/net80211 queue states.
2860 		 */
2861 		if ((tid->an->an_stack_psq > 0)
2862 		    || (tid->an->an_swq_depth > 0))
2863 			wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA;
2864 		else
2865 			wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA;
2866 
2867 		DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE,
2868 		    "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n",
2869 		    __func__,
2870 		    tid->an->an_node.ni_macaddr,
2871 		    ":",
2872 		    tid->an->an_leak_count,
2873 		    tid->an->an_stack_psq,
2874 		    tid->an->an_swq_depth,
2875 		    !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA));
2876 
2877 		/*
2878 		 * Re-sync the underlying buffer.
2879 		 */
2880 		bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap,
2881 		    BUS_DMASYNC_PREWRITE);
2882 
2883 		tid->an->an_leak_count --;
2884 	}
2885 }
2886 
2887 static int
2888 ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid)
2889 {
2890 
2891 	ATH_TX_LOCK_ASSERT(sc);
2892 
2893 	if (tid->an->an_leak_count > 0) {
2894 		return (1);
2895 	}
2896 	if (tid->paused)
2897 		return (0);
2898 	return (1);
2899 }
2900 
2901 /*
2902  * Mark the current node/TID as ready to TX.
2903  *
2904  * This is done to make it easy for the software scheduler to
2905  * find which nodes have data to send.
2906  *
2907  * The TXQ lock must be held.
2908  */
2909 void
2910 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid)
2911 {
2912 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2913 
2914 	ATH_TX_LOCK_ASSERT(sc);
2915 
2916 	/*
2917 	 * If we are leaking out a frame to this destination
2918 	 * for PS-POLL, ensure that we allow scheduling to
2919 	 * occur.
2920 	 */
2921 	if (! ath_tx_tid_can_tx_or_sched(sc, tid))
2922 		return;		/* paused, can't schedule yet */
2923 
2924 	if (tid->sched)
2925 		return;		/* already scheduled */
2926 
2927 	tid->sched = 1;
2928 
2929 #if 0
2930 	/*
2931 	 * If this is a sleeping node we're leaking to, given
2932 	 * it a higher priority.  This is so bad for QoS it hurts.
2933 	 */
2934 	if (tid->an->an_leak_count) {
2935 		TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem);
2936 	} else {
2937 		TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2938 	}
2939 #endif
2940 
2941 	/*
2942 	 * We can't do the above - it'll confuse the TXQ software
2943 	 * scheduler which will keep checking the _head_ TID
2944 	 * in the list to see if it has traffic.  If we queue
2945 	 * a TID to the head of the list and it doesn't transmit,
2946 	 * we'll check it again.
2947 	 *
2948 	 * So, get the rest of this leaking frames support working
2949 	 * and reliable first and _then_ optimise it so they're
2950 	 * pushed out in front of any other pending software
2951 	 * queued nodes.
2952 	 */
2953 	TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem);
2954 }
2955 
2956 /*
2957  * Mark the current node as no longer needing to be polled for
2958  * TX packets.
2959  *
2960  * The TXQ lock must be held.
2961  */
2962 static void
2963 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid)
2964 {
2965 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
2966 
2967 	ATH_TX_LOCK_ASSERT(sc);
2968 
2969 	if (tid->sched == 0)
2970 		return;
2971 
2972 	tid->sched = 0;
2973 	TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem);
2974 }
2975 
2976 /*
2977  * Assign a sequence number manually to the given frame.
2978  *
2979  * This should only be called for A-MPDU TX frames.
2980  *
2981  * Note: for group addressed frames, the sequence number
2982  * should be from NONQOS_TID, and net80211 should have
2983  * already assigned it for us.
2984  */
2985 static ieee80211_seq
2986 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni,
2987     struct ath_buf *bf, struct mbuf *m0)
2988 {
2989 	struct ieee80211_frame *wh;
2990 	int tid;
2991 	ieee80211_seq seqno;
2992 	uint8_t subtype;
2993 
2994 	wh = mtod(m0, struct ieee80211_frame *);
2995 	tid = ieee80211_gettid(wh);
2996 
2997 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, qos has seq=%d\n",
2998 	    __func__, tid, IEEE80211_QOS_HAS_SEQ(wh));
2999 
3000 	/* XXX Is it a control frame? Ignore */
3001 
3002 	/* Does the packet require a sequence number? */
3003 	if (! IEEE80211_QOS_HAS_SEQ(wh))
3004 		return -1;
3005 
3006 	ATH_TX_LOCK_ASSERT(sc);
3007 
3008 	/*
3009 	 * Is it a QOS NULL Data frame? Give it a sequence number from
3010 	 * the default TID (IEEE80211_NONQOS_TID.)
3011 	 *
3012 	 * The RX path of everything I've looked at doesn't include the NULL
3013 	 * data frame sequence number in the aggregation state updates, so
3014 	 * assigning it a sequence number there will cause a BAW hole on the
3015 	 * RX side.
3016 	 */
3017 	subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
3018 	if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) {
3019 		/* XXX no locking for this TID? This is a bit of a problem. */
3020 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
3021 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
3022 	} else if (IEEE80211_IS_MULTICAST(wh->i_addr1)) {
3023 		/*
3024 		 * group addressed frames get a sequence number from
3025 		 * a different sequence number space.
3026 		 */
3027 		seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID];
3028 		INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE);
3029 	} else {
3030 		/* Manually assign sequence number */
3031 		seqno = ni->ni_txseqs[tid];
3032 		INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE);
3033 	}
3034 	*(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT);
3035 	M_SEQNO_SET(m0, seqno);
3036 
3037 	/* Return so caller can do something with it if needed */
3038 	DPRINTF(sc, ATH_DEBUG_SW_TX,
3039 	    "%s:  -> subtype=0x%x, tid=%d, seqno=%d\n",
3040 	    __func__, subtype, tid, seqno);
3041 	return seqno;
3042 }
3043 
3044 /*
3045  * Attempt to direct dispatch an aggregate frame to hardware.
3046  * If the frame is out of BAW, queue.
3047  * Otherwise, schedule it as a single frame.
3048  */
3049 static void
3050 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an,
3051     struct ath_txq *txq, struct ath_buf *bf)
3052 {
3053 	struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid];
3054 	struct ieee80211_tx_ampdu *tap;
3055 
3056 	ATH_TX_LOCK_ASSERT(sc);
3057 
3058 	tap = ath_tx_get_tx_tid(an, tid->tid);
3059 
3060 	/* paused? queue */
3061 	if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
3062 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3063 		/* XXX don't sched - we're paused! */
3064 		return;
3065 	}
3066 
3067 	/* outside baw? queue */
3068 	if (bf->bf_state.bfs_dobaw &&
3069 	    (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
3070 	    SEQNO(bf->bf_state.bfs_seqno)))) {
3071 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3072 		ath_tx_tid_sched(sc, tid);
3073 		return;
3074 	}
3075 
3076 	/*
3077 	 * This is a temporary check and should be removed once
3078 	 * all the relevant code paths have been fixed.
3079 	 *
3080 	 * During aggregate retries, it's possible that the head
3081 	 * frame will fail (which has the bfs_aggr and bfs_nframes
3082 	 * fields set for said aggregate) and will be retried as
3083 	 * a single frame.  In this instance, the values should
3084 	 * be reset or the completion code will get upset with you.
3085 	 */
3086 	if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) {
3087 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
3088 		    "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__,
3089 		    bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes);
3090 		bf->bf_state.bfs_aggr = 0;
3091 		bf->bf_state.bfs_nframes = 1;
3092 	}
3093 
3094 	/* Update CLRDMASK just before this frame is queued */
3095 	ath_tx_update_clrdmask(sc, tid, bf);
3096 
3097 	/* Direct dispatch to hardware */
3098 	ath_tx_do_ratelookup(sc, bf, tid->tid, bf->bf_state.bfs_pktlen,
3099 	    false);
3100 	ath_tx_calc_duration(sc, bf);
3101 	ath_tx_calc_protection(sc, bf);
3102 	ath_tx_set_rtscts(sc, bf);
3103 	ath_tx_rate_fill_rcflags(sc, bf);
3104 	ath_tx_setds(sc, bf);
3105 
3106 	/* Statistics */
3107 	sc->sc_aggr_stats.aggr_low_hwq_single_pkt++;
3108 
3109 	/* Track per-TID hardware queue depth correctly */
3110 	tid->hwq_depth++;
3111 
3112 	/* Add to BAW */
3113 	if (bf->bf_state.bfs_dobaw) {
3114 		ath_tx_addto_baw(sc, an, tid, bf);
3115 		bf->bf_state.bfs_addedbaw = 1;
3116 	}
3117 
3118 	/* Set completion handler, multi-frame aggregate or not */
3119 	bf->bf_comp = ath_tx_aggr_comp;
3120 
3121 	/*
3122 	 * Update the current leak count if
3123 	 * we're leaking frames; and set the
3124 	 * MORE flag as appropriate.
3125 	 */
3126 	ath_tx_leak_count_update(sc, tid, bf);
3127 
3128 	/* Hand off to hardware */
3129 	ath_tx_handoff(sc, txq, bf);
3130 }
3131 
3132 /*
3133  * Attempt to send the packet.
3134  * If the queue isn't busy, direct-dispatch.
3135  * If the queue is busy enough, queue the given packet on the
3136  *  relevant software queue.
3137  */
3138 void
3139 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni,
3140     struct ath_txq *txq, int queue_to_head, struct ath_buf *bf)
3141 {
3142 	struct ath_node *an = ATH_NODE(ni);
3143 	struct ieee80211_frame *wh;
3144 	struct ath_tid *atid;
3145 	int pri, tid;
3146 	struct mbuf *m0 = bf->bf_m;
3147 
3148 	ATH_TX_LOCK_ASSERT(sc);
3149 
3150 	/* Fetch the TID - non-QoS frames get assigned to TID 16 */
3151 	wh = mtod(m0, struct ieee80211_frame *);
3152 	pri = ath_tx_getac(sc, m0);
3153 	tid = ath_tx_gettid(sc, m0);
3154 	atid = &an->an_tid[tid];
3155 
3156 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n",
3157 	    __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh));
3158 
3159 	/* Set local packet state, used to queue packets to hardware */
3160 	/* XXX potentially duplicate info, re-check */
3161 	bf->bf_state.bfs_tid = tid;
3162 	bf->bf_state.bfs_tx_queue = txq->axq_qnum;
3163 	bf->bf_state.bfs_pri = pri;
3164 
3165 	/*
3166 	 * If the hardware queue isn't busy, queue it directly.
3167 	 * If the hardware queue is busy, queue it.
3168 	 * If the TID is paused or the traffic it outside BAW, software
3169 	 * queue it.
3170 	 *
3171 	 * If the node is in power-save and we're leaking a frame,
3172 	 * leak a single frame.
3173 	 */
3174 	if (! ath_tx_tid_can_tx_or_sched(sc, atid)) {
3175 		/* TID is paused, queue */
3176 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__);
3177 		/*
3178 		 * If the caller requested that it be sent at a high
3179 		 * priority, queue it at the head of the list.
3180 		 */
3181 		if (queue_to_head)
3182 			ATH_TID_INSERT_HEAD(atid, bf, bf_list);
3183 		else
3184 			ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3185 	} else if (ath_tx_ampdu_pending(sc, an, tid)) {
3186 		/* AMPDU pending; queue */
3187 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__);
3188 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3189 		/* XXX sched? */
3190 	} else if (ath_tx_ampdu_running(sc, an, tid)) {
3191 		/*
3192 		 * AMPDU running, queue single-frame if the hardware queue
3193 		 * isn't busy.
3194 		 *
3195 		 * If the hardware queue is busy, sending an aggregate frame
3196 		 * then just hold off so we can queue more aggregate frames.
3197 		 *
3198 		 * Otherwise we may end up with single frames leaking through
3199 		 * because we are dispatching them too quickly.
3200 		 *
3201 		 * TODO: maybe we should treat this as two policies - minimise
3202 		 * latency, or maximise throughput.  Then for BE/BK we can
3203 		 * maximise throughput, and VO/VI (if AMPDU is enabled!)
3204 		 * minimise latency.
3205 		 */
3206 
3207 		/*
3208 		 * Always queue the frame to the tail of the list.
3209 		 */
3210 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3211 
3212 		/*
3213 		 * If the hardware queue isn't busy, direct dispatch
3214 		 * the head frame in the list.
3215 		 *
3216 		 * Note: if we're say, configured to do ADDBA but not A-MPDU
3217 		 * then maybe we want to still queue two non-aggregate frames
3218 		 * to the hardware.  Again with the per-TID policy
3219 		 * configuration..)
3220 		 *
3221 		 * Otherwise, schedule the TID.
3222 		 */
3223 		/* XXX TXQ locking */
3224 		if (txq->axq_depth + txq->fifo.axq_depth == 0) {
3225 			bf = ATH_TID_FIRST(atid);
3226 			ATH_TID_REMOVE(atid, bf, bf_list);
3227 
3228 			/*
3229 			 * Ensure it's definitely treated as a non-AMPDU
3230 			 * frame - this information may have been left
3231 			 * over from a previous attempt.
3232 			 */
3233 			bf->bf_state.bfs_aggr = 0;
3234 			bf->bf_state.bfs_nframes = 1;
3235 
3236 			/* Queue to the hardware */
3237 			ath_tx_xmit_aggr(sc, an, txq, bf);
3238 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3239 			    "%s: xmit_aggr\n",
3240 			    __func__);
3241 		} else {
3242 			DPRINTF(sc, ATH_DEBUG_SW_TX,
3243 			    "%s: ampdu; swq'ing\n",
3244 			    __func__);
3245 
3246 			ath_tx_tid_sched(sc, atid);
3247 		}
3248 	/*
3249 	 * If we're not doing A-MPDU, be prepared to direct dispatch
3250 	 * up to both limits if possible.  This particular corner
3251 	 * case may end up with packet starvation between aggregate
3252 	 * traffic and non-aggregate traffic: we want to ensure
3253 	 * that non-aggregate stations get a few frames queued to the
3254 	 * hardware before the aggregate station(s) get their chance.
3255 	 *
3256 	 * So if you only ever see a couple of frames direct dispatched
3257 	 * to the hardware from a non-AMPDU client, check both here
3258 	 * and in the software queue dispatcher to ensure that those
3259 	 * non-AMPDU stations get a fair chance to transmit.
3260 	 */
3261 	/* XXX TXQ locking */
3262 	} else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) &&
3263 		    (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) {
3264 		/* AMPDU not running, attempt direct dispatch */
3265 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__);
3266 		/* See if clrdmask needs to be set */
3267 		ath_tx_update_clrdmask(sc, atid, bf);
3268 
3269 		/*
3270 		 * Update the current leak count if
3271 		 * we're leaking frames; and set the
3272 		 * MORE flag as appropriate.
3273 		 */
3274 		ath_tx_leak_count_update(sc, atid, bf);
3275 
3276 		/*
3277 		 * Dispatch the frame.
3278 		 */
3279 		ath_tx_xmit_normal(sc, txq, bf);
3280 	} else {
3281 		/* Busy; queue */
3282 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__);
3283 		ATH_TID_INSERT_TAIL(atid, bf, bf_list);
3284 		ath_tx_tid_sched(sc, atid);
3285 	}
3286 }
3287 
3288 /*
3289  * Only set the clrdmask bit if none of the nodes are currently
3290  * filtered.
3291  *
3292  * XXX TODO: go through all the callers and check to see
3293  * which are being called in the context of looping over all
3294  * TIDs (eg, if all tids are being paused, resumed, etc.)
3295  * That'll avoid O(n^2) complexity here.
3296  */
3297 static void
3298 ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an)
3299 {
3300 	int i;
3301 
3302 	ATH_TX_LOCK_ASSERT(sc);
3303 
3304 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3305 		if (an->an_tid[i].isfiltered == 1)
3306 			return;
3307 	}
3308 	an->clrdmask = 1;
3309 }
3310 
3311 /*
3312  * Configure the per-TID node state.
3313  *
3314  * This likely belongs in if_ath_node.c but I can't think of anywhere
3315  * else to put it just yet.
3316  *
3317  * This sets up the SLISTs and the mutex as appropriate.
3318  */
3319 void
3320 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an)
3321 {
3322 	int i, j;
3323 	struct ath_tid *atid;
3324 
3325 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
3326 		atid = &an->an_tid[i];
3327 
3328 		/* XXX now with this bzer(), is the field 0'ing needed? */
3329 		bzero(atid, sizeof(*atid));
3330 
3331 		TAILQ_INIT(&atid->tid_q);
3332 		TAILQ_INIT(&atid->filtq.tid_q);
3333 		atid->tid = i;
3334 		atid->an = an;
3335 		for (j = 0; j < ATH_TID_MAX_BUFS; j++)
3336 			atid->tx_buf[j] = NULL;
3337 		atid->baw_head = atid->baw_tail = 0;
3338 		atid->paused = 0;
3339 		atid->sched = 0;
3340 		atid->hwq_depth = 0;
3341 		atid->cleanup_inprogress = 0;
3342 		if (i == IEEE80211_NONQOS_TID)
3343 			atid->ac = ATH_NONQOS_TID_AC;
3344 		else
3345 			atid->ac = TID_TO_WME_AC(i);
3346 	}
3347 	an->clrdmask = 1;	/* Always start by setting this bit */
3348 }
3349 
3350 /*
3351  * Pause the current TID. This stops packets from being transmitted
3352  * on it.
3353  *
3354  * Since this is also called from upper layers as well as the driver,
3355  * it will get the TID lock.
3356  */
3357 static void
3358 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid)
3359 {
3360 
3361 	ATH_TX_LOCK_ASSERT(sc);
3362 	tid->paused++;
3363 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n",
3364 	    __func__,
3365 	    tid->an->an_node.ni_macaddr, ":",
3366 	    tid->tid,
3367 	    tid->paused);
3368 }
3369 
3370 /*
3371  * Unpause the current TID, and schedule it if needed.
3372  */
3373 static void
3374 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid)
3375 {
3376 	ATH_TX_LOCK_ASSERT(sc);
3377 
3378 	/*
3379 	 * There's some odd places where ath_tx_tid_resume() is called
3380 	 * when it shouldn't be; this works around that particular issue
3381 	 * until it's actually resolved.
3382 	 */
3383 	if (tid->paused == 0) {
3384 		device_printf(sc->sc_dev,
3385 		    "%s: [%6D]: tid=%d, paused=0?\n",
3386 		    __func__,
3387 		    tid->an->an_node.ni_macaddr, ":",
3388 		    tid->tid);
3389 	} else {
3390 		tid->paused--;
3391 	}
3392 
3393 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
3394 	    "%s: [%6D]: tid=%d, unpaused = %d\n",
3395 	    __func__,
3396 	    tid->an->an_node.ni_macaddr, ":",
3397 	    tid->tid,
3398 	    tid->paused);
3399 
3400 	if (tid->paused)
3401 		return;
3402 
3403 	/*
3404 	 * Override the clrdmask configuration for the next frame
3405 	 * from this TID, just to get the ball rolling.
3406 	 */
3407 	ath_tx_set_clrdmask(sc, tid->an);
3408 
3409 	if (tid->axq_depth == 0)
3410 		return;
3411 
3412 	/* XXX isfiltered shouldn't ever be 0 at this point */
3413 	if (tid->isfiltered == 1) {
3414 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n",
3415 		    __func__);
3416 		return;
3417 	}
3418 
3419 	ath_tx_tid_sched(sc, tid);
3420 
3421 	/*
3422 	 * Queue the software TX scheduler.
3423 	 */
3424 	ath_tx_swq_kick(sc);
3425 }
3426 
3427 /*
3428  * Add the given ath_buf to the TID filtered frame list.
3429  * This requires the TID be filtered.
3430  */
3431 static void
3432 ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid,
3433     struct ath_buf *bf)
3434 {
3435 
3436 	ATH_TX_LOCK_ASSERT(sc);
3437 
3438 	if (!tid->isfiltered)
3439 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n",
3440 		    __func__);
3441 
3442 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf);
3443 
3444 	/* Set the retry bit and bump the retry counter */
3445 	ath_tx_set_retry(sc, bf);
3446 	sc->sc_stats.ast_tx_swfiltered++;
3447 
3448 	ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list);
3449 }
3450 
3451 /*
3452  * Handle a completed filtered frame from the given TID.
3453  * This just enables/pauses the filtered frame state if required
3454  * and appends the filtered frame to the filtered queue.
3455  */
3456 static void
3457 ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid,
3458     struct ath_buf *bf)
3459 {
3460 
3461 	ATH_TX_LOCK_ASSERT(sc);
3462 
3463 	if (! tid->isfiltered) {
3464 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n",
3465 		    __func__, tid->tid);
3466 		tid->isfiltered = 1;
3467 		ath_tx_tid_pause(sc, tid);
3468 	}
3469 
3470 	/* Add the frame to the filter queue */
3471 	ath_tx_tid_filt_addbuf(sc, tid, bf);
3472 }
3473 
3474 /*
3475  * Complete the filtered frame TX completion.
3476  *
3477  * If there are no more frames in the hardware queue, unpause/unfilter
3478  * the TID if applicable.  Otherwise we will wait for a node PS transition
3479  * to unfilter.
3480  */
3481 static void
3482 ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid)
3483 {
3484 	struct ath_buf *bf;
3485 	int do_resume = 0;
3486 
3487 	ATH_TX_LOCK_ASSERT(sc);
3488 
3489 	if (tid->hwq_depth != 0)
3490 		return;
3491 
3492 	DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n",
3493 	    __func__, tid->tid);
3494 	if (tid->isfiltered == 1) {
3495 		tid->isfiltered = 0;
3496 		do_resume = 1;
3497 	}
3498 
3499 	/* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */
3500 	ath_tx_set_clrdmask(sc, tid->an);
3501 
3502 	/* XXX this is really quite inefficient */
3503 	while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) {
3504 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3505 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
3506 	}
3507 
3508 	/* And only resume if we had paused before */
3509 	if (do_resume)
3510 		ath_tx_tid_resume(sc, tid);
3511 }
3512 
3513 /*
3514  * Called when a single (aggregate or otherwise) frame is completed.
3515  *
3516  * Returns 0 if the buffer could be added to the filtered list
3517  * (cloned or otherwise), 1 if the buffer couldn't be added to the
3518  * filtered list (failed clone; expired retry) and the caller should
3519  * free it and handle it like a failure (eg by sending a BAR.)
3520  *
3521  * since the buffer may be cloned, bf must be not touched after this
3522  * if the return value is 0.
3523  */
3524 static int
3525 ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid,
3526     struct ath_buf *bf)
3527 {
3528 	struct ath_buf *nbf;
3529 	int retval;
3530 
3531 	ATH_TX_LOCK_ASSERT(sc);
3532 
3533 	/*
3534 	 * Don't allow a filtered frame to live forever.
3535 	 */
3536 	if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3537 		sc->sc_stats.ast_tx_swretrymax++;
3538 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3539 		    "%s: bf=%p, seqno=%d, exceeded retries\n",
3540 		    __func__,
3541 		    bf,
3542 		    SEQNO(bf->bf_state.bfs_seqno));
3543 		retval = 1; /* error */
3544 		goto finish;
3545 	}
3546 
3547 	/*
3548 	 * A busy buffer can't be added to the retry list.
3549 	 * It needs to be cloned.
3550 	 */
3551 	if (bf->bf_flags & ATH_BUF_BUSY) {
3552 		nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3553 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3554 		    "%s: busy buffer clone: %p -> %p\n",
3555 		    __func__, bf, nbf);
3556 	} else {
3557 		nbf = bf;
3558 	}
3559 
3560 	if (nbf == NULL) {
3561 		DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3562 		    "%s: busy buffer couldn't be cloned (%p)!\n",
3563 		    __func__, bf);
3564 		retval = 1; /* error */
3565 	} else {
3566 		ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3567 		retval = 0; /* ok */
3568 	}
3569 finish:
3570 	ath_tx_tid_filt_comp_complete(sc, tid);
3571 
3572 	return (retval);
3573 }
3574 
3575 static void
3576 ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid,
3577     struct ath_buf *bf_first, ath_bufhead *bf_q)
3578 {
3579 	struct ath_buf *bf, *bf_next, *nbf;
3580 
3581 	ATH_TX_LOCK_ASSERT(sc);
3582 
3583 	bf = bf_first;
3584 	while (bf) {
3585 		bf_next = bf->bf_next;
3586 		bf->bf_next = NULL;	/* Remove it from the aggr list */
3587 
3588 		/*
3589 		 * Don't allow a filtered frame to live forever.
3590 		 */
3591 		if (bf->bf_state.bfs_retries > SWMAX_RETRIES) {
3592 			sc->sc_stats.ast_tx_swretrymax++;
3593 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3594 			    "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n",
3595 			    __func__,
3596 			    tid->tid,
3597 			    bf,
3598 			    SEQNO(bf->bf_state.bfs_seqno));
3599 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3600 			goto next;
3601 		}
3602 
3603 		if (bf->bf_flags & ATH_BUF_BUSY) {
3604 			nbf = ath_tx_retry_clone(sc, tid->an, tid, bf);
3605 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3606 			    "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n",
3607 			    __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno));
3608 		} else {
3609 			nbf = bf;
3610 		}
3611 
3612 		/*
3613 		 * If the buffer couldn't be cloned, add it to bf_q;
3614 		 * the caller will free the buffer(s) as required.
3615 		 */
3616 		if (nbf == NULL) {
3617 			DPRINTF(sc, ATH_DEBUG_SW_TX_FILT,
3618 			    "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n",
3619 			    __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno));
3620 			TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
3621 		} else {
3622 			ath_tx_tid_filt_comp_buf(sc, tid, nbf);
3623 		}
3624 next:
3625 		bf = bf_next;
3626 	}
3627 
3628 	ath_tx_tid_filt_comp_complete(sc, tid);
3629 }
3630 
3631 /*
3632  * Suspend the queue because we need to TX a BAR.
3633  */
3634 static void
3635 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid)
3636 {
3637 
3638 	ATH_TX_LOCK_ASSERT(sc);
3639 
3640 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3641 	    "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n",
3642 	    __func__,
3643 	    tid->tid,
3644 	    tid->bar_wait,
3645 	    tid->bar_tx);
3646 
3647 	/* We shouldn't be called when bar_tx is 1 */
3648 	if (tid->bar_tx) {
3649 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3650 		    "%s: bar_tx is 1?!\n", __func__);
3651 	}
3652 
3653 	/* If we've already been called, just be patient. */
3654 	if (tid->bar_wait)
3655 		return;
3656 
3657 	/* Wait! */
3658 	tid->bar_wait = 1;
3659 
3660 	/* Only one pause, no matter how many frames fail */
3661 	ath_tx_tid_pause(sc, tid);
3662 }
3663 
3664 /*
3665  * We've finished with BAR handling - either we succeeded or
3666  * failed. Either way, unsuspend TX.
3667  */
3668 static void
3669 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid)
3670 {
3671 
3672 	ATH_TX_LOCK_ASSERT(sc);
3673 
3674 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3675 	    "%s: %6D: TID=%d, called\n",
3676 	    __func__,
3677 	    tid->an->an_node.ni_macaddr,
3678 	    ":",
3679 	    tid->tid);
3680 
3681 	if (tid->bar_tx == 0 || tid->bar_wait == 0) {
3682 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3683 		    "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3684 		    __func__, tid->an->an_node.ni_macaddr, ":",
3685 		    tid->tid, tid->bar_tx, tid->bar_wait);
3686 	}
3687 
3688 	tid->bar_tx = tid->bar_wait = 0;
3689 	ath_tx_tid_resume(sc, tid);
3690 }
3691 
3692 /*
3693  * Return whether we're ready to TX a BAR frame.
3694  *
3695  * Requires the TID lock be held.
3696  */
3697 static int
3698 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid)
3699 {
3700 
3701 	ATH_TX_LOCK_ASSERT(sc);
3702 
3703 	if (tid->bar_wait == 0 || tid->hwq_depth > 0)
3704 		return (0);
3705 
3706 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3707 	    "%s: %6D: TID=%d, bar ready\n",
3708 	    __func__,
3709 	    tid->an->an_node.ni_macaddr,
3710 	    ":",
3711 	    tid->tid);
3712 
3713 	return (1);
3714 }
3715 
3716 /*
3717  * Check whether the current TID is ready to have a BAR
3718  * TXed and if so, do the TX.
3719  *
3720  * Since the TID/TXQ lock can't be held during a call to
3721  * ieee80211_send_bar(), we have to do the dirty thing of unlocking it,
3722  * sending the BAR and locking it again.
3723  *
3724  * Eventually, the code to send the BAR should be broken out
3725  * from this routine so the lock doesn't have to be reacquired
3726  * just to be immediately dropped by the caller.
3727  */
3728 static void
3729 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid)
3730 {
3731 	struct ieee80211_tx_ampdu *tap;
3732 
3733 	ATH_TX_LOCK_ASSERT(sc);
3734 
3735 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3736 	    "%s: %6D: TID=%d, called\n",
3737 	    __func__,
3738 	    tid->an->an_node.ni_macaddr,
3739 	    ":",
3740 	    tid->tid);
3741 
3742 	tap = ath_tx_get_tx_tid(tid->an, tid->tid);
3743 
3744 	/*
3745 	 * This is an error condition!
3746 	 */
3747 	if (tid->bar_wait == 0 || tid->bar_tx == 1) {
3748 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3749 		    "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n",
3750 		    __func__, tid->an->an_node.ni_macaddr, ":",
3751 		    tid->tid, tid->bar_tx, tid->bar_wait);
3752 		return;
3753 	}
3754 
3755 	/* Don't do anything if we still have pending frames */
3756 	if (tid->hwq_depth > 0) {
3757 		DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3758 		    "%s: %6D: TID=%d, hwq_depth=%d, waiting\n",
3759 		    __func__,
3760 		    tid->an->an_node.ni_macaddr,
3761 		    ":",
3762 		    tid->tid,
3763 		    tid->hwq_depth);
3764 		return;
3765 	}
3766 
3767 	/* We're now about to TX */
3768 	tid->bar_tx = 1;
3769 
3770 	/*
3771 	 * Override the clrdmask configuration for the next frame,
3772 	 * just to get the ball rolling.
3773 	 */
3774 	ath_tx_set_clrdmask(sc, tid->an);
3775 
3776 	/*
3777 	 * Calculate new BAW left edge, now that all frames have either
3778 	 * succeeded or failed.
3779 	 *
3780 	 * XXX verify this is _actually_ the valid value to begin at!
3781 	 */
3782 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3783 	    "%s: %6D: TID=%d, new BAW left edge=%d\n",
3784 	    __func__,
3785 	    tid->an->an_node.ni_macaddr,
3786 	    ":",
3787 	    tid->tid,
3788 	    tap->txa_start);
3789 
3790 	/* Try sending the BAR frame */
3791 	/* We can't hold the lock here! */
3792 
3793 	ATH_TX_UNLOCK(sc);
3794 	if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) {
3795 		/* Success? Now we wait for notification that it's done */
3796 		ATH_TX_LOCK(sc);
3797 		return;
3798 	}
3799 
3800 	/* Failure? For now, warn loudly and continue */
3801 	ATH_TX_LOCK(sc);
3802 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
3803 	    "%s: %6D: TID=%d, failed to TX BAR, continue!\n",
3804 	    __func__, tid->an->an_node.ni_macaddr, ":",
3805 	    tid->tid);
3806 	ath_tx_tid_bar_unsuspend(sc, tid);
3807 }
3808 
3809 static void
3810 ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an,
3811     struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf)
3812 {
3813 
3814 	ATH_TX_LOCK_ASSERT(sc);
3815 
3816 	/*
3817 	 * If the current TID is running AMPDU, update
3818 	 * the BAW.
3819 	 */
3820 	if (ath_tx_ampdu_running(sc, an, tid->tid) &&
3821 	    bf->bf_state.bfs_dobaw) {
3822 		/*
3823 		 * Only remove the frame from the BAW if it's
3824 		 * been transmitted at least once; this means
3825 		 * the frame was in the BAW to begin with.
3826 		 */
3827 		if (bf->bf_state.bfs_retries > 0) {
3828 			ath_tx_update_baw(sc, an, tid, bf);
3829 			bf->bf_state.bfs_dobaw = 0;
3830 		}
3831 #if 0
3832 		/*
3833 		 * This has become a non-fatal error now
3834 		 */
3835 		if (! bf->bf_state.bfs_addedbaw)
3836 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAW
3837 			    "%s: wasn't added: seqno %d\n",
3838 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
3839 #endif
3840 	}
3841 
3842 	/* Strip it out of an aggregate list if it was in one */
3843 	bf->bf_next = NULL;
3844 
3845 	/* Insert on the free queue to be freed by the caller */
3846 	TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
3847 }
3848 
3849 static void
3850 ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an,
3851     const char *pfx, struct ath_tid *tid, struct ath_buf *bf)
3852 {
3853 	struct ieee80211_node *ni = &an->an_node;
3854 	struct ath_txq *txq;
3855 	struct ieee80211_tx_ampdu *tap;
3856 
3857 	txq = sc->sc_ac2q[tid->ac];
3858 	tap = ath_tx_get_tx_tid(an, tid->tid);
3859 
3860 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3861 	    "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, "
3862 	    "seqno=%d, retry=%d\n",
3863 	    __func__,
3864 	    pfx,
3865 	    ni->ni_macaddr,
3866 	    ":",
3867 	    bf,
3868 	    bf->bf_state.bfs_addedbaw,
3869 	    bf->bf_state.bfs_dobaw,
3870 	    SEQNO(bf->bf_state.bfs_seqno),
3871 	    bf->bf_state.bfs_retries);
3872 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3873 	    "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n",
3874 	    __func__,
3875 	    pfx,
3876 	    ni->ni_macaddr,
3877 	    ":",
3878 	    bf,
3879 	    txq->axq_qnum,
3880 	    txq->axq_depth,
3881 	    txq->axq_aggr_depth);
3882 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3883 	    "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, "
3884 	      "isfiltered=%d\n",
3885 	    __func__,
3886 	    pfx,
3887 	    ni->ni_macaddr,
3888 	    ":",
3889 	    bf,
3890 	    tid->axq_depth,
3891 	    tid->hwq_depth,
3892 	    tid->bar_wait,
3893 	    tid->isfiltered);
3894 	DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET,
3895 	    "%s: %s: %6D: tid %d: "
3896 	    "sched=%d, paused=%d, "
3897 	    "incomp=%d, baw_head=%d, "
3898 	    "baw_tail=%d txa_start=%d, ni_txseqs=%d\n",
3899 	     __func__,
3900 	     pfx,
3901 	     ni->ni_macaddr,
3902 	     ":",
3903 	     tid->tid,
3904 	     tid->sched, tid->paused,
3905 	     tid->incomp, tid->baw_head,
3906 	     tid->baw_tail, tap == NULL ? -1 : tap->txa_start,
3907 	     ni->ni_txseqs[tid->tid]);
3908 
3909 	/* XXX Dump the frame, see what it is? */
3910 	if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT))
3911 		ieee80211_dump_pkt(ni->ni_ic,
3912 		    mtod(bf->bf_m, const uint8_t *),
3913 		    bf->bf_m->m_len, 0, -1);
3914 }
3915 
3916 /*
3917  * Free any packets currently pending in the software TX queue.
3918  *
3919  * This will be called when a node is being deleted.
3920  *
3921  * It can also be called on an active node during an interface
3922  * reset or state transition.
3923  *
3924  * (From Linux/reference):
3925  *
3926  * TODO: For frame(s) that are in the retry state, we will reuse the
3927  * sequence number(s) without setting the retry bit. The
3928  * alternative is to give up on these and BAR the receiver's window
3929  * forward.
3930  */
3931 static void
3932 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an,
3933     struct ath_tid *tid, ath_bufhead *bf_cq)
3934 {
3935 	struct ath_buf *bf;
3936 	struct ieee80211_tx_ampdu *tap;
3937 	struct ieee80211_node *ni = &an->an_node;
3938 	int t;
3939 
3940 	tap = ath_tx_get_tx_tid(an, tid->tid);
3941 
3942 	ATH_TX_LOCK_ASSERT(sc);
3943 
3944 	/* Walk the queue, free frames */
3945 	t = 0;
3946 	for (;;) {
3947 		bf = ATH_TID_FIRST(tid);
3948 		if (bf == NULL) {
3949 			break;
3950 		}
3951 
3952 		if (t == 0) {
3953 			ath_tx_tid_drain_print(sc, an, "norm", tid, bf);
3954 //			t = 1;
3955 		}
3956 
3957 		ATH_TID_REMOVE(tid, bf, bf_list);
3958 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3959 	}
3960 
3961 	/* And now, drain the filtered frame queue */
3962 	t = 0;
3963 	for (;;) {
3964 		bf = ATH_TID_FILT_FIRST(tid);
3965 		if (bf == NULL)
3966 			break;
3967 
3968 		if (t == 0) {
3969 			ath_tx_tid_drain_print(sc, an, "filt", tid, bf);
3970 //			t = 1;
3971 		}
3972 
3973 		ATH_TID_FILT_REMOVE(tid, bf, bf_list);
3974 		ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf);
3975 	}
3976 
3977 	/*
3978 	 * Override the clrdmask configuration for the next frame
3979 	 * in case there is some future transmission, just to get
3980 	 * the ball rolling.
3981 	 *
3982 	 * This won't hurt things if the TID is about to be freed.
3983 	 */
3984 	ath_tx_set_clrdmask(sc, tid->an);
3985 
3986 	/*
3987 	 * Now that it's completed, grab the TID lock and update
3988 	 * the sequence number and BAW window.
3989 	 * Because sequence numbers have been assigned to frames
3990 	 * that haven't been sent yet, it's entirely possible
3991 	 * we'll be called with some pending frames that have not
3992 	 * been transmitted.
3993 	 *
3994 	 * The cleaner solution is to do the sequence number allocation
3995 	 * when the packet is first transmitted - and thus the "retries"
3996 	 * check above would be enough to update the BAW/seqno.
3997 	 */
3998 
3999 	/* But don't do it for non-QoS TIDs */
4000 	if (tap) {
4001 #if 1
4002 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4003 		    "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n",
4004 		    __func__,
4005 		    ni->ni_macaddr,
4006 		    ":",
4007 		    an,
4008 		    tid->tid,
4009 		    tap->txa_start);
4010 #endif
4011 		ni->ni_txseqs[tid->tid] = tap->txa_start;
4012 		tid->baw_tail = tid->baw_head;
4013 	}
4014 }
4015 
4016 /*
4017  * Reset the TID state.  This must be only called once the node has
4018  * had its frames flushed from this TID, to ensure that no other
4019  * pause / unpause logic can kick in.
4020  */
4021 static void
4022 ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid)
4023 {
4024 
4025 #if 0
4026 	tid->bar_wait = tid->bar_tx = tid->isfiltered = 0;
4027 	tid->paused = tid->sched = tid->addba_tx_pending = 0;
4028 	tid->incomp = tid->cleanup_inprogress = 0;
4029 #endif
4030 
4031 	/*
4032 	 * If we have a bar_wait set, we need to unpause the TID
4033 	 * here.  Otherwise once cleanup has finished, the TID won't
4034 	 * have the right paused counter.
4035 	 *
4036 	 * XXX I'm not going through resume here - I don't want the
4037 	 * node to be rescheuled just yet.  This however should be
4038 	 * methodized!
4039 	 */
4040 	if (tid->bar_wait) {
4041 		if (tid->paused > 0) {
4042 			tid->paused --;
4043 		}
4044 	}
4045 
4046 	/*
4047 	 * XXX same with a currently filtered TID.
4048 	 *
4049 	 * Since this is being called during a flush, we assume that
4050 	 * the filtered frame list is actually empty.
4051 	 *
4052 	 * XXX TODO: add in a check to ensure that the filtered queue
4053 	 * depth is actually 0!
4054 	 */
4055 	if (tid->isfiltered) {
4056 		if (tid->paused > 0) {
4057 			tid->paused --;
4058 		}
4059 	}
4060 
4061 	/*
4062 	 * Clear BAR, filtered frames, scheduled and ADDBA pending.
4063 	 * The TID may be going through cleanup from the last association
4064 	 * where things in the BAW are still in the hardware queue.
4065 	 */
4066 	tid->bar_wait = 0;
4067 	tid->bar_tx = 0;
4068 	tid->isfiltered = 0;
4069 	tid->sched = 0;
4070 	tid->addba_tx_pending = 0;
4071 
4072 	/*
4073 	 * XXX TODO: it may just be enough to walk the HWQs and mark
4074 	 * frames for that node as non-aggregate; or mark the ath_node
4075 	 * with something that indicates that aggregation is no longer
4076 	 * occurring.  Then we can just toss the BAW complaints and
4077 	 * do a complete hard reset of state here - no pause, no
4078 	 * complete counter, etc.
4079 	 */
4080 
4081 }
4082 
4083 /*
4084  * Flush all software queued packets for the given node.
4085  *
4086  * This occurs when a completion handler frees the last buffer
4087  * for a node, and the node is thus freed. This causes the node
4088  * to be cleaned up, which ends up calling ath_tx_node_flush.
4089  */
4090 void
4091 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an)
4092 {
4093 	int tid;
4094 	ath_bufhead bf_cq;
4095 	struct ath_buf *bf;
4096 
4097 	TAILQ_INIT(&bf_cq);
4098 
4099 	ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p",
4100 	    &an->an_node);
4101 
4102 	ATH_TX_LOCK(sc);
4103 	DPRINTF(sc, ATH_DEBUG_NODE,
4104 	    "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, "
4105 	    "swq_depth=%d, clrdmask=%d, leak_count=%d\n",
4106 	    __func__,
4107 	    an->an_node.ni_macaddr,
4108 	    ":",
4109 	    an->an_is_powersave,
4110 	    an->an_stack_psq,
4111 	    an->an_tim_set,
4112 	    an->an_swq_depth,
4113 	    an->clrdmask,
4114 	    an->an_leak_count);
4115 
4116 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
4117 		struct ath_tid *atid = &an->an_tid[tid];
4118 
4119 		/* Free packets */
4120 		ath_tx_tid_drain(sc, an, atid, &bf_cq);
4121 
4122 		/* Remove this tid from the list of active tids */
4123 		ath_tx_tid_unsched(sc, atid);
4124 
4125 		/* Reset the per-TID pause, BAR, etc state */
4126 		ath_tx_tid_reset(sc, atid);
4127 	}
4128 
4129 	/*
4130 	 * Clear global leak count
4131 	 */
4132 	an->an_leak_count = 0;
4133 	ATH_TX_UNLOCK(sc);
4134 
4135 	/* Handle completed frames */
4136 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4137 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4138 		ath_tx_default_comp(sc, bf, 0);
4139 	}
4140 }
4141 
4142 /*
4143  * Drain all the software TXQs currently with traffic queued.
4144  */
4145 void
4146 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq)
4147 {
4148 	struct ath_tid *tid;
4149 	ath_bufhead bf_cq;
4150 	struct ath_buf *bf;
4151 
4152 	TAILQ_INIT(&bf_cq);
4153 	ATH_TX_LOCK(sc);
4154 
4155 	/*
4156 	 * Iterate over all active tids for the given txq,
4157 	 * flushing and unsched'ing them
4158 	 */
4159 	while (! TAILQ_EMPTY(&txq->axq_tidq)) {
4160 		tid = TAILQ_FIRST(&txq->axq_tidq);
4161 		ath_tx_tid_drain(sc, tid->an, tid, &bf_cq);
4162 		ath_tx_tid_unsched(sc, tid);
4163 	}
4164 
4165 	ATH_TX_UNLOCK(sc);
4166 
4167 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4168 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4169 		ath_tx_default_comp(sc, bf, 0);
4170 	}
4171 }
4172 
4173 /*
4174  * Handle completion of non-aggregate session frames.
4175  *
4176  * This (currently) doesn't implement software retransmission of
4177  * non-aggregate frames!
4178  *
4179  * Software retransmission of non-aggregate frames needs to obey
4180  * the strict sequence number ordering, and drop any frames that
4181  * will fail this.
4182  *
4183  * For now, filtered frames and frame transmission will cause
4184  * all kinds of issues.  So we don't support them.
4185  *
4186  * So anyone queuing frames via ath_tx_normal_xmit() or
4187  * ath_tx_hw_queue_norm() must override and set CLRDMASK.
4188  */
4189 void
4190 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
4191 {
4192 	struct ieee80211_node *ni = bf->bf_node;
4193 	struct ath_node *an = ATH_NODE(ni);
4194 	int tid = bf->bf_state.bfs_tid;
4195 	struct ath_tid *atid = &an->an_tid[tid];
4196 	struct ath_tx_status *ts = &bf->bf_status.ds_txstat;
4197 
4198 	/* The TID state is protected behind the TXQ lock */
4199 	ATH_TX_LOCK(sc);
4200 
4201 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n",
4202 	    __func__, bf, fail, atid->hwq_depth - 1);
4203 
4204 	atid->hwq_depth--;
4205 
4206 #if 0
4207 	/*
4208 	 * If the frame was filtered, stick it on the filter frame
4209 	 * queue and complain about it.  It shouldn't happen!
4210 	 */
4211 	if ((ts->ts_status & HAL_TXERR_FILT) ||
4212 	    (ts->ts_status != 0 && atid->isfiltered)) {
4213 		DPRINTF(sc, ATH_DEBUG_SW_TX,
4214 		    "%s: isfiltered=%d, ts_status=%d: huh?\n",
4215 		    __func__,
4216 		    atid->isfiltered,
4217 		    ts->ts_status);
4218 		ath_tx_tid_filt_comp_buf(sc, atid, bf);
4219 	}
4220 #endif
4221 	if (atid->isfiltered)
4222 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__);
4223 	if (atid->hwq_depth < 0)
4224 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
4225 		    __func__, atid->hwq_depth);
4226 
4227 	/* If the TID is being cleaned up, track things */
4228 	/* XXX refactor! */
4229 	if (atid->cleanup_inprogress) {
4230 		atid->incomp--;
4231 		if (atid->incomp == 0) {
4232 			DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4233 			    "%s: TID %d: cleaned up! resume!\n",
4234 			    __func__, tid);
4235 			atid->cleanup_inprogress = 0;
4236 			ath_tx_tid_resume(sc, atid);
4237 		}
4238 	}
4239 
4240 	/*
4241 	 * If the queue is filtered, potentially mark it as complete
4242 	 * and reschedule it as needed.
4243 	 *
4244 	 * This is required as there may be a subsequent TX descriptor
4245 	 * for this end-node that has CLRDMASK set, so it's quite possible
4246 	 * that a filtered frame will be followed by a non-filtered
4247 	 * (complete or otherwise) frame.
4248 	 *
4249 	 * XXX should we do this before we complete the frame?
4250 	 */
4251 	if (atid->isfiltered)
4252 		ath_tx_tid_filt_comp_complete(sc, atid);
4253 	ATH_TX_UNLOCK(sc);
4254 
4255 	/*
4256 	 * punt to rate control if we're not being cleaned up
4257 	 * during a hw queue drain and the frame wanted an ACK.
4258 	 */
4259 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
4260 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
4261 		    ts,
4262 		    bf->bf_state.bfs_pktlen,
4263 		    bf->bf_state.bfs_pktlen,
4264 		    1, (ts->ts_status == 0) ? 0 : 1);
4265 
4266 	ath_tx_default_comp(sc, bf, fail);
4267 }
4268 
4269 /*
4270  * Handle cleanup of aggregate session packets that aren't
4271  * an A-MPDU.
4272  *
4273  * There's no need to update the BAW here - the session is being
4274  * torn down.
4275  */
4276 static void
4277 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4278 {
4279 	struct ieee80211_node *ni = bf->bf_node;
4280 	struct ath_node *an = ATH_NODE(ni);
4281 	int tid = bf->bf_state.bfs_tid;
4282 	struct ath_tid *atid = &an->an_tid[tid];
4283 
4284 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n",
4285 	    __func__, tid, atid->incomp);
4286 
4287 	ATH_TX_LOCK(sc);
4288 	atid->incomp--;
4289 
4290 	/* XXX refactor! */
4291 	if (bf->bf_state.bfs_dobaw) {
4292 		ath_tx_update_baw(sc, an, atid, bf);
4293 		if (!bf->bf_state.bfs_addedbaw)
4294 			DPRINTF(sc, ATH_DEBUG_SW_TX,
4295 			    "%s: wasn't added: seqno %d\n",
4296 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4297 	}
4298 
4299 	if (atid->incomp == 0) {
4300 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4301 		    "%s: TID %d: cleaned up! resume!\n",
4302 		    __func__, tid);
4303 		atid->cleanup_inprogress = 0;
4304 		ath_tx_tid_resume(sc, atid);
4305 	}
4306 	ATH_TX_UNLOCK(sc);
4307 
4308 	ath_tx_default_comp(sc, bf, 0);
4309 }
4310 
4311 /*
4312  * This as it currently stands is a bit dumb.  Ideally we'd just
4313  * fail the frame the normal way and have it permanently fail
4314  * via the normal aggregate completion path.
4315  */
4316 static void
4317 ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an,
4318     int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq)
4319 {
4320 	struct ath_tid *atid = &an->an_tid[tid];
4321 	struct ath_buf *bf, *bf_next;
4322 
4323 	ATH_TX_LOCK_ASSERT(sc);
4324 
4325 	/*
4326 	 * Remove this frame from the queue.
4327 	 */
4328 	ATH_TID_REMOVE(atid, bf_head, bf_list);
4329 
4330 	/*
4331 	 * Loop over all the frames in the aggregate.
4332 	 */
4333 	bf = bf_head;
4334 	while (bf != NULL) {
4335 		bf_next = bf->bf_next;	/* next aggregate frame, or NULL */
4336 
4337 		/*
4338 		 * If it's been added to the BAW we need to kick
4339 		 * it out of the BAW before we continue.
4340 		 *
4341 		 * XXX if it's an aggregate, assert that it's in the
4342 		 * BAW - we shouldn't have it be in an aggregate
4343 		 * otherwise!
4344 		 */
4345 		if (bf->bf_state.bfs_addedbaw) {
4346 			ath_tx_update_baw(sc, an, atid, bf);
4347 			bf->bf_state.bfs_dobaw = 0;
4348 		}
4349 
4350 		/*
4351 		 * Give it the default completion handler.
4352 		 */
4353 		bf->bf_comp = ath_tx_normal_comp;
4354 		bf->bf_next = NULL;
4355 
4356 		/*
4357 		 * Add it to the list to free.
4358 		 */
4359 		TAILQ_INSERT_TAIL(bf_cq, bf, bf_list);
4360 
4361 		/*
4362 		 * Now advance to the next frame in the aggregate.
4363 		 */
4364 		bf = bf_next;
4365 	}
4366 }
4367 
4368 /*
4369  * Performs transmit side cleanup when TID changes from aggregated to
4370  * unaggregated and during reassociation.
4371  *
4372  * For now, this just tosses everything from the TID software queue
4373  * whether or not it has been retried and marks the TID as
4374  * pending completion if there's anything for this TID queued to
4375  * the hardware.
4376  *
4377  * The caller is responsible for pausing the TID and unpausing the
4378  * TID if no cleanup was required. Otherwise the cleanup path will
4379  * unpause the TID once the last hardware queued frame is completed.
4380  */
4381 static void
4382 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid,
4383     ath_bufhead *bf_cq)
4384 {
4385 	struct ath_tid *atid = &an->an_tid[tid];
4386 	struct ath_buf *bf, *bf_next;
4387 
4388 	ATH_TX_LOCK_ASSERT(sc);
4389 
4390 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4391 	    "%s: TID %d: called; inprogress=%d\n", __func__, tid,
4392 	    atid->cleanup_inprogress);
4393 
4394 	/*
4395 	 * Move the filtered frames to the TX queue, before
4396 	 * we run off and discard/process things.
4397 	 */
4398 
4399 	/* XXX this is really quite inefficient */
4400 	while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) {
4401 		ATH_TID_FILT_REMOVE(atid, bf, bf_list);
4402 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4403 	}
4404 
4405 	/*
4406 	 * Update the frames in the software TX queue:
4407 	 *
4408 	 * + Discard retry frames in the queue
4409 	 * + Fix the completion function to be non-aggregate
4410 	 */
4411 	bf = ATH_TID_FIRST(atid);
4412 	while (bf) {
4413 		/*
4414 		 * Grab the next frame in the list, we may
4415 		 * be fiddling with the list.
4416 		 */
4417 		bf_next = TAILQ_NEXT(bf, bf_list);
4418 
4419 		/*
4420 		 * Free the frame and all subframes.
4421 		 */
4422 		ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq);
4423 
4424 		/*
4425 		 * Next frame!
4426 		 */
4427 		bf = bf_next;
4428 	}
4429 
4430 	/*
4431 	 * If there's anything in the hardware queue we wait
4432 	 * for the TID HWQ to empty.
4433 	 */
4434 	if (atid->hwq_depth > 0) {
4435 		/*
4436 		 * XXX how about we kill atid->incomp, and instead
4437 		 * replace it with a macro that checks that atid->hwq_depth
4438 		 * is 0?
4439 		 */
4440 		atid->incomp = atid->hwq_depth;
4441 		atid->cleanup_inprogress = 1;
4442 	}
4443 
4444 	if (atid->cleanup_inprogress)
4445 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4446 		    "%s: TID %d: cleanup needed: %d packets\n",
4447 		    __func__, tid, atid->incomp);
4448 
4449 	/* Owner now must free completed frames */
4450 }
4451 
4452 static struct ath_buf *
4453 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an,
4454     struct ath_tid *tid, struct ath_buf *bf)
4455 {
4456 	struct ath_buf *nbf;
4457 	int error;
4458 
4459 	/*
4460 	 * Clone the buffer.  This will handle the dma unmap and
4461 	 * copy the node reference to the new buffer.  If this
4462 	 * works out, 'bf' will have no DMA mapping, no mbuf
4463 	 * pointer and no node reference.
4464 	 */
4465 	nbf = ath_buf_clone(sc, bf);
4466 
4467 #if 0
4468 	DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n",
4469 	    __func__);
4470 #endif
4471 
4472 	if (nbf == NULL) {
4473 		/* Failed to clone */
4474 		DPRINTF(sc, ATH_DEBUG_XMIT,
4475 		    "%s: failed to clone a busy buffer\n",
4476 		    __func__);
4477 		return NULL;
4478 	}
4479 
4480 	/* Setup the dma for the new buffer */
4481 	error = ath_tx_dmasetup(sc, nbf, nbf->bf_m);
4482 	if (error != 0) {
4483 		DPRINTF(sc, ATH_DEBUG_XMIT,
4484 		    "%s: failed to setup dma for clone\n",
4485 		    __func__);
4486 		/*
4487 		 * Put this at the head of the list, not tail;
4488 		 * that way it doesn't interfere with the
4489 		 * busy buffer logic (which uses the tail of
4490 		 * the list.)
4491 		 */
4492 		ATH_TXBUF_LOCK(sc);
4493 		ath_returnbuf_head(sc, nbf);
4494 		ATH_TXBUF_UNLOCK(sc);
4495 		return NULL;
4496 	}
4497 
4498 	/* Update BAW if required, before we free the original buf */
4499 	if (bf->bf_state.bfs_dobaw)
4500 		ath_tx_switch_baw_buf(sc, an, tid, bf, nbf);
4501 
4502 	/* Free original buffer; return new buffer */
4503 	ath_freebuf(sc, bf);
4504 
4505 	return nbf;
4506 }
4507 
4508 /*
4509  * Handle retrying an unaggregate frame in an aggregate
4510  * session.
4511  *
4512  * If too many retries occur, pause the TID, wait for
4513  * any further retransmits (as there's no reason why
4514  * non-aggregate frames in an aggregate session are
4515  * transmitted in-order; they just have to be in-BAW)
4516  * and then queue a BAR.
4517  */
4518 static void
4519 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf)
4520 {
4521 	struct ieee80211_node *ni = bf->bf_node;
4522 	struct ath_node *an = ATH_NODE(ni);
4523 	int tid = bf->bf_state.bfs_tid;
4524 	struct ath_tid *atid = &an->an_tid[tid];
4525 	struct ieee80211_tx_ampdu *tap;
4526 
4527 	ATH_TX_LOCK(sc);
4528 
4529 	tap = ath_tx_get_tx_tid(an, tid);
4530 
4531 	/*
4532 	 * If the buffer is marked as busy, we can't directly
4533 	 * reuse it. Instead, try to clone the buffer.
4534 	 * If the clone is successful, recycle the old buffer.
4535 	 * If the clone is unsuccessful, set bfs_retries to max
4536 	 * to force the next bit of code to free the buffer
4537 	 * for us.
4538 	 */
4539 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4540 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4541 		struct ath_buf *nbf;
4542 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4543 		if (nbf)
4544 			/* bf has been freed at this point */
4545 			bf = nbf;
4546 		else
4547 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4548 	}
4549 
4550 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4551 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4552 		    "%s: exceeded retries; seqno %d\n",
4553 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4554 		sc->sc_stats.ast_tx_swretrymax++;
4555 
4556 		/* Update BAW anyway */
4557 		if (bf->bf_state.bfs_dobaw) {
4558 			ath_tx_update_baw(sc, an, atid, bf);
4559 			if (! bf->bf_state.bfs_addedbaw)
4560 				DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4561 				    "%s: wasn't added: seqno %d\n",
4562 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4563 		}
4564 		bf->bf_state.bfs_dobaw = 0;
4565 
4566 		/* Suspend the TX queue and get ready to send the BAR */
4567 		ath_tx_tid_bar_suspend(sc, atid);
4568 
4569 		/* Send the BAR if there are no other frames waiting */
4570 		if (ath_tx_tid_bar_tx_ready(sc, atid))
4571 			ath_tx_tid_bar_tx(sc, atid);
4572 
4573 		ATH_TX_UNLOCK(sc);
4574 
4575 		/* Free buffer, bf is free after this call */
4576 		ath_tx_default_comp(sc, bf, 0);
4577 		return;
4578 	}
4579 
4580 	/*
4581 	 * This increments the retry counter as well as
4582 	 * sets the retry flag in the ath_buf and packet
4583 	 * body.
4584 	 */
4585 	ath_tx_set_retry(sc, bf);
4586 	sc->sc_stats.ast_tx_swretries++;
4587 
4588 	/*
4589 	 * Insert this at the head of the queue, so it's
4590 	 * retried before any current/subsequent frames.
4591 	 */
4592 	ATH_TID_INSERT_HEAD(atid, bf, bf_list);
4593 	ath_tx_tid_sched(sc, atid);
4594 	/* Send the BAR if there are no other frames waiting */
4595 	if (ath_tx_tid_bar_tx_ready(sc, atid))
4596 		ath_tx_tid_bar_tx(sc, atid);
4597 
4598 	ATH_TX_UNLOCK(sc);
4599 }
4600 
4601 /*
4602  * Common code for aggregate excessive retry/subframe retry.
4603  * If retrying, queues buffers to bf_q. If not, frees the
4604  * buffers.
4605  *
4606  * XXX should unify this with ath_tx_aggr_retry_unaggr()
4607  */
4608 static int
4609 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf,
4610     ath_bufhead *bf_q)
4611 {
4612 	struct ieee80211_node *ni = bf->bf_node;
4613 	struct ath_node *an = ATH_NODE(ni);
4614 	int tid = bf->bf_state.bfs_tid;
4615 	struct ath_tid *atid = &an->an_tid[tid];
4616 
4617 	ATH_TX_LOCK_ASSERT(sc);
4618 
4619 	/* XXX clr11naggr should be done for all subframes */
4620 	ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
4621 	ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0);
4622 
4623 	/* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */
4624 
4625 	/*
4626 	 * If the buffer is marked as busy, we can't directly
4627 	 * reuse it. Instead, try to clone the buffer.
4628 	 * If the clone is successful, recycle the old buffer.
4629 	 * If the clone is unsuccessful, set bfs_retries to max
4630 	 * to force the next bit of code to free the buffer
4631 	 * for us.
4632 	 */
4633 	if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) &&
4634 	    (bf->bf_flags & ATH_BUF_BUSY)) {
4635 		struct ath_buf *nbf;
4636 		nbf = ath_tx_retry_clone(sc, an, atid, bf);
4637 		if (nbf)
4638 			/* bf has been freed at this point */
4639 			bf = nbf;
4640 		else
4641 			bf->bf_state.bfs_retries = SWMAX_RETRIES + 1;
4642 	}
4643 
4644 	if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) {
4645 		sc->sc_stats.ast_tx_swretrymax++;
4646 		DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES,
4647 		    "%s: max retries: seqno %d\n",
4648 		    __func__, SEQNO(bf->bf_state.bfs_seqno));
4649 		ath_tx_update_baw(sc, an, atid, bf);
4650 		if (!bf->bf_state.bfs_addedbaw)
4651 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAW,
4652 			    "%s: wasn't added: seqno %d\n",
4653 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
4654 		bf->bf_state.bfs_dobaw = 0;
4655 		return 1;
4656 	}
4657 
4658 	ath_tx_set_retry(sc, bf);
4659 	sc->sc_stats.ast_tx_swretries++;
4660 	bf->bf_next = NULL;		/* Just to make sure */
4661 
4662 	/* Clear the aggregate state */
4663 	bf->bf_state.bfs_aggr = 0;
4664 	bf->bf_state.bfs_ndelim = 0;	/* ??? needed? */
4665 	bf->bf_state.bfs_nframes = 1;
4666 
4667 	TAILQ_INSERT_TAIL(bf_q, bf, bf_list);
4668 	return 0;
4669 }
4670 
4671 /*
4672  * error pkt completion for an aggregate destination
4673  */
4674 static void
4675 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first,
4676     struct ath_tid *tid)
4677 {
4678 	struct ieee80211_node *ni = bf_first->bf_node;
4679 	struct ath_node *an = ATH_NODE(ni);
4680 	struct ath_buf *bf_next, *bf;
4681 	ath_bufhead bf_q;
4682 	int drops = 0;
4683 	struct ieee80211_tx_ampdu *tap;
4684 	ath_bufhead bf_cq;
4685 
4686 	TAILQ_INIT(&bf_q);
4687 	TAILQ_INIT(&bf_cq);
4688 
4689 	/*
4690 	 * Update rate control - all frames have failed.
4691 	 */
4692 	ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc,
4693 	    &bf_first->bf_status.ds_txstat,
4694 	    bf_first->bf_state.bfs_al,
4695 	    bf_first->bf_state.bfs_rc_maxpktlen,
4696 	    bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes);
4697 
4698 	ATH_TX_LOCK(sc);
4699 	tap = ath_tx_get_tx_tid(an, tid->tid);
4700 	sc->sc_stats.ast_tx_aggr_failall++;
4701 
4702 	/* Retry all subframes */
4703 	bf = bf_first;
4704 	while (bf) {
4705 		bf_next = bf->bf_next;
4706 		bf->bf_next = NULL;	/* Remove it from the aggr list */
4707 		sc->sc_stats.ast_tx_aggr_fail++;
4708 		if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
4709 			drops++;
4710 			bf->bf_next = NULL;
4711 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
4712 		}
4713 		bf = bf_next;
4714 	}
4715 
4716 	/* Prepend all frames to the beginning of the queue */
4717 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
4718 		TAILQ_REMOVE(&bf_q, bf, bf_list);
4719 		ATH_TID_INSERT_HEAD(tid, bf, bf_list);
4720 	}
4721 
4722 	/*
4723 	 * Schedule the TID to be re-tried.
4724 	 */
4725 	ath_tx_tid_sched(sc, tid);
4726 
4727 	/*
4728 	 * send bar if we dropped any frames
4729 	 *
4730 	 * Keep the txq lock held for now, as we need to ensure
4731 	 * that ni_txseqs[] is consistent (as it's being updated
4732 	 * in the ifnet TX context or raw TX context.)
4733 	 */
4734 	if (drops) {
4735 		/* Suspend the TX queue and get ready to send the BAR */
4736 		ath_tx_tid_bar_suspend(sc, tid);
4737 	}
4738 
4739 	/*
4740 	 * Send BAR if required
4741 	 */
4742 	if (ath_tx_tid_bar_tx_ready(sc, tid))
4743 		ath_tx_tid_bar_tx(sc, tid);
4744 
4745 	ATH_TX_UNLOCK(sc);
4746 
4747 	/* Complete frames which errored out */
4748 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
4749 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
4750 		ath_tx_default_comp(sc, bf, 0);
4751 	}
4752 }
4753 
4754 /*
4755  * Handle clean-up of packets from an aggregate list.
4756  *
4757  * There's no need to update the BAW here - the session is being
4758  * torn down.
4759  */
4760 static void
4761 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first)
4762 {
4763 	struct ath_buf *bf, *bf_next;
4764 	struct ieee80211_node *ni = bf_first->bf_node;
4765 	struct ath_node *an = ATH_NODE(ni);
4766 	int tid = bf_first->bf_state.bfs_tid;
4767 	struct ath_tid *atid = &an->an_tid[tid];
4768 
4769 	ATH_TX_LOCK(sc);
4770 
4771 	/* update incomp */
4772 	atid->incomp--;
4773 
4774 	/* Update the BAW */
4775 	bf = bf_first;
4776 	while (bf) {
4777 		/* XXX refactor! */
4778 		if (bf->bf_state.bfs_dobaw) {
4779 			ath_tx_update_baw(sc, an, atid, bf);
4780 			if (!bf->bf_state.bfs_addedbaw)
4781 				DPRINTF(sc, ATH_DEBUG_SW_TX,
4782 				    "%s: wasn't added: seqno %d\n",
4783 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
4784 		}
4785 		bf = bf->bf_next;
4786 	}
4787 
4788 	if (atid->incomp == 0) {
4789 		DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
4790 		    "%s: TID %d: cleaned up! resume!\n",
4791 		    __func__, tid);
4792 		atid->cleanup_inprogress = 0;
4793 		ath_tx_tid_resume(sc, atid);
4794 	}
4795 
4796 	/* Send BAR if required */
4797 	/* XXX why would we send a BAR when transitioning to non-aggregation? */
4798 	/*
4799 	 * XXX TODO: we should likely just tear down the BAR state here,
4800 	 * rather than sending a BAR.
4801 	 */
4802 	if (ath_tx_tid_bar_tx_ready(sc, atid))
4803 		ath_tx_tid_bar_tx(sc, atid);
4804 
4805 	ATH_TX_UNLOCK(sc);
4806 
4807 	/* Handle frame completion as individual frames */
4808 	bf = bf_first;
4809 	while (bf) {
4810 		bf_next = bf->bf_next;
4811 		bf->bf_next = NULL;
4812 		ath_tx_default_comp(sc, bf, 1);
4813 		bf = bf_next;
4814 	}
4815 }
4816 
4817 /*
4818  * Handle completion of an set of aggregate frames.
4819  *
4820  * Note: the completion handler is the last descriptor in the aggregate,
4821  * not the last descriptor in the first frame.
4822  */
4823 static void
4824 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first,
4825     int fail)
4826 {
4827 	//struct ath_desc *ds = bf->bf_lastds;
4828 	struct ieee80211_node *ni = bf_first->bf_node;
4829 	struct ath_node *an = ATH_NODE(ni);
4830 	int tid = bf_first->bf_state.bfs_tid;
4831 	struct ath_tid *atid = &an->an_tid[tid];
4832 	struct ath_tx_status ts;
4833 	struct ieee80211_tx_ampdu *tap;
4834 	ath_bufhead bf_q;
4835 	ath_bufhead bf_cq;
4836 	int seq_st, tx_ok;
4837 	int hasba, isaggr;
4838 	uint32_t ba[2];
4839 	struct ath_buf *bf, *bf_next;
4840 	int ba_index;
4841 	int drops = 0;
4842 	int nframes = 0, nbad = 0, nf;
4843 	int pktlen;
4844 	int agglen, rc_agglen;
4845 	/* XXX there's too much on the stack? */
4846 	struct ath_rc_series rc[ATH_RC_NUM];
4847 	int txseq;
4848 
4849 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n",
4850 	    __func__, atid->hwq_depth);
4851 
4852 	/*
4853 	 * Take a copy; this may be needed -after- bf_first
4854 	 * has been completed and freed.
4855 	 */
4856 	ts = bf_first->bf_status.ds_txstat;
4857 	agglen = bf_first->bf_state.bfs_al;
4858 	rc_agglen = bf_first->bf_state.bfs_rc_maxpktlen;
4859 
4860 	TAILQ_INIT(&bf_q);
4861 	TAILQ_INIT(&bf_cq);
4862 
4863 	/* The TID state is kept behind the TXQ lock */
4864 	ATH_TX_LOCK(sc);
4865 
4866 	atid->hwq_depth--;
4867 	if (atid->hwq_depth < 0)
4868 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n",
4869 		    __func__, atid->hwq_depth);
4870 
4871 	/*
4872 	 * If the TID is filtered, handle completing the filter
4873 	 * transition before potentially kicking it to the cleanup
4874 	 * function.
4875 	 *
4876 	 * XXX this is duplicate work, ew.
4877 	 */
4878 	if (atid->isfiltered)
4879 		ath_tx_tid_filt_comp_complete(sc, atid);
4880 
4881 	/*
4882 	 * Punt cleanup to the relevant function, not our problem now
4883 	 */
4884 	if (atid->cleanup_inprogress) {
4885 		if (atid->isfiltered)
4886 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4887 			    "%s: isfiltered=1, normal_comp?\n",
4888 			    __func__);
4889 		ATH_TX_UNLOCK(sc);
4890 		ath_tx_comp_cleanup_aggr(sc, bf_first);
4891 		return;
4892 	}
4893 
4894 	/*
4895 	 * If the frame is filtered, transition to filtered frame
4896 	 * mode and add this to the filtered frame list.
4897 	 *
4898 	 * XXX TODO: figure out how this interoperates with
4899 	 * BAR, pause and cleanup states.
4900 	 */
4901 	if ((ts.ts_status & HAL_TXERR_FILT) ||
4902 	    (ts.ts_status != 0 && atid->isfiltered)) {
4903 		if (fail != 0)
4904 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4905 			    "%s: isfiltered=1, fail=%d\n", __func__, fail);
4906 		ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq);
4907 
4908 		/* Remove from BAW */
4909 		TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) {
4910 			if (bf->bf_state.bfs_addedbaw)
4911 				drops++;
4912 			if (bf->bf_state.bfs_dobaw) {
4913 				ath_tx_update_baw(sc, an, atid, bf);
4914 				if (!bf->bf_state.bfs_addedbaw)
4915 					DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4916 					    "%s: wasn't added: seqno %d\n",
4917 					    __func__,
4918 					    SEQNO(bf->bf_state.bfs_seqno));
4919 			}
4920 			bf->bf_state.bfs_dobaw = 0;
4921 		}
4922 		/*
4923 		 * If any intermediate frames in the BAW were dropped when
4924 		 * handling filtering things, send a BAR.
4925 		 */
4926 		if (drops)
4927 			ath_tx_tid_bar_suspend(sc, atid);
4928 
4929 		/*
4930 		 * Finish up by sending a BAR if required and freeing
4931 		 * the frames outside of the TX lock.
4932 		 */
4933 		goto finish_send_bar;
4934 	}
4935 
4936 	/*
4937 	 * XXX for now, use the first frame in the aggregate for
4938 	 * XXX rate control completion; it's at least consistent.
4939 	 */
4940 	pktlen = bf_first->bf_state.bfs_pktlen;
4941 
4942 	/*
4943 	 * Handle errors first!
4944 	 *
4945 	 * Here, handle _any_ error as a "exceeded retries" error.
4946 	 * Later on (when filtered frames are to be specially handled)
4947 	 * it'll have to be expanded.
4948 	 */
4949 #if 0
4950 	if (ts.ts_status & HAL_TXERR_XRETRY) {
4951 #endif
4952 	if (ts.ts_status != 0) {
4953 		ATH_TX_UNLOCK(sc);
4954 		ath_tx_comp_aggr_error(sc, bf_first, atid);
4955 		return;
4956 	}
4957 
4958 	tap = ath_tx_get_tx_tid(an, tid);
4959 
4960 	/*
4961 	 * extract starting sequence and block-ack bitmap
4962 	 */
4963 	/* XXX endian-ness of seq_st, ba? */
4964 	seq_st = ts.ts_seqnum;
4965 	hasba = !! (ts.ts_flags & HAL_TX_BA);
4966 	tx_ok = (ts.ts_status == 0);
4967 	isaggr = bf_first->bf_state.bfs_aggr;
4968 	ba[0] = ts.ts_ba_low;
4969 	ba[1] = ts.ts_ba_high;
4970 
4971 	/*
4972 	 * Copy the TX completion status and the rate control
4973 	 * series from the first descriptor, as it may be freed
4974 	 * before the rate control code can get its grubby fingers
4975 	 * into things.
4976 	 */
4977 	memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc));
4978 
4979 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
4980 	    "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, "
4981 	    "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n",
4982 	    __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags,
4983 	    isaggr, seq_st, hasba, ba[0], ba[1]);
4984 
4985 	/*
4986 	 * The reference driver doesn't do this; it simply ignores
4987 	 * this check in its entirety.
4988 	 *
4989 	 * I've seen this occur when using iperf to send traffic
4990 	 * out tid 1 - the aggregate frames are all marked as TID 1,
4991 	 * but the TXSTATUS has TID=0.  So, let's just ignore this
4992 	 * check.
4993 	 */
4994 #if 0
4995 	/* Occasionally, the MAC sends a tx status for the wrong TID. */
4996 	if (tid != ts.ts_tid) {
4997 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n",
4998 		    __func__, tid, ts.ts_tid);
4999 		tx_ok = 0;
5000 	}
5001 #endif
5002 
5003 	/* AR5416 BA bug; this requires an interface reset */
5004 	if (isaggr && tx_ok && (! hasba)) {
5005 		device_printf(sc->sc_dev,
5006 		    "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, "
5007 		    "seq_st=%d\n",
5008 		    __func__, hasba, tx_ok, isaggr, seq_st);
5009 		taskqueue_enqueue(sc->sc_tq, &sc->sc_fataltask);
5010 		/* And as we can't really trust the BA here .. */
5011 		ba[0] = 0;
5012 		ba[1] = 0;
5013 		seq_st = 0;
5014 #ifdef ATH_DEBUG
5015 		ath_printtxbuf(sc, bf_first,
5016 		    sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0);
5017 #endif
5018 	}
5019 
5020 	/*
5021 	 * Walk the list of frames, figure out which ones were correctly
5022 	 * sent and which weren't.
5023 	 */
5024 	bf = bf_first;
5025 	nf = bf_first->bf_state.bfs_nframes;
5026 
5027 	/* bf_first is going to be invalid once this list is walked */
5028 	bf_first = NULL;
5029 
5030 	/*
5031 	 * Walk the list of completed frames and determine
5032 	 * which need to be completed and which need to be
5033 	 * retransmitted.
5034 	 *
5035 	 * For completed frames, the completion functions need
5036 	 * to be called at the end of this function as the last
5037 	 * node reference may free the node.
5038 	 *
5039 	 * Finally, since the TXQ lock can't be held during the
5040 	 * completion callback (to avoid lock recursion),
5041 	 * the completion calls have to be done outside of the
5042 	 * lock.
5043 	 */
5044 	while (bf) {
5045 		nframes++;
5046 		ba_index = ATH_BA_INDEX(seq_st,
5047 		    SEQNO(bf->bf_state.bfs_seqno));
5048 		bf_next = bf->bf_next;
5049 		bf->bf_next = NULL;	/* Remove it from the aggr list */
5050 
5051 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5052 		    "%s: checking bf=%p seqno=%d; ack=%d\n",
5053 		    __func__, bf, SEQNO(bf->bf_state.bfs_seqno),
5054 		    ATH_BA_ISSET(ba, ba_index));
5055 
5056 		if (tx_ok && ATH_BA_ISSET(ba, ba_index)) {
5057 			sc->sc_stats.ast_tx_aggr_ok++;
5058 			ath_tx_update_baw(sc, an, atid, bf);
5059 			bf->bf_state.bfs_dobaw = 0;
5060 			if (!bf->bf_state.bfs_addedbaw)
5061 				DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5062 				    "%s: wasn't added: seqno %d\n",
5063 				    __func__, SEQNO(bf->bf_state.bfs_seqno));
5064 			bf->bf_next = NULL;
5065 			TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
5066 		} else {
5067 			sc->sc_stats.ast_tx_aggr_fail++;
5068 			if (ath_tx_retry_subframe(sc, bf, &bf_q)) {
5069 				drops++;
5070 				bf->bf_next = NULL;
5071 				TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list);
5072 			}
5073 			nbad++;
5074 		}
5075 		bf = bf_next;
5076 	}
5077 
5078 	/*
5079 	 * Now that the BAW updates have been done, unlock
5080 	 *
5081 	 * txseq is grabbed before the lock is released so we
5082 	 * have a consistent view of what -was- in the BAW.
5083 	 * Anything after this point will not yet have been
5084 	 * TXed.
5085 	 */
5086 	txseq = tap->txa_start;
5087 	ATH_TX_UNLOCK(sc);
5088 
5089 	if (nframes != nf)
5090 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5091 		    "%s: num frames seen=%d; bf nframes=%d\n",
5092 		    __func__, nframes, nf);
5093 
5094 	/*
5095 	 * Now we know how many frames were bad, call the rate
5096 	 * control code.
5097 	 */
5098 	if (fail == 0) {
5099 		ath_tx_update_ratectrl(sc, ni, rc, &ts, agglen, rc_agglen,
5100 		    nframes, nbad);
5101 	}
5102 
5103 	/*
5104 	 * send bar if we dropped any frames
5105 	 */
5106 	if (drops) {
5107 		/* Suspend the TX queue and get ready to send the BAR */
5108 		ATH_TX_LOCK(sc);
5109 		ath_tx_tid_bar_suspend(sc, atid);
5110 		ATH_TX_UNLOCK(sc);
5111 	}
5112 
5113 	DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5114 	    "%s: txa_start now %d\n", __func__, tap->txa_start);
5115 
5116 	ATH_TX_LOCK(sc);
5117 
5118 	/* Prepend all frames to the beginning of the queue */
5119 	while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) {
5120 		TAILQ_REMOVE(&bf_q, bf, bf_list);
5121 		ATH_TID_INSERT_HEAD(atid, bf, bf_list);
5122 	}
5123 
5124 	/*
5125 	 * Reschedule to grab some further frames.
5126 	 */
5127 	ath_tx_tid_sched(sc, atid);
5128 
5129 	/*
5130 	 * If the queue is filtered, re-schedule as required.
5131 	 *
5132 	 * This is required as there may be a subsequent TX descriptor
5133 	 * for this end-node that has CLRDMASK set, so it's quite possible
5134 	 * that a filtered frame will be followed by a non-filtered
5135 	 * (complete or otherwise) frame.
5136 	 *
5137 	 * XXX should we do this before we complete the frame?
5138 	 */
5139 	if (atid->isfiltered)
5140 		ath_tx_tid_filt_comp_complete(sc, atid);
5141 
5142 finish_send_bar:
5143 
5144 	/*
5145 	 * Send BAR if required
5146 	 */
5147 	if (ath_tx_tid_bar_tx_ready(sc, atid))
5148 		ath_tx_tid_bar_tx(sc, atid);
5149 
5150 	ATH_TX_UNLOCK(sc);
5151 
5152 	/* Do deferred completion */
5153 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
5154 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
5155 		ath_tx_default_comp(sc, bf, 0);
5156 	}
5157 }
5158 
5159 /*
5160  * Handle completion of unaggregated frames in an ADDBA
5161  * session.
5162  *
5163  * Fail is set to 1 if the entry is being freed via a call to
5164  * ath_tx_draintxq().
5165  */
5166 static void
5167 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail)
5168 {
5169 	struct ieee80211_node *ni = bf->bf_node;
5170 	struct ath_node *an = ATH_NODE(ni);
5171 	int tid = bf->bf_state.bfs_tid;
5172 	struct ath_tid *atid = &an->an_tid[tid];
5173 	struct ath_tx_status ts;
5174 	int drops = 0;
5175 
5176 	/*
5177 	 * Take a copy of this; filtering/cloning the frame may free the
5178 	 * bf pointer.
5179 	 */
5180 	ts = bf->bf_status.ds_txstat;
5181 
5182 	/*
5183 	 * Update rate control status here, before we possibly
5184 	 * punt to retry or cleanup.
5185 	 *
5186 	 * Do it outside of the TXQ lock.
5187 	 */
5188 	if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0))
5189 		ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc,
5190 		    &bf->bf_status.ds_txstat,
5191 		    bf->bf_state.bfs_pktlen,
5192 		    bf->bf_state.bfs_pktlen,
5193 		    1, (ts.ts_status == 0) ? 0 : 1);
5194 
5195 	/*
5196 	 * This is called early so atid->hwq_depth can be tracked.
5197 	 * This unfortunately means that it's released and regrabbed
5198 	 * during retry and cleanup. That's rather inefficient.
5199 	 */
5200 	ATH_TX_LOCK(sc);
5201 
5202 	if (tid == IEEE80211_NONQOS_TID)
5203 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__);
5204 
5205 	DPRINTF(sc, ATH_DEBUG_SW_TX,
5206 	    "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n",
5207 	    __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth,
5208 	    SEQNO(bf->bf_state.bfs_seqno));
5209 
5210 	atid->hwq_depth--;
5211 	if (atid->hwq_depth < 0)
5212 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n",
5213 		    __func__, atid->hwq_depth);
5214 
5215 	/*
5216 	 * If the TID is filtered, handle completing the filter
5217 	 * transition before potentially kicking it to the cleanup
5218 	 * function.
5219 	 */
5220 	if (atid->isfiltered)
5221 		ath_tx_tid_filt_comp_complete(sc, atid);
5222 
5223 	/*
5224 	 * If a cleanup is in progress, punt to comp_cleanup;
5225 	 * rather than handling it here. It's thus their
5226 	 * responsibility to clean up, call the completion
5227 	 * function in net80211, etc.
5228 	 */
5229 	if (atid->cleanup_inprogress) {
5230 		if (atid->isfiltered)
5231 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5232 			    "%s: isfiltered=1, normal_comp?\n",
5233 			    __func__);
5234 		ATH_TX_UNLOCK(sc);
5235 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n",
5236 		    __func__);
5237 		ath_tx_comp_cleanup_unaggr(sc, bf);
5238 		return;
5239 	}
5240 
5241 	/*
5242 	 * XXX TODO: how does cleanup, BAR and filtered frame handling
5243 	 * overlap?
5244 	 *
5245 	 * If the frame is filtered OR if it's any failure but
5246 	 * the TID is filtered, the frame must be added to the
5247 	 * filtered frame list.
5248 	 *
5249 	 * However - a busy buffer can't be added to the filtered
5250 	 * list as it will end up being recycled without having
5251 	 * been made available for the hardware.
5252 	 */
5253 	if ((ts.ts_status & HAL_TXERR_FILT) ||
5254 	    (ts.ts_status != 0 && atid->isfiltered)) {
5255 		int freeframe;
5256 
5257 		if (fail != 0)
5258 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5259 			    "%s: isfiltered=1, fail=%d\n",
5260 			    __func__, fail);
5261 		freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf);
5262 		/*
5263 		 * If freeframe=0 then bf is no longer ours; don't
5264 		 * touch it.
5265 		 */
5266 		if (freeframe) {
5267 			/* Remove from BAW */
5268 			if (bf->bf_state.bfs_addedbaw)
5269 				drops++;
5270 			if (bf->bf_state.bfs_dobaw) {
5271 				ath_tx_update_baw(sc, an, atid, bf);
5272 				if (!bf->bf_state.bfs_addedbaw)
5273 					DPRINTF(sc, ATH_DEBUG_SW_TX,
5274 					    "%s: wasn't added: seqno %d\n",
5275 					    __func__, SEQNO(bf->bf_state.bfs_seqno));
5276 			}
5277 			bf->bf_state.bfs_dobaw = 0;
5278 		}
5279 
5280 		/*
5281 		 * If the frame couldn't be filtered, treat it as a drop and
5282 		 * prepare to send a BAR.
5283 		 */
5284 		if (freeframe && drops)
5285 			ath_tx_tid_bar_suspend(sc, atid);
5286 
5287 		/*
5288 		 * Send BAR if required
5289 		 */
5290 		if (ath_tx_tid_bar_tx_ready(sc, atid))
5291 			ath_tx_tid_bar_tx(sc, atid);
5292 
5293 		ATH_TX_UNLOCK(sc);
5294 		/*
5295 		 * If freeframe is set, then the frame couldn't be
5296 		 * cloned and bf is still valid.  Just complete/free it.
5297 		 */
5298 		if (freeframe)
5299 			ath_tx_default_comp(sc, bf, fail);
5300 
5301 		return;
5302 	}
5303 	/*
5304 	 * Don't bother with the retry check if all frames
5305 	 * are being failed (eg during queue deletion.)
5306 	 */
5307 #if 0
5308 	if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) {
5309 #endif
5310 	if (fail == 0 && ts.ts_status != 0) {
5311 		ATH_TX_UNLOCK(sc);
5312 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n",
5313 		    __func__);
5314 		ath_tx_aggr_retry_unaggr(sc, bf);
5315 		return;
5316 	}
5317 
5318 	/* Success? Complete */
5319 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n",
5320 	    __func__, tid, SEQNO(bf->bf_state.bfs_seqno));
5321 	if (bf->bf_state.bfs_dobaw) {
5322 		ath_tx_update_baw(sc, an, atid, bf);
5323 		bf->bf_state.bfs_dobaw = 0;
5324 		if (!bf->bf_state.bfs_addedbaw)
5325 			DPRINTF(sc, ATH_DEBUG_SW_TX,
5326 			    "%s: wasn't added: seqno %d\n",
5327 			    __func__, SEQNO(bf->bf_state.bfs_seqno));
5328 	}
5329 
5330 	/*
5331 	 * If the queue is filtered, re-schedule as required.
5332 	 *
5333 	 * This is required as there may be a subsequent TX descriptor
5334 	 * for this end-node that has CLRDMASK set, so it's quite possible
5335 	 * that a filtered frame will be followed by a non-filtered
5336 	 * (complete or otherwise) frame.
5337 	 *
5338 	 * XXX should we do this before we complete the frame?
5339 	 */
5340 	if (atid->isfiltered)
5341 		ath_tx_tid_filt_comp_complete(sc, atid);
5342 
5343 	/*
5344 	 * Send BAR if required
5345 	 */
5346 	if (ath_tx_tid_bar_tx_ready(sc, atid))
5347 		ath_tx_tid_bar_tx(sc, atid);
5348 
5349 	ATH_TX_UNLOCK(sc);
5350 
5351 	ath_tx_default_comp(sc, bf, fail);
5352 	/* bf is freed at this point */
5353 }
5354 
5355 void
5356 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail)
5357 {
5358 	if (bf->bf_state.bfs_aggr)
5359 		ath_tx_aggr_comp_aggr(sc, bf, fail);
5360 	else
5361 		ath_tx_aggr_comp_unaggr(sc, bf, fail);
5362 }
5363 
5364 /*
5365  * Grab the software queue depth that we COULD transmit.
5366  *
5367  * This includes checks if it's in the BAW, whether it's a frame
5368  * that is supposed to be in the BAW.  Other checks could be done;
5369  * but for now let's try and avoid doing the whole of ath_tx_form_aggr()
5370  * here.
5371  */
5372 static int
5373 ath_tx_tid_swq_depth_bytes(struct ath_softc *sc, struct ath_node *an,
5374     struct ath_tid *tid)
5375 {
5376 	struct ath_buf *bf;
5377 	struct ieee80211_tx_ampdu *tap;
5378 	int nbytes = 0;
5379 
5380 	ATH_TX_LOCK_ASSERT(sc);
5381 
5382 	tap = ath_tx_get_tx_tid(an, tid->tid);
5383 
5384 	/*
5385 	 * Iterate over each buffer and sum the pkt_len.
5386 	 * Bail if we exceed ATH_AGGR_MAXSIZE bytes; we won't
5387 	 * ever queue more than that in a single frame.
5388 	 */
5389 	TAILQ_FOREACH(bf, &tid->tid_q, bf_list) {
5390 		/*
5391 		 * TODO: I'm not sure if we're going to hit cases where
5392 		 * no frames get sent because the list is empty.
5393 		 */
5394 
5395 		/* Check if it's in the BAW */
5396 		if (tap != NULL && (! BAW_WITHIN(tap->txa_start, tap->txa_wnd,
5397 		    SEQNO(bf->bf_state.bfs_seqno)))) {
5398 			break;
5399 		}
5400 
5401 		/* Check if it's even supposed to be in the BAW */
5402 		if (! bf->bf_state.bfs_dobaw) {
5403 			break;
5404 		}
5405 
5406 		nbytes += bf->bf_state.bfs_pktlen;
5407 		if (nbytes >= ATH_AGGR_MAXSIZE)
5408 			break;
5409 
5410 		/*
5411 		 * Check if we're likely going to leak a frame
5412 		 * as part of a PSPOLL.  Break out at this point;
5413 		 * we're only going to send a single frame anyway.
5414 		 */
5415 		if (an->an_leak_count) {
5416 			break;
5417 		}
5418 	}
5419 
5420 	return MIN(nbytes, ATH_AGGR_MAXSIZE);
5421 }
5422 
5423 /*
5424  * Schedule some packets from the given node/TID to the hardware.
5425  *
5426  * This is the aggregate version.
5427  */
5428 void
5429 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an,
5430     struct ath_tid *tid)
5431 {
5432 	struct ath_buf *bf;
5433 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5434 	struct ieee80211_tx_ampdu *tap;
5435 	ATH_AGGR_STATUS status;
5436 	ath_bufhead bf_q;
5437 	int swq_pktbytes;
5438 
5439 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid);
5440 	ATH_TX_LOCK_ASSERT(sc);
5441 
5442 	/*
5443 	 * XXX TODO: If we're called for a queue that we're leaking frames to,
5444 	 * ensure we only leak one.
5445 	 */
5446 
5447 	tap = ath_tx_get_tx_tid(an, tid->tid);
5448 
5449 	if (tid->tid == IEEE80211_NONQOS_TID)
5450 		DPRINTF(sc, ATH_DEBUG_SW_TX,
5451 		    "%s: called for TID=NONQOS_TID?\n", __func__);
5452 
5453 	for (;;) {
5454 		status = ATH_AGGR_DONE;
5455 
5456 		/*
5457 		 * If the upper layer has paused the TID, don't
5458 		 * queue any further packets.
5459 		 *
5460 		 * This can also occur from the completion task because
5461 		 * of packet loss; but as its serialised with this code,
5462 		 * it won't "appear" half way through queuing packets.
5463 		 */
5464 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5465 			break;
5466 
5467 		bf = ATH_TID_FIRST(tid);
5468 		if (bf == NULL) {
5469 			break;
5470 		}
5471 
5472 		/*
5473 		 * If the packet doesn't fall within the BAW (eg a NULL
5474 		 * data frame), schedule it directly; continue.
5475 		 */
5476 		if (! bf->bf_state.bfs_dobaw) {
5477 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5478 			    "%s: non-baw packet\n",
5479 			    __func__);
5480 			ATH_TID_REMOVE(tid, bf, bf_list);
5481 
5482 			if (bf->bf_state.bfs_nframes > 1)
5483 				DPRINTF(sc, ATH_DEBUG_SW_TX,
5484 				    "%s: aggr=%d, nframes=%d\n",
5485 				    __func__,
5486 				    bf->bf_state.bfs_aggr,
5487 				    bf->bf_state.bfs_nframes);
5488 
5489 			/*
5490 			 * This shouldn't happen - such frames shouldn't
5491 			 * ever have been queued as an aggregate in the
5492 			 * first place.  However, make sure the fields
5493 			 * are correctly setup just to be totally sure.
5494 			 */
5495 			bf->bf_state.bfs_aggr = 0;
5496 			bf->bf_state.bfs_nframes = 1;
5497 
5498 			/* Update CLRDMASK just before this frame is queued */
5499 			ath_tx_update_clrdmask(sc, tid, bf);
5500 
5501 			ath_tx_do_ratelookup(sc, bf, tid->tid,
5502 			    bf->bf_state.bfs_pktlen, false);
5503 			ath_tx_calc_duration(sc, bf);
5504 			ath_tx_calc_protection(sc, bf);
5505 			ath_tx_set_rtscts(sc, bf);
5506 			ath_tx_rate_fill_rcflags(sc, bf);
5507 			ath_tx_setds(sc, bf);
5508 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5509 
5510 			sc->sc_aggr_stats.aggr_nonbaw_pkt++;
5511 
5512 			/* Queue the packet; continue */
5513 			goto queuepkt;
5514 		}
5515 
5516 		TAILQ_INIT(&bf_q);
5517 
5518 		/*
5519 		 * Loop over the swq to find out how long
5520 		 * each packet is (up until 64k) and provide that
5521 		 * to the rate control lookup.
5522 		 */
5523 		swq_pktbytes = ath_tx_tid_swq_depth_bytes(sc, an, tid);
5524 		ath_tx_do_ratelookup(sc, bf, tid->tid, swq_pktbytes, true);
5525 
5526 		/*
5527 		 * Note this only is used for the fragment paths and
5528 		 * should really be rethought out if we want to do
5529 		 * things like an RTS burst across >1 aggregate.
5530 		 */
5531 		ath_tx_calc_duration(sc, bf);
5532 		ath_tx_calc_protection(sc, bf);
5533 
5534 		ath_tx_set_rtscts(sc, bf);
5535 		ath_tx_rate_fill_rcflags(sc, bf);
5536 
5537 		status = ath_tx_form_aggr(sc, an, tid, &bf_q);
5538 
5539 		DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5540 		    "%s: ath_tx_form_aggr() status=%d\n", __func__, status);
5541 
5542 		/*
5543 		 * No frames to be picked up - out of BAW
5544 		 */
5545 		if (TAILQ_EMPTY(&bf_q))
5546 			break;
5547 
5548 		/*
5549 		 * This assumes that the descriptor list in the ath_bufhead
5550 		 * are already linked together via bf_next pointers.
5551 		 */
5552 		bf = TAILQ_FIRST(&bf_q);
5553 
5554 		if (status == ATH_AGGR_8K_LIMITED)
5555 			sc->sc_aggr_stats.aggr_rts_aggr_limited++;
5556 
5557 		/*
5558 		 * If it's the only frame send as non-aggregate
5559 		 * assume that ath_tx_form_aggr() has checked
5560 		 * whether it's in the BAW and added it appropriately.
5561 		 */
5562 		if (bf->bf_state.bfs_nframes == 1) {
5563 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5564 			    "%s: single-frame aggregate\n", __func__);
5565 
5566 			/* Update CLRDMASK just before this frame is queued */
5567 			ath_tx_update_clrdmask(sc, tid, bf);
5568 
5569 			bf->bf_state.bfs_aggr = 0;
5570 			bf->bf_state.bfs_ndelim = 0;
5571 			ath_tx_setds(sc, bf);
5572 			ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc);
5573 			if (status == ATH_AGGR_BAW_CLOSED)
5574 				sc->sc_aggr_stats.aggr_baw_closed_single_pkt++;
5575 			else
5576 				sc->sc_aggr_stats.aggr_single_pkt++;
5577 		} else {
5578 			DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR,
5579 			    "%s: multi-frame aggregate: %d frames, "
5580 			    "length %d\n",
5581 			     __func__, bf->bf_state.bfs_nframes,
5582 			    bf->bf_state.bfs_al);
5583 			bf->bf_state.bfs_aggr = 1;
5584 			sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++;
5585 			sc->sc_aggr_stats.aggr_aggr_pkt++;
5586 
5587 			/* Update CLRDMASK just before this frame is queued */
5588 			ath_tx_update_clrdmask(sc, tid, bf);
5589 
5590 			/*
5591 			 * Calculate the duration/protection as required.
5592 			 */
5593 			ath_tx_calc_duration(sc, bf);
5594 			ath_tx_calc_protection(sc, bf);
5595 
5596 			/*
5597 			 * Update the rate and rtscts information based on the
5598 			 * rate decision made by the rate control code;
5599 			 * the first frame in the aggregate needs it.
5600 			 */
5601 			ath_tx_set_rtscts(sc, bf);
5602 
5603 			/*
5604 			 * Setup the relevant descriptor fields
5605 			 * for aggregation. The first descriptor
5606 			 * already points to the rest in the chain.
5607 			 */
5608 			ath_tx_setds_11n(sc, bf);
5609 		}
5610 	queuepkt:
5611 		/* Set completion handler, multi-frame aggregate or not */
5612 		bf->bf_comp = ath_tx_aggr_comp;
5613 
5614 		if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID)
5615 			DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__);
5616 
5617 		/*
5618 		 * Update leak count and frame config if were leaking frames.
5619 		 *
5620 		 * XXX TODO: it should update all frames in an aggregate
5621 		 * correctly!
5622 		 */
5623 		ath_tx_leak_count_update(sc, tid, bf);
5624 
5625 		/* Punt to txq */
5626 		ath_tx_handoff(sc, txq, bf);
5627 
5628 		/* Track outstanding buffer count to hardware */
5629 		/* aggregates are "one" buffer */
5630 		tid->hwq_depth++;
5631 
5632 		/*
5633 		 * Break out if ath_tx_form_aggr() indicated
5634 		 * there can't be any further progress (eg BAW is full.)
5635 		 * Checking for an empty txq is done above.
5636 		 *
5637 		 * XXX locking on txq here?
5638 		 */
5639 		/* XXX TXQ locking */
5640 		if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr ||
5641 		    (status == ATH_AGGR_BAW_CLOSED ||
5642 		     status == ATH_AGGR_LEAK_CLOSED))
5643 			break;
5644 	}
5645 }
5646 
5647 /*
5648  * Schedule some packets from the given node/TID to the hardware.
5649  *
5650  * XXX TODO: this routine doesn't enforce the maximum TXQ depth.
5651  * It just dumps frames into the TXQ.  We should limit how deep
5652  * the transmit queue can grow for frames dispatched to the given
5653  * TXQ.
5654  *
5655  * To avoid locking issues, either we need to own the TXQ lock
5656  * at this point, or we need to pass in the maximum frame count
5657  * from the caller.
5658  */
5659 void
5660 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an,
5661     struct ath_tid *tid)
5662 {
5663 	struct ath_buf *bf;
5664 	struct ath_txq *txq = sc->sc_ac2q[tid->ac];
5665 
5666 	DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n",
5667 	    __func__, an, tid->tid);
5668 
5669 	ATH_TX_LOCK_ASSERT(sc);
5670 
5671 	/* Check - is AMPDU pending or running? then print out something */
5672 	if (ath_tx_ampdu_pending(sc, an, tid->tid))
5673 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n",
5674 		    __func__, tid->tid);
5675 	if (ath_tx_ampdu_running(sc, an, tid->tid))
5676 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n",
5677 		    __func__, tid->tid);
5678 
5679 	for (;;) {
5680 		/*
5681 		 * If the upper layers have paused the TID, don't
5682 		 * queue any further packets.
5683 		 *
5684 		 * XXX if we are leaking frames, make sure we decrement
5685 		 * that counter _and_ we continue here.
5686 		 */
5687 		if (! ath_tx_tid_can_tx_or_sched(sc, tid))
5688 			break;
5689 
5690 		bf = ATH_TID_FIRST(tid);
5691 		if (bf == NULL) {
5692 			break;
5693 		}
5694 
5695 		ATH_TID_REMOVE(tid, bf, bf_list);
5696 
5697 		/* Sanity check! */
5698 		if (tid->tid != bf->bf_state.bfs_tid) {
5699 			DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !="
5700 			    " tid %d\n", __func__, bf->bf_state.bfs_tid,
5701 			    tid->tid);
5702 		}
5703 		/* Normal completion handler */
5704 		bf->bf_comp = ath_tx_normal_comp;
5705 
5706 		/*
5707 		 * Override this for now, until the non-aggregate
5708 		 * completion handler correctly handles software retransmits.
5709 		 */
5710 		bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK;
5711 
5712 		/* Update CLRDMASK just before this frame is queued */
5713 		ath_tx_update_clrdmask(sc, tid, bf);
5714 
5715 		/* Program descriptors + rate control */
5716 		ath_tx_do_ratelookup(sc, bf, tid->tid,
5717 		    bf->bf_state.bfs_pktlen, false);
5718 		ath_tx_calc_duration(sc, bf);
5719 		ath_tx_calc_protection(sc, bf);
5720 		ath_tx_set_rtscts(sc, bf);
5721 		ath_tx_rate_fill_rcflags(sc, bf);
5722 		ath_tx_setds(sc, bf);
5723 
5724 		/*
5725 		 * Update the current leak count if
5726 		 * we're leaking frames; and set the
5727 		 * MORE flag as appropriate.
5728 		 */
5729 		ath_tx_leak_count_update(sc, tid, bf);
5730 
5731 		/* Track outstanding buffer count to hardware */
5732 		/* aggregates are "one" buffer */
5733 		tid->hwq_depth++;
5734 
5735 		/* Punt to hardware or software txq */
5736 		ath_tx_handoff(sc, txq, bf);
5737 	}
5738 }
5739 
5740 /*
5741  * Schedule some packets to the given hardware queue.
5742  *
5743  * This function walks the list of TIDs (ie, ath_node TIDs
5744  * with queued traffic) and attempts to schedule traffic
5745  * from them.
5746  *
5747  * TID scheduling is implemented as a FIFO, with TIDs being
5748  * added to the end of the queue after some frames have been
5749  * scheduled.
5750  */
5751 void
5752 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq)
5753 {
5754 	struct ath_tid *tid, *next, *last;
5755 
5756 	ATH_TX_LOCK_ASSERT(sc);
5757 
5758 	/*
5759 	 * For non-EDMA chips, aggr frames that have been built are
5760 	 * in axq_aggr_depth, whether they've been scheduled or not.
5761 	 * There's no FIFO, so txq->axq_depth is what's been scheduled
5762 	 * to the hardware.
5763 	 *
5764 	 * For EDMA chips, we do it in two stages.  The existing code
5765 	 * builds a list of frames to go to the hardware and the EDMA
5766 	 * code turns it into a single entry to push into the FIFO.
5767 	 * That way we don't take up one packet per FIFO slot.
5768 	 * We do push one aggregate per FIFO slot though, just to keep
5769 	 * things simple.
5770 	 *
5771 	 * The FIFO depth is what's in the hardware; the txq->axq_depth
5772 	 * is what's been scheduled to the FIFO.
5773 	 *
5774 	 * fifo.axq_depth is the number of frames (or aggregates) pushed
5775 	 *  into the EDMA FIFO.  For multi-frame lists, this is the number
5776 	 *  of frames pushed in.
5777 	 * axq_fifo_depth is the number of FIFO slots currently busy.
5778 	 */
5779 
5780 	/* For EDMA and non-EDMA, check built/scheduled against aggr limit */
5781 	if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr) {
5782 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5783 		return;
5784 	}
5785 
5786 	/*
5787 	 * For non-EDMA chips, axq_depth is the "what's scheduled to
5788 	 * the hardware list".  For EDMA it's "What's built for the hardware"
5789 	 * and fifo.axq_depth is how many frames have been dispatched
5790 	 * already to the hardware.
5791 	 */
5792 	if (txq->axq_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_nonaggr) {
5793 		sc->sc_aggr_stats.aggr_sched_nopkt++;
5794 		return;
5795 	}
5796 
5797 	last = TAILQ_LAST(&txq->axq_tidq, axq_t_s);
5798 
5799 	TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) {
5800 		/*
5801 		 * Suspend paused queues here; they'll be resumed
5802 		 * once the addba completes or times out.
5803 		 */
5804 		DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n",
5805 		    __func__, tid->tid, tid->paused);
5806 		ath_tx_tid_unsched(sc, tid);
5807 		/*
5808 		 * This node may be in power-save and we're leaking
5809 		 * a frame; be careful.
5810 		 */
5811 		if (! ath_tx_tid_can_tx_or_sched(sc, tid)) {
5812 			goto loop_done;
5813 		}
5814 		if (ath_tx_ampdu_running(sc, tid->an, tid->tid))
5815 			ath_tx_tid_hw_queue_aggr(sc, tid->an, tid);
5816 		else
5817 			ath_tx_tid_hw_queue_norm(sc, tid->an, tid);
5818 
5819 		/* Not empty? Re-schedule */
5820 		if (tid->axq_depth != 0)
5821 			ath_tx_tid_sched(sc, tid);
5822 
5823 		/*
5824 		 * Give the software queue time to aggregate more
5825 		 * packets.  If we aren't running aggregation then
5826 		 * we should still limit the hardware queue depth.
5827 		 */
5828 		/* XXX TXQ locking */
5829 		if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) {
5830 			break;
5831 		}
5832 		if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) {
5833 			break;
5834 		}
5835 loop_done:
5836 		/*
5837 		 * If this was the last entry on the original list, stop.
5838 		 * Otherwise nodes that have been rescheduled onto the end
5839 		 * of the TID FIFO list will just keep being rescheduled.
5840 		 *
5841 		 * XXX What should we do about nodes that were paused
5842 		 * but are pending a leaking frame in response to a ps-poll?
5843 		 * They'll be put at the front of the list; so they'll
5844 		 * prematurely trigger this condition! Ew.
5845 		 */
5846 		if (tid == last)
5847 			break;
5848 	}
5849 }
5850 
5851 /*
5852  * TX addba handling
5853  */
5854 
5855 /*
5856  * Return net80211 TID struct pointer, or NULL for none
5857  */
5858 struct ieee80211_tx_ampdu *
5859 ath_tx_get_tx_tid(struct ath_node *an, int tid)
5860 {
5861 	struct ieee80211_node *ni = &an->an_node;
5862 	struct ieee80211_tx_ampdu *tap;
5863 
5864 	if (tid == IEEE80211_NONQOS_TID)
5865 		return NULL;
5866 
5867 	tap = &ni->ni_tx_ampdu[tid];
5868 	return tap;
5869 }
5870 
5871 /*
5872  * Is AMPDU-TX running?
5873  */
5874 static int
5875 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid)
5876 {
5877 	struct ieee80211_tx_ampdu *tap;
5878 
5879 	if (tid == IEEE80211_NONQOS_TID)
5880 		return 0;
5881 
5882 	tap = ath_tx_get_tx_tid(an, tid);
5883 	if (tap == NULL)
5884 		return 0;	/* Not valid; default to not running */
5885 
5886 	return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING);
5887 }
5888 
5889 /*
5890  * Is AMPDU-TX negotiation pending?
5891  */
5892 static int
5893 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid)
5894 {
5895 	struct ieee80211_tx_ampdu *tap;
5896 
5897 	if (tid == IEEE80211_NONQOS_TID)
5898 		return 0;
5899 
5900 	tap = ath_tx_get_tx_tid(an, tid);
5901 	if (tap == NULL)
5902 		return 0;	/* Not valid; default to not pending */
5903 
5904 	return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND);
5905 }
5906 
5907 /*
5908  * Is AMPDU-TX pending for the given TID?
5909  */
5910 
5911 /*
5912  * Method to handle sending an ADDBA request.
5913  *
5914  * We tap this so the relevant flags can be set to pause the TID
5915  * whilst waiting for the response.
5916  *
5917  * XXX there's no timeout handler we can override?
5918  */
5919 int
5920 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5921     int dialogtoken, int baparamset, int batimeout)
5922 {
5923 	struct ath_softc *sc = ni->ni_ic->ic_softc;
5924 	int tid = tap->txa_tid;
5925 	struct ath_node *an = ATH_NODE(ni);
5926 	struct ath_tid *atid = &an->an_tid[tid];
5927 
5928 	/*
5929 	 * XXX danger Will Robinson!
5930 	 *
5931 	 * Although the taskqueue may be running and scheduling some more
5932 	 * packets, these should all be _before_ the addba sequence number.
5933 	 * However, net80211 will keep self-assigning sequence numbers
5934 	 * until addba has been negotiated.
5935 	 *
5936 	 * In the past, these packets would be "paused" (which still works
5937 	 * fine, as they're being scheduled to the driver in the same
5938 	 * serialised method which is calling the addba request routine)
5939 	 * and when the aggregation session begins, they'll be dequeued
5940 	 * as aggregate packets and added to the BAW. However, now there's
5941 	 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these
5942 	 * packets. Thus they never get included in the BAW tracking and
5943 	 * this can cause the initial burst of packets after the addba
5944 	 * negotiation to "hang", as they quickly fall outside the BAW.
5945 	 *
5946 	 * The "eventual" solution should be to tag these packets with
5947 	 * dobaw. Although net80211 has given us a sequence number,
5948 	 * it'll be "after" the left edge of the BAW and thus it'll
5949 	 * fall within it.
5950 	 */
5951 	ATH_TX_LOCK(sc);
5952 	/*
5953 	 * This is a bit annoying.  Until net80211 HT code inherits some
5954 	 * (any) locking, we may have this called in parallel BUT only
5955 	 * one response/timeout will be called.  Grr.
5956 	 */
5957 	if (atid->addba_tx_pending == 0) {
5958 		ath_tx_tid_pause(sc, atid);
5959 		atid->addba_tx_pending = 1;
5960 	}
5961 	ATH_TX_UNLOCK(sc);
5962 
5963 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5964 	    "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n",
5965 	    __func__,
5966 	    ni->ni_macaddr,
5967 	    ":",
5968 	    dialogtoken, baparamset, batimeout);
5969 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
5970 	    "%s: txa_start=%d, ni_txseqs=%d\n",
5971 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
5972 
5973 	return sc->sc_addba_request(ni, tap, dialogtoken, baparamset,
5974 	    batimeout);
5975 }
5976 
5977 /*
5978  * Handle an ADDBA response.
5979  *
5980  * We unpause the queue so TX'ing can resume.
5981  *
5982  * Any packets TX'ed from this point should be "aggregate" (whether
5983  * aggregate or not) so the BAW is updated.
5984  *
5985  * Note! net80211 keeps self-assigning sequence numbers until
5986  * ampdu is negotiated. This means the initially-negotiated BAW left
5987  * edge won't match the ni->ni_txseq.
5988  *
5989  * So, being very dirty, the BAW left edge is "slid" here to match
5990  * ni->ni_txseq.
5991  *
5992  * What likely SHOULD happen is that all packets subsequent to the
5993  * addba request should be tagged as aggregate and queued as non-aggregate
5994  * frames; thus updating the BAW. For now though, I'll just slide the
5995  * window.
5996  */
5997 int
5998 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
5999     int status, int code, int batimeout)
6000 {
6001 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6002 	int tid = tap->txa_tid;
6003 	struct ath_node *an = ATH_NODE(ni);
6004 	struct ath_tid *atid = &an->an_tid[tid];
6005 	int r;
6006 
6007 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
6008 	    "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__,
6009 	    ni->ni_macaddr,
6010 	    ":",
6011 	    status, code, batimeout);
6012 
6013 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
6014 	    "%s: txa_start=%d, ni_txseqs=%d\n",
6015 	    __func__, tap->txa_start, ni->ni_txseqs[tid]);
6016 
6017 	/*
6018 	 * Call this first, so the interface flags get updated
6019 	 * before the TID is unpaused. Otherwise a race condition
6020 	 * exists where the unpaused TID still doesn't yet have
6021 	 * IEEE80211_AGGR_RUNNING set.
6022 	 */
6023 	r = sc->sc_addba_response(ni, tap, status, code, batimeout);
6024 
6025 	ATH_TX_LOCK(sc);
6026 	atid->addba_tx_pending = 0;
6027 	/*
6028 	 * XXX dirty!
6029 	 * Slide the BAW left edge to wherever net80211 left it for us.
6030 	 * Read above for more information.
6031 	 */
6032 	tap->txa_start = ni->ni_txseqs[tid];
6033 	ath_tx_tid_resume(sc, atid);
6034 	ATH_TX_UNLOCK(sc);
6035 	return r;
6036 }
6037 
6038 /*
6039  * Stop ADDBA on a queue.
6040  *
6041  * This can be called whilst BAR TX is currently active on the queue,
6042  * so make sure this is unblocked before continuing.
6043  */
6044 void
6045 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap)
6046 {
6047 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6048 	int tid = tap->txa_tid;
6049 	struct ath_node *an = ATH_NODE(ni);
6050 	struct ath_tid *atid = &an->an_tid[tid];
6051 	ath_bufhead bf_cq;
6052 	struct ath_buf *bf;
6053 
6054 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n",
6055 	    __func__,
6056 	    ni->ni_macaddr,
6057 	    ":");
6058 
6059 	/*
6060 	 * Pause TID traffic early, so there aren't any races
6061 	 * Unblock the pending BAR held traffic, if it's currently paused.
6062 	 */
6063 	ATH_TX_LOCK(sc);
6064 	ath_tx_tid_pause(sc, atid);
6065 	if (atid->bar_wait) {
6066 		/*
6067 		 * bar_unsuspend() expects bar_tx == 1, as it should be
6068 		 * called from the TX completion path.  This quietens
6069 		 * the warning.  It's cleared for us anyway.
6070 		 */
6071 		atid->bar_tx = 1;
6072 		ath_tx_tid_bar_unsuspend(sc, atid);
6073 	}
6074 	ATH_TX_UNLOCK(sc);
6075 
6076 	/* There's no need to hold the TXQ lock here */
6077 	sc->sc_addba_stop(ni, tap);
6078 
6079 	/*
6080 	 * ath_tx_tid_cleanup will resume the TID if possible, otherwise
6081 	 * it'll set the cleanup flag, and it'll be unpaused once
6082 	 * things have been cleaned up.
6083 	 */
6084 	TAILQ_INIT(&bf_cq);
6085 	ATH_TX_LOCK(sc);
6086 
6087 	/*
6088 	 * In case there's a followup call to this, only call it
6089 	 * if we don't have a cleanup in progress.
6090 	 *
6091 	 * Since we've paused the queue above, we need to make
6092 	 * sure we unpause if there's already a cleanup in
6093 	 * progress - it means something else is also doing
6094 	 * this stuff, so we don't need to also keep it paused.
6095 	 */
6096 	if (atid->cleanup_inprogress) {
6097 		ath_tx_tid_resume(sc, atid);
6098 	} else {
6099 		ath_tx_tid_cleanup(sc, an, tid, &bf_cq);
6100 		/*
6101 		 * Unpause the TID if no cleanup is required.
6102 		 */
6103 		if (! atid->cleanup_inprogress)
6104 			ath_tx_tid_resume(sc, atid);
6105 	}
6106 	ATH_TX_UNLOCK(sc);
6107 
6108 	/* Handle completing frames and fail them */
6109 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
6110 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
6111 		ath_tx_default_comp(sc, bf, 1);
6112 	}
6113 
6114 }
6115 
6116 /*
6117  * Handle a node reassociation.
6118  *
6119  * We may have a bunch of frames queued to the hardware; those need
6120  * to be marked as cleanup.
6121  */
6122 void
6123 ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an)
6124 {
6125 	struct ath_tid *tid;
6126 	int i;
6127 	ath_bufhead bf_cq;
6128 	struct ath_buf *bf;
6129 
6130 	TAILQ_INIT(&bf_cq);
6131 
6132 	ATH_TX_UNLOCK_ASSERT(sc);
6133 
6134 	ATH_TX_LOCK(sc);
6135 	for (i = 0; i < IEEE80211_TID_SIZE; i++) {
6136 		tid = &an->an_tid[i];
6137 		if (tid->hwq_depth == 0)
6138 			continue;
6139 		DPRINTF(sc, ATH_DEBUG_NODE,
6140 		    "%s: %6D: TID %d: cleaning up TID\n",
6141 		    __func__,
6142 		    an->an_node.ni_macaddr,
6143 		    ":",
6144 		    i);
6145 		/*
6146 		 * In case there's a followup call to this, only call it
6147 		 * if we don't have a cleanup in progress.
6148 		 */
6149 		if (! tid->cleanup_inprogress) {
6150 			ath_tx_tid_pause(sc, tid);
6151 			ath_tx_tid_cleanup(sc, an, i, &bf_cq);
6152 			/*
6153 			 * Unpause the TID if no cleanup is required.
6154 			 */
6155 			if (! tid->cleanup_inprogress)
6156 				ath_tx_tid_resume(sc, tid);
6157 		}
6158 	}
6159 	ATH_TX_UNLOCK(sc);
6160 
6161 	/* Handle completing frames and fail them */
6162 	while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) {
6163 		TAILQ_REMOVE(&bf_cq, bf, bf_list);
6164 		ath_tx_default_comp(sc, bf, 1);
6165 	}
6166 }
6167 
6168 /*
6169  * Note: net80211 bar_timeout() doesn't call this function on BAR failure;
6170  * it simply tears down the aggregation session. Ew.
6171  *
6172  * It however will call ieee80211_ampdu_stop() which will call
6173  * ic->ic_addba_stop().
6174  *
6175  * XXX This uses a hard-coded max BAR count value; the whole
6176  * XXX BAR TX success or failure should be better handled!
6177  */
6178 void
6179 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap,
6180     int status)
6181 {
6182 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6183 	int tid = tap->txa_tid;
6184 	struct ath_node *an = ATH_NODE(ni);
6185 	struct ath_tid *atid = &an->an_tid[tid];
6186 	int attempts = tap->txa_attempts;
6187 	int old_txa_start;
6188 
6189 	DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
6190 	    "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n",
6191 	    __func__,
6192 	    ni->ni_macaddr,
6193 	    ":",
6194 	    tap->txa_tid,
6195 	    atid->tid,
6196 	    status,
6197 	    attempts,
6198 	    tap->txa_start,
6199 	    tap->txa_seqpending);
6200 
6201 	/* Note: This may update the BAW details */
6202 	/*
6203 	 * XXX What if this does slide the BAW along? We need to somehow
6204 	 * XXX either fix things when it does happen, or prevent the
6205 	 * XXX seqpending value to be anything other than exactly what
6206 	 * XXX the hell we want!
6207 	 *
6208 	 * XXX So for now, how I do this inside the TX lock for now
6209 	 * XXX and just correct it afterwards? The below condition should
6210 	 * XXX never happen and if it does I need to fix all kinds of things.
6211 	 */
6212 	ATH_TX_LOCK(sc);
6213 	old_txa_start = tap->txa_start;
6214 	sc->sc_bar_response(ni, tap, status);
6215 	if (tap->txa_start != old_txa_start) {
6216 		device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n",
6217 		    __func__,
6218 		    tid,
6219 		    tap->txa_start,
6220 		    old_txa_start);
6221 	}
6222 	tap->txa_start = old_txa_start;
6223 	ATH_TX_UNLOCK(sc);
6224 
6225 	/* Unpause the TID */
6226 	/*
6227 	 * XXX if this is attempt=50, the TID will be downgraded
6228 	 * XXX to a non-aggregate session. So we must unpause the
6229 	 * XXX TID here or it'll never be done.
6230 	 *
6231 	 * Also, don't call it if bar_tx/bar_wait are 0; something
6232 	 * has beaten us to the punch? (XXX figure out what?)
6233 	 */
6234 	if (status == 0 || attempts == 50) {
6235 		ATH_TX_LOCK(sc);
6236 		if (atid->bar_tx == 0 || atid->bar_wait == 0)
6237 			DPRINTF(sc, ATH_DEBUG_SW_TX_BAR,
6238 			    "%s: huh? bar_tx=%d, bar_wait=%d\n",
6239 			    __func__,
6240 			    atid->bar_tx, atid->bar_wait);
6241 		else
6242 			ath_tx_tid_bar_unsuspend(sc, atid);
6243 		ATH_TX_UNLOCK(sc);
6244 	}
6245 }
6246 
6247 /*
6248  * This is called whenever the pending ADDBA request times out.
6249  * Unpause and reschedule the TID.
6250  */
6251 void
6252 ath_addba_response_timeout(struct ieee80211_node *ni,
6253     struct ieee80211_tx_ampdu *tap)
6254 {
6255 	struct ath_softc *sc = ni->ni_ic->ic_softc;
6256 	int tid = tap->txa_tid;
6257 	struct ath_node *an = ATH_NODE(ni);
6258 	struct ath_tid *atid = &an->an_tid[tid];
6259 
6260 	DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL,
6261 	    "%s: %6D: TID=%d, called; resuming\n",
6262 	    __func__,
6263 	    ni->ni_macaddr,
6264 	    ":",
6265 	    tid);
6266 
6267 	ATH_TX_LOCK(sc);
6268 	atid->addba_tx_pending = 0;
6269 	ATH_TX_UNLOCK(sc);
6270 
6271 	/* Note: This updates the aggregate state to (again) pending */
6272 	sc->sc_addba_response_timeout(ni, tap);
6273 
6274 	/* Unpause the TID; which reschedules it */
6275 	ATH_TX_LOCK(sc);
6276 	ath_tx_tid_resume(sc, atid);
6277 	ATH_TX_UNLOCK(sc);
6278 }
6279 
6280 /*
6281  * Check if a node is asleep or not.
6282  */
6283 int
6284 ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an)
6285 {
6286 
6287 	ATH_TX_LOCK_ASSERT(sc);
6288 
6289 	return (an->an_is_powersave);
6290 }
6291 
6292 /*
6293  * Mark a node as currently "in powersaving."
6294  * This suspends all traffic on the node.
6295  *
6296  * This must be called with the node/tx locks free.
6297  *
6298  * XXX TODO: the locking silliness below is due to how the node
6299  * locking currently works.  Right now, the node lock is grabbed
6300  * to do rate control lookups and these are done with the TX
6301  * queue lock held.  This means the node lock can't be grabbed
6302  * first here or a LOR will occur.
6303  *
6304  * Eventually (hopefully!) the TX path code will only grab
6305  * the TXQ lock when transmitting and the ath_node lock when
6306  * doing node/TID operations.  There are other complications -
6307  * the sched/unsched operations involve walking the per-txq
6308  * 'active tid' list and this requires both locks to be held.
6309  */
6310 void
6311 ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an)
6312 {
6313 	struct ath_tid *atid;
6314 	struct ath_txq *txq;
6315 	int tid;
6316 
6317 	ATH_TX_UNLOCK_ASSERT(sc);
6318 
6319 	/* Suspend all traffic on the node */
6320 	ATH_TX_LOCK(sc);
6321 
6322 	if (an->an_is_powersave) {
6323 		DPRINTF(sc, ATH_DEBUG_XMIT,
6324 		    "%s: %6D: node was already asleep!\n",
6325 		    __func__, an->an_node.ni_macaddr, ":");
6326 		ATH_TX_UNLOCK(sc);
6327 		return;
6328 	}
6329 
6330 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
6331 		atid = &an->an_tid[tid];
6332 		txq = sc->sc_ac2q[atid->ac];
6333 
6334 		ath_tx_tid_pause(sc, atid);
6335 	}
6336 
6337 	/* Mark node as in powersaving */
6338 	an->an_is_powersave = 1;
6339 
6340 	ATH_TX_UNLOCK(sc);
6341 }
6342 
6343 /*
6344  * Mark a node as currently "awake."
6345  * This resumes all traffic to the node.
6346  */
6347 void
6348 ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an)
6349 {
6350 	struct ath_tid *atid;
6351 	struct ath_txq *txq;
6352 	int tid;
6353 
6354 	ATH_TX_UNLOCK_ASSERT(sc);
6355 
6356 	ATH_TX_LOCK(sc);
6357 
6358 	/* !? */
6359 	if (an->an_is_powersave == 0) {
6360 		ATH_TX_UNLOCK(sc);
6361 		DPRINTF(sc, ATH_DEBUG_XMIT,
6362 		    "%s: an=%p: node was already awake\n",
6363 		    __func__, an);
6364 		return;
6365 	}
6366 
6367 	/* Mark node as awake */
6368 	an->an_is_powersave = 0;
6369 	/*
6370 	 * Clear any pending leaked frame requests
6371 	 */
6372 	an->an_leak_count = 0;
6373 
6374 	for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) {
6375 		atid = &an->an_tid[tid];
6376 		txq = sc->sc_ac2q[atid->ac];
6377 
6378 		ath_tx_tid_resume(sc, atid);
6379 	}
6380 	ATH_TX_UNLOCK(sc);
6381 }
6382 
6383 static int
6384 ath_legacy_dma_txsetup(struct ath_softc *sc)
6385 {
6386 
6387 	/* nothing new needed */
6388 	return (0);
6389 }
6390 
6391 static int
6392 ath_legacy_dma_txteardown(struct ath_softc *sc)
6393 {
6394 
6395 	/* nothing new needed */
6396 	return (0);
6397 }
6398 
6399 void
6400 ath_xmit_setup_legacy(struct ath_softc *sc)
6401 {
6402 	/*
6403 	 * For now, just set the descriptor length to sizeof(ath_desc);
6404 	 * worry about extracting the real length out of the HAL later.
6405 	 */
6406 	sc->sc_tx_desclen = sizeof(struct ath_desc);
6407 	sc->sc_tx_statuslen = sizeof(struct ath_desc);
6408 	sc->sc_tx_nmaps = 1;	/* only one buffer per TX desc */
6409 
6410 	sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup;
6411 	sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown;
6412 	sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func;
6413 
6414 	sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart;
6415 	sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff;
6416 
6417 	sc->sc_tx.xmit_drain = ath_legacy_tx_drain;
6418 }
6419