1 /*- 2 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 3 * Copyright (c) 2010-2012 Adrian Chadd, Xenion Pty Ltd 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer, 11 * without modification. 12 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 13 * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 14 * redistribution must be conditioned upon including a substantially 15 * similar Disclaimer requirement for further binary redistribution. 16 * 17 * NO WARRANTY 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 19 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 20 * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 21 * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 23 * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 25 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 26 * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 27 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 28 * THE POSSIBILITY OF SUCH DAMAGES. 29 */ 30 31 #include <sys/cdefs.h> 32 __FBSDID("$FreeBSD$"); 33 34 /* 35 * Driver for the Atheros Wireless LAN controller. 36 * 37 * This software is derived from work of Atsushi Onoe; his contribution 38 * is greatly appreciated. 39 */ 40 41 #include "opt_inet.h" 42 #include "opt_ath.h" 43 #include "opt_wlan.h" 44 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/sysctl.h> 48 #include <sys/mbuf.h> 49 #include <sys/malloc.h> 50 #include <sys/lock.h> 51 #include <sys/mutex.h> 52 #include <sys/kernel.h> 53 #include <sys/socket.h> 54 #include <sys/sockio.h> 55 #include <sys/errno.h> 56 #include <sys/callout.h> 57 #include <sys/bus.h> 58 #include <sys/endian.h> 59 #include <sys/kthread.h> 60 #include <sys/taskqueue.h> 61 #include <sys/priv.h> 62 #include <sys/ktr.h> 63 64 #include <machine/bus.h> 65 66 #include <net/if.h> 67 #include <net/if_var.h> 68 #include <net/if_dl.h> 69 #include <net/if_media.h> 70 #include <net/if_types.h> 71 #include <net/if_arp.h> 72 #include <net/ethernet.h> 73 #include <net/if_llc.h> 74 75 #include <net80211/ieee80211_var.h> 76 #include <net80211/ieee80211_regdomain.h> 77 #ifdef IEEE80211_SUPPORT_SUPERG 78 #include <net80211/ieee80211_superg.h> 79 #endif 80 #ifdef IEEE80211_SUPPORT_TDMA 81 #include <net80211/ieee80211_tdma.h> 82 #endif 83 #include <net80211/ieee80211_ht.h> 84 85 #include <net/bpf.h> 86 87 #ifdef INET 88 #include <netinet/in.h> 89 #include <netinet/if_ether.h> 90 #endif 91 92 #include <dev/ath/if_athvar.h> 93 #include <dev/ath/ath_hal/ah_devid.h> /* XXX for softled */ 94 #include <dev/ath/ath_hal/ah_diagcodes.h> 95 96 #include <dev/ath/if_ath_debug.h> 97 98 #ifdef ATH_TX99_DIAG 99 #include <dev/ath/ath_tx99/ath_tx99.h> 100 #endif 101 102 #include <dev/ath/if_ath_misc.h> 103 #include <dev/ath/if_ath_tx.h> 104 #include <dev/ath/if_ath_tx_ht.h> 105 106 #ifdef ATH_DEBUG_ALQ 107 #include <dev/ath/if_ath_alq.h> 108 #endif 109 110 /* 111 * How many retries to perform in software 112 */ 113 #define SWMAX_RETRIES 10 114 115 /* 116 * What queue to throw the non-QoS TID traffic into 117 */ 118 #define ATH_NONQOS_TID_AC WME_AC_VO 119 120 #if 0 121 static int ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an); 122 #endif 123 static int ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, 124 int tid); 125 static int ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, 126 int tid); 127 static ieee80211_seq ath_tx_tid_seqno_assign(struct ath_softc *sc, 128 struct ieee80211_node *ni, struct ath_buf *bf, struct mbuf *m0); 129 static int ath_tx_action_frame_override_queue(struct ath_softc *sc, 130 struct ieee80211_node *ni, struct mbuf *m0, int *tid); 131 static struct ath_buf * 132 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 133 struct ath_tid *tid, struct ath_buf *bf); 134 135 #ifdef ATH_DEBUG_ALQ 136 void 137 ath_tx_alq_post(struct ath_softc *sc, struct ath_buf *bf_first) 138 { 139 struct ath_buf *bf; 140 int i, n; 141 const char *ds; 142 143 /* XXX we should skip out early if debugging isn't enabled! */ 144 bf = bf_first; 145 146 while (bf != NULL) { 147 /* XXX should ensure bf_nseg > 0! */ 148 if (bf->bf_nseg == 0) 149 break; 150 n = ((bf->bf_nseg - 1) / sc->sc_tx_nmaps) + 1; 151 for (i = 0, ds = (const char *) bf->bf_desc; 152 i < n; 153 i++, ds += sc->sc_tx_desclen) { 154 if_ath_alq_post(&sc->sc_alq, 155 ATH_ALQ_EDMA_TXDESC, 156 sc->sc_tx_desclen, 157 ds); 158 } 159 bf = bf->bf_next; 160 } 161 } 162 #endif /* ATH_DEBUG_ALQ */ 163 164 /* 165 * Whether to use the 11n rate scenario functions or not 166 */ 167 static inline int 168 ath_tx_is_11n(struct ath_softc *sc) 169 { 170 return ((sc->sc_ah->ah_magic == 0x20065416) || 171 (sc->sc_ah->ah_magic == 0x19741014)); 172 } 173 174 /* 175 * Obtain the current TID from the given frame. 176 * 177 * Non-QoS frames need to go into TID 16 (IEEE80211_NONQOS_TID.) 178 * This has implications for which AC/priority the packet is placed 179 * in. 180 */ 181 static int 182 ath_tx_gettid(struct ath_softc *sc, const struct mbuf *m0) 183 { 184 const struct ieee80211_frame *wh; 185 int pri = M_WME_GETAC(m0); 186 187 wh = mtod(m0, const struct ieee80211_frame *); 188 if (! IEEE80211_QOS_HAS_SEQ(wh)) 189 return IEEE80211_NONQOS_TID; 190 else 191 return WME_AC_TO_TID(pri); 192 } 193 194 static void 195 ath_tx_set_retry(struct ath_softc *sc, struct ath_buf *bf) 196 { 197 struct ieee80211_frame *wh; 198 199 wh = mtod(bf->bf_m, struct ieee80211_frame *); 200 /* Only update/resync if needed */ 201 if (bf->bf_state.bfs_isretried == 0) { 202 wh->i_fc[1] |= IEEE80211_FC1_RETRY; 203 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 204 BUS_DMASYNC_PREWRITE); 205 } 206 bf->bf_state.bfs_isretried = 1; 207 bf->bf_state.bfs_retries ++; 208 } 209 210 /* 211 * Determine what the correct AC queue for the given frame 212 * should be. 213 * 214 * This code assumes that the TIDs map consistently to 215 * the underlying hardware (or software) ath_txq. 216 * Since the sender may try to set an AC which is 217 * arbitrary, non-QoS TIDs may end up being put on 218 * completely different ACs. There's no way to put a 219 * TID into multiple ath_txq's for scheduling, so 220 * for now we override the AC/TXQ selection and set 221 * non-QOS TID frames into the BE queue. 222 * 223 * This may be completely incorrect - specifically, 224 * some management frames may end up out of order 225 * compared to the QoS traffic they're controlling. 226 * I'll look into this later. 227 */ 228 static int 229 ath_tx_getac(struct ath_softc *sc, const struct mbuf *m0) 230 { 231 const struct ieee80211_frame *wh; 232 int pri = M_WME_GETAC(m0); 233 wh = mtod(m0, const struct ieee80211_frame *); 234 if (IEEE80211_QOS_HAS_SEQ(wh)) 235 return pri; 236 237 return ATH_NONQOS_TID_AC; 238 } 239 240 void 241 ath_txfrag_cleanup(struct ath_softc *sc, 242 ath_bufhead *frags, struct ieee80211_node *ni) 243 { 244 struct ath_buf *bf, *next; 245 246 ATH_TXBUF_LOCK_ASSERT(sc); 247 248 TAILQ_FOREACH_SAFE(bf, frags, bf_list, next) { 249 /* NB: bf assumed clean */ 250 TAILQ_REMOVE(frags, bf, bf_list); 251 ath_returnbuf_head(sc, bf); 252 ieee80211_node_decref(ni); 253 } 254 } 255 256 /* 257 * Setup xmit of a fragmented frame. Allocate a buffer 258 * for each frag and bump the node reference count to 259 * reflect the held reference to be setup by ath_tx_start. 260 */ 261 int 262 ath_txfrag_setup(struct ath_softc *sc, ath_bufhead *frags, 263 struct mbuf *m0, struct ieee80211_node *ni) 264 { 265 struct mbuf *m; 266 struct ath_buf *bf; 267 268 ATH_TXBUF_LOCK(sc); 269 for (m = m0->m_nextpkt; m != NULL; m = m->m_nextpkt) { 270 /* XXX non-management? */ 271 bf = _ath_getbuf_locked(sc, ATH_BUFTYPE_NORMAL); 272 if (bf == NULL) { /* out of buffers, cleanup */ 273 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: no buffer?\n", 274 __func__); 275 ath_txfrag_cleanup(sc, frags, ni); 276 break; 277 } 278 ieee80211_node_incref(ni); 279 TAILQ_INSERT_TAIL(frags, bf, bf_list); 280 } 281 ATH_TXBUF_UNLOCK(sc); 282 283 return !TAILQ_EMPTY(frags); 284 } 285 286 static int 287 ath_tx_dmasetup(struct ath_softc *sc, struct ath_buf *bf, struct mbuf *m0) 288 { 289 struct mbuf *m; 290 int error; 291 292 /* 293 * Load the DMA map so any coalescing is done. This 294 * also calculates the number of descriptors we need. 295 */ 296 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 297 bf->bf_segs, &bf->bf_nseg, 298 BUS_DMA_NOWAIT); 299 if (error == EFBIG) { 300 /* XXX packet requires too many descriptors */ 301 bf->bf_nseg = ATH_MAX_SCATTER + 1; 302 } else if (error != 0) { 303 sc->sc_stats.ast_tx_busdma++; 304 ieee80211_free_mbuf(m0); 305 return error; 306 } 307 /* 308 * Discard null packets and check for packets that 309 * require too many TX descriptors. We try to convert 310 * the latter to a cluster. 311 */ 312 if (bf->bf_nseg > ATH_MAX_SCATTER) { /* too many desc's, linearize */ 313 sc->sc_stats.ast_tx_linear++; 314 m = m_collapse(m0, M_NOWAIT, ATH_MAX_SCATTER); 315 if (m == NULL) { 316 ieee80211_free_mbuf(m0); 317 sc->sc_stats.ast_tx_nombuf++; 318 return ENOMEM; 319 } 320 m0 = m; 321 error = bus_dmamap_load_mbuf_sg(sc->sc_dmat, bf->bf_dmamap, m0, 322 bf->bf_segs, &bf->bf_nseg, 323 BUS_DMA_NOWAIT); 324 if (error != 0) { 325 sc->sc_stats.ast_tx_busdma++; 326 ieee80211_free_mbuf(m0); 327 return error; 328 } 329 KASSERT(bf->bf_nseg <= ATH_MAX_SCATTER, 330 ("too many segments after defrag; nseg %u", bf->bf_nseg)); 331 } else if (bf->bf_nseg == 0) { /* null packet, discard */ 332 sc->sc_stats.ast_tx_nodata++; 333 ieee80211_free_mbuf(m0); 334 return EIO; 335 } 336 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: m %p len %u\n", 337 __func__, m0, m0->m_pkthdr.len); 338 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 339 bf->bf_m = m0; 340 341 return 0; 342 } 343 344 /* 345 * Chain together segments+descriptors for a frame - 11n or otherwise. 346 * 347 * For aggregates, this is called on each frame in the aggregate. 348 */ 349 static void 350 ath_tx_chaindesclist(struct ath_softc *sc, struct ath_desc *ds0, 351 struct ath_buf *bf, int is_aggr, int is_first_subframe, 352 int is_last_subframe) 353 { 354 struct ath_hal *ah = sc->sc_ah; 355 char *ds; 356 int i, bp, dsp; 357 HAL_DMA_ADDR bufAddrList[4]; 358 uint32_t segLenList[4]; 359 int numTxMaps = 1; 360 int isFirstDesc = 1; 361 362 /* 363 * XXX There's txdma and txdma_mgmt; the descriptor 364 * sizes must match. 365 */ 366 struct ath_descdma *dd = &sc->sc_txdma; 367 368 /* 369 * Fillin the remainder of the descriptor info. 370 */ 371 372 /* 373 * We need the number of TX data pointers in each descriptor. 374 * EDMA and later chips support 4 TX buffers per descriptor; 375 * previous chips just support one. 376 */ 377 numTxMaps = sc->sc_tx_nmaps; 378 379 /* 380 * For EDMA and later chips ensure the TX map is fully populated 381 * before advancing to the next descriptor. 382 */ 383 ds = (char *) bf->bf_desc; 384 bp = dsp = 0; 385 bzero(bufAddrList, sizeof(bufAddrList)); 386 bzero(segLenList, sizeof(segLenList)); 387 for (i = 0; i < bf->bf_nseg; i++) { 388 bufAddrList[bp] = bf->bf_segs[i].ds_addr; 389 segLenList[bp] = bf->bf_segs[i].ds_len; 390 bp++; 391 392 /* 393 * Go to the next segment if this isn't the last segment 394 * and there's space in the current TX map. 395 */ 396 if ((i != bf->bf_nseg - 1) && (bp < numTxMaps)) 397 continue; 398 399 /* 400 * Last segment or we're out of buffer pointers. 401 */ 402 bp = 0; 403 404 if (i == bf->bf_nseg - 1) 405 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 0); 406 else 407 ath_hal_settxdesclink(ah, (struct ath_desc *) ds, 408 bf->bf_daddr + dd->dd_descsize * (dsp + 1)); 409 410 /* 411 * XXX This assumes that bfs_txq is the actual destination 412 * hardware queue at this point. It may not have been 413 * assigned, it may actually be pointing to the multicast 414 * software TXQ id. These must be fixed! 415 */ 416 ath_hal_filltxdesc(ah, (struct ath_desc *) ds 417 , bufAddrList 418 , segLenList 419 , bf->bf_descid /* XXX desc id */ 420 , bf->bf_state.bfs_tx_queue 421 , isFirstDesc /* first segment */ 422 , i == bf->bf_nseg - 1 /* last segment */ 423 , (struct ath_desc *) ds0 /* first descriptor */ 424 ); 425 426 /* 427 * Make sure the 11n aggregate fields are cleared. 428 * 429 * XXX TODO: this doesn't need to be called for 430 * aggregate frames; as it'll be called on all 431 * sub-frames. Since the descriptors are in 432 * non-cacheable memory, this leads to some 433 * rather slow writes on MIPS/ARM platforms. 434 */ 435 if (ath_tx_is_11n(sc)) 436 ath_hal_clr11n_aggr(sc->sc_ah, (struct ath_desc *) ds); 437 438 /* 439 * If 11n is enabled, set it up as if it's an aggregate 440 * frame. 441 */ 442 if (is_last_subframe) { 443 ath_hal_set11n_aggr_last(sc->sc_ah, 444 (struct ath_desc *) ds); 445 } else if (is_aggr) { 446 /* 447 * This clears the aggrlen field; so 448 * the caller needs to call set_aggr_first()! 449 * 450 * XXX TODO: don't call this for the first 451 * descriptor in the first frame in an 452 * aggregate! 453 */ 454 ath_hal_set11n_aggr_middle(sc->sc_ah, 455 (struct ath_desc *) ds, 456 bf->bf_state.bfs_ndelim); 457 } 458 isFirstDesc = 0; 459 bf->bf_lastds = (struct ath_desc *) ds; 460 461 /* 462 * Don't forget to skip to the next descriptor. 463 */ 464 ds += sc->sc_tx_desclen; 465 dsp++; 466 467 /* 468 * .. and don't forget to blank these out! 469 */ 470 bzero(bufAddrList, sizeof(bufAddrList)); 471 bzero(segLenList, sizeof(segLenList)); 472 } 473 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, BUS_DMASYNC_PREWRITE); 474 } 475 476 /* 477 * Set the rate control fields in the given descriptor based on 478 * the bf_state fields and node state. 479 * 480 * The bfs fields should already be set with the relevant rate 481 * control information, including whether MRR is to be enabled. 482 * 483 * Since the FreeBSD HAL currently sets up the first TX rate 484 * in ath_hal_setuptxdesc(), this will setup the MRR 485 * conditionally for the pre-11n chips, and call ath_buf_set_rate 486 * unconditionally for 11n chips. These require the 11n rate 487 * scenario to be set if MCS rates are enabled, so it's easier 488 * to just always call it. The caller can then only set rates 2, 3 489 * and 4 if multi-rate retry is needed. 490 */ 491 static void 492 ath_tx_set_ratectrl(struct ath_softc *sc, struct ieee80211_node *ni, 493 struct ath_buf *bf) 494 { 495 struct ath_rc_series *rc = bf->bf_state.bfs_rc; 496 497 /* If mrr is disabled, blank tries 1, 2, 3 */ 498 if (! bf->bf_state.bfs_ismrr) 499 rc[1].tries = rc[2].tries = rc[3].tries = 0; 500 501 #if 0 502 /* 503 * If NOACK is set, just set ntries=1. 504 */ 505 else if (bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) { 506 rc[1].tries = rc[2].tries = rc[3].tries = 0; 507 rc[0].tries = 1; 508 } 509 #endif 510 511 /* 512 * Always call - that way a retried descriptor will 513 * have the MRR fields overwritten. 514 * 515 * XXX TODO: see if this is really needed - setting up 516 * the first descriptor should set the MRR fields to 0 517 * for us anyway. 518 */ 519 if (ath_tx_is_11n(sc)) { 520 ath_buf_set_rate(sc, ni, bf); 521 } else { 522 ath_hal_setupxtxdesc(sc->sc_ah, bf->bf_desc 523 , rc[1].ratecode, rc[1].tries 524 , rc[2].ratecode, rc[2].tries 525 , rc[3].ratecode, rc[3].tries 526 ); 527 } 528 } 529 530 /* 531 * Setup segments+descriptors for an 11n aggregate. 532 * bf_first is the first buffer in the aggregate. 533 * The descriptor list must already been linked together using 534 * bf->bf_next. 535 */ 536 static void 537 ath_tx_setds_11n(struct ath_softc *sc, struct ath_buf *bf_first) 538 { 539 struct ath_buf *bf, *bf_prev = NULL; 540 struct ath_desc *ds0 = bf_first->bf_desc; 541 542 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: nframes=%d, al=%d\n", 543 __func__, bf_first->bf_state.bfs_nframes, 544 bf_first->bf_state.bfs_al); 545 546 bf = bf_first; 547 548 if (bf->bf_state.bfs_txrate0 == 0) 549 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, txrate0=%d\n", 550 __func__, bf, 0); 551 if (bf->bf_state.bfs_rc[0].ratecode == 0) 552 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: bf=%p, rix0=%d\n", 553 __func__, bf, 0); 554 555 /* 556 * Setup all descriptors of all subframes - this will 557 * call ath_hal_set11naggrmiddle() on every frame. 558 */ 559 while (bf != NULL) { 560 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 561 "%s: bf=%p, nseg=%d, pktlen=%d, seqno=%d\n", 562 __func__, bf, bf->bf_nseg, bf->bf_state.bfs_pktlen, 563 SEQNO(bf->bf_state.bfs_seqno)); 564 565 /* 566 * Setup the initial fields for the first descriptor - all 567 * the non-11n specific stuff. 568 */ 569 ath_hal_setuptxdesc(sc->sc_ah, bf->bf_desc 570 , bf->bf_state.bfs_pktlen /* packet length */ 571 , bf->bf_state.bfs_hdrlen /* header length */ 572 , bf->bf_state.bfs_atype /* Atheros packet type */ 573 , bf->bf_state.bfs_txpower /* txpower */ 574 , bf->bf_state.bfs_txrate0 575 , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 576 , bf->bf_state.bfs_keyix /* key cache index */ 577 , bf->bf_state.bfs_txantenna /* antenna mode */ 578 , bf->bf_state.bfs_txflags | HAL_TXDESC_INTREQ /* flags */ 579 , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 580 , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 581 ); 582 583 /* 584 * First descriptor? Setup the rate control and initial 585 * aggregate header information. 586 */ 587 if (bf == bf_first) { 588 /* 589 * setup first desc with rate and aggr info 590 */ 591 ath_tx_set_ratectrl(sc, bf->bf_node, bf); 592 } 593 594 /* 595 * Setup the descriptors for a multi-descriptor frame. 596 * This is both aggregate and non-aggregate aware. 597 */ 598 ath_tx_chaindesclist(sc, ds0, bf, 599 1, /* is_aggr */ 600 !! (bf == bf_first), /* is_first_subframe */ 601 !! (bf->bf_next == NULL) /* is_last_subframe */ 602 ); 603 604 if (bf == bf_first) { 605 /* 606 * Initialise the first 11n aggregate with the 607 * aggregate length and aggregate enable bits. 608 */ 609 ath_hal_set11n_aggr_first(sc->sc_ah, 610 ds0, 611 bf->bf_state.bfs_al, 612 bf->bf_state.bfs_ndelim); 613 } 614 615 /* 616 * Link the last descriptor of the previous frame 617 * to the beginning descriptor of this frame. 618 */ 619 if (bf_prev != NULL) 620 ath_hal_settxdesclink(sc->sc_ah, bf_prev->bf_lastds, 621 bf->bf_daddr); 622 623 /* Save a copy so we can link the next descriptor in */ 624 bf_prev = bf; 625 bf = bf->bf_next; 626 } 627 628 /* 629 * Set the first descriptor bf_lastds field to point to 630 * the last descriptor in the last subframe, that's where 631 * the status update will occur. 632 */ 633 bf_first->bf_lastds = bf_prev->bf_lastds; 634 635 /* 636 * And bf_last in the first descriptor points to the end of 637 * the aggregate list. 638 */ 639 bf_first->bf_last = bf_prev; 640 641 /* 642 * For non-AR9300 NICs, which require the rate control 643 * in the final descriptor - let's set that up now. 644 * 645 * This is because the filltxdesc() HAL call doesn't 646 * populate the last segment with rate control information 647 * if firstSeg is also true. For non-aggregate frames 648 * that is fine, as the first frame already has rate control 649 * info. But if the last frame in an aggregate has one 650 * descriptor, both firstseg and lastseg will be true and 651 * the rate info isn't copied. 652 * 653 * This is inefficient on MIPS/ARM platforms that have 654 * non-cachable memory for TX descriptors, but we'll just 655 * make do for now. 656 * 657 * As to why the rate table is stashed in the last descriptor 658 * rather than the first descriptor? Because proctxdesc() 659 * is called on the final descriptor in an MPDU or A-MPDU - 660 * ie, the one that gets updated by the hardware upon 661 * completion. That way proctxdesc() doesn't need to know 662 * about the first _and_ last TX descriptor. 663 */ 664 ath_hal_setuplasttxdesc(sc->sc_ah, bf_prev->bf_lastds, ds0); 665 666 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: end\n", __func__); 667 } 668 669 /* 670 * Hand-off a frame to the multicast TX queue. 671 * 672 * This is a software TXQ which will be appended to the CAB queue 673 * during the beacon setup code. 674 * 675 * XXX TODO: since the AR9300 EDMA TX queue support wants the QCU ID 676 * as part of the TX descriptor, bf_state.bfs_tx_queue must be updated 677 * with the actual hardware txq, or all of this will fall apart. 678 * 679 * XXX It may not be a bad idea to just stuff the QCU ID into bf_state 680 * and retire bfs_tx_queue; then make sure the CABQ QCU ID is populated 681 * correctly. 682 */ 683 static void 684 ath_tx_handoff_mcast(struct ath_softc *sc, struct ath_txq *txq, 685 struct ath_buf *bf) 686 { 687 ATH_TX_LOCK_ASSERT(sc); 688 689 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 690 ("%s: busy status 0x%x", __func__, bf->bf_flags)); 691 692 /* 693 * Ensure that the tx queue is the cabq, so things get 694 * mapped correctly. 695 */ 696 if (bf->bf_state.bfs_tx_queue != sc->sc_cabq->axq_qnum) { 697 DPRINTF(sc, ATH_DEBUG_XMIT, 698 "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 699 __func__, bf, bf->bf_state.bfs_tx_queue, 700 txq->axq_qnum); 701 } 702 703 ATH_TXQ_LOCK(txq); 704 if (ATH_TXQ_LAST(txq, axq_q_s) != NULL) { 705 struct ath_buf *bf_last = ATH_TXQ_LAST(txq, axq_q_s); 706 struct ieee80211_frame *wh; 707 708 /* mark previous frame */ 709 wh = mtod(bf_last->bf_m, struct ieee80211_frame *); 710 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 711 bus_dmamap_sync(sc->sc_dmat, bf_last->bf_dmamap, 712 BUS_DMASYNC_PREWRITE); 713 714 /* link descriptor */ 715 ath_hal_settxdesclink(sc->sc_ah, 716 bf_last->bf_lastds, 717 bf->bf_daddr); 718 } 719 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 720 ATH_TXQ_UNLOCK(txq); 721 } 722 723 /* 724 * Hand-off packet to a hardware queue. 725 */ 726 static void 727 ath_tx_handoff_hw(struct ath_softc *sc, struct ath_txq *txq, 728 struct ath_buf *bf) 729 { 730 struct ath_hal *ah = sc->sc_ah; 731 struct ath_buf *bf_first; 732 733 /* 734 * Insert the frame on the outbound list and pass it on 735 * to the hardware. Multicast frames buffered for power 736 * save stations and transmit from the CAB queue are stored 737 * on a s/w only queue and loaded on to the CAB queue in 738 * the SWBA handler since frames only go out on DTIM and 739 * to avoid possible races. 740 */ 741 ATH_TX_LOCK_ASSERT(sc); 742 KASSERT((bf->bf_flags & ATH_BUF_BUSY) == 0, 743 ("%s: busy status 0x%x", __func__, bf->bf_flags)); 744 KASSERT(txq->axq_qnum != ATH_TXQ_SWQ, 745 ("ath_tx_handoff_hw called for mcast queue")); 746 747 /* 748 * XXX We should instead just verify that sc_txstart_cnt 749 * or ath_txproc_cnt > 0. That would mean that 750 * the reset is going to be waiting for us to complete. 751 */ 752 if (sc->sc_txproc_cnt == 0 && sc->sc_txstart_cnt == 0) { 753 device_printf(sc->sc_dev, 754 "%s: TX dispatch without holding txcount/txstart refcnt!\n", 755 __func__); 756 } 757 758 /* 759 * XXX .. this is going to cause the hardware to get upset; 760 * so we really should find some way to drop or queue 761 * things. 762 */ 763 764 ATH_TXQ_LOCK(txq); 765 766 /* 767 * XXX TODO: if there's a holdingbf, then 768 * ATH_TXQ_PUTRUNNING should be clear. 769 * 770 * If there is a holdingbf and the list is empty, 771 * then axq_link should be pointing to the holdingbf. 772 * 773 * Otherwise it should point to the last descriptor 774 * in the last ath_buf. 775 * 776 * In any case, we should really ensure that we 777 * update the previous descriptor link pointer to 778 * this descriptor, regardless of all of the above state. 779 * 780 * For now this is captured by having axq_link point 781 * to either the holdingbf (if the TXQ list is empty) 782 * or the end of the list (if the TXQ list isn't empty.) 783 * I'd rather just kill axq_link here and do it as above. 784 */ 785 786 /* 787 * Append the frame to the TX queue. 788 */ 789 ATH_TXQ_INSERT_TAIL(txq, bf, bf_list); 790 ATH_KTR(sc, ATH_KTR_TX, 3, 791 "ath_tx_handoff: non-tdma: txq=%u, add bf=%p " 792 "depth=%d", 793 txq->axq_qnum, 794 bf, 795 txq->axq_depth); 796 797 /* 798 * If there's a link pointer, update it. 799 * 800 * XXX we should replace this with the above logic, just 801 * to kill axq_link with fire. 802 */ 803 if (txq->axq_link != NULL) { 804 *txq->axq_link = bf->bf_daddr; 805 DPRINTF(sc, ATH_DEBUG_XMIT, 806 "%s: link[%u](%p)=%p (%p) depth %d\n", __func__, 807 txq->axq_qnum, txq->axq_link, 808 (caddr_t)bf->bf_daddr, bf->bf_desc, 809 txq->axq_depth); 810 ATH_KTR(sc, ATH_KTR_TX, 5, 811 "ath_tx_handoff: non-tdma: link[%u](%p)=%p (%p) " 812 "lastds=%d", 813 txq->axq_qnum, txq->axq_link, 814 (caddr_t)bf->bf_daddr, bf->bf_desc, 815 bf->bf_lastds); 816 } 817 818 /* 819 * If we've not pushed anything into the hardware yet, 820 * push the head of the queue into the TxDP. 821 * 822 * Once we've started DMA, there's no guarantee that 823 * updating the TxDP with a new value will actually work. 824 * So we just don't do that - if we hit the end of the list, 825 * we keep that buffer around (the "holding buffer") and 826 * re-start DMA by updating the link pointer of _that_ 827 * descriptor and then restart DMA. 828 */ 829 if (! (txq->axq_flags & ATH_TXQ_PUTRUNNING)) { 830 bf_first = TAILQ_FIRST(&txq->axq_q); 831 txq->axq_flags |= ATH_TXQ_PUTRUNNING; 832 ath_hal_puttxbuf(ah, txq->axq_qnum, bf_first->bf_daddr); 833 DPRINTF(sc, ATH_DEBUG_XMIT, 834 "%s: TXDP[%u] = %p (%p) depth %d\n", 835 __func__, txq->axq_qnum, 836 (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 837 txq->axq_depth); 838 ATH_KTR(sc, ATH_KTR_TX, 5, 839 "ath_tx_handoff: TXDP[%u] = %p (%p) " 840 "lastds=%p depth %d", 841 txq->axq_qnum, 842 (caddr_t)bf_first->bf_daddr, bf_first->bf_desc, 843 bf_first->bf_lastds, 844 txq->axq_depth); 845 } 846 847 /* 848 * Ensure that the bf TXQ matches this TXQ, so later 849 * checking and holding buffer manipulation is sane. 850 */ 851 if (bf->bf_state.bfs_tx_queue != txq->axq_qnum) { 852 DPRINTF(sc, ATH_DEBUG_XMIT, 853 "%s: bf=%p, bfs_tx_queue=%d, axq_qnum=%d\n", 854 __func__, bf, bf->bf_state.bfs_tx_queue, 855 txq->axq_qnum); 856 } 857 858 /* 859 * Track aggregate queue depth. 860 */ 861 if (bf->bf_state.bfs_aggr) 862 txq->axq_aggr_depth++; 863 864 /* 865 * Update the link pointer. 866 */ 867 ath_hal_gettxdesclinkptr(ah, bf->bf_lastds, &txq->axq_link); 868 869 /* 870 * Start DMA. 871 * 872 * If we wrote a TxDP above, DMA will start from here. 873 * 874 * If DMA is running, it'll do nothing. 875 * 876 * If the DMA engine hit the end of the QCU list (ie LINK=NULL, 877 * or VEOL) then it stops at the last transmitted write. 878 * We then append a new frame by updating the link pointer 879 * in that descriptor and then kick TxE here; it will re-read 880 * that last descriptor and find the new descriptor to transmit. 881 * 882 * This is why we keep the holding descriptor around. 883 */ 884 ath_hal_txstart(ah, txq->axq_qnum); 885 ATH_TXQ_UNLOCK(txq); 886 ATH_KTR(sc, ATH_KTR_TX, 1, 887 "ath_tx_handoff: txq=%u, txstart", txq->axq_qnum); 888 } 889 890 /* 891 * Restart TX DMA for the given TXQ. 892 * 893 * This must be called whether the queue is empty or not. 894 */ 895 static void 896 ath_legacy_tx_dma_restart(struct ath_softc *sc, struct ath_txq *txq) 897 { 898 struct ath_buf *bf, *bf_last; 899 900 ATH_TXQ_LOCK_ASSERT(txq); 901 902 /* XXX make this ATH_TXQ_FIRST */ 903 bf = TAILQ_FIRST(&txq->axq_q); 904 bf_last = ATH_TXQ_LAST(txq, axq_q_s); 905 906 if (bf == NULL) 907 return; 908 909 DPRINTF(sc, ATH_DEBUG_RESET, 910 "%s: Q%d: bf=%p, bf_last=%p, daddr=0x%08x\n", 911 __func__, 912 txq->axq_qnum, 913 bf, 914 bf_last, 915 (uint32_t) bf->bf_daddr); 916 917 #ifdef ATH_DEBUG 918 if (sc->sc_debug & ATH_DEBUG_RESET) 919 ath_tx_dump(sc, txq); 920 #endif 921 922 /* 923 * This is called from a restart, so DMA is known to be 924 * completely stopped. 925 */ 926 KASSERT((!(txq->axq_flags & ATH_TXQ_PUTRUNNING)), 927 ("%s: Q%d: called with PUTRUNNING=1\n", 928 __func__, 929 txq->axq_qnum)); 930 931 ath_hal_puttxbuf(sc->sc_ah, txq->axq_qnum, bf->bf_daddr); 932 txq->axq_flags |= ATH_TXQ_PUTRUNNING; 933 934 ath_hal_gettxdesclinkptr(sc->sc_ah, bf_last->bf_lastds, 935 &txq->axq_link); 936 ath_hal_txstart(sc->sc_ah, txq->axq_qnum); 937 } 938 939 /* 940 * Hand off a packet to the hardware (or mcast queue.) 941 * 942 * The relevant hardware txq should be locked. 943 */ 944 static void 945 ath_legacy_xmit_handoff(struct ath_softc *sc, struct ath_txq *txq, 946 struct ath_buf *bf) 947 { 948 ATH_TX_LOCK_ASSERT(sc); 949 950 #ifdef ATH_DEBUG_ALQ 951 if (if_ath_alq_checkdebug(&sc->sc_alq, ATH_ALQ_EDMA_TXDESC)) 952 ath_tx_alq_post(sc, bf); 953 #endif 954 955 if (txq->axq_qnum == ATH_TXQ_SWQ) 956 ath_tx_handoff_mcast(sc, txq, bf); 957 else 958 ath_tx_handoff_hw(sc, txq, bf); 959 } 960 961 static int 962 ath_tx_tag_crypto(struct ath_softc *sc, struct ieee80211_node *ni, 963 struct mbuf *m0, int iswep, int isfrag, int *hdrlen, int *pktlen, 964 int *keyix) 965 { 966 DPRINTF(sc, ATH_DEBUG_XMIT, 967 "%s: hdrlen=%d, pktlen=%d, isfrag=%d, iswep=%d, m0=%p\n", 968 __func__, 969 *hdrlen, 970 *pktlen, 971 isfrag, 972 iswep, 973 m0); 974 975 if (iswep) { 976 const struct ieee80211_cipher *cip; 977 struct ieee80211_key *k; 978 979 /* 980 * Construct the 802.11 header+trailer for an encrypted 981 * frame. The only reason this can fail is because of an 982 * unknown or unsupported cipher/key type. 983 */ 984 k = ieee80211_crypto_encap(ni, m0); 985 if (k == NULL) { 986 /* 987 * This can happen when the key is yanked after the 988 * frame was queued. Just discard the frame; the 989 * 802.11 layer counts failures and provides 990 * debugging/diagnostics. 991 */ 992 return (0); 993 } 994 /* 995 * Adjust the packet + header lengths for the crypto 996 * additions and calculate the h/w key index. When 997 * a s/w mic is done the frame will have had any mic 998 * added to it prior to entry so m0->m_pkthdr.len will 999 * account for it. Otherwise we need to add it to the 1000 * packet length. 1001 */ 1002 cip = k->wk_cipher; 1003 (*hdrlen) += cip->ic_header; 1004 (*pktlen) += cip->ic_header + cip->ic_trailer; 1005 /* NB: frags always have any TKIP MIC done in s/w */ 1006 if ((k->wk_flags & IEEE80211_KEY_SWMIC) == 0 && !isfrag) 1007 (*pktlen) += cip->ic_miclen; 1008 (*keyix) = k->wk_keyix; 1009 } else if (ni->ni_ucastkey.wk_cipher == &ieee80211_cipher_none) { 1010 /* 1011 * Use station key cache slot, if assigned. 1012 */ 1013 (*keyix) = ni->ni_ucastkey.wk_keyix; 1014 if ((*keyix) == IEEE80211_KEYIX_NONE) 1015 (*keyix) = HAL_TXKEYIX_INVALID; 1016 } else 1017 (*keyix) = HAL_TXKEYIX_INVALID; 1018 1019 return (1); 1020 } 1021 1022 /* 1023 * Calculate whether interoperability protection is required for 1024 * this frame. 1025 * 1026 * This requires the rate control information be filled in, 1027 * as the protection requirement depends upon the current 1028 * operating mode / PHY. 1029 */ 1030 static void 1031 ath_tx_calc_protection(struct ath_softc *sc, struct ath_buf *bf) 1032 { 1033 struct ieee80211_frame *wh; 1034 uint8_t rix; 1035 uint16_t flags; 1036 int shortPreamble; 1037 const HAL_RATE_TABLE *rt = sc->sc_currates; 1038 struct ieee80211com *ic = &sc->sc_ic; 1039 1040 flags = bf->bf_state.bfs_txflags; 1041 rix = bf->bf_state.bfs_rc[0].rix; 1042 shortPreamble = bf->bf_state.bfs_shpream; 1043 wh = mtod(bf->bf_m, struct ieee80211_frame *); 1044 1045 /* Disable frame protection for TOA probe frames */ 1046 if (bf->bf_flags & ATH_BUF_TOA_PROBE) { 1047 /* XXX count */ 1048 flags &= ~(HAL_TXDESC_CTSENA | HAL_TXDESC_RTSENA); 1049 bf->bf_state.bfs_doprot = 0; 1050 goto finish; 1051 } 1052 1053 /* 1054 * If 802.11g protection is enabled, determine whether 1055 * to use RTS/CTS or just CTS. Note that this is only 1056 * done for OFDM unicast frames. 1057 */ 1058 if ((ic->ic_flags & IEEE80211_F_USEPROT) && 1059 rt->info[rix].phy == IEEE80211_T_OFDM && 1060 (flags & HAL_TXDESC_NOACK) == 0) { 1061 bf->bf_state.bfs_doprot = 1; 1062 /* XXX fragments must use CCK rates w/ protection */ 1063 if (ic->ic_protmode == IEEE80211_PROT_RTSCTS) { 1064 flags |= HAL_TXDESC_RTSENA; 1065 } else if (ic->ic_protmode == IEEE80211_PROT_CTSONLY) { 1066 flags |= HAL_TXDESC_CTSENA; 1067 } 1068 /* 1069 * For frags it would be desirable to use the 1070 * highest CCK rate for RTS/CTS. But stations 1071 * farther away may detect it at a lower CCK rate 1072 * so use the configured protection rate instead 1073 * (for now). 1074 */ 1075 sc->sc_stats.ast_tx_protect++; 1076 } 1077 1078 /* 1079 * If 11n protection is enabled and it's a HT frame, 1080 * enable RTS. 1081 * 1082 * XXX ic_htprotmode or ic_curhtprotmode? 1083 * XXX should it_htprotmode only matter if ic_curhtprotmode 1084 * XXX indicates it's not a HT pure environment? 1085 */ 1086 if ((ic->ic_htprotmode == IEEE80211_PROT_RTSCTS) && 1087 rt->info[rix].phy == IEEE80211_T_HT && 1088 (flags & HAL_TXDESC_NOACK) == 0) { 1089 flags |= HAL_TXDESC_RTSENA; 1090 sc->sc_stats.ast_tx_htprotect++; 1091 } 1092 1093 finish: 1094 bf->bf_state.bfs_txflags = flags; 1095 } 1096 1097 /* 1098 * Update the frame duration given the currently selected rate. 1099 * 1100 * This also updates the frame duration value, so it will require 1101 * a DMA flush. 1102 */ 1103 static void 1104 ath_tx_calc_duration(struct ath_softc *sc, struct ath_buf *bf) 1105 { 1106 struct ieee80211_frame *wh; 1107 uint8_t rix; 1108 uint16_t flags; 1109 int shortPreamble; 1110 struct ath_hal *ah = sc->sc_ah; 1111 const HAL_RATE_TABLE *rt = sc->sc_currates; 1112 int isfrag = bf->bf_m->m_flags & M_FRAG; 1113 1114 flags = bf->bf_state.bfs_txflags; 1115 rix = bf->bf_state.bfs_rc[0].rix; 1116 shortPreamble = bf->bf_state.bfs_shpream; 1117 wh = mtod(bf->bf_m, struct ieee80211_frame *); 1118 1119 /* 1120 * Calculate duration. This logically belongs in the 802.11 1121 * layer but it lacks sufficient information to calculate it. 1122 */ 1123 if ((flags & HAL_TXDESC_NOACK) == 0 && 1124 (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_CTL) { 1125 u_int16_t dur; 1126 if (shortPreamble) 1127 dur = rt->info[rix].spAckDuration; 1128 else 1129 dur = rt->info[rix].lpAckDuration; 1130 if (wh->i_fc[1] & IEEE80211_FC1_MORE_FRAG) { 1131 dur += dur; /* additional SIFS+ACK */ 1132 /* 1133 * Include the size of next fragment so NAV is 1134 * updated properly. The last fragment uses only 1135 * the ACK duration 1136 * 1137 * XXX TODO: ensure that the rate lookup for each 1138 * fragment is the same as the rate used by the 1139 * first fragment! 1140 */ 1141 dur += ath_hal_computetxtime(ah, 1142 rt, 1143 bf->bf_nextfraglen, 1144 rix, shortPreamble, 1145 AH_TRUE); 1146 } 1147 if (isfrag) { 1148 /* 1149 * Force hardware to use computed duration for next 1150 * fragment by disabling multi-rate retry which updates 1151 * duration based on the multi-rate duration table. 1152 */ 1153 bf->bf_state.bfs_ismrr = 0; 1154 bf->bf_state.bfs_try0 = ATH_TXMGTTRY; 1155 /* XXX update bfs_rc[0].try? */ 1156 } 1157 1158 /* Update the duration field itself */ 1159 *(u_int16_t *)wh->i_dur = htole16(dur); 1160 } 1161 } 1162 1163 static uint8_t 1164 ath_tx_get_rtscts_rate(struct ath_hal *ah, const HAL_RATE_TABLE *rt, 1165 int cix, int shortPreamble) 1166 { 1167 uint8_t ctsrate; 1168 1169 /* 1170 * CTS transmit rate is derived from the transmit rate 1171 * by looking in the h/w rate table. We must also factor 1172 * in whether or not a short preamble is to be used. 1173 */ 1174 /* NB: cix is set above where RTS/CTS is enabled */ 1175 KASSERT(cix != 0xff, ("cix not setup")); 1176 ctsrate = rt->info[cix].rateCode; 1177 1178 /* XXX this should only matter for legacy rates */ 1179 if (shortPreamble) 1180 ctsrate |= rt->info[cix].shortPreamble; 1181 1182 return (ctsrate); 1183 } 1184 1185 /* 1186 * Calculate the RTS/CTS duration for legacy frames. 1187 */ 1188 static int 1189 ath_tx_calc_ctsduration(struct ath_hal *ah, int rix, int cix, 1190 int shortPreamble, int pktlen, const HAL_RATE_TABLE *rt, 1191 int flags) 1192 { 1193 int ctsduration = 0; 1194 1195 /* This mustn't be called for HT modes */ 1196 if (rt->info[cix].phy == IEEE80211_T_HT) { 1197 printf("%s: HT rate where it shouldn't be (0x%x)\n", 1198 __func__, rt->info[cix].rateCode); 1199 return (-1); 1200 } 1201 1202 /* 1203 * Compute the transmit duration based on the frame 1204 * size and the size of an ACK frame. We call into the 1205 * HAL to do the computation since it depends on the 1206 * characteristics of the actual PHY being used. 1207 * 1208 * NB: CTS is assumed the same size as an ACK so we can 1209 * use the precalculated ACK durations. 1210 */ 1211 if (shortPreamble) { 1212 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1213 ctsduration += rt->info[cix].spAckDuration; 1214 ctsduration += ath_hal_computetxtime(ah, 1215 rt, pktlen, rix, AH_TRUE, AH_TRUE); 1216 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1217 ctsduration += rt->info[rix].spAckDuration; 1218 } else { 1219 if (flags & HAL_TXDESC_RTSENA) /* SIFS + CTS */ 1220 ctsduration += rt->info[cix].lpAckDuration; 1221 ctsduration += ath_hal_computetxtime(ah, 1222 rt, pktlen, rix, AH_FALSE, AH_TRUE); 1223 if ((flags & HAL_TXDESC_NOACK) == 0) /* SIFS + ACK */ 1224 ctsduration += rt->info[rix].lpAckDuration; 1225 } 1226 1227 return (ctsduration); 1228 } 1229 1230 /* 1231 * Update the given ath_buf with updated rts/cts setup and duration 1232 * values. 1233 * 1234 * To support rate lookups for each software retry, the rts/cts rate 1235 * and cts duration must be re-calculated. 1236 * 1237 * This function assumes the RTS/CTS flags have been set as needed; 1238 * mrr has been disabled; and the rate control lookup has been done. 1239 * 1240 * XXX TODO: MRR need only be disabled for the pre-11n NICs. 1241 * XXX The 11n NICs support per-rate RTS/CTS configuration. 1242 */ 1243 static void 1244 ath_tx_set_rtscts(struct ath_softc *sc, struct ath_buf *bf) 1245 { 1246 uint16_t ctsduration = 0; 1247 uint8_t ctsrate = 0; 1248 uint8_t rix = bf->bf_state.bfs_rc[0].rix; 1249 uint8_t cix = 0; 1250 const HAL_RATE_TABLE *rt = sc->sc_currates; 1251 1252 /* 1253 * No RTS/CTS enabled? Don't bother. 1254 */ 1255 if ((bf->bf_state.bfs_txflags & 1256 (HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA)) == 0) { 1257 /* XXX is this really needed? */ 1258 bf->bf_state.bfs_ctsrate = 0; 1259 bf->bf_state.bfs_ctsduration = 0; 1260 return; 1261 } 1262 1263 /* 1264 * If protection is enabled, use the protection rix control 1265 * rate. Otherwise use the rate0 control rate. 1266 */ 1267 if (bf->bf_state.bfs_doprot) 1268 rix = sc->sc_protrix; 1269 else 1270 rix = bf->bf_state.bfs_rc[0].rix; 1271 1272 /* 1273 * If the raw path has hard-coded ctsrate0 to something, 1274 * use it. 1275 */ 1276 if (bf->bf_state.bfs_ctsrate0 != 0) 1277 cix = ath_tx_findrix(sc, bf->bf_state.bfs_ctsrate0); 1278 else 1279 /* Control rate from above */ 1280 cix = rt->info[rix].controlRate; 1281 1282 /* Calculate the rtscts rate for the given cix */ 1283 ctsrate = ath_tx_get_rtscts_rate(sc->sc_ah, rt, cix, 1284 bf->bf_state.bfs_shpream); 1285 1286 /* The 11n chipsets do ctsduration calculations for you */ 1287 if (! ath_tx_is_11n(sc)) 1288 ctsduration = ath_tx_calc_ctsduration(sc->sc_ah, rix, cix, 1289 bf->bf_state.bfs_shpream, bf->bf_state.bfs_pktlen, 1290 rt, bf->bf_state.bfs_txflags); 1291 1292 /* Squirrel away in ath_buf */ 1293 bf->bf_state.bfs_ctsrate = ctsrate; 1294 bf->bf_state.bfs_ctsduration = ctsduration; 1295 1296 /* 1297 * Must disable multi-rate retry when using RTS/CTS. 1298 */ 1299 if (!sc->sc_mrrprot) { 1300 bf->bf_state.bfs_ismrr = 0; 1301 bf->bf_state.bfs_try0 = 1302 bf->bf_state.bfs_rc[0].tries = ATH_TXMGTTRY; /* XXX ew */ 1303 } 1304 } 1305 1306 /* 1307 * Setup the descriptor chain for a normal or fast-frame 1308 * frame. 1309 * 1310 * XXX TODO: extend to include the destination hardware QCU ID. 1311 * Make sure that is correct. Make sure that when being added 1312 * to the mcastq, the CABQ QCUID is set or things will get a bit 1313 * odd. 1314 */ 1315 static void 1316 ath_tx_setds(struct ath_softc *sc, struct ath_buf *bf) 1317 { 1318 struct ath_desc *ds = bf->bf_desc; 1319 struct ath_hal *ah = sc->sc_ah; 1320 1321 if (bf->bf_state.bfs_txrate0 == 0) 1322 DPRINTF(sc, ATH_DEBUG_XMIT, 1323 "%s: bf=%p, txrate0=%d\n", __func__, bf, 0); 1324 1325 ath_hal_setuptxdesc(ah, ds 1326 , bf->bf_state.bfs_pktlen /* packet length */ 1327 , bf->bf_state.bfs_hdrlen /* header length */ 1328 , bf->bf_state.bfs_atype /* Atheros packet type */ 1329 , bf->bf_state.bfs_txpower /* txpower */ 1330 , bf->bf_state.bfs_txrate0 1331 , bf->bf_state.bfs_try0 /* series 0 rate/tries */ 1332 , bf->bf_state.bfs_keyix /* key cache index */ 1333 , bf->bf_state.bfs_txantenna /* antenna mode */ 1334 , bf->bf_state.bfs_txflags /* flags */ 1335 , bf->bf_state.bfs_ctsrate /* rts/cts rate */ 1336 , bf->bf_state.bfs_ctsduration /* rts/cts duration */ 1337 ); 1338 1339 /* 1340 * This will be overriden when the descriptor chain is written. 1341 */ 1342 bf->bf_lastds = ds; 1343 bf->bf_last = bf; 1344 1345 /* Set rate control and descriptor chain for this frame */ 1346 ath_tx_set_ratectrl(sc, bf->bf_node, bf); 1347 ath_tx_chaindesclist(sc, ds, bf, 0, 0, 0); 1348 } 1349 1350 /* 1351 * Do a rate lookup. 1352 * 1353 * This performs a rate lookup for the given ath_buf only if it's required. 1354 * Non-data frames and raw frames don't require it. 1355 * 1356 * This populates the primary and MRR entries; MRR values are 1357 * then disabled later on if something requires it (eg RTS/CTS on 1358 * pre-11n chipsets. 1359 * 1360 * This needs to be done before the RTS/CTS fields are calculated 1361 * as they may depend upon the rate chosen. 1362 */ 1363 static void 1364 ath_tx_do_ratelookup(struct ath_softc *sc, struct ath_buf *bf) 1365 { 1366 uint8_t rate, rix; 1367 int try0; 1368 1369 if (! bf->bf_state.bfs_doratelookup) 1370 return; 1371 1372 /* Get rid of any previous state */ 1373 bzero(bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1374 1375 ATH_NODE_LOCK(ATH_NODE(bf->bf_node)); 1376 ath_rate_findrate(sc, ATH_NODE(bf->bf_node), bf->bf_state.bfs_shpream, 1377 bf->bf_state.bfs_pktlen, &rix, &try0, &rate); 1378 1379 /* In case MRR is disabled, make sure rc[0] is setup correctly */ 1380 bf->bf_state.bfs_rc[0].rix = rix; 1381 bf->bf_state.bfs_rc[0].ratecode = rate; 1382 bf->bf_state.bfs_rc[0].tries = try0; 1383 1384 if (bf->bf_state.bfs_ismrr && try0 != ATH_TXMAXTRY) 1385 ath_rate_getxtxrates(sc, ATH_NODE(bf->bf_node), rix, 1386 bf->bf_state.bfs_rc); 1387 ATH_NODE_UNLOCK(ATH_NODE(bf->bf_node)); 1388 1389 sc->sc_txrix = rix; /* for LED blinking */ 1390 sc->sc_lastdatarix = rix; /* for fast frames */ 1391 bf->bf_state.bfs_try0 = try0; 1392 bf->bf_state.bfs_txrate0 = rate; 1393 } 1394 1395 /* 1396 * Update the CLRDMASK bit in the ath_buf if it needs to be set. 1397 */ 1398 static void 1399 ath_tx_update_clrdmask(struct ath_softc *sc, struct ath_tid *tid, 1400 struct ath_buf *bf) 1401 { 1402 struct ath_node *an = ATH_NODE(bf->bf_node); 1403 1404 ATH_TX_LOCK_ASSERT(sc); 1405 1406 if (an->clrdmask == 1) { 1407 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 1408 an->clrdmask = 0; 1409 } 1410 } 1411 1412 /* 1413 * Return whether this frame should be software queued or 1414 * direct dispatched. 1415 * 1416 * When doing powersave, BAR frames should be queued but other management 1417 * frames should be directly sent. 1418 * 1419 * When not doing powersave, stick BAR frames into the hardware queue 1420 * so it goes out even though the queue is paused. 1421 * 1422 * For now, management frames are also software queued by default. 1423 */ 1424 static int 1425 ath_tx_should_swq_frame(struct ath_softc *sc, struct ath_node *an, 1426 struct mbuf *m0, int *queue_to_head) 1427 { 1428 struct ieee80211_node *ni = &an->an_node; 1429 struct ieee80211_frame *wh; 1430 uint8_t type, subtype; 1431 1432 wh = mtod(m0, struct ieee80211_frame *); 1433 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1434 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1435 1436 (*queue_to_head) = 0; 1437 1438 /* If it's not in powersave - direct-dispatch BAR */ 1439 if ((ATH_NODE(ni)->an_is_powersave == 0) 1440 && type == IEEE80211_FC0_TYPE_CTL && 1441 subtype == IEEE80211_FC0_SUBTYPE_BAR) { 1442 DPRINTF(sc, ATH_DEBUG_SW_TX, 1443 "%s: BAR: TX'ing direct\n", __func__); 1444 return (0); 1445 } else if ((ATH_NODE(ni)->an_is_powersave == 1) 1446 && type == IEEE80211_FC0_TYPE_CTL && 1447 subtype == IEEE80211_FC0_SUBTYPE_BAR) { 1448 /* BAR TX whilst asleep; queue */ 1449 DPRINTF(sc, ATH_DEBUG_SW_TX, 1450 "%s: swq: TX'ing\n", __func__); 1451 (*queue_to_head) = 1; 1452 return (1); 1453 } else if ((ATH_NODE(ni)->an_is_powersave == 1) 1454 && (type == IEEE80211_FC0_TYPE_MGT || 1455 type == IEEE80211_FC0_TYPE_CTL)) { 1456 /* 1457 * Other control/mgmt frame; bypass software queuing 1458 * for now! 1459 */ 1460 DPRINTF(sc, ATH_DEBUG_XMIT, 1461 "%s: %6D: Node is asleep; sending mgmt " 1462 "(type=%d, subtype=%d)\n", 1463 __func__, ni->ni_macaddr, ":", type, subtype); 1464 return (0); 1465 } else { 1466 return (1); 1467 } 1468 } 1469 1470 1471 /* 1472 * Transmit the given frame to the hardware. 1473 * 1474 * The frame must already be setup; rate control must already have 1475 * been done. 1476 * 1477 * XXX since the TXQ lock is being held here (and I dislike holding 1478 * it for this long when not doing software aggregation), later on 1479 * break this function into "setup_normal" and "xmit_normal". The 1480 * lock only needs to be held for the ath_tx_handoff call. 1481 * 1482 * XXX we don't update the leak count here - if we're doing 1483 * direct frame dispatch, we need to be able to do it without 1484 * decrementing the leak count (eg multicast queue frames.) 1485 */ 1486 static void 1487 ath_tx_xmit_normal(struct ath_softc *sc, struct ath_txq *txq, 1488 struct ath_buf *bf) 1489 { 1490 struct ath_node *an = ATH_NODE(bf->bf_node); 1491 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 1492 1493 ATH_TX_LOCK_ASSERT(sc); 1494 1495 /* 1496 * For now, just enable CLRDMASK. ath_tx_xmit_normal() does 1497 * set a completion handler however it doesn't (yet) properly 1498 * handle the strict ordering requirements needed for normal, 1499 * non-aggregate session frames. 1500 * 1501 * Once this is implemented, only set CLRDMASK like this for 1502 * frames that must go out - eg management/raw frames. 1503 */ 1504 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 1505 1506 /* Setup the descriptor before handoff */ 1507 ath_tx_do_ratelookup(sc, bf); 1508 ath_tx_calc_duration(sc, bf); 1509 ath_tx_calc_protection(sc, bf); 1510 ath_tx_set_rtscts(sc, bf); 1511 ath_tx_rate_fill_rcflags(sc, bf); 1512 ath_tx_setds(sc, bf); 1513 1514 /* Track per-TID hardware queue depth correctly */ 1515 tid->hwq_depth++; 1516 1517 /* Assign the completion handler */ 1518 bf->bf_comp = ath_tx_normal_comp; 1519 1520 /* Hand off to hardware */ 1521 ath_tx_handoff(sc, txq, bf); 1522 } 1523 1524 /* 1525 * Do the basic frame setup stuff that's required before the frame 1526 * is added to a software queue. 1527 * 1528 * All frames get mostly the same treatment and it's done once. 1529 * Retransmits fiddle with things like the rate control setup, 1530 * setting the retransmit bit in the packet; doing relevant DMA/bus 1531 * syncing and relinking it (back) into the hardware TX queue. 1532 * 1533 * Note that this may cause the mbuf to be reallocated, so 1534 * m0 may not be valid. 1535 */ 1536 static int 1537 ath_tx_normal_setup(struct ath_softc *sc, struct ieee80211_node *ni, 1538 struct ath_buf *bf, struct mbuf *m0, struct ath_txq *txq) 1539 { 1540 struct ieee80211vap *vap = ni->ni_vap; 1541 struct ieee80211com *ic = &sc->sc_ic; 1542 const struct chanAccParams *cap = &ic->ic_wme.wme_chanParams; 1543 int error, iswep, ismcast, isfrag, ismrr; 1544 int keyix, hdrlen, pktlen, try0 = 0; 1545 u_int8_t rix = 0, txrate = 0; 1546 struct ath_desc *ds; 1547 struct ieee80211_frame *wh; 1548 u_int subtype, flags; 1549 HAL_PKT_TYPE atype; 1550 const HAL_RATE_TABLE *rt; 1551 HAL_BOOL shortPreamble; 1552 struct ath_node *an; 1553 u_int pri; 1554 1555 /* 1556 * To ensure that both sequence numbers and the CCMP PN handling 1557 * is "correct", make sure that the relevant TID queue is locked. 1558 * Otherwise the CCMP PN and seqno may appear out of order, causing 1559 * re-ordered frames to have out of order CCMP PN's, resulting 1560 * in many, many frame drops. 1561 */ 1562 ATH_TX_LOCK_ASSERT(sc); 1563 1564 wh = mtod(m0, struct ieee80211_frame *); 1565 iswep = wh->i_fc[1] & IEEE80211_FC1_PROTECTED; 1566 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1567 isfrag = m0->m_flags & M_FRAG; 1568 hdrlen = ieee80211_anyhdrsize(wh); 1569 /* 1570 * Packet length must not include any 1571 * pad bytes; deduct them here. 1572 */ 1573 pktlen = m0->m_pkthdr.len - (hdrlen & 3); 1574 1575 /* Handle encryption twiddling if needed */ 1576 if (! ath_tx_tag_crypto(sc, ni, m0, iswep, isfrag, &hdrlen, 1577 &pktlen, &keyix)) { 1578 ieee80211_free_mbuf(m0); 1579 return EIO; 1580 } 1581 1582 /* packet header may have moved, reset our local pointer */ 1583 wh = mtod(m0, struct ieee80211_frame *); 1584 1585 pktlen += IEEE80211_CRC_LEN; 1586 1587 /* 1588 * Load the DMA map so any coalescing is done. This 1589 * also calculates the number of descriptors we need. 1590 */ 1591 error = ath_tx_dmasetup(sc, bf, m0); 1592 if (error != 0) 1593 return error; 1594 KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 1595 bf->bf_node = ni; /* NB: held reference */ 1596 m0 = bf->bf_m; /* NB: may have changed */ 1597 wh = mtod(m0, struct ieee80211_frame *); 1598 1599 /* setup descriptors */ 1600 ds = bf->bf_desc; 1601 rt = sc->sc_currates; 1602 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 1603 1604 /* 1605 * NB: the 802.11 layer marks whether or not we should 1606 * use short preamble based on the current mode and 1607 * negotiated parameters. 1608 */ 1609 if ((ic->ic_flags & IEEE80211_F_SHPREAMBLE) && 1610 (ni->ni_capinfo & IEEE80211_CAPINFO_SHORT_PREAMBLE)) { 1611 shortPreamble = AH_TRUE; 1612 sc->sc_stats.ast_tx_shortpre++; 1613 } else { 1614 shortPreamble = AH_FALSE; 1615 } 1616 1617 an = ATH_NODE(ni); 1618 //flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 1619 flags = 0; 1620 ismrr = 0; /* default no multi-rate retry*/ 1621 pri = M_WME_GETAC(m0); /* honor classification */ 1622 /* XXX use txparams instead of fixed values */ 1623 /* 1624 * Calculate Atheros packet type from IEEE80211 packet header, 1625 * setup for rate calculations, and select h/w transmit queue. 1626 */ 1627 switch (wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) { 1628 case IEEE80211_FC0_TYPE_MGT: 1629 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1630 if (subtype == IEEE80211_FC0_SUBTYPE_BEACON) 1631 atype = HAL_PKT_TYPE_BEACON; 1632 else if (subtype == IEEE80211_FC0_SUBTYPE_PROBE_RESP) 1633 atype = HAL_PKT_TYPE_PROBE_RESP; 1634 else if (subtype == IEEE80211_FC0_SUBTYPE_ATIM) 1635 atype = HAL_PKT_TYPE_ATIM; 1636 else 1637 atype = HAL_PKT_TYPE_NORMAL; /* XXX */ 1638 rix = an->an_mgmtrix; 1639 txrate = rt->info[rix].rateCode; 1640 if (shortPreamble) 1641 txrate |= rt->info[rix].shortPreamble; 1642 try0 = ATH_TXMGTTRY; 1643 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1644 break; 1645 case IEEE80211_FC0_TYPE_CTL: 1646 atype = HAL_PKT_TYPE_PSPOLL; /* stop setting of duration */ 1647 rix = an->an_mgmtrix; 1648 txrate = rt->info[rix].rateCode; 1649 if (shortPreamble) 1650 txrate |= rt->info[rix].shortPreamble; 1651 try0 = ATH_TXMGTTRY; 1652 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 1653 break; 1654 case IEEE80211_FC0_TYPE_DATA: 1655 atype = HAL_PKT_TYPE_NORMAL; /* default */ 1656 /* 1657 * Data frames: multicast frames go out at a fixed rate, 1658 * EAPOL frames use the mgmt frame rate; otherwise consult 1659 * the rate control module for the rate to use. 1660 */ 1661 if (ismcast) { 1662 rix = an->an_mcastrix; 1663 txrate = rt->info[rix].rateCode; 1664 if (shortPreamble) 1665 txrate |= rt->info[rix].shortPreamble; 1666 try0 = 1; 1667 } else if (m0->m_flags & M_EAPOL) { 1668 /* XXX? maybe always use long preamble? */ 1669 rix = an->an_mgmtrix; 1670 txrate = rt->info[rix].rateCode; 1671 if (shortPreamble) 1672 txrate |= rt->info[rix].shortPreamble; 1673 try0 = ATH_TXMAXTRY; /* XXX?too many? */ 1674 } else { 1675 /* 1676 * Do rate lookup on each TX, rather than using 1677 * the hard-coded TX information decided here. 1678 */ 1679 ismrr = 1; 1680 bf->bf_state.bfs_doratelookup = 1; 1681 } 1682 if (cap->cap_wmeParams[pri].wmep_noackPolicy) 1683 flags |= HAL_TXDESC_NOACK; 1684 break; 1685 default: 1686 device_printf(sc->sc_dev, "bogus frame type 0x%x (%s)\n", 1687 wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK, __func__); 1688 /* XXX statistic */ 1689 /* XXX free tx dmamap */ 1690 ieee80211_free_mbuf(m0); 1691 return EIO; 1692 } 1693 1694 /* 1695 * There are two known scenarios where the frame AC doesn't match 1696 * what the destination TXQ is. 1697 * 1698 * + non-QoS frames (eg management?) that the net80211 stack has 1699 * assigned a higher AC to, but since it's a non-QoS TID, it's 1700 * being thrown into TID 16. TID 16 gets the AC_BE queue. 1701 * It's quite possible that management frames should just be 1702 * direct dispatched to hardware rather than go via the software 1703 * queue; that should be investigated in the future. There are 1704 * some specific scenarios where this doesn't make sense, mostly 1705 * surrounding ADDBA request/response - hence why that is special 1706 * cased. 1707 * 1708 * + Multicast frames going into the VAP mcast queue. That shows up 1709 * as "TXQ 11". 1710 * 1711 * This driver should eventually support separate TID and TXQ locking, 1712 * allowing for arbitrary AC frames to appear on arbitrary software 1713 * queues, being queued to the "correct" hardware queue when needed. 1714 */ 1715 #if 0 1716 if (txq != sc->sc_ac2q[pri]) { 1717 DPRINTF(sc, ATH_DEBUG_XMIT, 1718 "%s: txq=%p (%d), pri=%d, pri txq=%p (%d)\n", 1719 __func__, 1720 txq, 1721 txq->axq_qnum, 1722 pri, 1723 sc->sc_ac2q[pri], 1724 sc->sc_ac2q[pri]->axq_qnum); 1725 } 1726 #endif 1727 1728 /* 1729 * Calculate miscellaneous flags. 1730 */ 1731 if (ismcast) { 1732 flags |= HAL_TXDESC_NOACK; /* no ack on broad/multicast */ 1733 } else if (pktlen > vap->iv_rtsthreshold && 1734 (ni->ni_ath_flags & IEEE80211_NODE_FF) == 0) { 1735 flags |= HAL_TXDESC_RTSENA; /* RTS based on frame length */ 1736 sc->sc_stats.ast_tx_rts++; 1737 } 1738 if (flags & HAL_TXDESC_NOACK) /* NB: avoid double counting */ 1739 sc->sc_stats.ast_tx_noack++; 1740 #ifdef IEEE80211_SUPPORT_TDMA 1741 if (sc->sc_tdma && (flags & HAL_TXDESC_NOACK) == 0) { 1742 DPRINTF(sc, ATH_DEBUG_TDMA, 1743 "%s: discard frame, ACK required w/ TDMA\n", __func__); 1744 sc->sc_stats.ast_tdma_ack++; 1745 /* XXX free tx dmamap */ 1746 ieee80211_free_mbuf(m0); 1747 return EIO; 1748 } 1749 #endif 1750 1751 /* 1752 * If it's a frame to do location reporting on, 1753 * communicate it to the HAL. 1754 */ 1755 if (ieee80211_get_toa_params(m0, NULL)) { 1756 device_printf(sc->sc_dev, 1757 "%s: setting TX positioning bit\n", __func__); 1758 flags |= HAL_TXDESC_POS; 1759 1760 /* 1761 * Note: The hardware reports timestamps for 1762 * each of the RX'ed packets as part of the packet 1763 * exchange. So this means things like RTS/CTS 1764 * exchanges, as well as the final ACK. 1765 * 1766 * So, if you send a RTS-protected NULL data frame, 1767 * you'll get an RX report for the RTS response, then 1768 * an RX report for the NULL frame, and then the TX 1769 * completion at the end. 1770 * 1771 * NOTE: it doesn't work right for CCK frames; 1772 * there's no channel info data provided unless 1773 * it's OFDM or HT. Will have to dig into it. 1774 */ 1775 flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 1776 bf->bf_flags |= ATH_BUF_TOA_PROBE; 1777 } 1778 1779 #if 0 1780 /* 1781 * Placeholder: if you want to transmit with the azimuth 1782 * timestamp in the end of the payload, here's where you 1783 * should set the TXDESC field. 1784 */ 1785 flags |= HAL_TXDESC_HWTS; 1786 #endif 1787 1788 /* 1789 * Determine if a tx interrupt should be generated for 1790 * this descriptor. We take a tx interrupt to reap 1791 * descriptors when the h/w hits an EOL condition or 1792 * when the descriptor is specifically marked to generate 1793 * an interrupt. We periodically mark descriptors in this 1794 * way to insure timely replenishing of the supply needed 1795 * for sending frames. Defering interrupts reduces system 1796 * load and potentially allows more concurrent work to be 1797 * done but if done to aggressively can cause senders to 1798 * backup. 1799 * 1800 * NB: use >= to deal with sc_txintrperiod changing 1801 * dynamically through sysctl. 1802 */ 1803 if (flags & HAL_TXDESC_INTREQ) { 1804 txq->axq_intrcnt = 0; 1805 } else if (++txq->axq_intrcnt >= sc->sc_txintrperiod) { 1806 flags |= HAL_TXDESC_INTREQ; 1807 txq->axq_intrcnt = 0; 1808 } 1809 1810 /* This point forward is actual TX bits */ 1811 1812 /* 1813 * At this point we are committed to sending the frame 1814 * and we don't need to look at m_nextpkt; clear it in 1815 * case this frame is part of frag chain. 1816 */ 1817 m0->m_nextpkt = NULL; 1818 1819 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 1820 ieee80211_dump_pkt(ic, mtod(m0, const uint8_t *), m0->m_len, 1821 sc->sc_hwmap[rix].ieeerate, -1); 1822 1823 if (ieee80211_radiotap_active_vap(vap)) { 1824 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 1825 if (iswep) 1826 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 1827 if (isfrag) 1828 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 1829 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 1830 sc->sc_tx_th.wt_txpower = ieee80211_get_node_txpower(ni); 1831 sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 1832 1833 ieee80211_radiotap_tx(vap, m0); 1834 } 1835 1836 /* Blank the legacy rate array */ 1837 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 1838 1839 /* 1840 * ath_buf_set_rate needs at least one rate/try to setup 1841 * the rate scenario. 1842 */ 1843 bf->bf_state.bfs_rc[0].rix = rix; 1844 bf->bf_state.bfs_rc[0].tries = try0; 1845 bf->bf_state.bfs_rc[0].ratecode = txrate; 1846 1847 /* Store the decided rate index values away */ 1848 bf->bf_state.bfs_pktlen = pktlen; 1849 bf->bf_state.bfs_hdrlen = hdrlen; 1850 bf->bf_state.bfs_atype = atype; 1851 bf->bf_state.bfs_txpower = ieee80211_get_node_txpower(ni); 1852 bf->bf_state.bfs_txrate0 = txrate; 1853 bf->bf_state.bfs_try0 = try0; 1854 bf->bf_state.bfs_keyix = keyix; 1855 bf->bf_state.bfs_txantenna = sc->sc_txantenna; 1856 bf->bf_state.bfs_txflags = flags; 1857 bf->bf_state.bfs_shpream = shortPreamble; 1858 1859 /* XXX this should be done in ath_tx_setrate() */ 1860 bf->bf_state.bfs_ctsrate0 = 0; /* ie, no hard-coded ctsrate */ 1861 bf->bf_state.bfs_ctsrate = 0; /* calculated later */ 1862 bf->bf_state.bfs_ctsduration = 0; 1863 bf->bf_state.bfs_ismrr = ismrr; 1864 1865 return 0; 1866 } 1867 1868 /* 1869 * Queue a frame to the hardware or software queue. 1870 * 1871 * This can be called by the net80211 code. 1872 * 1873 * XXX what about locking? Or, push the seqno assign into the 1874 * XXX aggregate scheduler so its serialised? 1875 * 1876 * XXX When sending management frames via ath_raw_xmit(), 1877 * should CLRDMASK be set unconditionally? 1878 */ 1879 int 1880 ath_tx_start(struct ath_softc *sc, struct ieee80211_node *ni, 1881 struct ath_buf *bf, struct mbuf *m0) 1882 { 1883 struct ieee80211vap *vap = ni->ni_vap; 1884 struct ath_vap *avp = ATH_VAP(vap); 1885 int r = 0; 1886 u_int pri; 1887 int tid; 1888 struct ath_txq *txq; 1889 int ismcast; 1890 const struct ieee80211_frame *wh; 1891 int is_ampdu, is_ampdu_tx, is_ampdu_pending; 1892 ieee80211_seq seqno; 1893 uint8_t type, subtype; 1894 int queue_to_head; 1895 1896 ATH_TX_LOCK_ASSERT(sc); 1897 1898 /* 1899 * Determine the target hardware queue. 1900 * 1901 * For multicast frames, the txq gets overridden appropriately 1902 * depending upon the state of PS. 1903 * 1904 * For any other frame, we do a TID/QoS lookup inside the frame 1905 * to see what the TID should be. If it's a non-QoS frame, the 1906 * AC and TID are overridden. The TID/TXQ code assumes the 1907 * TID is on a predictable hardware TXQ, so we don't support 1908 * having a node TID queued to multiple hardware TXQs. 1909 * This may change in the future but would require some locking 1910 * fudgery. 1911 */ 1912 pri = ath_tx_getac(sc, m0); 1913 tid = ath_tx_gettid(sc, m0); 1914 1915 txq = sc->sc_ac2q[pri]; 1916 wh = mtod(m0, struct ieee80211_frame *); 1917 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 1918 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 1919 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 1920 1921 /* 1922 * Enforce how deep the multicast queue can grow. 1923 * 1924 * XXX duplicated in ath_raw_xmit(). 1925 */ 1926 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1927 if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 1928 > sc->sc_txq_mcastq_maxdepth) { 1929 sc->sc_stats.ast_tx_mcastq_overflow++; 1930 m_freem(m0); 1931 return (ENOBUFS); 1932 } 1933 } 1934 1935 /* 1936 * Enforce how deep the unicast queue can grow. 1937 * 1938 * If the node is in power save then we don't want 1939 * the software queue to grow too deep, or a node may 1940 * end up consuming all of the ath_buf entries. 1941 * 1942 * For now, only do this for DATA frames. 1943 * 1944 * We will want to cap how many management/control 1945 * frames get punted to the software queue so it doesn't 1946 * fill up. But the correct solution isn't yet obvious. 1947 * In any case, this check should at least let frames pass 1948 * that we are direct-dispatching. 1949 * 1950 * XXX TODO: duplicate this to the raw xmit path! 1951 */ 1952 if (type == IEEE80211_FC0_TYPE_DATA && 1953 ATH_NODE(ni)->an_is_powersave && 1954 ATH_NODE(ni)->an_swq_depth > 1955 sc->sc_txq_node_psq_maxdepth) { 1956 sc->sc_stats.ast_tx_node_psq_overflow++; 1957 m_freem(m0); 1958 return (ENOBUFS); 1959 } 1960 1961 /* A-MPDU TX */ 1962 is_ampdu_tx = ath_tx_ampdu_running(sc, ATH_NODE(ni), tid); 1963 is_ampdu_pending = ath_tx_ampdu_pending(sc, ATH_NODE(ni), tid); 1964 is_ampdu = is_ampdu_tx | is_ampdu_pending; 1965 1966 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ac=%d, is_ampdu=%d\n", 1967 __func__, tid, pri, is_ampdu); 1968 1969 /* Set local packet state, used to queue packets to hardware */ 1970 bf->bf_state.bfs_tid = tid; 1971 bf->bf_state.bfs_tx_queue = txq->axq_qnum; 1972 bf->bf_state.bfs_pri = pri; 1973 1974 #if 1 1975 /* 1976 * When servicing one or more stations in power-save mode 1977 * (or) if there is some mcast data waiting on the mcast 1978 * queue (to prevent out of order delivery) multicast frames 1979 * must be bufferd until after the beacon. 1980 * 1981 * TODO: we should lock the mcastq before we check the length. 1982 */ 1983 if (sc->sc_cabq_enable && ismcast && (vap->iv_ps_sta || avp->av_mcastq.axq_depth)) { 1984 txq = &avp->av_mcastq; 1985 /* 1986 * Mark the frame as eventually belonging on the CAB 1987 * queue, so the descriptor setup functions will 1988 * correctly initialise the descriptor 'qcuId' field. 1989 */ 1990 bf->bf_state.bfs_tx_queue = sc->sc_cabq->axq_qnum; 1991 } 1992 #endif 1993 1994 /* Do the generic frame setup */ 1995 /* XXX should just bzero the bf_state? */ 1996 bf->bf_state.bfs_dobaw = 0; 1997 1998 /* A-MPDU TX? Manually set sequence number */ 1999 /* 2000 * Don't do it whilst pending; the net80211 layer still 2001 * assigns them. 2002 */ 2003 if (is_ampdu_tx) { 2004 /* 2005 * Always call; this function will 2006 * handle making sure that null data frames 2007 * don't get a sequence number from the current 2008 * TID and thus mess with the BAW. 2009 */ 2010 seqno = ath_tx_tid_seqno_assign(sc, ni, bf, m0); 2011 2012 /* 2013 * Don't add QoS NULL frames to the BAW. 2014 */ 2015 if (IEEE80211_QOS_HAS_SEQ(wh) && 2016 subtype != IEEE80211_FC0_SUBTYPE_QOS_NULL) { 2017 bf->bf_state.bfs_dobaw = 1; 2018 } 2019 } 2020 2021 /* 2022 * If needed, the sequence number has been assigned. 2023 * Squirrel it away somewhere easy to get to. 2024 */ 2025 bf->bf_state.bfs_seqno = M_SEQNO_GET(m0) << IEEE80211_SEQ_SEQ_SHIFT; 2026 2027 /* Is ampdu pending? fetch the seqno and print it out */ 2028 if (is_ampdu_pending) 2029 DPRINTF(sc, ATH_DEBUG_SW_TX, 2030 "%s: tid %d: ampdu pending, seqno %d\n", 2031 __func__, tid, M_SEQNO_GET(m0)); 2032 2033 /* This also sets up the DMA map */ 2034 r = ath_tx_normal_setup(sc, ni, bf, m0, txq); 2035 2036 if (r != 0) 2037 goto done; 2038 2039 /* At this point m0 could have changed! */ 2040 m0 = bf->bf_m; 2041 2042 #if 1 2043 /* 2044 * If it's a multicast frame, do a direct-dispatch to the 2045 * destination hardware queue. Don't bother software 2046 * queuing it. 2047 */ 2048 /* 2049 * If it's a BAR frame, do a direct dispatch to the 2050 * destination hardware queue. Don't bother software 2051 * queuing it, as the TID will now be paused. 2052 * Sending a BAR frame can occur from the net80211 txa timer 2053 * (ie, retries) or from the ath txtask (completion call.) 2054 * It queues directly to hardware because the TID is paused 2055 * at this point (and won't be unpaused until the BAR has 2056 * either been TXed successfully or max retries has been 2057 * reached.) 2058 */ 2059 /* 2060 * Until things are better debugged - if this node is asleep 2061 * and we're sending it a non-BAR frame, direct dispatch it. 2062 * Why? Because we need to figure out what's actually being 2063 * sent - eg, during reassociation/reauthentication after 2064 * the node (last) disappeared whilst asleep, the driver should 2065 * have unpaused/unsleep'ed the node. So until that is 2066 * sorted out, use this workaround. 2067 */ 2068 if (txq == &avp->av_mcastq) { 2069 DPRINTF(sc, ATH_DEBUG_SW_TX, 2070 "%s: bf=%p: mcastq: TX'ing\n", __func__, bf); 2071 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2072 ath_tx_xmit_normal(sc, txq, bf); 2073 } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 2074 &queue_to_head)) { 2075 ath_tx_swq(sc, ni, txq, queue_to_head, bf); 2076 } else { 2077 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2078 ath_tx_xmit_normal(sc, txq, bf); 2079 } 2080 #else 2081 /* 2082 * For now, since there's no software queue, 2083 * direct-dispatch to the hardware. 2084 */ 2085 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2086 /* 2087 * Update the current leak count if 2088 * we're leaking frames; and set the 2089 * MORE flag as appropriate. 2090 */ 2091 ath_tx_leak_count_update(sc, tid, bf); 2092 ath_tx_xmit_normal(sc, txq, bf); 2093 #endif 2094 done: 2095 return 0; 2096 } 2097 2098 static int 2099 ath_tx_raw_start(struct ath_softc *sc, struct ieee80211_node *ni, 2100 struct ath_buf *bf, struct mbuf *m0, 2101 const struct ieee80211_bpf_params *params) 2102 { 2103 struct ieee80211com *ic = &sc->sc_ic; 2104 struct ieee80211vap *vap = ni->ni_vap; 2105 int error, ismcast, ismrr; 2106 int keyix, hdrlen, pktlen, try0, txantenna; 2107 u_int8_t rix, txrate; 2108 struct ieee80211_frame *wh; 2109 u_int flags; 2110 HAL_PKT_TYPE atype; 2111 const HAL_RATE_TABLE *rt; 2112 struct ath_desc *ds; 2113 u_int pri; 2114 int o_tid = -1; 2115 int do_override; 2116 uint8_t type, subtype; 2117 int queue_to_head; 2118 struct ath_node *an = ATH_NODE(ni); 2119 2120 ATH_TX_LOCK_ASSERT(sc); 2121 2122 wh = mtod(m0, struct ieee80211_frame *); 2123 ismcast = IEEE80211_IS_MULTICAST(wh->i_addr1); 2124 hdrlen = ieee80211_anyhdrsize(wh); 2125 /* 2126 * Packet length must not include any 2127 * pad bytes; deduct them here. 2128 */ 2129 /* XXX honor IEEE80211_BPF_DATAPAD */ 2130 pktlen = m0->m_pkthdr.len - (hdrlen & 3) + IEEE80211_CRC_LEN; 2131 2132 type = wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK; 2133 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2134 2135 ATH_KTR(sc, ATH_KTR_TX, 2, 2136 "ath_tx_raw_start: ni=%p, bf=%p, raw", ni, bf); 2137 2138 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: ismcast=%d\n", 2139 __func__, ismcast); 2140 2141 pri = params->ibp_pri & 3; 2142 /* Override pri if the frame isn't a QoS one */ 2143 if (! IEEE80211_QOS_HAS_SEQ(wh)) 2144 pri = ath_tx_getac(sc, m0); 2145 2146 /* XXX If it's an ADDBA, override the correct queue */ 2147 do_override = ath_tx_action_frame_override_queue(sc, ni, m0, &o_tid); 2148 2149 /* Map ADDBA to the correct priority */ 2150 if (do_override) { 2151 #if 0 2152 DPRINTF(sc, ATH_DEBUG_XMIT, 2153 "%s: overriding tid %d pri %d -> %d\n", 2154 __func__, o_tid, pri, TID_TO_WME_AC(o_tid)); 2155 #endif 2156 pri = TID_TO_WME_AC(o_tid); 2157 } 2158 2159 /* Handle encryption twiddling if needed */ 2160 if (! ath_tx_tag_crypto(sc, ni, 2161 m0, params->ibp_flags & IEEE80211_BPF_CRYPTO, 0, 2162 &hdrlen, &pktlen, &keyix)) { 2163 ieee80211_free_mbuf(m0); 2164 return EIO; 2165 } 2166 /* packet header may have moved, reset our local pointer */ 2167 wh = mtod(m0, struct ieee80211_frame *); 2168 2169 /* Do the generic frame setup */ 2170 /* XXX should just bzero the bf_state? */ 2171 bf->bf_state.bfs_dobaw = 0; 2172 2173 error = ath_tx_dmasetup(sc, bf, m0); 2174 if (error != 0) 2175 return error; 2176 m0 = bf->bf_m; /* NB: may have changed */ 2177 wh = mtod(m0, struct ieee80211_frame *); 2178 KASSERT((ni != NULL), ("%s: ni=NULL!", __func__)); 2179 bf->bf_node = ni; /* NB: held reference */ 2180 2181 /* Always enable CLRDMASK for raw frames for now.. */ 2182 flags = HAL_TXDESC_CLRDMASK; /* XXX needed for crypto errs */ 2183 flags |= HAL_TXDESC_INTREQ; /* force interrupt */ 2184 if (params->ibp_flags & IEEE80211_BPF_RTS) 2185 flags |= HAL_TXDESC_RTSENA; 2186 else if (params->ibp_flags & IEEE80211_BPF_CTS) { 2187 /* XXX assume 11g/11n protection? */ 2188 bf->bf_state.bfs_doprot = 1; 2189 flags |= HAL_TXDESC_CTSENA; 2190 } 2191 /* XXX leave ismcast to injector? */ 2192 if ((params->ibp_flags & IEEE80211_BPF_NOACK) || ismcast) 2193 flags |= HAL_TXDESC_NOACK; 2194 2195 rt = sc->sc_currates; 2196 KASSERT(rt != NULL, ("no rate table, mode %u", sc->sc_curmode)); 2197 2198 /* Fetch first rate information */ 2199 rix = ath_tx_findrix(sc, params->ibp_rate0); 2200 try0 = params->ibp_try0; 2201 2202 /* 2203 * Override EAPOL rate as appropriate. 2204 */ 2205 if (m0->m_flags & M_EAPOL) { 2206 /* XXX? maybe always use long preamble? */ 2207 rix = an->an_mgmtrix; 2208 try0 = ATH_TXMAXTRY; /* XXX?too many? */ 2209 } 2210 2211 /* 2212 * If it's a frame to do location reporting on, 2213 * communicate it to the HAL. 2214 */ 2215 if (ieee80211_get_toa_params(m0, NULL)) { 2216 device_printf(sc->sc_dev, 2217 "%s: setting TX positioning bit\n", __func__); 2218 flags |= HAL_TXDESC_POS; 2219 flags &= ~(HAL_TXDESC_RTSENA | HAL_TXDESC_CTSENA); 2220 bf->bf_flags |= ATH_BUF_TOA_PROBE; 2221 } 2222 2223 txrate = rt->info[rix].rateCode; 2224 if (params->ibp_flags & IEEE80211_BPF_SHORTPRE) 2225 txrate |= rt->info[rix].shortPreamble; 2226 sc->sc_txrix = rix; 2227 ismrr = (params->ibp_try1 != 0); 2228 txantenna = params->ibp_pri >> 2; 2229 if (txantenna == 0) /* XXX? */ 2230 txantenna = sc->sc_txantenna; 2231 2232 /* 2233 * Since ctsrate is fixed, store it away for later 2234 * use when the descriptor fields are being set. 2235 */ 2236 if (flags & (HAL_TXDESC_RTSENA|HAL_TXDESC_CTSENA)) 2237 bf->bf_state.bfs_ctsrate0 = params->ibp_ctsrate; 2238 2239 /* 2240 * NB: we mark all packets as type PSPOLL so the h/w won't 2241 * set the sequence number, duration, etc. 2242 */ 2243 atype = HAL_PKT_TYPE_PSPOLL; 2244 2245 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 2246 ieee80211_dump_pkt(ic, mtod(m0, caddr_t), m0->m_len, 2247 sc->sc_hwmap[rix].ieeerate, -1); 2248 2249 if (ieee80211_radiotap_active_vap(vap)) { 2250 sc->sc_tx_th.wt_flags = sc->sc_hwmap[rix].txflags; 2251 if (wh->i_fc[1] & IEEE80211_FC1_PROTECTED) 2252 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_WEP; 2253 if (m0->m_flags & M_FRAG) 2254 sc->sc_tx_th.wt_flags |= IEEE80211_RADIOTAP_F_FRAG; 2255 sc->sc_tx_th.wt_rate = sc->sc_hwmap[rix].ieeerate; 2256 sc->sc_tx_th.wt_txpower = MIN(params->ibp_power, 2257 ieee80211_get_node_txpower(ni)); 2258 sc->sc_tx_th.wt_antenna = sc->sc_txantenna; 2259 2260 ieee80211_radiotap_tx(vap, m0); 2261 } 2262 2263 /* 2264 * Formulate first tx descriptor with tx controls. 2265 */ 2266 ds = bf->bf_desc; 2267 /* XXX check return value? */ 2268 2269 /* Store the decided rate index values away */ 2270 bf->bf_state.bfs_pktlen = pktlen; 2271 bf->bf_state.bfs_hdrlen = hdrlen; 2272 bf->bf_state.bfs_atype = atype; 2273 bf->bf_state.bfs_txpower = MIN(params->ibp_power, 2274 ieee80211_get_node_txpower(ni)); 2275 bf->bf_state.bfs_txrate0 = txrate; 2276 bf->bf_state.bfs_try0 = try0; 2277 bf->bf_state.bfs_keyix = keyix; 2278 bf->bf_state.bfs_txantenna = txantenna; 2279 bf->bf_state.bfs_txflags = flags; 2280 bf->bf_state.bfs_shpream = 2281 !! (params->ibp_flags & IEEE80211_BPF_SHORTPRE); 2282 2283 /* Set local packet state, used to queue packets to hardware */ 2284 bf->bf_state.bfs_tid = WME_AC_TO_TID(pri); 2285 bf->bf_state.bfs_tx_queue = sc->sc_ac2q[pri]->axq_qnum; 2286 bf->bf_state.bfs_pri = pri; 2287 2288 /* XXX this should be done in ath_tx_setrate() */ 2289 bf->bf_state.bfs_ctsrate = 0; 2290 bf->bf_state.bfs_ctsduration = 0; 2291 bf->bf_state.bfs_ismrr = ismrr; 2292 2293 /* Blank the legacy rate array */ 2294 bzero(&bf->bf_state.bfs_rc, sizeof(bf->bf_state.bfs_rc)); 2295 2296 bf->bf_state.bfs_rc[0].rix = rix; 2297 bf->bf_state.bfs_rc[0].tries = try0; 2298 bf->bf_state.bfs_rc[0].ratecode = txrate; 2299 2300 if (ismrr) { 2301 int rix; 2302 2303 rix = ath_tx_findrix(sc, params->ibp_rate1); 2304 bf->bf_state.bfs_rc[1].rix = rix; 2305 bf->bf_state.bfs_rc[1].tries = params->ibp_try1; 2306 2307 rix = ath_tx_findrix(sc, params->ibp_rate2); 2308 bf->bf_state.bfs_rc[2].rix = rix; 2309 bf->bf_state.bfs_rc[2].tries = params->ibp_try2; 2310 2311 rix = ath_tx_findrix(sc, params->ibp_rate3); 2312 bf->bf_state.bfs_rc[3].rix = rix; 2313 bf->bf_state.bfs_rc[3].tries = params->ibp_try3; 2314 } 2315 /* 2316 * All the required rate control decisions have been made; 2317 * fill in the rc flags. 2318 */ 2319 ath_tx_rate_fill_rcflags(sc, bf); 2320 2321 /* NB: no buffered multicast in power save support */ 2322 2323 /* 2324 * If we're overiding the ADDBA destination, dump directly 2325 * into the hardware queue, right after any pending 2326 * frames to that node are. 2327 */ 2328 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: dooverride=%d\n", 2329 __func__, do_override); 2330 2331 #if 1 2332 /* 2333 * Put addba frames in the right place in the right TID/HWQ. 2334 */ 2335 if (do_override) { 2336 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2337 /* 2338 * XXX if it's addba frames, should we be leaking 2339 * them out via the frame leak method? 2340 * XXX for now let's not risk it; but we may wish 2341 * to investigate this later. 2342 */ 2343 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2344 } else if (ath_tx_should_swq_frame(sc, ATH_NODE(ni), m0, 2345 &queue_to_head)) { 2346 /* Queue to software queue */ 2347 ath_tx_swq(sc, ni, sc->sc_ac2q[pri], queue_to_head, bf); 2348 } else { 2349 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2350 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2351 } 2352 #else 2353 /* Direct-dispatch to the hardware */ 2354 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 2355 /* 2356 * Update the current leak count if 2357 * we're leaking frames; and set the 2358 * MORE flag as appropriate. 2359 */ 2360 ath_tx_leak_count_update(sc, tid, bf); 2361 ath_tx_xmit_normal(sc, sc->sc_ac2q[pri], bf); 2362 #endif 2363 return 0; 2364 } 2365 2366 /* 2367 * Send a raw frame. 2368 * 2369 * This can be called by net80211. 2370 */ 2371 int 2372 ath_raw_xmit(struct ieee80211_node *ni, struct mbuf *m, 2373 const struct ieee80211_bpf_params *params) 2374 { 2375 struct ieee80211com *ic = ni->ni_ic; 2376 struct ath_softc *sc = ic->ic_softc; 2377 struct ath_buf *bf; 2378 struct ieee80211_frame *wh = mtod(m, struct ieee80211_frame *); 2379 int error = 0; 2380 2381 ATH_PCU_LOCK(sc); 2382 if (sc->sc_inreset_cnt > 0) { 2383 DPRINTF(sc, ATH_DEBUG_XMIT, 2384 "%s: sc_inreset_cnt > 0; bailing\n", __func__); 2385 error = EIO; 2386 ATH_PCU_UNLOCK(sc); 2387 goto badbad; 2388 } 2389 sc->sc_txstart_cnt++; 2390 ATH_PCU_UNLOCK(sc); 2391 2392 /* Wake the hardware up already */ 2393 ATH_LOCK(sc); 2394 ath_power_set_power_state(sc, HAL_PM_AWAKE); 2395 ATH_UNLOCK(sc); 2396 2397 ATH_TX_LOCK(sc); 2398 2399 if (!sc->sc_running || sc->sc_invalid) { 2400 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: discard frame, r/i: %d/%d", 2401 __func__, sc->sc_running, sc->sc_invalid); 2402 m_freem(m); 2403 error = ENETDOWN; 2404 goto bad; 2405 } 2406 2407 /* 2408 * Enforce how deep the multicast queue can grow. 2409 * 2410 * XXX duplicated in ath_tx_start(). 2411 */ 2412 if (IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2413 if (sc->sc_cabq->axq_depth + sc->sc_cabq->fifo.axq_depth 2414 > sc->sc_txq_mcastq_maxdepth) { 2415 sc->sc_stats.ast_tx_mcastq_overflow++; 2416 error = ENOBUFS; 2417 } 2418 2419 if (error != 0) { 2420 m_freem(m); 2421 goto bad; 2422 } 2423 } 2424 2425 /* 2426 * Grab a TX buffer and associated resources. 2427 */ 2428 bf = ath_getbuf(sc, ATH_BUFTYPE_MGMT); 2429 if (bf == NULL) { 2430 sc->sc_stats.ast_tx_nobuf++; 2431 m_freem(m); 2432 error = ENOBUFS; 2433 goto bad; 2434 } 2435 ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: m=%p, params=%p, bf=%p\n", 2436 m, params, bf); 2437 2438 if (params == NULL) { 2439 /* 2440 * Legacy path; interpret frame contents to decide 2441 * precisely how to send the frame. 2442 */ 2443 if (ath_tx_start(sc, ni, bf, m)) { 2444 error = EIO; /* XXX */ 2445 goto bad2; 2446 } 2447 } else { 2448 /* 2449 * Caller supplied explicit parameters to use in 2450 * sending the frame. 2451 */ 2452 if (ath_tx_raw_start(sc, ni, bf, m, params)) { 2453 error = EIO; /* XXX */ 2454 goto bad2; 2455 } 2456 } 2457 sc->sc_wd_timer = 5; 2458 sc->sc_stats.ast_tx_raw++; 2459 2460 /* 2461 * Update the TIM - if there's anything queued to the 2462 * software queue and power save is enabled, we should 2463 * set the TIM. 2464 */ 2465 ath_tx_update_tim(sc, ni, 1); 2466 2467 ATH_TX_UNLOCK(sc); 2468 2469 ATH_PCU_LOCK(sc); 2470 sc->sc_txstart_cnt--; 2471 ATH_PCU_UNLOCK(sc); 2472 2473 2474 /* Put the hardware back to sleep if required */ 2475 ATH_LOCK(sc); 2476 ath_power_restore_power_state(sc); 2477 ATH_UNLOCK(sc); 2478 2479 return 0; 2480 2481 bad2: 2482 ATH_KTR(sc, ATH_KTR_TX, 3, "ath_raw_xmit: bad2: m=%p, params=%p, " 2483 "bf=%p", 2484 m, 2485 params, 2486 bf); 2487 ATH_TXBUF_LOCK(sc); 2488 ath_returnbuf_head(sc, bf); 2489 ATH_TXBUF_UNLOCK(sc); 2490 2491 bad: 2492 ATH_TX_UNLOCK(sc); 2493 2494 ATH_PCU_LOCK(sc); 2495 sc->sc_txstart_cnt--; 2496 ATH_PCU_UNLOCK(sc); 2497 2498 /* Put the hardware back to sleep if required */ 2499 ATH_LOCK(sc); 2500 ath_power_restore_power_state(sc); 2501 ATH_UNLOCK(sc); 2502 2503 badbad: 2504 ATH_KTR(sc, ATH_KTR_TX, 2, "ath_raw_xmit: bad0: m=%p, params=%p", 2505 m, params); 2506 sc->sc_stats.ast_tx_raw_fail++; 2507 2508 return error; 2509 } 2510 2511 /* Some helper functions */ 2512 2513 /* 2514 * ADDBA (and potentially others) need to be placed in the same 2515 * hardware queue as the TID/node it's relating to. This is so 2516 * it goes out after any pending non-aggregate frames to the 2517 * same node/TID. 2518 * 2519 * If this isn't done, the ADDBA can go out before the frames 2520 * queued in hardware. Even though these frames have a sequence 2521 * number -earlier- than the ADDBA can be transmitted (but 2522 * no frames whose sequence numbers are after the ADDBA should 2523 * be!) they'll arrive after the ADDBA - and the receiving end 2524 * will simply drop them as being out of the BAW. 2525 * 2526 * The frames can't be appended to the TID software queue - it'll 2527 * never be sent out. So these frames have to be directly 2528 * dispatched to the hardware, rather than queued in software. 2529 * So if this function returns true, the TXQ has to be 2530 * overridden and it has to be directly dispatched. 2531 * 2532 * It's a dirty hack, but someone's gotta do it. 2533 */ 2534 2535 /* 2536 * XXX doesn't belong here! 2537 */ 2538 static int 2539 ieee80211_is_action(struct ieee80211_frame *wh) 2540 { 2541 /* Type: Management frame? */ 2542 if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != 2543 IEEE80211_FC0_TYPE_MGT) 2544 return 0; 2545 2546 /* Subtype: Action frame? */ 2547 if ((wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK) != 2548 IEEE80211_FC0_SUBTYPE_ACTION) 2549 return 0; 2550 2551 return 1; 2552 } 2553 2554 #define MS(_v, _f) (((_v) & _f) >> _f##_S) 2555 /* 2556 * Return an alternate TID for ADDBA request frames. 2557 * 2558 * Yes, this likely should be done in the net80211 layer. 2559 */ 2560 static int 2561 ath_tx_action_frame_override_queue(struct ath_softc *sc, 2562 struct ieee80211_node *ni, 2563 struct mbuf *m0, int *tid) 2564 { 2565 struct ieee80211_frame *wh = mtod(m0, struct ieee80211_frame *); 2566 struct ieee80211_action_ba_addbarequest *ia; 2567 uint8_t *frm; 2568 uint16_t baparamset; 2569 2570 /* Not action frame? Bail */ 2571 if (! ieee80211_is_action(wh)) 2572 return 0; 2573 2574 /* XXX Not needed for frames we send? */ 2575 #if 0 2576 /* Correct length? */ 2577 if (! ieee80211_parse_action(ni, m)) 2578 return 0; 2579 #endif 2580 2581 /* Extract out action frame */ 2582 frm = (u_int8_t *)&wh[1]; 2583 ia = (struct ieee80211_action_ba_addbarequest *) frm; 2584 2585 /* Not ADDBA? Bail */ 2586 if (ia->rq_header.ia_category != IEEE80211_ACTION_CAT_BA) 2587 return 0; 2588 if (ia->rq_header.ia_action != IEEE80211_ACTION_BA_ADDBA_REQUEST) 2589 return 0; 2590 2591 /* Extract TID, return it */ 2592 baparamset = le16toh(ia->rq_baparamset); 2593 *tid = (int) MS(baparamset, IEEE80211_BAPS_TID); 2594 2595 return 1; 2596 } 2597 #undef MS 2598 2599 /* Per-node software queue operations */ 2600 2601 /* 2602 * Add the current packet to the given BAW. 2603 * It is assumed that the current packet 2604 * 2605 * + fits inside the BAW; 2606 * + already has had a sequence number allocated. 2607 * 2608 * Since the BAW status may be modified by both the ath task and 2609 * the net80211/ifnet contexts, the TID must be locked. 2610 */ 2611 void 2612 ath_tx_addto_baw(struct ath_softc *sc, struct ath_node *an, 2613 struct ath_tid *tid, struct ath_buf *bf) 2614 { 2615 int index, cindex; 2616 struct ieee80211_tx_ampdu *tap; 2617 2618 ATH_TX_LOCK_ASSERT(sc); 2619 2620 if (bf->bf_state.bfs_isretried) 2621 return; 2622 2623 tap = ath_tx_get_tx_tid(an, tid->tid); 2624 2625 if (! bf->bf_state.bfs_dobaw) { 2626 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2627 "%s: dobaw=0, seqno=%d, window %d:%d\n", 2628 __func__, SEQNO(bf->bf_state.bfs_seqno), 2629 tap->txa_start, tap->txa_wnd); 2630 } 2631 2632 if (bf->bf_state.bfs_addedbaw) 2633 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2634 "%s: re-added? tid=%d, seqno %d; window %d:%d; " 2635 "baw head=%d tail=%d\n", 2636 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2637 tap->txa_start, tap->txa_wnd, tid->baw_head, 2638 tid->baw_tail); 2639 2640 /* 2641 * Verify that the given sequence number is not outside of the 2642 * BAW. Complain loudly if that's the case. 2643 */ 2644 if (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 2645 SEQNO(bf->bf_state.bfs_seqno))) { 2646 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2647 "%s: bf=%p: outside of BAW?? tid=%d, seqno %d; window %d:%d; " 2648 "baw head=%d tail=%d\n", 2649 __func__, bf, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2650 tap->txa_start, tap->txa_wnd, tid->baw_head, 2651 tid->baw_tail); 2652 } 2653 2654 /* 2655 * ni->ni_txseqs[] is the currently allocated seqno. 2656 * the txa state contains the current baw start. 2657 */ 2658 index = ATH_BA_INDEX(tap->txa_start, SEQNO(bf->bf_state.bfs_seqno)); 2659 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2660 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2661 "%s: tid=%d, seqno %d; window %d:%d; index=%d cindex=%d " 2662 "baw head=%d tail=%d\n", 2663 __func__, tid->tid, SEQNO(bf->bf_state.bfs_seqno), 2664 tap->txa_start, tap->txa_wnd, index, cindex, tid->baw_head, 2665 tid->baw_tail); 2666 2667 2668 #if 0 2669 assert(tid->tx_buf[cindex] == NULL); 2670 #endif 2671 if (tid->tx_buf[cindex] != NULL) { 2672 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2673 "%s: ba packet dup (index=%d, cindex=%d, " 2674 "head=%d, tail=%d)\n", 2675 __func__, index, cindex, tid->baw_head, tid->baw_tail); 2676 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2677 "%s: BA bf: %p; seqno=%d ; new bf: %p; seqno=%d\n", 2678 __func__, 2679 tid->tx_buf[cindex], 2680 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno), 2681 bf, 2682 SEQNO(bf->bf_state.bfs_seqno) 2683 ); 2684 } 2685 tid->tx_buf[cindex] = bf; 2686 2687 if (index >= ((tid->baw_tail - tid->baw_head) & 2688 (ATH_TID_MAX_BUFS - 1))) { 2689 tid->baw_tail = cindex; 2690 INCR(tid->baw_tail, ATH_TID_MAX_BUFS); 2691 } 2692 } 2693 2694 /* 2695 * Flip the BAW buffer entry over from the existing one to the new one. 2696 * 2697 * When software retransmitting a (sub-)frame, it is entirely possible that 2698 * the frame ath_buf is marked as BUSY and can't be immediately reused. 2699 * In that instance the buffer is cloned and the new buffer is used for 2700 * retransmit. We thus need to update the ath_buf slot in the BAW buf 2701 * tracking array to maintain consistency. 2702 */ 2703 static void 2704 ath_tx_switch_baw_buf(struct ath_softc *sc, struct ath_node *an, 2705 struct ath_tid *tid, struct ath_buf *old_bf, struct ath_buf *new_bf) 2706 { 2707 int index, cindex; 2708 struct ieee80211_tx_ampdu *tap; 2709 int seqno = SEQNO(old_bf->bf_state.bfs_seqno); 2710 2711 ATH_TX_LOCK_ASSERT(sc); 2712 2713 tap = ath_tx_get_tx_tid(an, tid->tid); 2714 index = ATH_BA_INDEX(tap->txa_start, seqno); 2715 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2716 2717 /* 2718 * Just warn for now; if it happens then we should find out 2719 * about it. It's highly likely the aggregation session will 2720 * soon hang. 2721 */ 2722 if (old_bf->bf_state.bfs_seqno != new_bf->bf_state.bfs_seqno) { 2723 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2724 "%s: retransmitted buffer" 2725 " has mismatching seqno's, BA session may hang.\n", 2726 __func__); 2727 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2728 "%s: old seqno=%d, new_seqno=%d\n", __func__, 2729 old_bf->bf_state.bfs_seqno, new_bf->bf_state.bfs_seqno); 2730 } 2731 2732 if (tid->tx_buf[cindex] != old_bf) { 2733 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2734 "%s: ath_buf pointer incorrect; " 2735 " has m BA session may hang.\n", __func__); 2736 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2737 "%s: old bf=%p, new bf=%p\n", __func__, old_bf, new_bf); 2738 } 2739 2740 tid->tx_buf[cindex] = new_bf; 2741 } 2742 2743 /* 2744 * seq_start - left edge of BAW 2745 * seq_next - current/next sequence number to allocate 2746 * 2747 * Since the BAW status may be modified by both the ath task and 2748 * the net80211/ifnet contexts, the TID must be locked. 2749 */ 2750 static void 2751 ath_tx_update_baw(struct ath_softc *sc, struct ath_node *an, 2752 struct ath_tid *tid, const struct ath_buf *bf) 2753 { 2754 int index, cindex; 2755 struct ieee80211_tx_ampdu *tap; 2756 int seqno = SEQNO(bf->bf_state.bfs_seqno); 2757 2758 ATH_TX_LOCK_ASSERT(sc); 2759 2760 tap = ath_tx_get_tx_tid(an, tid->tid); 2761 index = ATH_BA_INDEX(tap->txa_start, seqno); 2762 cindex = (tid->baw_head + index) & (ATH_TID_MAX_BUFS - 1); 2763 2764 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2765 "%s: tid=%d, baw=%d:%d, seqno=%d, index=%d, cindex=%d, " 2766 "baw head=%d, tail=%d\n", 2767 __func__, tid->tid, tap->txa_start, tap->txa_wnd, seqno, index, 2768 cindex, tid->baw_head, tid->baw_tail); 2769 2770 /* 2771 * If this occurs then we have a big problem - something else 2772 * has slid tap->txa_start along without updating the BAW 2773 * tracking start/end pointers. Thus the TX BAW state is now 2774 * completely busted. 2775 * 2776 * But for now, since I haven't yet fixed TDMA and buffer cloning, 2777 * it's quite possible that a cloned buffer is making its way 2778 * here and causing it to fire off. Disable TDMA for now. 2779 */ 2780 if (tid->tx_buf[cindex] != bf) { 2781 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2782 "%s: comp bf=%p, seq=%d; slot bf=%p, seqno=%d\n", 2783 __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 2784 tid->tx_buf[cindex], 2785 (tid->tx_buf[cindex] != NULL) ? 2786 SEQNO(tid->tx_buf[cindex]->bf_state.bfs_seqno) : -1); 2787 } 2788 2789 tid->tx_buf[cindex] = NULL; 2790 2791 while (tid->baw_head != tid->baw_tail && 2792 !tid->tx_buf[tid->baw_head]) { 2793 INCR(tap->txa_start, IEEE80211_SEQ_RANGE); 2794 INCR(tid->baw_head, ATH_TID_MAX_BUFS); 2795 } 2796 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 2797 "%s: tid=%d: baw is now %d:%d, baw head=%d\n", 2798 __func__, tid->tid, tap->txa_start, tap->txa_wnd, tid->baw_head); 2799 } 2800 2801 static void 2802 ath_tx_leak_count_update(struct ath_softc *sc, struct ath_tid *tid, 2803 struct ath_buf *bf) 2804 { 2805 struct ieee80211_frame *wh; 2806 2807 ATH_TX_LOCK_ASSERT(sc); 2808 2809 if (tid->an->an_leak_count > 0) { 2810 wh = mtod(bf->bf_m, struct ieee80211_frame *); 2811 2812 /* 2813 * Update MORE based on the software/net80211 queue states. 2814 */ 2815 if ((tid->an->an_stack_psq > 0) 2816 || (tid->an->an_swq_depth > 0)) 2817 wh->i_fc[1] |= IEEE80211_FC1_MORE_DATA; 2818 else 2819 wh->i_fc[1] &= ~IEEE80211_FC1_MORE_DATA; 2820 2821 DPRINTF(sc, ATH_DEBUG_NODE_PWRSAVE, 2822 "%s: %6D: leak count = %d, psq=%d, swq=%d, MORE=%d\n", 2823 __func__, 2824 tid->an->an_node.ni_macaddr, 2825 ":", 2826 tid->an->an_leak_count, 2827 tid->an->an_stack_psq, 2828 tid->an->an_swq_depth, 2829 !! (wh->i_fc[1] & IEEE80211_FC1_MORE_DATA)); 2830 2831 /* 2832 * Re-sync the underlying buffer. 2833 */ 2834 bus_dmamap_sync(sc->sc_dmat, bf->bf_dmamap, 2835 BUS_DMASYNC_PREWRITE); 2836 2837 tid->an->an_leak_count --; 2838 } 2839 } 2840 2841 static int 2842 ath_tx_tid_can_tx_or_sched(struct ath_softc *sc, struct ath_tid *tid) 2843 { 2844 2845 ATH_TX_LOCK_ASSERT(sc); 2846 2847 if (tid->an->an_leak_count > 0) { 2848 return (1); 2849 } 2850 if (tid->paused) 2851 return (0); 2852 return (1); 2853 } 2854 2855 /* 2856 * Mark the current node/TID as ready to TX. 2857 * 2858 * This is done to make it easy for the software scheduler to 2859 * find which nodes have data to send. 2860 * 2861 * The TXQ lock must be held. 2862 */ 2863 void 2864 ath_tx_tid_sched(struct ath_softc *sc, struct ath_tid *tid) 2865 { 2866 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2867 2868 ATH_TX_LOCK_ASSERT(sc); 2869 2870 /* 2871 * If we are leaking out a frame to this destination 2872 * for PS-POLL, ensure that we allow scheduling to 2873 * occur. 2874 */ 2875 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 2876 return; /* paused, can't schedule yet */ 2877 2878 if (tid->sched) 2879 return; /* already scheduled */ 2880 2881 tid->sched = 1; 2882 2883 #if 0 2884 /* 2885 * If this is a sleeping node we're leaking to, given 2886 * it a higher priority. This is so bad for QoS it hurts. 2887 */ 2888 if (tid->an->an_leak_count) { 2889 TAILQ_INSERT_HEAD(&txq->axq_tidq, tid, axq_qelem); 2890 } else { 2891 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2892 } 2893 #endif 2894 2895 /* 2896 * We can't do the above - it'll confuse the TXQ software 2897 * scheduler which will keep checking the _head_ TID 2898 * in the list to see if it has traffic. If we queue 2899 * a TID to the head of the list and it doesn't transmit, 2900 * we'll check it again. 2901 * 2902 * So, get the rest of this leaking frames support working 2903 * and reliable first and _then_ optimise it so they're 2904 * pushed out in front of any other pending software 2905 * queued nodes. 2906 */ 2907 TAILQ_INSERT_TAIL(&txq->axq_tidq, tid, axq_qelem); 2908 } 2909 2910 /* 2911 * Mark the current node as no longer needing to be polled for 2912 * TX packets. 2913 * 2914 * The TXQ lock must be held. 2915 */ 2916 static void 2917 ath_tx_tid_unsched(struct ath_softc *sc, struct ath_tid *tid) 2918 { 2919 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 2920 2921 ATH_TX_LOCK_ASSERT(sc); 2922 2923 if (tid->sched == 0) 2924 return; 2925 2926 tid->sched = 0; 2927 TAILQ_REMOVE(&txq->axq_tidq, tid, axq_qelem); 2928 } 2929 2930 /* 2931 * Assign a sequence number manually to the given frame. 2932 * 2933 * This should only be called for A-MPDU TX frames. 2934 */ 2935 static ieee80211_seq 2936 ath_tx_tid_seqno_assign(struct ath_softc *sc, struct ieee80211_node *ni, 2937 struct ath_buf *bf, struct mbuf *m0) 2938 { 2939 struct ieee80211_frame *wh; 2940 int tid, pri; 2941 ieee80211_seq seqno; 2942 uint8_t subtype; 2943 2944 /* TID lookup */ 2945 wh = mtod(m0, struct ieee80211_frame *); 2946 pri = M_WME_GETAC(m0); /* honor classification */ 2947 tid = WME_AC_TO_TID(pri); 2948 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pri=%d, tid=%d, qos has seq=%d\n", 2949 __func__, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 2950 2951 /* XXX Is it a control frame? Ignore */ 2952 2953 /* Does the packet require a sequence number? */ 2954 if (! IEEE80211_QOS_HAS_SEQ(wh)) 2955 return -1; 2956 2957 ATH_TX_LOCK_ASSERT(sc); 2958 2959 /* 2960 * Is it a QOS NULL Data frame? Give it a sequence number from 2961 * the default TID (IEEE80211_NONQOS_TID.) 2962 * 2963 * The RX path of everything I've looked at doesn't include the NULL 2964 * data frame sequence number in the aggregation state updates, so 2965 * assigning it a sequence number there will cause a BAW hole on the 2966 * RX side. 2967 */ 2968 subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK; 2969 if (subtype == IEEE80211_FC0_SUBTYPE_QOS_NULL) { 2970 /* XXX no locking for this TID? This is a bit of a problem. */ 2971 seqno = ni->ni_txseqs[IEEE80211_NONQOS_TID]; 2972 INCR(ni->ni_txseqs[IEEE80211_NONQOS_TID], IEEE80211_SEQ_RANGE); 2973 } else { 2974 /* Manually assign sequence number */ 2975 seqno = ni->ni_txseqs[tid]; 2976 INCR(ni->ni_txseqs[tid], IEEE80211_SEQ_RANGE); 2977 } 2978 *(uint16_t *)&wh->i_seq[0] = htole16(seqno << IEEE80211_SEQ_SEQ_SHIFT); 2979 M_SEQNO_SET(m0, seqno); 2980 2981 /* Return so caller can do something with it if needed */ 2982 DPRINTF(sc, ATH_DEBUG_SW_TX, 2983 "%s: -> subtype=0x%x, tid=%d, seqno=%d\n", 2984 __func__, subtype, tid, seqno); 2985 return seqno; 2986 } 2987 2988 /* 2989 * Attempt to direct dispatch an aggregate frame to hardware. 2990 * If the frame is out of BAW, queue. 2991 * Otherwise, schedule it as a single frame. 2992 */ 2993 static void 2994 ath_tx_xmit_aggr(struct ath_softc *sc, struct ath_node *an, 2995 struct ath_txq *txq, struct ath_buf *bf) 2996 { 2997 struct ath_tid *tid = &an->an_tid[bf->bf_state.bfs_tid]; 2998 struct ieee80211_tx_ampdu *tap; 2999 3000 ATH_TX_LOCK_ASSERT(sc); 3001 3002 tap = ath_tx_get_tx_tid(an, tid->tid); 3003 3004 /* paused? queue */ 3005 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 3006 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3007 /* XXX don't sched - we're paused! */ 3008 return; 3009 } 3010 3011 /* outside baw? queue */ 3012 if (bf->bf_state.bfs_dobaw && 3013 (! BAW_WITHIN(tap->txa_start, tap->txa_wnd, 3014 SEQNO(bf->bf_state.bfs_seqno)))) { 3015 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3016 ath_tx_tid_sched(sc, tid); 3017 return; 3018 } 3019 3020 /* 3021 * This is a temporary check and should be removed once 3022 * all the relevant code paths have been fixed. 3023 * 3024 * During aggregate retries, it's possible that the head 3025 * frame will fail (which has the bfs_aggr and bfs_nframes 3026 * fields set for said aggregate) and will be retried as 3027 * a single frame. In this instance, the values should 3028 * be reset or the completion code will get upset with you. 3029 */ 3030 if (bf->bf_state.bfs_aggr != 0 || bf->bf_state.bfs_nframes > 1) { 3031 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 3032 "%s: bfs_aggr=%d, bfs_nframes=%d\n", __func__, 3033 bf->bf_state.bfs_aggr, bf->bf_state.bfs_nframes); 3034 bf->bf_state.bfs_aggr = 0; 3035 bf->bf_state.bfs_nframes = 1; 3036 } 3037 3038 /* Update CLRDMASK just before this frame is queued */ 3039 ath_tx_update_clrdmask(sc, tid, bf); 3040 3041 /* Direct dispatch to hardware */ 3042 ath_tx_do_ratelookup(sc, bf); 3043 ath_tx_calc_duration(sc, bf); 3044 ath_tx_calc_protection(sc, bf); 3045 ath_tx_set_rtscts(sc, bf); 3046 ath_tx_rate_fill_rcflags(sc, bf); 3047 ath_tx_setds(sc, bf); 3048 3049 /* Statistics */ 3050 sc->sc_aggr_stats.aggr_low_hwq_single_pkt++; 3051 3052 /* Track per-TID hardware queue depth correctly */ 3053 tid->hwq_depth++; 3054 3055 /* Add to BAW */ 3056 if (bf->bf_state.bfs_dobaw) { 3057 ath_tx_addto_baw(sc, an, tid, bf); 3058 bf->bf_state.bfs_addedbaw = 1; 3059 } 3060 3061 /* Set completion handler, multi-frame aggregate or not */ 3062 bf->bf_comp = ath_tx_aggr_comp; 3063 3064 /* 3065 * Update the current leak count if 3066 * we're leaking frames; and set the 3067 * MORE flag as appropriate. 3068 */ 3069 ath_tx_leak_count_update(sc, tid, bf); 3070 3071 /* Hand off to hardware */ 3072 ath_tx_handoff(sc, txq, bf); 3073 } 3074 3075 /* 3076 * Attempt to send the packet. 3077 * If the queue isn't busy, direct-dispatch. 3078 * If the queue is busy enough, queue the given packet on the 3079 * relevant software queue. 3080 */ 3081 void 3082 ath_tx_swq(struct ath_softc *sc, struct ieee80211_node *ni, 3083 struct ath_txq *txq, int queue_to_head, struct ath_buf *bf) 3084 { 3085 struct ath_node *an = ATH_NODE(ni); 3086 struct ieee80211_frame *wh; 3087 struct ath_tid *atid; 3088 int pri, tid; 3089 struct mbuf *m0 = bf->bf_m; 3090 3091 ATH_TX_LOCK_ASSERT(sc); 3092 3093 /* Fetch the TID - non-QoS frames get assigned to TID 16 */ 3094 wh = mtod(m0, struct ieee80211_frame *); 3095 pri = ath_tx_getac(sc, m0); 3096 tid = ath_tx_gettid(sc, m0); 3097 atid = &an->an_tid[tid]; 3098 3099 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p, pri=%d, tid=%d, qos=%d\n", 3100 __func__, bf, pri, tid, IEEE80211_QOS_HAS_SEQ(wh)); 3101 3102 /* Set local packet state, used to queue packets to hardware */ 3103 /* XXX potentially duplicate info, re-check */ 3104 bf->bf_state.bfs_tid = tid; 3105 bf->bf_state.bfs_tx_queue = txq->axq_qnum; 3106 bf->bf_state.bfs_pri = pri; 3107 3108 /* 3109 * If the hardware queue isn't busy, queue it directly. 3110 * If the hardware queue is busy, queue it. 3111 * If the TID is paused or the traffic it outside BAW, software 3112 * queue it. 3113 * 3114 * If the node is in power-save and we're leaking a frame, 3115 * leak a single frame. 3116 */ 3117 if (! ath_tx_tid_can_tx_or_sched(sc, atid)) { 3118 /* TID is paused, queue */ 3119 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: paused\n", __func__); 3120 /* 3121 * If the caller requested that it be sent at a high 3122 * priority, queue it at the head of the list. 3123 */ 3124 if (queue_to_head) 3125 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 3126 else 3127 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3128 } else if (ath_tx_ampdu_pending(sc, an, tid)) { 3129 /* AMPDU pending; queue */ 3130 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: pending\n", __func__); 3131 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3132 /* XXX sched? */ 3133 } else if (ath_tx_ampdu_running(sc, an, tid)) { 3134 /* 3135 * AMPDU running, queue single-frame if the hardware queue 3136 * isn't busy. 3137 * 3138 * If the hardware queue is busy, sending an aggregate frame 3139 * then just hold off so we can queue more aggregate frames. 3140 * 3141 * Otherwise we may end up with single frames leaking through 3142 * because we are dispatching them too quickly. 3143 * 3144 * TODO: maybe we should treat this as two policies - minimise 3145 * latency, or maximise throughput. Then for BE/BK we can 3146 * maximise throughput, and VO/VI (if AMPDU is enabled!) 3147 * minimise latency. 3148 */ 3149 3150 /* 3151 * Always queue the frame to the tail of the list. 3152 */ 3153 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3154 3155 /* 3156 * If the hardware queue isn't busy, direct dispatch 3157 * the head frame in the list. 3158 * 3159 * Note: if we're say, configured to do ADDBA but not A-MPDU 3160 * then maybe we want to still queue two non-aggregate frames 3161 * to the hardware. Again with the per-TID policy 3162 * configuration..) 3163 * 3164 * Otherwise, schedule the TID. 3165 */ 3166 /* XXX TXQ locking */ 3167 if (txq->axq_depth + txq->fifo.axq_depth == 0) { 3168 3169 bf = ATH_TID_FIRST(atid); 3170 ATH_TID_REMOVE(atid, bf, bf_list); 3171 3172 /* 3173 * Ensure it's definitely treated as a non-AMPDU 3174 * frame - this information may have been left 3175 * over from a previous attempt. 3176 */ 3177 bf->bf_state.bfs_aggr = 0; 3178 bf->bf_state.bfs_nframes = 1; 3179 3180 /* Queue to the hardware */ 3181 ath_tx_xmit_aggr(sc, an, txq, bf); 3182 DPRINTF(sc, ATH_DEBUG_SW_TX, 3183 "%s: xmit_aggr\n", 3184 __func__); 3185 } else { 3186 DPRINTF(sc, ATH_DEBUG_SW_TX, 3187 "%s: ampdu; swq'ing\n", 3188 __func__); 3189 3190 ath_tx_tid_sched(sc, atid); 3191 } 3192 /* 3193 * If we're not doing A-MPDU, be prepared to direct dispatch 3194 * up to both limits if possible. This particular corner 3195 * case may end up with packet starvation between aggregate 3196 * traffic and non-aggregate traffic: we want to ensure 3197 * that non-aggregate stations get a few frames queued to the 3198 * hardware before the aggregate station(s) get their chance. 3199 * 3200 * So if you only ever see a couple of frames direct dispatched 3201 * to the hardware from a non-AMPDU client, check both here 3202 * and in the software queue dispatcher to ensure that those 3203 * non-AMPDU stations get a fair chance to transmit. 3204 */ 3205 /* XXX TXQ locking */ 3206 } else if ((txq->axq_depth + txq->fifo.axq_depth < sc->sc_hwq_limit_nonaggr) && 3207 (txq->axq_aggr_depth < sc->sc_hwq_limit_aggr)) { 3208 /* AMPDU not running, attempt direct dispatch */ 3209 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: xmit_normal\n", __func__); 3210 /* See if clrdmask needs to be set */ 3211 ath_tx_update_clrdmask(sc, atid, bf); 3212 3213 /* 3214 * Update the current leak count if 3215 * we're leaking frames; and set the 3216 * MORE flag as appropriate. 3217 */ 3218 ath_tx_leak_count_update(sc, atid, bf); 3219 3220 /* 3221 * Dispatch the frame. 3222 */ 3223 ath_tx_xmit_normal(sc, txq, bf); 3224 } else { 3225 /* Busy; queue */ 3226 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: swq'ing\n", __func__); 3227 ATH_TID_INSERT_TAIL(atid, bf, bf_list); 3228 ath_tx_tid_sched(sc, atid); 3229 } 3230 } 3231 3232 /* 3233 * Only set the clrdmask bit if none of the nodes are currently 3234 * filtered. 3235 * 3236 * XXX TODO: go through all the callers and check to see 3237 * which are being called in the context of looping over all 3238 * TIDs (eg, if all tids are being paused, resumed, etc.) 3239 * That'll avoid O(n^2) complexity here. 3240 */ 3241 static void 3242 ath_tx_set_clrdmask(struct ath_softc *sc, struct ath_node *an) 3243 { 3244 int i; 3245 3246 ATH_TX_LOCK_ASSERT(sc); 3247 3248 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3249 if (an->an_tid[i].isfiltered == 1) 3250 return; 3251 } 3252 an->clrdmask = 1; 3253 } 3254 3255 /* 3256 * Configure the per-TID node state. 3257 * 3258 * This likely belongs in if_ath_node.c but I can't think of anywhere 3259 * else to put it just yet. 3260 * 3261 * This sets up the SLISTs and the mutex as appropriate. 3262 */ 3263 void 3264 ath_tx_tid_init(struct ath_softc *sc, struct ath_node *an) 3265 { 3266 int i, j; 3267 struct ath_tid *atid; 3268 3269 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 3270 atid = &an->an_tid[i]; 3271 3272 /* XXX now with this bzer(), is the field 0'ing needed? */ 3273 bzero(atid, sizeof(*atid)); 3274 3275 TAILQ_INIT(&atid->tid_q); 3276 TAILQ_INIT(&atid->filtq.tid_q); 3277 atid->tid = i; 3278 atid->an = an; 3279 for (j = 0; j < ATH_TID_MAX_BUFS; j++) 3280 atid->tx_buf[j] = NULL; 3281 atid->baw_head = atid->baw_tail = 0; 3282 atid->paused = 0; 3283 atid->sched = 0; 3284 atid->hwq_depth = 0; 3285 atid->cleanup_inprogress = 0; 3286 if (i == IEEE80211_NONQOS_TID) 3287 atid->ac = ATH_NONQOS_TID_AC; 3288 else 3289 atid->ac = TID_TO_WME_AC(i); 3290 } 3291 an->clrdmask = 1; /* Always start by setting this bit */ 3292 } 3293 3294 /* 3295 * Pause the current TID. This stops packets from being transmitted 3296 * on it. 3297 * 3298 * Since this is also called from upper layers as well as the driver, 3299 * it will get the TID lock. 3300 */ 3301 static void 3302 ath_tx_tid_pause(struct ath_softc *sc, struct ath_tid *tid) 3303 { 3304 3305 ATH_TX_LOCK_ASSERT(sc); 3306 tid->paused++; 3307 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: [%6D]: tid=%d, paused = %d\n", 3308 __func__, 3309 tid->an->an_node.ni_macaddr, ":", 3310 tid->tid, 3311 tid->paused); 3312 } 3313 3314 /* 3315 * Unpause the current TID, and schedule it if needed. 3316 */ 3317 static void 3318 ath_tx_tid_resume(struct ath_softc *sc, struct ath_tid *tid) 3319 { 3320 ATH_TX_LOCK_ASSERT(sc); 3321 3322 /* 3323 * There's some odd places where ath_tx_tid_resume() is called 3324 * when it shouldn't be; this works around that particular issue 3325 * until it's actually resolved. 3326 */ 3327 if (tid->paused == 0) { 3328 device_printf(sc->sc_dev, 3329 "%s: [%6D]: tid=%d, paused=0?\n", 3330 __func__, 3331 tid->an->an_node.ni_macaddr, ":", 3332 tid->tid); 3333 } else { 3334 tid->paused--; 3335 } 3336 3337 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 3338 "%s: [%6D]: tid=%d, unpaused = %d\n", 3339 __func__, 3340 tid->an->an_node.ni_macaddr, ":", 3341 tid->tid, 3342 tid->paused); 3343 3344 if (tid->paused) 3345 return; 3346 3347 /* 3348 * Override the clrdmask configuration for the next frame 3349 * from this TID, just to get the ball rolling. 3350 */ 3351 ath_tx_set_clrdmask(sc, tid->an); 3352 3353 if (tid->axq_depth == 0) 3354 return; 3355 3356 /* XXX isfiltered shouldn't ever be 0 at this point */ 3357 if (tid->isfiltered == 1) { 3358 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: filtered?!\n", 3359 __func__); 3360 return; 3361 } 3362 3363 ath_tx_tid_sched(sc, tid); 3364 3365 /* 3366 * Queue the software TX scheduler. 3367 */ 3368 ath_tx_swq_kick(sc); 3369 } 3370 3371 /* 3372 * Add the given ath_buf to the TID filtered frame list. 3373 * This requires the TID be filtered. 3374 */ 3375 static void 3376 ath_tx_tid_filt_addbuf(struct ath_softc *sc, struct ath_tid *tid, 3377 struct ath_buf *bf) 3378 { 3379 3380 ATH_TX_LOCK_ASSERT(sc); 3381 3382 if (!tid->isfiltered) 3383 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: not filtered?!\n", 3384 __func__); 3385 3386 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: bf=%p\n", __func__, bf); 3387 3388 /* Set the retry bit and bump the retry counter */ 3389 ath_tx_set_retry(sc, bf); 3390 sc->sc_stats.ast_tx_swfiltered++; 3391 3392 ATH_TID_FILT_INSERT_TAIL(tid, bf, bf_list); 3393 } 3394 3395 /* 3396 * Handle a completed filtered frame from the given TID. 3397 * This just enables/pauses the filtered frame state if required 3398 * and appends the filtered frame to the filtered queue. 3399 */ 3400 static void 3401 ath_tx_tid_filt_comp_buf(struct ath_softc *sc, struct ath_tid *tid, 3402 struct ath_buf *bf) 3403 { 3404 3405 ATH_TX_LOCK_ASSERT(sc); 3406 3407 if (! tid->isfiltered) { 3408 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d; filter transition\n", 3409 __func__, tid->tid); 3410 tid->isfiltered = 1; 3411 ath_tx_tid_pause(sc, tid); 3412 } 3413 3414 /* Add the frame to the filter queue */ 3415 ath_tx_tid_filt_addbuf(sc, tid, bf); 3416 } 3417 3418 /* 3419 * Complete the filtered frame TX completion. 3420 * 3421 * If there are no more frames in the hardware queue, unpause/unfilter 3422 * the TID if applicable. Otherwise we will wait for a node PS transition 3423 * to unfilter. 3424 */ 3425 static void 3426 ath_tx_tid_filt_comp_complete(struct ath_softc *sc, struct ath_tid *tid) 3427 { 3428 struct ath_buf *bf; 3429 int do_resume = 0; 3430 3431 ATH_TX_LOCK_ASSERT(sc); 3432 3433 if (tid->hwq_depth != 0) 3434 return; 3435 3436 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, "%s: tid=%d, hwq=0, transition back\n", 3437 __func__, tid->tid); 3438 if (tid->isfiltered == 1) { 3439 tid->isfiltered = 0; 3440 do_resume = 1; 3441 } 3442 3443 /* XXX ath_tx_tid_resume() also calls ath_tx_set_clrdmask()! */ 3444 ath_tx_set_clrdmask(sc, tid->an); 3445 3446 /* XXX this is really quite inefficient */ 3447 while ((bf = ATH_TID_FILT_LAST(tid, ath_bufhead_s)) != NULL) { 3448 ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3449 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 3450 } 3451 3452 /* And only resume if we had paused before */ 3453 if (do_resume) 3454 ath_tx_tid_resume(sc, tid); 3455 } 3456 3457 /* 3458 * Called when a single (aggregate or otherwise) frame is completed. 3459 * 3460 * Returns 0 if the buffer could be added to the filtered list 3461 * (cloned or otherwise), 1 if the buffer couldn't be added to the 3462 * filtered list (failed clone; expired retry) and the caller should 3463 * free it and handle it like a failure (eg by sending a BAR.) 3464 * 3465 * since the buffer may be cloned, bf must be not touched after this 3466 * if the return value is 0. 3467 */ 3468 static int 3469 ath_tx_tid_filt_comp_single(struct ath_softc *sc, struct ath_tid *tid, 3470 struct ath_buf *bf) 3471 { 3472 struct ath_buf *nbf; 3473 int retval; 3474 3475 ATH_TX_LOCK_ASSERT(sc); 3476 3477 /* 3478 * Don't allow a filtered frame to live forever. 3479 */ 3480 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 3481 sc->sc_stats.ast_tx_swretrymax++; 3482 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3483 "%s: bf=%p, seqno=%d, exceeded retries\n", 3484 __func__, 3485 bf, 3486 SEQNO(bf->bf_state.bfs_seqno)); 3487 retval = 1; /* error */ 3488 goto finish; 3489 } 3490 3491 /* 3492 * A busy buffer can't be added to the retry list. 3493 * It needs to be cloned. 3494 */ 3495 if (bf->bf_flags & ATH_BUF_BUSY) { 3496 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3497 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3498 "%s: busy buffer clone: %p -> %p\n", 3499 __func__, bf, nbf); 3500 } else { 3501 nbf = bf; 3502 } 3503 3504 if (nbf == NULL) { 3505 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3506 "%s: busy buffer couldn't be cloned (%p)!\n", 3507 __func__, bf); 3508 retval = 1; /* error */ 3509 } else { 3510 ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3511 retval = 0; /* ok */ 3512 } 3513 finish: 3514 ath_tx_tid_filt_comp_complete(sc, tid); 3515 3516 return (retval); 3517 } 3518 3519 static void 3520 ath_tx_tid_filt_comp_aggr(struct ath_softc *sc, struct ath_tid *tid, 3521 struct ath_buf *bf_first, ath_bufhead *bf_q) 3522 { 3523 struct ath_buf *bf, *bf_next, *nbf; 3524 3525 ATH_TX_LOCK_ASSERT(sc); 3526 3527 bf = bf_first; 3528 while (bf) { 3529 bf_next = bf->bf_next; 3530 bf->bf_next = NULL; /* Remove it from the aggr list */ 3531 3532 /* 3533 * Don't allow a filtered frame to live forever. 3534 */ 3535 if (bf->bf_state.bfs_retries > SWMAX_RETRIES) { 3536 sc->sc_stats.ast_tx_swretrymax++; 3537 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3538 "%s: tid=%d, bf=%p, seqno=%d, exceeded retries\n", 3539 __func__, 3540 tid->tid, 3541 bf, 3542 SEQNO(bf->bf_state.bfs_seqno)); 3543 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3544 goto next; 3545 } 3546 3547 if (bf->bf_flags & ATH_BUF_BUSY) { 3548 nbf = ath_tx_retry_clone(sc, tid->an, tid, bf); 3549 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3550 "%s: tid=%d, busy buffer cloned: %p -> %p, seqno=%d\n", 3551 __func__, tid->tid, bf, nbf, SEQNO(bf->bf_state.bfs_seqno)); 3552 } else { 3553 nbf = bf; 3554 } 3555 3556 /* 3557 * If the buffer couldn't be cloned, add it to bf_q; 3558 * the caller will free the buffer(s) as required. 3559 */ 3560 if (nbf == NULL) { 3561 DPRINTF(sc, ATH_DEBUG_SW_TX_FILT, 3562 "%s: tid=%d, buffer couldn't be cloned! (%p) seqno=%d\n", 3563 __func__, tid->tid, bf, SEQNO(bf->bf_state.bfs_seqno)); 3564 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 3565 } else { 3566 ath_tx_tid_filt_comp_buf(sc, tid, nbf); 3567 } 3568 next: 3569 bf = bf_next; 3570 } 3571 3572 ath_tx_tid_filt_comp_complete(sc, tid); 3573 } 3574 3575 /* 3576 * Suspend the queue because we need to TX a BAR. 3577 */ 3578 static void 3579 ath_tx_tid_bar_suspend(struct ath_softc *sc, struct ath_tid *tid) 3580 { 3581 3582 ATH_TX_LOCK_ASSERT(sc); 3583 3584 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3585 "%s: tid=%d, bar_wait=%d, bar_tx=%d, called\n", 3586 __func__, 3587 tid->tid, 3588 tid->bar_wait, 3589 tid->bar_tx); 3590 3591 /* We shouldn't be called when bar_tx is 1 */ 3592 if (tid->bar_tx) { 3593 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3594 "%s: bar_tx is 1?!\n", __func__); 3595 } 3596 3597 /* If we've already been called, just be patient. */ 3598 if (tid->bar_wait) 3599 return; 3600 3601 /* Wait! */ 3602 tid->bar_wait = 1; 3603 3604 /* Only one pause, no matter how many frames fail */ 3605 ath_tx_tid_pause(sc, tid); 3606 } 3607 3608 /* 3609 * We've finished with BAR handling - either we succeeded or 3610 * failed. Either way, unsuspend TX. 3611 */ 3612 static void 3613 ath_tx_tid_bar_unsuspend(struct ath_softc *sc, struct ath_tid *tid) 3614 { 3615 3616 ATH_TX_LOCK_ASSERT(sc); 3617 3618 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3619 "%s: %6D: TID=%d, called\n", 3620 __func__, 3621 tid->an->an_node.ni_macaddr, 3622 ":", 3623 tid->tid); 3624 3625 if (tid->bar_tx == 0 || tid->bar_wait == 0) { 3626 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3627 "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 3628 __func__, tid->an->an_node.ni_macaddr, ":", 3629 tid->tid, tid->bar_tx, tid->bar_wait); 3630 } 3631 3632 tid->bar_tx = tid->bar_wait = 0; 3633 ath_tx_tid_resume(sc, tid); 3634 } 3635 3636 /* 3637 * Return whether we're ready to TX a BAR frame. 3638 * 3639 * Requires the TID lock be held. 3640 */ 3641 static int 3642 ath_tx_tid_bar_tx_ready(struct ath_softc *sc, struct ath_tid *tid) 3643 { 3644 3645 ATH_TX_LOCK_ASSERT(sc); 3646 3647 if (tid->bar_wait == 0 || tid->hwq_depth > 0) 3648 return (0); 3649 3650 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3651 "%s: %6D: TID=%d, bar ready\n", 3652 __func__, 3653 tid->an->an_node.ni_macaddr, 3654 ":", 3655 tid->tid); 3656 3657 return (1); 3658 } 3659 3660 /* 3661 * Check whether the current TID is ready to have a BAR 3662 * TXed and if so, do the TX. 3663 * 3664 * Since the TID/TXQ lock can't be held during a call to 3665 * ieee80211_send_bar(), we have to do the dirty thing of unlocking it, 3666 * sending the BAR and locking it again. 3667 * 3668 * Eventually, the code to send the BAR should be broken out 3669 * from this routine so the lock doesn't have to be reacquired 3670 * just to be immediately dropped by the caller. 3671 */ 3672 static void 3673 ath_tx_tid_bar_tx(struct ath_softc *sc, struct ath_tid *tid) 3674 { 3675 struct ieee80211_tx_ampdu *tap; 3676 3677 ATH_TX_LOCK_ASSERT(sc); 3678 3679 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3680 "%s: %6D: TID=%d, called\n", 3681 __func__, 3682 tid->an->an_node.ni_macaddr, 3683 ":", 3684 tid->tid); 3685 3686 tap = ath_tx_get_tx_tid(tid->an, tid->tid); 3687 3688 /* 3689 * This is an error condition! 3690 */ 3691 if (tid->bar_wait == 0 || tid->bar_tx == 1) { 3692 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3693 "%s: %6D: TID=%d, bar_tx=%d, bar_wait=%d: ?\n", 3694 __func__, tid->an->an_node.ni_macaddr, ":", 3695 tid->tid, tid->bar_tx, tid->bar_wait); 3696 return; 3697 } 3698 3699 /* Don't do anything if we still have pending frames */ 3700 if (tid->hwq_depth > 0) { 3701 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3702 "%s: %6D: TID=%d, hwq_depth=%d, waiting\n", 3703 __func__, 3704 tid->an->an_node.ni_macaddr, 3705 ":", 3706 tid->tid, 3707 tid->hwq_depth); 3708 return; 3709 } 3710 3711 /* We're now about to TX */ 3712 tid->bar_tx = 1; 3713 3714 /* 3715 * Override the clrdmask configuration for the next frame, 3716 * just to get the ball rolling. 3717 */ 3718 ath_tx_set_clrdmask(sc, tid->an); 3719 3720 /* 3721 * Calculate new BAW left edge, now that all frames have either 3722 * succeeded or failed. 3723 * 3724 * XXX verify this is _actually_ the valid value to begin at! 3725 */ 3726 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3727 "%s: %6D: TID=%d, new BAW left edge=%d\n", 3728 __func__, 3729 tid->an->an_node.ni_macaddr, 3730 ":", 3731 tid->tid, 3732 tap->txa_start); 3733 3734 /* Try sending the BAR frame */ 3735 /* We can't hold the lock here! */ 3736 3737 ATH_TX_UNLOCK(sc); 3738 if (ieee80211_send_bar(&tid->an->an_node, tap, tap->txa_start) == 0) { 3739 /* Success? Now we wait for notification that it's done */ 3740 ATH_TX_LOCK(sc); 3741 return; 3742 } 3743 3744 /* Failure? For now, warn loudly and continue */ 3745 ATH_TX_LOCK(sc); 3746 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 3747 "%s: %6D: TID=%d, failed to TX BAR, continue!\n", 3748 __func__, tid->an->an_node.ni_macaddr, ":", 3749 tid->tid); 3750 ath_tx_tid_bar_unsuspend(sc, tid); 3751 } 3752 3753 static void 3754 ath_tx_tid_drain_pkt(struct ath_softc *sc, struct ath_node *an, 3755 struct ath_tid *tid, ath_bufhead *bf_cq, struct ath_buf *bf) 3756 { 3757 3758 ATH_TX_LOCK_ASSERT(sc); 3759 3760 /* 3761 * If the current TID is running AMPDU, update 3762 * the BAW. 3763 */ 3764 if (ath_tx_ampdu_running(sc, an, tid->tid) && 3765 bf->bf_state.bfs_dobaw) { 3766 /* 3767 * Only remove the frame from the BAW if it's 3768 * been transmitted at least once; this means 3769 * the frame was in the BAW to begin with. 3770 */ 3771 if (bf->bf_state.bfs_retries > 0) { 3772 ath_tx_update_baw(sc, an, tid, bf); 3773 bf->bf_state.bfs_dobaw = 0; 3774 } 3775 #if 0 3776 /* 3777 * This has become a non-fatal error now 3778 */ 3779 if (! bf->bf_state.bfs_addedbaw) 3780 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW 3781 "%s: wasn't added: seqno %d\n", 3782 __func__, SEQNO(bf->bf_state.bfs_seqno)); 3783 #endif 3784 } 3785 3786 /* Strip it out of an aggregate list if it was in one */ 3787 bf->bf_next = NULL; 3788 3789 /* Insert on the free queue to be freed by the caller */ 3790 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 3791 } 3792 3793 static void 3794 ath_tx_tid_drain_print(struct ath_softc *sc, struct ath_node *an, 3795 const char *pfx, struct ath_tid *tid, struct ath_buf *bf) 3796 { 3797 struct ieee80211_node *ni = &an->an_node; 3798 struct ath_txq *txq; 3799 struct ieee80211_tx_ampdu *tap; 3800 3801 txq = sc->sc_ac2q[tid->ac]; 3802 tap = ath_tx_get_tx_tid(an, tid->tid); 3803 3804 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3805 "%s: %s: %6D: bf=%p: addbaw=%d, dobaw=%d, " 3806 "seqno=%d, retry=%d\n", 3807 __func__, 3808 pfx, 3809 ni->ni_macaddr, 3810 ":", 3811 bf, 3812 bf->bf_state.bfs_addedbaw, 3813 bf->bf_state.bfs_dobaw, 3814 SEQNO(bf->bf_state.bfs_seqno), 3815 bf->bf_state.bfs_retries); 3816 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3817 "%s: %s: %6D: bf=%p: txq[%d] axq_depth=%d, axq_aggr_depth=%d\n", 3818 __func__, 3819 pfx, 3820 ni->ni_macaddr, 3821 ":", 3822 bf, 3823 txq->axq_qnum, 3824 txq->axq_depth, 3825 txq->axq_aggr_depth); 3826 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3827 "%s: %s: %6D: bf=%p: tid txq_depth=%d hwq_depth=%d, bar_wait=%d, " 3828 "isfiltered=%d\n", 3829 __func__, 3830 pfx, 3831 ni->ni_macaddr, 3832 ":", 3833 bf, 3834 tid->axq_depth, 3835 tid->hwq_depth, 3836 tid->bar_wait, 3837 tid->isfiltered); 3838 DPRINTF(sc, ATH_DEBUG_SW_TX | ATH_DEBUG_RESET, 3839 "%s: %s: %6D: tid %d: " 3840 "sched=%d, paused=%d, " 3841 "incomp=%d, baw_head=%d, " 3842 "baw_tail=%d txa_start=%d, ni_txseqs=%d\n", 3843 __func__, 3844 pfx, 3845 ni->ni_macaddr, 3846 ":", 3847 tid->tid, 3848 tid->sched, tid->paused, 3849 tid->incomp, tid->baw_head, 3850 tid->baw_tail, tap == NULL ? -1 : tap->txa_start, 3851 ni->ni_txseqs[tid->tid]); 3852 3853 /* XXX Dump the frame, see what it is? */ 3854 if (IFF_DUMPPKTS(sc, ATH_DEBUG_XMIT)) 3855 ieee80211_dump_pkt(ni->ni_ic, 3856 mtod(bf->bf_m, const uint8_t *), 3857 bf->bf_m->m_len, 0, -1); 3858 } 3859 3860 /* 3861 * Free any packets currently pending in the software TX queue. 3862 * 3863 * This will be called when a node is being deleted. 3864 * 3865 * It can also be called on an active node during an interface 3866 * reset or state transition. 3867 * 3868 * (From Linux/reference): 3869 * 3870 * TODO: For frame(s) that are in the retry state, we will reuse the 3871 * sequence number(s) without setting the retry bit. The 3872 * alternative is to give up on these and BAR the receiver's window 3873 * forward. 3874 */ 3875 static void 3876 ath_tx_tid_drain(struct ath_softc *sc, struct ath_node *an, 3877 struct ath_tid *tid, ath_bufhead *bf_cq) 3878 { 3879 struct ath_buf *bf; 3880 struct ieee80211_tx_ampdu *tap; 3881 struct ieee80211_node *ni = &an->an_node; 3882 int t; 3883 3884 tap = ath_tx_get_tx_tid(an, tid->tid); 3885 3886 ATH_TX_LOCK_ASSERT(sc); 3887 3888 /* Walk the queue, free frames */ 3889 t = 0; 3890 for (;;) { 3891 bf = ATH_TID_FIRST(tid); 3892 if (bf == NULL) { 3893 break; 3894 } 3895 3896 if (t == 0) { 3897 ath_tx_tid_drain_print(sc, an, "norm", tid, bf); 3898 // t = 1; 3899 } 3900 3901 ATH_TID_REMOVE(tid, bf, bf_list); 3902 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3903 } 3904 3905 /* And now, drain the filtered frame queue */ 3906 t = 0; 3907 for (;;) { 3908 bf = ATH_TID_FILT_FIRST(tid); 3909 if (bf == NULL) 3910 break; 3911 3912 if (t == 0) { 3913 ath_tx_tid_drain_print(sc, an, "filt", tid, bf); 3914 // t = 1; 3915 } 3916 3917 ATH_TID_FILT_REMOVE(tid, bf, bf_list); 3918 ath_tx_tid_drain_pkt(sc, an, tid, bf_cq, bf); 3919 } 3920 3921 /* 3922 * Override the clrdmask configuration for the next frame 3923 * in case there is some future transmission, just to get 3924 * the ball rolling. 3925 * 3926 * This won't hurt things if the TID is about to be freed. 3927 */ 3928 ath_tx_set_clrdmask(sc, tid->an); 3929 3930 /* 3931 * Now that it's completed, grab the TID lock and update 3932 * the sequence number and BAW window. 3933 * Because sequence numbers have been assigned to frames 3934 * that haven't been sent yet, it's entirely possible 3935 * we'll be called with some pending frames that have not 3936 * been transmitted. 3937 * 3938 * The cleaner solution is to do the sequence number allocation 3939 * when the packet is first transmitted - and thus the "retries" 3940 * check above would be enough to update the BAW/seqno. 3941 */ 3942 3943 /* But don't do it for non-QoS TIDs */ 3944 if (tap) { 3945 #if 1 3946 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 3947 "%s: %6D: node %p: TID %d: sliding BAW left edge to %d\n", 3948 __func__, 3949 ni->ni_macaddr, 3950 ":", 3951 an, 3952 tid->tid, 3953 tap->txa_start); 3954 #endif 3955 ni->ni_txseqs[tid->tid] = tap->txa_start; 3956 tid->baw_tail = tid->baw_head; 3957 } 3958 } 3959 3960 /* 3961 * Reset the TID state. This must be only called once the node has 3962 * had its frames flushed from this TID, to ensure that no other 3963 * pause / unpause logic can kick in. 3964 */ 3965 static void 3966 ath_tx_tid_reset(struct ath_softc *sc, struct ath_tid *tid) 3967 { 3968 3969 #if 0 3970 tid->bar_wait = tid->bar_tx = tid->isfiltered = 0; 3971 tid->paused = tid->sched = tid->addba_tx_pending = 0; 3972 tid->incomp = tid->cleanup_inprogress = 0; 3973 #endif 3974 3975 /* 3976 * If we have a bar_wait set, we need to unpause the TID 3977 * here. Otherwise once cleanup has finished, the TID won't 3978 * have the right paused counter. 3979 * 3980 * XXX I'm not going through resume here - I don't want the 3981 * node to be rescheuled just yet. This however should be 3982 * methodized! 3983 */ 3984 if (tid->bar_wait) { 3985 if (tid->paused > 0) { 3986 tid->paused --; 3987 } 3988 } 3989 3990 /* 3991 * XXX same with a currently filtered TID. 3992 * 3993 * Since this is being called during a flush, we assume that 3994 * the filtered frame list is actually empty. 3995 * 3996 * XXX TODO: add in a check to ensure that the filtered queue 3997 * depth is actually 0! 3998 */ 3999 if (tid->isfiltered) { 4000 if (tid->paused > 0) { 4001 tid->paused --; 4002 } 4003 } 4004 4005 /* 4006 * Clear BAR, filtered frames, scheduled and ADDBA pending. 4007 * The TID may be going through cleanup from the last association 4008 * where things in the BAW are still in the hardware queue. 4009 */ 4010 tid->bar_wait = 0; 4011 tid->bar_tx = 0; 4012 tid->isfiltered = 0; 4013 tid->sched = 0; 4014 tid->addba_tx_pending = 0; 4015 4016 /* 4017 * XXX TODO: it may just be enough to walk the HWQs and mark 4018 * frames for that node as non-aggregate; or mark the ath_node 4019 * with something that indicates that aggregation is no longer 4020 * occurring. Then we can just toss the BAW complaints and 4021 * do a complete hard reset of state here - no pause, no 4022 * complete counter, etc. 4023 */ 4024 4025 } 4026 4027 /* 4028 * Flush all software queued packets for the given node. 4029 * 4030 * This occurs when a completion handler frees the last buffer 4031 * for a node, and the node is thus freed. This causes the node 4032 * to be cleaned up, which ends up calling ath_tx_node_flush. 4033 */ 4034 void 4035 ath_tx_node_flush(struct ath_softc *sc, struct ath_node *an) 4036 { 4037 int tid; 4038 ath_bufhead bf_cq; 4039 struct ath_buf *bf; 4040 4041 TAILQ_INIT(&bf_cq); 4042 4043 ATH_KTR(sc, ATH_KTR_NODE, 1, "ath_tx_node_flush: flush node; ni=%p", 4044 &an->an_node); 4045 4046 ATH_TX_LOCK(sc); 4047 DPRINTF(sc, ATH_DEBUG_NODE, 4048 "%s: %6D: flush; is_powersave=%d, stack_psq=%d, tim=%d, " 4049 "swq_depth=%d, clrdmask=%d, leak_count=%d\n", 4050 __func__, 4051 an->an_node.ni_macaddr, 4052 ":", 4053 an->an_is_powersave, 4054 an->an_stack_psq, 4055 an->an_tim_set, 4056 an->an_swq_depth, 4057 an->clrdmask, 4058 an->an_leak_count); 4059 4060 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 4061 struct ath_tid *atid = &an->an_tid[tid]; 4062 4063 /* Free packets */ 4064 ath_tx_tid_drain(sc, an, atid, &bf_cq); 4065 4066 /* Remove this tid from the list of active tids */ 4067 ath_tx_tid_unsched(sc, atid); 4068 4069 /* Reset the per-TID pause, BAR, etc state */ 4070 ath_tx_tid_reset(sc, atid); 4071 } 4072 4073 /* 4074 * Clear global leak count 4075 */ 4076 an->an_leak_count = 0; 4077 ATH_TX_UNLOCK(sc); 4078 4079 /* Handle completed frames */ 4080 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4081 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4082 ath_tx_default_comp(sc, bf, 0); 4083 } 4084 } 4085 4086 /* 4087 * Drain all the software TXQs currently with traffic queued. 4088 */ 4089 void 4090 ath_tx_txq_drain(struct ath_softc *sc, struct ath_txq *txq) 4091 { 4092 struct ath_tid *tid; 4093 ath_bufhead bf_cq; 4094 struct ath_buf *bf; 4095 4096 TAILQ_INIT(&bf_cq); 4097 ATH_TX_LOCK(sc); 4098 4099 /* 4100 * Iterate over all active tids for the given txq, 4101 * flushing and unsched'ing them 4102 */ 4103 while (! TAILQ_EMPTY(&txq->axq_tidq)) { 4104 tid = TAILQ_FIRST(&txq->axq_tidq); 4105 ath_tx_tid_drain(sc, tid->an, tid, &bf_cq); 4106 ath_tx_tid_unsched(sc, tid); 4107 } 4108 4109 ATH_TX_UNLOCK(sc); 4110 4111 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4112 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4113 ath_tx_default_comp(sc, bf, 0); 4114 } 4115 } 4116 4117 /* 4118 * Handle completion of non-aggregate session frames. 4119 * 4120 * This (currently) doesn't implement software retransmission of 4121 * non-aggregate frames! 4122 * 4123 * Software retransmission of non-aggregate frames needs to obey 4124 * the strict sequence number ordering, and drop any frames that 4125 * will fail this. 4126 * 4127 * For now, filtered frames and frame transmission will cause 4128 * all kinds of issues. So we don't support them. 4129 * 4130 * So anyone queuing frames via ath_tx_normal_xmit() or 4131 * ath_tx_hw_queue_norm() must override and set CLRDMASK. 4132 */ 4133 void 4134 ath_tx_normal_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 4135 { 4136 struct ieee80211_node *ni = bf->bf_node; 4137 struct ath_node *an = ATH_NODE(ni); 4138 int tid = bf->bf_state.bfs_tid; 4139 struct ath_tid *atid = &an->an_tid[tid]; 4140 struct ath_tx_status *ts = &bf->bf_status.ds_txstat; 4141 4142 /* The TID state is protected behind the TXQ lock */ 4143 ATH_TX_LOCK(sc); 4144 4145 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bf=%p: fail=%d, hwq_depth now %d\n", 4146 __func__, bf, fail, atid->hwq_depth - 1); 4147 4148 atid->hwq_depth--; 4149 4150 #if 0 4151 /* 4152 * If the frame was filtered, stick it on the filter frame 4153 * queue and complain about it. It shouldn't happen! 4154 */ 4155 if ((ts->ts_status & HAL_TXERR_FILT) || 4156 (ts->ts_status != 0 && atid->isfiltered)) { 4157 DPRINTF(sc, ATH_DEBUG_SW_TX, 4158 "%s: isfiltered=%d, ts_status=%d: huh?\n", 4159 __func__, 4160 atid->isfiltered, 4161 ts->ts_status); 4162 ath_tx_tid_filt_comp_buf(sc, atid, bf); 4163 } 4164 #endif 4165 if (atid->isfiltered) 4166 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: filtered?!\n", __func__); 4167 if (atid->hwq_depth < 0) 4168 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 4169 __func__, atid->hwq_depth); 4170 4171 /* If the TID is being cleaned up, track things */ 4172 /* XXX refactor! */ 4173 if (atid->cleanup_inprogress) { 4174 atid->incomp--; 4175 if (atid->incomp == 0) { 4176 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4177 "%s: TID %d: cleaned up! resume!\n", 4178 __func__, tid); 4179 atid->cleanup_inprogress = 0; 4180 ath_tx_tid_resume(sc, atid); 4181 } 4182 } 4183 4184 /* 4185 * If the queue is filtered, potentially mark it as complete 4186 * and reschedule it as needed. 4187 * 4188 * This is required as there may be a subsequent TX descriptor 4189 * for this end-node that has CLRDMASK set, so it's quite possible 4190 * that a filtered frame will be followed by a non-filtered 4191 * (complete or otherwise) frame. 4192 * 4193 * XXX should we do this before we complete the frame? 4194 */ 4195 if (atid->isfiltered) 4196 ath_tx_tid_filt_comp_complete(sc, atid); 4197 ATH_TX_UNLOCK(sc); 4198 4199 /* 4200 * punt to rate control if we're not being cleaned up 4201 * during a hw queue drain and the frame wanted an ACK. 4202 */ 4203 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 4204 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 4205 ts, bf->bf_state.bfs_pktlen, 4206 1, (ts->ts_status == 0) ? 0 : 1); 4207 4208 ath_tx_default_comp(sc, bf, fail); 4209 } 4210 4211 /* 4212 * Handle cleanup of aggregate session packets that aren't 4213 * an A-MPDU. 4214 * 4215 * There's no need to update the BAW here - the session is being 4216 * torn down. 4217 */ 4218 static void 4219 ath_tx_comp_cleanup_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4220 { 4221 struct ieee80211_node *ni = bf->bf_node; 4222 struct ath_node *an = ATH_NODE(ni); 4223 int tid = bf->bf_state.bfs_tid; 4224 struct ath_tid *atid = &an->an_tid[tid]; 4225 4226 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: TID %d: incomp=%d\n", 4227 __func__, tid, atid->incomp); 4228 4229 ATH_TX_LOCK(sc); 4230 atid->incomp--; 4231 4232 /* XXX refactor! */ 4233 if (bf->bf_state.bfs_dobaw) { 4234 ath_tx_update_baw(sc, an, atid, bf); 4235 if (!bf->bf_state.bfs_addedbaw) 4236 DPRINTF(sc, ATH_DEBUG_SW_TX, 4237 "%s: wasn't added: seqno %d\n", 4238 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4239 } 4240 4241 if (atid->incomp == 0) { 4242 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4243 "%s: TID %d: cleaned up! resume!\n", 4244 __func__, tid); 4245 atid->cleanup_inprogress = 0; 4246 ath_tx_tid_resume(sc, atid); 4247 } 4248 ATH_TX_UNLOCK(sc); 4249 4250 ath_tx_default_comp(sc, bf, 0); 4251 } 4252 4253 4254 /* 4255 * This as it currently stands is a bit dumb. Ideally we'd just 4256 * fail the frame the normal way and have it permanently fail 4257 * via the normal aggregate completion path. 4258 */ 4259 static void 4260 ath_tx_tid_cleanup_frame(struct ath_softc *sc, struct ath_node *an, 4261 int tid, struct ath_buf *bf_head, ath_bufhead *bf_cq) 4262 { 4263 struct ath_tid *atid = &an->an_tid[tid]; 4264 struct ath_buf *bf, *bf_next; 4265 4266 ATH_TX_LOCK_ASSERT(sc); 4267 4268 /* 4269 * Remove this frame from the queue. 4270 */ 4271 ATH_TID_REMOVE(atid, bf_head, bf_list); 4272 4273 /* 4274 * Loop over all the frames in the aggregate. 4275 */ 4276 bf = bf_head; 4277 while (bf != NULL) { 4278 bf_next = bf->bf_next; /* next aggregate frame, or NULL */ 4279 4280 /* 4281 * If it's been added to the BAW we need to kick 4282 * it out of the BAW before we continue. 4283 * 4284 * XXX if it's an aggregate, assert that it's in the 4285 * BAW - we shouldn't have it be in an aggregate 4286 * otherwise! 4287 */ 4288 if (bf->bf_state.bfs_addedbaw) { 4289 ath_tx_update_baw(sc, an, atid, bf); 4290 bf->bf_state.bfs_dobaw = 0; 4291 } 4292 4293 /* 4294 * Give it the default completion handler. 4295 */ 4296 bf->bf_comp = ath_tx_normal_comp; 4297 bf->bf_next = NULL; 4298 4299 /* 4300 * Add it to the list to free. 4301 */ 4302 TAILQ_INSERT_TAIL(bf_cq, bf, bf_list); 4303 4304 /* 4305 * Now advance to the next frame in the aggregate. 4306 */ 4307 bf = bf_next; 4308 } 4309 } 4310 4311 /* 4312 * Performs transmit side cleanup when TID changes from aggregated to 4313 * unaggregated and during reassociation. 4314 * 4315 * For now, this just tosses everything from the TID software queue 4316 * whether or not it has been retried and marks the TID as 4317 * pending completion if there's anything for this TID queued to 4318 * the hardware. 4319 * 4320 * The caller is responsible for pausing the TID and unpausing the 4321 * TID if no cleanup was required. Otherwise the cleanup path will 4322 * unpause the TID once the last hardware queued frame is completed. 4323 */ 4324 static void 4325 ath_tx_tid_cleanup(struct ath_softc *sc, struct ath_node *an, int tid, 4326 ath_bufhead *bf_cq) 4327 { 4328 struct ath_tid *atid = &an->an_tid[tid]; 4329 struct ath_buf *bf, *bf_next; 4330 4331 ATH_TX_LOCK_ASSERT(sc); 4332 4333 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4334 "%s: TID %d: called; inprogress=%d\n", __func__, tid, 4335 atid->cleanup_inprogress); 4336 4337 /* 4338 * Move the filtered frames to the TX queue, before 4339 * we run off and discard/process things. 4340 */ 4341 4342 /* XXX this is really quite inefficient */ 4343 while ((bf = ATH_TID_FILT_LAST(atid, ath_bufhead_s)) != NULL) { 4344 ATH_TID_FILT_REMOVE(atid, bf, bf_list); 4345 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4346 } 4347 4348 /* 4349 * Update the frames in the software TX queue: 4350 * 4351 * + Discard retry frames in the queue 4352 * + Fix the completion function to be non-aggregate 4353 */ 4354 bf = ATH_TID_FIRST(atid); 4355 while (bf) { 4356 /* 4357 * Grab the next frame in the list, we may 4358 * be fiddling with the list. 4359 */ 4360 bf_next = TAILQ_NEXT(bf, bf_list); 4361 4362 /* 4363 * Free the frame and all subframes. 4364 */ 4365 ath_tx_tid_cleanup_frame(sc, an, tid, bf, bf_cq); 4366 4367 /* 4368 * Next frame! 4369 */ 4370 bf = bf_next; 4371 } 4372 4373 /* 4374 * If there's anything in the hardware queue we wait 4375 * for the TID HWQ to empty. 4376 */ 4377 if (atid->hwq_depth > 0) { 4378 /* 4379 * XXX how about we kill atid->incomp, and instead 4380 * replace it with a macro that checks that atid->hwq_depth 4381 * is 0? 4382 */ 4383 atid->incomp = atid->hwq_depth; 4384 atid->cleanup_inprogress = 1; 4385 } 4386 4387 if (atid->cleanup_inprogress) 4388 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4389 "%s: TID %d: cleanup needed: %d packets\n", 4390 __func__, tid, atid->incomp); 4391 4392 /* Owner now must free completed frames */ 4393 } 4394 4395 static struct ath_buf * 4396 ath_tx_retry_clone(struct ath_softc *sc, struct ath_node *an, 4397 struct ath_tid *tid, struct ath_buf *bf) 4398 { 4399 struct ath_buf *nbf; 4400 int error; 4401 4402 /* 4403 * Clone the buffer. This will handle the dma unmap and 4404 * copy the node reference to the new buffer. If this 4405 * works out, 'bf' will have no DMA mapping, no mbuf 4406 * pointer and no node reference. 4407 */ 4408 nbf = ath_buf_clone(sc, bf); 4409 4410 #if 0 4411 DPRINTF(sc, ATH_DEBUG_XMIT, "%s: ATH_BUF_BUSY; cloning\n", 4412 __func__); 4413 #endif 4414 4415 if (nbf == NULL) { 4416 /* Failed to clone */ 4417 DPRINTF(sc, ATH_DEBUG_XMIT, 4418 "%s: failed to clone a busy buffer\n", 4419 __func__); 4420 return NULL; 4421 } 4422 4423 /* Setup the dma for the new buffer */ 4424 error = ath_tx_dmasetup(sc, nbf, nbf->bf_m); 4425 if (error != 0) { 4426 DPRINTF(sc, ATH_DEBUG_XMIT, 4427 "%s: failed to setup dma for clone\n", 4428 __func__); 4429 /* 4430 * Put this at the head of the list, not tail; 4431 * that way it doesn't interfere with the 4432 * busy buffer logic (which uses the tail of 4433 * the list.) 4434 */ 4435 ATH_TXBUF_LOCK(sc); 4436 ath_returnbuf_head(sc, nbf); 4437 ATH_TXBUF_UNLOCK(sc); 4438 return NULL; 4439 } 4440 4441 /* Update BAW if required, before we free the original buf */ 4442 if (bf->bf_state.bfs_dobaw) 4443 ath_tx_switch_baw_buf(sc, an, tid, bf, nbf); 4444 4445 /* Free original buffer; return new buffer */ 4446 ath_freebuf(sc, bf); 4447 4448 return nbf; 4449 } 4450 4451 /* 4452 * Handle retrying an unaggregate frame in an aggregate 4453 * session. 4454 * 4455 * If too many retries occur, pause the TID, wait for 4456 * any further retransmits (as there's no reason why 4457 * non-aggregate frames in an aggregate session are 4458 * transmitted in-order; they just have to be in-BAW) 4459 * and then queue a BAR. 4460 */ 4461 static void 4462 ath_tx_aggr_retry_unaggr(struct ath_softc *sc, struct ath_buf *bf) 4463 { 4464 struct ieee80211_node *ni = bf->bf_node; 4465 struct ath_node *an = ATH_NODE(ni); 4466 int tid = bf->bf_state.bfs_tid; 4467 struct ath_tid *atid = &an->an_tid[tid]; 4468 struct ieee80211_tx_ampdu *tap; 4469 4470 ATH_TX_LOCK(sc); 4471 4472 tap = ath_tx_get_tx_tid(an, tid); 4473 4474 /* 4475 * If the buffer is marked as busy, we can't directly 4476 * reuse it. Instead, try to clone the buffer. 4477 * If the clone is successful, recycle the old buffer. 4478 * If the clone is unsuccessful, set bfs_retries to max 4479 * to force the next bit of code to free the buffer 4480 * for us. 4481 */ 4482 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4483 (bf->bf_flags & ATH_BUF_BUSY)) { 4484 struct ath_buf *nbf; 4485 nbf = ath_tx_retry_clone(sc, an, atid, bf); 4486 if (nbf) 4487 /* bf has been freed at this point */ 4488 bf = nbf; 4489 else 4490 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4491 } 4492 4493 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4494 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4495 "%s: exceeded retries; seqno %d\n", 4496 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4497 sc->sc_stats.ast_tx_swretrymax++; 4498 4499 /* Update BAW anyway */ 4500 if (bf->bf_state.bfs_dobaw) { 4501 ath_tx_update_baw(sc, an, atid, bf); 4502 if (! bf->bf_state.bfs_addedbaw) 4503 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4504 "%s: wasn't added: seqno %d\n", 4505 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4506 } 4507 bf->bf_state.bfs_dobaw = 0; 4508 4509 /* Suspend the TX queue and get ready to send the BAR */ 4510 ath_tx_tid_bar_suspend(sc, atid); 4511 4512 /* Send the BAR if there are no other frames waiting */ 4513 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4514 ath_tx_tid_bar_tx(sc, atid); 4515 4516 ATH_TX_UNLOCK(sc); 4517 4518 /* Free buffer, bf is free after this call */ 4519 ath_tx_default_comp(sc, bf, 0); 4520 return; 4521 } 4522 4523 /* 4524 * This increments the retry counter as well as 4525 * sets the retry flag in the ath_buf and packet 4526 * body. 4527 */ 4528 ath_tx_set_retry(sc, bf); 4529 sc->sc_stats.ast_tx_swretries++; 4530 4531 /* 4532 * Insert this at the head of the queue, so it's 4533 * retried before any current/subsequent frames. 4534 */ 4535 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 4536 ath_tx_tid_sched(sc, atid); 4537 /* Send the BAR if there are no other frames waiting */ 4538 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4539 ath_tx_tid_bar_tx(sc, atid); 4540 4541 ATH_TX_UNLOCK(sc); 4542 } 4543 4544 /* 4545 * Common code for aggregate excessive retry/subframe retry. 4546 * If retrying, queues buffers to bf_q. If not, frees the 4547 * buffers. 4548 * 4549 * XXX should unify this with ath_tx_aggr_retry_unaggr() 4550 */ 4551 static int 4552 ath_tx_retry_subframe(struct ath_softc *sc, struct ath_buf *bf, 4553 ath_bufhead *bf_q) 4554 { 4555 struct ieee80211_node *ni = bf->bf_node; 4556 struct ath_node *an = ATH_NODE(ni); 4557 int tid = bf->bf_state.bfs_tid; 4558 struct ath_tid *atid = &an->an_tid[tid]; 4559 4560 ATH_TX_LOCK_ASSERT(sc); 4561 4562 /* XXX clr11naggr should be done for all subframes */ 4563 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 4564 ath_hal_set11nburstduration(sc->sc_ah, bf->bf_desc, 0); 4565 4566 /* ath_hal_set11n_virtualmorefrag(sc->sc_ah, bf->bf_desc, 0); */ 4567 4568 /* 4569 * If the buffer is marked as busy, we can't directly 4570 * reuse it. Instead, try to clone the buffer. 4571 * If the clone is successful, recycle the old buffer. 4572 * If the clone is unsuccessful, set bfs_retries to max 4573 * to force the next bit of code to free the buffer 4574 * for us. 4575 */ 4576 if ((bf->bf_state.bfs_retries < SWMAX_RETRIES) && 4577 (bf->bf_flags & ATH_BUF_BUSY)) { 4578 struct ath_buf *nbf; 4579 nbf = ath_tx_retry_clone(sc, an, atid, bf); 4580 if (nbf) 4581 /* bf has been freed at this point */ 4582 bf = nbf; 4583 else 4584 bf->bf_state.bfs_retries = SWMAX_RETRIES + 1; 4585 } 4586 4587 if (bf->bf_state.bfs_retries >= SWMAX_RETRIES) { 4588 sc->sc_stats.ast_tx_swretrymax++; 4589 DPRINTF(sc, ATH_DEBUG_SW_TX_RETRIES, 4590 "%s: max retries: seqno %d\n", 4591 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4592 ath_tx_update_baw(sc, an, atid, bf); 4593 if (!bf->bf_state.bfs_addedbaw) 4594 DPRINTF(sc, ATH_DEBUG_SW_TX_BAW, 4595 "%s: wasn't added: seqno %d\n", 4596 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4597 bf->bf_state.bfs_dobaw = 0; 4598 return 1; 4599 } 4600 4601 ath_tx_set_retry(sc, bf); 4602 sc->sc_stats.ast_tx_swretries++; 4603 bf->bf_next = NULL; /* Just to make sure */ 4604 4605 /* Clear the aggregate state */ 4606 bf->bf_state.bfs_aggr = 0; 4607 bf->bf_state.bfs_ndelim = 0; /* ??? needed? */ 4608 bf->bf_state.bfs_nframes = 1; 4609 4610 TAILQ_INSERT_TAIL(bf_q, bf, bf_list); 4611 return 0; 4612 } 4613 4614 /* 4615 * error pkt completion for an aggregate destination 4616 */ 4617 static void 4618 ath_tx_comp_aggr_error(struct ath_softc *sc, struct ath_buf *bf_first, 4619 struct ath_tid *tid) 4620 { 4621 struct ieee80211_node *ni = bf_first->bf_node; 4622 struct ath_node *an = ATH_NODE(ni); 4623 struct ath_buf *bf_next, *bf; 4624 ath_bufhead bf_q; 4625 int drops = 0; 4626 struct ieee80211_tx_ampdu *tap; 4627 ath_bufhead bf_cq; 4628 4629 TAILQ_INIT(&bf_q); 4630 TAILQ_INIT(&bf_cq); 4631 4632 /* 4633 * Update rate control - all frames have failed. 4634 * 4635 * XXX use the length in the first frame in the series; 4636 * XXX just so things are consistent for now. 4637 */ 4638 ath_tx_update_ratectrl(sc, ni, bf_first->bf_state.bfs_rc, 4639 &bf_first->bf_status.ds_txstat, 4640 bf_first->bf_state.bfs_pktlen, 4641 bf_first->bf_state.bfs_nframes, bf_first->bf_state.bfs_nframes); 4642 4643 ATH_TX_LOCK(sc); 4644 tap = ath_tx_get_tx_tid(an, tid->tid); 4645 sc->sc_stats.ast_tx_aggr_failall++; 4646 4647 /* Retry all subframes */ 4648 bf = bf_first; 4649 while (bf) { 4650 bf_next = bf->bf_next; 4651 bf->bf_next = NULL; /* Remove it from the aggr list */ 4652 sc->sc_stats.ast_tx_aggr_fail++; 4653 if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 4654 drops++; 4655 bf->bf_next = NULL; 4656 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 4657 } 4658 bf = bf_next; 4659 } 4660 4661 /* Prepend all frames to the beginning of the queue */ 4662 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 4663 TAILQ_REMOVE(&bf_q, bf, bf_list); 4664 ATH_TID_INSERT_HEAD(tid, bf, bf_list); 4665 } 4666 4667 /* 4668 * Schedule the TID to be re-tried. 4669 */ 4670 ath_tx_tid_sched(sc, tid); 4671 4672 /* 4673 * send bar if we dropped any frames 4674 * 4675 * Keep the txq lock held for now, as we need to ensure 4676 * that ni_txseqs[] is consistent (as it's being updated 4677 * in the ifnet TX context or raw TX context.) 4678 */ 4679 if (drops) { 4680 /* Suspend the TX queue and get ready to send the BAR */ 4681 ath_tx_tid_bar_suspend(sc, tid); 4682 } 4683 4684 /* 4685 * Send BAR if required 4686 */ 4687 if (ath_tx_tid_bar_tx_ready(sc, tid)) 4688 ath_tx_tid_bar_tx(sc, tid); 4689 4690 ATH_TX_UNLOCK(sc); 4691 4692 /* Complete frames which errored out */ 4693 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 4694 TAILQ_REMOVE(&bf_cq, bf, bf_list); 4695 ath_tx_default_comp(sc, bf, 0); 4696 } 4697 } 4698 4699 /* 4700 * Handle clean-up of packets from an aggregate list. 4701 * 4702 * There's no need to update the BAW here - the session is being 4703 * torn down. 4704 */ 4705 static void 4706 ath_tx_comp_cleanup_aggr(struct ath_softc *sc, struct ath_buf *bf_first) 4707 { 4708 struct ath_buf *bf, *bf_next; 4709 struct ieee80211_node *ni = bf_first->bf_node; 4710 struct ath_node *an = ATH_NODE(ni); 4711 int tid = bf_first->bf_state.bfs_tid; 4712 struct ath_tid *atid = &an->an_tid[tid]; 4713 4714 ATH_TX_LOCK(sc); 4715 4716 /* update incomp */ 4717 atid->incomp--; 4718 4719 /* Update the BAW */ 4720 bf = bf_first; 4721 while (bf) { 4722 /* XXX refactor! */ 4723 if (bf->bf_state.bfs_dobaw) { 4724 ath_tx_update_baw(sc, an, atid, bf); 4725 if (!bf->bf_state.bfs_addedbaw) 4726 DPRINTF(sc, ATH_DEBUG_SW_TX, 4727 "%s: wasn't added: seqno %d\n", 4728 __func__, SEQNO(bf->bf_state.bfs_seqno)); 4729 } 4730 bf = bf->bf_next; 4731 } 4732 4733 if (atid->incomp == 0) { 4734 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 4735 "%s: TID %d: cleaned up! resume!\n", 4736 __func__, tid); 4737 atid->cleanup_inprogress = 0; 4738 ath_tx_tid_resume(sc, atid); 4739 } 4740 4741 /* Send BAR if required */ 4742 /* XXX why would we send a BAR when transitioning to non-aggregation? */ 4743 /* 4744 * XXX TODO: we should likely just tear down the BAR state here, 4745 * rather than sending a BAR. 4746 */ 4747 if (ath_tx_tid_bar_tx_ready(sc, atid)) 4748 ath_tx_tid_bar_tx(sc, atid); 4749 4750 ATH_TX_UNLOCK(sc); 4751 4752 /* Handle frame completion as individual frames */ 4753 bf = bf_first; 4754 while (bf) { 4755 bf_next = bf->bf_next; 4756 bf->bf_next = NULL; 4757 ath_tx_default_comp(sc, bf, 1); 4758 bf = bf_next; 4759 } 4760 } 4761 4762 /* 4763 * Handle completion of an set of aggregate frames. 4764 * 4765 * Note: the completion handler is the last descriptor in the aggregate, 4766 * not the last descriptor in the first frame. 4767 */ 4768 static void 4769 ath_tx_aggr_comp_aggr(struct ath_softc *sc, struct ath_buf *bf_first, 4770 int fail) 4771 { 4772 //struct ath_desc *ds = bf->bf_lastds; 4773 struct ieee80211_node *ni = bf_first->bf_node; 4774 struct ath_node *an = ATH_NODE(ni); 4775 int tid = bf_first->bf_state.bfs_tid; 4776 struct ath_tid *atid = &an->an_tid[tid]; 4777 struct ath_tx_status ts; 4778 struct ieee80211_tx_ampdu *tap; 4779 ath_bufhead bf_q; 4780 ath_bufhead bf_cq; 4781 int seq_st, tx_ok; 4782 int hasba, isaggr; 4783 uint32_t ba[2]; 4784 struct ath_buf *bf, *bf_next; 4785 int ba_index; 4786 int drops = 0; 4787 int nframes = 0, nbad = 0, nf; 4788 int pktlen; 4789 /* XXX there's too much on the stack? */ 4790 struct ath_rc_series rc[ATH_RC_NUM]; 4791 int txseq; 4792 4793 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: called; hwq_depth=%d\n", 4794 __func__, atid->hwq_depth); 4795 4796 /* 4797 * Take a copy; this may be needed -after- bf_first 4798 * has been completed and freed. 4799 */ 4800 ts = bf_first->bf_status.ds_txstat; 4801 4802 TAILQ_INIT(&bf_q); 4803 TAILQ_INIT(&bf_cq); 4804 4805 /* The TID state is kept behind the TXQ lock */ 4806 ATH_TX_LOCK(sc); 4807 4808 atid->hwq_depth--; 4809 if (atid->hwq_depth < 0) 4810 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: hwq_depth < 0: %d\n", 4811 __func__, atid->hwq_depth); 4812 4813 /* 4814 * If the TID is filtered, handle completing the filter 4815 * transition before potentially kicking it to the cleanup 4816 * function. 4817 * 4818 * XXX this is duplicate work, ew. 4819 */ 4820 if (atid->isfiltered) 4821 ath_tx_tid_filt_comp_complete(sc, atid); 4822 4823 /* 4824 * Punt cleanup to the relevant function, not our problem now 4825 */ 4826 if (atid->cleanup_inprogress) { 4827 if (atid->isfiltered) 4828 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4829 "%s: isfiltered=1, normal_comp?\n", 4830 __func__); 4831 ATH_TX_UNLOCK(sc); 4832 ath_tx_comp_cleanup_aggr(sc, bf_first); 4833 return; 4834 } 4835 4836 /* 4837 * If the frame is filtered, transition to filtered frame 4838 * mode and add this to the filtered frame list. 4839 * 4840 * XXX TODO: figure out how this interoperates with 4841 * BAR, pause and cleanup states. 4842 */ 4843 if ((ts.ts_status & HAL_TXERR_FILT) || 4844 (ts.ts_status != 0 && atid->isfiltered)) { 4845 if (fail != 0) 4846 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4847 "%s: isfiltered=1, fail=%d\n", __func__, fail); 4848 ath_tx_tid_filt_comp_aggr(sc, atid, bf_first, &bf_cq); 4849 4850 /* Remove from BAW */ 4851 TAILQ_FOREACH_SAFE(bf, &bf_cq, bf_list, bf_next) { 4852 if (bf->bf_state.bfs_addedbaw) 4853 drops++; 4854 if (bf->bf_state.bfs_dobaw) { 4855 ath_tx_update_baw(sc, an, atid, bf); 4856 if (!bf->bf_state.bfs_addedbaw) 4857 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4858 "%s: wasn't added: seqno %d\n", 4859 __func__, 4860 SEQNO(bf->bf_state.bfs_seqno)); 4861 } 4862 bf->bf_state.bfs_dobaw = 0; 4863 } 4864 /* 4865 * If any intermediate frames in the BAW were dropped when 4866 * handling filtering things, send a BAR. 4867 */ 4868 if (drops) 4869 ath_tx_tid_bar_suspend(sc, atid); 4870 4871 /* 4872 * Finish up by sending a BAR if required and freeing 4873 * the frames outside of the TX lock. 4874 */ 4875 goto finish_send_bar; 4876 } 4877 4878 /* 4879 * XXX for now, use the first frame in the aggregate for 4880 * XXX rate control completion; it's at least consistent. 4881 */ 4882 pktlen = bf_first->bf_state.bfs_pktlen; 4883 4884 /* 4885 * Handle errors first! 4886 * 4887 * Here, handle _any_ error as a "exceeded retries" error. 4888 * Later on (when filtered frames are to be specially handled) 4889 * it'll have to be expanded. 4890 */ 4891 #if 0 4892 if (ts.ts_status & HAL_TXERR_XRETRY) { 4893 #endif 4894 if (ts.ts_status != 0) { 4895 ATH_TX_UNLOCK(sc); 4896 ath_tx_comp_aggr_error(sc, bf_first, atid); 4897 return; 4898 } 4899 4900 tap = ath_tx_get_tx_tid(an, tid); 4901 4902 /* 4903 * extract starting sequence and block-ack bitmap 4904 */ 4905 /* XXX endian-ness of seq_st, ba? */ 4906 seq_st = ts.ts_seqnum; 4907 hasba = !! (ts.ts_flags & HAL_TX_BA); 4908 tx_ok = (ts.ts_status == 0); 4909 isaggr = bf_first->bf_state.bfs_aggr; 4910 ba[0] = ts.ts_ba_low; 4911 ba[1] = ts.ts_ba_high; 4912 4913 /* 4914 * Copy the TX completion status and the rate control 4915 * series from the first descriptor, as it may be freed 4916 * before the rate control code can get its grubby fingers 4917 * into things. 4918 */ 4919 memcpy(rc, bf_first->bf_state.bfs_rc, sizeof(rc)); 4920 4921 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4922 "%s: txa_start=%d, tx_ok=%d, status=%.8x, flags=%.8x, " 4923 "isaggr=%d, seq_st=%d, hasba=%d, ba=%.8x, %.8x\n", 4924 __func__, tap->txa_start, tx_ok, ts.ts_status, ts.ts_flags, 4925 isaggr, seq_st, hasba, ba[0], ba[1]); 4926 4927 /* 4928 * The reference driver doesn't do this; it simply ignores 4929 * this check in its entirety. 4930 * 4931 * I've seen this occur when using iperf to send traffic 4932 * out tid 1 - the aggregate frames are all marked as TID 1, 4933 * but the TXSTATUS has TID=0. So, let's just ignore this 4934 * check. 4935 */ 4936 #if 0 4937 /* Occasionally, the MAC sends a tx status for the wrong TID. */ 4938 if (tid != ts.ts_tid) { 4939 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, "%s: tid %d != hw tid %d\n", 4940 __func__, tid, ts.ts_tid); 4941 tx_ok = 0; 4942 } 4943 #endif 4944 4945 /* AR5416 BA bug; this requires an interface reset */ 4946 if (isaggr && tx_ok && (! hasba)) { 4947 device_printf(sc->sc_dev, 4948 "%s: AR5416 bug: hasba=%d; txok=%d, isaggr=%d, " 4949 "seq_st=%d\n", 4950 __func__, hasba, tx_ok, isaggr, seq_st); 4951 /* XXX TODO: schedule an interface reset */ 4952 #ifdef ATH_DEBUG 4953 ath_printtxbuf(sc, bf_first, 4954 sc->sc_ac2q[atid->ac]->axq_qnum, 0, 0); 4955 #endif 4956 } 4957 4958 /* 4959 * Walk the list of frames, figure out which ones were correctly 4960 * sent and which weren't. 4961 */ 4962 bf = bf_first; 4963 nf = bf_first->bf_state.bfs_nframes; 4964 4965 /* bf_first is going to be invalid once this list is walked */ 4966 bf_first = NULL; 4967 4968 /* 4969 * Walk the list of completed frames and determine 4970 * which need to be completed and which need to be 4971 * retransmitted. 4972 * 4973 * For completed frames, the completion functions need 4974 * to be called at the end of this function as the last 4975 * node reference may free the node. 4976 * 4977 * Finally, since the TXQ lock can't be held during the 4978 * completion callback (to avoid lock recursion), 4979 * the completion calls have to be done outside of the 4980 * lock. 4981 */ 4982 while (bf) { 4983 nframes++; 4984 ba_index = ATH_BA_INDEX(seq_st, 4985 SEQNO(bf->bf_state.bfs_seqno)); 4986 bf_next = bf->bf_next; 4987 bf->bf_next = NULL; /* Remove it from the aggr list */ 4988 4989 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 4990 "%s: checking bf=%p seqno=%d; ack=%d\n", 4991 __func__, bf, SEQNO(bf->bf_state.bfs_seqno), 4992 ATH_BA_ISSET(ba, ba_index)); 4993 4994 if (tx_ok && ATH_BA_ISSET(ba, ba_index)) { 4995 sc->sc_stats.ast_tx_aggr_ok++; 4996 ath_tx_update_baw(sc, an, atid, bf); 4997 bf->bf_state.bfs_dobaw = 0; 4998 if (!bf->bf_state.bfs_addedbaw) 4999 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5000 "%s: wasn't added: seqno %d\n", 5001 __func__, SEQNO(bf->bf_state.bfs_seqno)); 5002 bf->bf_next = NULL; 5003 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 5004 } else { 5005 sc->sc_stats.ast_tx_aggr_fail++; 5006 if (ath_tx_retry_subframe(sc, bf, &bf_q)) { 5007 drops++; 5008 bf->bf_next = NULL; 5009 TAILQ_INSERT_TAIL(&bf_cq, bf, bf_list); 5010 } 5011 nbad++; 5012 } 5013 bf = bf_next; 5014 } 5015 5016 /* 5017 * Now that the BAW updates have been done, unlock 5018 * 5019 * txseq is grabbed before the lock is released so we 5020 * have a consistent view of what -was- in the BAW. 5021 * Anything after this point will not yet have been 5022 * TXed. 5023 */ 5024 txseq = tap->txa_start; 5025 ATH_TX_UNLOCK(sc); 5026 5027 if (nframes != nf) 5028 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5029 "%s: num frames seen=%d; bf nframes=%d\n", 5030 __func__, nframes, nf); 5031 5032 /* 5033 * Now we know how many frames were bad, call the rate 5034 * control code. 5035 */ 5036 if (fail == 0) 5037 ath_tx_update_ratectrl(sc, ni, rc, &ts, pktlen, nframes, 5038 nbad); 5039 5040 /* 5041 * send bar if we dropped any frames 5042 */ 5043 if (drops) { 5044 /* Suspend the TX queue and get ready to send the BAR */ 5045 ATH_TX_LOCK(sc); 5046 ath_tx_tid_bar_suspend(sc, atid); 5047 ATH_TX_UNLOCK(sc); 5048 } 5049 5050 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5051 "%s: txa_start now %d\n", __func__, tap->txa_start); 5052 5053 ATH_TX_LOCK(sc); 5054 5055 /* Prepend all frames to the beginning of the queue */ 5056 while ((bf = TAILQ_LAST(&bf_q, ath_bufhead_s)) != NULL) { 5057 TAILQ_REMOVE(&bf_q, bf, bf_list); 5058 ATH_TID_INSERT_HEAD(atid, bf, bf_list); 5059 } 5060 5061 /* 5062 * Reschedule to grab some further frames. 5063 */ 5064 ath_tx_tid_sched(sc, atid); 5065 5066 /* 5067 * If the queue is filtered, re-schedule as required. 5068 * 5069 * This is required as there may be a subsequent TX descriptor 5070 * for this end-node that has CLRDMASK set, so it's quite possible 5071 * that a filtered frame will be followed by a non-filtered 5072 * (complete or otherwise) frame. 5073 * 5074 * XXX should we do this before we complete the frame? 5075 */ 5076 if (atid->isfiltered) 5077 ath_tx_tid_filt_comp_complete(sc, atid); 5078 5079 finish_send_bar: 5080 5081 /* 5082 * Send BAR if required 5083 */ 5084 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5085 ath_tx_tid_bar_tx(sc, atid); 5086 5087 ATH_TX_UNLOCK(sc); 5088 5089 /* Do deferred completion */ 5090 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5091 TAILQ_REMOVE(&bf_cq, bf, bf_list); 5092 ath_tx_default_comp(sc, bf, 0); 5093 } 5094 } 5095 5096 /* 5097 * Handle completion of unaggregated frames in an ADDBA 5098 * session. 5099 * 5100 * Fail is set to 1 if the entry is being freed via a call to 5101 * ath_tx_draintxq(). 5102 */ 5103 static void 5104 ath_tx_aggr_comp_unaggr(struct ath_softc *sc, struct ath_buf *bf, int fail) 5105 { 5106 struct ieee80211_node *ni = bf->bf_node; 5107 struct ath_node *an = ATH_NODE(ni); 5108 int tid = bf->bf_state.bfs_tid; 5109 struct ath_tid *atid = &an->an_tid[tid]; 5110 struct ath_tx_status ts; 5111 int drops = 0; 5112 5113 /* 5114 * Take a copy of this; filtering/cloning the frame may free the 5115 * bf pointer. 5116 */ 5117 ts = bf->bf_status.ds_txstat; 5118 5119 /* 5120 * Update rate control status here, before we possibly 5121 * punt to retry or cleanup. 5122 * 5123 * Do it outside of the TXQ lock. 5124 */ 5125 if (fail == 0 && ((bf->bf_state.bfs_txflags & HAL_TXDESC_NOACK) == 0)) 5126 ath_tx_update_ratectrl(sc, ni, bf->bf_state.bfs_rc, 5127 &bf->bf_status.ds_txstat, 5128 bf->bf_state.bfs_pktlen, 5129 1, (ts.ts_status == 0) ? 0 : 1); 5130 5131 /* 5132 * This is called early so atid->hwq_depth can be tracked. 5133 * This unfortunately means that it's released and regrabbed 5134 * during retry and cleanup. That's rather inefficient. 5135 */ 5136 ATH_TX_LOCK(sc); 5137 5138 if (tid == IEEE80211_NONQOS_TID) 5139 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16!\n", __func__); 5140 5141 DPRINTF(sc, ATH_DEBUG_SW_TX, 5142 "%s: bf=%p: tid=%d, hwq_depth=%d, seqno=%d\n", 5143 __func__, bf, bf->bf_state.bfs_tid, atid->hwq_depth, 5144 SEQNO(bf->bf_state.bfs_seqno)); 5145 5146 atid->hwq_depth--; 5147 if (atid->hwq_depth < 0) 5148 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: hwq_depth < 0: %d\n", 5149 __func__, atid->hwq_depth); 5150 5151 /* 5152 * If the TID is filtered, handle completing the filter 5153 * transition before potentially kicking it to the cleanup 5154 * function. 5155 */ 5156 if (atid->isfiltered) 5157 ath_tx_tid_filt_comp_complete(sc, atid); 5158 5159 /* 5160 * If a cleanup is in progress, punt to comp_cleanup; 5161 * rather than handling it here. It's thus their 5162 * responsibility to clean up, call the completion 5163 * function in net80211, etc. 5164 */ 5165 if (atid->cleanup_inprogress) { 5166 if (atid->isfiltered) 5167 DPRINTF(sc, ATH_DEBUG_SW_TX, 5168 "%s: isfiltered=1, normal_comp?\n", 5169 __func__); 5170 ATH_TX_UNLOCK(sc); 5171 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: cleanup_unaggr\n", 5172 __func__); 5173 ath_tx_comp_cleanup_unaggr(sc, bf); 5174 return; 5175 } 5176 5177 /* 5178 * XXX TODO: how does cleanup, BAR and filtered frame handling 5179 * overlap? 5180 * 5181 * If the frame is filtered OR if it's any failure but 5182 * the TID is filtered, the frame must be added to the 5183 * filtered frame list. 5184 * 5185 * However - a busy buffer can't be added to the filtered 5186 * list as it will end up being recycled without having 5187 * been made available for the hardware. 5188 */ 5189 if ((ts.ts_status & HAL_TXERR_FILT) || 5190 (ts.ts_status != 0 && atid->isfiltered)) { 5191 int freeframe; 5192 5193 if (fail != 0) 5194 DPRINTF(sc, ATH_DEBUG_SW_TX, 5195 "%s: isfiltered=1, fail=%d\n", 5196 __func__, fail); 5197 freeframe = ath_tx_tid_filt_comp_single(sc, atid, bf); 5198 /* 5199 * If freeframe=0 then bf is no longer ours; don't 5200 * touch it. 5201 */ 5202 if (freeframe) { 5203 /* Remove from BAW */ 5204 if (bf->bf_state.bfs_addedbaw) 5205 drops++; 5206 if (bf->bf_state.bfs_dobaw) { 5207 ath_tx_update_baw(sc, an, atid, bf); 5208 if (!bf->bf_state.bfs_addedbaw) 5209 DPRINTF(sc, ATH_DEBUG_SW_TX, 5210 "%s: wasn't added: seqno %d\n", 5211 __func__, SEQNO(bf->bf_state.bfs_seqno)); 5212 } 5213 bf->bf_state.bfs_dobaw = 0; 5214 } 5215 5216 /* 5217 * If the frame couldn't be filtered, treat it as a drop and 5218 * prepare to send a BAR. 5219 */ 5220 if (freeframe && drops) 5221 ath_tx_tid_bar_suspend(sc, atid); 5222 5223 /* 5224 * Send BAR if required 5225 */ 5226 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5227 ath_tx_tid_bar_tx(sc, atid); 5228 5229 ATH_TX_UNLOCK(sc); 5230 /* 5231 * If freeframe is set, then the frame couldn't be 5232 * cloned and bf is still valid. Just complete/free it. 5233 */ 5234 if (freeframe) 5235 ath_tx_default_comp(sc, bf, fail); 5236 5237 return; 5238 } 5239 /* 5240 * Don't bother with the retry check if all frames 5241 * are being failed (eg during queue deletion.) 5242 */ 5243 #if 0 5244 if (fail == 0 && ts->ts_status & HAL_TXERR_XRETRY) { 5245 #endif 5246 if (fail == 0 && ts.ts_status != 0) { 5247 ATH_TX_UNLOCK(sc); 5248 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: retry_unaggr\n", 5249 __func__); 5250 ath_tx_aggr_retry_unaggr(sc, bf); 5251 return; 5252 } 5253 5254 /* Success? Complete */ 5255 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=%d, seqno %d\n", 5256 __func__, tid, SEQNO(bf->bf_state.bfs_seqno)); 5257 if (bf->bf_state.bfs_dobaw) { 5258 ath_tx_update_baw(sc, an, atid, bf); 5259 bf->bf_state.bfs_dobaw = 0; 5260 if (!bf->bf_state.bfs_addedbaw) 5261 DPRINTF(sc, ATH_DEBUG_SW_TX, 5262 "%s: wasn't added: seqno %d\n", 5263 __func__, SEQNO(bf->bf_state.bfs_seqno)); 5264 } 5265 5266 /* 5267 * If the queue is filtered, re-schedule as required. 5268 * 5269 * This is required as there may be a subsequent TX descriptor 5270 * for this end-node that has CLRDMASK set, so it's quite possible 5271 * that a filtered frame will be followed by a non-filtered 5272 * (complete or otherwise) frame. 5273 * 5274 * XXX should we do this before we complete the frame? 5275 */ 5276 if (atid->isfiltered) 5277 ath_tx_tid_filt_comp_complete(sc, atid); 5278 5279 /* 5280 * Send BAR if required 5281 */ 5282 if (ath_tx_tid_bar_tx_ready(sc, atid)) 5283 ath_tx_tid_bar_tx(sc, atid); 5284 5285 ATH_TX_UNLOCK(sc); 5286 5287 ath_tx_default_comp(sc, bf, fail); 5288 /* bf is freed at this point */ 5289 } 5290 5291 void 5292 ath_tx_aggr_comp(struct ath_softc *sc, struct ath_buf *bf, int fail) 5293 { 5294 if (bf->bf_state.bfs_aggr) 5295 ath_tx_aggr_comp_aggr(sc, bf, fail); 5296 else 5297 ath_tx_aggr_comp_unaggr(sc, bf, fail); 5298 } 5299 5300 /* 5301 * Schedule some packets from the given node/TID to the hardware. 5302 * 5303 * This is the aggregate version. 5304 */ 5305 void 5306 ath_tx_tid_hw_queue_aggr(struct ath_softc *sc, struct ath_node *an, 5307 struct ath_tid *tid) 5308 { 5309 struct ath_buf *bf; 5310 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5311 struct ieee80211_tx_ampdu *tap; 5312 ATH_AGGR_STATUS status; 5313 ath_bufhead bf_q; 5314 5315 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d\n", __func__, tid->tid); 5316 ATH_TX_LOCK_ASSERT(sc); 5317 5318 /* 5319 * XXX TODO: If we're called for a queue that we're leaking frames to, 5320 * ensure we only leak one. 5321 */ 5322 5323 tap = ath_tx_get_tx_tid(an, tid->tid); 5324 5325 if (tid->tid == IEEE80211_NONQOS_TID) 5326 DPRINTF(sc, ATH_DEBUG_SW_TX, 5327 "%s: called for TID=NONQOS_TID?\n", __func__); 5328 5329 for (;;) { 5330 status = ATH_AGGR_DONE; 5331 5332 /* 5333 * If the upper layer has paused the TID, don't 5334 * queue any further packets. 5335 * 5336 * This can also occur from the completion task because 5337 * of packet loss; but as its serialised with this code, 5338 * it won't "appear" half way through queuing packets. 5339 */ 5340 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5341 break; 5342 5343 bf = ATH_TID_FIRST(tid); 5344 if (bf == NULL) { 5345 break; 5346 } 5347 5348 /* 5349 * If the packet doesn't fall within the BAW (eg a NULL 5350 * data frame), schedule it directly; continue. 5351 */ 5352 if (! bf->bf_state.bfs_dobaw) { 5353 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5354 "%s: non-baw packet\n", 5355 __func__); 5356 ATH_TID_REMOVE(tid, bf, bf_list); 5357 5358 if (bf->bf_state.bfs_nframes > 1) 5359 DPRINTF(sc, ATH_DEBUG_SW_TX, 5360 "%s: aggr=%d, nframes=%d\n", 5361 __func__, 5362 bf->bf_state.bfs_aggr, 5363 bf->bf_state.bfs_nframes); 5364 5365 /* 5366 * This shouldn't happen - such frames shouldn't 5367 * ever have been queued as an aggregate in the 5368 * first place. However, make sure the fields 5369 * are correctly setup just to be totally sure. 5370 */ 5371 bf->bf_state.bfs_aggr = 0; 5372 bf->bf_state.bfs_nframes = 1; 5373 5374 /* Update CLRDMASK just before this frame is queued */ 5375 ath_tx_update_clrdmask(sc, tid, bf); 5376 5377 ath_tx_do_ratelookup(sc, bf); 5378 ath_tx_calc_duration(sc, bf); 5379 ath_tx_calc_protection(sc, bf); 5380 ath_tx_set_rtscts(sc, bf); 5381 ath_tx_rate_fill_rcflags(sc, bf); 5382 ath_tx_setds(sc, bf); 5383 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5384 5385 sc->sc_aggr_stats.aggr_nonbaw_pkt++; 5386 5387 /* Queue the packet; continue */ 5388 goto queuepkt; 5389 } 5390 5391 TAILQ_INIT(&bf_q); 5392 5393 /* 5394 * Do a rate control lookup on the first frame in the 5395 * list. The rate control code needs that to occur 5396 * before it can determine whether to TX. 5397 * It's inaccurate because the rate control code doesn't 5398 * really "do" aggregate lookups, so it only considers 5399 * the size of the first frame. 5400 */ 5401 ath_tx_do_ratelookup(sc, bf); 5402 bf->bf_state.bfs_rc[3].rix = 0; 5403 bf->bf_state.bfs_rc[3].tries = 0; 5404 5405 ath_tx_calc_duration(sc, bf); 5406 ath_tx_calc_protection(sc, bf); 5407 5408 ath_tx_set_rtscts(sc, bf); 5409 ath_tx_rate_fill_rcflags(sc, bf); 5410 5411 status = ath_tx_form_aggr(sc, an, tid, &bf_q); 5412 5413 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5414 "%s: ath_tx_form_aggr() status=%d\n", __func__, status); 5415 5416 /* 5417 * No frames to be picked up - out of BAW 5418 */ 5419 if (TAILQ_EMPTY(&bf_q)) 5420 break; 5421 5422 /* 5423 * This assumes that the descriptor list in the ath_bufhead 5424 * are already linked together via bf_next pointers. 5425 */ 5426 bf = TAILQ_FIRST(&bf_q); 5427 5428 if (status == ATH_AGGR_8K_LIMITED) 5429 sc->sc_aggr_stats.aggr_rts_aggr_limited++; 5430 5431 /* 5432 * If it's the only frame send as non-aggregate 5433 * assume that ath_tx_form_aggr() has checked 5434 * whether it's in the BAW and added it appropriately. 5435 */ 5436 if (bf->bf_state.bfs_nframes == 1) { 5437 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5438 "%s: single-frame aggregate\n", __func__); 5439 5440 /* Update CLRDMASK just before this frame is queued */ 5441 ath_tx_update_clrdmask(sc, tid, bf); 5442 5443 bf->bf_state.bfs_aggr = 0; 5444 bf->bf_state.bfs_ndelim = 0; 5445 ath_tx_setds(sc, bf); 5446 ath_hal_clr11n_aggr(sc->sc_ah, bf->bf_desc); 5447 if (status == ATH_AGGR_BAW_CLOSED) 5448 sc->sc_aggr_stats.aggr_baw_closed_single_pkt++; 5449 else 5450 sc->sc_aggr_stats.aggr_single_pkt++; 5451 } else { 5452 DPRINTF(sc, ATH_DEBUG_SW_TX_AGGR, 5453 "%s: multi-frame aggregate: %d frames, " 5454 "length %d\n", 5455 __func__, bf->bf_state.bfs_nframes, 5456 bf->bf_state.bfs_al); 5457 bf->bf_state.bfs_aggr = 1; 5458 sc->sc_aggr_stats.aggr_pkts[bf->bf_state.bfs_nframes]++; 5459 sc->sc_aggr_stats.aggr_aggr_pkt++; 5460 5461 /* Update CLRDMASK just before this frame is queued */ 5462 ath_tx_update_clrdmask(sc, tid, bf); 5463 5464 /* 5465 * Calculate the duration/protection as required. 5466 */ 5467 ath_tx_calc_duration(sc, bf); 5468 ath_tx_calc_protection(sc, bf); 5469 5470 /* 5471 * Update the rate and rtscts information based on the 5472 * rate decision made by the rate control code; 5473 * the first frame in the aggregate needs it. 5474 */ 5475 ath_tx_set_rtscts(sc, bf); 5476 5477 /* 5478 * Setup the relevant descriptor fields 5479 * for aggregation. The first descriptor 5480 * already points to the rest in the chain. 5481 */ 5482 ath_tx_setds_11n(sc, bf); 5483 5484 } 5485 queuepkt: 5486 /* Set completion handler, multi-frame aggregate or not */ 5487 bf->bf_comp = ath_tx_aggr_comp; 5488 5489 if (bf->bf_state.bfs_tid == IEEE80211_NONQOS_TID) 5490 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: TID=16?\n", __func__); 5491 5492 /* 5493 * Update leak count and frame config if were leaking frames. 5494 * 5495 * XXX TODO: it should update all frames in an aggregate 5496 * correctly! 5497 */ 5498 ath_tx_leak_count_update(sc, tid, bf); 5499 5500 /* Punt to txq */ 5501 ath_tx_handoff(sc, txq, bf); 5502 5503 /* Track outstanding buffer count to hardware */ 5504 /* aggregates are "one" buffer */ 5505 tid->hwq_depth++; 5506 5507 /* 5508 * Break out if ath_tx_form_aggr() indicated 5509 * there can't be any further progress (eg BAW is full.) 5510 * Checking for an empty txq is done above. 5511 * 5512 * XXX locking on txq here? 5513 */ 5514 /* XXX TXQ locking */ 5515 if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr || 5516 (status == ATH_AGGR_BAW_CLOSED || 5517 status == ATH_AGGR_LEAK_CLOSED)) 5518 break; 5519 } 5520 } 5521 5522 /* 5523 * Schedule some packets from the given node/TID to the hardware. 5524 * 5525 * XXX TODO: this routine doesn't enforce the maximum TXQ depth. 5526 * It just dumps frames into the TXQ. We should limit how deep 5527 * the transmit queue can grow for frames dispatched to the given 5528 * TXQ. 5529 * 5530 * To avoid locking issues, either we need to own the TXQ lock 5531 * at this point, or we need to pass in the maximum frame count 5532 * from the caller. 5533 */ 5534 void 5535 ath_tx_tid_hw_queue_norm(struct ath_softc *sc, struct ath_node *an, 5536 struct ath_tid *tid) 5537 { 5538 struct ath_buf *bf; 5539 struct ath_txq *txq = sc->sc_ac2q[tid->ac]; 5540 5541 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: node %p: TID %d: called\n", 5542 __func__, an, tid->tid); 5543 5544 ATH_TX_LOCK_ASSERT(sc); 5545 5546 /* Check - is AMPDU pending or running? then print out something */ 5547 if (ath_tx_ampdu_pending(sc, an, tid->tid)) 5548 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu pending?\n", 5549 __func__, tid->tid); 5550 if (ath_tx_ampdu_running(sc, an, tid->tid)) 5551 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, ampdu running?\n", 5552 __func__, tid->tid); 5553 5554 for (;;) { 5555 5556 /* 5557 * If the upper layers have paused the TID, don't 5558 * queue any further packets. 5559 * 5560 * XXX if we are leaking frames, make sure we decrement 5561 * that counter _and_ we continue here. 5562 */ 5563 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) 5564 break; 5565 5566 bf = ATH_TID_FIRST(tid); 5567 if (bf == NULL) { 5568 break; 5569 } 5570 5571 ATH_TID_REMOVE(tid, bf, bf_list); 5572 5573 /* Sanity check! */ 5574 if (tid->tid != bf->bf_state.bfs_tid) { 5575 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: bfs_tid %d !=" 5576 " tid %d\n", __func__, bf->bf_state.bfs_tid, 5577 tid->tid); 5578 } 5579 /* Normal completion handler */ 5580 bf->bf_comp = ath_tx_normal_comp; 5581 5582 /* 5583 * Override this for now, until the non-aggregate 5584 * completion handler correctly handles software retransmits. 5585 */ 5586 bf->bf_state.bfs_txflags |= HAL_TXDESC_CLRDMASK; 5587 5588 /* Update CLRDMASK just before this frame is queued */ 5589 ath_tx_update_clrdmask(sc, tid, bf); 5590 5591 /* Program descriptors + rate control */ 5592 ath_tx_do_ratelookup(sc, bf); 5593 ath_tx_calc_duration(sc, bf); 5594 ath_tx_calc_protection(sc, bf); 5595 ath_tx_set_rtscts(sc, bf); 5596 ath_tx_rate_fill_rcflags(sc, bf); 5597 ath_tx_setds(sc, bf); 5598 5599 /* 5600 * Update the current leak count if 5601 * we're leaking frames; and set the 5602 * MORE flag as appropriate. 5603 */ 5604 ath_tx_leak_count_update(sc, tid, bf); 5605 5606 /* Track outstanding buffer count to hardware */ 5607 /* aggregates are "one" buffer */ 5608 tid->hwq_depth++; 5609 5610 /* Punt to hardware or software txq */ 5611 ath_tx_handoff(sc, txq, bf); 5612 } 5613 } 5614 5615 /* 5616 * Schedule some packets to the given hardware queue. 5617 * 5618 * This function walks the list of TIDs (ie, ath_node TIDs 5619 * with queued traffic) and attempts to schedule traffic 5620 * from them. 5621 * 5622 * TID scheduling is implemented as a FIFO, with TIDs being 5623 * added to the end of the queue after some frames have been 5624 * scheduled. 5625 */ 5626 void 5627 ath_txq_sched(struct ath_softc *sc, struct ath_txq *txq) 5628 { 5629 struct ath_tid *tid, *next, *last; 5630 5631 ATH_TX_LOCK_ASSERT(sc); 5632 5633 /* 5634 * For non-EDMA chips, aggr frames that have been built are 5635 * in axq_aggr_depth, whether they've been scheduled or not. 5636 * There's no FIFO, so txq->axq_depth is what's been scheduled 5637 * to the hardware. 5638 * 5639 * For EDMA chips, we do it in two stages. The existing code 5640 * builds a list of frames to go to the hardware and the EDMA 5641 * code turns it into a single entry to push into the FIFO. 5642 * That way we don't take up one packet per FIFO slot. 5643 * We do push one aggregate per FIFO slot though, just to keep 5644 * things simple. 5645 * 5646 * The FIFO depth is what's in the hardware; the txq->axq_depth 5647 * is what's been scheduled to the FIFO. 5648 * 5649 * fifo.axq_depth is the number of frames (or aggregates) pushed 5650 * into the EDMA FIFO. For multi-frame lists, this is the number 5651 * of frames pushed in. 5652 * axq_fifo_depth is the number of FIFO slots currently busy. 5653 */ 5654 5655 /* For EDMA and non-EDMA, check built/scheduled against aggr limit */ 5656 if (txq->axq_aggr_depth >= sc->sc_hwq_limit_aggr) { 5657 sc->sc_aggr_stats.aggr_sched_nopkt++; 5658 return; 5659 } 5660 5661 /* 5662 * For non-EDMA chips, axq_depth is the "what's scheduled to 5663 * the hardware list". For EDMA it's "What's built for the hardware" 5664 * and fifo.axq_depth is how many frames have been dispatched 5665 * already to the hardware. 5666 */ 5667 if (txq->axq_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_nonaggr) { 5668 sc->sc_aggr_stats.aggr_sched_nopkt++; 5669 return; 5670 } 5671 5672 last = TAILQ_LAST(&txq->axq_tidq, axq_t_s); 5673 5674 TAILQ_FOREACH_SAFE(tid, &txq->axq_tidq, axq_qelem, next) { 5675 /* 5676 * Suspend paused queues here; they'll be resumed 5677 * once the addba completes or times out. 5678 */ 5679 DPRINTF(sc, ATH_DEBUG_SW_TX, "%s: tid=%d, paused=%d\n", 5680 __func__, tid->tid, tid->paused); 5681 ath_tx_tid_unsched(sc, tid); 5682 /* 5683 * This node may be in power-save and we're leaking 5684 * a frame; be careful. 5685 */ 5686 if (! ath_tx_tid_can_tx_or_sched(sc, tid)) { 5687 goto loop_done; 5688 } 5689 if (ath_tx_ampdu_running(sc, tid->an, tid->tid)) 5690 ath_tx_tid_hw_queue_aggr(sc, tid->an, tid); 5691 else 5692 ath_tx_tid_hw_queue_norm(sc, tid->an, tid); 5693 5694 /* Not empty? Re-schedule */ 5695 if (tid->axq_depth != 0) 5696 ath_tx_tid_sched(sc, tid); 5697 5698 /* 5699 * Give the software queue time to aggregate more 5700 * packets. If we aren't running aggregation then 5701 * we should still limit the hardware queue depth. 5702 */ 5703 /* XXX TXQ locking */ 5704 if (txq->axq_aggr_depth + txq->fifo.axq_depth >= sc->sc_hwq_limit_aggr) { 5705 break; 5706 } 5707 if (txq->axq_depth >= sc->sc_hwq_limit_nonaggr) { 5708 break; 5709 } 5710 loop_done: 5711 /* 5712 * If this was the last entry on the original list, stop. 5713 * Otherwise nodes that have been rescheduled onto the end 5714 * of the TID FIFO list will just keep being rescheduled. 5715 * 5716 * XXX What should we do about nodes that were paused 5717 * but are pending a leaking frame in response to a ps-poll? 5718 * They'll be put at the front of the list; so they'll 5719 * prematurely trigger this condition! Ew. 5720 */ 5721 if (tid == last) 5722 break; 5723 } 5724 } 5725 5726 /* 5727 * TX addba handling 5728 */ 5729 5730 /* 5731 * Return net80211 TID struct pointer, or NULL for none 5732 */ 5733 struct ieee80211_tx_ampdu * 5734 ath_tx_get_tx_tid(struct ath_node *an, int tid) 5735 { 5736 struct ieee80211_node *ni = &an->an_node; 5737 struct ieee80211_tx_ampdu *tap; 5738 5739 if (tid == IEEE80211_NONQOS_TID) 5740 return NULL; 5741 5742 tap = &ni->ni_tx_ampdu[tid]; 5743 return tap; 5744 } 5745 5746 /* 5747 * Is AMPDU-TX running? 5748 */ 5749 static int 5750 ath_tx_ampdu_running(struct ath_softc *sc, struct ath_node *an, int tid) 5751 { 5752 struct ieee80211_tx_ampdu *tap; 5753 5754 if (tid == IEEE80211_NONQOS_TID) 5755 return 0; 5756 5757 tap = ath_tx_get_tx_tid(an, tid); 5758 if (tap == NULL) 5759 return 0; /* Not valid; default to not running */ 5760 5761 return !! (tap->txa_flags & IEEE80211_AGGR_RUNNING); 5762 } 5763 5764 /* 5765 * Is AMPDU-TX negotiation pending? 5766 */ 5767 static int 5768 ath_tx_ampdu_pending(struct ath_softc *sc, struct ath_node *an, int tid) 5769 { 5770 struct ieee80211_tx_ampdu *tap; 5771 5772 if (tid == IEEE80211_NONQOS_TID) 5773 return 0; 5774 5775 tap = ath_tx_get_tx_tid(an, tid); 5776 if (tap == NULL) 5777 return 0; /* Not valid; default to not pending */ 5778 5779 return !! (tap->txa_flags & IEEE80211_AGGR_XCHGPEND); 5780 } 5781 5782 /* 5783 * Is AMPDU-TX pending for the given TID? 5784 */ 5785 5786 5787 /* 5788 * Method to handle sending an ADDBA request. 5789 * 5790 * We tap this so the relevant flags can be set to pause the TID 5791 * whilst waiting for the response. 5792 * 5793 * XXX there's no timeout handler we can override? 5794 */ 5795 int 5796 ath_addba_request(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5797 int dialogtoken, int baparamset, int batimeout) 5798 { 5799 struct ath_softc *sc = ni->ni_ic->ic_softc; 5800 int tid = tap->txa_tid; 5801 struct ath_node *an = ATH_NODE(ni); 5802 struct ath_tid *atid = &an->an_tid[tid]; 5803 5804 /* 5805 * XXX danger Will Robinson! 5806 * 5807 * Although the taskqueue may be running and scheduling some more 5808 * packets, these should all be _before_ the addba sequence number. 5809 * However, net80211 will keep self-assigning sequence numbers 5810 * until addba has been negotiated. 5811 * 5812 * In the past, these packets would be "paused" (which still works 5813 * fine, as they're being scheduled to the driver in the same 5814 * serialised method which is calling the addba request routine) 5815 * and when the aggregation session begins, they'll be dequeued 5816 * as aggregate packets and added to the BAW. However, now there's 5817 * a "bf->bf_state.bfs_dobaw" flag, and this isn't set for these 5818 * packets. Thus they never get included in the BAW tracking and 5819 * this can cause the initial burst of packets after the addba 5820 * negotiation to "hang", as they quickly fall outside the BAW. 5821 * 5822 * The "eventual" solution should be to tag these packets with 5823 * dobaw. Although net80211 has given us a sequence number, 5824 * it'll be "after" the left edge of the BAW and thus it'll 5825 * fall within it. 5826 */ 5827 ATH_TX_LOCK(sc); 5828 /* 5829 * This is a bit annoying. Until net80211 HT code inherits some 5830 * (any) locking, we may have this called in parallel BUT only 5831 * one response/timeout will be called. Grr. 5832 */ 5833 if (atid->addba_tx_pending == 0) { 5834 ath_tx_tid_pause(sc, atid); 5835 atid->addba_tx_pending = 1; 5836 } 5837 ATH_TX_UNLOCK(sc); 5838 5839 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5840 "%s: %6D: called; dialogtoken=%d, baparamset=%d, batimeout=%d\n", 5841 __func__, 5842 ni->ni_macaddr, 5843 ":", 5844 dialogtoken, baparamset, batimeout); 5845 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5846 "%s: txa_start=%d, ni_txseqs=%d\n", 5847 __func__, tap->txa_start, ni->ni_txseqs[tid]); 5848 5849 return sc->sc_addba_request(ni, tap, dialogtoken, baparamset, 5850 batimeout); 5851 } 5852 5853 /* 5854 * Handle an ADDBA response. 5855 * 5856 * We unpause the queue so TX'ing can resume. 5857 * 5858 * Any packets TX'ed from this point should be "aggregate" (whether 5859 * aggregate or not) so the BAW is updated. 5860 * 5861 * Note! net80211 keeps self-assigning sequence numbers until 5862 * ampdu is negotiated. This means the initially-negotiated BAW left 5863 * edge won't match the ni->ni_txseq. 5864 * 5865 * So, being very dirty, the BAW left edge is "slid" here to match 5866 * ni->ni_txseq. 5867 * 5868 * What likely SHOULD happen is that all packets subsequent to the 5869 * addba request should be tagged as aggregate and queued as non-aggregate 5870 * frames; thus updating the BAW. For now though, I'll just slide the 5871 * window. 5872 */ 5873 int 5874 ath_addba_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 5875 int status, int code, int batimeout) 5876 { 5877 struct ath_softc *sc = ni->ni_ic->ic_softc; 5878 int tid = tap->txa_tid; 5879 struct ath_node *an = ATH_NODE(ni); 5880 struct ath_tid *atid = &an->an_tid[tid]; 5881 int r; 5882 5883 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5884 "%s: %6D: called; status=%d, code=%d, batimeout=%d\n", __func__, 5885 ni->ni_macaddr, 5886 ":", 5887 status, code, batimeout); 5888 5889 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 5890 "%s: txa_start=%d, ni_txseqs=%d\n", 5891 __func__, tap->txa_start, ni->ni_txseqs[tid]); 5892 5893 /* 5894 * Call this first, so the interface flags get updated 5895 * before the TID is unpaused. Otherwise a race condition 5896 * exists where the unpaused TID still doesn't yet have 5897 * IEEE80211_AGGR_RUNNING set. 5898 */ 5899 r = sc->sc_addba_response(ni, tap, status, code, batimeout); 5900 5901 ATH_TX_LOCK(sc); 5902 atid->addba_tx_pending = 0; 5903 /* 5904 * XXX dirty! 5905 * Slide the BAW left edge to wherever net80211 left it for us. 5906 * Read above for more information. 5907 */ 5908 tap->txa_start = ni->ni_txseqs[tid]; 5909 ath_tx_tid_resume(sc, atid); 5910 ATH_TX_UNLOCK(sc); 5911 return r; 5912 } 5913 5914 5915 /* 5916 * Stop ADDBA on a queue. 5917 * 5918 * This can be called whilst BAR TX is currently active on the queue, 5919 * so make sure this is unblocked before continuing. 5920 */ 5921 void 5922 ath_addba_stop(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap) 5923 { 5924 struct ath_softc *sc = ni->ni_ic->ic_softc; 5925 int tid = tap->txa_tid; 5926 struct ath_node *an = ATH_NODE(ni); 5927 struct ath_tid *atid = &an->an_tid[tid]; 5928 ath_bufhead bf_cq; 5929 struct ath_buf *bf; 5930 5931 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, "%s: %6D: called\n", 5932 __func__, 5933 ni->ni_macaddr, 5934 ":"); 5935 5936 /* 5937 * Pause TID traffic early, so there aren't any races 5938 * Unblock the pending BAR held traffic, if it's currently paused. 5939 */ 5940 ATH_TX_LOCK(sc); 5941 ath_tx_tid_pause(sc, atid); 5942 if (atid->bar_wait) { 5943 /* 5944 * bar_unsuspend() expects bar_tx == 1, as it should be 5945 * called from the TX completion path. This quietens 5946 * the warning. It's cleared for us anyway. 5947 */ 5948 atid->bar_tx = 1; 5949 ath_tx_tid_bar_unsuspend(sc, atid); 5950 } 5951 ATH_TX_UNLOCK(sc); 5952 5953 /* There's no need to hold the TXQ lock here */ 5954 sc->sc_addba_stop(ni, tap); 5955 5956 /* 5957 * ath_tx_tid_cleanup will resume the TID if possible, otherwise 5958 * it'll set the cleanup flag, and it'll be unpaused once 5959 * things have been cleaned up. 5960 */ 5961 TAILQ_INIT(&bf_cq); 5962 ATH_TX_LOCK(sc); 5963 5964 /* 5965 * In case there's a followup call to this, only call it 5966 * if we don't have a cleanup in progress. 5967 * 5968 * Since we've paused the queue above, we need to make 5969 * sure we unpause if there's already a cleanup in 5970 * progress - it means something else is also doing 5971 * this stuff, so we don't need to also keep it paused. 5972 */ 5973 if (atid->cleanup_inprogress) { 5974 ath_tx_tid_resume(sc, atid); 5975 } else { 5976 ath_tx_tid_cleanup(sc, an, tid, &bf_cq); 5977 /* 5978 * Unpause the TID if no cleanup is required. 5979 */ 5980 if (! atid->cleanup_inprogress) 5981 ath_tx_tid_resume(sc, atid); 5982 } 5983 ATH_TX_UNLOCK(sc); 5984 5985 /* Handle completing frames and fail them */ 5986 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 5987 TAILQ_REMOVE(&bf_cq, bf, bf_list); 5988 ath_tx_default_comp(sc, bf, 1); 5989 } 5990 5991 } 5992 5993 /* 5994 * Handle a node reassociation. 5995 * 5996 * We may have a bunch of frames queued to the hardware; those need 5997 * to be marked as cleanup. 5998 */ 5999 void 6000 ath_tx_node_reassoc(struct ath_softc *sc, struct ath_node *an) 6001 { 6002 struct ath_tid *tid; 6003 int i; 6004 ath_bufhead bf_cq; 6005 struct ath_buf *bf; 6006 6007 TAILQ_INIT(&bf_cq); 6008 6009 ATH_TX_UNLOCK_ASSERT(sc); 6010 6011 ATH_TX_LOCK(sc); 6012 for (i = 0; i < IEEE80211_TID_SIZE; i++) { 6013 tid = &an->an_tid[i]; 6014 if (tid->hwq_depth == 0) 6015 continue; 6016 DPRINTF(sc, ATH_DEBUG_NODE, 6017 "%s: %6D: TID %d: cleaning up TID\n", 6018 __func__, 6019 an->an_node.ni_macaddr, 6020 ":", 6021 i); 6022 /* 6023 * In case there's a followup call to this, only call it 6024 * if we don't have a cleanup in progress. 6025 */ 6026 if (! tid->cleanup_inprogress) { 6027 ath_tx_tid_pause(sc, tid); 6028 ath_tx_tid_cleanup(sc, an, i, &bf_cq); 6029 /* 6030 * Unpause the TID if no cleanup is required. 6031 */ 6032 if (! tid->cleanup_inprogress) 6033 ath_tx_tid_resume(sc, tid); 6034 } 6035 } 6036 ATH_TX_UNLOCK(sc); 6037 6038 /* Handle completing frames and fail them */ 6039 while ((bf = TAILQ_FIRST(&bf_cq)) != NULL) { 6040 TAILQ_REMOVE(&bf_cq, bf, bf_list); 6041 ath_tx_default_comp(sc, bf, 1); 6042 } 6043 } 6044 6045 /* 6046 * Note: net80211 bar_timeout() doesn't call this function on BAR failure; 6047 * it simply tears down the aggregation session. Ew. 6048 * 6049 * It however will call ieee80211_ampdu_stop() which will call 6050 * ic->ic_addba_stop(). 6051 * 6052 * XXX This uses a hard-coded max BAR count value; the whole 6053 * XXX BAR TX success or failure should be better handled! 6054 */ 6055 void 6056 ath_bar_response(struct ieee80211_node *ni, struct ieee80211_tx_ampdu *tap, 6057 int status) 6058 { 6059 struct ath_softc *sc = ni->ni_ic->ic_softc; 6060 int tid = tap->txa_tid; 6061 struct ath_node *an = ATH_NODE(ni); 6062 struct ath_tid *atid = &an->an_tid[tid]; 6063 int attempts = tap->txa_attempts; 6064 int old_txa_start; 6065 6066 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6067 "%s: %6D: called; txa_tid=%d, atid->tid=%d, status=%d, attempts=%d, txa_start=%d, txa_seqpending=%d\n", 6068 __func__, 6069 ni->ni_macaddr, 6070 ":", 6071 tap->txa_tid, 6072 atid->tid, 6073 status, 6074 attempts, 6075 tap->txa_start, 6076 tap->txa_seqpending); 6077 6078 /* Note: This may update the BAW details */ 6079 /* 6080 * XXX What if this does slide the BAW along? We need to somehow 6081 * XXX either fix things when it does happen, or prevent the 6082 * XXX seqpending value to be anything other than exactly what 6083 * XXX the hell we want! 6084 * 6085 * XXX So for now, how I do this inside the TX lock for now 6086 * XXX and just correct it afterwards? The below condition should 6087 * XXX never happen and if it does I need to fix all kinds of things. 6088 */ 6089 ATH_TX_LOCK(sc); 6090 old_txa_start = tap->txa_start; 6091 sc->sc_bar_response(ni, tap, status); 6092 if (tap->txa_start != old_txa_start) { 6093 device_printf(sc->sc_dev, "%s: tid=%d; txa_start=%d, old=%d, adjusting\n", 6094 __func__, 6095 tid, 6096 tap->txa_start, 6097 old_txa_start); 6098 } 6099 tap->txa_start = old_txa_start; 6100 ATH_TX_UNLOCK(sc); 6101 6102 /* Unpause the TID */ 6103 /* 6104 * XXX if this is attempt=50, the TID will be downgraded 6105 * XXX to a non-aggregate session. So we must unpause the 6106 * XXX TID here or it'll never be done. 6107 * 6108 * Also, don't call it if bar_tx/bar_wait are 0; something 6109 * has beaten us to the punch? (XXX figure out what?) 6110 */ 6111 if (status == 0 || attempts == 50) { 6112 ATH_TX_LOCK(sc); 6113 if (atid->bar_tx == 0 || atid->bar_wait == 0) 6114 DPRINTF(sc, ATH_DEBUG_SW_TX_BAR, 6115 "%s: huh? bar_tx=%d, bar_wait=%d\n", 6116 __func__, 6117 atid->bar_tx, atid->bar_wait); 6118 else 6119 ath_tx_tid_bar_unsuspend(sc, atid); 6120 ATH_TX_UNLOCK(sc); 6121 } 6122 } 6123 6124 /* 6125 * This is called whenever the pending ADDBA request times out. 6126 * Unpause and reschedule the TID. 6127 */ 6128 void 6129 ath_addba_response_timeout(struct ieee80211_node *ni, 6130 struct ieee80211_tx_ampdu *tap) 6131 { 6132 struct ath_softc *sc = ni->ni_ic->ic_softc; 6133 int tid = tap->txa_tid; 6134 struct ath_node *an = ATH_NODE(ni); 6135 struct ath_tid *atid = &an->an_tid[tid]; 6136 6137 DPRINTF(sc, ATH_DEBUG_SW_TX_CTRL, 6138 "%s: %6D: TID=%d, called; resuming\n", 6139 __func__, 6140 ni->ni_macaddr, 6141 ":", 6142 tid); 6143 6144 ATH_TX_LOCK(sc); 6145 atid->addba_tx_pending = 0; 6146 ATH_TX_UNLOCK(sc); 6147 6148 /* Note: This updates the aggregate state to (again) pending */ 6149 sc->sc_addba_response_timeout(ni, tap); 6150 6151 /* Unpause the TID; which reschedules it */ 6152 ATH_TX_LOCK(sc); 6153 ath_tx_tid_resume(sc, atid); 6154 ATH_TX_UNLOCK(sc); 6155 } 6156 6157 /* 6158 * Check if a node is asleep or not. 6159 */ 6160 int 6161 ath_tx_node_is_asleep(struct ath_softc *sc, struct ath_node *an) 6162 { 6163 6164 ATH_TX_LOCK_ASSERT(sc); 6165 6166 return (an->an_is_powersave); 6167 } 6168 6169 /* 6170 * Mark a node as currently "in powersaving." 6171 * This suspends all traffic on the node. 6172 * 6173 * This must be called with the node/tx locks free. 6174 * 6175 * XXX TODO: the locking silliness below is due to how the node 6176 * locking currently works. Right now, the node lock is grabbed 6177 * to do rate control lookups and these are done with the TX 6178 * queue lock held. This means the node lock can't be grabbed 6179 * first here or a LOR will occur. 6180 * 6181 * Eventually (hopefully!) the TX path code will only grab 6182 * the TXQ lock when transmitting and the ath_node lock when 6183 * doing node/TID operations. There are other complications - 6184 * the sched/unsched operations involve walking the per-txq 6185 * 'active tid' list and this requires both locks to be held. 6186 */ 6187 void 6188 ath_tx_node_sleep(struct ath_softc *sc, struct ath_node *an) 6189 { 6190 struct ath_tid *atid; 6191 struct ath_txq *txq; 6192 int tid; 6193 6194 ATH_TX_UNLOCK_ASSERT(sc); 6195 6196 /* Suspend all traffic on the node */ 6197 ATH_TX_LOCK(sc); 6198 6199 if (an->an_is_powersave) { 6200 DPRINTF(sc, ATH_DEBUG_XMIT, 6201 "%s: %6D: node was already asleep!\n", 6202 __func__, an->an_node.ni_macaddr, ":"); 6203 ATH_TX_UNLOCK(sc); 6204 return; 6205 } 6206 6207 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 6208 atid = &an->an_tid[tid]; 6209 txq = sc->sc_ac2q[atid->ac]; 6210 6211 ath_tx_tid_pause(sc, atid); 6212 } 6213 6214 /* Mark node as in powersaving */ 6215 an->an_is_powersave = 1; 6216 6217 ATH_TX_UNLOCK(sc); 6218 } 6219 6220 /* 6221 * Mark a node as currently "awake." 6222 * This resumes all traffic to the node. 6223 */ 6224 void 6225 ath_tx_node_wakeup(struct ath_softc *sc, struct ath_node *an) 6226 { 6227 struct ath_tid *atid; 6228 struct ath_txq *txq; 6229 int tid; 6230 6231 ATH_TX_UNLOCK_ASSERT(sc); 6232 6233 ATH_TX_LOCK(sc); 6234 6235 /* !? */ 6236 if (an->an_is_powersave == 0) { 6237 ATH_TX_UNLOCK(sc); 6238 DPRINTF(sc, ATH_DEBUG_XMIT, 6239 "%s: an=%p: node was already awake\n", 6240 __func__, an); 6241 return; 6242 } 6243 6244 /* Mark node as awake */ 6245 an->an_is_powersave = 0; 6246 /* 6247 * Clear any pending leaked frame requests 6248 */ 6249 an->an_leak_count = 0; 6250 6251 for (tid = 0; tid < IEEE80211_TID_SIZE; tid++) { 6252 atid = &an->an_tid[tid]; 6253 txq = sc->sc_ac2q[atid->ac]; 6254 6255 ath_tx_tid_resume(sc, atid); 6256 } 6257 ATH_TX_UNLOCK(sc); 6258 } 6259 6260 static int 6261 ath_legacy_dma_txsetup(struct ath_softc *sc) 6262 { 6263 6264 /* nothing new needed */ 6265 return (0); 6266 } 6267 6268 static int 6269 ath_legacy_dma_txteardown(struct ath_softc *sc) 6270 { 6271 6272 /* nothing new needed */ 6273 return (0); 6274 } 6275 6276 void 6277 ath_xmit_setup_legacy(struct ath_softc *sc) 6278 { 6279 /* 6280 * For now, just set the descriptor length to sizeof(ath_desc); 6281 * worry about extracting the real length out of the HAL later. 6282 */ 6283 sc->sc_tx_desclen = sizeof(struct ath_desc); 6284 sc->sc_tx_statuslen = sizeof(struct ath_desc); 6285 sc->sc_tx_nmaps = 1; /* only one buffer per TX desc */ 6286 6287 sc->sc_tx.xmit_setup = ath_legacy_dma_txsetup; 6288 sc->sc_tx.xmit_teardown = ath_legacy_dma_txteardown; 6289 sc->sc_tx.xmit_attach_comp_func = ath_legacy_attach_comp_func; 6290 6291 sc->sc_tx.xmit_dma_restart = ath_legacy_tx_dma_restart; 6292 sc->sc_tx.xmit_handoff = ath_legacy_xmit_handoff; 6293 6294 sc->sc_tx.xmit_drain = ath_legacy_tx_drain; 6295 } 6296